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gerrit-public.fairphone.software / platform / art / refs/heads/staging/n/fp2 / disassembler
  1. 2887aa2 ARM: Embed 0.0 in VCMP. by Vladimir Marko · 8 years ago
  2. b7d10aa ARM: Shorter fast-path for read barrier field load. by Vladimir Marko · 8 years ago
  3. 3988a8e ARM assembler support for VCNT and VPADDL. by xueliang.zhong · 8 years ago
  4. a6e95b3 Fix oatdump crash on arm64/arm code. Also adds 16 bit literal information. by Aart Bik · 8 years ago
  5. 369da22 Thumb2: Fix disassembly of the b.w offset. by Vladimir Marko · 8 years ago
  6. adf1eaa Thumb2: Show the immediate in ROR (immediate) disassembly. by Vladimir Marko · 8 years ago
  7. 51aff3a MIPS32: Implement UnsafeCASInt and UnsafeCASObject intrinsics. by Alexey Frunze · 8 years ago
  8. 07f6818 ART: Do not use vixld - workaround to fix dex2oatds. by Vladimir Marko · 8 years ago
  9. 3acee73 MIPS32: peek*/poke*, and String.charAt intrinsics. by Chris Larsen · 9 years ago
  10. 8cdbc2a ART/Thumb2: Disassemble SBFX/UBFX. by Vladimir Marko · 8 years ago
  11. 3f67e69 Implemented BitCount as an intrinsic. With unit test. by Aart Bik · 8 years ago
  12. 92d9060 MIPS: Implement HRor by Alexey Frunze · 8 years ago
  13. 5c7aed3 MIPS32: improvements in code generation (mostly 64-bit ALU ops) by Alexey Frunze · 8 years ago
  14. cd7b0ee MIPS32: Fuse long and FP compare & condition in Optimizing. by Alexey Frunze · 8 years ago
  15. e384547 MIPS32: int java.lang.*.numberOfLeadingZeros by Chris Larsen · 9 years ago
  16. 7d4152f MIPS64: Disassembler support for rotate instructions. by Chris Larsen · 9 years ago
  17. 8c434dc MIPS: Assemblers changes needed for optimizing compiler by Goran Jakovljevic · 9 years ago
  18. e295be4 Merge "Additional MIPS64 instructions needed by intrinsics code." by Andreas Gampe · 9 years ago
  19. bcee092 Add X86 bsf and rotate instructions by Mark Mendell · 9 years ago
  20. 2fadd7b Additional MIPS64 instructions needed by intrinsics code. by Chris Larsen · 9 years ago
  21. 2a5c468 ART: Some header cleaning around bit-utils by Andreas Gampe · 9 years ago
  22. 8ae3ffb Add 'bsr' instruction to x86 and x86_64 by Mark Mendell · 9 years ago
  23. b9c4bbe Add rep movsw to x86 and x86_64 instructions. by Mark Mendell · 9 years ago
  24. 3887c46 Remove unnecessary `explicit` qualifiers on constructors. by Roland Levillain · 9 years ago
  25. 5e2c8d3 Introduce arch-specific checker tests. by Alexandre Rames · 9 years ago
  26. 611d339 ARM/ARM64: Implement numberOfLeadingZeros intrinsic. by Scott Wakeling · 9 years ago
  27. 124b392 Added disassembler support for repe_cmpsw instruction in x86, x86_64 by agicsaki · 9 years ago
  28. eb7b739 Opt compiler: Add disassembly to the '.cfg' output. by Alexandre Rames · 9 years ago
  29. 4dda337 MIPS: Initial version of optimizing compiler for MIPS64R6. by Alexey Frunze · 9 years ago
  30. 12bd721 If heap poisoning is on, pass the relevant flag to LOCAL_ASFLAGS. by Roland Levillain · 9 years ago
  31. 9bd88b0 ARM64: Move xSELF from x18 to x19. by Serban Constantinescu · 9 years ago
  32. e0705f5 Fix for incorrect encode and parse of PEXTRW instruction by nikolay serdjuk · 9 years ago
  33. 2cebb24 Replace NULL with nullptr by Mathieu Chartier · 9 years ago
  34. 6daa9ef Merge "[MIPS] Refactoring code for disassembler" by Andreas Gampe · 9 years ago
  35. 03fe9c8 Merge "Fix for incorrect parse of PEXTRW instruction" by Andreas Gampe · 9 years ago
  36. 403e0d5 [MIPS] Refactoring code for disassembler by Goran Jakovljevic · 9 years ago
  37. caff302 Merge "Fix address formatting in Mips64 disassembler." by David Srbecky · 9 years ago
  38. 030d304 Merge "Build 32-bit version of the disassembler as well." by David Srbecky · 9 years ago
  39. bd4e6a8 Fix for incorrect parse of PEXTRW instruction by nikolay serdjuk · 9 years ago
  40. 65b798e ART: Enable more Clang warnings by Andreas Gampe · 9 years ago
  41. d2c80c4 Fix address formatting in Mips64 disassembler. by David Srbecky · 9 years ago
  42. 588e8e1 Build 32-bit version of the disassembler as well. by David Srbecky · 9 years ago
  43. 97597c9 Merge "[optimizing] Implement x86/x86_64 math intrinsics" by Andreas Gampe · 9 years ago
  44. fb8d279 [optimizing] Implement x86/x86_64 math intrinsics by Mark Mendell · 9 years ago
  45. 82e52ce ARM64: Update to VIXL 1.9. by Serban Constantinescu · 9 years ago
  46. 027f0ff ART: Add Mips32r6 backend support by Douglas Leung · 9 years ago
  47. 6ea651f Initial support for quick compiler on MIPS64r6. by Maja Gagic · 9 years ago
  48. d737ab3 ART: Enable the use of relative addresses in the arm64 disassembler. by Alexandre Rames · 9 years ago
  49. 1cd2790 ART: Fix Mips disassembler for some floating point instructions. by Douglas Leung · 9 years ago
  50. a34e760 ARM/ARM64: Dump thread offset. by Zheng Xu · 9 years ago
  51. 5d718dc Merge "ART: Fix x86 disassembler" by Andreas Gampe · 9 years ago
  52. 31fb260 Add options for building/testing with coverage. by Dan Albert · 10 years ago
  53. f36df54 Remove libcxx.mk cruft. by Dan Albert · 9 years ago
  54. 031b00d ART: Fix x86 disassembler by Andreas Gampe · 9 years ago
  55. 57b3429 ART: Allow to compile interpret-only mips64 files by Andreas Gampe · 9 years ago
  56. 8d36591 ART: Use jalr instead of jr for Mips by Andreas Gampe · 9 years ago
  57. 55d7c18 Improve Thumb disassembler for LDR/STR/PUSH/POP/BKPT. by Vladimir Marko · 9 years ago
  58. 6a0b920 Fix crash in x86 disassembler. by Nicolas Geoffray · 9 years ago
  59. 8683038 ART: Do not inline elf writer debug symbols by Andreas Gampe · 9 years ago
  60. e5eb706 ART: Break up x86 disassembler main function by Andreas Gampe · 9 years ago
  61. a262f77 ARM: Combine multiply accumulate operations. by Ningsheng Jian · 10 years ago
  62. 32f5b4d Vixl: Update the VIXL interface to VIXL 1.7 and enable VIXL debug. by Serban Constantinescu · 10 years ago
  63. 834896d Merge "Improvements to the ARM64 disassembler." by Ian Rogers · 10 years ago
  64. 847c8db Revert "Arm64: Use the debug version of VIXL for debug builds." by Nicolas Geoffray · 10 years ago
  65. 195c576 Arm64: Use the debug version of VIXL for debug builds. by Serban Constantinescu · 10 years ago
  66. d582fa4 Instruction set features for ARM64, MIPS and X86. by Ian Rogers · 10 years ago
  67. 677c12f Tidy x86 disassembler by Ian Rogers · 10 years ago
  68. 277ccbd ART: More warnings by Andreas Gampe · 10 years ago
  69. 872dd82 Tidy and reduce ART library dependencies on the host. by Ian Rogers · 10 years ago
  70. a37d925 Improvements to the ARM64 disassembler. by Alexandre Rames · 10 years ago
  71. 2c4257b Tidy logging code not using UNIMPLEMENTED. by Ian Rogers · 10 years ago
  72. cf7f191 C++11 related clean-up of DISALLOW_.. by Ian Rogers · 10 years ago
  73. c7dd295 Tidy up logging. by Ian Rogers · 10 years ago
  74. 6f3dbba Make ART compile with GCC -O0 again. by Ian Rogers · 10 years ago
  75. fef019c ART: ARM64: Fix instruction addresses in the disassembly. by Alexandre Rames · 10 years ago
  76. fc787ec Enable -Wimplicit-fallthrough. by Ian Rogers · 10 years ago
  77. c8ccf68 ART: Fix some -Wpedantic errors by Andreas Gampe · 10 years ago
  78. 2cbaccb Avoid printing absolute addresses in oatdump by Brian Carlstrom · 10 years ago
  79. b3a84e2 ART: Vectorization opcode implementation fixes by Lupusoru, Razvan A · 10 years ago
  80. b5bce7c ART: Add non-temporal store support by Jean Christophe Beyler · 10 years ago
  81. f40f890 Implement inlined shift long for 32bit by Yixin Shou · 10 years ago
  82. 76ab347 Fix art build script by Junmo Park · 10 years ago
  83. ec95f72 ART: Correct disassembling of 64bit immediates on x86_64 by Vladimir Kostyukov · 10 years ago
  84. 3c7bb98 Implement array get and array put in optimizing. by Nicolas Geoffray · 10 years ago
  85. 79bb184 ART: Correct disassembling of regs from opcodes by Vladimir Kostyukov · 10 years ago
  86. 2cfe30b Merge "X86 Backend support for vectorized float and byte 16x16 operations" by Ian Rogers · 10 years ago
  87. 60bfe7b X86 Backend support for vectorized float and byte 16x16 operations by Udayan Banerji · 10 years ago
  88. 94f3eb0 x86_64: Clean-up after cmp-long fix by Serguei Katkov · 10 years ago
  89. ae2efea Merge "ART: Add HADDPS/HADDPD/SHUFPS/SHUFPD instruction generation" by Ian Rogers · 10 years ago
  90. e443a80 ART: FF-opcodes are target-specific by Vladimir Kostyukov · 10 years ago
  91. 5192cbb Load 64 bit constant into GPR by single instruction for 64bit mode by Yixin Shou · 10 years ago
  92. d48b8a2 ART: FPU instructions support in disassembler by Vladimir Kostyukov · 10 years ago
  93. fb0fecf ART: Add HADDPS/HADDPD/SHUFPS/SHUFPD instruction generation by Olivier Come · 10 years ago
  94. afd9acc Multilib ART host. by Ian Rogers · 10 years ago
  95. 20dfc79 Add some more instruction support to optimizing compiler. by Dave Allison · 10 years ago
  96. a33720c X86 Dis: Add missing mov byte; Add size suffixes by Mark Mendell · 10 years ago
  97. c5f1773 Remove deprecated WITH_HOST_DALVIK. by Ian Rogers · 10 years ago
  98. 33ecf8d Add Move with Sign Extend Double to disassembler by Mark Mendell · 10 years ago
  99. 88649c7 Fix X86 disassambler printing of XMM, MM registers by Mark Mendell · 10 years ago
  100. f3639b2 Merge "ART: x86_64 disassembler improvements" by Ian Rogers · 10 years ago