auto import from //depot/cupcake/@135843
diff --git a/docs/opcodes/opcode-00-nop.html b/docs/opcodes/opcode-00-nop.html
new file mode 100644
index 0000000..726f560
--- /dev/null
+++ b/docs/opcodes/opcode-00-nop.html
@@ -0,0 +1,59 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>nop</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>nop</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Waste cycles.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>00 10x</td>
+ <td>nop</td>
+ <td> </td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<p>
+None.
+</p>
+
+<h2>Behavior</h2>
+
+<p>
+No externally observable effects, that is, all registers and object state(s)
+stay the same. The program counter silently advances to the next instruction.
+</p>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-01-move.html b/docs/opcodes/opcode-01-move.html
new file mode 100644
index 0000000..13c1150
--- /dev/null
+++ b/docs/opcodes/opcode-01-move.html
@@ -0,0 +1,92 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>move</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>move</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move the contents of one non-object register to another.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>01 12x</td>
+ <td>move vA, vB</td>
+ <td><code>A:</code> destination register (4 bits)<br/>
+ <code>B:</code> source register (4 bits)</td>
+</tr>
+<tr>
+ <td>02 22x</td>
+ <td>move/from16 vAA, vBBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> source register (16 bits)</td>
+</tr>
+<tr>
+ <td>03 32x</td>
+ <td>move/16 vAAAA, vBBBB</td>
+ <td><code>A:</code> destination register (16 bits)<br/>
+ <code>B:</code> source register (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A and B must be valid register indices in the current stack frame.
+ </li>
+ <li>
+ Register vB must be defined.
+ </li>
+ <li>
+ Register vB must not contain a reference value.
+ </li>
+ <li>
+ Register vB must not be part of a register pair.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The value of register vB is moved to register vA, that is, vA' = vB.
+ </li>
+ <li>
+ If register v(A-1) is the first half of a register pair, register v(A-1)'
+ becomes undefined.
+ </li>
+ <li>
+ If register v(A+1) is the second half of a register pair, register v(A+1)'
+ becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-04-move-wide.html b/docs/opcodes/opcode-04-move-wide.html
new file mode 100644
index 0000000..42202be
--- /dev/null
+++ b/docs/opcodes/opcode-04-move-wide.html
@@ -0,0 +1,106 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>move-wide</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>move</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move the contents of one register-pair to another.
+</p>
+<p>
+Note: It is legal to move from vN to either vN-1 or vN+1, so implementations
+must arrange for both halves of a register pair to be read before anything is
+written.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>04 12x</td>
+ <td>move-wide vA, vB</td>
+ <td><code>A:</code> destination register pair (4 bits)<br/>
+ <code>B:</code> source register pair (4 bits)</td>
+</tr>
+<tr>
+ <td>05 22x</td>
+ <td>move-wide/from16 vAA, vBBBB</td>
+ <td><code>A:</code> destination register pair (8 bits)<br/>
+ <code>B:</code> source register pair (16 bits)</td>
+</tr>
+<tr>
+ <td>06 32x</td>
+ <td>move-wide/16 vAAAA, vBBBB</td>
+ <td><code>A:</code> destination register pair (16 bits)<br/>
+ <code>B:</code> source register pair (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A+1 and B+1 must be valid register indices in the current stackframe
+ (which includes A and B being valid).
+ </li>
+ <li>
+ Register vB must be the lower half of a register pair (which excludes the
+ case of it containing a reference).
+ </li>
+ <li>
+ Both register vB and v(B+1) must be defined.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The value of register vB is moved to register vA, that is, vA' = vB.
+ </li>
+ <li>
+ The value of register v(B+1) is moved to register v(A+1), that is, v(A+1)'
+ = v(B+1).
+ </li>
+ <li>
+ If register v(A-1) is the lower half of a register pair, then v(A-1)'
+ becomes undefined.
+ </li>
+ <li>
+ If register v(A+2) is the upper half of a register pair, then v(A+2)'
+ becomes undefined.
+ </li>
+ <li>
+ If A = B-1, then v(B+1)' becomes undefined.
+ </li>
+ <li>
+ If A = B+1, then v(B)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-07-move-object.html b/docs/opcodes/opcode-07-move-object.html
new file mode 100644
index 0000000..e62750d
--- /dev/null
+++ b/docs/opcodes/opcode-07-move-object.html
@@ -0,0 +1,90 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>move-object</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>move-object</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move the contents of one object-bearing register to another.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>07 12x</td>
+ <td>move-object vA, vB</td>
+ <td><code>A:</code> destination register (4 bits)<br/>
+ <code>B:</code> source register (4 bits)</td>
+</tr>
+<tr>
+ <td>08 22x</td>
+ <td>move-object/from16 vAA, vBBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> source register (16 bits)</td>
+</tr>
+<tr>
+ <td>09 32x</td>
+ <td>move-object/16 vAAAA, vBBBB</td>
+ <td><code>A:</code> destination register (16 bits)<br/>
+ <code>B:</code> source register (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A and B must be legal register indices in the current stack frame.
+ </li>
+ <li>
+ Register vB must be defined.
+ </li>
+ <li>
+ Register vB must contain a reference value (which excludes the case of it
+ being part of a register pair).
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The value of register vB is moved to register vA, that is, vA' = vB.
+ </li>
+ <li>
+ If register v(A-1) is the lower half of a register pair, register v(A-1)'
+ becomes undefined.
+ </li>
+ <li>
+ If register v(A+1) is the upper half of a register pair, register v(A+1)'
+ becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-0a-move-result.html b/docs/opcodes/opcode-0a-move-result.html
new file mode 100644
index 0000000..f043d13
--- /dev/null
+++ b/docs/opcodes/opcode-0a-move-result.html
@@ -0,0 +1,96 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>move-result</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>move-result</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move the single-word non-object result of the most recent invoke-kind into the
+indicated register. This must be done as the instruction immediately after an
+invoke-kind whose (single-word, non-object) result is not to be ignored;
+anywhere else is invalid.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>0a 11x</td>
+ <td>move-result vAA</td>
+ <td><code>A:</code> destination register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ The instruction must be immediately preceded (in the code array) by an
+ invoke-kind instruction.
+ </li>
+ <li>
+ The instruction must be immediately reached (in the actual control flow)
+ through returning from this invoke-kind instruction (it must not be jumped
+ to).
+ </li>
+ <li>
+ The result delivered by the invoke-kind instruction must not be a reference
+ value or require a register pair.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The result delivered by the invoke-kind instruction is moved to register
+ vA, that is, vA' = result.
+ </li>
+ <li>
+ If register v(A-1) is the lower half of a register pair, register v(A-1)'
+ becomes undefined.
+ </li>
+ <li>
+ If register v(A+1) is the upper half of a register pair, register v(A+1)'
+ becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+<h2>Notes</h2>
+
+<p>
+This instruction can also be thought of as reading the contents of a special
+"result" register that is made valid and defined by executing a non-void return
+instruction or a filled-new-array instruction. The execution of any other
+instruction (including this one) renders this special register invalid.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-0b-move-result-wide.html b/docs/opcodes/opcode-0b-move-result-wide.html
new file mode 100644
index 0000000..c3e5779
--- /dev/null
+++ b/docs/opcodes/opcode-0b-move-result-wide.html
@@ -0,0 +1,101 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>move-result-wide</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>move-result-wide</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move the double-word result of the most recent invoke-kind into the indicated
+register pair. This must be done as the instruction immediately after an
+invoke-kind whose (double-word) result is not to be ignored; anywhere else is
+invalid.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>0b 11x</td>
+ <td>move-result-wide vAA</td>
+ <td><code>A:</code> destination register pair (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A+1 must be a valid register index in the current stack frame (which
+ includes A itself being valid).
+ </li>
+ <li>
+ The instruction must be immediately preceded (in the code array) by an
+ invoke-kind instruction.
+ </li>
+ <li>
+ The instruction must be immediately reached (in the actual control flow)
+ through returning from this invoke-kind instruction (it must not be jumped
+ to).
+ </li>
+ <li>
+ The result delivered by the invoke-kind instruction must be either a long
+ or a double value.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The upper 32 bits of the result delivered by the invoke-kind instruction are
+ moved to register vA, that is, vA' = result >> 0x20.
+ </li>
+ <li>
+ The lower 32 bits of the result delivered by the invoke-kind instruction are
+ moved to register v(A+1), that is, v(A+1)' = result & 0xffffffff.
+ </li>
+ <li>
+ If register v(A-1) is the lower half of a register pair, register v(A-1)'
+ becomes undefined.
+ </li>
+ <li>
+ If register v(A+2) is the upper half of a register pair, register v(A+2)'
+ becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+<h2>Notes</h2>
+
+<p>
+This instruction can also be thought of as reading the contents of a special
+"result" register that is made valid and defined by executing a non-void return
+instruction or a filled-new-array instruction. The execution of any other
+instruction (including this one) renders this special register invalid.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-0c-move-result-object.html b/docs/opcodes/opcode-0c-move-result-object.html
new file mode 100644
index 0000000..f065fed
--- /dev/null
+++ b/docs/opcodes/opcode-0c-move-result-object.html
@@ -0,0 +1,97 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>move-result-object</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>move-result-object</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move the object result of the most recent invoke-kind into the indicated
+register. This must be done as the instruction immediately after an invoke-kind
+or filled-new-array whose (object) result is not to be ignored; anywhere else
+is invalid.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>0c 11x</td>
+ <td>move-result-object vAA</td>
+ <td><code>A:</code> destination register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ The instruction must be immediately preceded (in the code array) by an
+ invoke-kind, filled-new-array, or filled-new-array/range instruction.
+ </li>
+ <li>
+ The instruction must be immediately reached (in the actual control flow)
+ through returning from this invoke-kind instruction or by passing a
+ filled-new-array or filled-new-array/range instruction (it must not be
+ jumped to).
+ </li>
+ <li>
+ The result delivered by the invoke-kind instruction must be a reference
+ value (which excludes the case of a long and double values).
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The result delivered by the invoke-kind instruction is moved to register
+ vA, that, is vA' = result.
+ </li>
+ <li>
+ If register v(A-1) is the lower half of a register pair, register v(A-1)'
+ becomes undefined.
+ </li>
+ <li>
+ If register v(A+1) is the upper half of a register pair, register v(A+1)'
+ becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+<h2>Notes</h2>
+
+<p>
+This instruction can also be thought of as reading the contents of a special
+"result" register that is made valid and defined by executing a non-void return
+instruction or a filled-new-array instruction. The execution of any other
+instruction (including this one) renders this special register invalid.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-0d-move-exception.html b/docs/opcodes/opcode-0d-move-exception.html
new file mode 100644
index 0000000..3c3bc83
--- /dev/null
+++ b/docs/opcodes/opcode-0d-move-exception.html
@@ -0,0 +1,79 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>move-exception</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>move-exception</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Save a just-caught exception into the given register. This should be the first
+instruction of any exception handler whose caught exception is not to be
+ignored, and this instruction may only ever occur as the first instruction of an
+exception handler; anywhere else is invalid.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>0d 11x</td>
+ <td>move-exception vAA</td>
+ <td><code>A:</code> destination register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ The instruction must be the first instruction (in the code array) of an
+ instruction handler, that is, its offset in the code array must match one of
+ the handlers defined for the method in the Dex file.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The active exception of the current thread is moved to register vA, that is,
+ vA' = exception.
+ </li>
+ <li>
+ If register v(A-1) is the lower half of a register pair, register v(A-1)'
+ becomes undefined.
+ </li>
+ <li>
+ If register v(A+1) is the upper half of a register pair, register v(A+1)'
+ becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-0e-return-void.html b/docs/opcodes/opcode-0e-return-void.html
new file mode 100644
index 0000000..7a9431e
--- /dev/null
+++ b/docs/opcodes/opcode-0e-return-void.html
@@ -0,0 +1,84 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>return-void</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>return-void</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Return from a void method.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>0e 10x</td>
+ <td>return-void</td>
+ <td> </td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ The return type of the current method must be void.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ If the method is synchronized, the object's monitor is released in a way
+ similar to the monitor-exit instruction.
+ </li>
+ <li>
+ The stack frame of the current method invocation is removed from the stack.
+ This includes all its registers becoming invalid.
+ </li>
+ <li>
+ If the stack is now empty, the current thread terminates.
+ </li>
+ <li>
+ Otherwise, the following happens:
+ <ul>
+ <li>
+ The stack frame that caused this method invocation becomes valid. This
+ includes all its registers and their old values.
+ </li>
+ <li>
+ Execution continues at the bytecode instruction immediately following
+ the invoke-kind or invoke-kind/range instruction that caused this method
+ invocation.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-0f-return.html b/docs/opcodes/opcode-0f-return.html
new file mode 100644
index 0000000..33e0b7c
--- /dev/null
+++ b/docs/opcodes/opcode-0f-return.html
@@ -0,0 +1,100 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>return</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>return</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Return from a single-width (32-bit) non-object value-returning method.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>0f 11x</td>
+ <td>return vAA</td>
+ <td><code>A:</code> return value register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ The return type of the current method must not be double, long, or a
+ reference.
+ </li>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ Register vA must not be part of a register pair.
+ </li>
+ <li>
+ The type of vA must match the return type of the method.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ If the method is synchronized, the object's monitor is released in a way
+ similar to the monitor-exit instruction.
+ </li>
+ <li>
+ The stack frame of the current method invocation is removed from the stack.
+ This includes all its registers becoming invalid.
+ </li>
+ <li>
+ If the stack is now empty, the current thread terminates.
+ </li>
+ <li>
+ Otherwise, the following happens:
+ <ul>
+ <li>
+ The stack frame that caused this method invocation becomes valid. This
+ includes all its registers and their old values.
+ </li>
+ <li>
+ Execution continues at the bytecode instruction immediately following
+ the invoke-kind or invoke-kind/range instruction that caused this
+ method invocation.
+ </li>
+ <li>
+ The return value can be consumed by (exactly) the first instruction
+ following the invoke-kind or invoke-kind/range instruction that caused
+ this method invocation, and this instructions needs to be a move-result
+ instruction.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-10-return-wide.html b/docs/opcodes/opcode-10-return-wide.html
new file mode 100644
index 0000000..f1a6b83
--- /dev/null
+++ b/docs/opcodes/opcode-10-return-wide.html
@@ -0,0 +1,99 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>return-wide</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>return-wide</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Return from a double-width (64-bit) value-returning method.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>10 11x</td>
+ <td>return-wide vAA</td>
+ <td><code>A:</code> return value register-pair (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ The return type of the current method must be double or long.
+ </li>
+ <li>
+ A+1 must be a valid register index in the current stack frame (which
+ includes A being valid).
+ </li>
+ <li>
+ Register vA must be the lower half of a register pair.
+ </li>
+ <li>
+ The type of vA must match the return type of the method.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ If the method is synchronized, the object's monitor is released in a way
+ similar to the monitor-exit instruction.
+ </li>
+ <li>
+ The stack frame of the current method invocation is removed from the stack.
+ This includes all its registers becoming invalid.
+ </li>
+ <li>
+ If the stack is now empty, the current thread terminates.
+ </li>
+ <li>
+ Otherwise, the following happens:
+ <ul>
+ <li>
+ The stack frame that caused this method invocation becomes valid. This
+ includes all its registers and their old values.
+ </li>
+ <li>
+ Execution continues at the bytecode instruction immediately following
+ the invoke instruction that caused this method invocation.
+ </li>
+ <li>
+ The return value can be consumed by (exactly) the first instruction
+ following the invoke-kind or invoke-kind/range instruction that caused
+ this method invocation, and this instructions needs to be a
+ move-result-wide instruction.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-11-return-object.html b/docs/opcodes/opcode-11-return-object.html
new file mode 100644
index 0000000..369233c
--- /dev/null
+++ b/docs/opcodes/opcode-11-return-object.html
@@ -0,0 +1,96 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>return-object</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>return-object</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Return from an object-returning method.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>11 11x</td>
+ <td>return-object vAA</td>
+ <td><code>A:</code> return value register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ The return type of the current method must be a reference.
+ </li>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ Register vA must be known to be reference-bearing.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ If the method is synchronized, the object's monitor is released in a way
+ similar to the monitor-exit instruction.
+ </li>
+ <li>
+ The stack frame of the current method invocation is removed from the stack.
+ This includes all its registers becoming invalid.
+ </li>
+ <li>
+ If the stack is now empty, the current thread terminates.
+ </li>
+ <li>
+ Otherwise, the following happens:
+ </li>
+ <ul>
+ <li>
+ The stack frame that caused this method invocation becomes valid. This
+ includes all its registers and their old values.
+ </li>
+ <li>
+ Execution continues at the bytecode instruction immediately following
+ the invoke instruction that caused this method invocation.
+ </li>
+ <li>
+ The return value can be consumed by (exactly) the first instruction
+ following the invoke-kind or invoke-kind/range instruction that caused
+ this method invocation, and this instructions needs to be a
+ move-result-object instruction.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-12-const.html b/docs/opcodes/opcode-12-const.html
new file mode 100644
index 0000000..b2d894f
--- /dev/null
+++ b/docs/opcodes/opcode-12-const.html
@@ -0,0 +1,102 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>const</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>const</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move the given literal value (sign-extended to 32 bits, if necessary) into the
+specified register.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>12 11n</td>
+ <td>const/4 vA, #+B</td>
+ <td><code>A:</code> destination register (4 bits)<br/>
+ <code>B:</code> signed int (4 bits)</td>
+</tr>
+<tr>
+ <td>13 21s</td>
+ <td>const/16 vAA, #+BBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> signed int (16 bits)</td>
+</tr>
+<tr>
+ <td>14 31i</td>
+ <td>const vAA, #+BBBBBBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> arbitrary 32-bit constant</td>
+</tr>
+<tr>
+ <td>15 21h</td>
+ <td>const/high16 vAA, #+BBBB0000</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> signed int (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stackframe.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ First, an adjusted value B' is determined as follows:
+ <ul>
+ <li>
+ If we are executing the /high16 variant, then B is left-shifted by 16
+ bits, that is, B'=B << 0x10
+ <li>
+ Otherwise, if B is a 4 bit or 16 bit constant, it is sign-extended to 32
+ bits, that is, B'=sign-extended(B).
+ </li>
+ <li>
+ Otherwise, B'=B.
+ </li>
+ </ul>
+ <li>
+ Then, the adjusted value B' is moved into the register A, that is, vA'=B'
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ If v(A+1) is the upper half of a register pair, v(A+1)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-16-const-wide.html b/docs/opcodes/opcode-16-const-wide.html
new file mode 100644
index 0000000..ac92b04
--- /dev/null
+++ b/docs/opcodes/opcode-16-const-wide.html
@@ -0,0 +1,110 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>const-wide</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>const-wide</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move the given literal value (sign-extended to 64 bits) into the specified
+register-pair.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>16 21s</td>
+ <td>const-wide/16 vAA, #+BBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> signed int (16 bits)</td>
+</tr>
+<tr>
+ <td>17 31i</td>
+ <td>const-wide/32 vAA, #+BBBBBBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> signed int (32 bits)</td>
+</tr>
+<tr>
+ <td>18 51l</td>
+ <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> arbitrary double-width (64-bit) constant</td>
+</tr>
+<tr>
+ <td>19 21h</td>
+ <td>const-wide/high16 vAA, #+BBBB000000000000</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> signed int (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ First, an adjusted value B' is determined as follows:
+ <ul>
+ <li>
+ If we are executing the /high16 variant, then B is left-shifted by 40
+ bits, that is, B'=B << 0x28
+ <li>
+ Otherwise, if B is a 16 bit or 32 bit constant, it is sign-extended to
+ 64 bits, that is, B'=sign-extended(B).
+ </li>
+ <li>
+ Otherwise, B'=B.
+ </li>
+ </ul>
+ <li>
+ The immediate value B is moved into the register pair (vA, v(A+1)), that is,
+ <ul>
+ <li>
+ vA' = B << 0x20
+ </li>
+ <li>
+ v(A+1)' = B & 0xffffffff
+ </li>
+ </ul>
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ If v(A+2) is the upper half of a register pair, v(A+2)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-1a-const-string.html b/docs/opcodes/opcode-1a-const-string.html
new file mode 100644
index 0000000..bd89b70
--- /dev/null
+++ b/docs/opcodes/opcode-1a-const-string.html
@@ -0,0 +1,85 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>const-string</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>const-string</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move a reference to the string specified by the given index into the specified
+register.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>1a 21c</td>
+ <td>const-string vAA, string@BBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> string index</td>
+</tr>
+<tr>
+ <td>1b 31c</td>
+ <td>const-string/jumbo vAA, string@BBBBBBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> string index</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ B must be a valid index into the string constant pool.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ A new java.lang.String object S is allocated on the heap and filled with the
+ contents of string pool entry B.
+ </li>
+ <li>
+ A reference to an internalized version of the new object is moved into
+ register vA, that is, the instruction behaves as if vA' = S.intern() was
+ called.
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ If v(A+1) is the upper half of a register pair, v(A+1)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-1b-const-class.html b/docs/opcodes/opcode-1b-const-class.html
new file mode 100644
index 0000000..7a33e77
--- /dev/null
+++ b/docs/opcodes/opcode-1b-const-class.html
@@ -0,0 +1,92 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>const-class</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>const-class</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Move a reference to the class specified by the given index into the specified
+register. In the case where the indicated type is primitive, this will store a
+reference to the primitive type's degenerate class.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>1c 21c</td>
+ <td>const-class vAA, type@BBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> type index</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ B must be a valid index into the type constant pool.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made to get a reference to the class C the name of which is
+ contained in type pool entry B.
+ </li>
+ <li>
+ If B refers to a primitive type, the corresponding degenerate class is used
+ instead.
+ </li>
+ <li>
+ If C has not been loaded and resolved before, it is being loaded and
+ resolved. All exceptions that are possible during class loading can occur at
+ this point.
+ </li>
+ <li>
+ A reference to C is moved into register vA, that is, vA' = C.
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ If v(A+1) is the upper half of a register pair, v(A+1)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ ClassNotFoundException is thrown if the class does not exist at all.
+ </li>
+ <li>
+ VerifyError is thrown if the class does exist, but could not be verified.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-1d-monitor-enter.html b/docs/opcodes/opcode-1d-monitor-enter.html
new file mode 100644
index 0000000..cecc939
--- /dev/null
+++ b/docs/opcodes/opcode-1d-monitor-enter.html
@@ -0,0 +1,93 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>monitor-enter</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>monitor-enter</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Acquire the monitor for the indicated object.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>1d 11x</td>
+ <td>monitor-enter vAA</td>
+ <td><code>A:</code> reference-bearing register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index for the current stack frame.
+ </li>
+ <li>
+ Register vA must contain a reference to an object.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made for the current thread to acquire the monitor of the
+ indicated object. Various results are possible:
+ <ul>
+ <li>
+ If the monitor is not owned by any thread at this point, then the
+ current thread becomes owner of the monitor. The entry count of the
+ indicated object is set to 1.
+ </li>
+ <li>
+ Otherwise, if the monitor is owned by the same thread that attempts the
+ acquiration, then the entry count of the indicated object is increased
+ by 1.
+ </li>
+ <li>
+ Otherwise the monitor is owned by a different thread. The current thread
+ sleeps until the monitor of the object is released. Once that happens, a
+ new attempt to acquire the monitor is made, as described here. There is
+ no guarantee that the second attempt (or any subsequent attempt) will be
+ successful.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if vA is null.
+ </li>
+ <li>
+ IllegalMonitorStateException if the entry count exceeds an
+ (implementation-dependent) upper bound for recursive monitor entries. Note
+ that it is unlikely this bound is ever hit, since for most implementations
+ the call stack will overflow before.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-1e-monitor-exit.html b/docs/opcodes/opcode-1e-monitor-exit.html
new file mode 100644
index 0000000..bee711d
--- /dev/null
+++ b/docs/opcodes/opcode-1e-monitor-exit.html
@@ -0,0 +1,101 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>monitor-exit</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>monitor-exit</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Release the monitor for the indicated object.
+</p>
+<p>
+Note: If this instruction needs to throw an exception, it must do so as if the
+pc has already advanced past the instruction. It may be useful to think of this
+as the instruction successfully executing (in a sense), and the exception
+getting thrown after the instruction but before the next one gets a chance to
+run. This definition makes it possible for a method to use a monitor cleanup
+catch-all (e.g., finally) block as the monitor cleanup for that block itself,
+as a way to handle the arbitrary exceptions that might get thrown due to the
+historical implementation of Thread.stop(), while still managing to have proper
+monitor hygiene.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>1e 11x</td>
+ <td>monitor-exit vAA</td>
+ <td><code>A:</code> reference-bearing register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index for the current stack frame.
+ </li>
+ <li>
+ Register vA must contain a reference to an object.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made for the current thread to release the monitor of the
+ indicated object.
+ </li>
+ <li>
+ If the current thread is the owner, the following happens:
+ <ul>
+ <li>
+ The monitor's entry count is decreased by one.
+ </li>
+ <li>
+ If the entry count has reached zero, the monitor is released. Other
+ threads waiting for the same monitor have a chance to acquire it.
+ </li>
+ </ul>
+ </li>
+ <li>
+ Any exception that gets thrown by this instruction bears the PC of the
+ instruction following the monitor-exit. That is, from the point of view of
+ an exception handler it cannot be distinguished from the same type of
+ exception being thrown immediately after the monitor-exit instruction.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException is thrown if vA is null.
+ </li>
+ <li>
+ IllegalMonitorStateException is thrown if the current thread is not the
+ owner of that monitor.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-1f-check-cast.html b/docs/opcodes/opcode-1f-check-cast.html
new file mode 100644
index 0000000..6325ca4
--- /dev/null
+++ b/docs/opcodes/opcode-1f-check-cast.html
@@ -0,0 +1,95 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>check-cast</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>check-cast</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Throw if the reference in the given register cannot be cast to the indicated
+type. The type must be a reference type (not a primitive type).
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>1f 21c</td>
+ <td>check-cast vAA, type@BBBB</td>
+ <td><code>A:</code> reference-bearing register (8 bits)<br/>
+ <code>B:</code> type index (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ Register vA must contain a reference value.
+ </li>
+ <li>
+ B must be a valid index into the type pool.
+ </li>
+ <li>
+ Type pool entry B must contain a valid type descriptor for a reference type.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made to get a reference to the class C the name of which is
+ contained in type pool entry B.
+ </li>
+ <li>
+ If C has not been loaded and resolved before, it is being loaded and
+ resolved. All exceptions that are possible during class loading can occur at
+ this point.
+ </li>
+ <li>
+ The run-time type of the object reference vA is compared against C.
+ <ul>
+ <li>
+ If vA is null, the instruction succeeds (without further effects).
+ </li>
+ <li>
+ If vA is assignment compatible with C according to the usual rules of
+ the Java programming language, the instruction succeeds (without further
+ effects).
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ ClassCastException is thrown if vA is either not null or not assignment
+ compatible with C.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-20-instance-of.html b/docs/opcodes/opcode-20-instance-of.html
new file mode 100644
index 0000000..5dbfef7
--- /dev/null
+++ b/docs/opcodes/opcode-20-instance-of.html
@@ -0,0 +1,100 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>instance-of</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>instance-of</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Store in the given destination register 1 if the indicated reference is an
+instance of the given type, or 0 if not. The type must be a reference type (not
+a primitive type).
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>20 22c</td>
+ <td>instance-of vA, vB, type@CCCC</td>
+ <td><code>A:</code> destination register (4 bits)<br/>
+ <code>B:</code> reference-bearing register (4 bits)<br/>
+ <code>C:</code> type index (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A and B must be a valid register indices for the current stack frame.
+ </li>
+ <li>
+ Register vB must contain a reference value.
+ </li>
+ <li>
+ C must be a valid index into the type constant pool.
+ </li>
+ <li>
+ Type constant pool entry C must contain a valid type descriptor for a
+ reference type.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made to get a reference to the class K the name of which is
+ contained in type pool entry C.
+ </li>
+ <li>
+ If K has not been loaded and resolved before, it is being loaded and
+ resolved. All exceptions that are possible during class loading can occur at
+ this point.
+ </li>
+ <li>
+ The run-time type of the object reference vB is compared against K. The
+ register vA reflects the result:
+ <ul>
+ <li>
+ vA' = 1 if (and only if) vB is not null and vB is assignment compatible
+ with K according to the usual rules of the Java programming language.
+ </li>
+ <li>
+ vA' = 0 otherwise
+ </li>
+ </ul>
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ If v(A+1) is the upper half of a register pair, v(A+1)' becomes undefined.
+ </li>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-21-array-length.html b/docs/opcodes/opcode-21-array-length.html
new file mode 100644
index 0000000..5767742
--- /dev/null
+++ b/docs/opcodes/opcode-21-array-length.html
@@ -0,0 +1,78 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>array-length</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>array-length</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Store in the given destination register the length of the indicated array,
+in entries.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>21 12x</td>
+ <td>array-length vA, vB</td>
+ <td><code>A:</code> destination register (4 bits)<br/>
+ <code>B:</code> array reference-bearing register (4 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A and B must be valid register indices for the current stack frame.
+ </li>
+ <li>
+ Register vB must contain a reference to an array.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The length of the array referenced by vB is stored in vA, that is
+ vA' = length(vB).
+ </li>
+ <li>
+ If register v(A-1) is the lower half of a register pair, register v(A-1)'
+ becomes undefined.
+ </li>
+ <li>
+ If register v(A+1) is the upper half of a register pair, register v(A+1)'
+ becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException is thrown if the value of register vB is null.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-22-new-instance.html b/docs/opcodes/opcode-22-new-instance.html
new file mode 100644
index 0000000..ec0a347
--- /dev/null
+++ b/docs/opcodes/opcode-22-new-instance.html
@@ -0,0 +1,95 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>new-instance</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>new-instance</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Construct a new instance of the indicated type, storing a reference to it in the
+destination. The type must refer to a non-array class.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>22 21c</td>
+ <td>new-instance vAA, type@BBBB</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> type index</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index for the current stack frame.
+ </li>
+ <li>
+ B must be a valid index into the type pool.
+ </li>
+ <li>
+ Type constant pool entry B must contain a valid type descriptor for a
+ non-array class.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made to get a reference to the class C the name of which is
+ contained in type pool entry B.
+ </li>
+ <li>
+ If C has not been loaded and resolved before, it is being loaded and
+ resolved. All exceptions that are possible during class loading can occur at
+ this point.
+ </li>
+ <li>
+ An attempt is made to create a new instance I of C. All exceptions that are
+ possible during instantiation can occur at this point.
+ </li>
+ <li>
+ A reference to the new instance is stored in register vA, that is vA' = I.
+ </li>
+ <li>
+ If v(A-1) is the lower part of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ If v(A+1) is the upper part of a register pair, v(A+1)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ All exceptions that are possible during class loading can occur.
+ </li>
+ <li>
+ All exceptions that are possible during instantiation can occur.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-23-new-array.html b/docs/opcodes/opcode-23-new-array.html
new file mode 100644
index 0000000..be46a49
--- /dev/null
+++ b/docs/opcodes/opcode-23-new-array.html
@@ -0,0 +1,108 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>new-array</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>new-array</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Construct a new array of the indicated type and size. The type must be an array
+type.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>23 22c</td>
+ <td>new-array vA, vB, type@CCCC</td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> size register<br/>
+ <code>C:</code> type index</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A and B must be valid register indices for the current stack frame.
+ </li>
+ <li>
+ Register vB must not contain a reference value.
+ </li>
+ <li>
+ Register vB must not be part of a register pair.
+ </li>
+ <li>
+ C must be a valid index into the type pool.
+ </li>
+ <li>
+ Type constant pool entry C must contain a valid array type descriptor.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made to get a reference to the class K the name of which is
+ contained in type pool entry C.
+ </li>
+ <li>
+ If K has not been loaded and resolved before, it is being loaded and
+ resolved. All exceptions that are possible during class loading can occur at
+ this point.
+ </li>
+ <li>
+ An attempt is made to create a new instance I of K and length B. All
+ exceptions that are possible during instantiation can occur at this point.
+ </li>
+ <li>
+ All elements of the new array are initialized to null (for object arrays) or
+ 0 (for numeric arrays) or false (for boolean arrays).
+ </li>
+ <li>
+ A reference to the new array is moved to register vA, that is, vA' = I.
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ If v(A+1) is the upper half of a register pair, v(A+1)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NegativeArraySizeException if vB < 0
+ </li>
+ <li>
+ All exceptions that are possible during class loading can occur.
+ </li>
+ <li>
+ All exceptions that are possible during instantiation can occur.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-24-filled-new-array.html b/docs/opcodes/opcode-24-filled-new-array.html
new file mode 100644
index 0000000..cba0c5d
--- /dev/null
+++ b/docs/opcodes/opcode-24-filled-new-array.html
@@ -0,0 +1,144 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>filled-new-array</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>filled-new-array</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Construct an array of the given type and size, filling it with the supplied
+contents. The type must be an array type. The array's contents must be
+single-word (that is, no arrays of long or double). The constructed instance is
+stored as a "result" in the same way that the method invocation instructions
+store their results, so the constructed instance must be moved to a register
+with a subsequent move-result-object instruction (if it is to be used).
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>24 35c</td>
+ <td>filled-new-array {vD, vE, vF, vG, vA}, type@CCCC</td>
+ <td><code>B:</code> array size and argument word count (4 bits)<br/>
+ <code>C:</code> type index (16 bits)<br/>
+ <code>D..G, A:</code> argument registers (4 bits each)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ The value B must not be greater than 5.
+ </li>
+ <li>
+ If B > 0, then D must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ If B > 1, then E must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ If B > 2, then F must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ If B > 3, then G must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ If B > 4, then A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ C must be a valid index into the type pool.
+ </li>
+ <li>
+ The type denoted by C must be a valid array type descriptor.
+ </li>
+ <li>
+ The element size of the type denoted by C must be no larger than 32 bits.
+ </li>
+ <li>
+ If the element type is a primitive type, then all actual arguments
+ (vD .. vA, depending on B) must be primitive, too.
+ </li>
+ <li>
+ If the element type is a reference type, then all actual arguments
+ (vD .. vA, depending on B) must be references, too.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made to get a reference to the type T the name of which is
+ contained in type pool entry C.
+ </li>
+ <li>
+ If T is a reference type and it has not been loaded and resolved before, it
+ is being loaded and resolved. All exceptions that are possible during class
+ loading can occur at this point.
+ </li>
+ <li>
+ An attempt is made to create a new array R of type T and length B. All
+ exceptions that are possible during instantiation can occur at this point.
+ </li>
+ <li>
+ The elements of R are filled according to the following rules:
+ <ul>
+ <li>
+ If B > 0 then R[0] = vD
+ </li>
+ <li>
+ If B > 1 then R[1] = vE
+ </li>
+ <li>
+ If B > 2 then R[2] = vF
+ </li>
+ <li>
+ If B > 3 then R[3] = vG
+ </li>
+ <li>
+ If B > 4 then R[4] = vA
+ </li>
+ </ul>
+ </li>
+ <li>
+ No reference to R is stored in any register. Instead, R can be accessed by a
+ move-result-object instruction immediately following this filled-new-array
+ instruction.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NegativeArraySizeException if vB < 0
+ </li>
+ <li>
+ All exceptions that are possible during class loading can occur.
+ </li>
+ <li>
+ All exceptions that are possible during instantiation can occur.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-25-filled-new-array-range.html b/docs/opcodes/opcode-25-filled-new-array-range.html
new file mode 100644
index 0000000..944a8b1
--- /dev/null
+++ b/docs/opcodes/opcode-25-filled-new-array-range.html
@@ -0,0 +1,125 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>filled-new-array/range</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>filled-new-array/range</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Construct an array of the given type and size, filling it with the supplied
+contents. Clarifications and restrictions are the same as filled-new-array,
+described above.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>25 3rc</td>
+ <td>filled-new-array/range {vCCCC .. vNNNN}, type@BBBB</td>
+ <td><code>A:</code> array size and argument word count (8 bits)<br/>
+ <code>B:</code> type index (16 bits)<br/>
+ <code>C:</code> first argument register (16 bits)<br/>
+ <code>N = A + C - 1</code></td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ vN must be a valid register index in the current stack frame (this means
+ everything below vN is valid, too).
+ </li>
+ <li>
+ For all values I in the interval [C .. N] the following must hold:
+ <ul>
+ <li>
+ vI must not be part of a register pair
+ </li>
+ <li>
+ If the array type is a simple type, vI must be a simple type, too.
+ </li>
+ <li>
+ If the array type is a reference type, vI must be a reference type, too.
+ </li>
+ </ul>
+ </li>
+ <li>
+ B must be a valid index into the type pool.
+ </li>
+ <li>
+ The type denoted by B must be an array type.
+ </li>
+ <li>
+ The element size of the type denoted by B must be no larger than 32 bits.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ An attempt is made to get a reference to the type T the name of which is
+ contained in type pool entry B.
+ </li>
+ <li>
+ If T has not been loaded and resolved before, it is being loaded and
+ resolved. All exceptions that are possible during class loading can occur at
+ this point.
+ </li>
+ <li>
+ An attempt is made to create a new instance J of type T and length vA. All
+ exceptions that are possible during instantiation can occur at this point.
+ </li>
+ <li>
+ The elements of R are filled according to the following rules:
+ <ul>
+ <li>
+ J[0] = vC
+ </li>
+ <li>
+ J[1] = v(C+1)
+ </li>
+ <li>
+ ...
+ </li>
+ <li>
+ J[vA] = vN
+ </li>
+ </ul>
+ </li>
+ <li>
+ No reference to J is stored in any register. Instead, J can be accessed by a
+ move-result-object instruction immediately following this filled-new-array
+ instruction.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NegativeArraySizeException if vA < 0
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-26-fill-array-data.html b/docs/opcodes/opcode-26-fill-array-data.html
new file mode 100644
index 0000000..c5040a5
--- /dev/null
+++ b/docs/opcodes/opcode-26-fill-array-data.html
@@ -0,0 +1,96 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>fill-array-data</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>fill-array-data</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Fill the given array with the indicated data. The reference must be to an array
+of primitives, and the data table must match it in type and size.
+</p>
+<p>
+Note: The address of the table is guaranteed to be even (that is, 4-byte
+aligned). If the code size of the method is otherwise odd, then an extra code
+unit is inserted between the main code and the table whose value is the same as
+a nop.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+ <td>26 31t</td>
+ <td>fill-array-data vAA, +BBBBBBBB <i>(with supplemental data as specified
+ below in "<code>fill-array-data</code> Format")</i></td>
+ <td><code>A:</code> array reference (8 bits)<br/>
+ <code>B:</code> signed "branch" offset to table data (32 bits)</td>
+ </td>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ vA must be a reference-bearing register (according to data flow) and contain
+ an array-reference.
+ </li>
+ <li>
+ B must be branch offset in the same method.
+ </li>
+ <li>
+ The target address (PC+B) must be 4-byte aligned.
+ </li>
+ <li>
+ The target address must hold the pseudo-opcode 0x300.
+ </li>
+ <li>
+ The table entry size must match the size of the data type of the array.
+ </li>
+ <li>
+ The table size must be equal or smaller than the array length.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The contents of the array referenced by vA are filled with the table data,
+ starting from array index 0 and in the given order.
+ </li>
+ <li>
+ If there are less elements in the table than the array provides space for,
+ the remaining array elements stay untouched.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if vA is null.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-27-throw.html b/docs/opcodes/opcode-27-throw.html
new file mode 100644
index 0000000..f4416ce
--- /dev/null
+++ b/docs/opcodes/opcode-27-throw.html
@@ -0,0 +1,80 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>throw</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>throw</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Throw the indicated exception.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>27 11x</td>
+ <td>throw vAA</td>
+ <td><code>A:</code> exception-bearing register (8 bits)<br/></td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ Register vA must be a reference-bearing register
+ </li>
+ <li>
+ Register vA must be assignment-compatible with java.lang.Throwable according
+ to the usual rules of the Java programming language.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ Throws the given exception vA, resulting in a search for a matching handler
+ according to the usual rules of the Java programming language.
+ </li>
+ <li>
+ If no matching handler is found for the current thread, the thread
+ terminates, possibly notifying its uncaught exception handler or thread
+ group before.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if vA is null.
+ </li>
+ <li>
+ Otherwise, the indicated exception.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-28-goto.html b/docs/opcodes/opcode-28-goto.html
new file mode 100644
index 0000000..5ca92b6
--- /dev/null
+++ b/docs/opcodes/opcode-28-goto.html
@@ -0,0 +1,73 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>goto</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>goto</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Unconditionally jump to the indicated instruction.
+</p>
+<p>
+Note: The branch offset may not be 0. (A spin loop may be legally constructed
+either with goto/32 or by including a nop as a target before the branch.)
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>28 10t</td>
+ <td>goto +AA</td>
+ <td><code>A:</code> signed branch offset (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must point to a valid bytecode instruction inside the current method.
+ </li>
+ <li>
+ A must not be 0.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The (otherwise invisible) program counter PC is set to the address of the
+ instruction plus the given offset, that is, PC' = PC(goto) + A.
+ </li>
+ <li>
+ Executions resumes at PC'.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-29-goto-16.html b/docs/opcodes/opcode-29-goto-16.html
new file mode 100644
index 0000000..abe4aec
--- /dev/null
+++ b/docs/opcodes/opcode-29-goto-16.html
@@ -0,0 +1,73 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>goto/16</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>goto/16</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Unconditionally jump to the indicated instruction.
+</p>
+<p>
+Note: The branch offset may not be 0. (A spin loop may be legally constructed
+either with goto/32 or by including a nop as a target before the branch.)
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>29 20t</td>
+ <td>goto/16 +AAAA</td>
+ <td><code>A:</code> signed branch offset (16 bits)<br/></td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must point to a valid bytecode instruction inside the current method.
+ </li>
+ <li>
+ A must not be 0.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The (otherwise invisible) program counter PC is set to the address of the
+ instruction plus the given offset, that is, PC' = PC(goto) + A.
+ </li>
+ <li>
+ Executions resumes at PC'.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-2a-goto-32.html b/docs/opcodes/opcode-2a-goto-32.html
new file mode 100644
index 0000000..7d64ac9
--- /dev/null
+++ b/docs/opcodes/opcode-2a-goto-32.html
@@ -0,0 +1,66 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>goto/32</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>goto/32</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Unconditionally jump to the indicated instruction.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>2a 30t</td>
+ <td>goto/32 +AAAAAAAA</td>
+ <td><code>A:</code> signed branch offset (32 bits)<br/></td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must point to a valid bytecode instruction inside the current method.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The (otherwise invisible) program counter PC is set to the address of the
+ instruction plus the given offset, that is, PC' = PC(goto) + A.
+ </li>
+ <li>
+ Executions resumes at PC'.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-2b-packed-switch.html b/docs/opcodes/opcode-2b-packed-switch.html
new file mode 100644
index 0000000..73125bd
--- /dev/null
+++ b/docs/opcodes/opcode-2b-packed-switch.html
@@ -0,0 +1,103 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>packed-switch</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>packed-switch</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Jump to a new instruction based on the value in the given register, using a
+table of offsets corresponding to each value in a particular integral range, or
+fall through to the next instruction if there is no match.
+</p>
+<p>
+Note: The address of the table is guaranteed to be even (that is, 4-byte
+aligned). If the code size of the method is otherwise odd, then an extra code
+unit is inserted between the main code and the table whose value is the same as
+a nop.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>2b 31t</td>
+ <td>packed-switch vAA, +BBBBBBBB <i>(with supplemental data as
+ specified below in "<code>packed-switch</code> Format")</i></td>
+ <td><code>A:</code> register to test<br/>
+ <code>B:</code> signed "branch" offset to table data (32 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ Let PC be the address of the packed-switch instruction in the code array of
+ the current method. Then T = PC + B with the following properties:
+ <ul>
+ <li>
+ T must be 4-byte-aligned.
+ </li
+ <li>
+ T must be in the same method.
+ </li>
+ <li>
+ T must point to a packed-switch data table.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The value of vA is used as an index into the given table data.
+ </li>
+ <li>
+ If vA is in the range of the table, that is, if vA >= table.first_key and
+ vA < first_key + size, then the jump target is determined as follows:
+ <ul>
+ <li>
+ PC' = PC + table.targets[vA - table.firstKey].
+ </li>
+ <li>
+ Execution resumes at this address.
+ </li>
+ </ul>
+ </li>
+ <li>
+ Otherwise execution continues at the instruction following the packed-switch
+ statement.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-2c-sparse-switch.html b/docs/opcodes/opcode-2c-sparse-switch.html
new file mode 100644
index 0000000..cec581e
--- /dev/null
+++ b/docs/opcodes/opcode-2c-sparse-switch.html
@@ -0,0 +1,110 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>sparse-switch</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>sparse-switch</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Jump to a new instruction based on the value in the given register, using an
+ordered table of value-offset pairs, or fall through to the next instruction if
+there is no match.
+</p>
+<p>
+Note: The address of the table is guaranteed to be even (that is, 4-byte
+aligned). If the code size of the method is otherwise odd, then an extra code
+unit is inserted between the main code and the table whose value is the same as
+a nop.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>2c 31t</td>
+ <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as
+ specified below in "<code>sparse-switch</code> Format")</i></td>
+ <td><code>A:</code> register to test<br/>
+ <code>B:</code> signed "branch" offset to table data (32 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stack frame.
+ </li>
+ <li>
+ Let PC be the address of the packed-switch instruction in the code array of
+ the current method. Then T = PC + B with the following properties:
+ <ul>
+ <li>
+ T must be 4-byte-aligned.
+ </li>
+ <li>
+ T must be in the same method.
+ </li>
+ <li>
+ T must point to a sparse-switch data table.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The value of vA is used as a lookup key inside the sparse table data.
+ </li>
+ <li>
+ If there exists an I with 0 <= I < table.size such that table.keys[I] = vA,
+ then the jump target is determined as follows:
+ <ul>
+ <li>
+ PC' = PC + table.targets[I].
+ </li>
+ <li>
+ Execution will resume at this address.
+ </li>
+ </ul>
+ </li>
+ <li>
+ Otherwise execution continues at the instruction following the sparse-switch
+ statement.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+<h2>Notes</h2>
+
+<p>
+The low-to-high ordering of the keys allows the VM to employ binary search for
+the lookup, resulting in O(log table.size) comparisons.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-2d-cmp-kind.html b/docs/opcodes/opcode-2d-cmp-kind.html
new file mode 100644
index 0000000..431ccd4
--- /dev/null
+++ b/docs/opcodes/opcode-2d-cmp-kind.html
@@ -0,0 +1,121 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>cmp<kind></title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>cmp<kind></h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the indicated floating point or long comparison, storing 0 if the two
+arguments are equal, 1 if the second argument is larger, or -1 if the first
+argument is larger. The "bias" listed for the floating point operations
+indicates how NaN comparisons are treated: "Gt bias" instructions return 1 for
+NaN comparisons, and "lt bias" instructions return -1.
+</p>
+<p>
+For example, to check to see if floating point a < b, then it is advisable to
+use cmpg-float; a result of -1 indicates that the test was true, and the other
+values indicate it was false either due to a valid comparison or because one
+or the other values was NaN.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>2d..31 23x</td>
+ <td>cmp<i>kind</i> vAA, vBB, vCC<br/>
+ 2d: cmpl-float <i>(lt bias)</i><br/>
+ 2e: cmpg-float <i>(gt bias)</i><br/>
+ 2f: cmpl-double <i>(lt bias)</i><br/>
+ 30: cmpg-double <i>(gt bias)</i><br/>
+ 31: cmp-long
+ </td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> first source register or pair<br/>
+ <code>C:</code> second source register or pair</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A, B and C must be valid register indices in the current stack frame.
+ </li>
+ <li>
+ For the two -float variants, both vB and vC must be of type float.
+ </li>
+ <li>
+ For the two -double variants, both vB and vC must be the lower part of a
+ register pair holding a double value.
+ </li>
+ <li>
+ For the -long variant, both both vB and vC must be the lower part of a
+ register pair holding a long value.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The values of registers vB and vC are compared. The result, which is stored
+ in vA, is one of the following three:
+ <ul>
+ <li>
+ If vB < vC, then vA'=-1.
+ </li>
+ <li>
+ If vB == vC, then vA'=0.
+ </li>
+ <li>
+ If vC > vC, then vA'=1.
+ </li>
+ </ul>
+ </li>
+ <li>
+ For the -float and -double variants, an addition "bias" specifies what
+ happens if one or both of the arguments are NaN:
+ <ul>
+ <li>
+ A "lt bias" results in vA'=-1.
+ </li>
+ <li>
+ A "gt bias" results in vA'=1.
+ </li>
+ </ul>
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ If v(A+1) is the upper half of a register pair, v(A+1)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-32-if-test.html b/docs/opcodes/opcode-32-if-test.html
new file mode 100644
index 0000000..af0adb2
--- /dev/null
+++ b/docs/opcodes/opcode-32-if-test.html
@@ -0,0 +1,101 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>if-test</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>if-test</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Branch to the given destination if the given two registers' values compare as
+specified.
+</p>
+<p>
+Note: The branch offset may not be 0. (A spin loop may be legally constructed
+either by branching around a backward goto or by including a nop as a target
+before the branch.)
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>32..37 22t</td>
+ <td>if-<i>test</i> vA, vB, +CCCC<br/>
+ 32: if-eq<br/>
+ 33: if-ne<br/>
+ 34: if-lt<br/>
+ 35: if-ge<br/>
+ 36: if-gt<br/>
+ 37: if-le<br/>
+ </td>
+ <td><code>A:</code> first register to test (4 bits)<br/>
+ <code>B:</code> second register to test (4 bits)<br/>
+ <code>C:</code> signed branch offset (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A and B must be valid register indices for the current stack frame.
+ </li>
+ <li>
+ Registers vA and vB must not contain a reference value.
+ </li>
+ <li>
+ Registers vA and vB must not be part of a register pair.
+ </li>
+ <li>
+ Registers vA and vB must not contain a floating point value (???).
+ </li>
+ C must of a signed offset that, when added to the PC of the instruction,
+ points to a valid bytecode instruction inside the same method.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The values of registers vA and vB are compared according to the <test>
+ condition. Two results are possible:
+ <ul>
+ <li>
+ The condition holds. The value of C is used as a signed offset to the
+ address of the if-<test> instruction. Execution continues at the
+ resulting address.
+ </li>
+ <li>
+ The condition does not hold. Execution continues at the instruction
+ following the if-<test> instruction.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-38-if-testz.html b/docs/opcodes/opcode-38-if-testz.html
new file mode 100644
index 0000000..354e894
--- /dev/null
+++ b/docs/opcodes/opcode-38-if-testz.html
@@ -0,0 +1,100 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>if-<test>z</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>if-<test>z</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Branch to the given destination if the given register's value compares with 0
+as specified.
+</p>
+<p>
+ Note: The branch offset may not be 0. (A spin loop may be legally constructed
+ either by branching around a backward goto or by including a nop as a target
+ before the branch.)
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>38..3d 21t</td>
+ <td>if-<i>test</i>z vAA, +BBBB<br/>
+ 38: if-eqz<br/>
+ 39: if-nez<br/>
+ 3a: if-ltz<br/>
+ 3b: if-gez<br/>
+ 3c: if-gtz<br/>
+ 3d: if-lez<br/>
+ </td>
+ <td><code>A:</code> register to test (8 bits)<br/>
+ <code>B:</code> signed branch offset (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index for the current stackframe.
+ </li>
+ <li>
+ Register vA must not contain a reference value.
+ </li>
+ <li>
+ Register vA must not be part of a register pair.
+ </li>
+ <li>
+ Register vA must not contain a floating point value (???).
+ </li>
+ <li>
+ B must not be 0.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The value of register vA is compared to zero according to the <test>
+ condition. Two results are possible:
+ <ul>
+ <li>
+ The condition holds. The value of B is used as a signed offset to the
+ address of the if-<test>z instruction. Execution continues at the
+ resulting address.
+ </li>
+ <li>
+ The condition does not hold. Execution continues at the instruction
+ following the if-<test>z instruction.
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<p>
+None.
+</p>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-44-aget.html b/docs/opcodes/opcode-44-aget.html
new file mode 100644
index 0000000..b9d6f23
--- /dev/null
+++ b/docs/opcodes/opcode-44-aget.html
@@ -0,0 +1,113 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>aget<kind></title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>aget<kind></h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the identified array operation at the identified index of the given
+array, storing into the value register.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>44..51 23x</td>
+ <td><i>arrayop</i> vAA, vBB, vCC<br/>
+ 44: aget<br/>
+ 45: aget-wide<br/>
+ 46: aget-object<br/>
+ 47: aget-boolean<br/>
+ 48: aget-byte<br/>
+ 49: aget-char<br/>
+ 4a: aget-short<br/>
+ </td>
+ <td><code>A:</code> dest value register or pair; (8 bits)<br/>
+ <code>B:</code> array register (8 bits)<br/>
+ <code>C:</code> index register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A, B and C must be valid register indices in the current stackframe.
+ </li>
+ <li>
+ For the aget-wide variant, also A+1 must be a valid register index in the
+ current stackframe.
+ </li>
+ <li>
+ Register vB must contain an array reference. The component type of the
+ array must match the variant of the instruction.
+ </li>
+ <li>
+ Register vC must contain an integer value.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ For all but the -wide variant, the array element at the given index is moved
+ into register vA, that is, vA'=array[index].
+ </li>
+ <li>
+ For the -wide variant, the array element at the given index is moved into
+ registers vA and v(A+1) as follows:
+ <ul>
+ <li>
+ vA'=array[index] >> 0x20
+ </li>
+ <li>
+ v(A+1)'=array[index] & 0xffffffff;
+ </li>
+ </ul>
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ For all but the -wide variant, if v(A+1) is the upper half of a register
+ pair, v(A+1)' becomes undefined.
+ </li>
+ <li>
+ For the -wide variant, if v(A+2) is the upper half of a register pair,
+ v(A+2)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if vB=null.
+ </li>
+ <li>
+ ArrayIndexOutOfBoundsException if vC < 0 or vC >= array.length.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-4b-aput.html b/docs/opcodes/opcode-4b-aput.html
new file mode 100644
index 0000000..089c1ca
--- /dev/null
+++ b/docs/opcodes/opcode-4b-aput.html
@@ -0,0 +1,98 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>aput<kind></title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>aput<kind></h1>
+
+<h2>Purpose</h2>
+
+<p>
+Waste cycles.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>4b..51 23x</td>
+ <td><i>arrayop</i> vAA, vBB, vCC<br/>
+ 4b: aput<br/>
+ 4c: aput-wide<br/>
+ 4d: aput-object<br/>
+ 4e: aput-boolean<br/>
+ 4f: aput-byte<br/>
+ 50: aput-char<br/>
+ 51: aput-short
+ </td>
+ <td><code>A:</code> source value register or pair; (8 bits)<br/>
+ <code>B:</code> array register (8 bits)<br/>
+ <code>C:</code> index register (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A, B and C must be valid register indices in the current stack frame.
+ </li>
+ <li>
+ For the aget-wide variant, also A+1 must be a valid register index in the
+ current stack frame.
+ </li>
+ <li>
+ Register vB must contain an array reference. The component type of the array
+ must match the variant of the instruction.
+ </li>
+ <li>
+ Register vC must contain an integer value.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ For all but the -wide variant, the value of register vA is move into the
+ array element at the given index, that is, array[index]'=vA.
+ </li>
+ <li>
+ For the -wide variant, the registers vA and v(A+1) are moved into the array
+ element at the given index as follows:
+ <ul>
+ <li>
+ array[index]' = vA << 0x20 | v(A+1)
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if vB=null.
+ </li>
+ <li>
+ ArrayIndexOutOfBoundsException if vC < 0 or vC >= array.length.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-52-iget.html b/docs/opcodes/opcode-52-iget.html
new file mode 100644
index 0000000..837b511
--- /dev/null
+++ b/docs/opcodes/opcode-52-iget.html
@@ -0,0 +1,109 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>iget<kind></title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>iget<kind></h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the identified object instance field operation with the identified
+field, loading or storing into the value register.
+</p>
+<p>
+Note: These opcodes are reasonable candidates for static linking, altering the
+field argument to be a more direct offset.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>52..58 22c</td>
+ <td>i<i>instanceop</i> vA, vB, field@CCCC<br/>
+ 52: iget<br/>
+ 53: iget-wide<br/>
+ 54: iget-object<br/>
+ 55: iget-boolean<br/>
+ 56: iget-byte<br/>
+ 57: iget-char<br/>
+ 58: iget-short<br/>
+ </td>
+ <td><code>A:</code> dest value register or pair; (4 bits)<br/>
+ <code>B:</code> object register (4 bits)<br/>
+ <code>C:</code> instance field reference index (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A and B must be valid register indices in the current stackframe.
+ </li>
+ <li>
+ For the -wide variant, also A+1 must be a valid register index in the
+ current stackframe.
+ </li>
+ <li>
+ Register vB must contain an object reference.
+ </li>
+ <li>
+ C must be a valid index into the field reference pool.
+ </li>
+ <li>
+ The field must be an instance field. The type of the field denoted by C must
+ match the variant of the instruction.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The value of the given instance field is read from the given object and
+ moved into the given register vA, that is, vA'=<object>.<field>.
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>For all but the -wide variant, if v(A+1) is the upper half of a register
+ pair, v(A+1)' becomes undefined.
+ </li>
+ <li>
+ For the -wide variant, if v(A+2) is the upper half of a register pair,
+ v(A+2)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if object is null.
+ </li>
+ <li>
+ IllegalAccessException if <object>.<field> is not visible from
+ the current context according to the usual visibility and access rules of
+ the Java programming language.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-59-iput.html b/docs/opcodes/opcode-59-iput.html
new file mode 100644
index 0000000..22a3479
--- /dev/null
+++ b/docs/opcodes/opcode-59-iput.html
@@ -0,0 +1,112 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>iget<kind></title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>iget<kind></h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the identified object instance field operation with the identified
+field, loading or storing into the value register.
+</p>
+<p>
+Note: These opcodes are reasonable candidates for static linking, altering the
+field argument to be a more direct offset.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>59..5f 22c</td>
+ <td>i<i>instanceop</i> vA, vB, field@CCCC<br/>
+ 59: iput<br/>
+ 5a: iput-wide<br/>
+ 5b: iput-object<br/>
+ 5c: iput-boolean<br/>
+ 5d: iput-byte<br/>
+ 5e: iput-char<br/>
+ 5f: iput-short
+ </td>
+ <td><code>A:</code> source value register or pair; (4 bits)<br/>
+ <code>B:</code> object register (4 bits)<br/>
+ <code>C:</code> instance field reference index (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A and B must be valid register indices in the current stack frame.
+ </li>
+ <li>
+ For the -wide variant, also A+1 must be a valid register index in the
+ current stack frame.
+ </li>
+ <li>
+ Register vB must contain an object reference.
+ </li>
+ <li>
+ C must be a valid index into the field reference pool.
+ </li>
+ <li>
+ The field must be an instance field. The type of the field denoted by C must
+ match the variant of the instruction.
+ </li>
+ <li>
+ For the -object variant, the instance referenced by register vA must be
+ assignment-compatible to the type of the field.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ For all but the -wide variant, the value of register vA is move into the
+ field, that is, <object>.<field>'=vA.
+ </li>
+ <li>
+ For the -wide variant, the registers vA and v(A+1) are moved into the
+ field as follows:
+ <ul>
+ <li>
+ <object>.<field>' = vA << 0x20 | v(A+1)
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if vB=null.
+ </li>
+ <li>
+ IllegalAccessException if <object>.<field> is not visible from
+ the current context according to the usual visibility and access rules of
+ the Java programming language, or final.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-60-sget.html b/docs/opcodes/opcode-60-sget.html
new file mode 100644
index 0000000..820886e
--- /dev/null
+++ b/docs/opcodes/opcode-60-sget.html
@@ -0,0 +1,106 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>sget<kind></title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>sget<kind></h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the identified object static field operation with the identified static
+field, loading or storing into the value register.
+</p>
+<p>
+Note: These opcodes are reasonable candidates for static linking, altering the
+field argument to be a more direct offset.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>60..6d 21c</td>
+ <td>s<i>staticop</i> vAA, field@BBBB<br/>
+ 60: sget<br/>
+ 61: sget-wide<br/>
+ 62: sget-object<br/>
+ 63: sget-boolean<br/>
+ 64: sget-byte<br/>
+ 65: sget-char<br/>
+ 66: sget-short<br/>
+ </td>
+ <td><code>A:</code> dest value register or pair; (8 bits)<br/>
+ <code>B:</code> static field reference index (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stackframe.
+ </li>
+ <li>
+ For the -wide variant, also A+1 must be a valid register index in the
+ current stackframe.
+ </li>
+ <li>
+ B must be a valid index into the field reference pool.
+ </li>
+ <li>
+ The field denoted by B must be static. The type of the field denoted by B
+ must match the variant of the instruction.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The value of the given instance field is read from the given object and
+ moved into the given register vA, that is, vA'=<class>.<field>.
+ </li>
+ <li>
+ If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined.
+ </li>
+ <li>
+ For all but the -wide variant, if v(A+1) is the upper half of a register
+ pair, v(A+1)' becomes undefined.
+ </li>
+ <li>
+ For the -wide variant, if v(A+2) is the upper half of a register pair,
+ v(A+2)' becomes undefined.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if object is null.
+ </li>
+ <li>
+ IllegalAccessException if <object>.<field> is not visible from
+ the current context according to the usual visibility and access rules of
+ the Java programming language.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-67-sput.html b/docs/opcodes/opcode-67-sput.html
new file mode 100644
index 0000000..b4d88bb
--- /dev/null
+++ b/docs/opcodes/opcode-67-sput.html
@@ -0,0 +1,108 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>sput<kind></title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>sput<kind></h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the identified object static field operation with the identified static
+field, loading or storing into the value register.
+</p>
+<p>
+Note: These opcodes are reasonable candidates for static linking, altering the
+field argument to be a more direct offset.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>67..6d 21c</td>
+ <td>s<i>staticop</i> vAA, field@BBBB<br/>
+ 67: sput<br/>
+ 68: sput-wide<br/>
+ 69: sput-object<br/>
+ 6a: sput-boolean<br/>
+ 6b: sput-byte<br/>
+ 6c: sput-char<br/>
+ 6d: sput-short
+ </td>
+ <td><code>A:</code> source value register or pair; (8 bits)<br/>
+ <code>B:</code> static field reference index (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ A must be a valid register index in the current stackframe.
+ </li>
+ <li>
+ For the -wide variant, also A+1 must be a valid register index in the
+ current stackframe.
+ </li>
+ <li>
+ B must be a valid index into the field reference pool.
+ </li>
+ <li>
+ The field must be static. The type of the field denoted by C must match the
+ variant of the instruction.
+ </li>
+ <li>
+ For the -object variant, the instance referenced by register vA must be
+ assignment-compatible to the type of the field.
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ For all but the -wide variant, the value of register vA is move into the
+ field, that is, <class>.<field>'=vA.
+ </li>
+ <li>
+ For the -wide variant, the registers vA and v(A+1) are moved into the field
+ as follows:
+ <ul>
+ <li>
+ <class>.<field>' = vA << 0x20 | v(A+1)
+ </li>
+ </ul>
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ NullPointerException if vB=null.
+ </li>
+ <li>
+ IllegalAccessException if <object>.<field> is not visible from
+ the current context according to the usual visibility and access rules of
+ the Java programming language, or final.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-7b-unop.html b/docs/opcodes/opcode-7b-unop.html
new file mode 100644
index 0000000..1068a25
--- /dev/null
+++ b/docs/opcodes/opcode-7b-unop.html
@@ -0,0 +1,108 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>unop</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>unop</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the identified unary operation on the source register, storing the
+result in the destination register.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>7b..8f 12x</td>
+ <td><i>unop</i> vA, vB<br/>
+ 7b: neg-int<br/>
+ 7c: not-int<br/>
+ 7d: neg-long<br/>
+ 7e: not-long<br/>
+ 7f: neg-float<br/>
+ 80: neg-double<br/>
+ 81: int-to-long<br/>
+ 82: int-to-float<br/>
+ 83: int-to-double<br/>
+ 84: long-to-int<br/>
+ 85: long-to-float<br/>
+ 86: long-to-double<br/>
+ 87: float-to-int<br/>
+ 88: float-to-long<br/>
+ 89: float-to-double<br/>
+ 8a: double-to-int<br/>
+ 8b: double-to-long<br/>
+ 8c: double-to-float<br/>
+ 8d: int-to-byte<br/>
+ 8e: int-to-char<br/>
+ 8f: int-to-short
+ </td>
+ <td><code>A:</code> destination register or pair (4 bits)<br/>
+ <code>B:</code> source register or pair (4 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A and B must be valid register indices for the current stackframe.
+ </li>
+ <li>
+ If the input type of <unop> is double or long, also B+1 must be a
+ valid register index in the current stackframe.
+ </li>
+ <li>
+ If the output type of <unop> is double or long, also A+1 must be a
+ valid register index in the current stackframe.
+ </li>
+ <li>
+ The type of register vB must match the source type of the instruction (this
+ probably needs more detail).
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The given operation <unop> is performed according to the semantics
+ specified in table XXX.
+ </li>
+ <li>
+ The result is stored in register vA, that is, vA'=<unop> vB.
+ </li>
+ <li>
+ It gets a bit messy if we want to describe all the combinations of input and
+ output with and without pairs here. Probably it's better to split it up.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ ArithmeticException if an arithmetic error occurs during the instruction.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-90-binop.html b/docs/opcodes/opcode-90-binop.html
new file mode 100644
index 0000000..cdc08a8
--- /dev/null
+++ b/docs/opcodes/opcode-90-binop.html
@@ -0,0 +1,120 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>binop</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>binop</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the identified binary operation on the two source registers, storing
+the result in the first source register.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>90..af 23x</td>
+ <td><i>binop</i> vAA, vBB, vCC<br/>
+ 90: add-int<br/>
+ 91: sub-int<br/>
+ 92: mul-int<br/>
+ 93: div-int<br/>
+ 94: rem-int<br/>
+ 95: and-int<br/>
+ 96: or-int<br/>
+ 97: xor-int<br/>
+ 98: shl-int<br/>
+ 99: shr-int<br/>
+ 9a: ushr-int<br/>
+ 9b: add-long<br/>
+ 9c: sub-long<br/>
+ 9d: mul-long<br/>
+ 9e: div-long<br/>
+ 9f: rem-long<br/>
+ a0: and-long<br/>
+ a1: or-long<br/>
+ a2: xor-long<br/>
+ a3: shl-long<br/>
+ a4: shr-long<br/>
+ a5: ushr-long<br/>
+ a6: add-float<br/>
+ a7: sub-float<br/>
+ a8: mul-float<br/>
+ a9: div-float<br/>
+ aa: rem-float<br/>
+ ab: add-double<br/>
+ ac: sub-double<br/>
+ ad: mul-double<br/>
+ ae: div-double<br/>
+ af: rem-double
+ </td>
+ <td><code>A:</code> destination register or pair (8 bits)<br/>
+ <code>B:</code> first source register or pair (8 bits)<br/>
+ <code>C:</code> second source register or pair (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ All A, B and C must be valid register indices in the current stackframe.
+ </li>
+ <li>
+ For the -long and -double variants, also A+1, B+1 and C+1 must be valid
+ register indices.
+ </li>
+ <li>
+ Registers vB and vC must be defined. They must both contain values that
+ match the variant of the instruction (it's probably better to split this up
+ into multiple pages again).
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The given operation <binop> is performed according to the semantics
+ specified in table XXX.
+ </li>
+ <li>
+ The result is stored in register vA, that is, vA'=<biop> vB.
+ </li>
+ <li>
+ For the -double and -long variants, (vA+1) is also affected.
+ </li>
+ <li>
+ As usual, neighboring registers might get undefined, if vA (and vA+1) were
+ part of a register pair originally.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ ArithmeticException if an error occurs during the instruction.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-b0-binop-2addr.html b/docs/opcodes/opcode-b0-binop-2addr.html
new file mode 100644
index 0000000..b3374f4
--- /dev/null
+++ b/docs/opcodes/opcode-b0-binop-2addr.html
@@ -0,0 +1,120 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>binop/2addr</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>binop/2addr</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the identified binary operation on the two source registers, storing the
+result in the first source register.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>b0..cf 12x</td>
+ <td><i>binop</i>/2addr vA, vB<br/>
+ b0: add-int/2addr<br/>
+ b1: sub-int/2addr<br/>
+ b2: mul-int/2addr<br/>
+ b3: div-int/2addr<br/>
+ b4: rem-int/2addr<br/>
+ b5: and-int/2addr<br/>
+ b6: or-int/2addr<br/>
+ b7: xor-int/2addr<br/>
+ b8: shl-int/2addr<br/>
+ b9: shr-int/2addr<br/>
+ ba: ushr-int/2addr<br/>
+ bb: add-long/2addr<br/>
+ bc: sub-long/2addr<br/>
+ bd: mul-long/2addr<br/>
+ be: div-long/2addr<br/>
+ bf: rem-long/2addr<br/>
+ c0: and-long/2addr<br/>
+ c1: or-long/2addr<br/>
+ c2: xor-long/2addr<br/>
+ c3: shl-long/2addr<br/>
+ c4: shr-long/2addr<br/>
+ c5: ushr-long/2addr<br/>
+ c6: add-float/2addr<br/>
+ c7: sub-float/2addr<br/>
+ c8: mul-float/2addr<br/>
+ c9: div-float/2addr<br/>
+ ca: rem-float/2addr<br/>
+ cb: add-double/2addr<br/>
+ cc: sub-double/2addr<br/>
+ cd: mul-double/2addr<br/>
+ ce: div-double/2addr<br/>
+ cf: rem-double/2addr
+ </td>
+ <td><code>A:</code> destination and first source register or pair
+ (4 bits)<br/>
+ <code>B:</code> second source register or pair (4 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A and B must be valid register indices in the current stackframe.
+ </li>
+ <li>
+ For the -long and -double variants, also A+1 and B+1 must be valid register
+ indices.
+ </li>
+ <li>
+ Registers vA and vB must be defined. They must both contain values that
+ match the variant of the instruction (it's probably better to split this up
+ into multiple pages again).
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The given operation <binop> is performed according to the semantics
+ specified in table XXX.
+ </li>
+ <li>
+ The result is stored in register vA, that is, vA'=vA <binop> vB.
+ </li>
+ <li>
+ For the -double and -long variants, (vA+1) is also affected.
+ </li>
+ <li>
+ As usual, neighboring registers might get undefined, if vA (and vA+1) were
+ part of a register pair originally.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ ArithmeticException if an error occurs during the instruction.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-d0-binop-lit16.html b/docs/opcodes/opcode-d0-binop-lit16.html
new file mode 100644
index 0000000..f9d3327
--- /dev/null
+++ b/docs/opcodes/opcode-d0-binop-lit16.html
@@ -0,0 +1,94 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>binop/lit16</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>binop/lit16</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the indicated binary op on the indicated register (first argument) and
+literal value (second argument), storing the result in the destination register.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>d0..d7 22s</td>
+ <td><i>binop</i>/lit16 vA, vB, #+CCCC<br/>
+ d0: add-int/lit16<br/>
+ d1: rsub-int (reverse subtract)<br/>
+ d2: mul-int/lit16<br/>
+ d3: div-int/lit16<br/>
+ d4: rem-int/lit16<br/>
+ d5: and-int/lit16<br/>
+ d6: or-int/lit16<br/>
+ d7: xor-int/lit16
+ </td>
+ <td><code>A:</code> destination register (4 bits)<br/>
+ <code>B:</code> source register (4 bits)<br/>
+ <code>C:</code> signed int constant (16 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A and B must be valid register indices in the current stackframe.
+ </li>
+ <li>
+ Registers vA and vB must be defined. They must both contain integer values.
+ </li>
+ <li>
+ C is an immediate, signed integer constant taken from the instruction stream
+ (actually this means there are no special requirements for C at all).
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The given operation <binop> is performed according to the semantics
+ specified in table XXX.
+ </li>
+ <li>
+ Argument C is sign-extended to 32 bits before.
+ </li>
+ <li>
+ The result is stored in register vA, that is, vA'=vB <binop> vC.
+ </li>
+ <li>
+ As usual, neighboring registers might get undefined, if vA was part of a
+ register pair originally.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ ArithmeticException if an error occurs during the instruction.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode-d8-binop-lit8.html b/docs/opcodes/opcode-d8-binop-lit8.html
new file mode 100644
index 0000000..26005e9
--- /dev/null
+++ b/docs/opcodes/opcode-d8-binop-lit8.html
@@ -0,0 +1,97 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+
+<html>
+
+<head>
+<title>binop/lit8</title>
+<link rel=stylesheet href="opcode.css">
+</head>
+
+<body>
+
+<h1>binop/lit8</h1>
+
+<h2>Purpose</h2>
+
+<p>
+Perform the indicated binary op on the indicated register (first argument) and
+literal value (second argument), storing the result in the destination register.
+</p>
+
+<h2>Details</h2>
+
+<table class="instruc">
+<thead>
+<tr>
+ <th>Op & Format</th>
+ <th>Mnemonic / Syntax</th>
+ <th>Arguments</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+ <td>d8..e2 22b</td>
+ <td><i>binop</i>/lit8 vAA, vBB, #+CC<br/>
+ d8: add-int/lit8<br/>
+ d9: rsub-int/lit8<br/>
+ da: mul-int/lit8<br/>
+ db: div-int/lit8<br/>
+ dc: rem-int/lit8<br/>
+ dd: and-int/lit8<br/>
+ de: or-int/lit8<br/>
+ df: xor-int/lit8<br/>
+ e0: shl-int/lit8<br/>
+ e1: shr-int/lit8<br/>
+ e2: ushr-int/lit8
+ </td>
+ <td><code>A:</code> destination register (8 bits)<br/>
+ <code>B:</code> source register (8 bits)<br/>
+ <code>C:</code> signed int constant (8 bits)</td>
+</tr>
+</tbody>
+</table>
+
+<h2>Constraints</h2>
+
+<ul>
+ <li>
+ Both A and B must be valid register indices in the current stackframe.
+ </li>
+ <li>
+ Registers vA and vB must be defined. They must both contain integer values.
+ </li>
+ <li>
+ C is an immediate, signed integer constant taken from the instruction stream
+ (actually this means there are no special requirements for C at all).
+ </li>
+</ul>
+
+<h2>Behavior</h2>
+
+<ul>
+ <li>
+ The given operation <binop> is performed according to the semantics
+ specified in table XXX.
+ </li>
+ <li>
+ Argument C is sign-extended to 32 bits before.
+ </li>
+ <li>
+ The result is stored in register vA, that is, vA'=vB <binop> vC.
+ </li>
+ <li>
+ As usual, neighboring registers might get undefined, if vA was part of a
+ register pair originally.
+ </li>
+</ul>
+
+<h2>Exceptions</h2>
+
+<ul>
+ <li>
+ ArithmeticException if an error occurs during the instruction.
+ </li>
+</ul>
+
+</body>
+</html>
diff --git a/docs/opcodes/opcode.css b/docs/opcodes/opcode.css
new file mode 100644
index 0000000..c3c1304
--- /dev/null
+++ b/docs/opcodes/opcode.css
@@ -0,0 +1,166 @@
+h1 {
+ font-family: serif;
+ color: #222266;
+}
+
+h2 {
+ font-family: serif;
+ border-top-style: solid;
+ border-top-width: 2px;
+ border-color: #ccccdd;
+ padding-top: 12px;
+ margin-top: 48px;
+ margin-bottom: 2px;
+ color: #222266;
+}
+
+@media print {
+ table {
+ font-size: 8pt;
+ }
+}
+
+@media screen {
+ table {
+ font-size: 10pt;
+ }
+}
+
+
+/* general for all tables */
+
+table {
+ border-collapse: collapse;
+ margin-top: 12px;
+}
+
+table th {
+ font-family: sans-serif;
+ background: #aabbff;
+ text-align: left;
+}
+
+table td {
+ font-family: sans-serif;
+ border-top-style: solid;
+ border-bottom-style: solid;
+ border-width: 1px;
+ border-color: #aaaaff;
+ padding-top: 4px;
+ padding-bottom: 4px;
+ padding-left: 4px;
+ padding-right: 6px;
+ background: #eeeeff;
+}
+
+table td p {
+ margin-top: 4pt;
+ margin-bottom: 0pt;
+}
+
+
+
+/* opcodes table */
+
+table.instruc {
+ margin-top: 24px;
+ margin-bottom: 24px;
+ margin-left: 48px;
+ margin-right: 48px;
+}
+
+table.instruc td {
+ font-family: sans-serif;
+ border-top-style: solid;
+ border-bottom-style: solid;
+ border-width: 1px;
+ padding-top: 4px;
+ padding-bottom: 4px;
+ padding-left: 2px;
+ padding-right: 2px;
+}
+
+table.instruc td:first-child {
+ font-family: monospace;
+ font-size: 90%;
+ vertical-align: top;
+ width: 12%;
+}
+
+table.instruc td:first-child + td {
+ font-family: monospace;
+ font-size: 90%;
+ vertical-align: top;
+ width: 23%;
+}
+
+table.instruc td:first-child + td i {
+ font-family: sans-serif;
+ font-size: 90%;
+}
+
+table.instruc td:first-child + td + td {
+ vertical-align: top;
+ width: 28%;
+}
+
+table.instruc td:first-child + td + td + td {
+ vertical-align: top;
+ width: 37%;
+}
+
+
+/* supplemental opcode format table */
+
+table.supplement {
+ margin-top: 24px;
+ margin-bottom: 24px;
+ margin-left: 48px;
+ margin-right: 48px;
+}
+
+table.supplement td:first-child {
+ font-family: monospace;
+ vertical-align: top;
+ width: 20%;
+}
+
+table.supplement td:first-child + td {
+ font-family: monospace;
+ vertical-align: top;
+ width: 20%;
+}
+
+table.supplement td:first-child + td + td {
+ font-family: sans-serif;
+ vertical-align: top;
+ width: 60%;
+}
+
+
+/* math details table */
+
+table.math {
+ margin-top: 24px;
+ margin-bottom: 24px;
+ margin-left: 48px;
+ margin-right: 48px;
+}
+
+table.math td:first-child {
+ font-family: monospace;
+ vertical-align: top;
+ width: 10%;
+}
+
+table.math td:first-child + td {
+ font-family: monospace;
+ vertical-align: top;
+ width: 30%;
+}
+
+table.math td:first-child + td + td {
+ font-family: sans-serif;
+ vertical-align: top;
+ width: 60%;
+}