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gerrit-public.fairphone.software / platform / dalvik / 31e30105703263782efd450d356cd67ea01af3b7 / . / vm / mterp / out / InterpC-armv4.c
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The Android Open Source Project89c1feb2008-12-17 18:03:55 -0800[diff] [blame]1/*
2 * This file was generated automatically by gen-mterp.py for 'armv4'.
3 *
4 * --> DO NOT EDIT <--
5 */
6
7/* File: c/header.c */
8/*
9 * Copyright (C) 2008 The Android Open Source Project
10 *
11 * Licensed under the Apache License, Version 2.0 (the "License");
12 * you may not use this file except in compliance with the License.
13 * You may obtain a copy of the License at
14 *
15 * http://www.apache.org/licenses/LICENSE-2.0
16 *
17 * Unless required by applicable law or agreed to in writing, software
18 * distributed under the License is distributed on an "AS IS" BASIS,
19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
20 * See the License for the specific language governing permissions and
21 * limitations under the License.
22 */
23
24/* common includes */
25#include "Dalvik.h"
26#include "interp/InterpDefs.h"
27#include "mterp/Mterp.h"
28#include <math.h> // needed for fmod, fmodf
29
30/*
31 * Configuration defines. These affect the C implementations, i.e. the
32 * portable interpreter(s) and C stubs.
33 *
34 * Some defines are controlled by the Makefile, e.g.:
35 * WITH_PROFILER
36 * WITH_DEBUGGER
37 * WITH_INSTR_CHECKS
38 * WITH_TRACKREF_CHECKS
39 * EASY_GDB
40 * NDEBUG
41 *
42 * If THREADED_INTERP is not defined, we use a classic "while true / switch"
43 * interpreter. If it is defined, then the tail end of each instruction
44 * handler fetches the next instruction and jumps directly to the handler.
45 * This increases the size of the "Std" interpreter by about 10%, but
46 * provides a speedup of about the same magnitude.
47 *
48 * There's a "hybrid" approach that uses a goto table instead of a switch
49 * statement, avoiding the "is the opcode in range" tests required for switch.
50 * The performance is close to the threaded version, and without the 10%
51 * size increase, but the benchmark results are off enough that it's not
52 * worth adding as a third option.
53 */
54#define THREADED_INTERP /* threaded vs. while-loop interpreter */
55
56#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia */
57# define CHECK_BRANCH_OFFSETS
58# define CHECK_REGISTER_INDICES
59#endif
60
61/*
62 * ARM EABI requires 64-bit alignment for access to 64-bit data types. We
63 * can't just use pointers to copy 64-bit values out of our interpreted
64 * register set, because gcc will generate ldrd/strd.
65 *
66 * The __UNION version copies data in and out of a union. The __MEMCPY
67 * version uses a memcpy() call to do the transfer; gcc is smart enough to
68 * not actually call memcpy(). The __UNION version is very bad on ARM;
69 * it only uses one more instruction than __MEMCPY, but for some reason
70 * gcc thinks it needs separate storage for every instance of the union.
71 * On top of that, it feels the need to zero them out at the start of the
72 * method. Net result is we zero out ~700 bytes of stack space at the top
73 * of the interpreter using ARM STM instructions.
74 */
75#if defined(__ARM_EABI__)
76//# define NO_UNALIGN_64__UNION
77# define NO_UNALIGN_64__MEMCPY
78#endif
79
80//#define LOG_INSTR /* verbose debugging */
81/* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */
82
83/*
84 * Keep a tally of accesses to fields. Currently only works if full DEX
85 * optimization is disabled.
86 */
87#ifdef PROFILE_FIELD_ACCESS
88# define UPDATE_FIELD_GET(_field) { (_field)->gets++; }
89# define UPDATE_FIELD_PUT(_field) { (_field)->puts++; }
90#else
91# define UPDATE_FIELD_GET(_field) ((void)0)
92# define UPDATE_FIELD_PUT(_field) ((void)0)
93#endif
94
95/*
96 * Adjust the program counter. "_offset" is a signed int, in 16-bit units.
97 *
98 * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns".
99 *
100 * We don't advance the program counter until we finish an instruction or
101 * branch, because we do want to have to unroll the PC if there's an
102 * exception.
103 */
104#ifdef CHECK_BRANCH_OFFSETS
105# define ADJUST_PC(_offset) do { \
106 int myoff = _offset; /* deref only once */ \
107 if (pc + myoff < curMethod->insns || \
108 pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \
109 { \
110 char* desc; \
111 desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \
112 LOGE("Invalid branch %d at 0x%04x in %s.%s %s\n", \
113 myoff, (int) (pc - curMethod->insns), \
114 curMethod->clazz->descriptor, curMethod->name, desc); \
115 free(desc); \
116 dvmAbort(); \
117 } \
118 pc += myoff; \
119 } while (false)
120#else
121# define ADJUST_PC(_offset) (pc += _offset)
122#endif
123
124/*
125 * If enabled, log instructions as we execute them.
126 */
127#ifdef LOG_INSTR
128# define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__)
129# define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__)
130# define ILOG(_level, ...) do { \
131 char debugStrBuf[128]; \
132 snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \
133 if (curMethod != NULL) \
134 LOG(_level, LOG_TAG"i", "%-2d|%04x%s\n", \
135 self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \
136 else \
137 LOG(_level, LOG_TAG"i", "%-2d|####%s\n", \
138 self->threadId, debugStrBuf); \
139 } while(false)
140void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly);
141# define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly)
142static const char kSpacing[] = " ";
143#else
144# define ILOGD(...) ((void)0)
145# define ILOGV(...) ((void)0)
146# define DUMP_REGS(_meth, _frame, _inOnly) ((void)0)
147#endif
148
149/* get a long from an array of u4 */
150static inline s8 getLongFromArray(const u4* ptr, int idx)
151{
152#if defined(NO_UNALIGN_64__UNION)
153 union { s8 ll; u4 parts[2]; } conv;
154
155 ptr += idx;
156 conv.parts[0] = ptr[0];
157 conv.parts[1] = ptr[1];
158 return conv.ll;
159#elif defined(NO_UNALIGN_64__MEMCPY)
160 s8 val;
161 memcpy(&val, &ptr[idx], 8);
162 return val;
163#else
164 return *((s8*) &ptr[idx]);
165#endif
166}
167
168/* store a long into an array of u4 */
169static inline void putLongToArray(u4* ptr, int idx, s8 val)
170{
171#if defined(NO_UNALIGN_64__UNION)
172 union { s8 ll; u4 parts[2]; } conv;
173
174 ptr += idx;
175 conv.ll = val;
176 ptr[0] = conv.parts[0];
177 ptr[1] = conv.parts[1];
178#elif defined(NO_UNALIGN_64__MEMCPY)
179 memcpy(&ptr[idx], &val, 8);
180#else
181 *((s8*) &ptr[idx]) = val;
182#endif
183}
184
185/* get a double from an array of u4 */
186static inline double getDoubleFromArray(const u4* ptr, int idx)
187{
188#if defined(NO_UNALIGN_64__UNION)
189 union { double d; u4 parts[2]; } conv;
190
191 ptr += idx;
192 conv.parts[0] = ptr[0];
193 conv.parts[1] = ptr[1];
194 return conv.d;
195#elif defined(NO_UNALIGN_64__MEMCPY)
196 double dval;
197 memcpy(&dval, &ptr[idx], 8);
198 return dval;
199#else
200 return *((double*) &ptr[idx]);
201#endif
202}
203
204/* store a double into an array of u4 */
205static inline void putDoubleToArray(u4* ptr, int idx, double dval)
206{
207#if defined(NO_UNALIGN_64__UNION)
208 union { double d; u4 parts[2]; } conv;
209
210 ptr += idx;
211 conv.d = dval;
212 ptr[0] = conv.parts[0];
213 ptr[1] = conv.parts[1];
214#elif defined(NO_UNALIGN_64__MEMCPY)
215 memcpy(&ptr[idx], &dval, 8);
216#else
217 *((double*) &ptr[idx]) = dval;
218#endif
219}
220
221/*
222 * If enabled, validate the register number on every access. Otherwise,
223 * just do an array access.
224 *
225 * Assumes the existence of "u4* fp".
226 *
227 * "_idx" may be referenced more than once.
228 */
229#ifdef CHECK_REGISTER_INDICES
230# define GET_REGISTER(_idx) \
231 ( (_idx) < curMethod->registersSize ? \
232 (fp[(_idx)]) : (assert(!"bad reg"),1969) )
233# define SET_REGISTER(_idx, _val) \
234 ( (_idx) < curMethod->registersSize ? \
235 (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) )
236# define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx))
237# define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
238# define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx))
239# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
240# define GET_REGISTER_WIDE(_idx) \
241 ( (_idx) < curMethod->registersSize-1 ? \
242 getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) )
243# define SET_REGISTER_WIDE(_idx, _val) \
244 ( (_idx) < curMethod->registersSize-1 ? \
245 putLongToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969) )
246# define GET_REGISTER_FLOAT(_idx) \
247 ( (_idx) < curMethod->registersSize ? \
248 (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) )
249# define SET_REGISTER_FLOAT(_idx, _val) \
250 ( (_idx) < curMethod->registersSize ? \
251 (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) )
252# define GET_REGISTER_DOUBLE(_idx) \
253 ( (_idx) < curMethod->registersSize-1 ? \
254 getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) )
255# define SET_REGISTER_DOUBLE(_idx, _val) \
256 ( (_idx) < curMethod->registersSize-1 ? \
257 putDoubleToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969.0) )
258#else
259# define GET_REGISTER(_idx) (fp[(_idx)])
260# define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val))
261# define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)])
262# define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val))
263# define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx))
264# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
265# define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx))
266# define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val))
267# define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)]))
268# define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val))
269# define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx))
270# define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val))
271#endif
272
273/*
274 * Get 16 bits from the specified offset of the program counter. We always
275 * want to load 16 bits at a time from the instruction stream -- it's more
276 * efficient than 8 and won't have the alignment problems that 32 might.
277 *
278 * Assumes existence of "const u2* pc".
279 */
280#define FETCH(_offset) (pc[(_offset)])
281
282/*
283 * Extract instruction byte from 16-bit fetch (_inst is a u2).
284 */
285#define INST_INST(_inst) ((_inst) & 0xff)
286
287/*
288 * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2).
289 */
290#define INST_A(_inst) (((_inst) >> 8) & 0x0f)
291#define INST_B(_inst) ((_inst) >> 12)
292
293/*
294 * Get the 8-bit "vAA" 8-bit register index from the instruction word.
295 * (_inst is u2)
296 */
297#define INST_AA(_inst) ((_inst) >> 8)
298
299/*
300 * The current PC must be available to Throwable constructors, e.g.
301 * those created by dvmThrowException(), so that the exception stack
302 * trace can be generated correctly. If we don't do this, the offset
303 * within the current method won't be shown correctly. See the notes
304 * in Exception.c.
305 *
306 * Assumes existence of "u4* fp" and "const u2* pc".
307 */
308#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
309
310/*
311 * Determine if we need to switch to a different interpreter. "_current"
312 * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
313 * interpreter generation file, which should remove the outer conditional
314 * from the following.
315 *
316 * If we're building without debug and profiling support, we never switch.
317 */
318#if defined(WITH_PROFILER) || defined(WITH_DEBUGGER)
319# define NEED_INTERP_SWITCH(_current) ( \
320 (_current == INTERP_STD) ? \
321 dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
322#else
323# define NEED_INTERP_SWITCH(_current) (false)
324#endif
325
326/*
327 * Look up an interface on a class using the cache.
328 */
329INLINE Method* dvmFindInterfaceMethodInCache(ClassObject* thisClass,
330 u4 methodIdx, const Method* method, DvmDex* methodClassDex)
331{
332#define ATOMIC_CACHE_CALC \
333 dvmInterpFindInterfaceMethod(thisClass, methodIdx, method, methodClassDex)
334
335 return (Method*) ATOMIC_CACHE_LOOKUP(methodClassDex->pInterfaceCache,
336 DEX_INTERFACE_CACHE_SIZE, thisClass, methodIdx);
337
338#undef ATOMIC_CACHE_CALC
339}
340
341/*
342 * Check to see if "obj" is NULL. If so, throw an exception. Assumes the
343 * pc has already been exported to the stack.
344 *
345 * Perform additional checks on debug builds.
346 *
347 * Use this to check for NULL when the instruction handler calls into
348 * something that could throw an exception (so we have already called
349 * EXPORT_PC at the top).
350 */
351static inline bool checkForNull(Object* obj)
352{
353 if (obj == NULL) {
354 dvmThrowException("Ljava/lang/NullPointerException;", NULL);
355 return false;
356 }
357#ifdef WITH_EXTRA_OBJECT_VALIDATION
358 if (!dvmIsValidObject(obj)) {
359 LOGE("Invalid object %p\n", obj);
360 dvmAbort();
361 }
362#endif
363#ifndef NDEBUG
364 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
365 /* probable heap corruption */
366 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
367 dvmAbort();
368 }
369#endif
370 return true;
371}
372
373/*
374 * Check to see if "obj" is NULL. If so, export the PC into the stack
375 * frame and throw an exception.
376 *
377 * Perform additional checks on debug builds.
378 *
379 * Use this to check for NULL when the instruction handler doesn't do
380 * anything else that can throw an exception.
381 */
382static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc)
383{
384 if (obj == NULL) {
385 EXPORT_PC();
386 dvmThrowException("Ljava/lang/NullPointerException;", NULL);
387 return false;
388 }
389#ifdef WITH_EXTRA_OBJECT_VALIDATION
390 if (!dvmIsValidObject(obj)) {
391 LOGE("Invalid object %p\n", obj);
392 dvmAbort();
393 }
394#endif
395#ifndef NDEBUG
396 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
397 /* probable heap corruption */
398 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
399 dvmAbort();
400 }
401#endif
402 return true;
403}
404
405
406/* File: cstubs/stubdefs.c */
407/* this is a standard (no debug support) interpreter */
408#define INTERP_TYPE INTERP_STD
409#define CHECK_DEBUG_AND_PROF() ((void)0)
410# define CHECK_TRACKED_REFS() ((void)0)
411
412/*
413 * In the C mterp stubs, "goto" is a function call followed immediately
414 * by a return.
415 */
416
417#define GOTO_TARGET_DECL(_target, ...) \
418 void dvmMterp_##_target(MterpGlue* glue, ## __VA_ARGS__);
419
420#define GOTO_TARGET(_target, ...) \
421 void dvmMterp_##_target(MterpGlue* glue, ## __VA_ARGS__) { \
422 u2 ref, vsrc1, vsrc2, vdst; \
423 u2 inst = FETCH(0); \
424 const Method* methodToCall; \
425 StackSaveArea* debugSaveArea;
426
427#define GOTO_TARGET_END }
428
429/*
430 * Redefine what used to be local variable accesses into MterpGlue struct
431 * references. (These are undefined down in "footer.c".)
432 */
433#define retval glue->retval
434#define pc glue->pc
435#define fp glue->fp
436#define curMethod glue->method
437#define methodClassDex glue->methodClassDex
438#define self glue->self
439#define debugTrackedRefStart glue->debugTrackedRefStart
440
441/* ugh */
442#define STUB_HACK(x) x
443
444
445/*
446 * Opcode handler framing macros. Here, each opcode is a separate function
447 * that takes a "glue" argument and returns void. We can't declare
448 * these "static" because they may be called from an assembly stub.
449 */
450#define HANDLE_OPCODE(_op) \
451 void dvmMterp_##_op(MterpGlue* glue) { \
452 u2 ref, vsrc1, vsrc2, vdst; \
453 u2 inst = FETCH(0);
454
455#define OP_END }
456
457/*
458 * Like the "portable" FINISH, but don't reload "inst", and return to caller
459 * when done.
460 */
461#define FINISH(_offset) { \
462 ADJUST_PC(_offset); \
463 CHECK_DEBUG_AND_PROF(); \
464 CHECK_TRACKED_REFS(); \
465 return; \
466 }
467
468
469/*
470 * The "goto label" statements turn into function calls followed by
471 * return statements. Some of the functions take arguments, which in the
472 * portable interpreter are handled by assigning values to globals.
473 */
474
475#define GOTO_exceptionThrown() \
476 do { \
477 dvmMterp_exceptionThrown(glue); \
478 return; \
479 } while(false)
480
481#define GOTO_returnFromMethod() \
482 do { \
483 dvmMterp_returnFromMethod(glue); \
484 return; \
485 } while(false)
486
487#define GOTO_invoke(_target, _methodCallRange) \
488 do { \
489 dvmMterp_##_target(glue, _methodCallRange); \
490 return; \
491 } while(false)
492
493#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \
494 do { \
495 dvmMterp_invokeMethod(glue, _methodCallRange, _methodToCall, \
496 _vsrc1, _vdst); \
497 return; \
498 } while(false)
499
500/*
501 * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
502 * if we need to switch to the other interpreter upon our return.
503 */
504#define GOTO_bail() \
505 dvmMterpStdBail(glue, false);
506#define GOTO_bail_switch() \
507 dvmMterpStdBail(glue, true);
508
509/*
510 * Periodically check for thread suspension.
511 *
512 * While we're at it, see if a debugger has attached or the profiler has
513 * started. If so, switch to a different "goto" table.
514 */
515#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
516 dvmCheckSuspendQuick(self); \
517 if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
518 ADJUST_PC(_pcadj); \
519 glue->entryPoint = _entryPoint; \
520 LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
521 glue->self->threadId, (_entryPoint), (_pcadj)); \
522 GOTO_bail_switch(); \
523 } \
524 }
525
526
527/* File: c/opcommon.c */
528/* forward declarations of goto targets */
529GOTO_TARGET_DECL(filledNewArray, bool methodCallRange);
530GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange);
531GOTO_TARGET_DECL(invokeSuper, bool methodCallRange);
532GOTO_TARGET_DECL(invokeInterface, bool methodCallRange);
533GOTO_TARGET_DECL(invokeDirect, bool methodCallRange);
534GOTO_TARGET_DECL(invokeStatic, bool methodCallRange);
535GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange);
536GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange);
537GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall,
538 u2 count, u2 regs);
539GOTO_TARGET_DECL(returnFromMethod);
540GOTO_TARGET_DECL(exceptionThrown);
541
542/*
543 * ===========================================================================
544 *
545 * What follows are opcode definitions shared between multiple opcodes with
546 * minor substitutions handled by the C pre-processor. These should probably
547 * use the mterp substitution mechanism instead, with the code here moved
548 * into common fragment files (like the asm "binop.S"), although it's hard
549 * to give up the C preprocessor in favor of the much simpler text subst.
550 *
551 * ===========================================================================
552 */
553
554#define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \
555 HANDLE_OPCODE(_opcode /*vA, vB*/) \
556 vdst = INST_A(inst); \
557 vsrc1 = INST_B(inst); \
558 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
559 SET_REGISTER##_totype(vdst, \
560 GET_REGISTER##_fromtype(vsrc1)); \
561 FINISH(1);
562
563#define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \
564 _tovtype, _tortype) \
565 HANDLE_OPCODE(_opcode /*vA, vB*/) \
566 { \
567 /* spec defines specific handling for +/- inf and NaN values */ \
568 _fromvtype val; \
569 _tovtype intMin, intMax, result; \
570 vdst = INST_A(inst); \
571 vsrc1 = INST_B(inst); \
572 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
573 val = GET_REGISTER##_fromrtype(vsrc1); \
574 intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \
575 intMax = ~intMin; \
576 result = (_tovtype) val; \
577 if (val >= intMax) /* +inf */ \
578 result = intMax; \
579 else if (val <= intMin) /* -inf */ \
580 result = intMin; \
581 else if (val != val) /* NaN */ \
582 result = 0; \
583 else \
584 result = (_tovtype) val; \
585 SET_REGISTER##_tortype(vdst, result); \
586 } \
587 FINISH(1);
588
589#define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \
590 HANDLE_OPCODE(_opcode /*vA, vB*/) \
591 vdst = INST_A(inst); \
592 vsrc1 = INST_B(inst); \
593 ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \
594 SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \
595 FINISH(1);
596
597/* NOTE: the comparison result is always a signed 4-byte integer */
598#define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \
599 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
600 { \
601 int result; \
602 u2 regs; \
603 _varType val1, val2; \
604 vdst = INST_AA(inst); \
605 regs = FETCH(1); \
606 vsrc1 = regs & 0xff; \
607 vsrc2 = regs >> 8; \
608 ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
609 val1 = GET_REGISTER##_type(vsrc1); \
610 val2 = GET_REGISTER##_type(vsrc2); \
611 if (val1 == val2) \
612 result = 0; \
613 else if (val1 < val2) \
614 result = -1; \
615 else if (val1 > val2) \
616 result = 1; \
617 else \
618 result = (_nanVal); \
619 ILOGV("+ result=%d\n", result); \
620 SET_REGISTER(vdst, result); \
621 } \
622 FINISH(2);
623
624#define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \
625 HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \
626 vsrc1 = INST_A(inst); \
627 vsrc2 = INST_B(inst); \
628 if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \
629 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
630 ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \
631 branchOffset); \
632 ILOGV("> branch taken"); \
633 if (branchOffset < 0) \
634 PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
635 FINISH(branchOffset); \
636 } else { \
637 ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
638 FINISH(2); \
639 }
640
641#define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \
642 HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \
643 vsrc1 = INST_AA(inst); \
644 if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \
645 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
646 ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
647 ILOGV("> branch taken"); \
648 if (branchOffset < 0) \
649 PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
650 FINISH(branchOffset); \
651 } else { \
652 ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
653 FINISH(2); \
654 }
655
656#define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \
657 HANDLE_OPCODE(_opcode /*vA, vB*/) \
658 vdst = INST_A(inst); \
659 vsrc1 = INST_B(inst); \
660 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
661 SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \
662 FINISH(1);
663
664#define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \
665 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
666 { \
667 u2 srcRegs; \
668 vdst = INST_AA(inst); \
669 srcRegs = FETCH(1); \
670 vsrc1 = srcRegs & 0xff; \
671 vsrc2 = srcRegs >> 8; \
672 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
673 if (_chkdiv != 0) { \
674 s4 firstVal, secondVal, result; \
675 firstVal = GET_REGISTER(vsrc1); \
676 secondVal = GET_REGISTER(vsrc2); \
677 if (secondVal == 0) { \
678 EXPORT_PC(); \
679 dvmThrowException("Ljava/lang/ArithmeticException;", \
680 "divide by zero"); \
681 GOTO_exceptionThrown(); \
682 } \
683 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
684 if (_chkdiv == 1) \
685 result = firstVal; /* division */ \
686 else \
687 result = 0; /* remainder */ \
688 } else { \
689 result = firstVal _op secondVal; \
690 } \
691 SET_REGISTER(vdst, result); \
692 } else { \
693 /* non-div/rem case */ \
694 SET_REGISTER(vdst, \
695 (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \
696 } \
697 } \
698 FINISH(2);
699
700#define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \
701 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
702 { \
703 u2 srcRegs; \
704 vdst = INST_AA(inst); \
705 srcRegs = FETCH(1); \
706 vsrc1 = srcRegs & 0xff; \
707 vsrc2 = srcRegs >> 8; \
708 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
709 SET_REGISTER(vdst, \
710 _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \
711 } \
712 FINISH(2);
713
714#define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \
715 HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \
716 vdst = INST_A(inst); \
717 vsrc1 = INST_B(inst); \
718 vsrc2 = FETCH(1); \
719 ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \
720 (_opname), vdst, vsrc1, vsrc2); \
721 if (_chkdiv != 0) { \
722 s4 firstVal, result; \
723 firstVal = GET_REGISTER(vsrc1); \
724 if ((s2) vsrc2 == 0) { \
725 EXPORT_PC(); \
726 dvmThrowException("Ljava/lang/ArithmeticException;", \
727 "divide by zero"); \
728 GOTO_exceptionThrown(); \
729 } \
730 if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \
731 /* won't generate /lit16 instr for this; check anyway */ \
732 if (_chkdiv == 1) \
733 result = firstVal; /* division */ \
734 else \
735 result = 0; /* remainder */ \
736 } else { \
737 result = firstVal _op (s2) vsrc2; \
738 } \
739 SET_REGISTER(vdst, result); \
740 } else { \
741 /* non-div/rem case */ \
742 SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \
743 } \
744 FINISH(2);
745
746#define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \
747 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
748 { \
749 u2 litInfo; \
750 vdst = INST_AA(inst); \
751 litInfo = FETCH(1); \
752 vsrc1 = litInfo & 0xff; \
753 vsrc2 = litInfo >> 8; /* constant */ \
754 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
755 (_opname), vdst, vsrc1, vsrc2); \
756 if (_chkdiv != 0) { \
757 s4 firstVal, result; \
758 firstVal = GET_REGISTER(vsrc1); \
759 if ((s1) vsrc2 == 0) { \
760 EXPORT_PC(); \
761 dvmThrowException("Ljava/lang/ArithmeticException;", \
762 "divide by zero"); \
763 GOTO_exceptionThrown(); \
764 } \
765 if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \
766 if (_chkdiv == 1) \
767 result = firstVal; /* division */ \
768 else \
769 result = 0; /* remainder */ \
770 } else { \
771 result = firstVal _op ((s1) vsrc2); \
772 } \
773 SET_REGISTER(vdst, result); \
774 } else { \
775 SET_REGISTER(vdst, \
776 (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \
777 } \
778 } \
779 FINISH(2);
780
781#define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \
782 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
783 { \
784 u2 litInfo; \
785 vdst = INST_AA(inst); \
786 litInfo = FETCH(1); \
787 vsrc1 = litInfo & 0xff; \
788 vsrc2 = litInfo >> 8; /* constant */ \
789 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
790 (_opname), vdst, vsrc1, vsrc2); \
791 SET_REGISTER(vdst, \
792 _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \
793 } \
794 FINISH(2);
795
796#define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \
797 HANDLE_OPCODE(_opcode /*vA, vB*/) \
798 vdst = INST_A(inst); \
799 vsrc1 = INST_B(inst); \
800 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
801 if (_chkdiv != 0) { \
802 s4 firstVal, secondVal, result; \
803 firstVal = GET_REGISTER(vdst); \
804 secondVal = GET_REGISTER(vsrc1); \
805 if (secondVal == 0) { \
806 EXPORT_PC(); \
807 dvmThrowException("Ljava/lang/ArithmeticException;", \
808 "divide by zero"); \
809 GOTO_exceptionThrown(); \
810 } \
811 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
812 if (_chkdiv == 1) \
813 result = firstVal; /* division */ \
814 else \
815 result = 0; /* remainder */ \
816 } else { \
817 result = firstVal _op secondVal; \
818 } \
819 SET_REGISTER(vdst, result); \
820 } else { \
821 SET_REGISTER(vdst, \
822 (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \
823 } \
824 FINISH(1);
825
826#define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \
827 HANDLE_OPCODE(_opcode /*vA, vB*/) \
828 vdst = INST_A(inst); \
829 vsrc1 = INST_B(inst); \
830 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
831 SET_REGISTER(vdst, \
832 _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \
833 FINISH(1);
834
835#define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \
836 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
837 { \
838 u2 srcRegs; \
839 vdst = INST_AA(inst); \
840 srcRegs = FETCH(1); \
841 vsrc1 = srcRegs & 0xff; \
842 vsrc2 = srcRegs >> 8; \
843 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
844 if (_chkdiv != 0) { \
845 s8 firstVal, secondVal, result; \
846 firstVal = GET_REGISTER_WIDE(vsrc1); \
847 secondVal = GET_REGISTER_WIDE(vsrc2); \
848 if (secondVal == 0LL) { \
849 EXPORT_PC(); \
850 dvmThrowException("Ljava/lang/ArithmeticException;", \
851 "divide by zero"); \
852 GOTO_exceptionThrown(); \
853 } \
854 if ((u8)firstVal == 0x8000000000000000ULL && \
855 secondVal == -1LL) \
856 { \
857 if (_chkdiv == 1) \
858 result = firstVal; /* division */ \
859 else \
860 result = 0; /* remainder */ \
861 } else { \
862 result = firstVal _op secondVal; \
863 } \
864 SET_REGISTER_WIDE(vdst, result); \
865 } else { \
866 SET_REGISTER_WIDE(vdst, \
867 (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \
868 } \
869 } \
870 FINISH(2);
871
872#define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \
873 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
874 { \
875 u2 srcRegs; \
876 vdst = INST_AA(inst); \
877 srcRegs = FETCH(1); \
878 vsrc1 = srcRegs & 0xff; \
879 vsrc2 = srcRegs >> 8; \
880 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
881 SET_REGISTER_WIDE(vdst, \
882 _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \
883 } \
884 FINISH(2);
885
886#define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \
887 HANDLE_OPCODE(_opcode /*vA, vB*/) \
888 vdst = INST_A(inst); \
889 vsrc1 = INST_B(inst); \
890 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
891 if (_chkdiv != 0) { \
892 s8 firstVal, secondVal, result; \
893 firstVal = GET_REGISTER_WIDE(vdst); \
894 secondVal = GET_REGISTER_WIDE(vsrc1); \
895 if (secondVal == 0LL) { \
896 EXPORT_PC(); \
897 dvmThrowException("Ljava/lang/ArithmeticException;", \
898 "divide by zero"); \
899 GOTO_exceptionThrown(); \
900 } \
901 if ((u8)firstVal == 0x8000000000000000ULL && \
902 secondVal == -1LL) \
903 { \
904 if (_chkdiv == 1) \
905 result = firstVal; /* division */ \
906 else \
907 result = 0; /* remainder */ \
908 } else { \
909 result = firstVal _op secondVal; \
910 } \
911 SET_REGISTER_WIDE(vdst, result); \
912 } else { \
913 SET_REGISTER_WIDE(vdst, \
914 (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\
915 } \
916 FINISH(1);
917
918#define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \
919 HANDLE_OPCODE(_opcode /*vA, vB*/) \
920 vdst = INST_A(inst); \
921 vsrc1 = INST_B(inst); \
922 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
923 SET_REGISTER_WIDE(vdst, \
924 _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \
925 FINISH(1);
926
927#define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \
928 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
929 { \
930 u2 srcRegs; \
931 vdst = INST_AA(inst); \
932 srcRegs = FETCH(1); \
933 vsrc1 = srcRegs & 0xff; \
934 vsrc2 = srcRegs >> 8; \
935 ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
936 SET_REGISTER_FLOAT(vdst, \
937 GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \
938 } \
939 FINISH(2);
940
941#define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \
942 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
943 { \
944 u2 srcRegs; \
945 vdst = INST_AA(inst); \
946 srcRegs = FETCH(1); \
947 vsrc1 = srcRegs & 0xff; \
948 vsrc2 = srcRegs >> 8; \
949 ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
950 SET_REGISTER_DOUBLE(vdst, \
951 GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \
952 } \
953 FINISH(2);
954
955#define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \
956 HANDLE_OPCODE(_opcode /*vA, vB*/) \
957 vdst = INST_A(inst); \
958 vsrc1 = INST_B(inst); \
959 ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \
960 SET_REGISTER_FLOAT(vdst, \
961 GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \
962 FINISH(1);
963
964#define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \
965 HANDLE_OPCODE(_opcode /*vA, vB*/) \
966 vdst = INST_A(inst); \
967 vsrc1 = INST_B(inst); \
968 ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \
969 SET_REGISTER_DOUBLE(vdst, \
970 GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \
971 FINISH(1);
972
973#define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \
974 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
975 { \
976 ArrayObject* arrayObj; \
977 u2 arrayInfo; \
978 EXPORT_PC(); \
979 vdst = INST_AA(inst); \
980 arrayInfo = FETCH(1); \
981 vsrc1 = arrayInfo & 0xff; /* array ptr */ \
982 vsrc2 = arrayInfo >> 8; /* index */ \
983 ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
984 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
985 if (!checkForNull((Object*) arrayObj)) \
986 GOTO_exceptionThrown(); \
987 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
988 LOGV("Invalid array access: %p %d (len=%d)\n", \
989 arrayObj, vsrc2, arrayObj->length); \
990 dvmThrowException("Ljava/lang/ArrayIndexOutOfBoundsException;", \
991 NULL); \
992 GOTO_exceptionThrown(); \
993 } \
994 SET_REGISTER##_regsize(vdst, \
995 ((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)]); \
996 ILOGV("+ AGET[%d]=0x%x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \
997 } \
998 FINISH(2);
999
1000#define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \
1001 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
1002 { \
1003 ArrayObject* arrayObj; \
1004 u2 arrayInfo; \
1005 EXPORT_PC(); \
1006 vdst = INST_AA(inst); /* AA: source value */ \
1007 arrayInfo = FETCH(1); \
1008 vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \
1009 vsrc2 = arrayInfo >> 8; /* CC: index */ \
1010 ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
1011 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
1012 if (!checkForNull((Object*) arrayObj)) \
1013 GOTO_exceptionThrown(); \
1014 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
1015 dvmThrowException("Ljava/lang/ArrayIndexOutOfBoundsException;", \
1016 NULL); \
1017 GOTO_exceptionThrown(); \
1018 } \
1019 ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\
1020 ((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)] = \
1021 GET_REGISTER##_regsize(vdst); \
1022 } \
1023 FINISH(2);
1024
1025/*
1026 * It's possible to get a bad value out of a field with sub-32-bit stores
1027 * because the -quick versions always operate on 32 bits. Consider:
1028 * short foo = -1 (sets a 32-bit register to 0xffffffff)
1029 * iput-quick foo (writes all 32 bits to the field)
1030 * short bar = 1 (sets a 32-bit register to 0x00000001)
1031 * iput-short (writes the low 16 bits to the field)
1032 * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001)
1033 * This can only happen when optimized and non-optimized code has interleaved
1034 * access to the same field. This is unlikely but possible.
1035 *
1036 * The easiest way to fix this is to always read/write 32 bits at a time. On
1037 * a device with a 16-bit data bus this is sub-optimal. (The alternative
1038 * approach is to have sub-int versions of iget-quick, but now we're wasting
1039 * Dalvik instruction space and making it less likely that handler code will
1040 * already be in the CPU i-cache.)
1041 */
1042#define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \
1043 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1044 { \
1045 InstField* ifield; \
1046 Object* obj; \
1047 EXPORT_PC(); \
1048 vdst = INST_A(inst); \
1049 vsrc1 = INST_B(inst); /* object ptr */ \
1050 ref = FETCH(1); /* field ref */ \
1051 ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1052 obj = (Object*) GET_REGISTER(vsrc1); \
1053 if (!checkForNull(obj)) \
1054 GOTO_exceptionThrown(); \
1055 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1056 if (ifield == NULL) { \
1057 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1058 if (ifield == NULL) \
1059 GOTO_exceptionThrown(); \
1060 } \
1061 SET_REGISTER##_regsize(vdst, \
1062 dvmGetField##_ftype(obj, ifield->byteOffset)); \
1063 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
1064 (u8) GET_REGISTER##_regsize(vdst)); \
1065 UPDATE_FIELD_GET(&ifield->field); \
1066 } \
1067 FINISH(2);
1068
1069#define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1070 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1071 { \
1072 Object* obj; \
1073 vdst = INST_A(inst); \
1074 vsrc1 = INST_B(inst); /* object ptr */ \
1075 ref = FETCH(1); /* field offset */ \
1076 ILOGV("|iget%s-quick v%d,v%d,field@+%u", \
1077 (_opname), vdst, vsrc1, ref); \
1078 obj = (Object*) GET_REGISTER(vsrc1); \
1079 if (!checkForNullExportPC(obj, fp, pc)) \
1080 GOTO_exceptionThrown(); \
1081 SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \
1082 ILOGV("+ IGETQ %d=0x%08llx", ref, \
1083 (u8) GET_REGISTER##_regsize(vdst)); \
1084 } \
1085 FINISH(2);
1086
1087#define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \
1088 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1089 { \
1090 InstField* ifield; \
1091 Object* obj; \
1092 EXPORT_PC(); \
1093 vdst = INST_A(inst); \
1094 vsrc1 = INST_B(inst); /* object ptr */ \
1095 ref = FETCH(1); /* field ref */ \
1096 ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1097 obj = (Object*) GET_REGISTER(vsrc1); \
1098 if (!checkForNull(obj)) \
1099 GOTO_exceptionThrown(); \
1100 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1101 if (ifield == NULL) { \
1102 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1103 if (ifield == NULL) \
1104 GOTO_exceptionThrown(); \
1105 } \
1106 dvmSetField##_ftype(obj, ifield->byteOffset, \
1107 GET_REGISTER##_regsize(vdst)); \
1108 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
1109 (u8) GET_REGISTER##_regsize(vdst)); \
1110 UPDATE_FIELD_PUT(&ifield->field); \
1111 } \
1112 FINISH(2);
1113
1114#define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1115 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1116 { \
1117 Object* obj; \
1118 vdst = INST_A(inst); \
1119 vsrc1 = INST_B(inst); /* object ptr */ \
1120 ref = FETCH(1); /* field offset */ \
1121 ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \
1122 (_opname), vdst, vsrc1, ref); \
1123 obj = (Object*) GET_REGISTER(vsrc1); \
1124 if (!checkForNullExportPC(obj, fp, pc)) \
1125 GOTO_exceptionThrown(); \
1126 dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \
1127 ILOGV("+ IPUTQ %d=0x%08llx", ref, \
1128 (u8) GET_REGISTER##_regsize(vdst)); \
1129 } \
1130 FINISH(2);
1131
1132#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
1133 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1134 { \
1135 StaticField* sfield; \
1136 vdst = INST_AA(inst); \
1137 ref = FETCH(1); /* field ref */ \
1138 ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1139 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1140 if (sfield == NULL) { \
1141 EXPORT_PC(); \
1142 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1143 if (sfield == NULL) \
1144 GOTO_exceptionThrown(); \
1145 } \
1146 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
1147 ILOGV("+ SGET '%s'=0x%08llx", \
1148 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1149 UPDATE_FIELD_GET(&sfield->field); \
1150 } \
1151 FINISH(2);
1152
1153#define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \
1154 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1155 { \
1156 StaticField* sfield; \
1157 vdst = INST_AA(inst); \
1158 ref = FETCH(1); /* field ref */ \
1159 ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1160 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1161 if (sfield == NULL) { \
1162 EXPORT_PC(); \
1163 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1164 if (sfield == NULL) \
1165 GOTO_exceptionThrown(); \
1166 } \
1167 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
1168 ILOGV("+ SPUT '%s'=0x%08llx", \
1169 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1170 UPDATE_FIELD_PUT(&sfield->field); \
1171 } \
1172 FINISH(2);
1173
1174
1175/* File: cstubs/enddefs.c */
1176
1177/* undefine "magic" name remapping */
1178#undef retval
1179#undef pc
1180#undef fp
1181#undef curMethod
1182#undef methodClassDex
1183#undef self
1184#undef debugTrackedRefStart
1185
1186/* File: armv5te/debug.c */
1187#include <inttypes.h>
1188
1189/*
1190 * Dump the fixed-purpose ARM registers, along with some other info.
1191 *
1192 * This function MUST be compiled in ARM mode -- THUMB will yield bogus
1193 * results.
1194 *
1195 * This will NOT preserve r0-r3/ip.
1196 */
1197void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3)
1198{
1199 register uint32_t rPC asm("r4");
1200 register uint32_t rFP asm("r5");
1201 register uint32_t rGLUE asm("r6");
1202 register uint32_t rIBASE asm("r7");
1203 register uint32_t rINST asm("r8");
1204 register uint32_t r9 asm("r9");
1205 register uint32_t r10 asm("r10");
1206
1207 extern char dvmAsmInstructionStart[];
1208
1209 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
1210 printf(" : rPC=%08x rFP=%08x rGLUE=%08x rIBASE=%08x\n",
1211 rPC, rFP, rGLUE, rIBASE);
1212 printf(" : rINST=%08x r9=%08x r10=%08x\n", rINST, r9, r10);
1213
1214 MterpGlue* glue = (MterpGlue*) rGLUE;
1215 const Method* method = glue->method;
1216 printf(" + self is %p\n", dvmThreadSelf());
1217 //printf(" + currently in %s.%s %s\n",
1218 // method->clazz->descriptor, method->name, method->signature);
1219 //printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart);
1220 //printf(" + next handler for 0x%02x = %p\n",
1221 // rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64);
1222}
1223
1224/*
1225 * Dump the StackSaveArea for the specified frame pointer.
1226 */
1227void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea)
1228{
1229 StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp);
1230 printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea);
1231#ifdef EASY_GDB
1232 printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n",
1233 saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc,
1234 saveArea->method, saveArea->xtra.currentPc);
1235#else
1236 printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n",
1237 saveArea->prevFrame, saveArea->savedPc,
1238 saveArea->method, saveArea->xtra.currentPc,
1239 *(u4*)fp);
1240#endif
1241}
1242
1243/*
1244 * Does the bulk of the work for common_printMethod().
1245 */
1246void dvmMterpPrintMethod(Method* method)
1247{
1248 /*
1249 * It is a direct (non-virtual) method if it is static, private,
1250 * or a constructor.
1251 */
1252 bool isDirect =
1253 ((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) ||
1254 (method->name[0] == '<');
1255
1256 char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
1257
1258 printf("<%c:%s.%s %s> ",
1259 isDirect ? 'D' : 'V',
1260 method->clazz->descriptor,
1261 method->name,
1262 desc);
1263
1264 free(desc);
1265}
1266