Mike Leach | 1231752 | 2016-05-24 16:03:49 +0100 | [diff] [blame] | 1 | * Decode Tree API updates. |
| 2 | -> Re-factor the decode tree API to: |
| 3 | 1) remove the per decoder type creation functions - CreateETMv4Decoder(...), |
| 4 | replacing with a single CreateDecoder("Type"). |
| 5 | 2) Use new structure to enable custom decoders - may be proprietary / binaries to |
| 6 | be used in the decoder structure. |
| 7 | 3) Make it easier to add a new decoder to the library source, without the overhead of |
| 8 | doing all the creation fns. |
Mathieu Poirier | fdb433e | 2016-03-03 15:18:22 -0700 | [diff] [blame] | 9 | |
| 10 | * STM "full decode". |
| 11 | -> This is simply to come up with a generic packet format that will consist of |
| 12 | Master+Channel+<payload>, where <payload> is [data]+[TS]+[marker/flag]. This |
| 13 | combines a number of packets from the raw STPv2 format. |
| 14 | |
| 15 | * ETMv4/PTM - decoder updates to handle advanced configuration. |
| 16 | -> Certain (currently unused by perf / current hardware) configuration settings |
| 17 | can alter the format of the trace output. One example is Return Stack - |
| 18 | settable in the control registers for PTM/ETMv4, and removes some inline |
| 19 | addresses. Decoder must use a follower to correctly trace when this is set. |
| 20 | |
| 21 | * ITM packet processing and decode. |
| 22 | -> ITM is primarily an M class SW trace module. I wouldn't expect to see it on |
| 23 | systems with STM, unless a companion M class was present. |
| 24 | |
| 25 | *Data trace - ETMv4 / ETMv3 |
| 26 | -> Differing solutions to data trace in v4/v3 - v4 is separate trace stream |
| 27 | completely, output at trace ID <instruction_trace_ID>+1. ETMv3 is inline with |
| 28 | the instruction trace. |
| 29 | |
| 30 | Cortex-A cores do not support this architecturally. On R and M profile cores it |
| 31 | is an option. There are scenrios in future that could see linux on R cores, plus |
| 32 | on something like Juno it is possible to switch on trace for the SCP |
| 33 | (M class processor). So at some point data trace |