Relax initialization of Quantized Addition microkernel parameters
Refactor initialization of QU8/QS8 ADD/ADDC microkernel parameters to take a
function pointer with a standardized interface.
PiperOrigin-RevId: 385686841
diff --git a/src/qs8-vaddc/avx2-mul32-ld64.c.in b/src/qs8-vaddc/avx2-mul32-ld64.c.in
index 6b29b59..85bf12f 100644
--- a/src/qs8-vaddc/avx2-mul32-ld64.c.in
+++ b/src/qs8-vaddc/avx2-mul32-ld64.c.in
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m256i vx_multiplier = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.x_multiplier));
const __m256i vremainder_mask = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.remainder_mask));
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
index f3300e4..3f50ced 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
index ed96887..c3fd0d6 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
index 5931a5d..421e654 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
index c110d7b..e5917df 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
index 451bf3c..4c1c8dc 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
index d4dbac3..021ccc3 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
index 535ce36..412a339 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
index 2636076..f2bdfda 100644
--- a/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
+++ b/src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
index 94cf51a..4417af6 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m256i vx_multiplier = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.x_multiplier));
const __m256i vremainder_mask = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.remainder_mask));
diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
index 729963e..6d5351d 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m256i vx_multiplier = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.x_multiplier));
const __m256i vremainder_mask = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.remainder_mask));
diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
index b2dab8f..0d38a89 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m256i vx_multiplier = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.x_multiplier));
const __m256i vremainder_mask = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.remainder_mask));
diff --git a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
index 127c635..1713ea4 100644
--- a/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m256i vx_multiplier = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.x_multiplier));
const __m256i vremainder_mask = _mm256_broadcastsi128_si256(_mm_load_si128((const __m128i*) params->sse2.remainder_mask));
diff --git a/src/qs8-vaddc/gen/minmax-neon-ld64-x16.c b/src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
index 1e7d11d..8bbc440 100644
--- a/src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
@@ -22,7 +22,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int8x8_t vx_zero_point = vld1_dup_s8(¶ms->neon.x_zero_point);
const int32x4_t vx_multiplier = vld1q_dup_s32(¶ms->neon.x_multiplier);
diff --git a/src/qs8-vaddc/gen/minmax-neon-ld64-x24.c b/src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
index 19668d6..97ecf4d 100644
--- a/src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
@@ -22,7 +22,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int8x8_t vx_zero_point = vld1_dup_s8(¶ms->neon.x_zero_point);
const int32x4_t vx_multiplier = vld1q_dup_s32(¶ms->neon.x_multiplier);
diff --git a/src/qs8-vaddc/gen/minmax-neon-ld64-x32.c b/src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
index 21aea50..d866460 100644
--- a/src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
@@ -22,7 +22,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int8x8_t vx_zero_point = vld1_dup_s8(¶ms->neon.x_zero_point);
const int32x4_t vx_multiplier = vld1q_dup_s32(¶ms->neon.x_multiplier);
diff --git a/src/qs8-vaddc/gen/minmax-neon-ld64-x8.c b/src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
index 748437c..be9d48e 100644
--- a/src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
@@ -22,7 +22,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int8x8_t vx_zero_point = vld1_dup_s8(¶ms->neon.x_zero_point);
const int32x4_t vx_multiplier = vld1q_dup_s32(¶ms->neon.x_multiplier);
diff --git a/src/qs8-vaddc/gen/minmax-scalar-x1.c b/src/qs8-vaddc/gen/minmax-scalar-x1.c
index e20c2ee..a74562e 100644
--- a/src/qs8-vaddc/gen/minmax-scalar-x1.c
+++ b/src/qs8-vaddc/gen/minmax-scalar-x1.c
@@ -18,7 +18,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int32_t vzero_point_product =
params->scalar.zero_point_product + (int32_t) *input_y * params->scalar.y_multiplier;
diff --git a/src/qs8-vaddc/gen/minmax-scalar-x2.c b/src/qs8-vaddc/gen/minmax-scalar-x2.c
index 42364fb..84693da 100644
--- a/src/qs8-vaddc/gen/minmax-scalar-x2.c
+++ b/src/qs8-vaddc/gen/minmax-scalar-x2.c
@@ -18,7 +18,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int32_t vzero_point_product =
params->scalar.zero_point_product + (int32_t) *input_y * params->scalar.y_multiplier;
diff --git a/src/qs8-vaddc/gen/minmax-scalar-x4.c b/src/qs8-vaddc/gen/minmax-scalar-x4.c
index 7b13f0a..6d4be18 100644
--- a/src/qs8-vaddc/gen/minmax-scalar-x4.c
+++ b/src/qs8-vaddc/gen/minmax-scalar-x4.c
@@ -18,7 +18,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int32_t vzero_point_product =
params->scalar.zero_point_product + (int32_t) *input_y * params->scalar.y_multiplier;
diff --git a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
index 3d1196e..4b607bf 100644
--- a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
index 4ed79e8..0a03082 100644
--- a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
index c844fc3..70ffbab 100644
--- a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
index 5e4bfdc..1de419f 100644
--- a/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
index 79b5a78..46d0b73 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
index 559d412..07e852a 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
index dfceaa8..e3908d5 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
index 5c85685..882384a 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
index 0c3e7c2..fb8b868 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
index c0b9d12..80fad14 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
index 9da5909..69522b8 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
index ff8babc..511f7d9 100644
--- a/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
+++ b/src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
@@ -20,7 +20,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-wasmsimd-x16.c b/src/qs8-vaddc/gen/minmax-wasmsimd-x16.c
index 551ac39..7552faa 100644
--- a/src/qs8-vaddc/gen/minmax-wasmsimd-x16.c
+++ b/src/qs8-vaddc/gen/minmax-wasmsimd-x16.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const v128_t vx_multiplier = wasm_v128_load(params->wasmsimd.x_multiplier);
const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-wasmsimd-x24.c b/src/qs8-vaddc/gen/minmax-wasmsimd-x24.c
index 9a45ec4..81c4f81 100644
--- a/src/qs8-vaddc/gen/minmax-wasmsimd-x24.c
+++ b/src/qs8-vaddc/gen/minmax-wasmsimd-x24.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const v128_t vx_multiplier = wasm_v128_load(params->wasmsimd.x_multiplier);
const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-wasmsimd-x32.c b/src/qs8-vaddc/gen/minmax-wasmsimd-x32.c
index 19116e0..087c2f9 100644
--- a/src/qs8-vaddc/gen/minmax-wasmsimd-x32.c
+++ b/src/qs8-vaddc/gen/minmax-wasmsimd-x32.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const v128_t vx_multiplier = wasm_v128_load(params->wasmsimd.x_multiplier);
const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-wasmsimd-x8.c b/src/qs8-vaddc/gen/minmax-wasmsimd-x8.c
index 6108044..c6ab3fd 100644
--- a/src/qs8-vaddc/gen/minmax-wasmsimd-x8.c
+++ b/src/qs8-vaddc/gen/minmax-wasmsimd-x8.c
@@ -19,7 +19,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const v128_t vx_multiplier = wasm_v128_load(params->wasmsimd.x_multiplier);
const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
index 8c39f6a..fe4f252 100644
--- a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
+++ b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
@@ -25,7 +25,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
index ff006d1..f68096e 100644
--- a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
+++ b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
@@ -25,7 +25,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
index 72d8894..08ef2f2 100644
--- a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
+++ b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
@@ -25,7 +25,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
index abbf33d..b40322b 100644
--- a/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
+++ b/src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
@@ -25,7 +25,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/neon-ld64.c.in b/src/qs8-vaddc/neon-ld64.c.in
index 977fc2a..c79f930 100644
--- a/src/qs8-vaddc/neon-ld64.c.in
+++ b/src/qs8-vaddc/neon-ld64.c.in
@@ -21,7 +21,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int8x8_t vx_zero_point = vld1_dup_s8(¶ms->neon.x_zero_point);
const int32x4_t vx_multiplier = vld1q_dup_s32(¶ms->neon.x_multiplier);
diff --git a/src/qs8-vaddc/scalar.c.in b/src/qs8-vaddc/scalar.c.in
index 87d057e..7ad91c4 100644
--- a/src/qs8-vaddc/scalar.c.in
+++ b/src/qs8-vaddc/scalar.c.in
@@ -15,7 +15,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const int32_t vzero_point_product =
params->scalar.zero_point_product + (int32_t) *input_y * params->scalar.y_multiplier;
diff --git a/src/qs8-vaddc/sse-mul16-ld64.c.in b/src/qs8-vaddc/sse-mul16-ld64.c.in
index 553b6d0..6a6c8f8 100644
--- a/src/qs8-vaddc/sse-mul16-ld64.c.in
+++ b/src/qs8-vaddc/sse-mul16-ld64.c.in
@@ -22,7 +22,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier_lo = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_lo);
const __m128i vx_multiplier_hi = _mm_load_si128((const __m128i*) params->sse2.x_multiplier_hi);
diff --git a/src/qs8-vaddc/sse-mul32-ld32.c.in b/src/qs8-vaddc/sse-mul32-ld32.c.in
index a9f713e..a7353cd 100644
--- a/src/qs8-vaddc/sse-mul32-ld32.c.in
+++ b/src/qs8-vaddc/sse-mul32-ld32.c.in
@@ -30,7 +30,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const __m128i vx_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
diff --git a/src/qs8-vaddc/wasmsimd.c.in b/src/qs8-vaddc/wasmsimd.c.in
index 05d0977..799b266 100644
--- a/src/qs8-vaddc/wasmsimd.c.in
+++ b/src/qs8-vaddc/wasmsimd.c.in
@@ -18,7 +18,7 @@
const int8_t* input_x,
const int8_t* input_y,
int8_t* output,
- const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+ const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
{
const v128_t vx_multiplier = wasm_v128_load(params->wasmsimd.x_multiplier);
const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask);