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Marat Dukhane9c4b962021-04-02 16:56:55 -07001// Auto-generated file. Do not edit!
2// Template: src/qs8-vadd/sse-mul32-ld32.c.in
3// Generator: tools/xngen
4//
5// Copyright 2020 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <immintrin.h>
13
14#include <xnnpack/intrinsics-polyfill.h>
15#include <xnnpack/vadd.h>
16
17
18void xnn_qs8_vadd_minmax_ukernel__avx_mul32_ld32_x16(
19 size_t n,
Marat Dukhan076bcfe2021-07-19 19:24:42 -070020 const int8_t* input_a,
21 const int8_t* input_b,
Marat Dukhane9c4b962021-04-02 16:56:55 -070022 int8_t* output,
Marat Dukhan6e0fc392021-07-19 18:38:24 -070023 const union xnn_qs8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
Marat Dukhane9c4b962021-04-02 16:56:55 -070024{
25 const __m128i vzero_point_product = _mm_load_si128((const __m128i*) params->sse2.zero_point_product);
Marat Dukhan076bcfe2021-07-19 19:24:42 -070026 const __m128i va_multiplier = _mm_load_si128((const __m128i*) params->sse2.x_multiplier);
27 const __m128i vb_multiplier = _mm_load_si128((const __m128i*) params->sse2.y_multiplier);
Marat Dukhane9c4b962021-04-02 16:56:55 -070028 const __m128i vremainder_mask = _mm_load_si128((const __m128i*) params->sse2.remainder_mask);
29 const __m128i vremainder_threshold = _mm_load_si128((const __m128i*) params->sse2.remainder_threshold);
30 const __m128i vshift = _mm_cvtsi32_si128((int) params->sse2.shift);
31 const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->sse2.output_zero_point);
32 const __m128i voutput_min = _mm_load_si128((const __m128i*) params->sse2.output_min);
33 const __m128i voutput_max = _mm_load_si128((const __m128i*) params->sse2.output_max);
34
35 for (; n >= 16 * sizeof(int8_t); n -= 16 * sizeof(int8_t)) {
Marat Dukhan076bcfe2021-07-19 19:24:42 -070036 const __m128i va0123 = _mm_cvtepi8_epi32(_mm_loadu_si32(input_a));
37 const __m128i vb0123 = _mm_cvtepi8_epi32(_mm_loadu_si32(input_b));
38 const __m128i va4567 = _mm_cvtepi8_epi32(_mm_loadu_si32(input_a + 4));
39 const __m128i vb4567 = _mm_cvtepi8_epi32(_mm_loadu_si32(input_b + 4));
40 const __m128i va89AB = _mm_cvtepi8_epi32(_mm_loadu_si32(input_a + 8));
41 const __m128i vb89AB = _mm_cvtepi8_epi32(_mm_loadu_si32(input_b + 8));
42 const __m128i vaCDEF = _mm_cvtepi8_epi32(_mm_loadu_si32(input_a + 12));
43 const __m128i vbCDEF = _mm_cvtepi8_epi32(_mm_loadu_si32(input_b + 12));
44 input_a += 16;
45 input_b += 16;
Marat Dukhane9c4b962021-04-02 16:56:55 -070046
Marat Dukhan076bcfe2021-07-19 19:24:42 -070047 __m128i vacc0123 = _mm_add_epi32(vzero_point_product, _mm_mullo_epi32(va0123, va_multiplier));
48 __m128i vacc4567 = _mm_add_epi32(vzero_point_product, _mm_mullo_epi32(va4567, va_multiplier));
49 __m128i vacc89AB = _mm_add_epi32(vzero_point_product, _mm_mullo_epi32(va89AB, va_multiplier));
50 __m128i vaccCDEF = _mm_add_epi32(vzero_point_product, _mm_mullo_epi32(vaCDEF, va_multiplier));
Marat Dukhane9c4b962021-04-02 16:56:55 -070051
Marat Dukhan076bcfe2021-07-19 19:24:42 -070052 vacc0123 = _mm_add_epi32(vacc0123, _mm_mullo_epi32(vb0123, vb_multiplier));
53 vacc4567 = _mm_add_epi32(vacc4567, _mm_mullo_epi32(vb4567, vb_multiplier));
54 vacc89AB = _mm_add_epi32(vacc89AB, _mm_mullo_epi32(vb89AB, vb_multiplier));
55 vaccCDEF = _mm_add_epi32(vaccCDEF, _mm_mullo_epi32(vbCDEF, vb_multiplier));
Marat Dukhane9c4b962021-04-02 16:56:55 -070056
57 const __m128i vrem0123 = _mm_add_epi32(_mm_and_si128(vacc0123, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), vacc0123));
58 const __m128i vrem4567 = _mm_add_epi32(_mm_and_si128(vacc4567, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), vacc4567));
59 const __m128i vrem89AB = _mm_add_epi32(_mm_and_si128(vacc89AB, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), vacc89AB));
60 const __m128i vremCDEF = _mm_add_epi32(_mm_and_si128(vaccCDEF, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), vaccCDEF));
61
62 vacc0123 = _mm_sub_epi32(_mm_sra_epi32(vacc0123, vshift), _mm_cmpgt_epi32(vrem0123, vremainder_threshold));
63 vacc4567 = _mm_sub_epi32(_mm_sra_epi32(vacc4567, vshift), _mm_cmpgt_epi32(vrem4567, vremainder_threshold));
64 vacc89AB = _mm_sub_epi32(_mm_sra_epi32(vacc89AB, vshift), _mm_cmpgt_epi32(vrem89AB, vremainder_threshold));
65 vaccCDEF = _mm_sub_epi32(_mm_sra_epi32(vaccCDEF, vshift), _mm_cmpgt_epi32(vremCDEF, vremainder_threshold));
66
67 __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
68 __m128i vout89ABCDEF = _mm_adds_epi16(_mm_packs_epi32(vacc89AB, vaccCDEF), voutput_zero_point);
69
70 vout01234567 = _mm_max_epi16(vout01234567, voutput_min);
71 vout89ABCDEF = _mm_max_epi16(vout89ABCDEF, voutput_min);
72
73 vout01234567 = _mm_min_epi16(vout01234567, voutput_max);
74 vout89ABCDEF = _mm_min_epi16(vout89ABCDEF, voutput_max);
75
76 const __m128i vout0123456789ABCDEF = _mm_packs_epi16(vout01234567, vout89ABCDEF);
77
78 _mm_storeu_si128((__m128i*) output, vout0123456789ABCDEF);
79 output += 16;
80 }
81 if XNN_UNLIKELY(n != 0) {
82 do {
Marat Dukhan076bcfe2021-07-19 19:24:42 -070083 const __m128i va0123 = _mm_cvtepi8_epi32(_mm_loadu_si32(input_a));
84 const __m128i vb0123 = _mm_cvtepi8_epi32(_mm_loadu_si32(input_b));
85 const __m128i va4567 = _mm_cvtepi8_epi32(_mm_loadu_si32(input_a + 4));
86 const __m128i vb4567 = _mm_cvtepi8_epi32(_mm_loadu_si32(input_b + 4));
87 input_a += 8;
88 input_b += 8;
Marat Dukhane9c4b962021-04-02 16:56:55 -070089
Marat Dukhan076bcfe2021-07-19 19:24:42 -070090 __m128i vacc0123 = _mm_add_epi32(vzero_point_product, _mm_mullo_epi32(va0123, va_multiplier));
91 __m128i vacc4567 = _mm_add_epi32(vzero_point_product, _mm_mullo_epi32(va4567, va_multiplier));
Marat Dukhane9c4b962021-04-02 16:56:55 -070092
Marat Dukhan076bcfe2021-07-19 19:24:42 -070093 vacc0123 = _mm_add_epi32(vacc0123, _mm_mullo_epi32(vb0123, vb_multiplier));
94 vacc4567 = _mm_add_epi32(vacc4567, _mm_mullo_epi32(vb4567, vb_multiplier));
Marat Dukhane9c4b962021-04-02 16:56:55 -070095
96 const __m128i vrem0123 = _mm_add_epi32(_mm_and_si128(vacc0123, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), vacc0123));
97 const __m128i vrem4567 = _mm_add_epi32(_mm_and_si128(vacc4567, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), vacc4567));
98
99 vacc0123 = _mm_sub_epi32(_mm_sra_epi32(vacc0123, vshift), _mm_cmpgt_epi32(vrem0123, vremainder_threshold));
100 vacc4567 = _mm_sub_epi32(_mm_sra_epi32(vacc4567, vshift), _mm_cmpgt_epi32(vrem4567, vremainder_threshold));
101
102 __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
103 vout01234567 = _mm_max_epi16(vout01234567, voutput_min);
104 vout01234567 = _mm_min_epi16(vout01234567, voutput_max);
105
106 __m128i vout0123456701234567 = _mm_packs_epi16(vout01234567, vout01234567);
107
108 if XNN_LIKELY(n >= (8 * sizeof(int8_t))) {
109 _mm_storel_epi64((__m128i*) output, vout0123456701234567);
110 output += 8;
111 n -= 8 * sizeof(int8_t);
112 } else {
113 if (n & (4 * sizeof(int8_t))) {
114 *((uint32_t*) output) = (uint32_t) _mm_cvtsi128_si32(vout0123456701234567);
115 vout0123456701234567 = _mm_srli_epi64(vout0123456701234567, 32);
116 output += 4;
117 }
118 if (n & (2 * sizeof(int8_t))) {
119 *((uint16_t*) output) = (uint16_t) _mm_extract_epi16(vout0123456701234567, 0);
120 vout0123456701234567 = _mm_srli_epi32(vout0123456701234567, 16);
121 output += 2;
122 }
123 if (n & (1 * sizeof(int8_t))) {
124 *output = (int8_t) _mm_extract_epi8(vout0123456701234567, 0);
125 }
126 n = 0;
127 }
128 } while (n != 0);
129 }
130}