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Marat Dukhanc46e6712021-06-01 19:00:16 -07001// Auto-generated file. Do not edit!
2// Template: src/qs8-igemm/MRx4c8-sse.c.in
3// Generator: tools/xngen
4//
5// Copyright 2020 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <emmintrin.h>
13
14#include <xnnpack/igemm.h>
15#include <xnnpack/math.h>
16
17
18void xnn_qs8_igemm_minmax_fp32_ukernel_3x4c8__sse2_ld64(
19 size_t mr,
20 size_t nc,
21 size_t kc,
22 size_t ks,
23 const int8_t** restrict a,
24 const void* restrict w,
25 int8_t* restrict c,
26 size_t cm_stride,
27 size_t cn_stride,
28 size_t a_offset,
29 const int8_t* zero,
Marat Dukhand541fc02021-12-14 00:14:27 -080030 const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
Marat Dukhanc46e6712021-06-01 19:00:16 -070031{
32 assert(mr != 0);
33 assert(mr <= 3);
34 assert(nc != 0);
35 assert(kc != 0);
36 assert(ks != 0);
37 assert(ks % (3 * sizeof(void*)) == 0);
38 assert(a_offset % sizeof(int8_t) == 0);
39 assert(a != NULL);
40 assert(w != NULL);
41 assert(c != NULL);
42
43 kc = round_up_po2(kc, 8);
44 int8_t* c0 = c;
45 int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride);
46 if XNN_UNPREDICTABLE(mr < 2) {
47 c1 = c0;
48 }
49 int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride);
50 if XNN_UNPREDICTABLE(mr <= 2) {
51 c2 = c1;
52 }
53
54 do {
55 __m128i vacc0x0 = _mm_cvtsi32_si128((int) ((const int32_t*) w)[0]);
56 __m128i vacc0x1 = _mm_cvtsi32_si128((int) ((const int32_t*) w)[1]);
57 __m128i vacc0x2 = _mm_cvtsi32_si128((int) ((const int32_t*) w)[2]);
58 __m128i vacc0x3 = _mm_cvtsi32_si128((int) ((const int32_t*) w)[3]);
59 __m128i vacc1x0 = vacc0x0;
60 __m128i vacc1x1 = vacc0x1;
61 __m128i vacc1x2 = vacc0x2;
62 __m128i vacc1x3 = vacc0x3;
63 __m128i vacc2x0 = vacc0x0;
64 __m128i vacc2x1 = vacc0x1;
65 __m128i vacc2x2 = vacc0x2;
66 __m128i vacc2x3 = vacc0x3;
Marat Dukhane5eee462021-07-01 19:34:39 -070067 w = (const void*) ((const int32_t*) w + 4);
Marat Dukhanc46e6712021-06-01 19:00:16 -070068
69 size_t p = ks;
70 do {
71 const int8_t* restrict a0 = a[0];
72 if XNN_UNPREDICTABLE(a0 != zero) {
73 a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
74 }
75 const int8_t* restrict a1 = a[1];
76 if XNN_UNPREDICTABLE(a1 != zero) {
77 a1 = (const int8_t*) ((uintptr_t) a1 + a_offset);
78 }
79 const int8_t* restrict a2 = a[2];
80 if XNN_UNPREDICTABLE(a2 != zero) {
81 a2 = (const int8_t*) ((uintptr_t) a2 + a_offset);
82 }
83 a += 3;
84
85 size_t k = 0;
86 while (k < kc) {
87 const __m128i va0 = _mm_loadl_epi64((const __m128i*) a0);
Marat Dukhane5eee462021-07-01 19:34:39 -070088 const __m128i vxa0 = _mm_srai_epi16(_mm_unpacklo_epi8(va0, va0), 8);
Marat Dukhanc46e6712021-06-01 19:00:16 -070089 a0 += 8;
90 const __m128i va1 = _mm_loadl_epi64((const __m128i*) a1);
Marat Dukhane5eee462021-07-01 19:34:39 -070091 const __m128i vxa1 = _mm_srai_epi16(_mm_unpacklo_epi8(va1, va1), 8);
Marat Dukhanc46e6712021-06-01 19:00:16 -070092 a1 += 8;
93 const __m128i va2 = _mm_loadl_epi64((const __m128i*) a2);
Marat Dukhane5eee462021-07-01 19:34:39 -070094 const __m128i vxa2 = _mm_srai_epi16(_mm_unpacklo_epi8(va2, va2), 8);
Marat Dukhanc46e6712021-06-01 19:00:16 -070095 a2 += 8;
96
97 const __m128i vb0 = _mm_loadl_epi64((const __m128i*) w);
Marat Dukhane5eee462021-07-01 19:34:39 -070098 const __m128i vxb0 = _mm_srai_epi16(_mm_unpacklo_epi8(vb0, vb0), 8);
Marat Dukhanc46e6712021-06-01 19:00:16 -070099
100 vacc0x0 = _mm_add_epi32(vacc0x0, _mm_madd_epi16(vxa0, vxb0));
101 vacc1x0 = _mm_add_epi32(vacc1x0, _mm_madd_epi16(vxa1, vxb0));
102 vacc2x0 = _mm_add_epi32(vacc2x0, _mm_madd_epi16(vxa2, vxb0));
Marat Dukhane5eee462021-07-01 19:34:39 -0700103 const __m128i vb1 = _mm_loadl_epi64((const __m128i*) ((const int8_t*) w + 8));
104 const __m128i vxb1 = _mm_srai_epi16(_mm_unpacklo_epi8(vb1, vb1), 8);
Marat Dukhanc46e6712021-06-01 19:00:16 -0700105
106 vacc0x1 = _mm_add_epi32(vacc0x1, _mm_madd_epi16(vxa0, vxb1));
107 vacc1x1 = _mm_add_epi32(vacc1x1, _mm_madd_epi16(vxa1, vxb1));
108 vacc2x1 = _mm_add_epi32(vacc2x1, _mm_madd_epi16(vxa2, vxb1));
Marat Dukhane5eee462021-07-01 19:34:39 -0700109 const __m128i vb2 = _mm_loadl_epi64((const __m128i*) ((const int8_t*) w + 16));
110 const __m128i vxb2 = _mm_srai_epi16(_mm_unpacklo_epi8(vb2, vb2), 8);
Marat Dukhanc46e6712021-06-01 19:00:16 -0700111
112 vacc0x2 = _mm_add_epi32(vacc0x2, _mm_madd_epi16(vxa0, vxb2));
113 vacc1x2 = _mm_add_epi32(vacc1x2, _mm_madd_epi16(vxa1, vxb2));
114 vacc2x2 = _mm_add_epi32(vacc2x2, _mm_madd_epi16(vxa2, vxb2));
Marat Dukhane5eee462021-07-01 19:34:39 -0700115 const __m128i vb3 = _mm_loadl_epi64((const __m128i*) ((const int8_t*) w + 24));
116 const __m128i vxb3 = _mm_srai_epi16(_mm_unpacklo_epi8(vb3, vb3), 8);
Marat Dukhanc46e6712021-06-01 19:00:16 -0700117
118 vacc0x3 = _mm_add_epi32(vacc0x3, _mm_madd_epi16(vxa0, vxb3));
119 vacc1x3 = _mm_add_epi32(vacc1x3, _mm_madd_epi16(vxa1, vxb3));
120 vacc2x3 = _mm_add_epi32(vacc2x3, _mm_madd_epi16(vxa2, vxb3));
121
Marat Dukhane5eee462021-07-01 19:34:39 -0700122 w = (const void*) ((const int8_t*) w + 32);
Marat Dukhanc46e6712021-06-01 19:00:16 -0700123 k += 8 * sizeof(int8_t);
124 }
125 p -= 3 * sizeof(void*);
126 } while (p != 0);
127
128 const __m128i vacc0x02 = _mm_add_epi32(_mm_unpacklo_epi32(vacc0x0, vacc0x2), _mm_unpackhi_epi32(vacc0x0, vacc0x2));
129 const __m128i vacc0x13 = _mm_add_epi32(_mm_unpacklo_epi32(vacc0x1, vacc0x3), _mm_unpackhi_epi32(vacc0x1, vacc0x3));
130 const __m128i vacc1x02 = _mm_add_epi32(_mm_unpacklo_epi32(vacc1x0, vacc1x2), _mm_unpackhi_epi32(vacc1x0, vacc1x2));
131 const __m128i vacc1x13 = _mm_add_epi32(_mm_unpacklo_epi32(vacc1x1, vacc1x3), _mm_unpackhi_epi32(vacc1x1, vacc1x3));
132 const __m128i vacc2x02 = _mm_add_epi32(_mm_unpacklo_epi32(vacc2x0, vacc2x2), _mm_unpackhi_epi32(vacc2x0, vacc2x2));
133 const __m128i vacc2x13 = _mm_add_epi32(_mm_unpacklo_epi32(vacc2x1, vacc2x3), _mm_unpackhi_epi32(vacc2x1, vacc2x3));
134
135 __m128i vacc0x0123 = _mm_add_epi32(_mm_unpacklo_epi32(vacc0x02, vacc0x13), _mm_unpackhi_epi32(vacc0x02, vacc0x13));
136 __m128i vacc1x0123 = _mm_add_epi32(_mm_unpacklo_epi32(vacc1x02, vacc1x13), _mm_unpackhi_epi32(vacc1x02, vacc1x13));
137 __m128i vacc2x0123 = _mm_add_epi32(_mm_unpacklo_epi32(vacc2x02, vacc2x13), _mm_unpackhi_epi32(vacc2x02, vacc2x13));
138
139 __m128 vscaled0x0123 = _mm_cvtepi32_ps(vacc0x0123);
140 __m128 vscaled1x0123 = _mm_cvtepi32_ps(vacc1x0123);
141 __m128 vscaled2x0123 = _mm_cvtepi32_ps(vacc2x0123);
142
143 const __m128 vscale = _mm_load_ps(params->fp32_sse2.scale);
144 vscaled0x0123 = _mm_mul_ps(vscaled0x0123, vscale);
145 vscaled1x0123 = _mm_mul_ps(vscaled1x0123, vscale);
146 vscaled2x0123 = _mm_mul_ps(vscaled2x0123, vscale);
147
Marat Dukhan13c9f8d2021-12-06 02:21:03 -0800148 const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse2.output_max_less_zero_point);
149 vscaled0x0123 = _mm_min_ps(vscaled0x0123, voutput_max_less_zero_point);
150 vscaled1x0123 = _mm_min_ps(vscaled1x0123, voutput_max_less_zero_point);
151 vscaled2x0123 = _mm_min_ps(vscaled2x0123, voutput_max_less_zero_point);
152
Marat Dukhanc46e6712021-06-01 19:00:16 -0700153 vacc0x0123 = _mm_cvtps_epi32(vscaled0x0123);
154 vacc1x0123 = _mm_cvtps_epi32(vscaled1x0123);
155 vacc2x0123 = _mm_cvtps_epi32(vscaled2x0123);
156
157 const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse2.output_zero_point);
158 __m128i vacc01x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc0x0123, vacc1x0123), voutput_zero_point);
159 __m128i vacc22x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc2x0123, vacc2x0123), voutput_zero_point);
160
161 const __m128i voutput_min = _mm_load_si128((const __m128i*) params->fp32_sse2.output_min);
Marat Dukhan13c9f8d2021-12-06 02:21:03 -0800162 vacc01x0123 = _mm_max_epi16(vacc01x0123, voutput_min);
163 vacc22x0123 = _mm_max_epi16(vacc22x0123, voutput_min);
Marat Dukhanc46e6712021-06-01 19:00:16 -0700164
165 __m128i vout = _mm_packs_epi16(vacc01x0123, vacc22x0123);
166
167
168 if (nc >= 4) {
169 *((uint32_t*) c2) = (uint32_t) _mm_cvtsi128_si32(_mm_shuffle_epi32(vout, _MM_SHUFFLE(2, 2, 2, 2)));
170 c2 = (int8_t*) ((uintptr_t) c2 + cn_stride);
171 *((uint32_t*) c1) = (uint32_t) _mm_cvtsi128_si32(_mm_shuffle_epi32(vout, _MM_SHUFFLE(1, 1, 1, 1)));
172 c1 = (int8_t*) ((uintptr_t) c1 + cn_stride);
173 *((uint32_t*) c0) = (uint32_t) _mm_cvtsi128_si32(vout);
174 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
175
176 a = (const int8_t**restrict) ((uintptr_t) a - ks);
177
178 nc -= 4;
179 } else {
180 if (nc & 2) {
181 *((uint16_t*) c2) = (uint16_t) _mm_extract_epi16(vout, 4);
182 c2 += 2;
183 *((uint16_t*) c1) = (uint16_t) _mm_extract_epi16(vout, 2);
184 c1 += 2;
185 *((uint16_t*) c0) = (uint16_t) _mm_extract_epi16(vout, 0);
186 c0 += 2;
187 vout = _mm_srli_epi32(vout, 16);
188 }
189 if (nc & 1) {
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700190 *c2 = (int8_t) _mm_extract_epi16(vout, 4);
191 *c1 = (int8_t) _mm_extract_epi16(vout, 2);
192 *c0 = (int8_t) _mm_cvtsi128_si32(vout);
Marat Dukhanc46e6712021-06-01 19:00:16 -0700193 }
194
195 nc = 0;
196 }
197 } while (nc != 0);
198}