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Marat Dukhan4c4eb002019-12-08 21:27:49 -08001// Auto-generated file. Do not edit!
2// Template: src/f32-raddstoreexpminusmax/avx2-p5.c.in
3// Generator: tools/xngen
4//
Marat Dukhan97579532019-10-18 16:40:39 -07005// Copyright 2019 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <immintrin.h>
13
14#include <xnnpack/raddstoreexpminusmax.h>
15
16
Marat Dukhan4c4eb002019-12-08 21:27:49 -080017static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
Marat Dukhan97579532019-10-18 16:40:39 -070018
Marat Dukhan4c4eb002019-12-08 21:27:49 -080019void xnn_f32_raddstoreexpminusmax_ukernel__avx2_p5_x80_acc2(
20 size_t elements,
Marat Dukhan97579532019-10-18 16:40:39 -070021 const float* input,
22 float* output,
23 float* sum,
24 float max)
25{
Marat Dukhan4c4eb002019-12-08 21:27:49 -080026 assert(elements % sizeof(float) == 0);
Marat Dukhan97579532019-10-18 16:40:39 -070027
28 const __m256 vmagic_bias = _mm256_set1_ps(0x1.8000FEp23f);
29 // The smallest x for which expf(x) is normalized.
30 const __m256 vdenorm_cutoff = _mm256_set1_ps(-0x1.5D589Ep6f);
31 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
32 const __m256 vminus_ln2_hi = _mm256_set1_ps(-0x1.62E43p-1f);
33 const __m256 vminus_ln2_lo = _mm256_set1_ps(0x1.05C61p-29f);
34
35 const __m256 vc1 = _mm256_set1_ps(0x1.FFFFF6p-1f);
36 const __m256 vc2 = _mm256_set1_ps(0x1.FFFDC6p-2f);
37 const __m256 vc3 = _mm256_set1_ps(0x1.555A80p-3f);
38 const __m256 vc4 = _mm256_set1_ps(0x1.573A1Ap-5f);
39 const __m256 vc5 = _mm256_set1_ps(0x1.0F9F9Cp-7f);
40
41 const __m256 vi_max = _mm256_set1_ps(max);
42
43 __m256 vacc0 = _mm256_setzero_ps();
44 __m256 vacc1 = _mm256_setzero_ps();
Marat Dukhan4c4eb002019-12-08 21:27:49 -080045 for (; elements >= 80 * sizeof(float); elements -= 80 * sizeof(float)) {
46 // Load 80 (10x8) inputs at a time.
Marat Dukhan97579532019-10-18 16:40:39 -070047 const __m256 vi0 = _mm256_loadu_ps(input);
48 const __m256 vi1 = _mm256_loadu_ps(input + 8);
49 const __m256 vi2 = _mm256_loadu_ps(input + 16);
50 const __m256 vi3 = _mm256_loadu_ps(input + 24);
51 const __m256 vi4 = _mm256_loadu_ps(input + 32);
52 const __m256 vi5 = _mm256_loadu_ps(input + 40);
53 const __m256 vi6 = _mm256_loadu_ps(input + 48);
54 const __m256 vi7 = _mm256_loadu_ps(input + 56);
Marat Dukhan4c4eb002019-12-08 21:27:49 -080055 const __m256 vi8 = _mm256_loadu_ps(input + 64);
56 const __m256 vi9 = _mm256_loadu_ps(input + 72);
57 input += 80;
Marat Dukhan97579532019-10-18 16:40:39 -070058
59 // Subtract maximum input x := i - i_max. This implies x <= 0.
60 const __m256 vx0 = _mm256_sub_ps(vi0, vi_max);
61 const __m256 vx1 = _mm256_sub_ps(vi1, vi_max);
62 const __m256 vx2 = _mm256_sub_ps(vi2, vi_max);
63 const __m256 vx3 = _mm256_sub_ps(vi3, vi_max);
64 const __m256 vx4 = _mm256_sub_ps(vi4, vi_max);
65 const __m256 vx5 = _mm256_sub_ps(vi5, vi_max);
66 const __m256 vx6 = _mm256_sub_ps(vi6, vi_max);
67 const __m256 vx7 = _mm256_sub_ps(vi7, vi_max);
Marat Dukhan4c4eb002019-12-08 21:27:49 -080068 const __m256 vx8 = _mm256_sub_ps(vi8, vi_max);
69 const __m256 vx9 = _mm256_sub_ps(vi9, vi_max);
Marat Dukhan97579532019-10-18 16:40:39 -070070
Marat Dukhan4c4eb002019-12-08 21:27:49 -080071 // Compute reduced argument elements := round(x / log(2)).
Marat Dukhan97579532019-10-18 16:40:39 -070072 __m256 vn0 = _mm256_fmadd_ps(vx0, vlog2e, vmagic_bias);
73 __m256 vn1 = _mm256_fmadd_ps(vx1, vlog2e, vmagic_bias);
74 __m256 vn2 = _mm256_fmadd_ps(vx2, vlog2e, vmagic_bias);
75 __m256 vn3 = _mm256_fmadd_ps(vx3, vlog2e, vmagic_bias);
76 __m256 vn4 = _mm256_fmadd_ps(vx4, vlog2e, vmagic_bias);
77 __m256 vn5 = _mm256_fmadd_ps(vx5, vlog2e, vmagic_bias);
78 __m256 vn6 = _mm256_fmadd_ps(vx6, vlog2e, vmagic_bias);
79 __m256 vn7 = _mm256_fmadd_ps(vx7, vlog2e, vmagic_bias);
Marat Dukhan4c4eb002019-12-08 21:27:49 -080080 __m256 vn8 = _mm256_fmadd_ps(vx8, vlog2e, vmagic_bias);
81 __m256 vn9 = _mm256_fmadd_ps(vx9, vlog2e, vmagic_bias);
Marat Dukhan97579532019-10-18 16:40:39 -070082
Marat Dukhan4c4eb002019-12-08 21:27:49 -080083 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
84 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
Marat Dukhan97579532019-10-18 16:40:39 -070085 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
86 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
87 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
88 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
89 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
90 const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23));
91 const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23));
92 const __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn7), 23));
Marat Dukhan4c4eb002019-12-08 21:27:49 -080093 const __m256 vs8 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn8), 23));
94 const __m256 vs9 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn9), 23));
Marat Dukhan97579532019-10-18 16:40:39 -070095
Marat Dukhan4c4eb002019-12-08 21:27:49 -080096 // Subtract the large number back to get final elements := round(x / log(2)).
Marat Dukhan97579532019-10-18 16:40:39 -070097 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
98 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
99 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
100 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
101 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
102 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
103 vn6 = _mm256_sub_ps(vn6, vmagic_bias);
104 vn7 = _mm256_sub_ps(vn7, vmagic_bias);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800105 vn8 = _mm256_sub_ps(vn8, vmagic_bias);
106 vn9 = _mm256_sub_ps(vn9, vmagic_bias);
Marat Dukhan97579532019-10-18 16:40:39 -0700107
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800108 // Compute reduced argument t := x - elements * log(2).
Marat Dukhan97579532019-10-18 16:40:39 -0700109 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
110 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2_hi, vx0);
111 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2_hi, vx1);
112 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2_hi, vx2);
113 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2_hi, vx3);
114 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2_hi, vx4);
115 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2_hi, vx5);
116 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2_hi, vx6);
117 __m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2_hi, vx7);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800118 __m256 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2_hi, vx8);
119 __m256 vt9 = _mm256_fmadd_ps(vn9, vminus_ln2_hi, vx9);
Marat Dukhan97579532019-10-18 16:40:39 -0700120
121 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2_lo, vt0);
122 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2_lo, vt1);
123 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2_lo, vt2);
124 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2_lo, vt3);
125 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2_lo, vt4);
126 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2_lo, vt5);
127 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2_lo, vt6);
128 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2_lo, vt7);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800129 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2_lo, vt8);
130 vt9 = _mm256_fmadd_ps(vn9, vminus_ln2_lo, vt9);
Marat Dukhan97579532019-10-18 16:40:39 -0700131
Marat Dukhan102a7392020-11-20 01:18:10 -0800132 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
Marat Dukhan97579532019-10-18 16:40:39 -0700133 __m256 vp0 = _mm256_fmadd_ps(vc5, vt0, vc4);
134 __m256 vp1 = _mm256_fmadd_ps(vc5, vt1, vc4);
135 __m256 vp2 = _mm256_fmadd_ps(vc5, vt2, vc4);
136 __m256 vp3 = _mm256_fmadd_ps(vc5, vt3, vc4);
137 __m256 vp4 = _mm256_fmadd_ps(vc5, vt4, vc4);
138 __m256 vp5 = _mm256_fmadd_ps(vc5, vt5, vc4);
139 __m256 vp6 = _mm256_fmadd_ps(vc5, vt6, vc4);
140 __m256 vp7 = _mm256_fmadd_ps(vc5, vt7, vc4);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800141 __m256 vp8 = _mm256_fmadd_ps(vc5, vt8, vc4);
142 __m256 vp9 = _mm256_fmadd_ps(vc5, vt9, vc4);
Marat Dukhan97579532019-10-18 16:40:39 -0700143
144 vp0 = _mm256_fmadd_ps(vp0, vt0, vc3);
145 vp1 = _mm256_fmadd_ps(vp1, vt1, vc3);
146 vp2 = _mm256_fmadd_ps(vp2, vt2, vc3);
147 vp3 = _mm256_fmadd_ps(vp3, vt3, vc3);
148 vp4 = _mm256_fmadd_ps(vp4, vt4, vc3);
149 vp5 = _mm256_fmadd_ps(vp5, vt5, vc3);
150 vp6 = _mm256_fmadd_ps(vp6, vt6, vc3);
151 vp7 = _mm256_fmadd_ps(vp7, vt7, vc3);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800152 vp8 = _mm256_fmadd_ps(vp8, vt8, vc3);
153 vp9 = _mm256_fmadd_ps(vp9, vt9, vc3);
Marat Dukhan97579532019-10-18 16:40:39 -0700154
155 vp0 = _mm256_fmadd_ps(vp0, vt0, vc2);
156 vp1 = _mm256_fmadd_ps(vp1, vt1, vc2);
157 vp2 = _mm256_fmadd_ps(vp2, vt2, vc2);
158 vp3 = _mm256_fmadd_ps(vp3, vt3, vc2);
159 vp4 = _mm256_fmadd_ps(vp4, vt4, vc2);
160 vp5 = _mm256_fmadd_ps(vp5, vt5, vc2);
161 vp6 = _mm256_fmadd_ps(vp6, vt6, vc2);
162 vp7 = _mm256_fmadd_ps(vp7, vt7, vc2);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800163 vp8 = _mm256_fmadd_ps(vp8, vt8, vc2);
164 vp9 = _mm256_fmadd_ps(vp9, vt9, vc2);
Marat Dukhan97579532019-10-18 16:40:39 -0700165
166 vp0 = _mm256_fmadd_ps(vp0, vt0, vc1);
167 vp1 = _mm256_fmadd_ps(vp1, vt1, vc1);
168 vp2 = _mm256_fmadd_ps(vp2, vt2, vc1);
169 vp3 = _mm256_fmadd_ps(vp3, vt3, vc1);
170 vp4 = _mm256_fmadd_ps(vp4, vt4, vc1);
171 vp5 = _mm256_fmadd_ps(vp5, vt5, vc1);
172 vp6 = _mm256_fmadd_ps(vp6, vt6, vc1);
173 vp7 = _mm256_fmadd_ps(vp7, vt7, vc1);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800174 vp8 = _mm256_fmadd_ps(vp8, vt8, vc1);
175 vp9 = _mm256_fmadd_ps(vp9, vt9, vc1);
Marat Dukhan97579532019-10-18 16:40:39 -0700176
177 // Reconstruct the final f value:
178 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
179 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
180 // = s + (t * s) * p
181 vt0 = _mm256_mul_ps(vt0, vs0);
182 vt1 = _mm256_mul_ps(vt1, vs1);
183 vt2 = _mm256_mul_ps(vt2, vs2);
184 vt3 = _mm256_mul_ps(vt3, vs3);
185 vt4 = _mm256_mul_ps(vt4, vs4);
186 vt5 = _mm256_mul_ps(vt5, vs5);
187 vt6 = _mm256_mul_ps(vt6, vs6);
188 vt7 = _mm256_mul_ps(vt7, vs7);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800189 vt8 = _mm256_mul_ps(vt8, vs8);
190 vt9 = _mm256_mul_ps(vt9, vs9);
Marat Dukhan97579532019-10-18 16:40:39 -0700191
192 __m256 vf0 = _mm256_fmadd_ps(vt0, vp0, vs0);
193 __m256 vf1 = _mm256_fmadd_ps(vt1, vp1, vs1);
194 __m256 vf2 = _mm256_fmadd_ps(vt2, vp2, vs2);
195 __m256 vf3 = _mm256_fmadd_ps(vt3, vp3, vs3);
196 __m256 vf4 = _mm256_fmadd_ps(vt4, vp4, vs4);
197 __m256 vf5 = _mm256_fmadd_ps(vt5, vp5, vs5);
198 __m256 vf6 = _mm256_fmadd_ps(vt6, vp6, vs6);
199 __m256 vf7 = _mm256_fmadd_ps(vt7, vp7, vs7);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800200 __m256 vf8 = _mm256_fmadd_ps(vt8, vp8, vs8);
201 __m256 vf9 = _mm256_fmadd_ps(vt9, vp9, vs9);
Marat Dukhan97579532019-10-18 16:40:39 -0700202
203 // For inputs below zero cutoff, replace output with +0.0f.
204 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
205 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vx0, vdenorm_cutoff, _CMP_LT_OS), vf0);
206 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vx1, vdenorm_cutoff, _CMP_LT_OS), vf1);
207 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vx2, vdenorm_cutoff, _CMP_LT_OS), vf2);
208 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vx3, vdenorm_cutoff, _CMP_LT_OS), vf3);
209 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vx4, vdenorm_cutoff, _CMP_LT_OS), vf4);
210 vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vx5, vdenorm_cutoff, _CMP_LT_OS), vf5);
211 vf6 = _mm256_andnot_ps(_mm256_cmp_ps(vx6, vdenorm_cutoff, _CMP_LT_OS), vf6);
212 vf7 = _mm256_andnot_ps(_mm256_cmp_ps(vx7, vdenorm_cutoff, _CMP_LT_OS), vf7);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800213 vf8 = _mm256_andnot_ps(_mm256_cmp_ps(vx8, vdenorm_cutoff, _CMP_LT_OS), vf8);
214 vf9 = _mm256_andnot_ps(_mm256_cmp_ps(vx9, vdenorm_cutoff, _CMP_LT_OS), vf9);
Marat Dukhan97579532019-10-18 16:40:39 -0700215
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800216 // Store 80 (10x8) outputs at a time.
Marat Dukhan97579532019-10-18 16:40:39 -0700217 _mm256_storeu_ps(output, vf0);
218 _mm256_storeu_ps(output + 8, vf1);
219 _mm256_storeu_ps(output + 16, vf2);
220 _mm256_storeu_ps(output + 24, vf3);
221 _mm256_storeu_ps(output + 32, vf4);
222 _mm256_storeu_ps(output + 40, vf5);
223 _mm256_storeu_ps(output + 48, vf6);
224 _mm256_storeu_ps(output + 56, vf7);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800225 _mm256_storeu_ps(output + 64, vf8);
226 _mm256_storeu_ps(output + 72, vf9);
227 output += 80;
Marat Dukhan97579532019-10-18 16:40:39 -0700228
229 // Accumulate computed exponents.
230 vacc0 = _mm256_add_ps(vacc0, vf0);
231 vacc1 = _mm256_add_ps(vacc1, vf1);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800232 vacc0 = _mm256_add_ps(vacc0, vf2);
233 vacc1 = _mm256_add_ps(vacc1, vf3);
Marat Dukhan97579532019-10-18 16:40:39 -0700234 vacc0 = _mm256_add_ps(vacc0, vf4);
235 vacc1 = _mm256_add_ps(vacc1, vf5);
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800236 vacc0 = _mm256_add_ps(vacc0, vf6);
237 vacc1 = _mm256_add_ps(vacc1, vf7);
238 vacc0 = _mm256_add_ps(vacc0, vf8);
239 vacc1 = _mm256_add_ps(vacc1, vf9);
Marat Dukhan97579532019-10-18 16:40:39 -0700240 }
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800241 // Add up all accumulators to vacc0
242 vacc0 = _mm256_add_ps(vacc0, vacc1);
243
244 __m256 vacc = vacc0;
245 for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
Marat Dukhan97579532019-10-18 16:40:39 -0700246 // Load 8 inputs at a time.
247 const __m256 vi = _mm256_loadu_ps(input);
248 input += 8;
249
250 // Subtract maximum input x := i - i_max. This implies x <= 0.
251 const __m256 vx = _mm256_sub_ps(vi, vi_max);
252
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800253 // Compute reduced argument elements := round(x / log(2)).
Marat Dukhan97579532019-10-18 16:40:39 -0700254 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
255
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800256 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
257 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
Marat Dukhan97579532019-10-18 16:40:39 -0700258 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
259
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800260 // Subtract the large number back to get final elements := round(x / log(2)).
Marat Dukhan97579532019-10-18 16:40:39 -0700261 vn = _mm256_sub_ps(vn, vmagic_bias);
262
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800263 // Compute reduced argument t := x - elements * log(2).
Marat Dukhan97579532019-10-18 16:40:39 -0700264 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
265 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2_hi, vx);
266 vt = _mm256_fmadd_ps(vn, vminus_ln2_lo, vt);
267
Marat Dukhan102a7392020-11-20 01:18:10 -0800268 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
Marat Dukhan97579532019-10-18 16:40:39 -0700269 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
270 vp = _mm256_fmadd_ps(vp, vt, vc3);
271 vp = _mm256_fmadd_ps(vp, vt, vc2);
272 vp = _mm256_fmadd_ps(vp, vt, vc1);
273
274 // Reconstruct the final f value:
275 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
276 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
277 // = s + (t * s) * p
278 vt = _mm256_mul_ps(vt, vs);
279 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
280
281 // For inputs below zero cutoff, replace output with +0.0f.
282 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
283 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
284
285 // Store 8 outputs at a time.
286 _mm256_storeu_ps(output, vf);
287 output += 8;
288
289 // Accumulate computed exponents.
290 vacc = _mm256_add_ps(vacc, vf);
291 }
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800292 if (elements != 0) {
293 assert(elements >= 1 * sizeof(float));
294 assert(elements <= 7 * sizeof(float));
295 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - elements));
Marat Dukhan97579532019-10-18 16:40:39 -0700296
297 // Load up to 7 inputs at a time.
298 const __m256 vi = _mm256_maskload_ps(input, vmask);
299
300 // Subtract maximum input x := i - i_max. This implies x <= 0.
301 const __m256 vx = _mm256_sub_ps(vi, vi_max);
302
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800303 // Compute reduced argument elements := round(x / log(2)).
Marat Dukhan97579532019-10-18 16:40:39 -0700304 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
305
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800306 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
307 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
Marat Dukhan97579532019-10-18 16:40:39 -0700308 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
309
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800310 // Subtract the large number back to get final elements := round(x / log(2)).
Marat Dukhan97579532019-10-18 16:40:39 -0700311 vn = _mm256_sub_ps(vn, vmagic_bias);
312
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800313 // Compute reduced argument t := x - elements * log(2).
Marat Dukhan97579532019-10-18 16:40:39 -0700314 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
315 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2_hi, vx);
316 vt = _mm256_fmadd_ps(vn, vminus_ln2_lo, vt);
317
Marat Dukhan102a7392020-11-20 01:18:10 -0800318 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
Marat Dukhan97579532019-10-18 16:40:39 -0700319 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
320 vp = _mm256_fmadd_ps(vp, vt, vc3);
321 vp = _mm256_fmadd_ps(vp, vt, vc2);
322 vp = _mm256_fmadd_ps(vp, vt, vc1);
323
324 // Reconstruct the final f value:
325 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
326 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
327 // = s + (t * s) * p
328 vt = _mm256_mul_ps(vt, vs);
329 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
330
331 // For inputs below zero cutoff, replace output with +0.0f.
332 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
333 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
334
335 // Store up to 7 outputs at a time.
336 _mm256_maskstore_ps(output, vmask, vf);
337
338 // Accumulate computed exponents. And addend with mask to leave unmasked 32-bit lanes unchanged.
339 vacc = _mm256_add_ps(vacc, _mm256_and_ps(vf, _mm256_castsi256_ps(vmask)));
340 }
341 // Reduce 8 elements in the SIMD register
342 __m128 vacc_lo = _mm_add_ps(_mm256_castps256_ps128(vacc), _mm256_extractf128_ps(vacc, 1));
343 vacc_lo = _mm_add_ps(vacc_lo, _mm_movehl_ps(vacc_lo, vacc_lo));
344 vacc_lo = _mm_add_ss(vacc_lo, _mm_movehdup_ps(vacc_lo));
345 _mm_store_ss(sum, vacc_lo);
346 _mm256_zeroupper();
347}