Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 1 | // Auto-generated file. Do not edit! |
| 2 | // Template: src/f32-raddstoreexpminusmax/avx2-p5.c.in |
| 3 | // Generator: tools/xngen |
| 4 | // |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 5 | // Copyright 2019 Google LLC |
| 6 | // |
| 7 | // This source code is licensed under the BSD-style license found in the |
| 8 | // LICENSE file in the root directory of this source tree. |
| 9 | |
| 10 | #include <assert.h> |
| 11 | |
| 12 | #include <immintrin.h> |
| 13 | |
| 14 | #include <xnnpack/raddstoreexpminusmax.h> |
| 15 | |
| 16 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 17 | static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0}; |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 18 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 19 | void xnn_f32_raddstoreexpminusmax_ukernel__avx2_p5_x96_acc3( |
| 20 | size_t elements, |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 21 | const float* input, |
| 22 | float* output, |
| 23 | float* sum, |
| 24 | float max) |
| 25 | { |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 26 | assert(elements % sizeof(float) == 0); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 27 | |
| 28 | const __m256 vmagic_bias = _mm256_set1_ps(0x1.8000FEp23f); |
| 29 | // The smallest x for which expf(x) is normalized. |
| 30 | const __m256 vdenorm_cutoff = _mm256_set1_ps(-0x1.5D589Ep6f); |
| 31 | const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f); |
| 32 | const __m256 vminus_ln2_hi = _mm256_set1_ps(-0x1.62E43p-1f); |
| 33 | const __m256 vminus_ln2_lo = _mm256_set1_ps(0x1.05C61p-29f); |
| 34 | |
| 35 | const __m256 vc1 = _mm256_set1_ps(0x1.FFFFF6p-1f); |
| 36 | const __m256 vc2 = _mm256_set1_ps(0x1.FFFDC6p-2f); |
| 37 | const __m256 vc3 = _mm256_set1_ps(0x1.555A80p-3f); |
| 38 | const __m256 vc4 = _mm256_set1_ps(0x1.573A1Ap-5f); |
| 39 | const __m256 vc5 = _mm256_set1_ps(0x1.0F9F9Cp-7f); |
| 40 | |
| 41 | const __m256 vi_max = _mm256_set1_ps(max); |
| 42 | |
| 43 | __m256 vacc0 = _mm256_setzero_ps(); |
| 44 | __m256 vacc1 = _mm256_setzero_ps(); |
| 45 | __m256 vacc2 = _mm256_setzero_ps(); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 46 | for (; elements >= 96 * sizeof(float); elements -= 96 * sizeof(float)) { |
| 47 | // Load 96 (12x8) inputs at a time. |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 48 | const __m256 vi0 = _mm256_loadu_ps(input); |
| 49 | const __m256 vi1 = _mm256_loadu_ps(input + 8); |
| 50 | const __m256 vi2 = _mm256_loadu_ps(input + 16); |
| 51 | const __m256 vi3 = _mm256_loadu_ps(input + 24); |
| 52 | const __m256 vi4 = _mm256_loadu_ps(input + 32); |
| 53 | const __m256 vi5 = _mm256_loadu_ps(input + 40); |
| 54 | const __m256 vi6 = _mm256_loadu_ps(input + 48); |
| 55 | const __m256 vi7 = _mm256_loadu_ps(input + 56); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 56 | const __m256 vi8 = _mm256_loadu_ps(input + 64); |
| 57 | const __m256 vi9 = _mm256_loadu_ps(input + 72); |
| 58 | const __m256 vi10 = _mm256_loadu_ps(input + 80); |
| 59 | const __m256 vi11 = _mm256_loadu_ps(input + 88); |
| 60 | input += 96; |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 61 | |
| 62 | // Subtract maximum input x := i - i_max. This implies x <= 0. |
| 63 | const __m256 vx0 = _mm256_sub_ps(vi0, vi_max); |
| 64 | const __m256 vx1 = _mm256_sub_ps(vi1, vi_max); |
| 65 | const __m256 vx2 = _mm256_sub_ps(vi2, vi_max); |
| 66 | const __m256 vx3 = _mm256_sub_ps(vi3, vi_max); |
| 67 | const __m256 vx4 = _mm256_sub_ps(vi4, vi_max); |
| 68 | const __m256 vx5 = _mm256_sub_ps(vi5, vi_max); |
| 69 | const __m256 vx6 = _mm256_sub_ps(vi6, vi_max); |
| 70 | const __m256 vx7 = _mm256_sub_ps(vi7, vi_max); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 71 | const __m256 vx8 = _mm256_sub_ps(vi8, vi_max); |
| 72 | const __m256 vx9 = _mm256_sub_ps(vi9, vi_max); |
| 73 | const __m256 vx10 = _mm256_sub_ps(vi10, vi_max); |
| 74 | const __m256 vx11 = _mm256_sub_ps(vi11, vi_max); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 75 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 76 | // Compute reduced argument elements := round(x / log(2)). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 77 | __m256 vn0 = _mm256_fmadd_ps(vx0, vlog2e, vmagic_bias); |
| 78 | __m256 vn1 = _mm256_fmadd_ps(vx1, vlog2e, vmagic_bias); |
| 79 | __m256 vn2 = _mm256_fmadd_ps(vx2, vlog2e, vmagic_bias); |
| 80 | __m256 vn3 = _mm256_fmadd_ps(vx3, vlog2e, vmagic_bias); |
| 81 | __m256 vn4 = _mm256_fmadd_ps(vx4, vlog2e, vmagic_bias); |
| 82 | __m256 vn5 = _mm256_fmadd_ps(vx5, vlog2e, vmagic_bias); |
| 83 | __m256 vn6 = _mm256_fmadd_ps(vx6, vlog2e, vmagic_bias); |
| 84 | __m256 vn7 = _mm256_fmadd_ps(vx7, vlog2e, vmagic_bias); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 85 | __m256 vn8 = _mm256_fmadd_ps(vx8, vlog2e, vmagic_bias); |
| 86 | __m256 vn9 = _mm256_fmadd_ps(vx9, vlog2e, vmagic_bias); |
| 87 | __m256 vn10 = _mm256_fmadd_ps(vx10, vlog2e, vmagic_bias); |
| 88 | __m256 vn11 = _mm256_fmadd_ps(vx11, vlog2e, vmagic_bias); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 89 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 90 | // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e. |
| 91 | // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly. |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 92 | const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23)); |
| 93 | const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23)); |
| 94 | const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23)); |
| 95 | const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23)); |
| 96 | const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23)); |
| 97 | const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23)); |
| 98 | const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23)); |
| 99 | const __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn7), 23)); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 100 | const __m256 vs8 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn8), 23)); |
| 101 | const __m256 vs9 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn9), 23)); |
| 102 | const __m256 vs10 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn10), 23)); |
| 103 | const __m256 vs11 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn11), 23)); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 104 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 105 | // Subtract the large number back to get final elements := round(x / log(2)). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 106 | vn0 = _mm256_sub_ps(vn0, vmagic_bias); |
| 107 | vn1 = _mm256_sub_ps(vn1, vmagic_bias); |
| 108 | vn2 = _mm256_sub_ps(vn2, vmagic_bias); |
| 109 | vn3 = _mm256_sub_ps(vn3, vmagic_bias); |
| 110 | vn4 = _mm256_sub_ps(vn4, vmagic_bias); |
| 111 | vn5 = _mm256_sub_ps(vn5, vmagic_bias); |
| 112 | vn6 = _mm256_sub_ps(vn6, vmagic_bias); |
| 113 | vn7 = _mm256_sub_ps(vn7, vmagic_bias); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 114 | vn8 = _mm256_sub_ps(vn8, vmagic_bias); |
| 115 | vn9 = _mm256_sub_ps(vn9, vmagic_bias); |
| 116 | vn10 = _mm256_sub_ps(vn10, vmagic_bias); |
| 117 | vn11 = _mm256_sub_ps(vn11, vmagic_bias); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 118 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 119 | // Compute reduced argument t := x - elements * log(2). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 120 | // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy. |
| 121 | __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2_hi, vx0); |
| 122 | __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2_hi, vx1); |
| 123 | __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2_hi, vx2); |
| 124 | __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2_hi, vx3); |
| 125 | __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2_hi, vx4); |
| 126 | __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2_hi, vx5); |
| 127 | __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2_hi, vx6); |
| 128 | __m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2_hi, vx7); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 129 | __m256 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2_hi, vx8); |
| 130 | __m256 vt9 = _mm256_fmadd_ps(vn9, vminus_ln2_hi, vx9); |
| 131 | __m256 vt10 = _mm256_fmadd_ps(vn10, vminus_ln2_hi, vx10); |
| 132 | __m256 vt11 = _mm256_fmadd_ps(vn11, vminus_ln2_hi, vx11); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 133 | |
| 134 | vt0 = _mm256_fmadd_ps(vn0, vminus_ln2_lo, vt0); |
| 135 | vt1 = _mm256_fmadd_ps(vn1, vminus_ln2_lo, vt1); |
| 136 | vt2 = _mm256_fmadd_ps(vn2, vminus_ln2_lo, vt2); |
| 137 | vt3 = _mm256_fmadd_ps(vn3, vminus_ln2_lo, vt3); |
| 138 | vt4 = _mm256_fmadd_ps(vn4, vminus_ln2_lo, vt4); |
| 139 | vt5 = _mm256_fmadd_ps(vn5, vminus_ln2_lo, vt5); |
| 140 | vt6 = _mm256_fmadd_ps(vn6, vminus_ln2_lo, vt6); |
| 141 | vt7 = _mm256_fmadd_ps(vn7, vminus_ln2_lo, vt7); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 142 | vt8 = _mm256_fmadd_ps(vn8, vminus_ln2_lo, vt8); |
| 143 | vt9 = _mm256_fmadd_ps(vn9, vminus_ln2_lo, vt9); |
| 144 | vt10 = _mm256_fmadd_ps(vn10, vminus_ln2_lo, vt10); |
| 145 | vt11 = _mm256_fmadd_ps(vn11, vminus_ln2_lo, vt11); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 146 | |
Marat Dukhan | 102a739 | 2020-11-20 01:18:10 -0800 | [diff] [blame^] | 147 | // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2]. |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 148 | __m256 vp0 = _mm256_fmadd_ps(vc5, vt0, vc4); |
| 149 | __m256 vp1 = _mm256_fmadd_ps(vc5, vt1, vc4); |
| 150 | __m256 vp2 = _mm256_fmadd_ps(vc5, vt2, vc4); |
| 151 | __m256 vp3 = _mm256_fmadd_ps(vc5, vt3, vc4); |
| 152 | __m256 vp4 = _mm256_fmadd_ps(vc5, vt4, vc4); |
| 153 | __m256 vp5 = _mm256_fmadd_ps(vc5, vt5, vc4); |
| 154 | __m256 vp6 = _mm256_fmadd_ps(vc5, vt6, vc4); |
| 155 | __m256 vp7 = _mm256_fmadd_ps(vc5, vt7, vc4); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 156 | __m256 vp8 = _mm256_fmadd_ps(vc5, vt8, vc4); |
| 157 | __m256 vp9 = _mm256_fmadd_ps(vc5, vt9, vc4); |
| 158 | __m256 vp10 = _mm256_fmadd_ps(vc5, vt10, vc4); |
| 159 | __m256 vp11 = _mm256_fmadd_ps(vc5, vt11, vc4); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 160 | |
| 161 | vp0 = _mm256_fmadd_ps(vp0, vt0, vc3); |
| 162 | vp1 = _mm256_fmadd_ps(vp1, vt1, vc3); |
| 163 | vp2 = _mm256_fmadd_ps(vp2, vt2, vc3); |
| 164 | vp3 = _mm256_fmadd_ps(vp3, vt3, vc3); |
| 165 | vp4 = _mm256_fmadd_ps(vp4, vt4, vc3); |
| 166 | vp5 = _mm256_fmadd_ps(vp5, vt5, vc3); |
| 167 | vp6 = _mm256_fmadd_ps(vp6, vt6, vc3); |
| 168 | vp7 = _mm256_fmadd_ps(vp7, vt7, vc3); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 169 | vp8 = _mm256_fmadd_ps(vp8, vt8, vc3); |
| 170 | vp9 = _mm256_fmadd_ps(vp9, vt9, vc3); |
| 171 | vp10 = _mm256_fmadd_ps(vp10, vt10, vc3); |
| 172 | vp11 = _mm256_fmadd_ps(vp11, vt11, vc3); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 173 | |
| 174 | vp0 = _mm256_fmadd_ps(vp0, vt0, vc2); |
| 175 | vp1 = _mm256_fmadd_ps(vp1, vt1, vc2); |
| 176 | vp2 = _mm256_fmadd_ps(vp2, vt2, vc2); |
| 177 | vp3 = _mm256_fmadd_ps(vp3, vt3, vc2); |
| 178 | vp4 = _mm256_fmadd_ps(vp4, vt4, vc2); |
| 179 | vp5 = _mm256_fmadd_ps(vp5, vt5, vc2); |
| 180 | vp6 = _mm256_fmadd_ps(vp6, vt6, vc2); |
| 181 | vp7 = _mm256_fmadd_ps(vp7, vt7, vc2); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 182 | vp8 = _mm256_fmadd_ps(vp8, vt8, vc2); |
| 183 | vp9 = _mm256_fmadd_ps(vp9, vt9, vc2); |
| 184 | vp10 = _mm256_fmadd_ps(vp10, vt10, vc2); |
| 185 | vp11 = _mm256_fmadd_ps(vp11, vt11, vc2); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 186 | |
| 187 | vp0 = _mm256_fmadd_ps(vp0, vt0, vc1); |
| 188 | vp1 = _mm256_fmadd_ps(vp1, vt1, vc1); |
| 189 | vp2 = _mm256_fmadd_ps(vp2, vt2, vc1); |
| 190 | vp3 = _mm256_fmadd_ps(vp3, vt3, vc1); |
| 191 | vp4 = _mm256_fmadd_ps(vp4, vt4, vc1); |
| 192 | vp5 = _mm256_fmadd_ps(vp5, vt5, vc1); |
| 193 | vp6 = _mm256_fmadd_ps(vp6, vt6, vc1); |
| 194 | vp7 = _mm256_fmadd_ps(vp7, vt7, vc1); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 195 | vp8 = _mm256_fmadd_ps(vp8, vt8, vc1); |
| 196 | vp9 = _mm256_fmadd_ps(vp9, vt9, vc1); |
| 197 | vp10 = _mm256_fmadd_ps(vp10, vt10, vc1); |
| 198 | vp11 = _mm256_fmadd_ps(vp11, vt11, vc1); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 199 | |
| 200 | // Reconstruct the final f value: |
| 201 | // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))) |
| 202 | // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))) |
| 203 | // = s + (t * s) * p |
| 204 | vt0 = _mm256_mul_ps(vt0, vs0); |
| 205 | vt1 = _mm256_mul_ps(vt1, vs1); |
| 206 | vt2 = _mm256_mul_ps(vt2, vs2); |
| 207 | vt3 = _mm256_mul_ps(vt3, vs3); |
| 208 | vt4 = _mm256_mul_ps(vt4, vs4); |
| 209 | vt5 = _mm256_mul_ps(vt5, vs5); |
| 210 | vt6 = _mm256_mul_ps(vt6, vs6); |
| 211 | vt7 = _mm256_mul_ps(vt7, vs7); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 212 | vt8 = _mm256_mul_ps(vt8, vs8); |
| 213 | vt9 = _mm256_mul_ps(vt9, vs9); |
| 214 | vt10 = _mm256_mul_ps(vt10, vs10); |
| 215 | vt11 = _mm256_mul_ps(vt11, vs11); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 216 | |
| 217 | __m256 vf0 = _mm256_fmadd_ps(vt0, vp0, vs0); |
| 218 | __m256 vf1 = _mm256_fmadd_ps(vt1, vp1, vs1); |
| 219 | __m256 vf2 = _mm256_fmadd_ps(vt2, vp2, vs2); |
| 220 | __m256 vf3 = _mm256_fmadd_ps(vt3, vp3, vs3); |
| 221 | __m256 vf4 = _mm256_fmadd_ps(vt4, vp4, vs4); |
| 222 | __m256 vf5 = _mm256_fmadd_ps(vt5, vp5, vs5); |
| 223 | __m256 vf6 = _mm256_fmadd_ps(vt6, vp6, vs6); |
| 224 | __m256 vf7 = _mm256_fmadd_ps(vt7, vp7, vs7); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 225 | __m256 vf8 = _mm256_fmadd_ps(vt8, vp8, vs8); |
| 226 | __m256 vf9 = _mm256_fmadd_ps(vt9, vp9, vs9); |
| 227 | __m256 vf10 = _mm256_fmadd_ps(vt10, vp10, vs10); |
| 228 | __m256 vf11 = _mm256_fmadd_ps(vt11, vp11, vs11); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 229 | |
| 230 | // For inputs below zero cutoff, replace output with +0.0f. |
| 231 | // Note that for NaN inputs, comparison result is false, and outputs are left unchanged. |
| 232 | vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vx0, vdenorm_cutoff, _CMP_LT_OS), vf0); |
| 233 | vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vx1, vdenorm_cutoff, _CMP_LT_OS), vf1); |
| 234 | vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vx2, vdenorm_cutoff, _CMP_LT_OS), vf2); |
| 235 | vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vx3, vdenorm_cutoff, _CMP_LT_OS), vf3); |
| 236 | vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vx4, vdenorm_cutoff, _CMP_LT_OS), vf4); |
| 237 | vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vx5, vdenorm_cutoff, _CMP_LT_OS), vf5); |
| 238 | vf6 = _mm256_andnot_ps(_mm256_cmp_ps(vx6, vdenorm_cutoff, _CMP_LT_OS), vf6); |
| 239 | vf7 = _mm256_andnot_ps(_mm256_cmp_ps(vx7, vdenorm_cutoff, _CMP_LT_OS), vf7); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 240 | vf8 = _mm256_andnot_ps(_mm256_cmp_ps(vx8, vdenorm_cutoff, _CMP_LT_OS), vf8); |
| 241 | vf9 = _mm256_andnot_ps(_mm256_cmp_ps(vx9, vdenorm_cutoff, _CMP_LT_OS), vf9); |
| 242 | vf10 = _mm256_andnot_ps(_mm256_cmp_ps(vx10, vdenorm_cutoff, _CMP_LT_OS), vf10); |
| 243 | vf11 = _mm256_andnot_ps(_mm256_cmp_ps(vx11, vdenorm_cutoff, _CMP_LT_OS), vf11); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 244 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 245 | // Store 96 (12x8) outputs at a time. |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 246 | _mm256_storeu_ps(output, vf0); |
| 247 | _mm256_storeu_ps(output + 8, vf1); |
| 248 | _mm256_storeu_ps(output + 16, vf2); |
| 249 | _mm256_storeu_ps(output + 24, vf3); |
| 250 | _mm256_storeu_ps(output + 32, vf4); |
| 251 | _mm256_storeu_ps(output + 40, vf5); |
| 252 | _mm256_storeu_ps(output + 48, vf6); |
| 253 | _mm256_storeu_ps(output + 56, vf7); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 254 | _mm256_storeu_ps(output + 64, vf8); |
| 255 | _mm256_storeu_ps(output + 72, vf9); |
| 256 | _mm256_storeu_ps(output + 80, vf10); |
| 257 | _mm256_storeu_ps(output + 88, vf11); |
| 258 | output += 96; |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 259 | |
| 260 | // Accumulate computed exponents. |
| 261 | vacc0 = _mm256_add_ps(vacc0, vf0); |
| 262 | vacc1 = _mm256_add_ps(vacc1, vf1); |
| 263 | vacc2 = _mm256_add_ps(vacc2, vf2); |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 264 | vacc0 = _mm256_add_ps(vacc0, vf3); |
| 265 | vacc1 = _mm256_add_ps(vacc1, vf4); |
| 266 | vacc2 = _mm256_add_ps(vacc2, vf5); |
| 267 | vacc0 = _mm256_add_ps(vacc0, vf6); |
| 268 | vacc1 = _mm256_add_ps(vacc1, vf7); |
| 269 | vacc2 = _mm256_add_ps(vacc2, vf8); |
| 270 | vacc0 = _mm256_add_ps(vacc0, vf9); |
| 271 | vacc1 = _mm256_add_ps(vacc1, vf10); |
| 272 | vacc2 = _mm256_add_ps(vacc2, vf11); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 273 | } |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 274 | // Add up all accumulators to vacc0 |
| 275 | vacc0 = _mm256_add_ps(vacc0, vacc1); |
| 276 | vacc0 = _mm256_add_ps(vacc0, vacc2); |
| 277 | |
| 278 | __m256 vacc = vacc0; |
| 279 | for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) { |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 280 | // Load 8 inputs at a time. |
| 281 | const __m256 vi = _mm256_loadu_ps(input); |
| 282 | input += 8; |
| 283 | |
| 284 | // Subtract maximum input x := i - i_max. This implies x <= 0. |
| 285 | const __m256 vx = _mm256_sub_ps(vi, vi_max); |
| 286 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 287 | // Compute reduced argument elements := round(x / log(2)). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 288 | __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias); |
| 289 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 290 | // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e. |
| 291 | // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly. |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 292 | const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23)); |
| 293 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 294 | // Subtract the large number back to get final elements := round(x / log(2)). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 295 | vn = _mm256_sub_ps(vn, vmagic_bias); |
| 296 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 297 | // Compute reduced argument t := x - elements * log(2). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 298 | // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy. |
| 299 | __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2_hi, vx); |
| 300 | vt = _mm256_fmadd_ps(vn, vminus_ln2_lo, vt); |
| 301 | |
Marat Dukhan | 102a739 | 2020-11-20 01:18:10 -0800 | [diff] [blame^] | 302 | // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2]. |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 303 | __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4); |
| 304 | vp = _mm256_fmadd_ps(vp, vt, vc3); |
| 305 | vp = _mm256_fmadd_ps(vp, vt, vc2); |
| 306 | vp = _mm256_fmadd_ps(vp, vt, vc1); |
| 307 | |
| 308 | // Reconstruct the final f value: |
| 309 | // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))) |
| 310 | // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))) |
| 311 | // = s + (t * s) * p |
| 312 | vt = _mm256_mul_ps(vt, vs); |
| 313 | __m256 vf = _mm256_fmadd_ps(vt, vp, vs); |
| 314 | |
| 315 | // For inputs below zero cutoff, replace output with +0.0f. |
| 316 | // Note that for NaN inputs, comparison result is false, and outputs are left unchanged. |
| 317 | vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf); |
| 318 | |
| 319 | // Store 8 outputs at a time. |
| 320 | _mm256_storeu_ps(output, vf); |
| 321 | output += 8; |
| 322 | |
| 323 | // Accumulate computed exponents. |
| 324 | vacc = _mm256_add_ps(vacc, vf); |
| 325 | } |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 326 | if (elements != 0) { |
| 327 | assert(elements >= 1 * sizeof(float)); |
| 328 | assert(elements <= 7 * sizeof(float)); |
| 329 | const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - elements)); |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 330 | |
| 331 | // Load up to 7 inputs at a time. |
| 332 | const __m256 vi = _mm256_maskload_ps(input, vmask); |
| 333 | |
| 334 | // Subtract maximum input x := i - i_max. This implies x <= 0. |
| 335 | const __m256 vx = _mm256_sub_ps(vi, vi_max); |
| 336 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 337 | // Compute reduced argument elements := round(x / log(2)). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 338 | __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias); |
| 339 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 340 | // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e. |
| 341 | // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly. |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 342 | const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23)); |
| 343 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 344 | // Subtract the large number back to get final elements := round(x / log(2)). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 345 | vn = _mm256_sub_ps(vn, vmagic_bias); |
| 346 | |
Marat Dukhan | 4c4eb00 | 2019-12-08 21:27:49 -0800 | [diff] [blame] | 347 | // Compute reduced argument t := x - elements * log(2). |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 348 | // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy. |
| 349 | __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2_hi, vx); |
| 350 | vt = _mm256_fmadd_ps(vn, vminus_ln2_lo, vt); |
| 351 | |
Marat Dukhan | 102a739 | 2020-11-20 01:18:10 -0800 | [diff] [blame^] | 352 | // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2]. |
Marat Dukhan | 9757953 | 2019-10-18 16:40:39 -0700 | [diff] [blame] | 353 | __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4); |
| 354 | vp = _mm256_fmadd_ps(vp, vt, vc3); |
| 355 | vp = _mm256_fmadd_ps(vp, vt, vc2); |
| 356 | vp = _mm256_fmadd_ps(vp, vt, vc1); |
| 357 | |
| 358 | // Reconstruct the final f value: |
| 359 | // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))) |
| 360 | // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))) |
| 361 | // = s + (t * s) * p |
| 362 | vt = _mm256_mul_ps(vt, vs); |
| 363 | __m256 vf = _mm256_fmadd_ps(vt, vp, vs); |
| 364 | |
| 365 | // For inputs below zero cutoff, replace output with +0.0f. |
| 366 | // Note that for NaN inputs, comparison result is false, and outputs are left unchanged. |
| 367 | vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf); |
| 368 | |
| 369 | // Store up to 7 outputs at a time. |
| 370 | _mm256_maskstore_ps(output, vmask, vf); |
| 371 | |
| 372 | // Accumulate computed exponents. And addend with mask to leave unmasked 32-bit lanes unchanged. |
| 373 | vacc = _mm256_add_ps(vacc, _mm256_and_ps(vf, _mm256_castsi256_ps(vmask))); |
| 374 | } |
| 375 | // Reduce 8 elements in the SIMD register |
| 376 | __m128 vacc_lo = _mm_add_ps(_mm256_castps256_ps128(vacc), _mm256_extractf128_ps(vacc, 1)); |
| 377 | vacc_lo = _mm_add_ps(vacc_lo, _mm_movehl_ps(vacc_lo, vacc_lo)); |
| 378 | vacc_lo = _mm_add_ss(vacc_lo, _mm_movehdup_ps(vacc_lo)); |
| 379 | _mm_store_ss(sum, vacc_lo); |
| 380 | _mm256_zeroupper(); |
| 381 | } |