blob: 12dac0ab97b6bdbc29f58383eb1037ddd38ef591 [file] [log] [blame]
Marat Dukhan17ec5f32019-11-22 13:34:16 -08001// Auto-generated file. Do not edit!
2// Template: src/f32-dwconv/up-avx.c.in
3// Generator: tools/xngen
4//
5// Copyright 2019 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <immintrin.h>
13
14#include <xnnpack/dwconv.h>
15
16
17static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
18
19void xnn_f32_dwconv_ukernel_up16x4__avx(
20 size_t channels,
21 size_t output_width,
22 const float** input,
23 const float* weights,
24 float* output,
25 size_t input_stride,
26 size_t output_increment,
Marat Dukhaneb09a6b2020-04-08 17:34:32 -070027 const union xnn_f32_minmax_params params[restrict static 1])
Marat Dukhan17ec5f32019-11-22 13:34:16 -080028{
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const __m256 vmax = _mm256_broadcast_ps((const __m128*) params->sse.max);
33 const __m256 vmin = _mm256_broadcast_ps((const __m128*) params->sse.min);
34 do {
35 const float* i0 = input[0];
Marat Dukhan68660992020-02-03 13:31:12 -080036 assert(i0 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080037 const float* i1 = input[1];
Marat Dukhan68660992020-02-03 13:31:12 -080038 assert(i1 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080039 const float* i2 = input[2];
Marat Dukhan68660992020-02-03 13:31:12 -080040 assert(i2 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080041 const float* i3 = input[3];
Marat Dukhan68660992020-02-03 13:31:12 -080042 assert(i3 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080043 input = (const float**) ((uintptr_t) input + input_stride);
44
45 size_t c = channels;
46 const float* w = weights;
47 for (; c >= 16; c -= 16) {
48 __m256 vacc01234567p0 = _mm256_load_ps(w);
49 __m256 vacc89ABCDEFp0 = _mm256_load_ps(w + 8);
50
51
52 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
53 const __m256 vi0x89ABCDEF = _mm256_loadu_ps(i0 + 8);
54 i0 += 16;
55
56 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
57 const __m256 vk0x89ABCDEF = _mm256_load_ps(w + 24);
58 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
59 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi0x89ABCDEF, vk0x89ABCDEF));
60
61 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
62 const __m256 vi1x89ABCDEF = _mm256_loadu_ps(i1 + 8);
63 i1 += 16;
64
65 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
66 const __m256 vk1x89ABCDEF = _mm256_load_ps(w + 40);
67 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
68 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi1x89ABCDEF, vk1x89ABCDEF));
69
70 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
71 const __m256 vi2x89ABCDEF = _mm256_loadu_ps(i2 + 8);
72 i2 += 16;
73
74 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
75 const __m256 vk2x89ABCDEF = _mm256_load_ps(w + 56);
76 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
77 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi2x89ABCDEF, vk2x89ABCDEF));
78
79 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
80 const __m256 vi3x89ABCDEF = _mm256_loadu_ps(i3 + 8);
81 i3 += 16;
82
83 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
84 const __m256 vk3x89ABCDEF = _mm256_load_ps(w + 72);
85 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
86 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi3x89ABCDEF, vk3x89ABCDEF));
87
88 w += 80;
89
90
91 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
92 __m256 vacc89ABCDEF = _mm256_max_ps(vacc89ABCDEFp0, vmin);
93 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
94 vacc89ABCDEF = _mm256_min_ps(vacc89ABCDEF, vmax);
95
96 _mm256_storeu_ps(output, vacc01234567);
97 _mm256_storeu_ps(output + 8, vacc89ABCDEF);
98 output += 16;
99 }
100 for (; c >= 8; c -= 8) {
101 __m256 vacc01234567p0 = _mm256_load_ps(w);
102
103 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
104 i0 += 8;
105
106 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
107 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
108
109 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
110 i1 += 8;
111
112 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
113 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
114
115 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
116 i2 += 8;
117
118 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
119 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
120
121 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
122 i3 += 8;
123
124 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
125 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
126
127 w += 8;
128
129
130 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
131 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
132
133 _mm256_storeu_ps(output, vacc01234567);
134 output += 8;
135 }
136 if XNN_UNLIKELY(c != 0) {
137 assert(c >= 1);
138 assert(c <= 7);
139 __m256i vmask = _mm256_loadu_si256((const __m256i*) &mask_table[7 - c]);
140
141 __m256 vacc01234567p0 = _mm256_load_ps(w);
142
143 const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
144 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
145 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
146
147 const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
148 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
149 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
150
151 const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
152 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
153 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
154
155 const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
156 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
157 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
158
159
160 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
161 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
162
Marat Dukhand16d0f02020-02-05 21:33:05 -0800163 // _mm256_maskstore_ps(output, vmask, vacc01234567); output += c; could be used here, but triggers msan failures (probably an msan bug).
164 __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
165 if (c & 4) {
166 _mm_storeu_ps(output, vacc0123);
167 vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
168 output += 4;
169 }
170 if (c & 2) {
171 _mm_storel_pi((__m64*) output, vacc0123);
172 vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
173 output += 2;
174 }
175 if (c & 1) {
176 _mm_store_ss(output, vacc0123);
177 output += 1;
178 }
Marat Dukhan17ec5f32019-11-22 13:34:16 -0800179 }
180
181 output = (float*) ((uintptr_t) output + output_increment);
182 } while (--output_width != 0);
183}