blob: fc4a327ff616b07e588e666dfd06c8febfaa6abd [file] [log] [blame]
Marat Dukhan17ec5f32019-11-22 13:34:16 -08001// Auto-generated file. Do not edit!
2// Template: src/f32-dwconv/up-avx.c.in
3// Generator: tools/xngen
4//
5// Copyright 2019 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <immintrin.h>
13
14#include <xnnpack/dwconv.h>
15
16
17static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
18
19void xnn_f32_dwconv_ukernel_up16x9__avx(
20 size_t channels,
21 size_t output_width,
22 const float** input,
23 const float* weights,
24 float* output,
25 size_t input_stride,
26 size_t output_increment,
Marat Dukhaneb09a6b2020-04-08 17:34:32 -070027 const union xnn_f32_minmax_params params[restrict static 1])
Marat Dukhan17ec5f32019-11-22 13:34:16 -080028{
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const __m256 vmax = _mm256_broadcast_ps((const __m128*) params->sse.max);
33 const __m256 vmin = _mm256_broadcast_ps((const __m128*) params->sse.min);
34 do {
35 const float* i0 = input[0];
Marat Dukhan68660992020-02-03 13:31:12 -080036 assert(i0 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080037 const float* i1 = input[1];
Marat Dukhan68660992020-02-03 13:31:12 -080038 assert(i1 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080039 const float* i2 = input[2];
Marat Dukhan68660992020-02-03 13:31:12 -080040 assert(i2 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080041 const float* i3 = input[3];
Marat Dukhan68660992020-02-03 13:31:12 -080042 assert(i3 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080043 const float* i4 = input[4];
Marat Dukhan68660992020-02-03 13:31:12 -080044 assert(i4 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080045 const float* i5 = input[5];
Marat Dukhan68660992020-02-03 13:31:12 -080046 assert(i5 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080047 const float* i6 = input[6];
Marat Dukhan68660992020-02-03 13:31:12 -080048 assert(i6 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080049 const float* i7 = input[7];
Marat Dukhan68660992020-02-03 13:31:12 -080050 assert(i7 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080051 const float* i8 = input[8];
Marat Dukhan68660992020-02-03 13:31:12 -080052 assert(i8 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080053 input = (const float**) ((uintptr_t) input + input_stride);
54
55 size_t c = channels;
56 const float* w = weights;
57 for (; c >= 16; c -= 16) {
58 __m256 vacc01234567p0 = _mm256_load_ps(w);
59 __m256 vacc89ABCDEFp0 = _mm256_load_ps(w + 8);
60
61
62 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
63 const __m256 vi0x89ABCDEF = _mm256_loadu_ps(i0 + 8);
64 i0 += 16;
65
66 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
67 const __m256 vk0x89ABCDEF = _mm256_load_ps(w + 24);
68 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
69 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi0x89ABCDEF, vk0x89ABCDEF));
70
71 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
72 const __m256 vi1x89ABCDEF = _mm256_loadu_ps(i1 + 8);
73 i1 += 16;
74
75 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
76 const __m256 vk1x89ABCDEF = _mm256_load_ps(w + 40);
77 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
78 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi1x89ABCDEF, vk1x89ABCDEF));
79
80 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
81 const __m256 vi2x89ABCDEF = _mm256_loadu_ps(i2 + 8);
82 i2 += 16;
83
84 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
85 const __m256 vk2x89ABCDEF = _mm256_load_ps(w + 56);
86 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
87 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi2x89ABCDEF, vk2x89ABCDEF));
88
89 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
90 const __m256 vi3x89ABCDEF = _mm256_loadu_ps(i3 + 8);
91 i3 += 16;
92
93 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
94 const __m256 vk3x89ABCDEF = _mm256_load_ps(w + 72);
95 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
96 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi3x89ABCDEF, vk3x89ABCDEF));
97
98 const __m256 vi4x01234567 = _mm256_loadu_ps(i4);
99 const __m256 vi4x89ABCDEF = _mm256_loadu_ps(i4 + 8);
100 i4 += 16;
101
102 const __m256 vk4x01234567 = _mm256_load_ps(w + 80);
103 const __m256 vk4x89ABCDEF = _mm256_load_ps(w + 88);
104 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));
105 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi4x89ABCDEF, vk4x89ABCDEF));
106
107 const __m256 vi5x01234567 = _mm256_loadu_ps(i5);
108 const __m256 vi5x89ABCDEF = _mm256_loadu_ps(i5 + 8);
109 i5 += 16;
110
111 const __m256 vk5x01234567 = _mm256_load_ps(w + 96);
112 const __m256 vk5x89ABCDEF = _mm256_load_ps(w + 104);
113 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi5x01234567, vk5x01234567));
114 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi5x89ABCDEF, vk5x89ABCDEF));
115
116 const __m256 vi6x01234567 = _mm256_loadu_ps(i6);
117 const __m256 vi6x89ABCDEF = _mm256_loadu_ps(i6 + 8);
118 i6 += 16;
119
120 const __m256 vk6x01234567 = _mm256_load_ps(w + 112);
121 const __m256 vk6x89ABCDEF = _mm256_load_ps(w + 120);
122 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));
123 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi6x89ABCDEF, vk6x89ABCDEF));
124
125 const __m256 vi7x01234567 = _mm256_loadu_ps(i7);
126 const __m256 vi7x89ABCDEF = _mm256_loadu_ps(i7 + 8);
127 i7 += 16;
128
129 const __m256 vk7x01234567 = _mm256_load_ps(w + 128);
130 const __m256 vk7x89ABCDEF = _mm256_load_ps(w + 136);
131 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi7x01234567, vk7x01234567));
132 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi7x89ABCDEF, vk7x89ABCDEF));
133
134 const __m256 vi8x01234567 = _mm256_loadu_ps(i8);
135 const __m256 vi8x89ABCDEF = _mm256_loadu_ps(i8 + 8);
136 i8 += 16;
137
138 const __m256 vk8x01234567 = _mm256_load_ps(w + 144);
139 const __m256 vk8x89ABCDEF = _mm256_load_ps(w + 152);
140 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));
141 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi8x89ABCDEF, vk8x89ABCDEF));
142
143 w += 160;
144
145
146 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
147 __m256 vacc89ABCDEF = _mm256_max_ps(vacc89ABCDEFp0, vmin);
148 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
149 vacc89ABCDEF = _mm256_min_ps(vacc89ABCDEF, vmax);
150
151 _mm256_storeu_ps(output, vacc01234567);
152 _mm256_storeu_ps(output + 8, vacc89ABCDEF);
153 output += 16;
154 }
155 for (; c >= 8; c -= 8) {
156 __m256 vacc01234567p0 = _mm256_load_ps(w);
157
158 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
159 i0 += 8;
160
161 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
162 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
163
164 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
165 i1 += 8;
166
167 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
168 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
169
170 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
171 i2 += 8;
172
173 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
174 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
175
176 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
177 i3 += 8;
178
179 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
180 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
181
182 const __m256 vi4x01234567 = _mm256_loadu_ps(i4);
183 i4 += 8;
184
185 const __m256 vk4x01234567 = _mm256_load_ps(w + 80);
186 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));
187
188 const __m256 vi5x01234567 = _mm256_loadu_ps(i5);
189 i5 += 8;
190
191 const __m256 vk5x01234567 = _mm256_load_ps(w + 96);
192 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi5x01234567, vk5x01234567));
193
194 const __m256 vi6x01234567 = _mm256_loadu_ps(i6);
195 i6 += 8;
196
197 const __m256 vk6x01234567 = _mm256_load_ps(w + 112);
198 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));
199
200 const __m256 vi7x01234567 = _mm256_loadu_ps(i7);
201 i7 += 8;
202
203 const __m256 vk7x01234567 = _mm256_load_ps(w + 128);
204 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi7x01234567, vk7x01234567));
205
206 const __m256 vi8x01234567 = _mm256_loadu_ps(i8);
207 i8 += 8;
208
209 const __m256 vk8x01234567 = _mm256_load_ps(w + 144);
210 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));
211
212 w += 8;
213
214
215 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
216 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
217
218 _mm256_storeu_ps(output, vacc01234567);
219 output += 8;
220 }
221 if XNN_UNLIKELY(c != 0) {
222 assert(c >= 1);
223 assert(c <= 7);
224 __m256i vmask = _mm256_loadu_si256((const __m256i*) &mask_table[7 - c]);
225
226 __m256 vacc01234567p0 = _mm256_load_ps(w);
227
228 const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
229 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
230 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
231
232 const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
233 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
234 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
235
236 const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
237 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
238 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
239
240 const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
241 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
242 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
243
244 const __m256 vi4x01234567 = _mm256_maskload_ps(i4, vmask);
245 const __m256 vk4x01234567 = _mm256_load_ps(w + 80);
246 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));
247
248 const __m256 vi5x01234567 = _mm256_maskload_ps(i5, vmask);
249 const __m256 vk5x01234567 = _mm256_load_ps(w + 96);
250 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi5x01234567, vk5x01234567));
251
252 const __m256 vi6x01234567 = _mm256_maskload_ps(i6, vmask);
253 const __m256 vk6x01234567 = _mm256_load_ps(w + 112);
254 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));
255
256 const __m256 vi7x01234567 = _mm256_maskload_ps(i7, vmask);
257 const __m256 vk7x01234567 = _mm256_load_ps(w + 128);
258 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi7x01234567, vk7x01234567));
259
260 const __m256 vi8x01234567 = _mm256_maskload_ps(i8, vmask);
261 const __m256 vk8x01234567 = _mm256_load_ps(w + 144);
262 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));
263
264
265 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
266 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
267
Marat Dukhand16d0f02020-02-05 21:33:05 -0800268 // _mm256_maskstore_ps(output, vmask, vacc01234567); output += c; could be used here, but triggers msan failures (probably an msan bug).
269 __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
270 if (c & 4) {
271 _mm_storeu_ps(output, vacc0123);
272 vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
273 output += 4;
274 }
275 if (c & 2) {
276 _mm_storel_pi((__m64*) output, vacc0123);
277 vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
278 output += 2;
279 }
280 if (c & 1) {
281 _mm_store_ss(output, vacc0123);
282 output += 1;
283 }
Marat Dukhan17ec5f32019-11-22 13:34:16 -0800284 }
285
286 output = (float*) ((uintptr_t) output + output_increment);
287 } while (--output_width != 0);
288}