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Marat Dukhan479f87e2019-11-27 15:17:06 -08001// Auto-generated file. Do not edit!
2// Template: src/f32-dwconv/up-avx512.c.in
3// Generator: tools/xngen
4//
5// Copyright 2019 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <immintrin.h>
13
14#include <xnnpack/dwconv.h>
Marat Dukhancfb31342019-12-05 10:42:57 -080015#include <xnnpack/intrinsics-polyfill.h>
Marat Dukhan479f87e2019-11-27 15:17:06 -080016
17
18void xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2(
19 size_t channels,
20 size_t output_width,
21 const float** input,
22 const float* weights,
23 float* output,
24 size_t input_stride,
25 size_t output_increment,
Marat Dukhaneb09a6b2020-04-08 17:34:32 -070026 const union xnn_f32_minmax_params params[restrict static 1])
Marat Dukhan479f87e2019-11-27 15:17:06 -080027{
28 assert(channels != 0);
29 assert(output_width != 0);
30
31 const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
32 const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
33 do {
34 const float* i0 = input[0];
Marat Dukhan68660992020-02-03 13:31:12 -080035 assert(i0 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080036 const float* i1 = input[1];
Marat Dukhan68660992020-02-03 13:31:12 -080037 assert(i1 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080038 const float* i2 = input[2];
Marat Dukhan68660992020-02-03 13:31:12 -080039 assert(i2 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080040 const float* i3 = input[3];
Marat Dukhan68660992020-02-03 13:31:12 -080041 assert(i3 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080042 const float* i4 = input[4];
Marat Dukhan68660992020-02-03 13:31:12 -080043 assert(i4 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080044 const float* i5 = input[5];
Marat Dukhan68660992020-02-03 13:31:12 -080045 assert(i5 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080046 const float* i6 = input[6];
Marat Dukhan68660992020-02-03 13:31:12 -080047 assert(i6 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080048 const float* i7 = input[7];
Marat Dukhan68660992020-02-03 13:31:12 -080049 assert(i7 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080050 const float* i8 = input[8];
Marat Dukhan68660992020-02-03 13:31:12 -080051 assert(i8 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080052 input = (const float**) ((uintptr_t) input + input_stride);
53
54 size_t c = channels;
55 const float* w = weights;
56 for (; c >= 32; c -= 32) {
57 __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
58 __m512 vaccGHIJKLMNOPQRSTUVp0 = _mm512_load_ps(w + 16);
59
60
61 const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
62 const __m512 vi0xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i0 + 16);
63 i0 += 32;
64
65 const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
66 const __m512 vk0xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 48);
67 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
68 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi0xGHIJKLMNOPQRSTUV, vk0xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
69
70 const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
71 const __m512 vi1xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i1 + 16);
72 i1 += 32;
73
74 const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
75 const __m512 vk1xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 80);
76 __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
77 __m512 vaccGHIJKLMNOPQRSTUVp1 = _mm512_mul_ps(vi1xGHIJKLMNOPQRSTUV, vk1xGHIJKLMNOPQRSTUV);
78
79 const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
80 const __m512 vi2xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i2 + 16);
81 i2 += 32;
82
83 const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
84 const __m512 vk2xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 112);
85 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
86 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi2xGHIJKLMNOPQRSTUV, vk2xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
87
88 const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
89 const __m512 vi3xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i3 + 16);
90 i3 += 32;
91
92 const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
93 const __m512 vk3xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 144);
94 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
95 vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi3xGHIJKLMNOPQRSTUV, vk3xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
96
97 const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
98 const __m512 vi4xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i4 + 16);
99 i4 += 32;
100
101 const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
102 const __m512 vk4xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 176);
103 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
104 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi4xGHIJKLMNOPQRSTUV, vk4xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
105
106 const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
107 const __m512 vi5xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i5 + 16);
108 i5 += 32;
109
110 const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
111 const __m512 vk5xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 208);
112 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
113 vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi5xGHIJKLMNOPQRSTUV, vk5xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
114
115 const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
116 const __m512 vi6xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i6 + 16);
117 i6 += 32;
118
119 const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
120 const __m512 vk6xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 240);
121 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
122 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi6xGHIJKLMNOPQRSTUV, vk6xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
123
124 const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
125 const __m512 vi7xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i7 + 16);
126 i7 += 32;
127
128 const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
129 const __m512 vk7xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 272);
130 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
131 vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi7xGHIJKLMNOPQRSTUV, vk7xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
132
133 const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
134 const __m512 vi8xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i8 + 16);
135 i8 += 32;
136
137 const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
138 const __m512 vk8xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 304);
139 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
140 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi8xGHIJKLMNOPQRSTUV, vk8xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
141
142 w += 320;
143
144 // Add up all accumulators to vacc0123456789ABCDEFGHIJKLMNOPQRSTUVp0
145 vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
146 vaccGHIJKLMNOPQRSTUVp0 = _mm512_add_ps(vaccGHIJKLMNOPQRSTUVp0, vaccGHIJKLMNOPQRSTUVp1);
147
148 __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
149 __m512 vaccGHIJKLMNOPQRSTUV = _mm512_max_ps(vaccGHIJKLMNOPQRSTUVp0, vmin);
150 vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
151 vaccGHIJKLMNOPQRSTUV = _mm512_min_ps(vaccGHIJKLMNOPQRSTUV, vmax);
152
153 _mm512_storeu_ps(output, vacc0123456789ABCDEF);
154 _mm512_storeu_ps(output + 16, vaccGHIJKLMNOPQRSTUV);
155 output += 32;
156 }
157 for (; c >= 16; c -= 16) {
158 __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
159
160 const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
161 i0 += 16;
162
163 const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
164 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
165
166 const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
167 i1 += 16;
168
169 const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
170 __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
171
172 const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
173 i2 += 16;
174
175 const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
176 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
177
178 const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
179 i3 += 16;
180
181 const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
182 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
183
184 const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
185 i4 += 16;
186
187 const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
188 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
189
190 const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
191 i5 += 16;
192
193 const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
194 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
195
196 const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
197 i6 += 16;
198
199 const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
200 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
201
202 const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
203 i7 += 16;
204
205 const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
206 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
207
208 const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
209 i8 += 16;
210
211 const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
212 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
213
214 w += 16;
215
216 // Add up all accumulators to vacc0123456789ABCDEFp0
217 vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
218
219 __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
220 vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
221
222 _mm512_storeu_ps(output, vacc0123456789ABCDEF);
223 output += 16;
224 }
225 if XNN_UNLIKELY(c != 0) {
226 assert(c >= 1);
227 assert(c <= 16);
228 // Prepare mask for valid 32-bit elements (depends on nc).
229 const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
230
Marat Dukhan90dff802020-02-10 17:23:53 -0800231 __m512 vacc0123456789ABCDEFp0 = _mm512_maskz_loadu_ps(vmask, w);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800232
233 const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
Marat Dukhan90dff802020-02-10 17:23:53 -0800234 const __m512 vk0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 32);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800235 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
236
237 const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
Marat Dukhan90dff802020-02-10 17:23:53 -0800238 const __m512 vk1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 64);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800239 __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
240
241 const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
Marat Dukhan90dff802020-02-10 17:23:53 -0800242 const __m512 vk2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 96);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800243 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
244
245 const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
Marat Dukhan90dff802020-02-10 17:23:53 -0800246 const __m512 vk3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 128);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800247 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
248
249 const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
Marat Dukhan90dff802020-02-10 17:23:53 -0800250 const __m512 vk4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 160);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800251 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
252
253 const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
Marat Dukhan90dff802020-02-10 17:23:53 -0800254 const __m512 vk5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 192);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800255 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
256
257 const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
Marat Dukhan90dff802020-02-10 17:23:53 -0800258 const __m512 vk6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 224);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800259 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
260
261 const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
Marat Dukhan90dff802020-02-10 17:23:53 -0800262 const __m512 vk7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 256);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800263 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
264
265 const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
Marat Dukhan90dff802020-02-10 17:23:53 -0800266 const __m512 vk8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 288);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800267 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
268
269 // Add up all accumulators to vacc0123456789ABCDEFp0
270 vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
271
272 __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
273 vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
274
275 _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
276 output += c;
277 }
278
279 output = (float*) ((uintptr_t) output + output_increment);
280 } while (--output_width != 0);
281}