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Marat Dukhan17ec5f32019-11-22 13:34:16 -08001// Auto-generated file. Do not edit!
2// Template: src/f32-dwconv/up-avx.c.in
3// Generator: tools/xngen
4//
5// Copyright 2019 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <immintrin.h>
13
14#include <xnnpack/dwconv.h>
15
16
17static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
18
19void xnn_f32_dwconv_ukernel_up8x25__avx_acc2(
20 size_t channels,
21 size_t output_width,
22 const float** input,
23 const float* weights,
24 float* output,
25 size_t input_stride,
26 size_t output_increment,
Marat Dukhaneb09a6b2020-04-08 17:34:32 -070027 const union xnn_f32_minmax_params params[restrict static 1])
Marat Dukhan17ec5f32019-11-22 13:34:16 -080028{
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const __m256 vmax = _mm256_broadcast_ps((const __m128*) params->sse.max);
33 const __m256 vmin = _mm256_broadcast_ps((const __m128*) params->sse.min);
34 do {
35 const float* i0 = input[0];
Marat Dukhan68660992020-02-03 13:31:12 -080036 assert(i0 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080037 const float* i1 = input[1];
Marat Dukhan68660992020-02-03 13:31:12 -080038 assert(i1 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080039 const float* i2 = input[2];
Marat Dukhan68660992020-02-03 13:31:12 -080040 assert(i2 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080041 const float* i3 = input[3];
Marat Dukhan68660992020-02-03 13:31:12 -080042 assert(i3 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080043 const float* i4 = input[4];
Marat Dukhan68660992020-02-03 13:31:12 -080044 assert(i4 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080045 const float* i5 = input[5];
Marat Dukhan68660992020-02-03 13:31:12 -080046 assert(i5 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080047 const float* i6 = input[6];
Marat Dukhan68660992020-02-03 13:31:12 -080048 assert(i6 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080049 const float* i7 = input[7];
Marat Dukhan68660992020-02-03 13:31:12 -080050 assert(i7 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080051 const float* i8 = input[8];
Marat Dukhan68660992020-02-03 13:31:12 -080052 assert(i8 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080053 const float* i9 = input[9];
Marat Dukhan68660992020-02-03 13:31:12 -080054 assert(i9 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080055 const float* i10 = input[10];
Marat Dukhan68660992020-02-03 13:31:12 -080056 assert(i10 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080057 const float* i11 = input[11];
Marat Dukhan68660992020-02-03 13:31:12 -080058 assert(i11 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080059 const float* i12 = input[12];
Marat Dukhan68660992020-02-03 13:31:12 -080060 assert(i12 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080061 const float* i13 = input[13];
Marat Dukhan68660992020-02-03 13:31:12 -080062 assert(i13 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080063 const float* i14 = input[14];
Marat Dukhan68660992020-02-03 13:31:12 -080064 assert(i14 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080065 const float* i15 = input[15];
Marat Dukhan68660992020-02-03 13:31:12 -080066 assert(i15 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080067 const float* i16 = input[16];
Marat Dukhan68660992020-02-03 13:31:12 -080068 assert(i16 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080069 const float* i17 = input[17];
Marat Dukhan68660992020-02-03 13:31:12 -080070 assert(i17 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080071 const float* i18 = input[18];
Marat Dukhan68660992020-02-03 13:31:12 -080072 assert(i18 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080073 const float* i19 = input[19];
Marat Dukhan68660992020-02-03 13:31:12 -080074 assert(i19 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080075 const float* i20 = input[20];
Marat Dukhan68660992020-02-03 13:31:12 -080076 assert(i20 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080077 const float* i21 = input[21];
Marat Dukhan68660992020-02-03 13:31:12 -080078 assert(i21 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080079 const float* i22 = input[22];
Marat Dukhan68660992020-02-03 13:31:12 -080080 assert(i22 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080081 const float* i23 = input[23];
Marat Dukhan68660992020-02-03 13:31:12 -080082 assert(i23 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080083 const float* i24 = input[24];
Marat Dukhan68660992020-02-03 13:31:12 -080084 assert(i24 != NULL);
Marat Dukhan17ec5f32019-11-22 13:34:16 -080085 input = (const float**) ((uintptr_t) input + input_stride);
86
87 size_t c = channels;
88 const float* w = weights;
89 for (; c >= 8; c -= 8) {
90 __m256 vacc01234567p0 = _mm256_load_ps(w);
91
92
93 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
94 i0 += 8;
95
96 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
97 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
98
99 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
100 i1 += 8;
101
102 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
103 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
104
105 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
106 i2 += 8;
107
108 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
109 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
110
111 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
112 i3 += 8;
113
114 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
115 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi3x01234567, vk3x01234567));
116
117 const __m256 vi4x01234567 = _mm256_loadu_ps(i4);
118 i4 += 8;
119
120 const __m256 vk4x01234567 = _mm256_load_ps(w + 40);
121 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));
122
123 const __m256 vi5x01234567 = _mm256_loadu_ps(i5);
124 i5 += 8;
125
126 const __m256 vk5x01234567 = _mm256_load_ps(w + 48);
127 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi5x01234567, vk5x01234567));
128
129 const __m256 vi6x01234567 = _mm256_loadu_ps(i6);
130 i6 += 8;
131
132 const __m256 vk6x01234567 = _mm256_load_ps(w + 56);
133 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));
134
135 const __m256 vi7x01234567 = _mm256_loadu_ps(i7);
136 i7 += 8;
137
138 const __m256 vk7x01234567 = _mm256_load_ps(w + 64);
139 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi7x01234567, vk7x01234567));
140
141 const __m256 vi8x01234567 = _mm256_loadu_ps(i8);
142 i8 += 8;
143
144 const __m256 vk8x01234567 = _mm256_load_ps(w + 72);
145 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));
146
147 const __m256 vi9x01234567 = _mm256_loadu_ps(i9);
148 i9 += 8;
149
150 const __m256 vk9x01234567 = _mm256_load_ps(w + 80);
151 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi9x01234567, vk9x01234567));
152
153 const __m256 vi10x01234567 = _mm256_loadu_ps(i10);
154 i10 += 8;
155
156 const __m256 vk10x01234567 = _mm256_load_ps(w + 88);
157 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi10x01234567, vk10x01234567));
158
159 const __m256 vi11x01234567 = _mm256_loadu_ps(i11);
160 i11 += 8;
161
162 const __m256 vk11x01234567 = _mm256_load_ps(w + 96);
163 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi11x01234567, vk11x01234567));
164
165 const __m256 vi12x01234567 = _mm256_loadu_ps(i12);
166 i12 += 8;
167
168 const __m256 vk12x01234567 = _mm256_load_ps(w + 104);
169 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi12x01234567, vk12x01234567));
170
171 const __m256 vi13x01234567 = _mm256_loadu_ps(i13);
172 i13 += 8;
173
174 const __m256 vk13x01234567 = _mm256_load_ps(w + 112);
175 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi13x01234567, vk13x01234567));
176
177 const __m256 vi14x01234567 = _mm256_loadu_ps(i14);
178 i14 += 8;
179
180 const __m256 vk14x01234567 = _mm256_load_ps(w + 120);
181 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi14x01234567, vk14x01234567));
182
183 const __m256 vi15x01234567 = _mm256_loadu_ps(i15);
184 i15 += 8;
185
186 const __m256 vk15x01234567 = _mm256_load_ps(w + 128);
187 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi15x01234567, vk15x01234567));
188
189 const __m256 vi16x01234567 = _mm256_loadu_ps(i16);
190 i16 += 8;
191
192 const __m256 vk16x01234567 = _mm256_load_ps(w + 136);
193 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi16x01234567, vk16x01234567));
194
195 const __m256 vi17x01234567 = _mm256_loadu_ps(i17);
196 i17 += 8;
197
198 const __m256 vk17x01234567 = _mm256_load_ps(w + 144);
199 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi17x01234567, vk17x01234567));
200
201 const __m256 vi18x01234567 = _mm256_loadu_ps(i18);
202 i18 += 8;
203
204 const __m256 vk18x01234567 = _mm256_load_ps(w + 152);
205 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi18x01234567, vk18x01234567));
206
207 const __m256 vi19x01234567 = _mm256_loadu_ps(i19);
208 i19 += 8;
209
210 const __m256 vk19x01234567 = _mm256_load_ps(w + 160);
211 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi19x01234567, vk19x01234567));
212
213 const __m256 vi20x01234567 = _mm256_loadu_ps(i20);
214 i20 += 8;
215
216 const __m256 vk20x01234567 = _mm256_load_ps(w + 168);
217 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi20x01234567, vk20x01234567));
218
219 const __m256 vi21x01234567 = _mm256_loadu_ps(i21);
220 i21 += 8;
221
222 const __m256 vk21x01234567 = _mm256_load_ps(w + 176);
223 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi21x01234567, vk21x01234567));
224
225 const __m256 vi22x01234567 = _mm256_loadu_ps(i22);
226 i22 += 8;
227
228 const __m256 vk22x01234567 = _mm256_load_ps(w + 184);
229 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi22x01234567, vk22x01234567));
230
231 const __m256 vi23x01234567 = _mm256_loadu_ps(i23);
232 i23 += 8;
233
234 const __m256 vk23x01234567 = _mm256_load_ps(w + 192);
235 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi23x01234567, vk23x01234567));
236
237 const __m256 vi24x01234567 = _mm256_loadu_ps(i24);
238 i24 += 8;
239
240 const __m256 vk24x01234567 = _mm256_load_ps(w + 200);
241 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi24x01234567, vk24x01234567));
242
243 w += 208;
244
245 // Add up all accumulators to vacc01234567p0
246 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
247
248 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
249 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
250
251 _mm256_storeu_ps(output, vacc01234567);
252 output += 8;
253 }
254 if XNN_UNLIKELY(c != 0) {
255 assert(c >= 1);
256 assert(c <= 7);
257 __m256i vmask = _mm256_loadu_si256((const __m256i*) &mask_table[7 - c]);
258
259 __m256 vacc01234567p0 = _mm256_load_ps(w);
260
261 const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
262 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
263 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
264
265 const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
266 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
267 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
268
269 const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
270 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
271 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
272
273 const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
274 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
275 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi3x01234567, vk3x01234567));
276
277 const __m256 vi4x01234567 = _mm256_maskload_ps(i4, vmask);
278 const __m256 vk4x01234567 = _mm256_load_ps(w + 40);
279 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));
280
281 const __m256 vi5x01234567 = _mm256_maskload_ps(i5, vmask);
282 const __m256 vk5x01234567 = _mm256_load_ps(w + 48);
283 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi5x01234567, vk5x01234567));
284
285 const __m256 vi6x01234567 = _mm256_maskload_ps(i6, vmask);
286 const __m256 vk6x01234567 = _mm256_load_ps(w + 56);
287 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));
288
289 const __m256 vi7x01234567 = _mm256_maskload_ps(i7, vmask);
290 const __m256 vk7x01234567 = _mm256_load_ps(w + 64);
291 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi7x01234567, vk7x01234567));
292
293 const __m256 vi8x01234567 = _mm256_maskload_ps(i8, vmask);
294 const __m256 vk8x01234567 = _mm256_load_ps(w + 72);
295 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));
296
297 const __m256 vi9x01234567 = _mm256_maskload_ps(i9, vmask);
298 const __m256 vk9x01234567 = _mm256_load_ps(w + 80);
299 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi9x01234567, vk9x01234567));
300
301 const __m256 vi10x01234567 = _mm256_maskload_ps(i10, vmask);
302 const __m256 vk10x01234567 = _mm256_load_ps(w + 88);
303 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi10x01234567, vk10x01234567));
304
305 const __m256 vi11x01234567 = _mm256_maskload_ps(i11, vmask);
306 const __m256 vk11x01234567 = _mm256_load_ps(w + 96);
307 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi11x01234567, vk11x01234567));
308
309 const __m256 vi12x01234567 = _mm256_maskload_ps(i12, vmask);
310 const __m256 vk12x01234567 = _mm256_load_ps(w + 104);
311 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi12x01234567, vk12x01234567));
312
313 const __m256 vi13x01234567 = _mm256_maskload_ps(i13, vmask);
314 const __m256 vk13x01234567 = _mm256_load_ps(w + 112);
315 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi13x01234567, vk13x01234567));
316
317 const __m256 vi14x01234567 = _mm256_maskload_ps(i14, vmask);
318 const __m256 vk14x01234567 = _mm256_load_ps(w + 120);
319 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi14x01234567, vk14x01234567));
320
321 const __m256 vi15x01234567 = _mm256_maskload_ps(i15, vmask);
322 const __m256 vk15x01234567 = _mm256_load_ps(w + 128);
323 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi15x01234567, vk15x01234567));
324
325 const __m256 vi16x01234567 = _mm256_maskload_ps(i16, vmask);
326 const __m256 vk16x01234567 = _mm256_load_ps(w + 136);
327 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi16x01234567, vk16x01234567));
328
329 const __m256 vi17x01234567 = _mm256_maskload_ps(i17, vmask);
330 const __m256 vk17x01234567 = _mm256_load_ps(w + 144);
331 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi17x01234567, vk17x01234567));
332
333 const __m256 vi18x01234567 = _mm256_maskload_ps(i18, vmask);
334 const __m256 vk18x01234567 = _mm256_load_ps(w + 152);
335 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi18x01234567, vk18x01234567));
336
337 const __m256 vi19x01234567 = _mm256_maskload_ps(i19, vmask);
338 const __m256 vk19x01234567 = _mm256_load_ps(w + 160);
339 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi19x01234567, vk19x01234567));
340
341 const __m256 vi20x01234567 = _mm256_maskload_ps(i20, vmask);
342 const __m256 vk20x01234567 = _mm256_load_ps(w + 168);
343 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi20x01234567, vk20x01234567));
344
345 const __m256 vi21x01234567 = _mm256_maskload_ps(i21, vmask);
346 const __m256 vk21x01234567 = _mm256_load_ps(w + 176);
347 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi21x01234567, vk21x01234567));
348
349 const __m256 vi22x01234567 = _mm256_maskload_ps(i22, vmask);
350 const __m256 vk22x01234567 = _mm256_load_ps(w + 184);
351 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi22x01234567, vk22x01234567));
352
353 const __m256 vi23x01234567 = _mm256_maskload_ps(i23, vmask);
354 const __m256 vk23x01234567 = _mm256_load_ps(w + 192);
355 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi23x01234567, vk23x01234567));
356
357 const __m256 vi24x01234567 = _mm256_maskload_ps(i24, vmask);
358 const __m256 vk24x01234567 = _mm256_load_ps(w + 200);
359 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi24x01234567, vk24x01234567));
360
361 // Add up all accumulators to vacc01234567p0
362 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
363
364 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
365 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
366
Marat Dukhand16d0f02020-02-05 21:33:05 -0800367 // _mm256_maskstore_ps(output, vmask, vacc01234567); output += c; could be used here, but triggers msan failures (probably an msan bug).
368 __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
369 if (c & 4) {
370 _mm_storeu_ps(output, vacc0123);
371 vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
372 output += 4;
373 }
374 if (c & 2) {
375 _mm_storel_pi((__m64*) output, vacc0123);
376 vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
377 output += 2;
378 }
379 if (c & 1) {
380 _mm_store_ss(output, vacc0123);
381 output += 1;
382 }
Marat Dukhan17ec5f32019-11-22 13:34:16 -0800383 }
384
385 output = (float*) ((uintptr_t) output + output_increment);
386 } while (--output_width != 0);
387}