XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Auto-generated file. Do not edit! |
| 2 | // Template: src/f32-ppmm/neon.c.in |
| 3 | // Generator: tools/xngen |
| 4 | // |
| 5 | // Copyright 2019 Google LLC |
| 6 | // |
| 7 | // This source code is licensed under the BSD-style license found in the |
| 8 | // LICENSE file in the root directory of this source tree. |
| 9 | |
| 10 | #include <assert.h> |
| 11 | |
| 12 | #include <arm_neon.h> |
| 13 | |
Marat Dukhan | c72fa1e | 2019-11-27 11:54:03 -0800 | [diff] [blame] | 14 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 15 | #include <xnnpack/ppmm.h> |
| 16 | |
| 17 | |
| 18 | void xnn_f32_ppmm_ukernel_8x8__neonfma( |
| 19 | size_t mr, |
| 20 | size_t nc, |
| 21 | size_t kc, |
| 22 | const float*restrict a, |
| 23 | const float*restrict w, |
| 24 | float*restrict c, |
| 25 | size_t cm_stride, |
| 26 | size_t cn_stride, |
Marat Dukhan | eb09a6b | 2020-04-08 17:34:32 -0700 | [diff] [blame] | 27 | const union xnn_f32_minmax_params params[restrict static 1]) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 28 | { |
| 29 | assert(mr != 0); |
| 30 | assert(mr <= 8); |
| 31 | assert(nc != 0); |
| 32 | assert(kc != 0); |
| 33 | assert(kc % sizeof(float) == 0); |
| 34 | |
| 35 | float* c0 = c; |
| 36 | float* c1 = (float*) ((uintptr_t) c0 + cm_stride); |
| 37 | if XNN_UNPREDICTABLE(mr < 2) { |
| 38 | c1 = c0; |
| 39 | } |
| 40 | float* c2 = (float*) ((uintptr_t) c1 + cm_stride); |
| 41 | if XNN_UNPREDICTABLE(mr <= 2) { |
| 42 | c2 = c1; |
| 43 | } |
| 44 | float* c3 = (float*) ((uintptr_t) c2 + cm_stride); |
| 45 | if XNN_UNPREDICTABLE(mr < 4) { |
| 46 | c3 = c2; |
| 47 | } |
| 48 | float* c4 = (float*) ((uintptr_t) c3 + cm_stride); |
| 49 | if XNN_UNPREDICTABLE(mr <= 4) { |
| 50 | c4 = c3; |
| 51 | } |
| 52 | float* c5 = (float*) ((uintptr_t) c4 + cm_stride); |
| 53 | if XNN_UNPREDICTABLE(mr < 6) { |
| 54 | c5 = c4; |
| 55 | } |
| 56 | float* c6 = (float*) ((uintptr_t) c5 + cm_stride); |
| 57 | if XNN_UNPREDICTABLE(mr <= 6) { |
| 58 | c6 = c5; |
| 59 | } |
| 60 | float* c7 = (float*) ((uintptr_t) c6 + cm_stride); |
| 61 | if XNN_UNPREDICTABLE(mr != 8) { |
| 62 | c7 = c6; |
| 63 | } |
| 64 | |
| 65 | do { |
| 66 | float32x4_t vacc0x0123 = vld1q_f32(w); w += 4; |
| 67 | float32x4_t vacc0x4567 = vld1q_f32(w); w += 4; |
| 68 | float32x4_t vacc1x0123 = vacc0x0123; |
| 69 | float32x4_t vacc1x4567 = vacc0x4567; |
| 70 | float32x4_t vacc2x0123 = vacc0x0123; |
| 71 | float32x4_t vacc2x4567 = vacc0x4567; |
| 72 | float32x4_t vacc3x0123 = vacc0x0123; |
| 73 | float32x4_t vacc3x4567 = vacc0x4567; |
| 74 | float32x4_t vacc4x0123 = vacc0x0123; |
| 75 | float32x4_t vacc4x4567 = vacc0x4567; |
| 76 | float32x4_t vacc5x0123 = vacc0x0123; |
| 77 | float32x4_t vacc5x4567 = vacc0x4567; |
| 78 | float32x4_t vacc6x0123 = vacc0x0123; |
| 79 | float32x4_t vacc6x4567 = vacc0x4567; |
| 80 | float32x4_t vacc7x0123 = vacc0x0123; |
| 81 | float32x4_t vacc7x4567 = vacc0x4567; |
| 82 | |
| 83 | size_t k = kc; |
| 84 | do { |
| 85 | const float32x4_t va0123 = vld1q_f32(a); a += 4; |
| 86 | const float32x4_t va4567 = vld1q_f32(a); a += 4; |
| 87 | |
| 88 | const float32x4_t vb0123 = vld1q_f32(w); w += 4; |
| 89 | const float32x4_t vb4567 = vld1q_f32(w); w += 4; |
| 90 | |
Marat Dukhan | c72fa1e | 2019-11-27 11:54:03 -0800 | [diff] [blame] | 91 | #if XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 92 | vacc0x0123 = vfmaq_laneq_f32(vacc0x0123, vb0123, va0123, 0); |
| 93 | vacc1x0123 = vfmaq_laneq_f32(vacc1x0123, vb0123, va0123, 1); |
| 94 | vacc2x0123 = vfmaq_laneq_f32(vacc2x0123, vb0123, va0123, 2); |
| 95 | vacc3x0123 = vfmaq_laneq_f32(vacc3x0123, vb0123, va0123, 3); |
| 96 | vacc4x0123 = vfmaq_laneq_f32(vacc4x0123, vb0123, va4567, 0); |
| 97 | vacc5x0123 = vfmaq_laneq_f32(vacc5x0123, vb0123, va4567, 1); |
| 98 | vacc6x0123 = vfmaq_laneq_f32(vacc6x0123, vb0123, va4567, 2); |
| 99 | vacc7x0123 = vfmaq_laneq_f32(vacc7x0123, vb0123, va4567, 3); |
| 100 | vacc0x4567 = vfmaq_laneq_f32(vacc0x4567, vb4567, va0123, 0); |
| 101 | vacc1x4567 = vfmaq_laneq_f32(vacc1x4567, vb4567, va0123, 1); |
| 102 | vacc2x4567 = vfmaq_laneq_f32(vacc2x4567, vb4567, va0123, 2); |
| 103 | vacc3x4567 = vfmaq_laneq_f32(vacc3x4567, vb4567, va0123, 3); |
| 104 | vacc4x4567 = vfmaq_laneq_f32(vacc4x4567, vb4567, va4567, 0); |
| 105 | vacc5x4567 = vfmaq_laneq_f32(vacc5x4567, vb4567, va4567, 1); |
| 106 | vacc6x4567 = vfmaq_laneq_f32(vacc6x4567, vb4567, va4567, 2); |
| 107 | vacc7x4567 = vfmaq_laneq_f32(vacc7x4567, vb4567, va4567, 3); |
| 108 | #else |
| 109 | const float32x4_t va0000 = vdupq_lane_f32(vget_low_f32(va0123), 0); |
| 110 | const float32x4_t va1111 = vdupq_lane_f32(vget_low_f32(va0123), 1); |
| 111 | const float32x4_t va2222 = vdupq_lane_f32(vget_high_f32(va0123), 0); |
| 112 | const float32x4_t va3333 = vdupq_lane_f32(vget_high_f32(va0123), 1); |
| 113 | const float32x4_t va4444 = vdupq_lane_f32(vget_low_f32(va4567), 0); |
| 114 | const float32x4_t va5555 = vdupq_lane_f32(vget_low_f32(va4567), 1); |
| 115 | const float32x4_t va6666 = vdupq_lane_f32(vget_high_f32(va4567), 0); |
| 116 | const float32x4_t va7777 = vdupq_lane_f32(vget_high_f32(va4567), 1); |
| 117 | |
| 118 | vacc0x0123 = vfmaq_f32(vacc0x0123, va0000, vb0123); |
| 119 | vacc1x0123 = vfmaq_f32(vacc1x0123, va1111, vb0123); |
| 120 | vacc2x0123 = vfmaq_f32(vacc2x0123, va2222, vb0123); |
| 121 | vacc3x0123 = vfmaq_f32(vacc3x0123, va3333, vb0123); |
| 122 | vacc4x0123 = vfmaq_f32(vacc4x0123, va4444, vb0123); |
| 123 | vacc5x0123 = vfmaq_f32(vacc5x0123, va5555, vb0123); |
| 124 | vacc6x0123 = vfmaq_f32(vacc6x0123, va6666, vb0123); |
| 125 | vacc7x0123 = vfmaq_f32(vacc7x0123, va7777, vb0123); |
| 126 | vacc0x4567 = vfmaq_f32(vacc0x4567, va0000, vb4567); |
| 127 | vacc1x4567 = vfmaq_f32(vacc1x4567, va1111, vb4567); |
| 128 | vacc2x4567 = vfmaq_f32(vacc2x4567, va2222, vb4567); |
| 129 | vacc3x4567 = vfmaq_f32(vacc3x4567, va3333, vb4567); |
| 130 | vacc4x4567 = vfmaq_f32(vacc4x4567, va4444, vb4567); |
| 131 | vacc5x4567 = vfmaq_f32(vacc5x4567, va5555, vb4567); |
| 132 | vacc6x4567 = vfmaq_f32(vacc6x4567, va6666, vb4567); |
| 133 | vacc7x4567 = vfmaq_f32(vacc7x4567, va7777, vb4567); |
| 134 | #endif |
| 135 | |
| 136 | k -= sizeof(float); |
| 137 | } while (k != 0); |
| 138 | |
Frank Barchard | fcfdc0e | 2019-10-21 15:58:42 -0700 | [diff] [blame] | 139 | const float32x4_t vmax = vld1q_dup_f32(¶ms->scalar.max); |
| 140 | vacc0x0123 = vminq_f32(vacc0x0123, vmax); |
| 141 | vacc1x0123 = vminq_f32(vacc1x0123, vmax); |
| 142 | vacc2x0123 = vminq_f32(vacc2x0123, vmax); |
| 143 | vacc3x0123 = vminq_f32(vacc3x0123, vmax); |
| 144 | vacc4x0123 = vminq_f32(vacc4x0123, vmax); |
| 145 | vacc5x0123 = vminq_f32(vacc5x0123, vmax); |
| 146 | vacc6x0123 = vminq_f32(vacc6x0123, vmax); |
| 147 | vacc7x0123 = vminq_f32(vacc7x0123, vmax); |
| 148 | vacc0x4567 = vminq_f32(vacc0x4567, vmax); |
| 149 | vacc1x4567 = vminq_f32(vacc1x4567, vmax); |
| 150 | vacc2x4567 = vminq_f32(vacc2x4567, vmax); |
| 151 | vacc3x4567 = vminq_f32(vacc3x4567, vmax); |
| 152 | vacc4x4567 = vminq_f32(vacc4x4567, vmax); |
| 153 | vacc5x4567 = vminq_f32(vacc5x4567, vmax); |
| 154 | vacc6x4567 = vminq_f32(vacc6x4567, vmax); |
| 155 | vacc7x4567 = vminq_f32(vacc7x4567, vmax); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 156 | |
Frank Barchard | fcfdc0e | 2019-10-21 15:58:42 -0700 | [diff] [blame] | 157 | const float32x4_t vmin = vld1q_dup_f32(¶ms->scalar.min); |
| 158 | vacc0x0123 = vmaxq_f32(vacc0x0123, vmin); |
| 159 | vacc1x0123 = vmaxq_f32(vacc1x0123, vmin); |
| 160 | vacc2x0123 = vmaxq_f32(vacc2x0123, vmin); |
| 161 | vacc3x0123 = vmaxq_f32(vacc3x0123, vmin); |
| 162 | vacc4x0123 = vmaxq_f32(vacc4x0123, vmin); |
| 163 | vacc5x0123 = vmaxq_f32(vacc5x0123, vmin); |
| 164 | vacc6x0123 = vmaxq_f32(vacc6x0123, vmin); |
| 165 | vacc7x0123 = vmaxq_f32(vacc7x0123, vmin); |
| 166 | vacc0x4567 = vmaxq_f32(vacc0x4567, vmin); |
| 167 | vacc1x4567 = vmaxq_f32(vacc1x4567, vmin); |
| 168 | vacc2x4567 = vmaxq_f32(vacc2x4567, vmin); |
| 169 | vacc3x4567 = vmaxq_f32(vacc3x4567, vmin); |
| 170 | vacc4x4567 = vmaxq_f32(vacc4x4567, vmin); |
| 171 | vacc5x4567 = vmaxq_f32(vacc5x4567, vmin); |
| 172 | vacc6x4567 = vmaxq_f32(vacc6x4567, vmin); |
| 173 | vacc7x4567 = vmaxq_f32(vacc7x4567, vmin); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 174 | |
| 175 | if XNN_LIKELY(nc >= 8) { |
| 176 | vst1q_f32(c7, vacc7x0123); |
| 177 | vst1q_f32(c7 + 4, vacc7x4567); |
| 178 | c7 = (float*) ((uintptr_t) c7 + cn_stride); |
| 179 | vst1q_f32(c6, vacc6x0123); |
| 180 | vst1q_f32(c6 + 4, vacc6x4567); |
| 181 | c6 = (float*) ((uintptr_t) c6 + cn_stride); |
| 182 | vst1q_f32(c5, vacc5x0123); |
| 183 | vst1q_f32(c5 + 4, vacc5x4567); |
| 184 | c5 = (float*) ((uintptr_t) c5 + cn_stride); |
| 185 | vst1q_f32(c4, vacc4x0123); |
| 186 | vst1q_f32(c4 + 4, vacc4x4567); |
| 187 | c4 = (float*) ((uintptr_t) c4 + cn_stride); |
| 188 | vst1q_f32(c3, vacc3x0123); |
| 189 | vst1q_f32(c3 + 4, vacc3x4567); |
| 190 | c3 = (float*) ((uintptr_t) c3 + cn_stride); |
| 191 | vst1q_f32(c2, vacc2x0123); |
| 192 | vst1q_f32(c2 + 4, vacc2x4567); |
| 193 | c2 = (float*) ((uintptr_t) c2 + cn_stride); |
| 194 | vst1q_f32(c1, vacc1x0123); |
| 195 | vst1q_f32(c1 + 4, vacc1x4567); |
| 196 | c1 = (float*) ((uintptr_t) c1 + cn_stride); |
| 197 | vst1q_f32(c0, vacc0x0123); |
| 198 | vst1q_f32(c0 + 4, vacc0x4567); |
| 199 | c0 = (float*) ((uintptr_t) c0 + cn_stride); |
| 200 | |
| 201 | a = (const float*) ((uintptr_t) a - kc * 8); |
| 202 | |
| 203 | nc -= 8; |
| 204 | } else { |
| 205 | if (nc & 4) { |
| 206 | vst1q_f32(c7, vacc7x0123); c7 += 4; |
| 207 | vst1q_f32(c6, vacc6x0123); c6 += 4; |
| 208 | vst1q_f32(c5, vacc5x0123); c5 += 4; |
| 209 | vst1q_f32(c4, vacc4x0123); c4 += 4; |
| 210 | vst1q_f32(c3, vacc3x0123); c3 += 4; |
| 211 | vst1q_f32(c2, vacc2x0123); c2 += 4; |
| 212 | vst1q_f32(c1, vacc1x0123); c1 += 4; |
| 213 | vst1q_f32(c0, vacc0x0123); c0 += 4; |
| 214 | |
| 215 | vacc7x0123 = vacc7x4567; |
| 216 | vacc6x0123 = vacc6x4567; |
| 217 | vacc5x0123 = vacc5x4567; |
| 218 | vacc4x0123 = vacc4x4567; |
| 219 | vacc3x0123 = vacc3x4567; |
| 220 | vacc2x0123 = vacc2x4567; |
| 221 | vacc1x0123 = vacc1x4567; |
| 222 | vacc0x0123 = vacc0x4567; |
| 223 | } |
| 224 | float32x2_t vacc7x01 = vget_low_f32(vacc7x0123); |
| 225 | float32x2_t vacc6x01 = vget_low_f32(vacc6x0123); |
| 226 | float32x2_t vacc5x01 = vget_low_f32(vacc5x0123); |
| 227 | float32x2_t vacc4x01 = vget_low_f32(vacc4x0123); |
| 228 | float32x2_t vacc3x01 = vget_low_f32(vacc3x0123); |
| 229 | float32x2_t vacc2x01 = vget_low_f32(vacc2x0123); |
| 230 | float32x2_t vacc1x01 = vget_low_f32(vacc1x0123); |
| 231 | float32x2_t vacc0x01 = vget_low_f32(vacc0x0123); |
| 232 | if (nc & 2) { |
| 233 | vst1_f32(c7, vacc7x01); c7 += 2; |
| 234 | vst1_f32(c6, vacc6x01); c6 += 2; |
| 235 | vst1_f32(c5, vacc5x01); c5 += 2; |
| 236 | vst1_f32(c4, vacc4x01); c4 += 2; |
| 237 | vst1_f32(c3, vacc3x01); c3 += 2; |
| 238 | vst1_f32(c2, vacc2x01); c2 += 2; |
| 239 | vst1_f32(c1, vacc1x01); c1 += 2; |
| 240 | vst1_f32(c0, vacc0x01); c0 += 2; |
| 241 | |
| 242 | vacc7x01 = vget_high_f32(vacc7x0123); |
| 243 | vacc6x01 = vget_high_f32(vacc6x0123); |
| 244 | vacc5x01 = vget_high_f32(vacc5x0123); |
| 245 | vacc4x01 = vget_high_f32(vacc4x0123); |
| 246 | vacc3x01 = vget_high_f32(vacc3x0123); |
| 247 | vacc2x01 = vget_high_f32(vacc2x0123); |
| 248 | vacc1x01 = vget_high_f32(vacc1x0123); |
| 249 | vacc0x01 = vget_high_f32(vacc0x0123); |
| 250 | } |
| 251 | if (nc & 1) { |
| 252 | vst1_lane_f32(c7, vacc7x01, 0); |
| 253 | vst1_lane_f32(c6, vacc6x01, 0); |
| 254 | vst1_lane_f32(c5, vacc5x01, 0); |
| 255 | vst1_lane_f32(c4, vacc4x01, 0); |
| 256 | vst1_lane_f32(c3, vacc3x01, 0); |
| 257 | vst1_lane_f32(c2, vacc2x01, 0); |
| 258 | vst1_lane_f32(c1, vacc1x01, 0); |
| 259 | vst1_lane_f32(c0, vacc0x01, 0); |
| 260 | } |
| 261 | |
| 262 | nc = 0; |
| 263 | } |
| 264 | } while (nc != 0); |
| 265 | } |