Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 1 | // Auto-generated file. Do not edit! |
| 2 | // Template: src/qs8-igemm/MRx4c8-sse.c.in |
| 3 | // Generator: tools/xngen |
| 4 | // |
| 5 | // Copyright 2020 Google LLC |
| 6 | // |
| 7 | // This source code is licensed under the BSD-style license found in the |
| 8 | // LICENSE file in the root directory of this source tree. |
| 9 | |
| 10 | #include <assert.h> |
| 11 | |
| 12 | #include <smmintrin.h> |
| 13 | |
| 14 | #include <xnnpack/igemm.h> |
| 15 | #include <xnnpack/math.h> |
| 16 | |
| 17 | |
| 18 | void xnn_qs8_igemm_minmax_fp32_ukernel_1x4c8__sse41_ld128( |
| 19 | size_t mr, |
| 20 | size_t nc, |
| 21 | size_t kc, |
| 22 | size_t ks, |
| 23 | const int8_t** restrict a, |
| 24 | const void* restrict w, |
| 25 | int8_t* restrict c, |
| 26 | size_t cm_stride, |
| 27 | size_t cn_stride, |
| 28 | size_t a_offset, |
| 29 | const int8_t* zero, |
| 30 | const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN |
| 31 | { |
| 32 | assert(mr != 0); |
| 33 | assert(mr <= 1); |
| 34 | assert(nc != 0); |
| 35 | assert(kc != 0); |
| 36 | assert(ks != 0); |
| 37 | assert(ks % (1 * sizeof(void*)) == 0); |
| 38 | assert(a_offset % sizeof(int8_t) == 0); |
| 39 | assert(a != NULL); |
| 40 | assert(w != NULL); |
| 41 | assert(c != NULL); |
| 42 | |
| 43 | kc = round_up_po2(kc, 8); |
| 44 | int8_t* c0 = c; |
| 45 | |
| 46 | do { |
| 47 | __m128i vacc0x0 = _mm_cvtsi32_si128((int) ((const int32_t*) w)[0]); |
| 48 | __m128i vacc0x1 = _mm_cvtsi32_si128((int) ((const int32_t*) w)[1]); |
| 49 | __m128i vacc0x2 = _mm_cvtsi32_si128((int) ((const int32_t*) w)[2]); |
| 50 | __m128i vacc0x3 = _mm_cvtsi32_si128((int) ((const int32_t*) w)[3]); |
Marat Dukhan | e5eee46 | 2021-07-01 19:34:39 -0700 | [diff] [blame] | 51 | w = (const void*) ((const int32_t*) w + 4); |
Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 52 | |
| 53 | size_t p = ks; |
| 54 | do { |
| 55 | const int8_t* restrict a0 = a[0]; |
| 56 | if XNN_UNPREDICTABLE(a0 != zero) { |
| 57 | a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); |
| 58 | } |
| 59 | a += 1; |
| 60 | |
| 61 | size_t k = 0; |
| 62 | while (k < kc) { |
| 63 | const __m128i va0 = _mm_loadl_epi64((const __m128i*) a0); |
| 64 | const __m128i vxa0 = _mm_cvtepi8_epi16(va0); |
| 65 | a0 += 8; |
| 66 | |
| 67 | const __m128i vb01 = _mm_load_si128((const __m128i*) w); |
Marat Dukhan | 0c2a31e | 2021-08-10 16:24:28 -0700 | [diff] [blame] | 68 | const __m128i vxb0 = _mm_cvtepi8_epi16(vb01); |
| 69 | const __m128i vxb1 = _mm_srai_epi16(_mm_unpackhi_epi8(vb01, vb01), 8); |
Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 70 | |
| 71 | vacc0x0 = _mm_add_epi32(vacc0x0, _mm_madd_epi16(vxa0, vxb0)); |
| 72 | vacc0x1 = _mm_add_epi32(vacc0x1, _mm_madd_epi16(vxa0, vxb1)); |
Marat Dukhan | e5eee46 | 2021-07-01 19:34:39 -0700 | [diff] [blame] | 73 | const __m128i vb23 = _mm_load_si128((const __m128i*) ((const int8_t*) w + 16)); |
Marat Dukhan | 0c2a31e | 2021-08-10 16:24:28 -0700 | [diff] [blame] | 74 | const __m128i vxb2 = _mm_cvtepi8_epi16(vb23); |
| 75 | const __m128i vxb3 = _mm_srai_epi16(_mm_unpackhi_epi8(vb23, vb23), 8); |
Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 76 | |
| 77 | vacc0x2 = _mm_add_epi32(vacc0x2, _mm_madd_epi16(vxa0, vxb2)); |
| 78 | vacc0x3 = _mm_add_epi32(vacc0x3, _mm_madd_epi16(vxa0, vxb3)); |
| 79 | |
Marat Dukhan | e5eee46 | 2021-07-01 19:34:39 -0700 | [diff] [blame] | 80 | w = (const void*) ((const int8_t*) w + 32); |
Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 81 | k += 8 * sizeof(int8_t); |
| 82 | } |
| 83 | p -= 1 * sizeof(void*); |
| 84 | } while (p != 0); |
| 85 | |
| 86 | const __m128i vacc0x01 = _mm_hadd_epi32(vacc0x0, vacc0x1); |
| 87 | const __m128i vacc0x23 = _mm_hadd_epi32(vacc0x2, vacc0x3); |
| 88 | |
| 89 | __m128i vacc0x0123 = _mm_hadd_epi32(vacc0x01, vacc0x23); |
| 90 | |
| 91 | __m128 vscaled0x0123 = _mm_cvtepi32_ps(vacc0x0123); |
| 92 | |
| 93 | const __m128 vscale = _mm_load_ps(params->fp32_sse4.scale); |
| 94 | vscaled0x0123 = _mm_mul_ps(vscaled0x0123, vscale); |
| 95 | |
| 96 | vacc0x0123 = _mm_cvtps_epi32(vscaled0x0123); |
| 97 | |
| 98 | const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse4.output_zero_point); |
| 99 | __m128i vacc00x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc0x0123, vacc0x0123), voutput_zero_point); |
| 100 | |
| 101 | |
| 102 | __m128i vout = _mm_packs_epi16(vacc00x0123, vacc00x0123); |
| 103 | |
| 104 | vout = _mm_max_epi8(vout, _mm_load_si128((const __m128i*) params->fp32_sse4.output_min)); |
| 105 | vout = _mm_min_epi8(vout, _mm_load_si128((const __m128i*) params->fp32_sse4.output_max)); |
| 106 | |
| 107 | if (nc >= 4) { |
| 108 | *((uint32_t*) c0) = (uint32_t) _mm_cvtsi128_si32(vout); |
| 109 | c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); |
| 110 | |
| 111 | a = (const int8_t**restrict) ((uintptr_t) a - ks); |
| 112 | |
| 113 | nc -= 4; |
| 114 | } else { |
| 115 | if (nc & 2) { |
| 116 | *((uint16_t*) c0) = (uint16_t) _mm_extract_epi16(vout, 0); |
| 117 | c0 += 2; |
| 118 | vout = _mm_srli_epi32(vout, 16); |
| 119 | } |
| 120 | if (nc & 1) { |
Marat Dukhan | cdbe9a3 | 2021-07-01 23:52:04 -0700 | [diff] [blame] | 121 | *c0 = (int8_t) _mm_extract_epi8(vout, 0); |
Marat Dukhan | c46e671 | 2021-06-01 19:00:16 -0700 | [diff] [blame] | 122 | } |
| 123 | |
| 124 | nc = 0; |
| 125 | } |
| 126 | } while (nc != 0); |
| 127 | } |