Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 1 | // Auto-generated file. Do not edit! |
| 2 | // Template: src/qs8-igemm/MRx16c8-avx512skx.c.in |
| 3 | // Generator: tools/xngen |
| 4 | // |
| 5 | // Copyright 2020 Google LLC |
| 6 | // |
| 7 | // This source code is licensed under the BSD-style license found in the |
| 8 | // LICENSE file in the root directory of this source tree. |
| 9 | |
| 10 | #include <assert.h> |
| 11 | |
| 12 | #include <immintrin.h> |
| 13 | |
| 14 | #include <xnnpack/igemm.h> |
| 15 | #include <xnnpack/intrinsics-polyfill.h> |
| 16 | #include <xnnpack/math.h> |
| 17 | |
| 18 | |
| 19 | void xnn_qs8_igemm_minmax_fp32_ukernel_2x16c8__avx512skx( |
| 20 | size_t mr, |
| 21 | size_t nc, |
| 22 | size_t kc, |
| 23 | size_t ks, |
| 24 | const int8_t** restrict a, |
| 25 | const void* restrict w, |
| 26 | int8_t* restrict c, |
| 27 | size_t cm_stride, |
| 28 | size_t cn_stride, |
| 29 | size_t a_offset, |
| 30 | const int8_t* zero, |
| 31 | const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN |
| 32 | { |
| 33 | assert(mr != 0); |
| 34 | assert(mr <= 2); |
| 35 | assert(nc != 0); |
| 36 | assert(kc != 0); |
| 37 | assert(kc % sizeof(int8_t) == 0); |
| 38 | assert(a != NULL); |
| 39 | assert(w != NULL); |
| 40 | assert(c != NULL); |
| 41 | |
| 42 | kc = round_up_po2(kc, 8); |
| 43 | int8_t* c0 = c; |
| 44 | int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); |
| 45 | if XNN_UNPREDICTABLE(mr != 2) { |
| 46 | c1 = c0; |
| 47 | } |
| 48 | |
| 49 | const __mmask16 vbias_mask = _cvtu32_mask16(0x1111); |
| 50 | const __m512 vscale = _mm512_load_ps(params->fp32_avx512.scale); |
| 51 | const __m512i voutput_zero_point = _mm512_load_si512(params->fp32_avx512.output_zero_point); |
| 52 | const __m256i voutput_min = _mm256_load_si256((const __m256i*) params->fp32_avx512.output_min); |
| 53 | const __m256i voutput_max = _mm256_load_si256((const __m256i*) params->fp32_avx512.output_max); |
| 54 | do { |
| 55 | __m512i vacc0x0123 = _mm512_maskz_expandloadu_epi32(vbias_mask, w); |
Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 56 | __m512i vacc0x4567 = _mm512_maskz_expandloadu_epi32(vbias_mask, (const void*) ((const int32_t*) w + 4)); |
| 57 | __m512i vacc0x89AB = _mm512_maskz_expandloadu_epi32(vbias_mask, (const void*) ((const int32_t*) w + 8)); |
| 58 | __m512i vacc0xCDEF = _mm512_maskz_expandloadu_epi32(vbias_mask, (const void*) ((const int32_t*) w + 12)); |
Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 59 | __m512i vacc1x0123 = vacc0x0123; |
| 60 | __m512i vacc1x4567 = vacc0x4567; |
| 61 | __m512i vacc1x89AB = vacc0x89AB; |
| 62 | __m512i vacc1xCDEF = vacc0xCDEF; |
Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 63 | w = (const void*) ((const int32_t*) w + 16); |
Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 64 | |
| 65 | size_t p = ks; |
| 66 | do { |
| 67 | const int8_t* restrict a0 = a[0]; |
| 68 | if XNN_UNPREDICTABLE(a0 != zero) { |
| 69 | a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); |
| 70 | } |
| 71 | const int8_t* restrict a1 = a[1]; |
| 72 | if XNN_UNPREDICTABLE(a1 != zero) { |
| 73 | a1 = (const int8_t*) ((uintptr_t) a1 + a_offset); |
| 74 | } |
| 75 | a += 2; |
| 76 | |
| 77 | size_t k = 0; |
| 78 | while (k < kc) { |
| 79 | const __m512i va0 = _mm512_broadcast_i32x4(_mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) a0))); |
| 80 | a0 += 8; |
| 81 | const __m512i va1 = _mm512_broadcast_i32x4(_mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) a1))); |
| 82 | a1 += 8; |
| 83 | |
| 84 | const __m512i vb0123 = _mm512_cvtepi8_epi16(_mm256_load_si256((const __m256i*) w)); |
| 85 | |
| 86 | vacc0x0123 = _mm512_add_epi32(vacc0x0123, _mm512_madd_epi16(va0, vb0123)); |
| 87 | vacc1x0123 = _mm512_add_epi32(vacc1x0123, _mm512_madd_epi16(va1, vb0123)); |
Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 88 | const __m512i vb4567 = _mm512_cvtepi8_epi16(_mm256_load_si256((const __m256i*) ((const int8_t*) w + 32))); |
Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 89 | |
| 90 | vacc0x4567 = _mm512_add_epi32(vacc0x4567, _mm512_madd_epi16(va0, vb4567)); |
| 91 | vacc1x4567 = _mm512_add_epi32(vacc1x4567, _mm512_madd_epi16(va1, vb4567)); |
Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 92 | const __m512i vb89AB = _mm512_cvtepi8_epi16(_mm256_load_si256((const __m256i*) ((const int8_t*) w + 64))); |
Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 93 | |
| 94 | vacc0x89AB = _mm512_add_epi32(vacc0x89AB, _mm512_madd_epi16(va0, vb89AB)); |
| 95 | vacc1x89AB = _mm512_add_epi32(vacc1x89AB, _mm512_madd_epi16(va1, vb89AB)); |
Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 96 | const __m512i vbCDEF = _mm512_cvtepi8_epi16(_mm256_load_si256((const __m256i*) ((const int8_t*) w + 96))); |
Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 97 | |
| 98 | vacc0xCDEF = _mm512_add_epi32(vacc0xCDEF, _mm512_madd_epi16(va0, vbCDEF)); |
| 99 | vacc1xCDEF = _mm512_add_epi32(vacc1xCDEF, _mm512_madd_epi16(va1, vbCDEF)); |
| 100 | |
Marat Dukhan | 3cf2e22 | 2021-07-08 11:38:45 -0700 | [diff] [blame] | 101 | w = (const void*) ((const int8_t*) w + 128); |
Marat Dukhan | 71855ee | 2021-05-25 19:05:06 -0700 | [diff] [blame] | 102 | k += 8 * sizeof(int8_t); |
| 103 | } |
| 104 | p -= 2 * sizeof(void*); |
| 105 | } while (p != 0); |
| 106 | |
| 107 | const __m512i vacc0x04152637 = _mm512_add_epi32(_mm512_unpacklo_epi32(vacc0x0123, vacc0x4567), _mm512_unpackhi_epi32(vacc0x0123, vacc0x4567)); |
| 108 | const __m512i vacc0x8C9DAEBF = _mm512_add_epi32(_mm512_unpacklo_epi32(vacc0x89AB, vacc0xCDEF), _mm512_unpackhi_epi32(vacc0x89AB, vacc0xCDEF)); |
| 109 | const __m512i vacc1x04152637 = _mm512_add_epi32(_mm512_unpacklo_epi32(vacc1x0123, vacc1x4567), _mm512_unpackhi_epi32(vacc1x0123, vacc1x4567)); |
| 110 | const __m512i vacc1x8C9DAEBF = _mm512_add_epi32(_mm512_unpacklo_epi32(vacc1x89AB, vacc1xCDEF), _mm512_unpackhi_epi32(vacc1x89AB, vacc1xCDEF)); |
| 111 | |
| 112 | __m512i vacc0x084C195D2A6E3B7F = _mm512_add_epi32(_mm512_unpacklo_epi32(vacc0x04152637, vacc0x8C9DAEBF), _mm512_unpackhi_epi32(vacc0x04152637, vacc0x8C9DAEBF)); |
| 113 | __m512i vacc1x084C195D2A6E3B7F = _mm512_add_epi32(_mm512_unpacklo_epi32(vacc1x04152637, vacc1x8C9DAEBF), _mm512_unpackhi_epi32(vacc1x04152637, vacc1x8C9DAEBF)); |
| 114 | |
| 115 | __m512 vscaled0x084C195D2A6E3B7F = _mm512_cvtepi32_ps(vacc0x084C195D2A6E3B7F); |
| 116 | __m512 vscaled1x084C195D2A6E3B7F = _mm512_cvtepi32_ps(vacc1x084C195D2A6E3B7F); |
| 117 | |
| 118 | vscaled0x084C195D2A6E3B7F = _mm512_mul_ps(vscaled0x084C195D2A6E3B7F, vscale); |
| 119 | vscaled1x084C195D2A6E3B7F = _mm512_mul_ps(vscaled1x084C195D2A6E3B7F, vscale); |
| 120 | |
| 121 | vacc0x084C195D2A6E3B7F = _mm512_cvtps_epi32(vscaled0x084C195D2A6E3B7F); |
| 122 | vacc1x084C195D2A6E3B7F = _mm512_cvtps_epi32(vscaled1x084C195D2A6E3B7F); |
| 123 | |
| 124 | const __m512i vacc01x084Cx195Dx2A6Ex3B7F = _mm512_adds_epi16(_mm512_packs_epi32(vacc0x084C195D2A6E3B7F, vacc1x084C195D2A6E3B7F), voutput_zero_point); |
| 125 | |
| 126 | const __m256i vout01x084Cx2A6Ex195Dx3B7F = _mm256_packs_epi16(_mm512_castsi512_si256(vacc01x084Cx195Dx2A6Ex3B7F), _mm512_extracti32x8_epi32(vacc01x084Cx195Dx2A6Ex3B7F, 1)); |
| 127 | const __m256i vout01x084C2A6E195D3B7F = _mm256_permutevar8x32_epi32(vout01x084Cx2A6Ex195Dx3B7F, _mm256_set_epi32(7, 5, 3, 1, 6, 4, 2, 0)); |
| 128 | __m256i vout01x0123456789ABCDEF = _mm256_shuffle_epi8(vout01x084C2A6E195D3B7F, _mm256_set_epi8(15, 7, 11, 3, 13, 5, 9, 1, 14, 6, 10, 2, 12, 4, 8, 0, 15, 7, 11, 3, 13, 5, 9, 1, 14, 6, 10, 2, 12, 4, 8, 0)); |
| 129 | vout01x0123456789ABCDEF = _mm256_max_epi8(vout01x0123456789ABCDEF, voutput_min); |
| 130 | vout01x0123456789ABCDEF = _mm256_min_epi8(vout01x0123456789ABCDEF, voutput_max); |
| 131 | |
| 132 | if (nc >= 16) { |
| 133 | _mm_storeu_si128((__m128i*) c1, _mm256_extracti128_si256(vout01x0123456789ABCDEF, 1)); |
| 134 | _mm_storeu_si128((__m128i*) c0, _mm256_castsi256_si128(vout01x0123456789ABCDEF)); |
| 135 | |
| 136 | c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); |
| 137 | c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); |
| 138 | |
| 139 | a = (const int8_t**restrict) ((uintptr_t) a - ks); |
| 140 | |
| 141 | nc -= 16; |
| 142 | } else { |
| 143 | // Prepare mask for valid 8-bit elements (depends on nc). |
| 144 | __mmask64 vmask = _cvtu64_mask64((uint64_t) ((UINT32_C(1) << (nc + 16)) - (UINT32_C(1) << 16))); |
| 145 | |
| 146 | _mm256_mask_storeu_epi8(c1 - 16, vmask, vout01x0123456789ABCDEF); |
| 147 | vmask = _kshiftri_mask64(vmask, 16); |
| 148 | _mm256_mask_storeu_epi8(c0, vmask, vout01x0123456789ABCDEF); |
| 149 | |
| 150 | nc = 0; |
| 151 | } |
| 152 | } while (nc != 0); |
| 153 | } |