Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 1 | # Copyright 2021 Google LLC |
| 2 | # |
| 3 | # This source code is licensed under the BSD-style license found in the |
| 4 | # LICENSE file in the root directory of this source tree. |
| 5 | |
Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 6 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__neon_mul16 |
| 7 | init: xnn_init_qs8_minmax_neon_fp32_params |
| 8 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neon_mul16 |
| 9 | init: xnn_init_qs8_minmax_neon_fp32_params |
| 10 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__neon_mul16 |
| 11 | init: xnn_init_qs8_minmax_neon_fp32_params |
| 12 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__neon_mul16 |
| 13 | init: xnn_init_qs8_minmax_neon_fp32_params |
| 14 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__neonv8_mul16 |
| 15 | init: xnn_init_qs8_minmax_neon_params |
| 16 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neonv8_mul16 |
| 17 | init: xnn_init_qs8_minmax_neon_params |
| 18 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__neonv8_mul16 |
| 19 | init: xnn_init_qs8_minmax_neon_params |
| 20 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__neonv8_mul16 |
| 21 | init: xnn_init_qs8_minmax_neon_params |
Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 22 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__sse2_mul16 |
| 23 | init: xnn_init_qs8_minmax_sse2_params |
| 24 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__sse2_mul16 |
| 25 | init: xnn_init_qs8_minmax_sse2_params |
| 26 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__sse2_mul16 |
| 27 | init: xnn_init_qs8_minmax_sse2_params |
| 28 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__sse41_mul16 |
| 29 | init: xnn_init_qs8_minmax_sse4_params |
| 30 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__sse41_mul16 |
| 31 | init: xnn_init_qs8_minmax_sse4_params |
| 32 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__sse41_mul16 |
| 33 | init: xnn_init_qs8_minmax_sse4_params |
| 34 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__avx_mul16 |
| 35 | init: xnn_init_qs8_minmax_sse4_params |
| 36 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx_mul16 |
| 37 | init: xnn_init_qs8_minmax_sse4_params |
| 38 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__avx_mul16 |
| 39 | init: xnn_init_qs8_minmax_sse4_params |
| 40 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx2_mul16 |
| 41 | init: xnn_init_qs8_minmax_avx2_params |
| 42 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__avx2_mul16 |
| 43 | init: xnn_init_qs8_minmax_avx2_params |
| 44 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__sse41_mul32 |
| 45 | init: xnn_init_qs8_minmax_sse4_params |
| 46 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__sse41_mul32 |
| 47 | init: xnn_init_qs8_minmax_sse4_params |
| 48 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__sse41_mul32 |
| 49 | init: xnn_init_qs8_minmax_sse4_params |
| 50 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__avx_mul32 |
| 51 | init: xnn_init_qs8_minmax_sse4_params |
| 52 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx_mul32 |
| 53 | init: xnn_init_qs8_minmax_sse4_params |
| 54 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__avx_mul32 |
| 55 | init: xnn_init_qs8_minmax_sse4_params |
| 56 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__xop_mul32 |
| 57 | init: xnn_init_qs8_minmax_sse4_params |
| 58 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__xop_mul32 |
| 59 | init: xnn_init_qs8_minmax_sse4_params |
| 60 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__xop_mul32 |
| 61 | init: xnn_init_qs8_minmax_sse4_params |
| 62 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__avx2_mul32 |
| 63 | init: xnn_init_qs8_minmax_avx2_params |
| 64 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx2_mul32 |
| 65 | init: xnn_init_qs8_minmax_avx2_params |
| 66 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__avx2_mul32 |
| 67 | init: xnn_init_qs8_minmax_avx2_params |
| 68 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__avx2_mul32 |
| 69 | init: xnn_init_qs8_minmax_avx2_params |
| 70 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx512skx_mul32 |
| 71 | init: xnn_init_qs8_minmax_avx512_params |
| 72 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__avx512skx_mul32 |
| 73 | init: xnn_init_qs8_minmax_avx512_params |
Marat Dukhan | 313eef7 | 2021-06-30 16:11:31 -0700 | [diff] [blame^] | 74 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__wasmsimd_mul16 |
| 75 | init: xnn_init_qs8_minmax_wasmsimd_params |
| 76 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__wasmsimd_mul16 |
| 77 | init: xnn_init_qs8_minmax_wasmsimd_params |
| 78 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__wasmsimd_mul16 |
| 79 | init: xnn_init_qs8_minmax_wasmsimd_params |
Marat Dukhan | 59af581 | 2021-06-29 18:09:57 -0700 | [diff] [blame] | 80 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__neon_mul16 |
| 81 | init: xnn_init_qs8_minmax_neon_fp32_params |
| 82 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__neon_mul16 |
| 83 | init: xnn_init_qs8_minmax_neon_fp32_params |
| 84 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__neon_mul16 |
| 85 | init: xnn_init_qs8_minmax_neon_fp32_params |
| 86 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__neon_mul16 |
| 87 | init: xnn_init_qs8_minmax_neon_fp32_params |
| 88 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__neonv8_mul16 |
| 89 | init: xnn_init_qs8_minmax_neon_params |
| 90 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__neonv8_mul16 |
| 91 | init: xnn_init_qs8_minmax_neon_params |
| 92 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__neonv8_mul16 |
| 93 | init: xnn_init_qs8_minmax_neon_params |
| 94 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__neonv8_mul16 |
| 95 | init: xnn_init_qs8_minmax_neon_params |
Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 96 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__sse2_mul16 |
| 97 | init: xnn_init_qs8_minmax_sse2_params |
| 98 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__sse2_mul16 |
| 99 | init: xnn_init_qs8_minmax_sse2_params |
| 100 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__sse2_mul16 |
| 101 | init: xnn_init_qs8_minmax_sse2_params |
| 102 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__sse41_mul16 |
| 103 | init: xnn_init_qs8_minmax_sse4_params |
| 104 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__sse41_mul16 |
| 105 | init: xnn_init_qs8_minmax_sse4_params |
| 106 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__sse41_mul16 |
| 107 | init: xnn_init_qs8_minmax_sse4_params |
| 108 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__avx_mul16 |
| 109 | init: xnn_init_qs8_minmax_sse4_params |
| 110 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx_mul16 |
| 111 | init: xnn_init_qs8_minmax_sse4_params |
| 112 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__avx_mul16 |
| 113 | init: xnn_init_qs8_minmax_sse4_params |
Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 114 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx2_mul16 |
| 115 | init: xnn_init_qs8_minmax_avx2_params |
| 116 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__avx2_mul16 |
| 117 | init: xnn_init_qs8_minmax_avx2_params |
Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 118 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__sse41_mul32 |
| 119 | init: xnn_init_qs8_minmax_sse4_params |
| 120 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__sse41_mul32 |
| 121 | init: xnn_init_qs8_minmax_sse4_params |
| 122 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__sse41_mul32 |
| 123 | init: xnn_init_qs8_minmax_sse4_params |
| 124 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__avx_mul32 |
| 125 | init: xnn_init_qs8_minmax_sse4_params |
| 126 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx_mul32 |
| 127 | init: xnn_init_qs8_minmax_sse4_params |
| 128 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__avx_mul32 |
| 129 | init: xnn_init_qs8_minmax_sse4_params |
| 130 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__xop_mul32 |
| 131 | init: xnn_init_qs8_minmax_sse4_params |
| 132 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__xop_mul32 |
| 133 | init: xnn_init_qs8_minmax_sse4_params |
| 134 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__xop_mul32 |
| 135 | init: xnn_init_qs8_minmax_sse4_params |
Marat Dukhan | 8228689 | 2021-06-04 17:27:27 -0700 | [diff] [blame] | 136 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__avx2_mul32 |
| 137 | init: xnn_init_qs8_minmax_avx2_params |
| 138 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx2_mul32 |
| 139 | init: xnn_init_qs8_minmax_avx2_params |
| 140 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__avx2_mul32 |
| 141 | init: xnn_init_qs8_minmax_avx2_params |
| 142 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__avx2_mul32 |
| 143 | init: xnn_init_qs8_minmax_avx2_params |
Marat Dukhan | 98042f2 | 2021-06-15 00:43:13 -0700 | [diff] [blame] | 144 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx512skx_mul32 |
| 145 | init: xnn_init_qs8_minmax_avx512_params |
| 146 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__avx512skx_mul32 |
| 147 | init: xnn_init_qs8_minmax_avx512_params |
Marat Dukhan | 313eef7 | 2021-06-30 16:11:31 -0700 | [diff] [blame^] | 148 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__wasmsimd_mul16 |
| 149 | init: xnn_init_qs8_minmax_wasmsimd_params |
| 150 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__wasmsimd_mul16 |
| 151 | init: xnn_init_qs8_minmax_wasmsimd_params |
| 152 | - name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__wasmsimd_mul16 |
| 153 | init: xnn_init_qs8_minmax_wasmsimd_params |