Frank Barchard | 36f95cf | 2021-02-23 03:12:52 -0800 | [diff] [blame] | 1 | // Auto-generated file. Do not edit! |
| 2 | // Template: src/qs8-igemm/c16-neon-mlal-padal.c.in |
| 3 | // Generator: tools/xngen |
| 4 | // |
| 5 | // Copyright 2021 Google LLC |
| 6 | // |
| 7 | // This source code is licensed under the BSD-style license found in the |
| 8 | // LICENSE file in the root directory of this source tree. |
| 9 | |
| 10 | #include <assert.h> |
| 11 | |
| 12 | #include <arm_neon.h> |
| 13 | |
Frank Barchard | 36f95cf | 2021-02-23 03:12:52 -0800 | [diff] [blame] | 14 | #include <xnnpack/gemm.h> |
Frank Barchard | 6d8ca7d | 2021-03-01 11:05:08 -0800 | [diff] [blame] | 15 | #include <xnnpack/math.h> |
Frank Barchard | 36f95cf | 2021-02-23 03:12:52 -0800 | [diff] [blame] | 16 | |
| 17 | |
| 18 | void xnn_qs8_igemm_minmax_ukernel_4x8c16__neon_mlal_padal( |
| 19 | size_t mr, |
| 20 | size_t nc, |
| 21 | size_t kc, |
| 22 | size_t ks, |
| 23 | const int8_t** restrict a, |
| 24 | const void* restrict w, |
| 25 | int8_t* restrict c, |
| 26 | size_t cm_stride, |
| 27 | size_t cn_stride, |
| 28 | size_t a_offset, |
| 29 | const int8_t* zero, |
Marat Dukhan | 4c6640c | 2021-04-15 14:21:32 -0700 | [diff] [blame^] | 30 | const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN |
Frank Barchard | 36f95cf | 2021-02-23 03:12:52 -0800 | [diff] [blame] | 31 | { |
| 32 | assert(mr != 0); |
| 33 | assert(mr <= 4); |
| 34 | assert(nc != 0); |
| 35 | assert(kc != 0); |
| 36 | assert(ks != 0); |
| 37 | assert(ks % (4 * sizeof(void*)) == 0); |
| 38 | assert(a_offset % sizeof(int8_t) == 0); |
| 39 | assert(a != NULL); |
| 40 | assert(w != NULL); |
| 41 | assert(c != NULL); |
| 42 | |
Frank Barchard | 6d8ca7d | 2021-03-01 11:05:08 -0800 | [diff] [blame] | 43 | kc = round_up_po2(kc, 16); |
Frank Barchard | 36f95cf | 2021-02-23 03:12:52 -0800 | [diff] [blame] | 44 | int8_t* c0 = c; |
| 45 | int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); |
| 46 | if XNN_UNPREDICTABLE(mr < 2) { |
| 47 | c1 = c0; |
| 48 | } |
| 49 | int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride); |
| 50 | if XNN_UNPREDICTABLE(mr <= 2) { |
| 51 | c2 = c1; |
| 52 | } |
| 53 | int8_t* c3 = (int8_t*) ((uintptr_t) c2 + cm_stride); |
| 54 | if XNN_UNPREDICTABLE(mr != 4) { |
| 55 | c3 = c2; |
| 56 | } |
| 57 | |
| 58 | do { |
| 59 | int32x4_t vacc0x0 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t)); |
| 60 | int32x4_t vacc0x1 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t)); |
| 61 | int32x4_t vacc0x2 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t)); |
| 62 | int32x4_t vacc0x3 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t)); |
| 63 | int32x4_t vacc0x4 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t)); |
| 64 | int32x4_t vacc0x5 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t)); |
| 65 | int32x4_t vacc0x6 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t)); |
| 66 | int32x4_t vacc0x7 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t)); |
| 67 | int32x4_t vacc1x0 = vacc0x0; |
| 68 | int32x4_t vacc1x1 = vacc0x1; |
| 69 | int32x4_t vacc1x2 = vacc0x2; |
| 70 | int32x4_t vacc1x3 = vacc0x3; |
| 71 | int32x4_t vacc1x4 = vacc0x4; |
| 72 | int32x4_t vacc1x5 = vacc0x5; |
| 73 | int32x4_t vacc1x6 = vacc0x6; |
| 74 | int32x4_t vacc1x7 = vacc0x7; |
| 75 | int32x4_t vacc2x0 = vacc0x0; |
| 76 | int32x4_t vacc2x1 = vacc0x1; |
| 77 | int32x4_t vacc2x2 = vacc0x2; |
| 78 | int32x4_t vacc2x3 = vacc0x3; |
| 79 | int32x4_t vacc2x4 = vacc0x4; |
| 80 | int32x4_t vacc2x5 = vacc0x5; |
| 81 | int32x4_t vacc2x6 = vacc0x6; |
| 82 | int32x4_t vacc2x7 = vacc0x7; |
| 83 | int32x4_t vacc3x0 = vacc0x0; |
| 84 | int32x4_t vacc3x1 = vacc0x1; |
| 85 | int32x4_t vacc3x2 = vacc0x2; |
| 86 | int32x4_t vacc3x3 = vacc0x3; |
| 87 | int32x4_t vacc3x4 = vacc0x4; |
| 88 | int32x4_t vacc3x5 = vacc0x5; |
| 89 | int32x4_t vacc3x6 = vacc0x6; |
| 90 | int32x4_t vacc3x7 = vacc0x7; |
| 91 | |
| 92 | size_t p = ks; |
| 93 | do { |
| 94 | const int8_t* restrict a0 = a[0]; |
| 95 | if XNN_UNPREDICTABLE(a0 != zero) { |
| 96 | a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); |
| 97 | } |
| 98 | const int8_t* restrict a1 = a[1]; |
| 99 | if XNN_UNPREDICTABLE(a1 != zero) { |
| 100 | a1 = (const int8_t*) ((uintptr_t) a1 + a_offset); |
| 101 | } |
| 102 | const int8_t* restrict a2 = a[2]; |
| 103 | if XNN_UNPREDICTABLE(a2 != zero) { |
| 104 | a2 = (const int8_t*) ((uintptr_t) a2 + a_offset); |
| 105 | } |
| 106 | const int8_t* restrict a3 = a[3]; |
| 107 | if XNN_UNPREDICTABLE(a3 != zero) { |
| 108 | a3 = (const int8_t*) ((uintptr_t) a3 + a_offset); |
| 109 | } |
| 110 | a += 4; |
| 111 | |
| 112 | // KC loop of 16 with up to 15 remainder |
| 113 | size_t k = 0; |
| 114 | while (k < kc) { |
| 115 | const int8x16_t va0 = vld1q_s8(a0); a0 += 16; |
| 116 | const int8x16_t va1 = vld1q_s8(a1); a1 += 16; |
| 117 | const int8x16_t va2 = vld1q_s8(a2); a2 += 16; |
| 118 | const int8x16_t va3 = vld1q_s8(a3); a3 += 16; |
| 119 | |
| 120 | const int8x16_t vb0 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t)); |
| 121 | const int8x16_t vb1 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t)); |
| 122 | const int8x16_t vb2 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t)); |
| 123 | const int8x16_t vb3 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t)); |
| 124 | const int8x16_t vb4 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t)); |
| 125 | const int8x16_t vb5 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t)); |
| 126 | const int8x16_t vb6 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t)); |
| 127 | const int8x16_t vb7 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t)); |
| 128 | |
| 129 | int16x8_t vprod0x0 = vmull_s8(vget_low_s8(vb0), vget_low_s8(va0)); |
| 130 | int16x8_t vprod1x0 = vmull_s8(vget_low_s8(vb0), vget_low_s8(va1)); |
| 131 | int16x8_t vprod2x0 = vmull_s8(vget_low_s8(vb0), vget_low_s8(va2)); |
| 132 | int16x8_t vprod3x0 = vmull_s8(vget_low_s8(vb0), vget_low_s8(va3)); |
| 133 | vprod0x0 = vmlal_s8(vprod0x0, vget_high_s8(vb0), vget_high_s8(va0)); |
| 134 | vprod1x0 = vmlal_s8(vprod1x0, vget_high_s8(vb0), vget_high_s8(va1)); |
| 135 | vprod2x0 = vmlal_s8(vprod2x0, vget_high_s8(vb0), vget_high_s8(va2)); |
| 136 | vprod3x0 = vmlal_s8(vprod3x0, vget_high_s8(vb0), vget_high_s8(va3)); |
| 137 | vacc0x0 = vpadalq_s16(vacc0x0, vprod0x0); |
| 138 | vacc1x0 = vpadalq_s16(vacc1x0, vprod1x0); |
| 139 | vacc2x0 = vpadalq_s16(vacc2x0, vprod2x0); |
| 140 | vacc3x0 = vpadalq_s16(vacc3x0, vprod3x0); |
| 141 | int16x8_t vprod0x1 = vmull_s8(vget_low_s8(vb1), vget_low_s8(va0)); |
| 142 | int16x8_t vprod1x1 = vmull_s8(vget_low_s8(vb1), vget_low_s8(va1)); |
| 143 | int16x8_t vprod2x1 = vmull_s8(vget_low_s8(vb1), vget_low_s8(va2)); |
| 144 | int16x8_t vprod3x1 = vmull_s8(vget_low_s8(vb1), vget_low_s8(va3)); |
| 145 | vprod0x1 = vmlal_s8(vprod0x1, vget_high_s8(vb1), vget_high_s8(va0)); |
| 146 | vprod1x1 = vmlal_s8(vprod1x1, vget_high_s8(vb1), vget_high_s8(va1)); |
| 147 | vprod2x1 = vmlal_s8(vprod2x1, vget_high_s8(vb1), vget_high_s8(va2)); |
| 148 | vprod3x1 = vmlal_s8(vprod3x1, vget_high_s8(vb1), vget_high_s8(va3)); |
| 149 | vacc0x1 = vpadalq_s16(vacc0x1, vprod0x1); |
| 150 | vacc1x1 = vpadalq_s16(vacc1x1, vprod1x1); |
| 151 | vacc2x1 = vpadalq_s16(vacc2x1, vprod2x1); |
| 152 | vacc3x1 = vpadalq_s16(vacc3x1, vprod3x1); |
| 153 | int16x8_t vprod0x2 = vmull_s8(vget_low_s8(vb2), vget_low_s8(va0)); |
| 154 | int16x8_t vprod1x2 = vmull_s8(vget_low_s8(vb2), vget_low_s8(va1)); |
| 155 | int16x8_t vprod2x2 = vmull_s8(vget_low_s8(vb2), vget_low_s8(va2)); |
| 156 | int16x8_t vprod3x2 = vmull_s8(vget_low_s8(vb2), vget_low_s8(va3)); |
| 157 | vprod0x2 = vmlal_s8(vprod0x2, vget_high_s8(vb2), vget_high_s8(va0)); |
| 158 | vprod1x2 = vmlal_s8(vprod1x2, vget_high_s8(vb2), vget_high_s8(va1)); |
| 159 | vprod2x2 = vmlal_s8(vprod2x2, vget_high_s8(vb2), vget_high_s8(va2)); |
| 160 | vprod3x2 = vmlal_s8(vprod3x2, vget_high_s8(vb2), vget_high_s8(va3)); |
| 161 | vacc0x2 = vpadalq_s16(vacc0x2, vprod0x2); |
| 162 | vacc1x2 = vpadalq_s16(vacc1x2, vprod1x2); |
| 163 | vacc2x2 = vpadalq_s16(vacc2x2, vprod2x2); |
| 164 | vacc3x2 = vpadalq_s16(vacc3x2, vprod3x2); |
| 165 | int16x8_t vprod0x3 = vmull_s8(vget_low_s8(vb3), vget_low_s8(va0)); |
| 166 | int16x8_t vprod1x3 = vmull_s8(vget_low_s8(vb3), vget_low_s8(va1)); |
| 167 | int16x8_t vprod2x3 = vmull_s8(vget_low_s8(vb3), vget_low_s8(va2)); |
| 168 | int16x8_t vprod3x3 = vmull_s8(vget_low_s8(vb3), vget_low_s8(va3)); |
| 169 | vprod0x3 = vmlal_s8(vprod0x3, vget_high_s8(vb3), vget_high_s8(va0)); |
| 170 | vprod1x3 = vmlal_s8(vprod1x3, vget_high_s8(vb3), vget_high_s8(va1)); |
| 171 | vprod2x3 = vmlal_s8(vprod2x3, vget_high_s8(vb3), vget_high_s8(va2)); |
| 172 | vprod3x3 = vmlal_s8(vprod3x3, vget_high_s8(vb3), vget_high_s8(va3)); |
| 173 | vacc0x3 = vpadalq_s16(vacc0x3, vprod0x3); |
| 174 | vacc1x3 = vpadalq_s16(vacc1x3, vprod1x3); |
| 175 | vacc2x3 = vpadalq_s16(vacc2x3, vprod2x3); |
| 176 | vacc3x3 = vpadalq_s16(vacc3x3, vprod3x3); |
| 177 | int16x8_t vprod0x4 = vmull_s8(vget_low_s8(vb4), vget_low_s8(va0)); |
| 178 | int16x8_t vprod1x4 = vmull_s8(vget_low_s8(vb4), vget_low_s8(va1)); |
| 179 | int16x8_t vprod2x4 = vmull_s8(vget_low_s8(vb4), vget_low_s8(va2)); |
| 180 | int16x8_t vprod3x4 = vmull_s8(vget_low_s8(vb4), vget_low_s8(va3)); |
| 181 | vprod0x4 = vmlal_s8(vprod0x4, vget_high_s8(vb4), vget_high_s8(va0)); |
| 182 | vprod1x4 = vmlal_s8(vprod1x4, vget_high_s8(vb4), vget_high_s8(va1)); |
| 183 | vprod2x4 = vmlal_s8(vprod2x4, vget_high_s8(vb4), vget_high_s8(va2)); |
| 184 | vprod3x4 = vmlal_s8(vprod3x4, vget_high_s8(vb4), vget_high_s8(va3)); |
| 185 | vacc0x4 = vpadalq_s16(vacc0x4, vprod0x4); |
| 186 | vacc1x4 = vpadalq_s16(vacc1x4, vprod1x4); |
| 187 | vacc2x4 = vpadalq_s16(vacc2x4, vprod2x4); |
| 188 | vacc3x4 = vpadalq_s16(vacc3x4, vprod3x4); |
| 189 | int16x8_t vprod0x5 = vmull_s8(vget_low_s8(vb5), vget_low_s8(va0)); |
| 190 | int16x8_t vprod1x5 = vmull_s8(vget_low_s8(vb5), vget_low_s8(va1)); |
| 191 | int16x8_t vprod2x5 = vmull_s8(vget_low_s8(vb5), vget_low_s8(va2)); |
| 192 | int16x8_t vprod3x5 = vmull_s8(vget_low_s8(vb5), vget_low_s8(va3)); |
| 193 | vprod0x5 = vmlal_s8(vprod0x5, vget_high_s8(vb5), vget_high_s8(va0)); |
| 194 | vprod1x5 = vmlal_s8(vprod1x5, vget_high_s8(vb5), vget_high_s8(va1)); |
| 195 | vprod2x5 = vmlal_s8(vprod2x5, vget_high_s8(vb5), vget_high_s8(va2)); |
| 196 | vprod3x5 = vmlal_s8(vprod3x5, vget_high_s8(vb5), vget_high_s8(va3)); |
| 197 | vacc0x5 = vpadalq_s16(vacc0x5, vprod0x5); |
| 198 | vacc1x5 = vpadalq_s16(vacc1x5, vprod1x5); |
| 199 | vacc2x5 = vpadalq_s16(vacc2x5, vprod2x5); |
| 200 | vacc3x5 = vpadalq_s16(vacc3x5, vprod3x5); |
| 201 | int16x8_t vprod0x6 = vmull_s8(vget_low_s8(vb6), vget_low_s8(va0)); |
| 202 | int16x8_t vprod1x6 = vmull_s8(vget_low_s8(vb6), vget_low_s8(va1)); |
| 203 | int16x8_t vprod2x6 = vmull_s8(vget_low_s8(vb6), vget_low_s8(va2)); |
| 204 | int16x8_t vprod3x6 = vmull_s8(vget_low_s8(vb6), vget_low_s8(va3)); |
| 205 | vprod0x6 = vmlal_s8(vprod0x6, vget_high_s8(vb6), vget_high_s8(va0)); |
| 206 | vprod1x6 = vmlal_s8(vprod1x6, vget_high_s8(vb6), vget_high_s8(va1)); |
| 207 | vprod2x6 = vmlal_s8(vprod2x6, vget_high_s8(vb6), vget_high_s8(va2)); |
| 208 | vprod3x6 = vmlal_s8(vprod3x6, vget_high_s8(vb6), vget_high_s8(va3)); |
| 209 | vacc0x6 = vpadalq_s16(vacc0x6, vprod0x6); |
| 210 | vacc1x6 = vpadalq_s16(vacc1x6, vprod1x6); |
| 211 | vacc2x6 = vpadalq_s16(vacc2x6, vprod2x6); |
| 212 | vacc3x6 = vpadalq_s16(vacc3x6, vprod3x6); |
| 213 | int16x8_t vprod0x7 = vmull_s8(vget_low_s8(vb7), vget_low_s8(va0)); |
| 214 | int16x8_t vprod1x7 = vmull_s8(vget_low_s8(vb7), vget_low_s8(va1)); |
| 215 | int16x8_t vprod2x7 = vmull_s8(vget_low_s8(vb7), vget_low_s8(va2)); |
| 216 | int16x8_t vprod3x7 = vmull_s8(vget_low_s8(vb7), vget_low_s8(va3)); |
| 217 | vprod0x7 = vmlal_s8(vprod0x7, vget_high_s8(vb7), vget_high_s8(va0)); |
| 218 | vprod1x7 = vmlal_s8(vprod1x7, vget_high_s8(vb7), vget_high_s8(va1)); |
| 219 | vprod2x7 = vmlal_s8(vprod2x7, vget_high_s8(vb7), vget_high_s8(va2)); |
| 220 | vprod3x7 = vmlal_s8(vprod3x7, vget_high_s8(vb7), vget_high_s8(va3)); |
| 221 | vacc0x7 = vpadalq_s16(vacc0x7, vprod0x7); |
| 222 | vacc1x7 = vpadalq_s16(vacc1x7, vprod1x7); |
| 223 | vacc2x7 = vpadalq_s16(vacc2x7, vprod2x7); |
| 224 | vacc3x7 = vpadalq_s16(vacc3x7, vprod3x7); |
| 225 | |
| 226 | k += 16 * sizeof(int8_t); |
| 227 | } |
| 228 | |
| 229 | p -= 4 * sizeof(void*); |
| 230 | } while (p != 0); |
| 231 | |
| 232 | #if XNN_ARCH_ARM64 |
| 233 | const int32x4_t vsum0x01 = vpaddq_s32(vacc0x0, vacc0x1); |
| 234 | const int32x4_t vsum0x23 = vpaddq_s32(vacc0x2, vacc0x3); |
| 235 | const int32x4_t vsum0x45 = vpaddq_s32(vacc0x4, vacc0x5); |
| 236 | const int32x4_t vsum0x67 = vpaddq_s32(vacc0x6, vacc0x7); |
| 237 | const int32x4_t vsum1x01 = vpaddq_s32(vacc1x0, vacc1x1); |
| 238 | const int32x4_t vsum1x23 = vpaddq_s32(vacc1x2, vacc1x3); |
| 239 | const int32x4_t vsum1x45 = vpaddq_s32(vacc1x4, vacc1x5); |
| 240 | const int32x4_t vsum1x67 = vpaddq_s32(vacc1x6, vacc1x7); |
| 241 | const int32x4_t vsum2x01 = vpaddq_s32(vacc2x0, vacc2x1); |
| 242 | const int32x4_t vsum2x23 = vpaddq_s32(vacc2x2, vacc2x3); |
| 243 | const int32x4_t vsum2x45 = vpaddq_s32(vacc2x4, vacc2x5); |
| 244 | const int32x4_t vsum2x67 = vpaddq_s32(vacc2x6, vacc2x7); |
| 245 | const int32x4_t vsum3x01 = vpaddq_s32(vacc3x0, vacc3x1); |
| 246 | const int32x4_t vsum3x23 = vpaddq_s32(vacc3x2, vacc3x3); |
| 247 | const int32x4_t vsum3x45 = vpaddq_s32(vacc3x4, vacc3x5); |
| 248 | const int32x4_t vsum3x67 = vpaddq_s32(vacc3x6, vacc3x7); |
| 249 | int32x4_t vacc0x0123 = vpaddq_s32(vsum0x01, vsum0x23); |
| 250 | int32x4_t vacc0x4567 = vpaddq_s32(vsum0x45, vsum0x67); |
| 251 | int32x4_t vacc1x0123 = vpaddq_s32(vsum1x01, vsum1x23); |
| 252 | int32x4_t vacc1x4567 = vpaddq_s32(vsum1x45, vsum1x67); |
| 253 | int32x4_t vacc2x0123 = vpaddq_s32(vsum2x01, vsum2x23); |
| 254 | int32x4_t vacc2x4567 = vpaddq_s32(vsum2x45, vsum2x67); |
| 255 | int32x4_t vacc3x0123 = vpaddq_s32(vsum3x01, vsum3x23); |
| 256 | int32x4_t vacc3x4567 = vpaddq_s32(vsum3x45, vsum3x67); |
| 257 | #else |
| 258 | const int32x2_t vpsum0x0 = vadd_s32(vget_low_s32(vacc0x0), vget_high_s32(vacc0x0)); |
| 259 | const int32x2_t vpsum0x1 = vadd_s32(vget_low_s32(vacc0x1), vget_high_s32(vacc0x1)); |
| 260 | const int32x2_t vpsum0x2 = vadd_s32(vget_low_s32(vacc0x2), vget_high_s32(vacc0x2)); |
| 261 | const int32x2_t vpsum0x3 = vadd_s32(vget_low_s32(vacc0x3), vget_high_s32(vacc0x3)); |
| 262 | const int32x2_t vsum0x01 = vpadd_s32(vpsum0x0, vpsum0x1); |
| 263 | const int32x2_t vsum0x23 = vpadd_s32(vpsum0x2, vpsum0x3); |
| 264 | int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23 ); |
| 265 | const int32x2_t vpsum0x4 = vadd_s32(vget_low_s32(vacc0x4), vget_high_s32(vacc0x4)); |
| 266 | const int32x2_t vpsum0x5 = vadd_s32(vget_low_s32(vacc0x5), vget_high_s32(vacc0x5)); |
| 267 | const int32x2_t vpsum0x6 = vadd_s32(vget_low_s32(vacc0x6), vget_high_s32(vacc0x6)); |
| 268 | const int32x2_t vpsum0x7 = vadd_s32(vget_low_s32(vacc0x7), vget_high_s32(vacc0x7)); |
| 269 | const int32x2_t vsum0x45 = vpadd_s32(vpsum0x4, vpsum0x5); |
| 270 | const int32x2_t vsum0x67 = vpadd_s32(vpsum0x6, vpsum0x7); |
| 271 | int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67 ); |
| 272 | const int32x2_t vpsum1x0 = vadd_s32(vget_low_s32(vacc1x0), vget_high_s32(vacc1x0)); |
| 273 | const int32x2_t vpsum1x1 = vadd_s32(vget_low_s32(vacc1x1), vget_high_s32(vacc1x1)); |
| 274 | const int32x2_t vpsum1x2 = vadd_s32(vget_low_s32(vacc1x2), vget_high_s32(vacc1x2)); |
| 275 | const int32x2_t vpsum1x3 = vadd_s32(vget_low_s32(vacc1x3), vget_high_s32(vacc1x3)); |
| 276 | const int32x2_t vsum1x01 = vpadd_s32(vpsum1x0, vpsum1x1); |
| 277 | const int32x2_t vsum1x23 = vpadd_s32(vpsum1x2, vpsum1x3); |
| 278 | int32x4_t vacc1x0123 = vcombine_s32(vsum1x01, vsum1x23 ); |
| 279 | const int32x2_t vpsum1x4 = vadd_s32(vget_low_s32(vacc1x4), vget_high_s32(vacc1x4)); |
| 280 | const int32x2_t vpsum1x5 = vadd_s32(vget_low_s32(vacc1x5), vget_high_s32(vacc1x5)); |
| 281 | const int32x2_t vpsum1x6 = vadd_s32(vget_low_s32(vacc1x6), vget_high_s32(vacc1x6)); |
| 282 | const int32x2_t vpsum1x7 = vadd_s32(vget_low_s32(vacc1x7), vget_high_s32(vacc1x7)); |
| 283 | const int32x2_t vsum1x45 = vpadd_s32(vpsum1x4, vpsum1x5); |
| 284 | const int32x2_t vsum1x67 = vpadd_s32(vpsum1x6, vpsum1x7); |
| 285 | int32x4_t vacc1x4567 = vcombine_s32(vsum1x45, vsum1x67 ); |
| 286 | const int32x2_t vpsum2x0 = vadd_s32(vget_low_s32(vacc2x0), vget_high_s32(vacc2x0)); |
| 287 | const int32x2_t vpsum2x1 = vadd_s32(vget_low_s32(vacc2x1), vget_high_s32(vacc2x1)); |
| 288 | const int32x2_t vpsum2x2 = vadd_s32(vget_low_s32(vacc2x2), vget_high_s32(vacc2x2)); |
| 289 | const int32x2_t vpsum2x3 = vadd_s32(vget_low_s32(vacc2x3), vget_high_s32(vacc2x3)); |
| 290 | const int32x2_t vsum2x01 = vpadd_s32(vpsum2x0, vpsum2x1); |
| 291 | const int32x2_t vsum2x23 = vpadd_s32(vpsum2x2, vpsum2x3); |
| 292 | int32x4_t vacc2x0123 = vcombine_s32(vsum2x01, vsum2x23 ); |
| 293 | const int32x2_t vpsum2x4 = vadd_s32(vget_low_s32(vacc2x4), vget_high_s32(vacc2x4)); |
| 294 | const int32x2_t vpsum2x5 = vadd_s32(vget_low_s32(vacc2x5), vget_high_s32(vacc2x5)); |
| 295 | const int32x2_t vpsum2x6 = vadd_s32(vget_low_s32(vacc2x6), vget_high_s32(vacc2x6)); |
| 296 | const int32x2_t vpsum2x7 = vadd_s32(vget_low_s32(vacc2x7), vget_high_s32(vacc2x7)); |
| 297 | const int32x2_t vsum2x45 = vpadd_s32(vpsum2x4, vpsum2x5); |
| 298 | const int32x2_t vsum2x67 = vpadd_s32(vpsum2x6, vpsum2x7); |
| 299 | int32x4_t vacc2x4567 = vcombine_s32(vsum2x45, vsum2x67 ); |
| 300 | const int32x2_t vpsum3x0 = vadd_s32(vget_low_s32(vacc3x0), vget_high_s32(vacc3x0)); |
| 301 | const int32x2_t vpsum3x1 = vadd_s32(vget_low_s32(vacc3x1), vget_high_s32(vacc3x1)); |
| 302 | const int32x2_t vpsum3x2 = vadd_s32(vget_low_s32(vacc3x2), vget_high_s32(vacc3x2)); |
| 303 | const int32x2_t vpsum3x3 = vadd_s32(vget_low_s32(vacc3x3), vget_high_s32(vacc3x3)); |
| 304 | const int32x2_t vsum3x01 = vpadd_s32(vpsum3x0, vpsum3x1); |
| 305 | const int32x2_t vsum3x23 = vpadd_s32(vpsum3x2, vpsum3x3); |
| 306 | int32x4_t vacc3x0123 = vcombine_s32(vsum3x01, vsum3x23 ); |
| 307 | const int32x2_t vpsum3x4 = vadd_s32(vget_low_s32(vacc3x4), vget_high_s32(vacc3x4)); |
| 308 | const int32x2_t vpsum3x5 = vadd_s32(vget_low_s32(vacc3x5), vget_high_s32(vacc3x5)); |
| 309 | const int32x2_t vpsum3x6 = vadd_s32(vget_low_s32(vacc3x6), vget_high_s32(vacc3x6)); |
| 310 | const int32x2_t vpsum3x7 = vadd_s32(vget_low_s32(vacc3x7), vget_high_s32(vacc3x7)); |
| 311 | const int32x2_t vsum3x45 = vpadd_s32(vpsum3x4, vpsum3x5); |
| 312 | const int32x2_t vsum3x67 = vpadd_s32(vpsum3x6, vpsum3x7); |
| 313 | int32x4_t vacc3x4567 = vcombine_s32(vsum3x45, vsum3x67 ); |
| 314 | #endif |
| 315 | |
| 316 | const int32x4_t vmultiplier = vld1q_dup_s32(¶ms->neon.multiplier); |
| 317 | vacc0x0123 = vqrdmulhq_s32(vacc0x0123, vmultiplier); |
| 318 | vacc0x4567 = vqrdmulhq_s32(vacc0x4567, vmultiplier); |
| 319 | vacc1x0123 = vqrdmulhq_s32(vacc1x0123, vmultiplier); |
| 320 | vacc1x4567 = vqrdmulhq_s32(vacc1x4567, vmultiplier); |
| 321 | vacc2x0123 = vqrdmulhq_s32(vacc2x0123, vmultiplier); |
| 322 | vacc2x4567 = vqrdmulhq_s32(vacc2x4567, vmultiplier); |
| 323 | vacc3x0123 = vqrdmulhq_s32(vacc3x0123, vmultiplier); |
| 324 | vacc3x4567 = vqrdmulhq_s32(vacc3x4567, vmultiplier); |
| 325 | |
| 326 | const int32x4_t vright_shift = vld1q_dup_s32(¶ms->neon.right_shift); |
| 327 | const int32x4_t vzero_shift_mask = vreinterpretq_s32_u32(vceqq_s32(vright_shift, vmovq_n_s32(0))); |
| 328 | vacc0x0123 = vsraq_n_s32(vacc0x0123, vbicq_s32(vacc0x0123, vzero_shift_mask), 31); |
| 329 | vacc0x4567 = vsraq_n_s32(vacc0x4567, vbicq_s32(vacc0x4567, vzero_shift_mask), 31); |
| 330 | vacc1x0123 = vsraq_n_s32(vacc1x0123, vbicq_s32(vacc1x0123, vzero_shift_mask), 31); |
| 331 | vacc1x4567 = vsraq_n_s32(vacc1x4567, vbicq_s32(vacc1x4567, vzero_shift_mask), 31); |
| 332 | vacc2x0123 = vsraq_n_s32(vacc2x0123, vbicq_s32(vacc2x0123, vzero_shift_mask), 31); |
| 333 | vacc2x4567 = vsraq_n_s32(vacc2x4567, vbicq_s32(vacc2x4567, vzero_shift_mask), 31); |
| 334 | vacc3x0123 = vsraq_n_s32(vacc3x0123, vbicq_s32(vacc3x0123, vzero_shift_mask), 31); |
| 335 | vacc3x4567 = vsraq_n_s32(vacc3x4567, vbicq_s32(vacc3x4567, vzero_shift_mask), 31); |
| 336 | |
| 337 | vacc0x0123 = vrshlq_s32(vacc0x0123, vright_shift); |
| 338 | vacc0x4567 = vrshlq_s32(vacc0x4567, vright_shift); |
| 339 | vacc1x0123 = vrshlq_s32(vacc1x0123, vright_shift); |
| 340 | vacc1x4567 = vrshlq_s32(vacc1x4567, vright_shift); |
| 341 | vacc2x0123 = vrshlq_s32(vacc2x0123, vright_shift); |
| 342 | vacc2x4567 = vrshlq_s32(vacc2x4567, vright_shift); |
| 343 | vacc3x0123 = vrshlq_s32(vacc3x0123, vright_shift); |
| 344 | vacc3x4567 = vrshlq_s32(vacc3x4567, vright_shift); |
| 345 | |
| 346 | const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->neon.output_zero_point); |
| 347 | #if XNN_ARCH_ARM64 |
| 348 | const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point); |
| 349 | const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point); |
| 350 | const int16x8_t vacc2x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc2x0123), vacc2x4567), voutput_zero_point); |
| 351 | const int16x8_t vacc3x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc3x0123), vacc3x4567), voutput_zero_point); |
| 352 | int8x16_t vout0x01234567_1x01234567 = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc1x01234567); |
| 353 | int8x16_t vout2x01234567_3x01234567 = vqmovn_high_s16(vqmovn_s16(vacc2x01234567), vacc3x01234567); |
| 354 | #else |
| 355 | const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point); |
| 356 | const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point); |
| 357 | const int16x8_t vacc2x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc2x0123), vqmovn_s32(vacc2x4567)), voutput_zero_point); |
| 358 | const int16x8_t vacc3x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc3x0123), vqmovn_s32(vacc3x4567)), voutput_zero_point); |
| 359 | |
| 360 | int8x16_t vout0x01234567_1x01234567 = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc1x01234567)); |
| 361 | int8x16_t vout2x01234567_3x01234567 = vcombine_s8(vqmovn_s16(vacc2x01234567), vqmovn_s16(vacc3x01234567)); |
| 362 | #endif |
| 363 | const int8x16_t voutput_min = vld1q_dup_s8(¶ms->neon.output_min); |
| 364 | const int8x16_t voutput_max = vld1q_dup_s8(¶ms->neon.output_max); |
| 365 | |
| 366 | vout2x01234567_3x01234567 = vmaxq_s8(vout2x01234567_3x01234567, voutput_min); |
| 367 | vout0x01234567_1x01234567 = vmaxq_s8(vout0x01234567_1x01234567, voutput_min); |
| 368 | |
| 369 | vout2x01234567_3x01234567 = vminq_s8(vout2x01234567_3x01234567, voutput_max); |
| 370 | vout0x01234567_1x01234567 = vminq_s8(vout0x01234567_1x01234567, voutput_max); |
| 371 | |
| 372 | if (nc >= 8) { |
| 373 | vst1_s8(c3 + 0, vget_high_s8(vout2x01234567_3x01234567)); |
| 374 | vst1_s8(c2 + 0, vget_low_s8(vout2x01234567_3x01234567)); |
| 375 | vst1_s8(c1 + 0, vget_high_s8(vout0x01234567_1x01234567)); |
| 376 | vst1_s8(c0 + 0, vget_low_s8(vout0x01234567_1x01234567)); |
| 377 | |
| 378 | c3 = (int8_t*) ((uintptr_t) c3 + cn_stride); |
| 379 | c2 = (int8_t*) ((uintptr_t) c2 + cn_stride); |
| 380 | c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); |
| 381 | c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); |
| 382 | |
| 383 | a = (const int8_t**restrict) ((uintptr_t) a - ks); |
| 384 | |
| 385 | nc -= 8; |
| 386 | } else { |
| 387 | if (nc & 4) { |
| 388 | vst1q_lane_u32(__builtin_assume_aligned(c3, 1), vreinterpretq_u32_s8(vout2x01234567_3x01234567), 2); c3 += 4; |
| 389 | vst1q_lane_u32(__builtin_assume_aligned(c2, 1), vreinterpretq_u32_s8(vout2x01234567_3x01234567), 0); c2 += 4; |
| 390 | vst1q_lane_u32(__builtin_assume_aligned(c1, 1), vreinterpretq_u32_s8(vout0x01234567_1x01234567), 2); c1 += 4; |
| 391 | vst1q_lane_u32(__builtin_assume_aligned(c0, 1), vreinterpretq_u32_s8(vout0x01234567_1x01234567), 0); c0 += 4; |
| 392 | vout2x01234567_3x01234567 = vextq_s8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 4); |
| 393 | vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4); |
| 394 | } |
| 395 | if (nc & 2) { |
| 396 | vst1q_lane_u16(__builtin_assume_aligned(c3, 1), vreinterpretq_u16_s8(vout2x01234567_3x01234567), 4); c3 += 2; |
| 397 | vst1q_lane_u16(__builtin_assume_aligned(c2, 1), vreinterpretq_u16_s8(vout2x01234567_3x01234567), 0); c2 += 2; |
| 398 | vst1q_lane_u16(__builtin_assume_aligned(c1, 1), vreinterpretq_u16_s8(vout0x01234567_1x01234567), 4); c1 += 2; |
| 399 | vst1q_lane_u16(__builtin_assume_aligned(c0, 1), vreinterpretq_u16_s8(vout0x01234567_1x01234567), 0); c0 += 2; |
| 400 | vout2x01234567_3x01234567 = vextq_s8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 2); |
| 401 | vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2); |
| 402 | } |
| 403 | if (nc & 1) { |
| 404 | vst1q_lane_s8(c3, vout2x01234567_3x01234567, 8); |
| 405 | vst1q_lane_s8(c2, vout2x01234567_3x01234567, 0); |
| 406 | vst1q_lane_s8(c1, vout0x01234567_1x01234567, 8); |
| 407 | vst1q_lane_s8(c0, vout0x01234567_1x01234567, 0); |
| 408 | } |
| 409 | |
| 410 | nc = 0; |
| 411 | } |
| 412 | } while (nc != 0); |
| 413 | } |