| Frank Barchard | 0bb49a7 | 2020-06-04 11:35:11 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2020 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | // |
| 9 | // Auto-generated file. Do not edit! |
| 10 | // Specification: test/f16-gavgpool-minmax.yaml |
| 11 | // Generator: tools/generate-gavgpool-test.py |
| 12 | |
| 13 | |
| 14 | #include <gtest/gtest.h> |
| 15 | |
| 16 | #include <xnnpack/common.h> |
| 17 | #include <xnnpack/isa-checks.h> |
| 18 | |
| 19 | #include <xnnpack/gavgpool.h> |
| 20 | #include "gavgpool-microkernel-tester.h" |
| 21 | |
| 22 | |
| 23 | #if XNN_ARCH_ARM64 |
| 24 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_eq_8_fulltile) { |
| 25 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 26 | GAvgPoolMicrokernelTester() |
| 27 | .rows(7) |
| 28 | .channels(8) |
| 29 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 30 | } |
| 31 | |
| 32 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_eq_8_subtile) { |
| 33 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 34 | for (size_t rows = 1; rows < 7; rows++) { |
| 35 | GAvgPoolMicrokernelTester() |
| 36 | .rows(rows) |
| 37 | .channels(8) |
| 38 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 39 | } |
| 40 | } |
| 41 | |
| 42 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_eq_8_fulltile_with_input_stride) { |
| 43 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 44 | GAvgPoolMicrokernelTester() |
| 45 | .rows(7) |
| 46 | .channels(8) |
| 47 | .input_stride(11) |
| 48 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 49 | } |
| 50 | |
| 51 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_eq_8_fulltile_with_qmax) { |
| 52 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 53 | GAvgPoolMicrokernelTester() |
| 54 | .rows(7) |
| 55 | .channels(8) |
| 56 | .qmax(128) |
| 57 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 58 | } |
| 59 | |
| 60 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_eq_8_fulltile_with_qmin) { |
| 61 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 62 | GAvgPoolMicrokernelTester() |
| 63 | .rows(7) |
| 64 | .channels(8) |
| 65 | .qmin(128) |
| 66 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 67 | } |
| 68 | |
| 69 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_div_8_fulltile) { |
| 70 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 71 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 72 | GAvgPoolMicrokernelTester() |
| 73 | .rows(7) |
| 74 | .channels(channels) |
| 75 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 76 | } |
| 77 | } |
| 78 | |
| 79 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_div_8_subtile) { |
| 80 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 81 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 82 | for (size_t rows = 1; rows < 7; rows++) { |
| 83 | GAvgPoolMicrokernelTester() |
| 84 | .rows(rows) |
| 85 | .channels(channels) |
| 86 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 87 | } |
| 88 | } |
| 89 | } |
| 90 | |
| 91 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_lt_8_fulltile) { |
| 92 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 93 | for (size_t channels = 1; channels < 8; channels++) { |
| 94 | GAvgPoolMicrokernelTester() |
| 95 | .rows(7) |
| 96 | .channels(channels) |
| 97 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 98 | } |
| 99 | } |
| 100 | |
| 101 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_lt_8_subtile) { |
| 102 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 103 | for (size_t channels = 1; channels < 8; channels++) { |
| 104 | for (size_t rows = 1; rows < 7; rows++) { |
| 105 | GAvgPoolMicrokernelTester() |
| 106 | .rows(rows) |
| 107 | .channels(channels) |
| 108 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 109 | } |
| 110 | } |
| 111 | } |
| 112 | |
| 113 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_lt_8_fulltile_with_qmax) { |
| 114 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 115 | for (size_t channels = 1; channels < 8; channels++) { |
| 116 | GAvgPoolMicrokernelTester() |
| 117 | .rows(7) |
| 118 | .channels(channels) |
| 119 | .qmax(128) |
| 120 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 121 | } |
| 122 | } |
| 123 | |
| 124 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_lt_8_fulltile_with_qmin) { |
| 125 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 126 | for (size_t channels = 1; channels < 8; channels++) { |
| 127 | GAvgPoolMicrokernelTester() |
| 128 | .rows(7) |
| 129 | .channels(channels) |
| 130 | .qmin(128) |
| 131 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 132 | } |
| 133 | } |
| 134 | |
| 135 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_gt_8_fulltile) { |
| 136 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 137 | for (size_t channels = 9; channels < 16; channels++) { |
| 138 | GAvgPoolMicrokernelTester() |
| 139 | .rows(7) |
| 140 | .channels(channels) |
| 141 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 142 | } |
| 143 | } |
| 144 | |
| 145 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_gt_8_subtile) { |
| 146 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 147 | for (size_t channels = 9; channels < 16; channels++) { |
| 148 | for (size_t rows = 1; rows < 7; rows++) { |
| 149 | GAvgPoolMicrokernelTester() |
| 150 | .rows(rows) |
| 151 | .channels(channels) |
| 152 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 153 | } |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_gt_8_fulltile_with_qmax) { |
| 158 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 159 | for (size_t channels = 9; channels < 16; channels++) { |
| 160 | GAvgPoolMicrokernelTester() |
| 161 | .rows(7) |
| 162 | .channels(channels) |
| 163 | .qmax(128) |
| 164 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 165 | } |
| 166 | } |
| 167 | |
| 168 | TEST(F16_GAVGPOOL_MINMAX_7X__NEONFP16ARITH_C8, channels_gt_8_fulltile_with_qmin) { |
| 169 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 170 | for (size_t channels = 9; channels < 16; channels++) { |
| 171 | GAvgPoolMicrokernelTester() |
| 172 | .rows(7) |
| 173 | .channels(channels) |
| 174 | .qmin(128) |
| 175 | .Test(xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8); |
| 176 | } |
| 177 | } |
| 178 | #endif // XNN_ARCH_ARM64 |
| 179 | |
| 180 | |
| 181 | #if XNN_ARCH_ARM64 |
| 182 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_eq_8_2pass_fulltile) { |
| 183 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 184 | GAvgPoolMicrokernelTester() |
| 185 | .rows(14) |
| 186 | .channels(8) |
| 187 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 188 | } |
| 189 | |
| 190 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_eq_8_2pass_fulltile_with_input_stride) { |
| 191 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 192 | GAvgPoolMicrokernelTester() |
| 193 | .rows(14) |
| 194 | .channels(8) |
| 195 | .input_stride(11) |
| 196 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 197 | } |
| 198 | |
| 199 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_eq_8_2pass_fulltile_with_qmax) { |
| 200 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 201 | GAvgPoolMicrokernelTester() |
| 202 | .rows(14) |
| 203 | .channels(8) |
| 204 | .qmax(128) |
| 205 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 206 | } |
| 207 | |
| 208 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_eq_8_2pass_fulltile_with_qmin) { |
| 209 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 210 | GAvgPoolMicrokernelTester() |
| 211 | .rows(14) |
| 212 | .channels(8) |
| 213 | .qmin(128) |
| 214 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 215 | } |
| 216 | |
| 217 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_eq_8_2pass_subtile) { |
| 218 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 219 | for (size_t rows = 8; rows < 14; rows++) { |
| 220 | GAvgPoolMicrokernelTester() |
| 221 | .rows(rows) |
| 222 | .channels(8) |
| 223 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 224 | } |
| 225 | } |
| 226 | |
| 227 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_eq_8_2pass_subtile_with_input_stride) { |
| 228 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 229 | for (size_t rows = 8; rows < 14; rows++) { |
| 230 | GAvgPoolMicrokernelTester() |
| 231 | .rows(rows) |
| 232 | .channels(8) |
| 233 | .input_stride(11) |
| 234 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 235 | } |
| 236 | } |
| 237 | |
| 238 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_eq_8_multipass_fulltile) { |
| 239 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 240 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 241 | GAvgPoolMicrokernelTester() |
| 242 | .rows(rows) |
| 243 | .channels(8) |
| 244 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 245 | } |
| 246 | } |
| 247 | |
| 248 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_eq_8_multipass_fulltile_with_input_stride) { |
| 249 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 250 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 251 | GAvgPoolMicrokernelTester() |
| 252 | .rows(rows) |
| 253 | .channels(8) |
| 254 | .input_stride(11) |
| 255 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_div_8_2pass_fulltile) { |
| 260 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 261 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 262 | GAvgPoolMicrokernelTester() |
| 263 | .rows(14) |
| 264 | .channels(channels) |
| 265 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 266 | } |
| 267 | } |
| 268 | |
| 269 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_div_8_2pass_subtile) { |
| 270 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 271 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 272 | for (size_t rows = 8; rows < 14; rows++) { |
| 273 | GAvgPoolMicrokernelTester() |
| 274 | .rows(rows) |
| 275 | .channels(channels) |
| 276 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 277 | } |
| 278 | } |
| 279 | } |
| 280 | |
| 281 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_div_8_multipass_fulltile) { |
| 282 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 283 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 284 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 285 | GAvgPoolMicrokernelTester() |
| 286 | .rows(rows) |
| 287 | .channels(channels) |
| 288 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 289 | } |
| 290 | } |
| 291 | } |
| 292 | |
| 293 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_div_8_multipass_fulltile_with_input_stride) { |
| 294 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 295 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 296 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 297 | GAvgPoolMicrokernelTester() |
| 298 | .rows(rows) |
| 299 | .channels(channels) |
| 300 | .input_stride(131) |
| 301 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 302 | } |
| 303 | } |
| 304 | } |
| 305 | |
| 306 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_lt_8_2pass_fulltile) { |
| 307 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 308 | for (size_t channels = 1; channels < 8; channels++) { |
| 309 | GAvgPoolMicrokernelTester() |
| 310 | .rows(14) |
| 311 | .channels(channels) |
| 312 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 313 | } |
| 314 | } |
| 315 | |
| 316 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_lt_8_2pass_fulltile_with_qmax) { |
| 317 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 318 | for (size_t channels = 1; channels < 8; channels++) { |
| 319 | GAvgPoolMicrokernelTester() |
| 320 | .rows(14) |
| 321 | .channels(channels) |
| 322 | .qmax(128) |
| 323 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 324 | } |
| 325 | } |
| 326 | |
| 327 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_lt_8_2pass_fulltile_with_qmin) { |
| 328 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 329 | for (size_t channels = 1; channels < 8; channels++) { |
| 330 | GAvgPoolMicrokernelTester() |
| 331 | .rows(14) |
| 332 | .channels(channels) |
| 333 | .qmin(128) |
| 334 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 335 | } |
| 336 | } |
| 337 | |
| 338 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_lt_8_2pass_subtile) { |
| 339 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 340 | for (size_t channels = 1; channels < 8; channels++) { |
| 341 | for (size_t rows = 8; rows < 14; rows++) { |
| 342 | GAvgPoolMicrokernelTester() |
| 343 | .rows(rows) |
| 344 | .channels(channels) |
| 345 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 346 | } |
| 347 | } |
| 348 | } |
| 349 | |
| 350 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_lt_8_multipass_fulltile) { |
| 351 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 352 | for (size_t channels = 1; channels < 8; channels++) { |
| 353 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 354 | GAvgPoolMicrokernelTester() |
| 355 | .rows(rows) |
| 356 | .channels(channels) |
| 357 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 358 | } |
| 359 | } |
| 360 | } |
| 361 | |
| 362 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_lt_8_multipass_fulltile_with_input_stride) { |
| 363 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 364 | for (size_t channels = 1; channels < 8; channels++) { |
| 365 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 366 | GAvgPoolMicrokernelTester() |
| 367 | .rows(rows) |
| 368 | .channels(channels) |
| 369 | .input_stride(11) |
| 370 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 371 | } |
| 372 | } |
| 373 | } |
| 374 | |
| 375 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_gt_8_2pass_fulltile) { |
| 376 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 377 | for (size_t channels = 9; channels < 16; channels++) { |
| 378 | GAvgPoolMicrokernelTester() |
| 379 | .rows(14) |
| 380 | .channels(channels) |
| 381 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 382 | } |
| 383 | } |
| 384 | |
| 385 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_gt_8_2pass_fulltile_with_qmax) { |
| 386 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 387 | for (size_t channels = 9; channels < 16; channels++) { |
| 388 | GAvgPoolMicrokernelTester() |
| 389 | .rows(14) |
| 390 | .channels(channels) |
| 391 | .qmax(128) |
| 392 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 393 | } |
| 394 | } |
| 395 | |
| 396 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_gt_8_2pass_fulltile_with_qmin) { |
| 397 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 398 | for (size_t channels = 9; channels < 16; channels++) { |
| 399 | GAvgPoolMicrokernelTester() |
| 400 | .rows(14) |
| 401 | .channels(channels) |
| 402 | .qmin(128) |
| 403 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 404 | } |
| 405 | } |
| 406 | |
| 407 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_gt_8_2pass_subtile) { |
| 408 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 409 | for (size_t channels = 9; channels < 16; channels++) { |
| 410 | for (size_t rows = 8; rows < 14; rows++) { |
| 411 | GAvgPoolMicrokernelTester() |
| 412 | .rows(rows) |
| 413 | .channels(channels) |
| 414 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 415 | } |
| 416 | } |
| 417 | } |
| 418 | |
| 419 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_gt_8_multipass_fulltile) { |
| 420 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 421 | for (size_t channels = 9; channels < 16; channels++) { |
| 422 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 423 | GAvgPoolMicrokernelTester() |
| 424 | .rows(rows) |
| 425 | .channels(channels) |
| 426 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 427 | } |
| 428 | } |
| 429 | } |
| 430 | |
| 431 | TEST(F16_GAVGPOOL_MINMAX_7P7X__NEONFP16ARITH_C8, channels_gt_8_multipass_fulltile_with_input_stride) { |
| 432 | TEST_REQUIRES_ARM_NEON_FP16_ARITH; |
| 433 | for (size_t channels = 9; channels < 16; channels++) { |
| 434 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 435 | GAvgPoolMicrokernelTester() |
| 436 | .rows(rows) |
| 437 | .channels(channels) |
| 438 | .input_stride(29) |
| 439 | .Test(xnn_f16_gavgpool_minmax_ukernel_7p7x__neonfp16arith_c8); |
| 440 | } |
| 441 | } |
| 442 | } |
| 443 | #endif // XNN_ARCH_ARM64 |