XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 5 | // |
| 6 | // Auto-generated file. Do not edit! |
| 7 | // Specification: test/f32-hswish.yaml |
| 8 | // Generator: tools/generate-hswish-test.py |
| 9 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 10 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 11 | #include <gtest/gtest.h> |
| 12 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 13 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 14 | #include <xnnpack/isa-checks.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 15 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 16 | #include <xnnpack/hswish.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 17 | #include "hswish-microkernel-tester.h" |
| 18 | |
| 19 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 20 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 21 | TEST(F32_HSWISH__NEON_X4, batch_eq_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 22 | TEST_REQUIRES_ARM_NEON; |
| 23 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 24 | .batch_size(4) |
| 25 | .Test(xnn_f32_hswish_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 26 | } |
| 27 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 28 | TEST(F32_HSWISH__NEON_X4, batch_div_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 29 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 30 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 31 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 32 | .batch_size(batch_size) |
| 33 | .Test(xnn_f32_hswish_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 34 | } |
| 35 | } |
| 36 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 37 | TEST(F32_HSWISH__NEON_X4, batch_lt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 38 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 39 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 40 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 41 | .batch_size(batch_size) |
| 42 | .Test(xnn_f32_hswish_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 43 | } |
| 44 | } |
| 45 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 46 | TEST(F32_HSWISH__NEON_X4, batch_gt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 47 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 48 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 49 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 50 | .batch_size(batch_size) |
| 51 | .Test(xnn_f32_hswish_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 52 | } |
| 53 | } |
| 54 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 55 | TEST(F32_HSWISH__NEON_X4, inplace) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 56 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 57 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 58 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 59 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 60 | .inplace(true) |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 61 | .Test(xnn_f32_hswish_ukernel__neon_x4); |
| 62 | } |
| 63 | } |
| 64 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 65 | |
| 66 | |
| 67 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 68 | TEST(F32_HSWISH__NEON_X8, batch_eq_8) { |
| 69 | TEST_REQUIRES_ARM_NEON; |
| 70 | HSwishMicrokernelTester() |
| 71 | .batch_size(8) |
| 72 | .Test(xnn_f32_hswish_ukernel__neon_x8); |
| 73 | } |
| 74 | |
| 75 | TEST(F32_HSWISH__NEON_X8, batch_div_8) { |
| 76 | TEST_REQUIRES_ARM_NEON; |
| 77 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
| 78 | HSwishMicrokernelTester() |
| 79 | .batch_size(batch_size) |
| 80 | .Test(xnn_f32_hswish_ukernel__neon_x8); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 81 | } |
| 82 | } |
| 83 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 84 | TEST(F32_HSWISH__NEON_X8, batch_lt_8) { |
| 85 | TEST_REQUIRES_ARM_NEON; |
| 86 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
| 87 | HSwishMicrokernelTester() |
| 88 | .batch_size(batch_size) |
| 89 | .Test(xnn_f32_hswish_ukernel__neon_x8); |
| 90 | } |
| 91 | } |
| 92 | |
| 93 | TEST(F32_HSWISH__NEON_X8, batch_gt_8) { |
| 94 | TEST_REQUIRES_ARM_NEON; |
| 95 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
| 96 | HSwishMicrokernelTester() |
| 97 | .batch_size(batch_size) |
| 98 | .Test(xnn_f32_hswish_ukernel__neon_x8); |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | TEST(F32_HSWISH__NEON_X8, inplace) { |
| 103 | TEST_REQUIRES_ARM_NEON; |
| 104 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 105 | HSwishMicrokernelTester() |
| 106 | .batch_size(batch_size) |
| 107 | .inplace(true) |
| 108 | .Test(xnn_f32_hswish_ukernel__neon_x8); |
| 109 | } |
| 110 | } |
| 111 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 112 | |
| 113 | |
Marat Dukhan | 55dde5b | 2020-07-10 22:48:54 -0700 | [diff] [blame] | 114 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 115 | TEST(F32_HSWISH__NEON_X16, batch_eq_16) { |
| 116 | TEST_REQUIRES_ARM_NEON; |
| 117 | HSwishMicrokernelTester() |
| 118 | .batch_size(16) |
| 119 | .Test(xnn_f32_hswish_ukernel__neon_x16); |
| 120 | } |
| 121 | |
| 122 | TEST(F32_HSWISH__NEON_X16, batch_div_16) { |
| 123 | TEST_REQUIRES_ARM_NEON; |
| 124 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
| 125 | HSwishMicrokernelTester() |
| 126 | .batch_size(batch_size) |
| 127 | .Test(xnn_f32_hswish_ukernel__neon_x16); |
| 128 | } |
| 129 | } |
| 130 | |
| 131 | TEST(F32_HSWISH__NEON_X16, batch_lt_16) { |
| 132 | TEST_REQUIRES_ARM_NEON; |
| 133 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
| 134 | HSwishMicrokernelTester() |
| 135 | .batch_size(batch_size) |
| 136 | .Test(xnn_f32_hswish_ukernel__neon_x16); |
| 137 | } |
| 138 | } |
| 139 | |
| 140 | TEST(F32_HSWISH__NEON_X16, batch_gt_16) { |
| 141 | TEST_REQUIRES_ARM_NEON; |
| 142 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
| 143 | HSwishMicrokernelTester() |
| 144 | .batch_size(batch_size) |
| 145 | .Test(xnn_f32_hswish_ukernel__neon_x16); |
| 146 | } |
| 147 | } |
| 148 | |
| 149 | TEST(F32_HSWISH__NEON_X16, inplace) { |
| 150 | TEST_REQUIRES_ARM_NEON; |
| 151 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 152 | HSwishMicrokernelTester() |
| 153 | .batch_size(batch_size) |
| 154 | .inplace(true) |
| 155 | .Test(xnn_f32_hswish_ukernel__neon_x16); |
| 156 | } |
| 157 | } |
| 158 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 159 | |
| 160 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 161 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 162 | TEST(F32_HSWISH__SSE_X4, batch_eq_4) { |
| 163 | TEST_REQUIRES_X86_SSE; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 164 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 165 | .batch_size(4) |
| 166 | .Test(xnn_f32_hswish_ukernel__sse_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 167 | } |
| 168 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 169 | TEST(F32_HSWISH__SSE_X4, batch_div_4) { |
| 170 | TEST_REQUIRES_X86_SSE; |
| 171 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 172 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 173 | .batch_size(batch_size) |
| 174 | .Test(xnn_f32_hswish_ukernel__sse_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 175 | } |
| 176 | } |
| 177 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 178 | TEST(F32_HSWISH__SSE_X4, batch_lt_4) { |
| 179 | TEST_REQUIRES_X86_SSE; |
| 180 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 181 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 182 | .batch_size(batch_size) |
| 183 | .Test(xnn_f32_hswish_ukernel__sse_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 184 | } |
| 185 | } |
| 186 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 187 | TEST(F32_HSWISH__SSE_X4, batch_gt_4) { |
| 188 | TEST_REQUIRES_X86_SSE; |
| 189 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 190 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 191 | .batch_size(batch_size) |
| 192 | .Test(xnn_f32_hswish_ukernel__sse_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 193 | } |
| 194 | } |
| 195 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 196 | TEST(F32_HSWISH__SSE_X4, inplace) { |
| 197 | TEST_REQUIRES_X86_SSE; |
| 198 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 199 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 200 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 201 | .inplace(true) |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 202 | .Test(xnn_f32_hswish_ukernel__sse_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 203 | } |
| 204 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 205 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 206 | |
| 207 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 208 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 209 | TEST(F32_HSWISH__SSE_X8, batch_eq_8) { |
| 210 | TEST_REQUIRES_X86_SSE; |
| 211 | HSwishMicrokernelTester() |
| 212 | .batch_size(8) |
| 213 | .Test(xnn_f32_hswish_ukernel__sse_x8); |
| 214 | } |
| 215 | |
| 216 | TEST(F32_HSWISH__SSE_X8, batch_div_8) { |
| 217 | TEST_REQUIRES_X86_SSE; |
| 218 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
| 219 | HSwishMicrokernelTester() |
| 220 | .batch_size(batch_size) |
| 221 | .Test(xnn_f32_hswish_ukernel__sse_x8); |
| 222 | } |
| 223 | } |
| 224 | |
| 225 | TEST(F32_HSWISH__SSE_X8, batch_lt_8) { |
| 226 | TEST_REQUIRES_X86_SSE; |
| 227 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
| 228 | HSwishMicrokernelTester() |
| 229 | .batch_size(batch_size) |
| 230 | .Test(xnn_f32_hswish_ukernel__sse_x8); |
| 231 | } |
| 232 | } |
| 233 | |
| 234 | TEST(F32_HSWISH__SSE_X8, batch_gt_8) { |
| 235 | TEST_REQUIRES_X86_SSE; |
| 236 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
| 237 | HSwishMicrokernelTester() |
| 238 | .batch_size(batch_size) |
| 239 | .Test(xnn_f32_hswish_ukernel__sse_x8); |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | TEST(F32_HSWISH__SSE_X8, inplace) { |
| 244 | TEST_REQUIRES_X86_SSE; |
| 245 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 246 | HSwishMicrokernelTester() |
| 247 | .batch_size(batch_size) |
| 248 | .inplace(true) |
| 249 | .Test(xnn_f32_hswish_ukernel__sse_x8); |
| 250 | } |
| 251 | } |
| 252 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 253 | |
| 254 | |
| 255 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 256 | TEST(F32_HSWISH__AVX_X8, batch_eq_8) { |
| 257 | TEST_REQUIRES_X86_AVX; |
| 258 | HSwishMicrokernelTester() |
| 259 | .batch_size(8) |
| 260 | .Test(xnn_f32_hswish_ukernel__avx_x8); |
| 261 | } |
| 262 | |
| 263 | TEST(F32_HSWISH__AVX_X8, batch_div_8) { |
| 264 | TEST_REQUIRES_X86_AVX; |
| 265 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
| 266 | HSwishMicrokernelTester() |
| 267 | .batch_size(batch_size) |
| 268 | .Test(xnn_f32_hswish_ukernel__avx_x8); |
| 269 | } |
| 270 | } |
| 271 | |
| 272 | TEST(F32_HSWISH__AVX_X8, batch_lt_8) { |
| 273 | TEST_REQUIRES_X86_AVX; |
| 274 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
| 275 | HSwishMicrokernelTester() |
| 276 | .batch_size(batch_size) |
| 277 | .Test(xnn_f32_hswish_ukernel__avx_x8); |
| 278 | } |
| 279 | } |
| 280 | |
| 281 | TEST(F32_HSWISH__AVX_X8, batch_gt_8) { |
| 282 | TEST_REQUIRES_X86_AVX; |
| 283 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
| 284 | HSwishMicrokernelTester() |
| 285 | .batch_size(batch_size) |
| 286 | .Test(xnn_f32_hswish_ukernel__avx_x8); |
| 287 | } |
| 288 | } |
| 289 | |
| 290 | TEST(F32_HSWISH__AVX_X8, inplace) { |
| 291 | TEST_REQUIRES_X86_AVX; |
| 292 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 293 | HSwishMicrokernelTester() |
| 294 | .batch_size(batch_size) |
| 295 | .inplace(true) |
| 296 | .Test(xnn_f32_hswish_ukernel__avx_x8); |
| 297 | } |
| 298 | } |
| 299 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 300 | |
| 301 | |
| 302 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 303 | TEST(F32_HSWISH__AVX_X16, batch_eq_16) { |
| 304 | TEST_REQUIRES_X86_AVX; |
| 305 | HSwishMicrokernelTester() |
| 306 | .batch_size(16) |
| 307 | .Test(xnn_f32_hswish_ukernel__avx_x16); |
| 308 | } |
| 309 | |
| 310 | TEST(F32_HSWISH__AVX_X16, batch_div_16) { |
| 311 | TEST_REQUIRES_X86_AVX; |
| 312 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
| 313 | HSwishMicrokernelTester() |
| 314 | .batch_size(batch_size) |
| 315 | .Test(xnn_f32_hswish_ukernel__avx_x16); |
| 316 | } |
| 317 | } |
| 318 | |
| 319 | TEST(F32_HSWISH__AVX_X16, batch_lt_16) { |
| 320 | TEST_REQUIRES_X86_AVX; |
| 321 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
| 322 | HSwishMicrokernelTester() |
| 323 | .batch_size(batch_size) |
| 324 | .Test(xnn_f32_hswish_ukernel__avx_x16); |
| 325 | } |
| 326 | } |
| 327 | |
| 328 | TEST(F32_HSWISH__AVX_X16, batch_gt_16) { |
| 329 | TEST_REQUIRES_X86_AVX; |
| 330 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
| 331 | HSwishMicrokernelTester() |
| 332 | .batch_size(batch_size) |
| 333 | .Test(xnn_f32_hswish_ukernel__avx_x16); |
| 334 | } |
| 335 | } |
| 336 | |
| 337 | TEST(F32_HSWISH__AVX_X16, inplace) { |
| 338 | TEST_REQUIRES_X86_AVX; |
| 339 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 340 | HSwishMicrokernelTester() |
| 341 | .batch_size(batch_size) |
| 342 | .inplace(true) |
| 343 | .Test(xnn_f32_hswish_ukernel__avx_x16); |
| 344 | } |
| 345 | } |
| 346 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 347 | |
| 348 | |
| 349 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 350 | TEST(F32_HSWISH__FMA3_X8, batch_eq_8) { |
| 351 | TEST_REQUIRES_X86_FMA3; |
| 352 | HSwishMicrokernelTester() |
| 353 | .batch_size(8) |
| 354 | .Test(xnn_f32_hswish_ukernel__fma3_x8); |
| 355 | } |
| 356 | |
| 357 | TEST(F32_HSWISH__FMA3_X8, batch_div_8) { |
| 358 | TEST_REQUIRES_X86_FMA3; |
| 359 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
| 360 | HSwishMicrokernelTester() |
| 361 | .batch_size(batch_size) |
| 362 | .Test(xnn_f32_hswish_ukernel__fma3_x8); |
| 363 | } |
| 364 | } |
| 365 | |
| 366 | TEST(F32_HSWISH__FMA3_X8, batch_lt_8) { |
| 367 | TEST_REQUIRES_X86_FMA3; |
| 368 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
| 369 | HSwishMicrokernelTester() |
| 370 | .batch_size(batch_size) |
| 371 | .Test(xnn_f32_hswish_ukernel__fma3_x8); |
| 372 | } |
| 373 | } |
| 374 | |
| 375 | TEST(F32_HSWISH__FMA3_X8, batch_gt_8) { |
| 376 | TEST_REQUIRES_X86_FMA3; |
| 377 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
| 378 | HSwishMicrokernelTester() |
| 379 | .batch_size(batch_size) |
| 380 | .Test(xnn_f32_hswish_ukernel__fma3_x8); |
| 381 | } |
| 382 | } |
| 383 | |
| 384 | TEST(F32_HSWISH__FMA3_X8, inplace) { |
| 385 | TEST_REQUIRES_X86_FMA3; |
| 386 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 387 | HSwishMicrokernelTester() |
| 388 | .batch_size(batch_size) |
| 389 | .inplace(true) |
| 390 | .Test(xnn_f32_hswish_ukernel__fma3_x8); |
| 391 | } |
| 392 | } |
| 393 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 394 | |
| 395 | |
| 396 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 397 | TEST(F32_HSWISH__FMA3_X16, batch_eq_16) { |
| 398 | TEST_REQUIRES_X86_FMA3; |
| 399 | HSwishMicrokernelTester() |
| 400 | .batch_size(16) |
| 401 | .Test(xnn_f32_hswish_ukernel__fma3_x16); |
| 402 | } |
| 403 | |
| 404 | TEST(F32_HSWISH__FMA3_X16, batch_div_16) { |
| 405 | TEST_REQUIRES_X86_FMA3; |
| 406 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
| 407 | HSwishMicrokernelTester() |
| 408 | .batch_size(batch_size) |
| 409 | .Test(xnn_f32_hswish_ukernel__fma3_x16); |
| 410 | } |
| 411 | } |
| 412 | |
| 413 | TEST(F32_HSWISH__FMA3_X16, batch_lt_16) { |
| 414 | TEST_REQUIRES_X86_FMA3; |
| 415 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
| 416 | HSwishMicrokernelTester() |
| 417 | .batch_size(batch_size) |
| 418 | .Test(xnn_f32_hswish_ukernel__fma3_x16); |
| 419 | } |
| 420 | } |
| 421 | |
| 422 | TEST(F32_HSWISH__FMA3_X16, batch_gt_16) { |
| 423 | TEST_REQUIRES_X86_FMA3; |
| 424 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
| 425 | HSwishMicrokernelTester() |
| 426 | .batch_size(batch_size) |
| 427 | .Test(xnn_f32_hswish_ukernel__fma3_x16); |
| 428 | } |
| 429 | } |
| 430 | |
| 431 | TEST(F32_HSWISH__FMA3_X16, inplace) { |
| 432 | TEST_REQUIRES_X86_FMA3; |
| 433 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 434 | HSwishMicrokernelTester() |
| 435 | .batch_size(batch_size) |
| 436 | .inplace(true) |
| 437 | .Test(xnn_f32_hswish_ukernel__fma3_x16); |
| 438 | } |
| 439 | } |
| 440 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 441 | |
| 442 | |
| 443 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 444 | TEST(F32_HSWISH__AVX512F_X16, batch_eq_16) { |
| 445 | TEST_REQUIRES_X86_AVX512F; |
| 446 | HSwishMicrokernelTester() |
| 447 | .batch_size(16) |
| 448 | .Test(xnn_f32_hswish_ukernel__avx512f_x16); |
| 449 | } |
| 450 | |
| 451 | TEST(F32_HSWISH__AVX512F_X16, batch_div_16) { |
| 452 | TEST_REQUIRES_X86_AVX512F; |
| 453 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
| 454 | HSwishMicrokernelTester() |
| 455 | .batch_size(batch_size) |
| 456 | .Test(xnn_f32_hswish_ukernel__avx512f_x16); |
| 457 | } |
| 458 | } |
| 459 | |
| 460 | TEST(F32_HSWISH__AVX512F_X16, batch_lt_16) { |
| 461 | TEST_REQUIRES_X86_AVX512F; |
| 462 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
| 463 | HSwishMicrokernelTester() |
| 464 | .batch_size(batch_size) |
| 465 | .Test(xnn_f32_hswish_ukernel__avx512f_x16); |
| 466 | } |
| 467 | } |
| 468 | |
| 469 | TEST(F32_HSWISH__AVX512F_X16, batch_gt_16) { |
| 470 | TEST_REQUIRES_X86_AVX512F; |
| 471 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
| 472 | HSwishMicrokernelTester() |
| 473 | .batch_size(batch_size) |
| 474 | .Test(xnn_f32_hswish_ukernel__avx512f_x16); |
| 475 | } |
| 476 | } |
| 477 | |
| 478 | TEST(F32_HSWISH__AVX512F_X16, inplace) { |
| 479 | TEST_REQUIRES_X86_AVX512F; |
| 480 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 481 | HSwishMicrokernelTester() |
| 482 | .batch_size(batch_size) |
| 483 | .inplace(true) |
| 484 | .Test(xnn_f32_hswish_ukernel__avx512f_x16); |
| 485 | } |
| 486 | } |
| 487 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 488 | |
| 489 | |
| 490 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 491 | TEST(F32_HSWISH__AVX512F_X32, batch_eq_32) { |
| 492 | TEST_REQUIRES_X86_AVX512F; |
| 493 | HSwishMicrokernelTester() |
| 494 | .batch_size(32) |
| 495 | .Test(xnn_f32_hswish_ukernel__avx512f_x32); |
| 496 | } |
| 497 | |
| 498 | TEST(F32_HSWISH__AVX512F_X32, batch_div_32) { |
| 499 | TEST_REQUIRES_X86_AVX512F; |
| 500 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
| 501 | HSwishMicrokernelTester() |
| 502 | .batch_size(batch_size) |
| 503 | .Test(xnn_f32_hswish_ukernel__avx512f_x32); |
| 504 | } |
| 505 | } |
| 506 | |
| 507 | TEST(F32_HSWISH__AVX512F_X32, batch_lt_32) { |
| 508 | TEST_REQUIRES_X86_AVX512F; |
| 509 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
| 510 | HSwishMicrokernelTester() |
| 511 | .batch_size(batch_size) |
| 512 | .Test(xnn_f32_hswish_ukernel__avx512f_x32); |
| 513 | } |
| 514 | } |
| 515 | |
| 516 | TEST(F32_HSWISH__AVX512F_X32, batch_gt_32) { |
| 517 | TEST_REQUIRES_X86_AVX512F; |
| 518 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
| 519 | HSwishMicrokernelTester() |
| 520 | .batch_size(batch_size) |
| 521 | .Test(xnn_f32_hswish_ukernel__avx512f_x32); |
| 522 | } |
| 523 | } |
| 524 | |
| 525 | TEST(F32_HSWISH__AVX512F_X32, inplace) { |
| 526 | TEST_REQUIRES_X86_AVX512F; |
| 527 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
| 528 | HSwishMicrokernelTester() |
| 529 | .batch_size(batch_size) |
| 530 | .inplace(true) |
| 531 | .Test(xnn_f32_hswish_ukernel__avx512f_x32); |
| 532 | } |
| 533 | } |
| 534 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 535 | |
| 536 | |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 537 | #if XNN_ARCH_WASMSIMD |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 538 | TEST(F32_HSWISH__WASMSIMD_X4, batch_eq_4) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 539 | HSwishMicrokernelTester() |
| 540 | .batch_size(4) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 541 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x4); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 542 | } |
| 543 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 544 | TEST(F32_HSWISH__WASMSIMD_X4, batch_div_4) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 545 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
| 546 | HSwishMicrokernelTester() |
| 547 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 548 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x4); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 549 | } |
| 550 | } |
| 551 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 552 | TEST(F32_HSWISH__WASMSIMD_X4, batch_lt_4) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 553 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
| 554 | HSwishMicrokernelTester() |
| 555 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 556 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x4); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 557 | } |
| 558 | } |
| 559 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 560 | TEST(F32_HSWISH__WASMSIMD_X4, batch_gt_4) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 561 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
| 562 | HSwishMicrokernelTester() |
| 563 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 564 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x4); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 565 | } |
| 566 | } |
| 567 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 568 | TEST(F32_HSWISH__WASMSIMD_X4, inplace) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 569 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 570 | HSwishMicrokernelTester() |
| 571 | .batch_size(batch_size) |
| 572 | .inplace(true) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 573 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x4); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 574 | } |
| 575 | } |
| 576 | #endif // XNN_ARCH_WASMSIMD |
| 577 | |
| 578 | |
| 579 | #if XNN_ARCH_WASMSIMD |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 580 | TEST(F32_HSWISH__WASMSIMD_X8, batch_eq_8) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 581 | HSwishMicrokernelTester() |
| 582 | .batch_size(8) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 583 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x8); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 584 | } |
| 585 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 586 | TEST(F32_HSWISH__WASMSIMD_X8, batch_div_8) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 587 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
| 588 | HSwishMicrokernelTester() |
| 589 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 590 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x8); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 591 | } |
| 592 | } |
| 593 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 594 | TEST(F32_HSWISH__WASMSIMD_X8, batch_lt_8) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 595 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
| 596 | HSwishMicrokernelTester() |
| 597 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 598 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x8); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 599 | } |
| 600 | } |
| 601 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 602 | TEST(F32_HSWISH__WASMSIMD_X8, batch_gt_8) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 603 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
| 604 | HSwishMicrokernelTester() |
| 605 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 606 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x8); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 607 | } |
| 608 | } |
| 609 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 610 | TEST(F32_HSWISH__WASMSIMD_X8, inplace) { |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 611 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 612 | HSwishMicrokernelTester() |
| 613 | .batch_size(batch_size) |
| 614 | .inplace(true) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 615 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x8); |
Marat Dukhan | 9baec80 | 2020-06-25 21:34:35 -0700 | [diff] [blame] | 616 | } |
| 617 | } |
| 618 | #endif // XNN_ARCH_WASMSIMD |
| 619 | |
| 620 | |
| 621 | #if XNN_ARCH_WASMSIMD |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 622 | TEST(F32_HSWISH__WASMSIMD_X16, batch_eq_16) { |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 623 | HSwishMicrokernelTester() |
| 624 | .batch_size(16) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 625 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x16); |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 626 | } |
| 627 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 628 | TEST(F32_HSWISH__WASMSIMD_X16, batch_div_16) { |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 629 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
| 630 | HSwishMicrokernelTester() |
| 631 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 632 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x16); |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 633 | } |
| 634 | } |
| 635 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 636 | TEST(F32_HSWISH__WASMSIMD_X16, batch_lt_16) { |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 637 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
| 638 | HSwishMicrokernelTester() |
| 639 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 640 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x16); |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 641 | } |
| 642 | } |
| 643 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 644 | TEST(F32_HSWISH__WASMSIMD_X16, batch_gt_16) { |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 645 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
| 646 | HSwishMicrokernelTester() |
| 647 | .batch_size(batch_size) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 648 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x16); |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 649 | } |
| 650 | } |
| 651 | |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 652 | TEST(F32_HSWISH__WASMSIMD_X16, inplace) { |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 653 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 654 | HSwishMicrokernelTester() |
| 655 | .batch_size(batch_size) |
| 656 | .inplace(true) |
Marat Dukhan | 9df9dc6 | 2020-07-10 20:08:49 -0700 | [diff] [blame] | 657 | .Test(xnn_f32_hswish_ukernel__wasmsimd_x16); |
Marat Dukhan | c303fe6 | 2020-06-26 10:09:25 -0700 | [diff] [blame] | 658 | } |
| 659 | } |
| 660 | #endif // XNN_ARCH_WASMSIMD |
| 661 | |
| 662 | |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 663 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 664 | TEST(F32_HSWISH__WASM_X1, batch_eq_1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 665 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 666 | .batch_size(1) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 667 | .Test(xnn_f32_hswish_ukernel__wasm_x1); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 668 | } |
| 669 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 670 | TEST(F32_HSWISH__WASM_X1, batch_gt_1) { |
| 671 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 672 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 673 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 674 | .Test(xnn_f32_hswish_ukernel__wasm_x1); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 675 | } |
| 676 | } |
| 677 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 678 | TEST(F32_HSWISH__WASM_X1, inplace) { |
| 679 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 680 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 681 | .batch_size(batch_size) |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 682 | .inplace(true) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 683 | .Test(xnn_f32_hswish_ukernel__wasm_x1); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 684 | } |
| 685 | } |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 686 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 687 | |
| 688 | |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 689 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 690 | TEST(F32_HSWISH__WASM_X2, batch_eq_2) { |
| 691 | HSwishMicrokernelTester() |
| 692 | .batch_size(2) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 693 | .Test(xnn_f32_hswish_ukernel__wasm_x2); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 694 | } |
| 695 | |
| 696 | TEST(F32_HSWISH__WASM_X2, batch_div_2) { |
| 697 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
| 698 | HSwishMicrokernelTester() |
| 699 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 700 | .Test(xnn_f32_hswish_ukernel__wasm_x2); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 701 | } |
| 702 | } |
| 703 | |
| 704 | TEST(F32_HSWISH__WASM_X2, batch_lt_2) { |
| 705 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
| 706 | HSwishMicrokernelTester() |
| 707 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 708 | .Test(xnn_f32_hswish_ukernel__wasm_x2); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 709 | } |
| 710 | } |
| 711 | |
| 712 | TEST(F32_HSWISH__WASM_X2, batch_gt_2) { |
| 713 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
| 714 | HSwishMicrokernelTester() |
| 715 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 716 | .Test(xnn_f32_hswish_ukernel__wasm_x2); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 717 | } |
| 718 | } |
| 719 | |
| 720 | TEST(F32_HSWISH__WASM_X2, inplace) { |
| 721 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
| 722 | HSwishMicrokernelTester() |
| 723 | .batch_size(batch_size) |
| 724 | .inplace(true) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 725 | .Test(xnn_f32_hswish_ukernel__wasm_x2); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 726 | } |
| 727 | } |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 728 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 729 | |
| 730 | |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 731 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 732 | TEST(F32_HSWISH__WASM_X4, batch_eq_4) { |
| 733 | HSwishMicrokernelTester() |
| 734 | .batch_size(4) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 735 | .Test(xnn_f32_hswish_ukernel__wasm_x4); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 736 | } |
| 737 | |
| 738 | TEST(F32_HSWISH__WASM_X4, batch_div_4) { |
| 739 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
| 740 | HSwishMicrokernelTester() |
| 741 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 742 | .Test(xnn_f32_hswish_ukernel__wasm_x4); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 743 | } |
| 744 | } |
| 745 | |
| 746 | TEST(F32_HSWISH__WASM_X4, batch_lt_4) { |
| 747 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
| 748 | HSwishMicrokernelTester() |
| 749 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 750 | .Test(xnn_f32_hswish_ukernel__wasm_x4); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 751 | } |
| 752 | } |
| 753 | |
| 754 | TEST(F32_HSWISH__WASM_X4, batch_gt_4) { |
| 755 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
| 756 | HSwishMicrokernelTester() |
| 757 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 758 | .Test(xnn_f32_hswish_ukernel__wasm_x4); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 759 | } |
| 760 | } |
| 761 | |
| 762 | TEST(F32_HSWISH__WASM_X4, inplace) { |
| 763 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 764 | HSwishMicrokernelTester() |
| 765 | .batch_size(batch_size) |
| 766 | .inplace(true) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 767 | .Test(xnn_f32_hswish_ukernel__wasm_x4); |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 768 | } |
| 769 | } |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 770 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 771 | |
| 772 | |
| 773 | TEST(F32_HSWISH__SCALAR_X1, batch_eq_1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 774 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 775 | .batch_size(1) |
| 776 | .Test(xnn_f32_hswish_ukernel__scalar_x1, HSwishMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 777 | } |
| 778 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 779 | TEST(F32_HSWISH__SCALAR_X1, batch_gt_1) { |
| 780 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 781 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 782 | .batch_size(batch_size) |
| 783 | .Test(xnn_f32_hswish_ukernel__scalar_x1, HSwishMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 784 | } |
| 785 | } |
| 786 | |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 787 | TEST(F32_HSWISH__SCALAR_X1, inplace) { |
| 788 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 789 | HSwishMicrokernelTester() |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 790 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 791 | .inplace(true) |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 792 | .Test(xnn_f32_hswish_ukernel__scalar_x1, HSwishMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 793 | } |
| 794 | } |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 795 | |
| 796 | TEST(F32_HSWISH__SCALAR_X2, batch_eq_2) { |
| 797 | HSwishMicrokernelTester() |
| 798 | .batch_size(2) |
| 799 | .Test(xnn_f32_hswish_ukernel__scalar_x2, HSwishMicrokernelTester::Variant::Scalar); |
| 800 | } |
| 801 | |
| 802 | TEST(F32_HSWISH__SCALAR_X2, batch_div_2) { |
| 803 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
| 804 | HSwishMicrokernelTester() |
| 805 | .batch_size(batch_size) |
| 806 | .Test(xnn_f32_hswish_ukernel__scalar_x2, HSwishMicrokernelTester::Variant::Scalar); |
| 807 | } |
| 808 | } |
| 809 | |
| 810 | TEST(F32_HSWISH__SCALAR_X2, batch_lt_2) { |
| 811 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
| 812 | HSwishMicrokernelTester() |
| 813 | .batch_size(batch_size) |
| 814 | .Test(xnn_f32_hswish_ukernel__scalar_x2, HSwishMicrokernelTester::Variant::Scalar); |
| 815 | } |
| 816 | } |
| 817 | |
| 818 | TEST(F32_HSWISH__SCALAR_X2, batch_gt_2) { |
| 819 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
| 820 | HSwishMicrokernelTester() |
| 821 | .batch_size(batch_size) |
| 822 | .Test(xnn_f32_hswish_ukernel__scalar_x2, HSwishMicrokernelTester::Variant::Scalar); |
| 823 | } |
| 824 | } |
| 825 | |
| 826 | TEST(F32_HSWISH__SCALAR_X2, inplace) { |
| 827 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
| 828 | HSwishMicrokernelTester() |
| 829 | .batch_size(batch_size) |
| 830 | .inplace(true) |
| 831 | .Test(xnn_f32_hswish_ukernel__scalar_x2, HSwishMicrokernelTester::Variant::Scalar); |
| 832 | } |
| 833 | } |
| 834 | |
| 835 | TEST(F32_HSWISH__SCALAR_X4, batch_eq_4) { |
| 836 | HSwishMicrokernelTester() |
| 837 | .batch_size(4) |
| 838 | .Test(xnn_f32_hswish_ukernel__scalar_x4, HSwishMicrokernelTester::Variant::Scalar); |
| 839 | } |
| 840 | |
| 841 | TEST(F32_HSWISH__SCALAR_X4, batch_div_4) { |
| 842 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
| 843 | HSwishMicrokernelTester() |
| 844 | .batch_size(batch_size) |
| 845 | .Test(xnn_f32_hswish_ukernel__scalar_x4, HSwishMicrokernelTester::Variant::Scalar); |
| 846 | } |
| 847 | } |
| 848 | |
| 849 | TEST(F32_HSWISH__SCALAR_X4, batch_lt_4) { |
| 850 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
| 851 | HSwishMicrokernelTester() |
| 852 | .batch_size(batch_size) |
| 853 | .Test(xnn_f32_hswish_ukernel__scalar_x4, HSwishMicrokernelTester::Variant::Scalar); |
| 854 | } |
| 855 | } |
| 856 | |
| 857 | TEST(F32_HSWISH__SCALAR_X4, batch_gt_4) { |
| 858 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
| 859 | HSwishMicrokernelTester() |
| 860 | .batch_size(batch_size) |
| 861 | .Test(xnn_f32_hswish_ukernel__scalar_x4, HSwishMicrokernelTester::Variant::Scalar); |
| 862 | } |
| 863 | } |
| 864 | |
| 865 | TEST(F32_HSWISH__SCALAR_X4, inplace) { |
| 866 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 867 | HSwishMicrokernelTester() |
| 868 | .batch_size(batch_size) |
| 869 | .inplace(true) |
| 870 | .Test(xnn_f32_hswish_ukernel__scalar_x4, HSwishMicrokernelTester::Variant::Scalar); |
| 871 | } |
| 872 | } |