Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| 5 | // |
| 6 | // Auto-generated file. Do not edit! |
| 7 | // Specification: test/f32-vrelu.yaml |
| 8 | // Generator: tools/generate-vunary-test.py |
| 9 | |
| 10 | |
| 11 | #include <gtest/gtest.h> |
| 12 | |
| 13 | #include <xnnpack/common.h> |
| 14 | #include <xnnpack/isa-checks.h> |
| 15 | |
| 16 | #include <xnnpack/vunary.h> |
| 17 | #include "vunary-microkernel-tester.h" |
| 18 | |
| 19 | |
| 20 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 21 | TEST(F32_VRELU__NEON_X4, batch_eq_4) { |
| 22 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 23 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 24 | .batch_size(4) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 25 | .Test(xnn_f32_vrelu_ukernel__neon_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 26 | } |
| 27 | |
| 28 | TEST(F32_VRELU__NEON_X4, batch_div_4) { |
| 29 | TEST_REQUIRES_ARM_NEON; |
| 30 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 31 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 32 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 33 | .Test(xnn_f32_vrelu_ukernel__neon_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 34 | } |
| 35 | } |
| 36 | |
| 37 | TEST(F32_VRELU__NEON_X4, batch_lt_4) { |
| 38 | TEST_REQUIRES_ARM_NEON; |
| 39 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 40 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 41 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 42 | .Test(xnn_f32_vrelu_ukernel__neon_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 43 | } |
| 44 | } |
| 45 | |
| 46 | TEST(F32_VRELU__NEON_X4, batch_gt_4) { |
| 47 | TEST_REQUIRES_ARM_NEON; |
| 48 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 49 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 50 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 51 | .Test(xnn_f32_vrelu_ukernel__neon_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 52 | } |
| 53 | } |
| 54 | |
| 55 | TEST(F32_VRELU__NEON_X4, inplace) { |
| 56 | TEST_REQUIRES_ARM_NEON; |
| 57 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 58 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 59 | .batch_size(batch_size) |
| 60 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 61 | .Test(xnn_f32_vrelu_ukernel__neon_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 62 | } |
| 63 | } |
| 64 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 65 | |
| 66 | |
| 67 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 68 | TEST(F32_VRELU__NEON_X8, batch_eq_8) { |
| 69 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 70 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 71 | .batch_size(8) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 72 | .Test(xnn_f32_vrelu_ukernel__neon_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | TEST(F32_VRELU__NEON_X8, batch_div_8) { |
| 76 | TEST_REQUIRES_ARM_NEON; |
| 77 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 78 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 79 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 80 | .Test(xnn_f32_vrelu_ukernel__neon_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 81 | } |
| 82 | } |
| 83 | |
| 84 | TEST(F32_VRELU__NEON_X8, batch_lt_8) { |
| 85 | TEST_REQUIRES_ARM_NEON; |
| 86 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 87 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 88 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 89 | .Test(xnn_f32_vrelu_ukernel__neon_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 90 | } |
| 91 | } |
| 92 | |
| 93 | TEST(F32_VRELU__NEON_X8, batch_gt_8) { |
| 94 | TEST_REQUIRES_ARM_NEON; |
| 95 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 96 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 97 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 98 | .Test(xnn_f32_vrelu_ukernel__neon_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 99 | } |
| 100 | } |
| 101 | |
| 102 | TEST(F32_VRELU__NEON_X8, inplace) { |
| 103 | TEST_REQUIRES_ARM_NEON; |
| 104 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 105 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 106 | .batch_size(batch_size) |
| 107 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 108 | .Test(xnn_f32_vrelu_ukernel__neon_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 109 | } |
| 110 | } |
| 111 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 112 | |
| 113 | |
| 114 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 115 | TEST(F32_VRELU__SSE_X4, batch_eq_4) { |
| 116 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 117 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 118 | .batch_size(4) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 119 | .Test(xnn_f32_vrelu_ukernel__sse_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | TEST(F32_VRELU__SSE_X4, batch_div_4) { |
| 123 | TEST_REQUIRES_X86_SSE; |
| 124 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 125 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 126 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 127 | .Test(xnn_f32_vrelu_ukernel__sse_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 128 | } |
| 129 | } |
| 130 | |
| 131 | TEST(F32_VRELU__SSE_X4, batch_lt_4) { |
| 132 | TEST_REQUIRES_X86_SSE; |
| 133 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 134 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 135 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 136 | .Test(xnn_f32_vrelu_ukernel__sse_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 137 | } |
| 138 | } |
| 139 | |
| 140 | TEST(F32_VRELU__SSE_X4, batch_gt_4) { |
| 141 | TEST_REQUIRES_X86_SSE; |
| 142 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 143 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 144 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 145 | .Test(xnn_f32_vrelu_ukernel__sse_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 146 | } |
| 147 | } |
| 148 | |
| 149 | TEST(F32_VRELU__SSE_X4, inplace) { |
| 150 | TEST_REQUIRES_X86_SSE; |
| 151 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 152 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 153 | .batch_size(batch_size) |
| 154 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 155 | .Test(xnn_f32_vrelu_ukernel__sse_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 156 | } |
| 157 | } |
| 158 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 159 | |
| 160 | |
| 161 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 162 | TEST(F32_VRELU__SSE_X8, batch_eq_8) { |
| 163 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 164 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 165 | .batch_size(8) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 166 | .Test(xnn_f32_vrelu_ukernel__sse_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 167 | } |
| 168 | |
| 169 | TEST(F32_VRELU__SSE_X8, batch_div_8) { |
| 170 | TEST_REQUIRES_X86_SSE; |
| 171 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 172 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 173 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 174 | .Test(xnn_f32_vrelu_ukernel__sse_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 175 | } |
| 176 | } |
| 177 | |
| 178 | TEST(F32_VRELU__SSE_X8, batch_lt_8) { |
| 179 | TEST_REQUIRES_X86_SSE; |
| 180 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 181 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 182 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 183 | .Test(xnn_f32_vrelu_ukernel__sse_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 184 | } |
| 185 | } |
| 186 | |
| 187 | TEST(F32_VRELU__SSE_X8, batch_gt_8) { |
| 188 | TEST_REQUIRES_X86_SSE; |
| 189 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 190 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 191 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 192 | .Test(xnn_f32_vrelu_ukernel__sse_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 193 | } |
| 194 | } |
| 195 | |
| 196 | TEST(F32_VRELU__SSE_X8, inplace) { |
| 197 | TEST_REQUIRES_X86_SSE; |
| 198 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 199 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 200 | .batch_size(batch_size) |
| 201 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 202 | .Test(xnn_f32_vrelu_ukernel__sse_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 203 | } |
| 204 | } |
| 205 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 206 | |
| 207 | |
| 208 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 209 | TEST(F32_VRELU__AVX_X8, batch_eq_8) { |
| 210 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 211 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 212 | .batch_size(8) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 213 | .Test(xnn_f32_vrelu_ukernel__avx_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 214 | } |
| 215 | |
| 216 | TEST(F32_VRELU__AVX_X8, batch_div_8) { |
| 217 | TEST_REQUIRES_X86_AVX; |
| 218 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 219 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 220 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 221 | .Test(xnn_f32_vrelu_ukernel__avx_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 222 | } |
| 223 | } |
| 224 | |
| 225 | TEST(F32_VRELU__AVX_X8, batch_lt_8) { |
| 226 | TEST_REQUIRES_X86_AVX; |
| 227 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 228 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 229 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 230 | .Test(xnn_f32_vrelu_ukernel__avx_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 231 | } |
| 232 | } |
| 233 | |
| 234 | TEST(F32_VRELU__AVX_X8, batch_gt_8) { |
| 235 | TEST_REQUIRES_X86_AVX; |
| 236 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 237 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 238 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 239 | .Test(xnn_f32_vrelu_ukernel__avx_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 240 | } |
| 241 | } |
| 242 | |
| 243 | TEST(F32_VRELU__AVX_X8, inplace) { |
| 244 | TEST_REQUIRES_X86_AVX; |
| 245 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 246 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 247 | .batch_size(batch_size) |
| 248 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 249 | .Test(xnn_f32_vrelu_ukernel__avx_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 250 | } |
| 251 | } |
| 252 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 253 | |
| 254 | |
| 255 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 256 | TEST(F32_VRELU__AVX_X16, batch_eq_16) { |
| 257 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 258 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 259 | .batch_size(16) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 260 | .Test(xnn_f32_vrelu_ukernel__avx_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 261 | } |
| 262 | |
| 263 | TEST(F32_VRELU__AVX_X16, batch_div_16) { |
| 264 | TEST_REQUIRES_X86_AVX; |
| 265 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 266 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 267 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 268 | .Test(xnn_f32_vrelu_ukernel__avx_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 269 | } |
| 270 | } |
| 271 | |
| 272 | TEST(F32_VRELU__AVX_X16, batch_lt_16) { |
| 273 | TEST_REQUIRES_X86_AVX; |
| 274 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 275 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 276 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 277 | .Test(xnn_f32_vrelu_ukernel__avx_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 278 | } |
| 279 | } |
| 280 | |
| 281 | TEST(F32_VRELU__AVX_X16, batch_gt_16) { |
| 282 | TEST_REQUIRES_X86_AVX; |
| 283 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 284 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 285 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 286 | .Test(xnn_f32_vrelu_ukernel__avx_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 287 | } |
| 288 | } |
| 289 | |
| 290 | TEST(F32_VRELU__AVX_X16, inplace) { |
| 291 | TEST_REQUIRES_X86_AVX; |
| 292 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 293 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 294 | .batch_size(batch_size) |
| 295 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 296 | .Test(xnn_f32_vrelu_ukernel__avx_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 297 | } |
| 298 | } |
| 299 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 300 | |
| 301 | |
| 302 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 303 | TEST(F32_VRELU__AVX512F_X16, batch_eq_16) { |
| 304 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 305 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 306 | .batch_size(16) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 307 | .Test(xnn_f32_vrelu_ukernel__avx512f_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 308 | } |
| 309 | |
| 310 | TEST(F32_VRELU__AVX512F_X16, batch_div_16) { |
| 311 | TEST_REQUIRES_X86_AVX512F; |
| 312 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 313 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 314 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 315 | .Test(xnn_f32_vrelu_ukernel__avx512f_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 316 | } |
| 317 | } |
| 318 | |
| 319 | TEST(F32_VRELU__AVX512F_X16, batch_lt_16) { |
| 320 | TEST_REQUIRES_X86_AVX512F; |
| 321 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 322 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 323 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 324 | .Test(xnn_f32_vrelu_ukernel__avx512f_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 325 | } |
| 326 | } |
| 327 | |
| 328 | TEST(F32_VRELU__AVX512F_X16, batch_gt_16) { |
| 329 | TEST_REQUIRES_X86_AVX512F; |
| 330 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 331 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 332 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 333 | .Test(xnn_f32_vrelu_ukernel__avx512f_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 334 | } |
| 335 | } |
| 336 | |
| 337 | TEST(F32_VRELU__AVX512F_X16, inplace) { |
| 338 | TEST_REQUIRES_X86_AVX512F; |
| 339 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 340 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 341 | .batch_size(batch_size) |
| 342 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 343 | .Test(xnn_f32_vrelu_ukernel__avx512f_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 344 | } |
| 345 | } |
| 346 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 347 | |
| 348 | |
| 349 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 350 | TEST(F32_VRELU__AVX512F_X32, batch_eq_32) { |
| 351 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 352 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 353 | .batch_size(32) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 354 | .Test(xnn_f32_vrelu_ukernel__avx512f_x32, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 355 | } |
| 356 | |
| 357 | TEST(F32_VRELU__AVX512F_X32, batch_div_32) { |
| 358 | TEST_REQUIRES_X86_AVX512F; |
| 359 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 360 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 361 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 362 | .Test(xnn_f32_vrelu_ukernel__avx512f_x32, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 363 | } |
| 364 | } |
| 365 | |
| 366 | TEST(F32_VRELU__AVX512F_X32, batch_lt_32) { |
| 367 | TEST_REQUIRES_X86_AVX512F; |
| 368 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 369 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 370 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 371 | .Test(xnn_f32_vrelu_ukernel__avx512f_x32, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 372 | } |
| 373 | } |
| 374 | |
| 375 | TEST(F32_VRELU__AVX512F_X32, batch_gt_32) { |
| 376 | TEST_REQUIRES_X86_AVX512F; |
| 377 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 378 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 379 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 380 | .Test(xnn_f32_vrelu_ukernel__avx512f_x32, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 381 | } |
| 382 | } |
| 383 | |
| 384 | TEST(F32_VRELU__AVX512F_X32, inplace) { |
| 385 | TEST_REQUIRES_X86_AVX512F; |
| 386 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 387 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 388 | .batch_size(batch_size) |
| 389 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 390 | .Test(xnn_f32_vrelu_ukernel__avx512f_x32, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 391 | } |
| 392 | } |
| 393 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 394 | |
| 395 | |
| 396 | TEST(F32_VRELU__SCALAR_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 397 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 398 | .batch_size(1) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 399 | .Test(xnn_f32_vrelu_ukernel__scalar_x1, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 400 | } |
| 401 | |
| 402 | TEST(F32_VRELU__SCALAR_X1, batch_gt_1) { |
| 403 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 404 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 405 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 406 | .Test(xnn_f32_vrelu_ukernel__scalar_x1, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 407 | } |
| 408 | } |
| 409 | |
| 410 | TEST(F32_VRELU__SCALAR_X1, inplace) { |
| 411 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 412 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 413 | .batch_size(batch_size) |
| 414 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 415 | .Test(xnn_f32_vrelu_ukernel__scalar_x1, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 416 | } |
| 417 | } |
| 418 | |
| 419 | |
| 420 | TEST(F32_VRELU__SCALAR_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 421 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 422 | .batch_size(2) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 423 | .Test(xnn_f32_vrelu_ukernel__scalar_x2, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 424 | } |
| 425 | |
| 426 | TEST(F32_VRELU__SCALAR_X2, batch_div_2) { |
| 427 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 428 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 429 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 430 | .Test(xnn_f32_vrelu_ukernel__scalar_x2, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 431 | } |
| 432 | } |
| 433 | |
| 434 | TEST(F32_VRELU__SCALAR_X2, batch_lt_2) { |
| 435 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 436 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 437 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 438 | .Test(xnn_f32_vrelu_ukernel__scalar_x2, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 439 | } |
| 440 | } |
| 441 | |
| 442 | TEST(F32_VRELU__SCALAR_X2, batch_gt_2) { |
| 443 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 444 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 445 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 446 | .Test(xnn_f32_vrelu_ukernel__scalar_x2, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 447 | } |
| 448 | } |
| 449 | |
| 450 | TEST(F32_VRELU__SCALAR_X2, inplace) { |
| 451 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 452 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 453 | .batch_size(batch_size) |
| 454 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 455 | .Test(xnn_f32_vrelu_ukernel__scalar_x2, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 456 | } |
| 457 | } |
| 458 | |
| 459 | |
| 460 | TEST(F32_VRELU__SCALAR_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 461 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 462 | .batch_size(4) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 463 | .Test(xnn_f32_vrelu_ukernel__scalar_x4, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 464 | } |
| 465 | |
| 466 | TEST(F32_VRELU__SCALAR_X4, batch_div_4) { |
| 467 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 468 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 469 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 470 | .Test(xnn_f32_vrelu_ukernel__scalar_x4, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 471 | } |
| 472 | } |
| 473 | |
| 474 | TEST(F32_VRELU__SCALAR_X4, batch_lt_4) { |
| 475 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 476 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 477 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 478 | .Test(xnn_f32_vrelu_ukernel__scalar_x4, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 479 | } |
| 480 | } |
| 481 | |
| 482 | TEST(F32_VRELU__SCALAR_X4, batch_gt_4) { |
| 483 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 484 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 485 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 486 | .Test(xnn_f32_vrelu_ukernel__scalar_x4, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 487 | } |
| 488 | } |
| 489 | |
| 490 | TEST(F32_VRELU__SCALAR_X4, inplace) { |
| 491 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 492 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 493 | .batch_size(batch_size) |
| 494 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 495 | .Test(xnn_f32_vrelu_ukernel__scalar_x4, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 496 | } |
| 497 | } |
| 498 | |
| 499 | |
| 500 | TEST(F32_VRELU__SCALAR_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 501 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 502 | .batch_size(8) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 503 | .Test(xnn_f32_vrelu_ukernel__scalar_x8, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 504 | } |
| 505 | |
| 506 | TEST(F32_VRELU__SCALAR_X8, batch_div_8) { |
| 507 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 508 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 509 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 510 | .Test(xnn_f32_vrelu_ukernel__scalar_x8, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 511 | } |
| 512 | } |
| 513 | |
| 514 | TEST(F32_VRELU__SCALAR_X8, batch_lt_8) { |
| 515 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 516 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 517 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 518 | .Test(xnn_f32_vrelu_ukernel__scalar_x8, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 519 | } |
| 520 | } |
| 521 | |
| 522 | TEST(F32_VRELU__SCALAR_X8, batch_gt_8) { |
| 523 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 524 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 525 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 526 | .Test(xnn_f32_vrelu_ukernel__scalar_x8, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 527 | } |
| 528 | } |
| 529 | |
| 530 | TEST(F32_VRELU__SCALAR_X8, inplace) { |
| 531 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 532 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 533 | .batch_size(batch_size) |
| 534 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 535 | .Test(xnn_f32_vrelu_ukernel__scalar_x8, VUnaryMicrokernelTester::OpType::ReLU, VUnaryMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 536 | } |
| 537 | } |
| 538 | |
| 539 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 540 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 541 | TEST(F32_VRELU__WASM_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 542 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 543 | .batch_size(1) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 544 | .Test(xnn_f32_vrelu_ukernel__wasm_x1, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 545 | } |
| 546 | |
| 547 | TEST(F32_VRELU__WASM_X1, batch_gt_1) { |
| 548 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 549 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 550 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 551 | .Test(xnn_f32_vrelu_ukernel__wasm_x1, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 552 | } |
| 553 | } |
| 554 | |
| 555 | TEST(F32_VRELU__WASM_X1, inplace) { |
| 556 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 557 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 558 | .batch_size(batch_size) |
| 559 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 560 | .Test(xnn_f32_vrelu_ukernel__wasm_x1, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 561 | } |
| 562 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 563 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 564 | |
| 565 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 566 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 567 | TEST(F32_VRELU__WASM_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 568 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 569 | .batch_size(2) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 570 | .Test(xnn_f32_vrelu_ukernel__wasm_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 571 | } |
| 572 | |
| 573 | TEST(F32_VRELU__WASM_X2, batch_div_2) { |
| 574 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 575 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 576 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 577 | .Test(xnn_f32_vrelu_ukernel__wasm_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 578 | } |
| 579 | } |
| 580 | |
| 581 | TEST(F32_VRELU__WASM_X2, batch_lt_2) { |
| 582 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 583 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 584 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 585 | .Test(xnn_f32_vrelu_ukernel__wasm_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 586 | } |
| 587 | } |
| 588 | |
| 589 | TEST(F32_VRELU__WASM_X2, batch_gt_2) { |
| 590 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 591 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 592 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 593 | .Test(xnn_f32_vrelu_ukernel__wasm_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 594 | } |
| 595 | } |
| 596 | |
| 597 | TEST(F32_VRELU__WASM_X2, inplace) { |
| 598 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 599 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 600 | .batch_size(batch_size) |
| 601 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 602 | .Test(xnn_f32_vrelu_ukernel__wasm_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 603 | } |
| 604 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 605 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 606 | |
| 607 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 608 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 609 | TEST(F32_VRELU__WASM_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 610 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 611 | .batch_size(4) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 612 | .Test(xnn_f32_vrelu_ukernel__wasm_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 613 | } |
| 614 | |
| 615 | TEST(F32_VRELU__WASM_X4, batch_div_4) { |
| 616 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 617 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 618 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 619 | .Test(xnn_f32_vrelu_ukernel__wasm_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 620 | } |
| 621 | } |
| 622 | |
| 623 | TEST(F32_VRELU__WASM_X4, batch_lt_4) { |
| 624 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 625 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 626 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 627 | .Test(xnn_f32_vrelu_ukernel__wasm_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 628 | } |
| 629 | } |
| 630 | |
| 631 | TEST(F32_VRELU__WASM_X4, batch_gt_4) { |
| 632 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 633 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 634 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 635 | .Test(xnn_f32_vrelu_ukernel__wasm_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 636 | } |
| 637 | } |
| 638 | |
| 639 | TEST(F32_VRELU__WASM_X4, inplace) { |
| 640 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 641 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 642 | .batch_size(batch_size) |
| 643 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 644 | .Test(xnn_f32_vrelu_ukernel__wasm_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 645 | } |
| 646 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 647 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 648 | |
| 649 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 650 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 651 | TEST(F32_VRELU__WASM_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 652 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 653 | .batch_size(8) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 654 | .Test(xnn_f32_vrelu_ukernel__wasm_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 655 | } |
| 656 | |
| 657 | TEST(F32_VRELU__WASM_X8, batch_div_8) { |
| 658 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 659 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 660 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 661 | .Test(xnn_f32_vrelu_ukernel__wasm_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 662 | } |
| 663 | } |
| 664 | |
| 665 | TEST(F32_VRELU__WASM_X8, batch_lt_8) { |
| 666 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 667 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 668 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 669 | .Test(xnn_f32_vrelu_ukernel__wasm_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 670 | } |
| 671 | } |
| 672 | |
| 673 | TEST(F32_VRELU__WASM_X8, batch_gt_8) { |
| 674 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 675 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 676 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 677 | .Test(xnn_f32_vrelu_ukernel__wasm_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 678 | } |
| 679 | } |
| 680 | |
| 681 | TEST(F32_VRELU__WASM_X8, inplace) { |
| 682 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 683 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 684 | .batch_size(batch_size) |
| 685 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 686 | .Test(xnn_f32_vrelu_ukernel__wasm_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 687 | } |
| 688 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 689 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 690 | |
| 691 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 692 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 693 | TEST(F32_VRELU__WASMSIMD_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 694 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 695 | .batch_size(4) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 696 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 697 | } |
| 698 | |
| 699 | TEST(F32_VRELU__WASMSIMD_X4, batch_div_4) { |
| 700 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 701 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 702 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 703 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 704 | } |
| 705 | } |
| 706 | |
| 707 | TEST(F32_VRELU__WASMSIMD_X4, batch_lt_4) { |
| 708 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 709 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 710 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 711 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 712 | } |
| 713 | } |
| 714 | |
| 715 | TEST(F32_VRELU__WASMSIMD_X4, batch_gt_4) { |
| 716 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 717 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 718 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 719 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 720 | } |
| 721 | } |
| 722 | |
| 723 | TEST(F32_VRELU__WASMSIMD_X4, inplace) { |
| 724 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 725 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 726 | .batch_size(batch_size) |
| 727 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 728 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 729 | } |
| 730 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 731 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 732 | |
| 733 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 734 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 735 | TEST(F32_VRELU__WASMSIMD_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 736 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 737 | .batch_size(8) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 738 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 739 | } |
| 740 | |
| 741 | TEST(F32_VRELU__WASMSIMD_X8, batch_div_8) { |
| 742 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 743 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 744 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 745 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 746 | } |
| 747 | } |
| 748 | |
| 749 | TEST(F32_VRELU__WASMSIMD_X8, batch_lt_8) { |
| 750 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 751 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 752 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 753 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 754 | } |
| 755 | } |
| 756 | |
| 757 | TEST(F32_VRELU__WASMSIMD_X8, batch_gt_8) { |
| 758 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 759 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 760 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 761 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 762 | } |
| 763 | } |
| 764 | |
| 765 | TEST(F32_VRELU__WASMSIMD_X8, inplace) { |
| 766 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 767 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 768 | .batch_size(batch_size) |
| 769 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 770 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x8, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 771 | } |
| 772 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 773 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 774 | |
| 775 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 776 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 777 | TEST(F32_VRELU__WASMSIMD_X16, batch_eq_16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 778 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 779 | .batch_size(16) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 780 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 781 | } |
| 782 | |
| 783 | TEST(F32_VRELU__WASMSIMD_X16, batch_div_16) { |
| 784 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 785 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 786 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 787 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 788 | } |
| 789 | } |
| 790 | |
| 791 | TEST(F32_VRELU__WASMSIMD_X16, batch_lt_16) { |
| 792 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 793 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 794 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 795 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 796 | } |
| 797 | } |
| 798 | |
| 799 | TEST(F32_VRELU__WASMSIMD_X16, batch_gt_16) { |
| 800 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 801 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 802 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 803 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 804 | } |
| 805 | } |
| 806 | |
| 807 | TEST(F32_VRELU__WASMSIMD_X16, inplace) { |
| 808 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 809 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 810 | .batch_size(batch_size) |
| 811 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 812 | .Test(xnn_f32_vrelu_ukernel__wasmsimd_x16, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 813 | } |
| 814 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 815 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 816 | |
| 817 | |
| 818 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
| 819 | TEST(F32_VRELU__WASM32_SHR_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 820 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 821 | .batch_size(1) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 822 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x1, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 823 | } |
| 824 | |
| 825 | TEST(F32_VRELU__WASM32_SHR_X1, batch_gt_1) { |
| 826 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 827 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 828 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 829 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x1, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 830 | } |
| 831 | } |
| 832 | |
| 833 | TEST(F32_VRELU__WASM32_SHR_X1, inplace) { |
| 834 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 835 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 836 | .batch_size(batch_size) |
| 837 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 838 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x1, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 839 | } |
| 840 | } |
| 841 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
| 842 | |
| 843 | |
| 844 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
| 845 | TEST(F32_VRELU__WASM32_SHR_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 846 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 847 | .batch_size(2) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 848 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 849 | } |
| 850 | |
| 851 | TEST(F32_VRELU__WASM32_SHR_X2, batch_div_2) { |
| 852 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 853 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 854 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 855 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 856 | } |
| 857 | } |
| 858 | |
| 859 | TEST(F32_VRELU__WASM32_SHR_X2, batch_lt_2) { |
| 860 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 861 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 862 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 863 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 864 | } |
| 865 | } |
| 866 | |
| 867 | TEST(F32_VRELU__WASM32_SHR_X2, batch_gt_2) { |
| 868 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 869 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 870 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 871 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 872 | } |
| 873 | } |
| 874 | |
| 875 | TEST(F32_VRELU__WASM32_SHR_X2, inplace) { |
| 876 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 877 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 878 | .batch_size(batch_size) |
| 879 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 880 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x2, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 881 | } |
| 882 | } |
| 883 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
| 884 | |
| 885 | |
| 886 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
| 887 | TEST(F32_VRELU__WASM32_SHR_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 888 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 889 | .batch_size(4) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 890 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 891 | } |
| 892 | |
| 893 | TEST(F32_VRELU__WASM32_SHR_X4, batch_div_4) { |
| 894 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 895 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 896 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 897 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 898 | } |
| 899 | } |
| 900 | |
| 901 | TEST(F32_VRELU__WASM32_SHR_X4, batch_lt_4) { |
| 902 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 903 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 904 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 905 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 906 | } |
| 907 | } |
| 908 | |
| 909 | TEST(F32_VRELU__WASM32_SHR_X4, batch_gt_4) { |
| 910 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 911 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 912 | .batch_size(batch_size) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 913 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 914 | } |
| 915 | } |
| 916 | |
| 917 | TEST(F32_VRELU__WASM32_SHR_X4, inplace) { |
| 918 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 919 | VUnaryMicrokernelTester() |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 920 | .batch_size(batch_size) |
| 921 | .inplace(true) |
Marat Dukhan | 6eaab71 | 2021-05-13 15:20:58 -0700 | [diff] [blame] | 922 | .Test(xnn_f32_vrelu_ukernel__wasm32_shr_x4, VUnaryMicrokernelTester::OpType::ReLU); |
Marat Dukhan | 6674d69 | 2021-05-05 22:27:00 -0700 | [diff] [blame] | 923 | } |
| 924 | } |
| 925 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |