blob: 1d0d4b696e2aba26cb2794391f137db26337141e [file] [log] [blame]
Marat Dukhan479f87e2019-11-27 15:17:06 -08001// Auto-generated file. Do not edit!
2// Template: src/f32-dwconv/up-avx512.c.in
3// Generator: tools/xngen
4//
5// Copyright 2019 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <immintrin.h>
13
14#include <xnnpack/dwconv.h>
Marat Dukhancfb31342019-12-05 10:42:57 -080015#include <xnnpack/intrinsics-polyfill.h>
Marat Dukhan479f87e2019-11-27 15:17:06 -080016
17
18void xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2(
19 size_t channels,
20 size_t output_width,
21 const float** input,
22 const float* weights,
23 float* output,
24 size_t input_stride,
25 size_t output_increment,
26 const union xnn_f32_output_params params[restrict static 1])
27{
28 assert(channels != 0);
29 assert(output_width != 0);
30
31 const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
32 const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
33 do {
34 const float* i0 = input[0];
Marat Dukhan68660992020-02-03 13:31:12 -080035 assert(i0 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080036 const float* i1 = input[1];
Marat Dukhan68660992020-02-03 13:31:12 -080037 assert(i1 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080038 const float* i2 = input[2];
Marat Dukhan68660992020-02-03 13:31:12 -080039 assert(i2 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080040 const float* i3 = input[3];
Marat Dukhan68660992020-02-03 13:31:12 -080041 assert(i3 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080042 const float* i4 = input[4];
Marat Dukhan68660992020-02-03 13:31:12 -080043 assert(i4 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080044 const float* i5 = input[5];
Marat Dukhan68660992020-02-03 13:31:12 -080045 assert(i5 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080046 const float* i6 = input[6];
Marat Dukhan68660992020-02-03 13:31:12 -080047 assert(i6 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080048 const float* i7 = input[7];
Marat Dukhan68660992020-02-03 13:31:12 -080049 assert(i7 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080050 const float* i8 = input[8];
Marat Dukhan68660992020-02-03 13:31:12 -080051 assert(i8 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080052 const float* i9 = input[9];
Marat Dukhan68660992020-02-03 13:31:12 -080053 assert(i9 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080054 const float* i10 = input[10];
Marat Dukhan68660992020-02-03 13:31:12 -080055 assert(i10 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080056 const float* i11 = input[11];
Marat Dukhan68660992020-02-03 13:31:12 -080057 assert(i11 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080058 const float* i12 = input[12];
Marat Dukhan68660992020-02-03 13:31:12 -080059 assert(i12 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080060 const float* i13 = input[13];
Marat Dukhan68660992020-02-03 13:31:12 -080061 assert(i13 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080062 const float* i14 = input[14];
Marat Dukhan68660992020-02-03 13:31:12 -080063 assert(i14 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080064 const float* i15 = input[15];
Marat Dukhan68660992020-02-03 13:31:12 -080065 assert(i15 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080066 const float* i16 = input[16];
Marat Dukhan68660992020-02-03 13:31:12 -080067 assert(i16 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080068 const float* i17 = input[17];
Marat Dukhan68660992020-02-03 13:31:12 -080069 assert(i17 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080070 const float* i18 = input[18];
Marat Dukhan68660992020-02-03 13:31:12 -080071 assert(i18 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080072 const float* i19 = input[19];
Marat Dukhan68660992020-02-03 13:31:12 -080073 assert(i19 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080074 const float* i20 = input[20];
Marat Dukhan68660992020-02-03 13:31:12 -080075 assert(i20 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080076 const float* i21 = input[21];
Marat Dukhan68660992020-02-03 13:31:12 -080077 assert(i21 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080078 const float* i22 = input[22];
Marat Dukhan68660992020-02-03 13:31:12 -080079 assert(i22 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080080 const float* i23 = input[23];
Marat Dukhan68660992020-02-03 13:31:12 -080081 assert(i23 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080082 const float* i24 = input[24];
Marat Dukhan68660992020-02-03 13:31:12 -080083 assert(i24 != NULL);
Marat Dukhan479f87e2019-11-27 15:17:06 -080084 input = (const float**) ((uintptr_t) input + input_stride);
85
86 size_t c = channels;
87 const float* w = weights;
88 for (; c >= 16; c -= 16) {
89 __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
90
91
92 const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
93 i0 += 16;
94
95 const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
96 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
97
98 const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
99 i1 += 16;
100
101 const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
102 __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
103
104 const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
105 i2 += 16;
106
107 const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
108 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
109
110 const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
111 i3 += 16;
112
113 const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
114 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
115
116 const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
117 i4 += 16;
118
119 const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
120 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
121
122 const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
123 i5 += 16;
124
125 const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
126 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
127
128 const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
129 i6 += 16;
130
131 const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
132 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
133
134 const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
135 i7 += 16;
136
137 const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
138 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
139
140 const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
141 i8 += 16;
142
143 const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
144 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
145
146 const __m512 vi9x0123456789ABCDEF = _mm512_loadu_ps(i9);
147 i9 += 16;
148
149 const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 160);
150 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp1);
151
152 const __m512 vi10x0123456789ABCDEF = _mm512_loadu_ps(i10);
153 i10 += 16;
154
155 const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 176);
156 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
157
158 const __m512 vi11x0123456789ABCDEF = _mm512_loadu_ps(i11);
159 i11 += 16;
160
161 const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 192);
162 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp1);
163
164 const __m512 vi12x0123456789ABCDEF = _mm512_loadu_ps(i12);
165 i12 += 16;
166
167 const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 208);
168 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
169
170 const __m512 vi13x0123456789ABCDEF = _mm512_loadu_ps(i13);
171 i13 += 16;
172
173 const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 224);
174 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp1);
175
176 const __m512 vi14x0123456789ABCDEF = _mm512_loadu_ps(i14);
177 i14 += 16;
178
179 const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 240);
180 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
181
182 const __m512 vi15x0123456789ABCDEF = _mm512_loadu_ps(i15);
183 i15 += 16;
184
185 const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 256);
186 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp1);
187
188 const __m512 vi16x0123456789ABCDEF = _mm512_loadu_ps(i16);
189 i16 += 16;
190
191 const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 272);
192 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
193
194 const __m512 vi17x0123456789ABCDEF = _mm512_loadu_ps(i17);
195 i17 += 16;
196
197 const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 288);
198 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp1);
199
200 const __m512 vi18x0123456789ABCDEF = _mm512_loadu_ps(i18);
201 i18 += 16;
202
203 const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 304);
204 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
205
206 const __m512 vi19x0123456789ABCDEF = _mm512_loadu_ps(i19);
207 i19 += 16;
208
209 const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 320);
210 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp1);
211
212 const __m512 vi20x0123456789ABCDEF = _mm512_loadu_ps(i20);
213 i20 += 16;
214
215 const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 336);
216 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
217
218 const __m512 vi21x0123456789ABCDEF = _mm512_loadu_ps(i21);
219 i21 += 16;
220
221 const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 352);
222 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp1);
223
224 const __m512 vi22x0123456789ABCDEF = _mm512_loadu_ps(i22);
225 i22 += 16;
226
227 const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 368);
228 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
229
230 const __m512 vi23x0123456789ABCDEF = _mm512_loadu_ps(i23);
231 i23 += 16;
232
233 const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 384);
234 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp1);
235
236 const __m512 vi24x0123456789ABCDEF = _mm512_loadu_ps(i24);
237 i24 += 16;
238
239 const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 400);
240 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
241
242 w += 416;
243
244 // Add up all accumulators to vacc0123456789ABCDEFp0
245 vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
246
247 __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
248 vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
249
250 _mm512_storeu_ps(output, vacc0123456789ABCDEF);
251 output += 16;
252 }
253 if XNN_UNLIKELY(c != 0) {
254 assert(c >= 1);
255 assert(c <= 16);
256 // Prepare mask for valid 32-bit elements (depends on nc).
257 const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
258
Marat Dukhan90dff802020-02-10 17:23:53 -0800259 __m512 vacc0123456789ABCDEFp0 = _mm512_maskz_loadu_ps(vmask, w);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800260
261 const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
Marat Dukhan90dff802020-02-10 17:23:53 -0800262 const __m512 vk0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 16);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800263 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
264
265 const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
Marat Dukhan90dff802020-02-10 17:23:53 -0800266 const __m512 vk1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 32);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800267 __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
268
269 const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
Marat Dukhan90dff802020-02-10 17:23:53 -0800270 const __m512 vk2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 48);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800271 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
272
273 const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
Marat Dukhan90dff802020-02-10 17:23:53 -0800274 const __m512 vk3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 64);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800275 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
276
277 const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
Marat Dukhan90dff802020-02-10 17:23:53 -0800278 const __m512 vk4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 80);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800279 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
280
281 const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
Marat Dukhan90dff802020-02-10 17:23:53 -0800282 const __m512 vk5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 96);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800283 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
284
285 const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
Marat Dukhan90dff802020-02-10 17:23:53 -0800286 const __m512 vk6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 112);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800287 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
288
289 const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
Marat Dukhan90dff802020-02-10 17:23:53 -0800290 const __m512 vk7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 128);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800291 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
292
293 const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
Marat Dukhan90dff802020-02-10 17:23:53 -0800294 const __m512 vk8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 144);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800295 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
296
297 const __m512 vi9x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i9);
Marat Dukhan90dff802020-02-10 17:23:53 -0800298 const __m512 vk9x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 160);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800299 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp1);
300
301 const __m512 vi10x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i10);
Marat Dukhan90dff802020-02-10 17:23:53 -0800302 const __m512 vk10x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 176);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800303 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
304
305 const __m512 vi11x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i11);
Marat Dukhan90dff802020-02-10 17:23:53 -0800306 const __m512 vk11x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 192);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800307 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp1);
308
309 const __m512 vi12x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i12);
Marat Dukhan90dff802020-02-10 17:23:53 -0800310 const __m512 vk12x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 208);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800311 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
312
313 const __m512 vi13x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i13);
Marat Dukhan90dff802020-02-10 17:23:53 -0800314 const __m512 vk13x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 224);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800315 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp1);
316
317 const __m512 vi14x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i14);
Marat Dukhan90dff802020-02-10 17:23:53 -0800318 const __m512 vk14x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 240);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800319 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
320
321 const __m512 vi15x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i15);
Marat Dukhan90dff802020-02-10 17:23:53 -0800322 const __m512 vk15x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 256);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800323 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp1);
324
325 const __m512 vi16x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i16);
Marat Dukhan90dff802020-02-10 17:23:53 -0800326 const __m512 vk16x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 272);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800327 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
328
329 const __m512 vi17x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i17);
Marat Dukhan90dff802020-02-10 17:23:53 -0800330 const __m512 vk17x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 288);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800331 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp1);
332
333 const __m512 vi18x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i18);
Marat Dukhan90dff802020-02-10 17:23:53 -0800334 const __m512 vk18x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 304);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800335 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
336
337 const __m512 vi19x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i19);
Marat Dukhan90dff802020-02-10 17:23:53 -0800338 const __m512 vk19x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 320);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800339 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp1);
340
341 const __m512 vi20x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i20);
Marat Dukhan90dff802020-02-10 17:23:53 -0800342 const __m512 vk20x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 336);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800343 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
344
345 const __m512 vi21x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i21);
Marat Dukhan90dff802020-02-10 17:23:53 -0800346 const __m512 vk21x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 352);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800347 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp1);
348
349 const __m512 vi22x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i22);
Marat Dukhan90dff802020-02-10 17:23:53 -0800350 const __m512 vk22x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 368);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800351 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
352
353 const __m512 vi23x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i23);
Marat Dukhan90dff802020-02-10 17:23:53 -0800354 const __m512 vk23x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 384);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800355 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp1);
356
357 const __m512 vi24x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i24);
Marat Dukhan90dff802020-02-10 17:23:53 -0800358 const __m512 vk24x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 400);
Marat Dukhan479f87e2019-11-27 15:17:06 -0800359 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
360
361 // Add up all accumulators to vacc0123456789ABCDEFp0
362 vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
363
364 __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
365 vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
366
367 _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
368 output += c;
369 }
370
371 output = (float*) ((uintptr_t) output + output_increment);
372 } while (--output_width != 0);
373}