blob: 760855da38bbb59966a7273243b1ece55cb900c1 [file] [log] [blame]
XNNPACK Teamb455b122019-09-27 18:10:33 -07001// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
4// Copyright 2019 Google LLC
5//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
8//
9// Auto-generated file. Do not edit!
Marat Dukhande06f492020-04-09 00:19:31 -070010// Specification: test/q8-dwconv-minmax.yaml
XNNPACK Teamb455b122019-09-27 18:10:33 -070011// Generator: tools/generate-dwconv-test.py
12
13
XNNPACK Teamb455b122019-09-27 18:10:33 -070014#include <gtest/gtest.h>
15
Marat Dukhan1dadbf72019-10-01 10:46:20 -070016#include <xnnpack/common.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070017#include <xnnpack/isa-checks.h>
18
Marat Dukhan1dadbf72019-10-01 10:46:20 -070019#include <xnnpack/dwconv.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070020#include "dwconv-microkernel-tester.h"
21
22
Marat Dukhan1dadbf72019-10-01 10:46:20 -070023#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Marat Dukhande06f492020-04-09 00:19:31 -070024 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, c_eq_8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070025 TEST_REQUIRES_ARM_NEON;
26 DWConvMicrokernelTester()
27 .cr(8)
28 .kr(9)
29 .channels(8)
Marat Dukhande06f492020-04-09 00:19:31 -070030 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -070031 }
32
Marat Dukhande06f492020-04-09 00:19:31 -070033 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, c_div_8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070034 TEST_REQUIRES_ARM_NEON;
35 for (uint32_t channels = 16; channels < 128; channels += 24) {
36 DWConvMicrokernelTester()
37 .cr(8)
38 .kr(9)
39 .channels(channels)
Marat Dukhande06f492020-04-09 00:19:31 -070040 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -070041 }
42 }
43
Marat Dukhande06f492020-04-09 00:19:31 -070044 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, c_div_8_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070045 TEST_REQUIRES_ARM_NEON;
46 for (uint32_t channels = 16; channels < 128; channels += 24) {
47 DWConvMicrokernelTester()
48 .cr(8)
49 .kr(9)
50 .channels(channels)
51 .qmin(128)
Marat Dukhande06f492020-04-09 00:19:31 -070052 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -070053 }
54 }
55
Marat Dukhande06f492020-04-09 00:19:31 -070056 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, c_div_8_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070057 TEST_REQUIRES_ARM_NEON;
58 for (uint32_t channels = 16; channels < 128; channels += 24) {
59 DWConvMicrokernelTester()
60 .cr(8)
61 .kr(9)
62 .channels(channels)
63 .qmax(128)
Marat Dukhande06f492020-04-09 00:19:31 -070064 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -070065 }
66 }
67
Marat Dukhande06f492020-04-09 00:19:31 -070068 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, c_lt_8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070069 TEST_REQUIRES_ARM_NEON;
70 for (uint32_t channels = 1; channels < 8; channels++) {
71 DWConvMicrokernelTester()
72 .cr(8)
73 .kr(9)
74 .channels(channels)
Marat Dukhande06f492020-04-09 00:19:31 -070075 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -070076 }
77 }
78
Marat Dukhande06f492020-04-09 00:19:31 -070079 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, c_gt_8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070080 TEST_REQUIRES_ARM_NEON;
81 for (uint32_t channels = 9; channels < 16; channels++) {
82 DWConvMicrokernelTester()
83 .cr(8)
84 .kr(9)
85 .channels(channels)
Marat Dukhande06f492020-04-09 00:19:31 -070086 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -070087 }
88 }
89
Marat Dukhande06f492020-04-09 00:19:31 -070090 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, c_gt_8_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070091 TEST_REQUIRES_ARM_NEON;
92 for (uint32_t channels = 9; channels < 16; channels++) {
93 DWConvMicrokernelTester()
94 .cr(8)
95 .kr(9)
96 .channels(channels)
97 .qmin(128)
Marat Dukhande06f492020-04-09 00:19:31 -070098 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -070099 }
100 }
101
Marat Dukhande06f492020-04-09 00:19:31 -0700102 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, c_gt_8_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700103 TEST_REQUIRES_ARM_NEON;
104 for (uint32_t channels = 9; channels < 16; channels++) {
105 DWConvMicrokernelTester()
106 .cr(8)
107 .kr(9)
108 .channels(channels)
109 .qmax(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700110 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700111 }
112 }
113
Marat Dukhande06f492020-04-09 00:19:31 -0700114 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, multipixel) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700115 TEST_REQUIRES_ARM_NEON;
116 for (size_t channels = 1; channels <= 40; channels += 7) {
117 DWConvMicrokernelTester()
118 .cr(8)
119 .kr(9)
120 .channels(channels)
121 .width(3)
Marat Dukhande06f492020-04-09 00:19:31 -0700122 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700123 }
124 }
125
Marat Dukhande06f492020-04-09 00:19:31 -0700126 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, multipixel_with_step) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700127 TEST_REQUIRES_ARM_NEON;
128 for (size_t channels = 1; channels <= 40; channels += 7) {
129 for (size_t step = 2; step <= 9; step++) {
130 DWConvMicrokernelTester()
131 .cr(8)
132 .kr(9)
133 .channels(channels)
134 .width(3)
135 .step(step)
Marat Dukhande06f492020-04-09 00:19:31 -0700136 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700137 }
138 }
139 }
140
Marat Dukhande06f492020-04-09 00:19:31 -0700141 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, multipixel_with_output_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700142 TEST_REQUIRES_ARM_NEON;
143 for (size_t channels = 1; channels <= 40; channels += 7) {
144 DWConvMicrokernelTester()
145 .cr(8)
146 .kr(9)
147 .channels(8)
148 .width(5)
149 .output_stride(43)
Marat Dukhande06f492020-04-09 00:19:31 -0700150 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700151 }
152 }
153
Marat Dukhande06f492020-04-09 00:19:31 -0700154 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, multipixel_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700155 TEST_REQUIRES_ARM_NEON;
156 for (size_t channels = 1; channels <= 40; channels += 7) {
157 DWConvMicrokernelTester()
158 .cr(8)
159 .kr(9)
160 .channels(channels)
161 .width(3)
162 .qmin(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700163 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700164 }
165 }
166
Marat Dukhande06f492020-04-09 00:19:31 -0700167 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, multipixel_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700168 TEST_REQUIRES_ARM_NEON;
169 for (size_t channels = 1; channels <= 40; channels += 7) {
170 DWConvMicrokernelTester()
171 .cr(8)
172 .kr(9)
173 .channels(channels)
174 .width(3)
175 .qmax(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700176 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700177 }
178 }
179
Marat Dukhande06f492020-04-09 00:19:31 -0700180 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, input_zero_point_only) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700181 TEST_REQUIRES_ARM_NEON;
182 for (size_t channels = 1; channels <= 40; channels += 7) {
183 DWConvMicrokernelTester()
184 .cr(8)
185 .kr(9)
186 .channels(channels)
187 .width(3)
188 .input_zero_point(255)
189 .kernel_zero_point(0)
Marat Dukhande06f492020-04-09 00:19:31 -0700190 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700191 }
192 }
193
Marat Dukhande06f492020-04-09 00:19:31 -0700194 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, kernel_zero_point_only) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700195 TEST_REQUIRES_ARM_NEON;
196 for (size_t channels = 1; channels <= 40; channels += 7) {
197 DWConvMicrokernelTester()
198 .cr(8)
199 .kr(9)
200 .channels(channels)
201 .width(3)
202 .input_zero_point(0)
203 .kernel_zero_point(255)
Marat Dukhande06f492020-04-09 00:19:31 -0700204 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700205 }
206 }
Frank Barchardd5360722020-05-17 16:10:36 -0700207
208 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, input_offset) {
209 TEST_REQUIRES_ARM_NEON;
210 for (uint32_t channels = 16; channels < 128; channels += 24) {
211 DWConvMicrokernelTester()
212 .cr(8)
213 .kr(9)
214 .channels(channels)
215 .input_offset(176)
216 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
217 }
218 }
219
220 TEST(Q8_DWCONV_MINMAX_UP8X9__NEON, zero) {
221 TEST_REQUIRES_ARM_NEON;
222 for (uint32_t mz = 0; mz < 9; mz++) {
223 for (uint32_t channels = 16; channels < 128; channels += 24) {
224 DWConvMicrokernelTester()
225 .cr(8)
226 .kr(9)
227 .channels(channels)
228 .input_offset(176)
229 .zero_index(mz)
230 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__neon);
231 }
232 }
233 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700234#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700235
236
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700237#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhande06f492020-04-09 00:19:31 -0700238 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, c_eq_8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700239 TEST_REQUIRES_X86_SSE2;
240 DWConvMicrokernelTester()
241 .cr(8)
242 .kr(9)
243 .channels(8)
Marat Dukhande06f492020-04-09 00:19:31 -0700244 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700245 }
246
Marat Dukhande06f492020-04-09 00:19:31 -0700247 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, c_div_8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700248 TEST_REQUIRES_X86_SSE2;
249 for (uint32_t channels = 16; channels < 128; channels += 24) {
250 DWConvMicrokernelTester()
251 .cr(8)
252 .kr(9)
253 .channels(channels)
Marat Dukhande06f492020-04-09 00:19:31 -0700254 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700255 }
256 }
257
Marat Dukhande06f492020-04-09 00:19:31 -0700258 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, c_div_8_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700259 TEST_REQUIRES_X86_SSE2;
260 for (uint32_t channels = 16; channels < 128; channels += 24) {
261 DWConvMicrokernelTester()
262 .cr(8)
263 .kr(9)
264 .channels(channels)
265 .qmin(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700266 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700267 }
268 }
269
Marat Dukhande06f492020-04-09 00:19:31 -0700270 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, c_div_8_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700271 TEST_REQUIRES_X86_SSE2;
272 for (uint32_t channels = 16; channels < 128; channels += 24) {
273 DWConvMicrokernelTester()
274 .cr(8)
275 .kr(9)
276 .channels(channels)
277 .qmax(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700278 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700279 }
280 }
281
Marat Dukhande06f492020-04-09 00:19:31 -0700282 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, c_lt_8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700283 TEST_REQUIRES_X86_SSE2;
284 for (uint32_t channels = 1; channels < 8; channels++) {
285 DWConvMicrokernelTester()
286 .cr(8)
287 .kr(9)
288 .channels(channels)
Marat Dukhande06f492020-04-09 00:19:31 -0700289 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700290 }
291 }
292
Marat Dukhande06f492020-04-09 00:19:31 -0700293 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, c_gt_8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700294 TEST_REQUIRES_X86_SSE2;
295 for (uint32_t channels = 9; channels < 16; channels++) {
296 DWConvMicrokernelTester()
297 .cr(8)
298 .kr(9)
299 .channels(channels)
Marat Dukhande06f492020-04-09 00:19:31 -0700300 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700301 }
302 }
303
Marat Dukhande06f492020-04-09 00:19:31 -0700304 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, c_gt_8_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700305 TEST_REQUIRES_X86_SSE2;
306 for (uint32_t channels = 9; channels < 16; channels++) {
307 DWConvMicrokernelTester()
308 .cr(8)
309 .kr(9)
310 .channels(channels)
311 .qmin(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700312 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700313 }
314 }
315
Marat Dukhande06f492020-04-09 00:19:31 -0700316 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, c_gt_8_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700317 TEST_REQUIRES_X86_SSE2;
318 for (uint32_t channels = 9; channels < 16; channels++) {
319 DWConvMicrokernelTester()
320 .cr(8)
321 .kr(9)
322 .channels(channels)
323 .qmax(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700324 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700325 }
326 }
327
Marat Dukhande06f492020-04-09 00:19:31 -0700328 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, multipixel) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700329 TEST_REQUIRES_X86_SSE2;
330 for (size_t channels = 1; channels <= 40; channels += 7) {
331 DWConvMicrokernelTester()
332 .cr(8)
333 .kr(9)
334 .channels(channels)
335 .width(3)
Marat Dukhande06f492020-04-09 00:19:31 -0700336 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700337 }
338 }
339
Marat Dukhande06f492020-04-09 00:19:31 -0700340 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, multipixel_with_step) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700341 TEST_REQUIRES_X86_SSE2;
342 for (size_t channels = 1; channels <= 40; channels += 7) {
343 for (size_t step = 2; step <= 9; step++) {
344 DWConvMicrokernelTester()
345 .cr(8)
346 .kr(9)
347 .channels(channels)
348 .width(3)
349 .step(step)
Marat Dukhande06f492020-04-09 00:19:31 -0700350 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700351 }
352 }
353 }
354
Marat Dukhande06f492020-04-09 00:19:31 -0700355 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, multipixel_with_output_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700356 TEST_REQUIRES_X86_SSE2;
357 for (size_t channels = 1; channels <= 40; channels += 7) {
358 DWConvMicrokernelTester()
359 .cr(8)
360 .kr(9)
361 .channels(8)
362 .width(5)
363 .output_stride(43)
Marat Dukhande06f492020-04-09 00:19:31 -0700364 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700365 }
366 }
367
Marat Dukhande06f492020-04-09 00:19:31 -0700368 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, multipixel_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700369 TEST_REQUIRES_X86_SSE2;
370 for (size_t channels = 1; channels <= 40; channels += 7) {
371 DWConvMicrokernelTester()
372 .cr(8)
373 .kr(9)
374 .channels(channels)
375 .width(3)
376 .qmin(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700377 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700378 }
379 }
380
Marat Dukhande06f492020-04-09 00:19:31 -0700381 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, multipixel_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700382 TEST_REQUIRES_X86_SSE2;
383 for (size_t channels = 1; channels <= 40; channels += 7) {
384 DWConvMicrokernelTester()
385 .cr(8)
386 .kr(9)
387 .channels(channels)
388 .width(3)
389 .qmax(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700390 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700391 }
392 }
393
Marat Dukhande06f492020-04-09 00:19:31 -0700394 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, input_zero_point_only) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700395 TEST_REQUIRES_X86_SSE2;
396 for (size_t channels = 1; channels <= 40; channels += 7) {
397 DWConvMicrokernelTester()
398 .cr(8)
399 .kr(9)
400 .channels(channels)
401 .width(3)
402 .input_zero_point(255)
403 .kernel_zero_point(0)
Marat Dukhande06f492020-04-09 00:19:31 -0700404 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700405 }
406 }
407
Marat Dukhande06f492020-04-09 00:19:31 -0700408 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, kernel_zero_point_only) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700409 TEST_REQUIRES_X86_SSE2;
410 for (size_t channels = 1; channels <= 40; channels += 7) {
411 DWConvMicrokernelTester()
412 .cr(8)
413 .kr(9)
414 .channels(channels)
415 .width(3)
416 .input_zero_point(0)
417 .kernel_zero_point(255)
Marat Dukhande06f492020-04-09 00:19:31 -0700418 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700419 }
420 }
Frank Barchardd5360722020-05-17 16:10:36 -0700421
422 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, input_offset) {
423 TEST_REQUIRES_X86_SSE2;
424 for (uint32_t channels = 16; channels < 128; channels += 24) {
425 DWConvMicrokernelTester()
426 .cr(8)
427 .kr(9)
428 .channels(channels)
429 .input_offset(176)
430 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
431 }
432 }
433
434 TEST(Q8_DWCONV_MINMAX_UP8X9__SSE2, zero) {
435 TEST_REQUIRES_X86_SSE2;
436 for (uint32_t mz = 0; mz < 9; mz++) {
437 for (uint32_t channels = 16; channels < 128; channels += 24) {
438 DWConvMicrokernelTester()
439 .cr(8)
440 .kr(9)
441 .channels(channels)
442 .input_offset(176)
443 .zero_index(mz)
444 .Test(xnn_q8_dwconv_minmax_ukernel_up8x9__sse2);
445 }
446 }
447 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700448#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700449
450
Marat Dukhande06f492020-04-09 00:19:31 -0700451TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, c_eq_1) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700452 DWConvMicrokernelTester()
453 .cr(1)
454 .kr(9)
455 .channels(1)
Marat Dukhande06f492020-04-09 00:19:31 -0700456 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700457}
458
Marat Dukhande06f492020-04-09 00:19:31 -0700459TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, c_gt_1) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700460 for (uint32_t channels = 2; channels < 10; channels++) {
461 DWConvMicrokernelTester()
462 .cr(1)
463 .kr(9)
464 .channels(channels)
Marat Dukhande06f492020-04-09 00:19:31 -0700465 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700466 }
467}
468
Marat Dukhande06f492020-04-09 00:19:31 -0700469TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, c_gt_1_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700470 for (uint32_t channels = 2; channels < 10; channels++) {
471 DWConvMicrokernelTester()
472 .cr(1)
473 .kr(9)
474 .channels(channels)
475 .qmin(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700476 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700477 }
478}
479
Marat Dukhande06f492020-04-09 00:19:31 -0700480TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, c_gt_1_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700481 for (uint32_t channels = 2; channels < 10; channels++) {
482 DWConvMicrokernelTester()
483 .cr(1)
484 .kr(9)
485 .channels(channels)
486 .qmax(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700487 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700488 }
489}
490
Marat Dukhande06f492020-04-09 00:19:31 -0700491TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, multipixel) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700492 for (size_t channels = 1; channels <= 5; channels += 1) {
493 DWConvMicrokernelTester()
494 .cr(1)
495 .kr(9)
496 .channels(channels)
497 .width(3)
Marat Dukhande06f492020-04-09 00:19:31 -0700498 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700499 }
500}
501
Marat Dukhande06f492020-04-09 00:19:31 -0700502TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, multipixel_with_step) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700503 for (size_t channels = 1; channels <= 5; channels += 1) {
504 for (size_t step = 2; step <= 9; step++) {
505 DWConvMicrokernelTester()
506 .cr(1)
507 .kr(9)
508 .channels(channels)
509 .width(3)
510 .step(step)
Marat Dukhande06f492020-04-09 00:19:31 -0700511 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700512 }
513 }
514}
515
Marat Dukhande06f492020-04-09 00:19:31 -0700516TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, multipixel_with_output_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700517 for (size_t channels = 1; channels <= 5; channels += 1) {
518 DWConvMicrokernelTester()
519 .cr(1)
520 .kr(9)
521 .channels(1)
522 .width(5)
523 .output_stride(7)
Marat Dukhande06f492020-04-09 00:19:31 -0700524 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700525 }
526}
527
Marat Dukhande06f492020-04-09 00:19:31 -0700528TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, multipixel_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700529 for (size_t channels = 1; channels <= 5; channels += 1) {
530 DWConvMicrokernelTester()
531 .cr(1)
532 .kr(9)
533 .channels(channels)
534 .width(3)
535 .qmin(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700536 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700537 }
538}
539
Marat Dukhande06f492020-04-09 00:19:31 -0700540TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, multipixel_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700541 for (size_t channels = 1; channels <= 5; channels += 1) {
542 DWConvMicrokernelTester()
543 .cr(1)
544 .kr(9)
545 .channels(channels)
546 .width(3)
547 .qmax(128)
Marat Dukhande06f492020-04-09 00:19:31 -0700548 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700549 }
550}
551
Marat Dukhande06f492020-04-09 00:19:31 -0700552TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, input_zero_point_only) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700553 for (size_t channels = 1; channels <= 5; channels += 1) {
554 DWConvMicrokernelTester()
555 .cr(1)
556 .kr(9)
557 .channels(channels)
558 .width(3)
559 .input_zero_point(255)
560 .kernel_zero_point(0)
Marat Dukhande06f492020-04-09 00:19:31 -0700561 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700562 }
563}
564
Marat Dukhande06f492020-04-09 00:19:31 -0700565TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, kernel_zero_point_only) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700566 for (size_t channels = 1; channels <= 5; channels += 1) {
567 DWConvMicrokernelTester()
568 .cr(1)
569 .kr(9)
570 .channels(channels)
571 .width(3)
572 .input_zero_point(0)
573 .kernel_zero_point(255)
Marat Dukhande06f492020-04-09 00:19:31 -0700574 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700575 }
Frank Barchardd5360722020-05-17 16:10:36 -0700576}
577
578TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, input_offset) {
579 for (uint32_t channels = 2; channels < 16; channels += 3) {
580 DWConvMicrokernelTester()
581 .cr(1)
582 .kr(9)
583 .channels(channels)
584 .input_offset(48)
585 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
586 }
587}
588
589TEST(Q8_DWCONV_MINMAX_UP1X9__SCALAR, zero) {
590 for (uint32_t mz = 0; mz < 9; mz++) {
591 for (uint32_t channels = 2; channels < 16; channels += 3) {
592 DWConvMicrokernelTester()
593 .cr(1)
594 .kr(9)
595 .channels(channels)
596 .input_offset(48)
597 .zero_index(mz)
598 .Test(xnn_q8_dwconv_minmax_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar);
599 }
600 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700601}