XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| 5 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6 | #include <pthread.h> |
| 7 | #include <sched.h> |
Marat Dukhan | 452662b | 2019-10-03 00:14:39 -0700 | [diff] [blame] | 8 | #ifdef __ANDROID__ |
| 9 | #include <malloc.h> |
| 10 | #endif |
Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 11 | #if defined(__SSE__) || defined(__x86_64__) |
| 12 | #include <xmmintrin.h> |
| 13 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 14 | |
| 15 | #include <cstdio> |
| 16 | #include <cstdlib> |
| 17 | #include <cstring> |
| 18 | |
| 19 | #include <cpuinfo.h> |
| 20 | |
| 21 | #include "bench/utils.h" |
| 22 | |
| 23 | |
| 24 | static void* wipe_buffer = nullptr; |
| 25 | static size_t wipe_buffer_size = 0; |
| 26 | |
Marat Dukhan | 4232323 | 2019-10-23 02:09:02 -0700 | [diff] [blame] | 27 | static pthread_once_t wipe_buffer_guard = PTHREAD_ONCE_INIT; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 28 | |
Marat Dukhan | 4232323 | 2019-10-23 02:09:02 -0700 | [diff] [blame] | 29 | static void InitWipeBuffer() { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 30 | // Default: the largest know cache size (128 MB Intel Crystalwell L4 cache). |
| 31 | wipe_buffer_size = 128 * 1024 * 1024; |
| 32 | if (cpuinfo_initialize()) { |
Marat Dukhan | d62f3cc | 2019-10-01 12:37:52 -0700 | [diff] [blame] | 33 | wipe_buffer_size = benchmark::utils::GetMaxCacheSize(); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 34 | } |
| 35 | #if defined(__ANDROID__) |
| 36 | // memalign is obsolete, but it is the only option on Android until API level 17. |
| 37 | wipe_buffer = memalign(128, wipe_buffer_size); |
Yasuhiro Matsumoto | 462be05 | 2020-02-29 13:41:14 +0900 | [diff] [blame] | 38 | #elif defined(_WIN32) |
| 39 | wipe_buffer = _aligned_malloc(wipe_buffer_size, 128); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 40 | #else |
| 41 | (void) posix_memalign((void**) &wipe_buffer, 128, wipe_buffer_size); |
| 42 | #endif |
| 43 | if (wipe_buffer != nullptr) { |
| 44 | memset(wipe_buffer, 0xA5, wipe_buffer_size); |
| 45 | } |
| 46 | } |
| 47 | |
| 48 | namespace benchmark { |
| 49 | namespace utils { |
| 50 | |
Marat Dukhan | 4232323 | 2019-10-23 02:09:02 -0700 | [diff] [blame] | 51 | uint32_t PrefetchToL1(const void* ptr, size_t size) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 52 | uint32_t step = 16; |
| 53 | if (cpuinfo_initialize()) { |
| 54 | step = cpuinfo_get_l1d_cache(0)->line_size; |
| 55 | } |
| 56 | const uint8_t* u8_ptr = static_cast<const uint8_t*>(ptr); |
| 57 | // Compute and return sum of data to prevent compiler from removing data reads. |
| 58 | uint32_t sum = 0; |
| 59 | while (size >= step) { |
| 60 | sum += uint32_t(*u8_ptr); |
| 61 | u8_ptr += step; |
| 62 | size -= step; |
| 63 | } |
| 64 | return sum; |
| 65 | } |
| 66 | |
Marat Dukhan | 4232323 | 2019-10-23 02:09:02 -0700 | [diff] [blame] | 67 | uint32_t WipeCache() { |
| 68 | pthread_once(&wipe_buffer_guard, &InitWipeBuffer); |
| 69 | return PrefetchToL1(wipe_buffer, wipe_buffer_size); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 70 | } |
| 71 | |
Marat Dukhan | 4a4a7fa | 2019-10-21 13:46:14 -0700 | [diff] [blame] | 72 | void DisableDenormals() { |
| 73 | #if defined(__SSE__) || defined(__x86_64__) |
| 74 | _mm_setcsr(_mm_getcsr() | 0x8040); |
| 75 | #elif defined(__arm__) && defined(__ARM_FP) && (__ARM_FP != 0) |
| 76 | uint32_t fpscr; |
| 77 | __asm__ __volatile__( |
| 78 | "VMRS %[fpscr], fpscr\n" |
| 79 | "ORR %[fpscr], #0x1000000\n" |
| 80 | "VMSR fpscr, %[fpscr]\n" |
| 81 | : [fpscr] "=r" (fpscr)); |
| 82 | #elif defined(__aarch64__) |
| 83 | uint64_t fpcr; |
| 84 | __asm__ __volatile__( |
| 85 | "MRS %[fpcr], fpcr\n" |
| 86 | "ORR %w[fpcr], %w[fpcr], 0x1000000\n" |
| 87 | "ORR %w[fpcr], %w[fpcr], 0x80000\n" |
| 88 | "MSR fpcr, %[fpcr]\n" |
| 89 | : [fpcr] "=r" (fpcr)); |
| 90 | #endif |
| 91 | } |
| 92 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 93 | // Return clockrate in Hz |
Frank Barchard | bb4c18b | 2019-09-30 11:05:52 -0700 | [diff] [blame] | 94 | uint64_t GetCurrentCpuFrequency() { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 95 | #ifdef __linux__ |
| 96 | int freq = 0; |
| 97 | char cpuinfo_name[512]; |
| 98 | int cpu = sched_getcpu(); |
Frank Barchard | bb4c18b | 2019-09-30 11:05:52 -0700 | [diff] [blame] | 99 | snprintf(cpuinfo_name, sizeof(cpuinfo_name), |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 100 | "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_cur_freq", cpu); |
| 101 | |
| 102 | FILE* f = fopen(cpuinfo_name, "r"); |
| 103 | if (f) { |
| 104 | if (fscanf(f, "%d", &freq)) { |
| 105 | fclose(f); |
| 106 | return uint64_t(freq) * 1000; |
| 107 | } |
| 108 | fclose(f); |
| 109 | } |
| 110 | #endif // __linux__ |
| 111 | return 0; |
| 112 | } |
| 113 | |
Marat Dukhan | d62f3cc | 2019-10-01 12:37:52 -0700 | [diff] [blame] | 114 | size_t GetMaxCacheSize() { |
| 115 | if (!cpuinfo_initialize()) { |
| 116 | #if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 |
| 117 | // DynamIQ max: 4 MB |
| 118 | return 4 * 1024 * 1024; |
| 119 | #else |
| 120 | // Intel eDRAM max: 128 MB |
| 121 | return 128 * 1024 * 1024; |
| 122 | #endif |
| 123 | } |
Marat Dukhan | 9fd7e25 | 2020-03-08 19:33:44 -0700 | [diff] [blame] | 124 | return cpuinfo_get_max_cache_size(); |
Marat Dukhan | d62f3cc | 2019-10-01 12:37:52 -0700 | [diff] [blame] | 125 | } |
| 126 | |
Marat Dukhan | bad48fe | 2019-11-04 10:35:22 -0800 | [diff] [blame] | 127 | void MultiThreadingParameters(benchmark::internal::Benchmark* benchmark) { |
| 128 | benchmark->ArgName("T"); |
| 129 | |
| 130 | // Disabled thread pool (execution on the caller thread only). |
| 131 | benchmark->Arg(1); |
| 132 | |
| 133 | if (cpuinfo_initialize()) { |
| 134 | // All cores except the little ones. |
| 135 | uint32_t max_cores = cpuinfo_get_cores_count(); |
| 136 | if (cpuinfo_get_clusters_count() > 1) { |
| 137 | max_cores -= cpuinfo_get_cluster(cpuinfo_get_clusters_count() - 1)->core_count; |
| 138 | } |
| 139 | for (uint32_t t = 2; t <= max_cores; t++) { |
| 140 | benchmark->Arg(t); |
| 141 | } |
| 142 | |
| 143 | // All cores (if more than one cluster). |
| 144 | if (cpuinfo_get_cores_count() > max_cores) { |
| 145 | benchmark->Arg(cpuinfo_get_cores_count()); |
| 146 | } |
| 147 | |
| 148 | // All cores + hyperthreads (only if hyperthreading supported). |
| 149 | if (cpuinfo_get_processors_count() > cpuinfo_get_cores_count()) { |
| 150 | benchmark->Arg(cpuinfo_get_processors_count()); |
| 151 | } |
| 152 | } |
| 153 | } |
| 154 | |
Marat Dukhan | c8466f5 | 2019-11-25 18:01:10 -0800 | [diff] [blame] | 155 | |
| 156 | bool CheckNEON(benchmark::State& state) { |
| 157 | if (!cpuinfo_initialize() || !cpuinfo_has_arm_neon()) { |
| 158 | state.SkipWithError("no NEON extension"); |
| 159 | return false; |
| 160 | } |
| 161 | return true; |
| 162 | } |
| 163 | |
| 164 | bool CheckNEONFMA(benchmark::State& state) { |
| 165 | if (!cpuinfo_initialize() || !cpuinfo_has_arm_neon_fma()) { |
| 166 | state.SkipWithError("no NEON-FMA extension"); |
| 167 | return false; |
| 168 | } |
| 169 | return true; |
| 170 | } |
| 171 | |
| 172 | bool CheckSSE41(benchmark::State& state) { |
| 173 | if (!cpuinfo_initialize() || !cpuinfo_has_x86_sse4_1()) { |
| 174 | state.SkipWithError("no SSE4.1 extension"); |
| 175 | return false; |
| 176 | } |
| 177 | return true; |
| 178 | } |
| 179 | |
| 180 | bool CheckAVX(benchmark::State& state) { |
| 181 | if (!cpuinfo_initialize() || !cpuinfo_has_x86_avx()) { |
| 182 | state.SkipWithError("no AVX extension"); |
| 183 | return false; |
| 184 | } |
| 185 | return true; |
| 186 | } |
| 187 | |
| 188 | bool CheckFMA3(benchmark::State& state) { |
| 189 | if (!cpuinfo_initialize() || !cpuinfo_has_x86_fma3()) { |
| 190 | state.SkipWithError("no FMA3 extension"); |
| 191 | return false; |
| 192 | } |
| 193 | return true; |
| 194 | } |
| 195 | |
| 196 | bool CheckAVX2(benchmark::State& state) { |
| 197 | if (!cpuinfo_initialize() || !cpuinfo_has_x86_avx2()) { |
| 198 | state.SkipWithError("no AVX2 extension"); |
| 199 | return false; |
| 200 | } |
| 201 | return true; |
| 202 | } |
| 203 | |
| 204 | bool CheckAVX512F(benchmark::State& state) { |
| 205 | if (!cpuinfo_initialize() || !cpuinfo_has_x86_avx512f()) { |
| 206 | state.SkipWithError("no AVX512F extension"); |
| 207 | return false; |
| 208 | } |
| 209 | return true; |
| 210 | } |
| 211 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 212 | } // namespace utils |
| 213 | } // namespace benchmark |