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Marat Dukhan6674d692021-05-05 22:27:00 -07001// Copyright 2019 Google LLC
2//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
5//
6// Auto-generated file. Do not edit!
7// Specification: test/f32-vsigmoid.yaml
8// Generator: tools/generate-vunary-test.py
9
10
11#include <gtest/gtest.h>
12
13#include <xnnpack/common.h>
14#include <xnnpack/isa-checks.h>
15
16#include <xnnpack/vunary.h>
17#include "vunary-microkernel-tester.h"
18
19
20#if XNN_ARCH_ARM64
21 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X4, batch_eq_4) {
22 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -070023 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070024 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -070025 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070026 }
27
28 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X4, batch_div_4) {
29 TEST_REQUIRES_ARM_NEON_FMA;
30 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070031 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070032 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070033 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070034 }
35 }
36
37 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X4, batch_lt_4) {
38 TEST_REQUIRES_ARM_NEON_FMA;
39 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070040 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070041 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070042 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070043 }
44 }
45
46 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X4, batch_gt_4) {
47 TEST_REQUIRES_ARM_NEON_FMA;
48 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070049 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070050 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070051 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070052 }
53 }
54
55 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X4, inplace) {
56 TEST_REQUIRES_ARM_NEON_FMA;
57 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070058 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070059 .batch_size(batch_size)
60 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070061 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070062 }
63 }
64#endif // XNN_ARCH_ARM64
65
66
67#if XNN_ARCH_ARM64
68 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X8, batch_eq_8) {
69 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -070070 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070071 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -070072 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070073 }
74
75 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X8, batch_div_8) {
76 TEST_REQUIRES_ARM_NEON_FMA;
77 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070078 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070079 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070080 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070081 }
82 }
83
84 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X8, batch_lt_8) {
85 TEST_REQUIRES_ARM_NEON_FMA;
86 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070087 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070088 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070089 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070090 }
91 }
92
93 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X8, batch_gt_8) {
94 TEST_REQUIRES_ARM_NEON_FMA;
95 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070096 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070097 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070098 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070099 }
100 }
101
102 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X8, inplace) {
103 TEST_REQUIRES_ARM_NEON_FMA;
104 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700105 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700106 .batch_size(batch_size)
107 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700108 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700109 }
110 }
111#endif // XNN_ARCH_ARM64
112
113
114#if XNN_ARCH_ARM64
115 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X12, batch_eq_12) {
116 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700117 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700118 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700119 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700120 }
121
122 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X12, batch_div_12) {
123 TEST_REQUIRES_ARM_NEON_FMA;
124 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700125 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700126 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700127 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700128 }
129 }
130
131 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X12, batch_lt_12) {
132 TEST_REQUIRES_ARM_NEON_FMA;
133 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700134 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700135 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700136 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700137 }
138 }
139
140 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X12, batch_gt_12) {
141 TEST_REQUIRES_ARM_NEON_FMA;
142 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700143 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700144 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700145 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700146 }
147 }
148
149 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X12, inplace) {
150 TEST_REQUIRES_ARM_NEON_FMA;
151 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700152 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700153 .batch_size(batch_size)
154 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700155 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700156 }
157 }
158#endif // XNN_ARCH_ARM64
159
160
161#if XNN_ARCH_ARM64
162 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X16, batch_eq_16) {
163 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700164 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700165 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700166 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700167 }
168
169 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X16, batch_div_16) {
170 TEST_REQUIRES_ARM_NEON_FMA;
171 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700172 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700173 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700174 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700175 }
176 }
177
178 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X16, batch_lt_16) {
179 TEST_REQUIRES_ARM_NEON_FMA;
180 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700181 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700182 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700183 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700184 }
185 }
186
187 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X16, batch_gt_16) {
188 TEST_REQUIRES_ARM_NEON_FMA;
189 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700190 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700191 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700192 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700193 }
194 }
195
196 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X16, inplace) {
197 TEST_REQUIRES_ARM_NEON_FMA;
198 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700199 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700200 .batch_size(batch_size)
201 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700202 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700203 }
204 }
205#endif // XNN_ARCH_ARM64
206
207
208#if XNN_ARCH_ARM64
209 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X20, batch_eq_20) {
210 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700211 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700212 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700213 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700214 }
215
216 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X20, batch_div_20) {
217 TEST_REQUIRES_ARM_NEON_FMA;
218 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700219 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700220 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700221 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700222 }
223 }
224
225 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X20, batch_lt_20) {
226 TEST_REQUIRES_ARM_NEON_FMA;
227 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700228 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700229 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700230 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700231 }
232 }
233
234 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X20, batch_gt_20) {
235 TEST_REQUIRES_ARM_NEON_FMA;
236 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700237 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700238 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700239 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700240 }
241 }
242
243 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X20, inplace) {
244 TEST_REQUIRES_ARM_NEON_FMA;
245 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700246 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700247 .batch_size(batch_size)
248 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700249 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700250 }
251 }
252#endif // XNN_ARCH_ARM64
253
254
255#if XNN_ARCH_ARM64
256 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X24, batch_eq_24) {
257 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700258 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700259 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700260 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700261 }
262
263 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X24, batch_div_24) {
264 TEST_REQUIRES_ARM_NEON_FMA;
265 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700266 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700267 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700268 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700269 }
270 }
271
272 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X24, batch_lt_24) {
273 TEST_REQUIRES_ARM_NEON_FMA;
274 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700275 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700276 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700277 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700278 }
279 }
280
281 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X24, batch_gt_24) {
282 TEST_REQUIRES_ARM_NEON_FMA;
283 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700284 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700285 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700286 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700287 }
288 }
289
290 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_DIV_X24, inplace) {
291 TEST_REQUIRES_ARM_NEON_FMA;
292 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700293 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700294 .batch_size(batch_size)
295 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700296 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700297 }
298 }
299#endif // XNN_ARCH_ARM64
300
301
302#if XNN_ARCH_ARM || XNN_ARCH_ARM64
303 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X4, batch_eq_4) {
304 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700305 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700306 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700307 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700308 }
309
310 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X4, batch_div_4) {
311 TEST_REQUIRES_ARM_NEON_FMA;
312 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700313 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700314 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700315 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700316 }
317 }
318
319 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X4, batch_lt_4) {
320 TEST_REQUIRES_ARM_NEON_FMA;
321 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700322 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700323 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700324 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700325 }
326 }
327
328 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X4, batch_gt_4) {
329 TEST_REQUIRES_ARM_NEON_FMA;
330 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700331 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700332 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700333 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700334 }
335 }
336
337 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X4, inplace) {
338 TEST_REQUIRES_ARM_NEON_FMA;
339 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700340 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700341 .batch_size(batch_size)
342 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700343 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700344 }
345 }
346#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
347
348
349#if XNN_ARCH_ARM || XNN_ARCH_ARM64
350 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X8, batch_eq_8) {
351 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700352 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700353 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700354 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700355 }
356
357 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X8, batch_div_8) {
358 TEST_REQUIRES_ARM_NEON_FMA;
359 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700360 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700361 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700362 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700363 }
364 }
365
366 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X8, batch_lt_8) {
367 TEST_REQUIRES_ARM_NEON_FMA;
368 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700369 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700370 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700371 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700372 }
373 }
374
375 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X8, batch_gt_8) {
376 TEST_REQUIRES_ARM_NEON_FMA;
377 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700378 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700379 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700380 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700381 }
382 }
383
384 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X8, inplace) {
385 TEST_REQUIRES_ARM_NEON_FMA;
386 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700387 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700388 .batch_size(batch_size)
389 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700390 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700391 }
392 }
393#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
394
395
396#if XNN_ARCH_ARM || XNN_ARCH_ARM64
397 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X12, batch_eq_12) {
398 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700399 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700400 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700401 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700402 }
403
404 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X12, batch_div_12) {
405 TEST_REQUIRES_ARM_NEON_FMA;
406 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700407 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700408 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700409 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700410 }
411 }
412
413 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X12, batch_lt_12) {
414 TEST_REQUIRES_ARM_NEON_FMA;
415 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700416 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700417 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700418 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700419 }
420 }
421
422 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X12, batch_gt_12) {
423 TEST_REQUIRES_ARM_NEON_FMA;
424 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700425 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700426 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700427 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700428 }
429 }
430
431 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X12, inplace) {
432 TEST_REQUIRES_ARM_NEON_FMA;
433 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700434 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700435 .batch_size(batch_size)
436 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700437 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700438 }
439 }
440#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
441
442
443#if XNN_ARCH_ARM || XNN_ARCH_ARM64
444 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X16, batch_eq_16) {
445 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700446 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700447 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700448 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700449 }
450
451 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X16, batch_div_16) {
452 TEST_REQUIRES_ARM_NEON_FMA;
453 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700454 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700455 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700456 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700457 }
458 }
459
460 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X16, batch_lt_16) {
461 TEST_REQUIRES_ARM_NEON_FMA;
462 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700463 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700464 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700465 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700466 }
467 }
468
469 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X16, batch_gt_16) {
470 TEST_REQUIRES_ARM_NEON_FMA;
471 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700472 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700473 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700474 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700475 }
476 }
477
478 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X16, inplace) {
479 TEST_REQUIRES_ARM_NEON_FMA;
480 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700481 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700482 .batch_size(batch_size)
483 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700484 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700485 }
486 }
487#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
488
489
490#if XNN_ARCH_ARM || XNN_ARCH_ARM64
491 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X20, batch_eq_20) {
492 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700493 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700494 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700495 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700496 }
497
498 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X20, batch_div_20) {
499 TEST_REQUIRES_ARM_NEON_FMA;
500 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700501 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700502 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700503 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700504 }
505 }
506
507 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X20, batch_lt_20) {
508 TEST_REQUIRES_ARM_NEON_FMA;
509 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700510 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700511 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700512 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700513 }
514 }
515
516 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X20, batch_gt_20) {
517 TEST_REQUIRES_ARM_NEON_FMA;
518 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700519 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700520 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700521 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700522 }
523 }
524
525 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X20, inplace) {
526 TEST_REQUIRES_ARM_NEON_FMA;
527 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700528 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700529 .batch_size(batch_size)
530 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700531 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700532 }
533 }
534#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
535
536
537#if XNN_ARCH_ARM || XNN_ARCH_ARM64
538 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X24, batch_eq_24) {
539 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700540 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700541 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700542 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700543 }
544
545 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X24, batch_div_24) {
546 TEST_REQUIRES_ARM_NEON_FMA;
547 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700548 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700549 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700550 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700551 }
552 }
553
554 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X24, batch_lt_24) {
555 TEST_REQUIRES_ARM_NEON_FMA;
556 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700557 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700558 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700559 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700560 }
561 }
562
563 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X24, batch_gt_24) {
564 TEST_REQUIRES_ARM_NEON_FMA;
565 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700566 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700567 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700568 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700569 }
570 }
571
572 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2FMA_X24, inplace) {
573 TEST_REQUIRES_ARM_NEON_FMA;
574 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700575 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700576 .batch_size(batch_size)
577 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700578 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700579 }
580 }
581#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
582
583
584#if XNN_ARCH_ARM || XNN_ARCH_ARM64
585 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X4, batch_eq_4) {
586 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700587 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700588 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700589 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700590 }
591
592 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X4, batch_div_4) {
593 TEST_REQUIRES_ARM_NEON_FMA;
594 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700595 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700596 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700597 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700598 }
599 }
600
601 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X4, batch_lt_4) {
602 TEST_REQUIRES_ARM_NEON_FMA;
603 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700604 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700605 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700606 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700607 }
608 }
609
610 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X4, batch_gt_4) {
611 TEST_REQUIRES_ARM_NEON_FMA;
612 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700613 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700614 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700615 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700616 }
617 }
618
619 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X4, inplace) {
620 TEST_REQUIRES_ARM_NEON_FMA;
621 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700622 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700623 .batch_size(batch_size)
624 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700625 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700626 }
627 }
628#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
629
630
631#if XNN_ARCH_ARM || XNN_ARCH_ARM64
632 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X8, batch_eq_8) {
633 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700634 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700635 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700636 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700637 }
638
639 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X8, batch_div_8) {
640 TEST_REQUIRES_ARM_NEON_FMA;
641 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700642 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700643 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700644 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700645 }
646 }
647
648 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X8, batch_lt_8) {
649 TEST_REQUIRES_ARM_NEON_FMA;
650 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700651 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700652 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700653 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700654 }
655 }
656
657 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X8, batch_gt_8) {
658 TEST_REQUIRES_ARM_NEON_FMA;
659 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700660 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700661 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700662 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700663 }
664 }
665
666 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X8, inplace) {
667 TEST_REQUIRES_ARM_NEON_FMA;
668 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700669 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700670 .batch_size(batch_size)
671 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700672 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700673 }
674 }
675#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
676
677
678#if XNN_ARCH_ARM || XNN_ARCH_ARM64
679 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X12, batch_eq_12) {
680 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700681 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700682 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700683 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700684 }
685
686 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X12, batch_div_12) {
687 TEST_REQUIRES_ARM_NEON_FMA;
688 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700689 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700690 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700691 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700692 }
693 }
694
695 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X12, batch_lt_12) {
696 TEST_REQUIRES_ARM_NEON_FMA;
697 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700698 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700699 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700700 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700701 }
702 }
703
704 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X12, batch_gt_12) {
705 TEST_REQUIRES_ARM_NEON_FMA;
706 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700707 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700708 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700709 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700710 }
711 }
712
713 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X12, inplace) {
714 TEST_REQUIRES_ARM_NEON_FMA;
715 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700716 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700717 .batch_size(batch_size)
718 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700719 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700720 }
721 }
722#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
723
724
725#if XNN_ARCH_ARM || XNN_ARCH_ARM64
726 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X16, batch_eq_16) {
727 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700728 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700729 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700730 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700731 }
732
733 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X16, batch_div_16) {
734 TEST_REQUIRES_ARM_NEON_FMA;
735 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700736 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700737 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700738 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700739 }
740 }
741
742 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X16, batch_lt_16) {
743 TEST_REQUIRES_ARM_NEON_FMA;
744 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700745 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700746 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700747 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700748 }
749 }
750
751 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X16, batch_gt_16) {
752 TEST_REQUIRES_ARM_NEON_FMA;
753 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700754 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700755 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700756 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700757 }
758 }
759
760 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X16, inplace) {
761 TEST_REQUIRES_ARM_NEON_FMA;
762 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700763 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700764 .batch_size(batch_size)
765 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700766 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700767 }
768 }
769#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
770
771
772#if XNN_ARCH_ARM || XNN_ARCH_ARM64
773 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X20, batch_eq_20) {
774 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700775 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700776 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700777 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700778 }
779
780 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X20, batch_div_20) {
781 TEST_REQUIRES_ARM_NEON_FMA;
782 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700783 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700784 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700785 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700786 }
787 }
788
789 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X20, batch_lt_20) {
790 TEST_REQUIRES_ARM_NEON_FMA;
791 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700792 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700793 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700794 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700795 }
796 }
797
798 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X20, batch_gt_20) {
799 TEST_REQUIRES_ARM_NEON_FMA;
800 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700801 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700802 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700803 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700804 }
805 }
806
807 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X20, inplace) {
808 TEST_REQUIRES_ARM_NEON_FMA;
809 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700810 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700811 .batch_size(batch_size)
812 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700813 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700814 }
815 }
816#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
817
818
819#if XNN_ARCH_ARM || XNN_ARCH_ARM64
820 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X24, batch_eq_24) {
821 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700822 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700823 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700824 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700825 }
826
827 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X24, batch_div_24) {
828 TEST_REQUIRES_ARM_NEON_FMA;
829 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700830 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700831 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700832 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700833 }
834 }
835
836 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X24, batch_lt_24) {
837 TEST_REQUIRES_ARM_NEON_FMA;
838 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700839 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700840 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700841 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700842 }
843 }
844
845 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X24, batch_gt_24) {
846 TEST_REQUIRES_ARM_NEON_FMA;
847 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700848 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700849 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700850 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700851 }
852 }
853
854 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR1RECPS1FMA_X24, inplace) {
855 TEST_REQUIRES_ARM_NEON_FMA;
856 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700857 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700858 .batch_size(batch_size)
859 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700860 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700861 }
862 }
863#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
864
865
866#if XNN_ARCH_ARM || XNN_ARCH_ARM64
867 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X4, batch_eq_4) {
868 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700869 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700870 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700871 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700872 }
873
874 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X4, batch_div_4) {
875 TEST_REQUIRES_ARM_NEON_FMA;
876 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700877 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700878 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700879 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700880 }
881 }
882
883 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X4, batch_lt_4) {
884 TEST_REQUIRES_ARM_NEON_FMA;
885 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700886 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700887 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700888 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700889 }
890 }
891
892 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X4, batch_gt_4) {
893 TEST_REQUIRES_ARM_NEON_FMA;
894 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700895 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700896 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700897 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700898 }
899 }
900
901 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X4, inplace) {
902 TEST_REQUIRES_ARM_NEON_FMA;
903 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700904 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700905 .batch_size(batch_size)
906 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700907 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700908 }
909 }
910#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
911
912
913#if XNN_ARCH_ARM || XNN_ARCH_ARM64
914 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X8, batch_eq_8) {
915 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700916 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700917 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700918 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700919 }
920
921 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X8, batch_div_8) {
922 TEST_REQUIRES_ARM_NEON_FMA;
923 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700924 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700925 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700926 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700927 }
928 }
929
930 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X8, batch_lt_8) {
931 TEST_REQUIRES_ARM_NEON_FMA;
932 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700933 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700934 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700935 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700936 }
937 }
938
939 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X8, batch_gt_8) {
940 TEST_REQUIRES_ARM_NEON_FMA;
941 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700942 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700943 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700944 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700945 }
946 }
947
948 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X8, inplace) {
949 TEST_REQUIRES_ARM_NEON_FMA;
950 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700951 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700952 .batch_size(batch_size)
953 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700954 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700955 }
956 }
957#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
958
959
960#if XNN_ARCH_ARM || XNN_ARCH_ARM64
961 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X12, batch_eq_12) {
962 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700963 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700964 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700965 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700966 }
967
968 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X12, batch_div_12) {
969 TEST_REQUIRES_ARM_NEON_FMA;
970 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700971 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700972 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700973 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700974 }
975 }
976
977 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X12, batch_lt_12) {
978 TEST_REQUIRES_ARM_NEON_FMA;
979 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700980 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700981 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700982 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700983 }
984 }
985
986 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X12, batch_gt_12) {
987 TEST_REQUIRES_ARM_NEON_FMA;
988 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700989 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700990 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -0700991 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -0700992 }
993 }
994
995 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X12, inplace) {
996 TEST_REQUIRES_ARM_NEON_FMA;
997 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700998 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -0700999 .batch_size(batch_size)
1000 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001001 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001002 }
1003 }
1004#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1005
1006
1007#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1008 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X16, batch_eq_16) {
1009 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001010 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001011 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001012 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001013 }
1014
1015 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X16, batch_div_16) {
1016 TEST_REQUIRES_ARM_NEON_FMA;
1017 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001018 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001019 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001020 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001021 }
1022 }
1023
1024 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X16, batch_lt_16) {
1025 TEST_REQUIRES_ARM_NEON_FMA;
1026 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001027 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001028 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001029 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001030 }
1031 }
1032
1033 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X16, batch_gt_16) {
1034 TEST_REQUIRES_ARM_NEON_FMA;
1035 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001036 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001037 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001038 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001039 }
1040 }
1041
1042 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X16, inplace) {
1043 TEST_REQUIRES_ARM_NEON_FMA;
1044 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001045 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001046 .batch_size(batch_size)
1047 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001048 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001049 }
1050 }
1051#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1052
1053
1054#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1055 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X20, batch_eq_20) {
1056 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001057 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001058 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001059 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001060 }
1061
1062 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X20, batch_div_20) {
1063 TEST_REQUIRES_ARM_NEON_FMA;
1064 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001065 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001066 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001067 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001068 }
1069 }
1070
1071 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X20, batch_lt_20) {
1072 TEST_REQUIRES_ARM_NEON_FMA;
1073 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001074 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001075 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001076 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001077 }
1078 }
1079
1080 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X20, batch_gt_20) {
1081 TEST_REQUIRES_ARM_NEON_FMA;
1082 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001083 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001084 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001085 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001086 }
1087 }
1088
1089 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X20, inplace) {
1090 TEST_REQUIRES_ARM_NEON_FMA;
1091 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001092 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001093 .batch_size(batch_size)
1094 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001095 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001096 }
1097 }
1098#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1099
1100
1101#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1102 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X24, batch_eq_24) {
1103 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001104 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001105 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001106 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001107 }
1108
1109 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X24, batch_div_24) {
1110 TEST_REQUIRES_ARM_NEON_FMA;
1111 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001112 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001113 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001114 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001115 }
1116 }
1117
1118 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X24, batch_lt_24) {
1119 TEST_REQUIRES_ARM_NEON_FMA;
1120 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001121 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001122 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001123 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001124 }
1125 }
1126
1127 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X24, batch_gt_24) {
1128 TEST_REQUIRES_ARM_NEON_FMA;
1129 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001130 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001131 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001132 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001133 }
1134 }
1135
1136 TEST(F32_VSIGMOID__NEONFMA_RR1_P5_NR2RECPS_X24, inplace) {
1137 TEST_REQUIRES_ARM_NEON_FMA;
1138 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001139 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001140 .batch_size(batch_size)
1141 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001142 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001143 }
1144 }
1145#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1146
1147
1148#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1149 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X4, batch_eq_4) {
1150 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001151 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001152 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001153 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001154 }
1155
1156 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X4, batch_div_4) {
1157 TEST_REQUIRES_ARM_NEON;
1158 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001159 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001160 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001161 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001162 }
1163 }
1164
1165 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X4, batch_lt_4) {
1166 TEST_REQUIRES_ARM_NEON;
1167 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001168 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001169 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001170 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001171 }
1172 }
1173
1174 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X4, batch_gt_4) {
1175 TEST_REQUIRES_ARM_NEON;
1176 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001177 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001178 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001179 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001180 }
1181 }
1182
1183 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X4, inplace) {
1184 TEST_REQUIRES_ARM_NEON;
1185 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001186 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001187 .batch_size(batch_size)
1188 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001189 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001190 }
1191 }
1192#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1193
1194
1195#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1196 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X8, batch_eq_8) {
1197 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001198 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001199 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001200 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001201 }
1202
1203 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X8, batch_div_8) {
1204 TEST_REQUIRES_ARM_NEON;
1205 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001206 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001207 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001208 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001209 }
1210 }
1211
1212 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X8, batch_lt_8) {
1213 TEST_REQUIRES_ARM_NEON;
1214 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001215 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001216 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001217 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001218 }
1219 }
1220
1221 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X8, batch_gt_8) {
1222 TEST_REQUIRES_ARM_NEON;
1223 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001224 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001225 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001226 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001227 }
1228 }
1229
1230 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X8, inplace) {
1231 TEST_REQUIRES_ARM_NEON;
1232 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001233 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001234 .batch_size(batch_size)
1235 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001236 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001237 }
1238 }
1239#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1240
1241
1242#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1243 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X12, batch_eq_12) {
1244 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001245 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001246 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001247 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001248 }
1249
1250 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X12, batch_div_12) {
1251 TEST_REQUIRES_ARM_NEON;
1252 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001253 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001254 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001255 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001256 }
1257 }
1258
1259 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X12, batch_lt_12) {
1260 TEST_REQUIRES_ARM_NEON;
1261 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001262 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001263 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001264 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001265 }
1266 }
1267
1268 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X12, batch_gt_12) {
1269 TEST_REQUIRES_ARM_NEON;
1270 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001271 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001272 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001273 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001274 }
1275 }
1276
1277 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X12, inplace) {
1278 TEST_REQUIRES_ARM_NEON;
1279 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001280 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001281 .batch_size(batch_size)
1282 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001283 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001284 }
1285 }
1286#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1287
1288
1289#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1290 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X16, batch_eq_16) {
1291 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001292 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001293 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001294 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001295 }
1296
1297 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X16, batch_div_16) {
1298 TEST_REQUIRES_ARM_NEON;
1299 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001300 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001301 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001302 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001303 }
1304 }
1305
1306 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X16, batch_lt_16) {
1307 TEST_REQUIRES_ARM_NEON;
1308 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001309 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001310 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001311 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001312 }
1313 }
1314
1315 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X16, batch_gt_16) {
1316 TEST_REQUIRES_ARM_NEON;
1317 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001318 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001319 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001320 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001321 }
1322 }
1323
1324 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X16, inplace) {
1325 TEST_REQUIRES_ARM_NEON;
1326 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001327 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001328 .batch_size(batch_size)
1329 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001330 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001331 }
1332 }
1333#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1334
1335
1336#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1337 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X20, batch_eq_20) {
1338 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001339 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001340 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001341 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001342 }
1343
1344 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X20, batch_div_20) {
1345 TEST_REQUIRES_ARM_NEON;
1346 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001347 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001348 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001349 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001350 }
1351 }
1352
1353 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X20, batch_lt_20) {
1354 TEST_REQUIRES_ARM_NEON;
1355 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001356 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001357 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001358 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001359 }
1360 }
1361
1362 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X20, batch_gt_20) {
1363 TEST_REQUIRES_ARM_NEON;
1364 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001365 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001366 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001367 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001368 }
1369 }
1370
1371 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X20, inplace) {
1372 TEST_REQUIRES_ARM_NEON;
1373 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001374 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001375 .batch_size(batch_size)
1376 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001377 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001378 }
1379 }
1380#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1381
1382
1383#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1384 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X24, batch_eq_24) {
1385 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001386 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001387 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001388 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001389 }
1390
1391 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X24, batch_div_24) {
1392 TEST_REQUIRES_ARM_NEON;
1393 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001394 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001395 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001396 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001397 }
1398 }
1399
1400 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X24, batch_lt_24) {
1401 TEST_REQUIRES_ARM_NEON;
1402 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001403 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001404 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001405 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001406 }
1407 }
1408
1409 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X24, batch_gt_24) {
1410 TEST_REQUIRES_ARM_NEON;
1411 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001412 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001413 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001414 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001415 }
1416 }
1417
1418 TEST(F32_VSIGMOID__NEON_RR2_P5_NR2RECPS_X24, inplace) {
1419 TEST_REQUIRES_ARM_NEON;
1420 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001421 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001422 .batch_size(batch_size)
1423 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001424 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_p5_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001425 }
1426 }
1427#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1428
1429
1430#if XNN_ARCH_ARM64
1431 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X4, batch_eq_4) {
1432 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001433 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001434 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001435 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001436 }
1437
1438 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X4, batch_div_4) {
1439 TEST_REQUIRES_ARM_NEON_FMA;
1440 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001441 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001442 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001443 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001444 }
1445 }
1446
1447 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X4, batch_lt_4) {
1448 TEST_REQUIRES_ARM_NEON_FMA;
1449 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001450 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001451 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001452 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001453 }
1454 }
1455
1456 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X4, batch_gt_4) {
1457 TEST_REQUIRES_ARM_NEON_FMA;
1458 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001459 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001460 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001461 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001462 }
1463 }
1464
1465 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X4, inplace) {
1466 TEST_REQUIRES_ARM_NEON_FMA;
1467 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001468 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001469 .batch_size(batch_size)
1470 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001471 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001472 }
1473 }
1474#endif // XNN_ARCH_ARM64
1475
1476
1477#if XNN_ARCH_ARM64
1478 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X8, batch_eq_8) {
1479 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001480 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001481 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001482 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001483 }
1484
1485 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X8, batch_div_8) {
1486 TEST_REQUIRES_ARM_NEON_FMA;
1487 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001488 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001489 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001490 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001491 }
1492 }
1493
1494 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X8, batch_lt_8) {
1495 TEST_REQUIRES_ARM_NEON_FMA;
1496 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001497 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001498 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001499 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001500 }
1501 }
1502
1503 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X8, batch_gt_8) {
1504 TEST_REQUIRES_ARM_NEON_FMA;
1505 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001506 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001507 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001508 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001509 }
1510 }
1511
1512 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X8, inplace) {
1513 TEST_REQUIRES_ARM_NEON_FMA;
1514 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001515 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001516 .batch_size(batch_size)
1517 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001518 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001519 }
1520 }
1521#endif // XNN_ARCH_ARM64
1522
1523
1524#if XNN_ARCH_ARM64
1525 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X12, batch_eq_12) {
1526 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001527 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001528 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001529 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001530 }
1531
1532 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X12, batch_div_12) {
1533 TEST_REQUIRES_ARM_NEON_FMA;
1534 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001535 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001536 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001537 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001538 }
1539 }
1540
1541 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X12, batch_lt_12) {
1542 TEST_REQUIRES_ARM_NEON_FMA;
1543 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001544 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001545 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001546 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001547 }
1548 }
1549
1550 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X12, batch_gt_12) {
1551 TEST_REQUIRES_ARM_NEON_FMA;
1552 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001553 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001554 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001555 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001556 }
1557 }
1558
1559 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X12, inplace) {
1560 TEST_REQUIRES_ARM_NEON_FMA;
1561 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001562 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001563 .batch_size(batch_size)
1564 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001565 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001566 }
1567 }
1568#endif // XNN_ARCH_ARM64
1569
1570
1571#if XNN_ARCH_ARM64
1572 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X16, batch_eq_16) {
1573 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001574 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001575 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001576 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001577 }
1578
1579 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X16, batch_div_16) {
1580 TEST_REQUIRES_ARM_NEON_FMA;
1581 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001582 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001583 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001584 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001585 }
1586 }
1587
1588 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X16, batch_lt_16) {
1589 TEST_REQUIRES_ARM_NEON_FMA;
1590 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001591 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001592 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001593 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001594 }
1595 }
1596
1597 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X16, batch_gt_16) {
1598 TEST_REQUIRES_ARM_NEON_FMA;
1599 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001600 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001601 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001602 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001603 }
1604 }
1605
1606 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X16, inplace) {
1607 TEST_REQUIRES_ARM_NEON_FMA;
1608 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001609 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001610 .batch_size(batch_size)
1611 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001612 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001613 }
1614 }
1615#endif // XNN_ARCH_ARM64
1616
1617
1618#if XNN_ARCH_ARM64
1619 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X20, batch_eq_20) {
1620 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001621 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001622 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001623 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001624 }
1625
1626 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X20, batch_div_20) {
1627 TEST_REQUIRES_ARM_NEON_FMA;
1628 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001629 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001630 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001631 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001632 }
1633 }
1634
1635 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X20, batch_lt_20) {
1636 TEST_REQUIRES_ARM_NEON_FMA;
1637 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001638 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001639 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001640 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001641 }
1642 }
1643
1644 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X20, batch_gt_20) {
1645 TEST_REQUIRES_ARM_NEON_FMA;
1646 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001647 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001648 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001649 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001650 }
1651 }
1652
1653 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X20, inplace) {
1654 TEST_REQUIRES_ARM_NEON_FMA;
1655 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001656 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001657 .batch_size(batch_size)
1658 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001659 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001660 }
1661 }
1662#endif // XNN_ARCH_ARM64
1663
1664
1665#if XNN_ARCH_ARM64
1666 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X24, batch_eq_24) {
1667 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001668 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001669 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001670 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001671 }
1672
1673 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X24, batch_div_24) {
1674 TEST_REQUIRES_ARM_NEON_FMA;
1675 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001676 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001677 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001678 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001679 }
1680 }
1681
1682 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X24, batch_lt_24) {
1683 TEST_REQUIRES_ARM_NEON_FMA;
1684 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001685 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001686 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001687 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001688 }
1689 }
1690
1691 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X24, batch_gt_24) {
1692 TEST_REQUIRES_ARM_NEON_FMA;
1693 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001694 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001695 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001696 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001697 }
1698 }
1699
1700 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_DIV_X24, inplace) {
1701 TEST_REQUIRES_ARM_NEON_FMA;
1702 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001703 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001704 .batch_size(batch_size)
1705 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001706 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001707 }
1708 }
1709#endif // XNN_ARCH_ARM64
1710
1711
1712#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1713 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X4, batch_eq_4) {
1714 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001715 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001716 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001717 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001718 }
1719
1720 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X4, batch_div_4) {
1721 TEST_REQUIRES_ARM_NEON_FMA;
1722 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001723 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001724 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001725 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001726 }
1727 }
1728
1729 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X4, batch_lt_4) {
1730 TEST_REQUIRES_ARM_NEON_FMA;
1731 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001732 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001733 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001734 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001735 }
1736 }
1737
1738 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X4, batch_gt_4) {
1739 TEST_REQUIRES_ARM_NEON_FMA;
1740 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001741 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001742 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001743 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001744 }
1745 }
1746
1747 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X4, inplace) {
1748 TEST_REQUIRES_ARM_NEON_FMA;
1749 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001750 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001751 .batch_size(batch_size)
1752 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001753 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001754 }
1755 }
1756#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1757
1758
1759#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1760 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X8, batch_eq_8) {
1761 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001762 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001763 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001764 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001765 }
1766
1767 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X8, batch_div_8) {
1768 TEST_REQUIRES_ARM_NEON_FMA;
1769 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001770 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001771 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001772 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001773 }
1774 }
1775
1776 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X8, batch_lt_8) {
1777 TEST_REQUIRES_ARM_NEON_FMA;
1778 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001779 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001780 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001781 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001782 }
1783 }
1784
1785 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X8, batch_gt_8) {
1786 TEST_REQUIRES_ARM_NEON_FMA;
1787 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001788 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001789 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001790 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001791 }
1792 }
1793
1794 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X8, inplace) {
1795 TEST_REQUIRES_ARM_NEON_FMA;
1796 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001797 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001798 .batch_size(batch_size)
1799 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001800 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001801 }
1802 }
1803#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1804
1805
1806#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1807 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X12, batch_eq_12) {
1808 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001809 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001810 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001811 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001812 }
1813
1814 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X12, batch_div_12) {
1815 TEST_REQUIRES_ARM_NEON_FMA;
1816 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001817 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001818 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001819 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001820 }
1821 }
1822
1823 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X12, batch_lt_12) {
1824 TEST_REQUIRES_ARM_NEON_FMA;
1825 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001826 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001827 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001828 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001829 }
1830 }
1831
1832 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X12, batch_gt_12) {
1833 TEST_REQUIRES_ARM_NEON_FMA;
1834 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001835 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001836 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001837 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001838 }
1839 }
1840
1841 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X12, inplace) {
1842 TEST_REQUIRES_ARM_NEON_FMA;
1843 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001844 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001845 .batch_size(batch_size)
1846 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001847 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001848 }
1849 }
1850#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1851
1852
1853#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1854 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X16, batch_eq_16) {
1855 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001856 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001857 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001858 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001859 }
1860
1861 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X16, batch_div_16) {
1862 TEST_REQUIRES_ARM_NEON_FMA;
1863 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001864 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001865 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001866 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001867 }
1868 }
1869
1870 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X16, batch_lt_16) {
1871 TEST_REQUIRES_ARM_NEON_FMA;
1872 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001873 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001874 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001875 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001876 }
1877 }
1878
1879 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X16, batch_gt_16) {
1880 TEST_REQUIRES_ARM_NEON_FMA;
1881 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001882 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001883 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001884 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001885 }
1886 }
1887
1888 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X16, inplace) {
1889 TEST_REQUIRES_ARM_NEON_FMA;
1890 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001891 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001892 .batch_size(batch_size)
1893 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001894 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001895 }
1896 }
1897#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1898
1899
1900#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1901 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X20, batch_eq_20) {
1902 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001903 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001904 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001905 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001906 }
1907
1908 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X20, batch_div_20) {
1909 TEST_REQUIRES_ARM_NEON_FMA;
1910 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001911 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001912 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001913 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001914 }
1915 }
1916
1917 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X20, batch_lt_20) {
1918 TEST_REQUIRES_ARM_NEON_FMA;
1919 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001920 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001921 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001922 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001923 }
1924 }
1925
1926 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X20, batch_gt_20) {
1927 TEST_REQUIRES_ARM_NEON_FMA;
1928 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001929 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001930 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001931 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001932 }
1933 }
1934
1935 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X20, inplace) {
1936 TEST_REQUIRES_ARM_NEON_FMA;
1937 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001938 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001939 .batch_size(batch_size)
1940 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001941 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001942 }
1943 }
1944#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1945
1946
1947#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1948 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X24, batch_eq_24) {
1949 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001950 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001951 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001952 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001953 }
1954
1955 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X24, batch_div_24) {
1956 TEST_REQUIRES_ARM_NEON_FMA;
1957 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001958 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001959 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001960 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001961 }
1962 }
1963
1964 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X24, batch_lt_24) {
1965 TEST_REQUIRES_ARM_NEON_FMA;
1966 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001967 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001968 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001969 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001970 }
1971 }
1972
1973 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X24, batch_gt_24) {
1974 TEST_REQUIRES_ARM_NEON_FMA;
1975 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001976 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001977 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001978 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001979 }
1980 }
1981
1982 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2FMA_X24, inplace) {
1983 TEST_REQUIRES_ARM_NEON_FMA;
1984 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001985 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001986 .batch_size(batch_size)
1987 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001988 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07001989 }
1990 }
1991#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1992
1993
1994#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1995 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X4, batch_eq_4) {
1996 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07001997 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07001998 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07001999 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002000 }
2001
2002 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X4, batch_div_4) {
2003 TEST_REQUIRES_ARM_NEON_FMA;
2004 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002005 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002006 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002007 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002008 }
2009 }
2010
2011 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X4, batch_lt_4) {
2012 TEST_REQUIRES_ARM_NEON_FMA;
2013 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002014 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002015 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002016 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002017 }
2018 }
2019
2020 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X4, batch_gt_4) {
2021 TEST_REQUIRES_ARM_NEON_FMA;
2022 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002023 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002024 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002025 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002026 }
2027 }
2028
2029 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X4, inplace) {
2030 TEST_REQUIRES_ARM_NEON_FMA;
2031 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002032 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002033 .batch_size(batch_size)
2034 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002035 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002036 }
2037 }
2038#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2039
2040
2041#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2042 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X8, batch_eq_8) {
2043 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002044 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002045 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002046 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002047 }
2048
2049 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X8, batch_div_8) {
2050 TEST_REQUIRES_ARM_NEON_FMA;
2051 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002052 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002053 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002054 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002055 }
2056 }
2057
2058 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X8, batch_lt_8) {
2059 TEST_REQUIRES_ARM_NEON_FMA;
2060 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002061 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002062 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002063 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002064 }
2065 }
2066
2067 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X8, batch_gt_8) {
2068 TEST_REQUIRES_ARM_NEON_FMA;
2069 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002070 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002071 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002072 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002073 }
2074 }
2075
2076 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X8, inplace) {
2077 TEST_REQUIRES_ARM_NEON_FMA;
2078 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002079 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002080 .batch_size(batch_size)
2081 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002082 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002083 }
2084 }
2085#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2086
2087
2088#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2089 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X12, batch_eq_12) {
2090 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002091 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002092 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002093 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002094 }
2095
2096 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X12, batch_div_12) {
2097 TEST_REQUIRES_ARM_NEON_FMA;
2098 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002099 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002100 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002101 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002102 }
2103 }
2104
2105 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X12, batch_lt_12) {
2106 TEST_REQUIRES_ARM_NEON_FMA;
2107 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002108 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002109 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002110 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002111 }
2112 }
2113
2114 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X12, batch_gt_12) {
2115 TEST_REQUIRES_ARM_NEON_FMA;
2116 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002117 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002118 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002119 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002120 }
2121 }
2122
2123 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X12, inplace) {
2124 TEST_REQUIRES_ARM_NEON_FMA;
2125 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002126 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002127 .batch_size(batch_size)
2128 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002129 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002130 }
2131 }
2132#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2133
2134
2135#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2136 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X16, batch_eq_16) {
2137 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002138 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002139 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002140 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002141 }
2142
2143 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X16, batch_div_16) {
2144 TEST_REQUIRES_ARM_NEON_FMA;
2145 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002146 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002147 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002148 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002149 }
2150 }
2151
2152 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X16, batch_lt_16) {
2153 TEST_REQUIRES_ARM_NEON_FMA;
2154 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002155 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002156 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002157 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002158 }
2159 }
2160
2161 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X16, batch_gt_16) {
2162 TEST_REQUIRES_ARM_NEON_FMA;
2163 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002164 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002165 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002166 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002167 }
2168 }
2169
2170 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X16, inplace) {
2171 TEST_REQUIRES_ARM_NEON_FMA;
2172 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002173 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002174 .batch_size(batch_size)
2175 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002176 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002177 }
2178 }
2179#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2180
2181
2182#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2183 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X20, batch_eq_20) {
2184 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002185 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002186 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002187 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002188 }
2189
2190 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X20, batch_div_20) {
2191 TEST_REQUIRES_ARM_NEON_FMA;
2192 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002193 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002194 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002195 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002196 }
2197 }
2198
2199 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X20, batch_lt_20) {
2200 TEST_REQUIRES_ARM_NEON_FMA;
2201 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002202 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002203 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002204 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002205 }
2206 }
2207
2208 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X20, batch_gt_20) {
2209 TEST_REQUIRES_ARM_NEON_FMA;
2210 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002211 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002212 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002213 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002214 }
2215 }
2216
2217 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X20, inplace) {
2218 TEST_REQUIRES_ARM_NEON_FMA;
2219 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002220 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002221 .batch_size(batch_size)
2222 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002223 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002224 }
2225 }
2226#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2227
2228
2229#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2230 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X24, batch_eq_24) {
2231 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002232 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002233 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002234 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002235 }
2236
2237 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X24, batch_div_24) {
2238 TEST_REQUIRES_ARM_NEON_FMA;
2239 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002240 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002241 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002242 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002243 }
2244 }
2245
2246 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X24, batch_lt_24) {
2247 TEST_REQUIRES_ARM_NEON_FMA;
2248 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002249 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002250 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002251 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002252 }
2253 }
2254
2255 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X24, batch_gt_24) {
2256 TEST_REQUIRES_ARM_NEON_FMA;
2257 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002258 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002259 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002260 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002261 }
2262 }
2263
2264 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR1RECPS1FMA_X24, inplace) {
2265 TEST_REQUIRES_ARM_NEON_FMA;
2266 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002267 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002268 .batch_size(batch_size)
2269 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002270 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002271 }
2272 }
2273#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2274
2275
2276#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2277 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X4, batch_eq_4) {
2278 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002279 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002280 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002281 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002282 }
2283
2284 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X4, batch_div_4) {
2285 TEST_REQUIRES_ARM_NEON_FMA;
2286 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002287 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002288 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002289 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002290 }
2291 }
2292
2293 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X4, batch_lt_4) {
2294 TEST_REQUIRES_ARM_NEON_FMA;
2295 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002296 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002297 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002298 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002299 }
2300 }
2301
2302 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X4, batch_gt_4) {
2303 TEST_REQUIRES_ARM_NEON_FMA;
2304 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002305 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002306 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002307 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002308 }
2309 }
2310
2311 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X4, inplace) {
2312 TEST_REQUIRES_ARM_NEON_FMA;
2313 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002314 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002315 .batch_size(batch_size)
2316 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002317 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002318 }
2319 }
2320#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2321
2322
2323#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2324 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X8, batch_eq_8) {
2325 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002326 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002327 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002328 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002329 }
2330
2331 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X8, batch_div_8) {
2332 TEST_REQUIRES_ARM_NEON_FMA;
2333 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002334 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002335 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002336 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002337 }
2338 }
2339
2340 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X8, batch_lt_8) {
2341 TEST_REQUIRES_ARM_NEON_FMA;
2342 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002343 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002344 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002345 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002346 }
2347 }
2348
2349 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X8, batch_gt_8) {
2350 TEST_REQUIRES_ARM_NEON_FMA;
2351 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002352 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002353 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002354 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002355 }
2356 }
2357
2358 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X8, inplace) {
2359 TEST_REQUIRES_ARM_NEON_FMA;
2360 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002361 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002362 .batch_size(batch_size)
2363 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002364 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002365 }
2366 }
2367#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2368
2369
2370#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2371 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X12, batch_eq_12) {
2372 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002373 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002374 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002375 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002376 }
2377
2378 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X12, batch_div_12) {
2379 TEST_REQUIRES_ARM_NEON_FMA;
2380 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002381 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002382 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002383 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002384 }
2385 }
2386
2387 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X12, batch_lt_12) {
2388 TEST_REQUIRES_ARM_NEON_FMA;
2389 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002390 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002391 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002392 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002393 }
2394 }
2395
2396 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X12, batch_gt_12) {
2397 TEST_REQUIRES_ARM_NEON_FMA;
2398 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002399 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002400 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002401 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002402 }
2403 }
2404
2405 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X12, inplace) {
2406 TEST_REQUIRES_ARM_NEON_FMA;
2407 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002408 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002409 .batch_size(batch_size)
2410 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002411 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002412 }
2413 }
2414#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2415
2416
2417#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2418 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X16, batch_eq_16) {
2419 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002420 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002421 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002422 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002423 }
2424
2425 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X16, batch_div_16) {
2426 TEST_REQUIRES_ARM_NEON_FMA;
2427 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002428 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002429 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002430 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002431 }
2432 }
2433
2434 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X16, batch_lt_16) {
2435 TEST_REQUIRES_ARM_NEON_FMA;
2436 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002437 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002438 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002439 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002440 }
2441 }
2442
2443 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X16, batch_gt_16) {
2444 TEST_REQUIRES_ARM_NEON_FMA;
2445 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002446 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002447 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002448 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002449 }
2450 }
2451
2452 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X16, inplace) {
2453 TEST_REQUIRES_ARM_NEON_FMA;
2454 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002455 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002456 .batch_size(batch_size)
2457 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002458 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002459 }
2460 }
2461#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2462
2463
2464#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2465 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X20, batch_eq_20) {
2466 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002467 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002468 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002469 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002470 }
2471
2472 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X20, batch_div_20) {
2473 TEST_REQUIRES_ARM_NEON_FMA;
2474 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002475 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002476 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002477 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002478 }
2479 }
2480
2481 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X20, batch_lt_20) {
2482 TEST_REQUIRES_ARM_NEON_FMA;
2483 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002484 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002485 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002486 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002487 }
2488 }
2489
2490 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X20, batch_gt_20) {
2491 TEST_REQUIRES_ARM_NEON_FMA;
2492 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002493 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002494 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002495 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002496 }
2497 }
2498
2499 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X20, inplace) {
2500 TEST_REQUIRES_ARM_NEON_FMA;
2501 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002502 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002503 .batch_size(batch_size)
2504 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002505 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002506 }
2507 }
2508#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2509
2510
2511#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2512 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X24, batch_eq_24) {
2513 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002514 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002515 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002516 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002517 }
2518
2519 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X24, batch_div_24) {
2520 TEST_REQUIRES_ARM_NEON_FMA;
2521 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002522 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002523 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002524 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002525 }
2526 }
2527
2528 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X24, batch_lt_24) {
2529 TEST_REQUIRES_ARM_NEON_FMA;
2530 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002531 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002532 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002533 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002534 }
2535 }
2536
2537 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X24, batch_gt_24) {
2538 TEST_REQUIRES_ARM_NEON_FMA;
2539 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002540 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002541 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002542 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002543 }
2544 }
2545
2546 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT64_P2_NR2RECPS_X24, inplace) {
2547 TEST_REQUIRES_ARM_NEON_FMA;
2548 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002549 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002550 .batch_size(batch_size)
2551 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002552 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002553 }
2554 }
2555#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2556
2557
2558#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2559 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X4, batch_eq_4) {
2560 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002561 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002562 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002563 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002564 }
2565
2566 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X4, batch_div_4) {
2567 TEST_REQUIRES_ARM_NEON;
2568 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002569 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002570 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002571 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002572 }
2573 }
2574
2575 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X4, batch_lt_4) {
2576 TEST_REQUIRES_ARM_NEON;
2577 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002578 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002579 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002580 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002581 }
2582 }
2583
2584 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X4, batch_gt_4) {
2585 TEST_REQUIRES_ARM_NEON;
2586 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002587 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002588 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002589 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002590 }
2591 }
2592
2593 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X4, inplace) {
2594 TEST_REQUIRES_ARM_NEON;
2595 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002596 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002597 .batch_size(batch_size)
2598 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002599 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002600 }
2601 }
2602#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2603
2604
2605#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2606 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X8, batch_eq_8) {
2607 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002608 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002609 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002610 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002611 }
2612
2613 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X8, batch_div_8) {
2614 TEST_REQUIRES_ARM_NEON;
2615 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002616 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002617 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002618 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002619 }
2620 }
2621
2622 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X8, batch_lt_8) {
2623 TEST_REQUIRES_ARM_NEON;
2624 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002625 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002626 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002627 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002628 }
2629 }
2630
2631 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X8, batch_gt_8) {
2632 TEST_REQUIRES_ARM_NEON;
2633 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002634 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002635 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002636 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002637 }
2638 }
2639
2640 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X8, inplace) {
2641 TEST_REQUIRES_ARM_NEON;
2642 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002643 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002644 .batch_size(batch_size)
2645 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002646 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002647 }
2648 }
2649#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2650
2651
2652#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2653 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X12, batch_eq_12) {
2654 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002655 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002656 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002657 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002658 }
2659
2660 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X12, batch_div_12) {
2661 TEST_REQUIRES_ARM_NEON;
2662 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002663 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002664 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002665 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002666 }
2667 }
2668
2669 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X12, batch_lt_12) {
2670 TEST_REQUIRES_ARM_NEON;
2671 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002672 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002673 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002674 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002675 }
2676 }
2677
2678 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X12, batch_gt_12) {
2679 TEST_REQUIRES_ARM_NEON;
2680 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002681 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002682 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002683 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002684 }
2685 }
2686
2687 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X12, inplace) {
2688 TEST_REQUIRES_ARM_NEON;
2689 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002690 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002691 .batch_size(batch_size)
2692 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002693 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002694 }
2695 }
2696#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2697
2698
2699#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2700 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X16, batch_eq_16) {
2701 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002702 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002703 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002704 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002705 }
2706
2707 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X16, batch_div_16) {
2708 TEST_REQUIRES_ARM_NEON;
2709 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002710 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002711 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002712 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002713 }
2714 }
2715
2716 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X16, batch_lt_16) {
2717 TEST_REQUIRES_ARM_NEON;
2718 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002719 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002720 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002721 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002722 }
2723 }
2724
2725 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X16, batch_gt_16) {
2726 TEST_REQUIRES_ARM_NEON;
2727 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002728 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002729 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002730 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002731 }
2732 }
2733
2734 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X16, inplace) {
2735 TEST_REQUIRES_ARM_NEON;
2736 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002737 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002738 .batch_size(batch_size)
2739 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002740 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002741 }
2742 }
2743#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2744
2745
2746#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2747 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X20, batch_eq_20) {
2748 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002749 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002750 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002751 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002752 }
2753
2754 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X20, batch_div_20) {
2755 TEST_REQUIRES_ARM_NEON;
2756 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002757 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002758 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002759 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002760 }
2761 }
2762
2763 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X20, batch_lt_20) {
2764 TEST_REQUIRES_ARM_NEON;
2765 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002766 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002767 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002768 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002769 }
2770 }
2771
2772 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X20, batch_gt_20) {
2773 TEST_REQUIRES_ARM_NEON;
2774 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002775 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002776 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002777 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002778 }
2779 }
2780
2781 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X20, inplace) {
2782 TEST_REQUIRES_ARM_NEON;
2783 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002784 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002785 .batch_size(batch_size)
2786 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002787 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002788 }
2789 }
2790#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2791
2792
2793#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2794 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X24, batch_eq_24) {
2795 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002796 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002797 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002798 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002799 }
2800
2801 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X24, batch_div_24) {
2802 TEST_REQUIRES_ARM_NEON;
2803 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002804 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002805 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002806 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002807 }
2808 }
2809
2810 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X24, batch_lt_24) {
2811 TEST_REQUIRES_ARM_NEON;
2812 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002813 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002814 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002815 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002816 }
2817 }
2818
2819 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X24, batch_gt_24) {
2820 TEST_REQUIRES_ARM_NEON;
2821 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002822 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002823 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002824 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002825 }
2826 }
2827
2828 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X24, inplace) {
2829 TEST_REQUIRES_ARM_NEON;
2830 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002831 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002832 .batch_size(batch_size)
2833 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002834 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002835 }
2836 }
2837#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2838
2839
2840#if XNN_ARCH_ARM64
2841 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X4, batch_eq_4) {
2842 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002843 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002844 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002845 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002846 }
2847
2848 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X4, batch_div_4) {
2849 TEST_REQUIRES_ARM_NEON_FMA;
2850 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002851 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002852 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002853 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002854 }
2855 }
2856
2857 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X4, batch_lt_4) {
2858 TEST_REQUIRES_ARM_NEON_FMA;
2859 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002860 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002861 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002862 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002863 }
2864 }
2865
2866 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X4, batch_gt_4) {
2867 TEST_REQUIRES_ARM_NEON_FMA;
2868 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002869 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002870 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002871 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002872 }
2873 }
2874
2875 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X4, inplace) {
2876 TEST_REQUIRES_ARM_NEON_FMA;
2877 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002878 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002879 .batch_size(batch_size)
2880 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002881 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002882 }
2883 }
2884#endif // XNN_ARCH_ARM64
2885
2886
2887#if XNN_ARCH_ARM64
2888 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X8, batch_eq_8) {
2889 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002890 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002891 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002892 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002893 }
2894
2895 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X8, batch_div_8) {
2896 TEST_REQUIRES_ARM_NEON_FMA;
2897 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002898 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002899 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002900 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002901 }
2902 }
2903
2904 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X8, batch_lt_8) {
2905 TEST_REQUIRES_ARM_NEON_FMA;
2906 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002907 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002908 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002909 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002910 }
2911 }
2912
2913 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X8, batch_gt_8) {
2914 TEST_REQUIRES_ARM_NEON_FMA;
2915 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002916 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002917 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002918 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002919 }
2920 }
2921
2922 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X8, inplace) {
2923 TEST_REQUIRES_ARM_NEON_FMA;
2924 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002925 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002926 .batch_size(batch_size)
2927 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002928 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002929 }
2930 }
2931#endif // XNN_ARCH_ARM64
2932
2933
2934#if XNN_ARCH_ARM64
2935 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X12, batch_eq_12) {
2936 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002937 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002938 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002939 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002940 }
2941
2942 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X12, batch_div_12) {
2943 TEST_REQUIRES_ARM_NEON_FMA;
2944 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002945 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002946 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002947 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002948 }
2949 }
2950
2951 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X12, batch_lt_12) {
2952 TEST_REQUIRES_ARM_NEON_FMA;
2953 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002954 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002955 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002956 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002957 }
2958 }
2959
2960 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X12, batch_gt_12) {
2961 TEST_REQUIRES_ARM_NEON_FMA;
2962 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002963 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002964 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002965 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002966 }
2967 }
2968
2969 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X12, inplace) {
2970 TEST_REQUIRES_ARM_NEON_FMA;
2971 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002972 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002973 .batch_size(batch_size)
2974 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002975 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002976 }
2977 }
2978#endif // XNN_ARCH_ARM64
2979
2980
2981#if XNN_ARCH_ARM64
2982 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X16, batch_eq_16) {
2983 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002984 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002985 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002986 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002987 }
2988
2989 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X16, batch_div_16) {
2990 TEST_REQUIRES_ARM_NEON_FMA;
2991 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07002992 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07002993 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07002994 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07002995 }
2996 }
2997
2998 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X16, batch_lt_16) {
2999 TEST_REQUIRES_ARM_NEON_FMA;
3000 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003001 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003002 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003003 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003004 }
3005 }
3006
3007 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X16, batch_gt_16) {
3008 TEST_REQUIRES_ARM_NEON_FMA;
3009 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003010 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003011 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003012 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003013 }
3014 }
3015
3016 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X16, inplace) {
3017 TEST_REQUIRES_ARM_NEON_FMA;
3018 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003019 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003020 .batch_size(batch_size)
3021 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003022 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003023 }
3024 }
3025#endif // XNN_ARCH_ARM64
3026
3027
3028#if XNN_ARCH_ARM64
3029 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X20, batch_eq_20) {
3030 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003031 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003032 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003033 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003034 }
3035
3036 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X20, batch_div_20) {
3037 TEST_REQUIRES_ARM_NEON_FMA;
3038 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003039 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003040 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003041 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003042 }
3043 }
3044
3045 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X20, batch_lt_20) {
3046 TEST_REQUIRES_ARM_NEON_FMA;
3047 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003048 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003049 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003050 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003051 }
3052 }
3053
3054 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X20, batch_gt_20) {
3055 TEST_REQUIRES_ARM_NEON_FMA;
3056 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003057 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003058 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003059 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003060 }
3061 }
3062
3063 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X20, inplace) {
3064 TEST_REQUIRES_ARM_NEON_FMA;
3065 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003066 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003067 .batch_size(batch_size)
3068 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003069 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003070 }
3071 }
3072#endif // XNN_ARCH_ARM64
3073
3074
3075#if XNN_ARCH_ARM64
3076 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X24, batch_eq_24) {
3077 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003078 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003079 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003080 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003081 }
3082
3083 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X24, batch_div_24) {
3084 TEST_REQUIRES_ARM_NEON_FMA;
3085 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003086 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003087 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003088 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003089 }
3090 }
3091
3092 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X24, batch_lt_24) {
3093 TEST_REQUIRES_ARM_NEON_FMA;
3094 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003095 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003096 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003097 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003098 }
3099 }
3100
3101 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X24, batch_gt_24) {
3102 TEST_REQUIRES_ARM_NEON_FMA;
3103 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003104 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003105 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003106 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003107 }
3108 }
3109
3110 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_DIV_X24, inplace) {
3111 TEST_REQUIRES_ARM_NEON_FMA;
3112 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003113 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003114 .batch_size(batch_size)
3115 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003116 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003117 }
3118 }
3119#endif // XNN_ARCH_ARM64
3120
3121
3122#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3123 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X4, batch_eq_4) {
3124 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003125 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003126 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003127 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003128 }
3129
3130 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X4, batch_div_4) {
3131 TEST_REQUIRES_ARM_NEON_FMA;
3132 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003133 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003134 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003135 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003136 }
3137 }
3138
3139 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X4, batch_lt_4) {
3140 TEST_REQUIRES_ARM_NEON_FMA;
3141 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003142 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003143 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003144 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003145 }
3146 }
3147
3148 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X4, batch_gt_4) {
3149 TEST_REQUIRES_ARM_NEON_FMA;
3150 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003151 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003152 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003153 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003154 }
3155 }
3156
3157 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X4, inplace) {
3158 TEST_REQUIRES_ARM_NEON_FMA;
3159 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003160 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003161 .batch_size(batch_size)
3162 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003163 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003164 }
3165 }
3166#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3167
3168
3169#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3170 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X8, batch_eq_8) {
3171 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003172 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003173 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003174 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003175 }
3176
3177 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X8, batch_div_8) {
3178 TEST_REQUIRES_ARM_NEON_FMA;
3179 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003180 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003181 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003182 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003183 }
3184 }
3185
3186 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X8, batch_lt_8) {
3187 TEST_REQUIRES_ARM_NEON_FMA;
3188 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003189 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003190 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003191 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003192 }
3193 }
3194
3195 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X8, batch_gt_8) {
3196 TEST_REQUIRES_ARM_NEON_FMA;
3197 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003198 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003199 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003200 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003201 }
3202 }
3203
3204 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X8, inplace) {
3205 TEST_REQUIRES_ARM_NEON_FMA;
3206 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003207 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003208 .batch_size(batch_size)
3209 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003210 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003211 }
3212 }
3213#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3214
3215
3216#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3217 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X12, batch_eq_12) {
3218 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003219 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003220 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003221 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003222 }
3223
3224 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X12, batch_div_12) {
3225 TEST_REQUIRES_ARM_NEON_FMA;
3226 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003227 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003228 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003229 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003230 }
3231 }
3232
3233 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X12, batch_lt_12) {
3234 TEST_REQUIRES_ARM_NEON_FMA;
3235 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003236 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003237 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003238 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003239 }
3240 }
3241
3242 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X12, batch_gt_12) {
3243 TEST_REQUIRES_ARM_NEON_FMA;
3244 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003245 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003246 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003247 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003248 }
3249 }
3250
3251 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X12, inplace) {
3252 TEST_REQUIRES_ARM_NEON_FMA;
3253 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003254 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003255 .batch_size(batch_size)
3256 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003257 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003258 }
3259 }
3260#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3261
3262
3263#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3264 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X16, batch_eq_16) {
3265 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003266 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003267 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003268 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003269 }
3270
3271 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X16, batch_div_16) {
3272 TEST_REQUIRES_ARM_NEON_FMA;
3273 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003274 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003275 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003276 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003277 }
3278 }
3279
3280 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X16, batch_lt_16) {
3281 TEST_REQUIRES_ARM_NEON_FMA;
3282 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003283 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003284 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003285 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003286 }
3287 }
3288
3289 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X16, batch_gt_16) {
3290 TEST_REQUIRES_ARM_NEON_FMA;
3291 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003292 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003293 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003294 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003295 }
3296 }
3297
3298 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X16, inplace) {
3299 TEST_REQUIRES_ARM_NEON_FMA;
3300 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003301 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003302 .batch_size(batch_size)
3303 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003304 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003305 }
3306 }
3307#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3308
3309
3310#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3311 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X20, batch_eq_20) {
3312 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003313 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003314 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003315 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003316 }
3317
3318 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X20, batch_div_20) {
3319 TEST_REQUIRES_ARM_NEON_FMA;
3320 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003321 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003322 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003323 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003324 }
3325 }
3326
3327 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X20, batch_lt_20) {
3328 TEST_REQUIRES_ARM_NEON_FMA;
3329 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003330 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003331 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003332 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003333 }
3334 }
3335
3336 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X20, batch_gt_20) {
3337 TEST_REQUIRES_ARM_NEON_FMA;
3338 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003339 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003340 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003341 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003342 }
3343 }
3344
3345 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X20, inplace) {
3346 TEST_REQUIRES_ARM_NEON_FMA;
3347 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003348 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003349 .batch_size(batch_size)
3350 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003351 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003352 }
3353 }
3354#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3355
3356
3357#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3358 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X24, batch_eq_24) {
3359 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003360 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003361 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003362 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003363 }
3364
3365 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X24, batch_div_24) {
3366 TEST_REQUIRES_ARM_NEON_FMA;
3367 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003368 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003369 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003370 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003371 }
3372 }
3373
3374 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X24, batch_lt_24) {
3375 TEST_REQUIRES_ARM_NEON_FMA;
3376 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003377 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003378 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003379 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003380 }
3381 }
3382
3383 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X24, batch_gt_24) {
3384 TEST_REQUIRES_ARM_NEON_FMA;
3385 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003386 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003387 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003388 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003389 }
3390 }
3391
3392 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2FMA_X24, inplace) {
3393 TEST_REQUIRES_ARM_NEON_FMA;
3394 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003395 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003396 .batch_size(batch_size)
3397 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003398 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003399 }
3400 }
3401#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3402
3403
3404#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3405 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X4, batch_eq_4) {
3406 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003407 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003408 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003409 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003410 }
3411
3412 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X4, batch_div_4) {
3413 TEST_REQUIRES_ARM_NEON_FMA;
3414 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003415 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003416 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003417 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003418 }
3419 }
3420
3421 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X4, batch_lt_4) {
3422 TEST_REQUIRES_ARM_NEON_FMA;
3423 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003424 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003425 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003426 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003427 }
3428 }
3429
3430 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X4, batch_gt_4) {
3431 TEST_REQUIRES_ARM_NEON_FMA;
3432 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003433 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003434 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003435 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003436 }
3437 }
3438
3439 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X4, inplace) {
3440 TEST_REQUIRES_ARM_NEON_FMA;
3441 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003442 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003443 .batch_size(batch_size)
3444 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003445 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003446 }
3447 }
3448#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3449
3450
3451#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3452 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X8, batch_eq_8) {
3453 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003454 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003455 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003456 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003457 }
3458
3459 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X8, batch_div_8) {
3460 TEST_REQUIRES_ARM_NEON_FMA;
3461 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003462 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003463 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003464 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003465 }
3466 }
3467
3468 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X8, batch_lt_8) {
3469 TEST_REQUIRES_ARM_NEON_FMA;
3470 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003471 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003472 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003473 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003474 }
3475 }
3476
3477 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X8, batch_gt_8) {
3478 TEST_REQUIRES_ARM_NEON_FMA;
3479 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003480 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003481 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003482 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003483 }
3484 }
3485
3486 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X8, inplace) {
3487 TEST_REQUIRES_ARM_NEON_FMA;
3488 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003489 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003490 .batch_size(batch_size)
3491 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003492 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003493 }
3494 }
3495#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3496
3497
3498#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3499 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X12, batch_eq_12) {
3500 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003501 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003502 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003503 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003504 }
3505
3506 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X12, batch_div_12) {
3507 TEST_REQUIRES_ARM_NEON_FMA;
3508 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003509 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003510 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003511 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003512 }
3513 }
3514
3515 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X12, batch_lt_12) {
3516 TEST_REQUIRES_ARM_NEON_FMA;
3517 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003518 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003519 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003520 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003521 }
3522 }
3523
3524 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X12, batch_gt_12) {
3525 TEST_REQUIRES_ARM_NEON_FMA;
3526 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003527 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003528 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003529 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003530 }
3531 }
3532
3533 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X12, inplace) {
3534 TEST_REQUIRES_ARM_NEON_FMA;
3535 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003536 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003537 .batch_size(batch_size)
3538 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003539 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003540 }
3541 }
3542#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3543
3544
3545#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3546 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X16, batch_eq_16) {
3547 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003548 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003549 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003550 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003551 }
3552
3553 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X16, batch_div_16) {
3554 TEST_REQUIRES_ARM_NEON_FMA;
3555 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003556 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003557 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003558 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003559 }
3560 }
3561
3562 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X16, batch_lt_16) {
3563 TEST_REQUIRES_ARM_NEON_FMA;
3564 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003565 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003566 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003567 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003568 }
3569 }
3570
3571 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X16, batch_gt_16) {
3572 TEST_REQUIRES_ARM_NEON_FMA;
3573 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003574 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003575 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003576 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003577 }
3578 }
3579
3580 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X16, inplace) {
3581 TEST_REQUIRES_ARM_NEON_FMA;
3582 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003583 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003584 .batch_size(batch_size)
3585 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003586 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003587 }
3588 }
3589#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3590
3591
3592#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3593 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X20, batch_eq_20) {
3594 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003595 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003596 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003597 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003598 }
3599
3600 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X20, batch_div_20) {
3601 TEST_REQUIRES_ARM_NEON_FMA;
3602 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003603 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003604 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003605 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003606 }
3607 }
3608
3609 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X20, batch_lt_20) {
3610 TEST_REQUIRES_ARM_NEON_FMA;
3611 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003612 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003613 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003614 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003615 }
3616 }
3617
3618 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X20, batch_gt_20) {
3619 TEST_REQUIRES_ARM_NEON_FMA;
3620 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003621 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003622 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003623 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003624 }
3625 }
3626
3627 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X20, inplace) {
3628 TEST_REQUIRES_ARM_NEON_FMA;
3629 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003630 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003631 .batch_size(batch_size)
3632 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003633 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003634 }
3635 }
3636#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3637
3638
3639#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3640 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X24, batch_eq_24) {
3641 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003642 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003643 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003644 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003645 }
3646
3647 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X24, batch_div_24) {
3648 TEST_REQUIRES_ARM_NEON_FMA;
3649 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003650 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003651 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003652 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003653 }
3654 }
3655
3656 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X24, batch_lt_24) {
3657 TEST_REQUIRES_ARM_NEON_FMA;
3658 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003659 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003660 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003661 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003662 }
3663 }
3664
3665 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X24, batch_gt_24) {
3666 TEST_REQUIRES_ARM_NEON_FMA;
3667 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003668 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003669 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003670 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003671 }
3672 }
3673
3674 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR1RECPS1FMA_X24, inplace) {
3675 TEST_REQUIRES_ARM_NEON_FMA;
3676 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003677 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003678 .batch_size(batch_size)
3679 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003680 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr1recps1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003681 }
3682 }
3683#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3684
3685
3686#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3687 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X4, batch_eq_4) {
3688 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003689 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003690 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003691 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003692 }
3693
3694 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X4, batch_div_4) {
3695 TEST_REQUIRES_ARM_NEON_FMA;
3696 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003697 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003698 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003699 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003700 }
3701 }
3702
3703 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X4, batch_lt_4) {
3704 TEST_REQUIRES_ARM_NEON_FMA;
3705 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003706 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003707 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003708 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003709 }
3710 }
3711
3712 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X4, batch_gt_4) {
3713 TEST_REQUIRES_ARM_NEON_FMA;
3714 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003715 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003716 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003717 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003718 }
3719 }
3720
3721 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X4, inplace) {
3722 TEST_REQUIRES_ARM_NEON_FMA;
3723 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003724 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003725 .batch_size(batch_size)
3726 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003727 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003728 }
3729 }
3730#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3731
3732
3733#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3734 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X8, batch_eq_8) {
3735 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003736 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003737 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003738 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003739 }
3740
3741 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X8, batch_div_8) {
3742 TEST_REQUIRES_ARM_NEON_FMA;
3743 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003744 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003745 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003746 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003747 }
3748 }
3749
3750 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X8, batch_lt_8) {
3751 TEST_REQUIRES_ARM_NEON_FMA;
3752 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003753 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003754 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003755 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003756 }
3757 }
3758
3759 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X8, batch_gt_8) {
3760 TEST_REQUIRES_ARM_NEON_FMA;
3761 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003762 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003763 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003764 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003765 }
3766 }
3767
3768 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X8, inplace) {
3769 TEST_REQUIRES_ARM_NEON_FMA;
3770 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003771 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003772 .batch_size(batch_size)
3773 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003774 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003775 }
3776 }
3777#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3778
3779
3780#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3781 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X12, batch_eq_12) {
3782 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003783 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003784 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003785 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003786 }
3787
3788 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X12, batch_div_12) {
3789 TEST_REQUIRES_ARM_NEON_FMA;
3790 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003791 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003792 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003793 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003794 }
3795 }
3796
3797 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X12, batch_lt_12) {
3798 TEST_REQUIRES_ARM_NEON_FMA;
3799 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003800 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003801 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003802 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003803 }
3804 }
3805
3806 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X12, batch_gt_12) {
3807 TEST_REQUIRES_ARM_NEON_FMA;
3808 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003809 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003810 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003811 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003812 }
3813 }
3814
3815 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X12, inplace) {
3816 TEST_REQUIRES_ARM_NEON_FMA;
3817 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003818 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003819 .batch_size(batch_size)
3820 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003821 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003822 }
3823 }
3824#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3825
3826
3827#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3828 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X16, batch_eq_16) {
3829 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003830 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003831 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003832 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003833 }
3834
3835 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X16, batch_div_16) {
3836 TEST_REQUIRES_ARM_NEON_FMA;
3837 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003838 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003839 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003840 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003841 }
3842 }
3843
3844 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X16, batch_lt_16) {
3845 TEST_REQUIRES_ARM_NEON_FMA;
3846 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003847 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003848 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003849 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003850 }
3851 }
3852
3853 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X16, batch_gt_16) {
3854 TEST_REQUIRES_ARM_NEON_FMA;
3855 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003856 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003857 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003858 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003859 }
3860 }
3861
3862 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X16, inplace) {
3863 TEST_REQUIRES_ARM_NEON_FMA;
3864 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003865 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003866 .batch_size(batch_size)
3867 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003868 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003869 }
3870 }
3871#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3872
3873
3874#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3875 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X20, batch_eq_20) {
3876 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003877 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003878 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003879 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003880 }
3881
3882 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X20, batch_div_20) {
3883 TEST_REQUIRES_ARM_NEON_FMA;
3884 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003885 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003886 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003887 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003888 }
3889 }
3890
3891 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X20, batch_lt_20) {
3892 TEST_REQUIRES_ARM_NEON_FMA;
3893 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003894 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003895 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003896 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003897 }
3898 }
3899
3900 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X20, batch_gt_20) {
3901 TEST_REQUIRES_ARM_NEON_FMA;
3902 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003903 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003904 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003905 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003906 }
3907 }
3908
3909 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X20, inplace) {
3910 TEST_REQUIRES_ARM_NEON_FMA;
3911 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003912 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003913 .batch_size(batch_size)
3914 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003915 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003916 }
3917 }
3918#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3919
3920
3921#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3922 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X24, batch_eq_24) {
3923 TEST_REQUIRES_ARM_NEON_FMA;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003924 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003925 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003926 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003927 }
3928
3929 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X24, batch_div_24) {
3930 TEST_REQUIRES_ARM_NEON_FMA;
3931 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003932 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003933 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003934 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003935 }
3936 }
3937
3938 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X24, batch_lt_24) {
3939 TEST_REQUIRES_ARM_NEON_FMA;
3940 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003941 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003942 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003943 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003944 }
3945 }
3946
3947 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X24, batch_gt_24) {
3948 TEST_REQUIRES_ARM_NEON_FMA;
3949 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003950 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003951 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003952 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003953 }
3954 }
3955
3956 TEST(F32_VSIGMOID__NEONFMA_RR1_LUT2048_P1_NR2RECPS_X24, inplace) {
3957 TEST_REQUIRES_ARM_NEON_FMA;
3958 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003959 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003960 .batch_size(batch_size)
3961 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003962 .Test(xnn_f32_vsigmoid_ukernel__neonfma_rr1_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003963 }
3964 }
3965#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3966
3967
3968#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3969 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X4, batch_eq_4) {
3970 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003971 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003972 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003973 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003974 }
3975
3976 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X4, batch_div_4) {
3977 TEST_REQUIRES_ARM_NEON;
3978 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003979 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003980 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003981 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003982 }
3983 }
3984
3985 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X4, batch_lt_4) {
3986 TEST_REQUIRES_ARM_NEON;
3987 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003988 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003989 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003990 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07003991 }
3992 }
3993
3994 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X4, batch_gt_4) {
3995 TEST_REQUIRES_ARM_NEON;
3996 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07003997 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07003998 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07003999 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004000 }
4001 }
4002
4003 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X4, inplace) {
4004 TEST_REQUIRES_ARM_NEON;
4005 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004006 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004007 .batch_size(batch_size)
4008 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004009 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004010 }
4011 }
4012#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4013
4014
4015#if XNN_ARCH_ARM || XNN_ARCH_ARM64
4016 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X8, batch_eq_8) {
4017 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004018 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004019 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004020 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004021 }
4022
4023 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X8, batch_div_8) {
4024 TEST_REQUIRES_ARM_NEON;
4025 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004026 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004027 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004028 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004029 }
4030 }
4031
4032 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X8, batch_lt_8) {
4033 TEST_REQUIRES_ARM_NEON;
4034 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004035 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004036 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004037 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004038 }
4039 }
4040
4041 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X8, batch_gt_8) {
4042 TEST_REQUIRES_ARM_NEON;
4043 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004044 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004045 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004046 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004047 }
4048 }
4049
4050 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X8, inplace) {
4051 TEST_REQUIRES_ARM_NEON;
4052 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004053 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004054 .batch_size(batch_size)
4055 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004056 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004057 }
4058 }
4059#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4060
4061
4062#if XNN_ARCH_ARM || XNN_ARCH_ARM64
4063 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X12, batch_eq_12) {
4064 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004065 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004066 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004067 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004068 }
4069
4070 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X12, batch_div_12) {
4071 TEST_REQUIRES_ARM_NEON;
4072 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004073 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004074 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004075 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004076 }
4077 }
4078
4079 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X12, batch_lt_12) {
4080 TEST_REQUIRES_ARM_NEON;
4081 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004082 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004083 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004084 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004085 }
4086 }
4087
4088 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X12, batch_gt_12) {
4089 TEST_REQUIRES_ARM_NEON;
4090 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004091 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004092 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004093 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004094 }
4095 }
4096
4097 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X12, inplace) {
4098 TEST_REQUIRES_ARM_NEON;
4099 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004100 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004101 .batch_size(batch_size)
4102 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004103 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004104 }
4105 }
4106#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4107
4108
4109#if XNN_ARCH_ARM || XNN_ARCH_ARM64
4110 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X16, batch_eq_16) {
4111 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004112 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004113 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004114 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004115 }
4116
4117 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X16, batch_div_16) {
4118 TEST_REQUIRES_ARM_NEON;
4119 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004120 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004121 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004122 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004123 }
4124 }
4125
4126 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X16, batch_lt_16) {
4127 TEST_REQUIRES_ARM_NEON;
4128 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004129 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004130 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004131 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004132 }
4133 }
4134
4135 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X16, batch_gt_16) {
4136 TEST_REQUIRES_ARM_NEON;
4137 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004138 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004139 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004140 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004141 }
4142 }
4143
4144 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X16, inplace) {
4145 TEST_REQUIRES_ARM_NEON;
4146 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004147 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004148 .batch_size(batch_size)
4149 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004150 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004151 }
4152 }
4153#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4154
4155
4156#if XNN_ARCH_ARM || XNN_ARCH_ARM64
4157 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X20, batch_eq_20) {
4158 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004159 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004160 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004161 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004162 }
4163
4164 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X20, batch_div_20) {
4165 TEST_REQUIRES_ARM_NEON;
4166 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004167 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004168 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004169 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004170 }
4171 }
4172
4173 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X20, batch_lt_20) {
4174 TEST_REQUIRES_ARM_NEON;
4175 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004176 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004177 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004178 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004179 }
4180 }
4181
4182 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X20, batch_gt_20) {
4183 TEST_REQUIRES_ARM_NEON;
4184 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004185 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004186 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004187 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004188 }
4189 }
4190
4191 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X20, inplace) {
4192 TEST_REQUIRES_ARM_NEON;
4193 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004194 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004195 .batch_size(batch_size)
4196 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004197 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004198 }
4199 }
4200#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4201
4202
4203#if XNN_ARCH_ARM || XNN_ARCH_ARM64
4204 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X24, batch_eq_24) {
4205 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004206 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004207 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004208 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004209 }
4210
4211 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X24, batch_div_24) {
4212 TEST_REQUIRES_ARM_NEON;
4213 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004214 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004215 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004216 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004217 }
4218 }
4219
4220 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X24, batch_lt_24) {
4221 TEST_REQUIRES_ARM_NEON;
4222 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004223 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004224 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004225 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004226 }
4227 }
4228
4229 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X24, batch_gt_24) {
4230 TEST_REQUIRES_ARM_NEON;
4231 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004232 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004233 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004234 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004235 }
4236 }
4237
4238 TEST(F32_VSIGMOID__NEON_RR2_LUT2048_P1_NR2RECPS_X24, inplace) {
4239 TEST_REQUIRES_ARM_NEON;
4240 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004241 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004242 .batch_size(batch_size)
4243 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004244 .Test(xnn_f32_vsigmoid_ukernel__neon_rr2_lut2048_p1_nr2recps_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004245 }
4246 }
4247#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4248
4249
4250#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4251 TEST(F32_VSIGMOID__SSE2_P5_DIV_X4, batch_eq_4) {
4252 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004253 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004254 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004255 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004256 }
4257
4258 TEST(F32_VSIGMOID__SSE2_P5_DIV_X4, batch_div_4) {
4259 TEST_REQUIRES_X86_SSE2;
4260 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004261 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004262 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004263 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004264 }
4265 }
4266
4267 TEST(F32_VSIGMOID__SSE2_P5_DIV_X4, batch_lt_4) {
4268 TEST_REQUIRES_X86_SSE2;
4269 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004270 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004271 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004272 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004273 }
4274 }
4275
4276 TEST(F32_VSIGMOID__SSE2_P5_DIV_X4, batch_gt_4) {
4277 TEST_REQUIRES_X86_SSE2;
4278 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004279 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004280 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004281 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004282 }
4283 }
4284
4285 TEST(F32_VSIGMOID__SSE2_P5_DIV_X4, inplace) {
4286 TEST_REQUIRES_X86_SSE2;
4287 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004288 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004289 .batch_size(batch_size)
4290 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004291 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004292 }
4293 }
4294#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4295
4296
4297#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4298 TEST(F32_VSIGMOID__SSE2_P5_DIV_X8, batch_eq_8) {
4299 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004300 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004301 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004302 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004303 }
4304
4305 TEST(F32_VSIGMOID__SSE2_P5_DIV_X8, batch_div_8) {
4306 TEST_REQUIRES_X86_SSE2;
4307 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004308 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004309 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004310 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004311 }
4312 }
4313
4314 TEST(F32_VSIGMOID__SSE2_P5_DIV_X8, batch_lt_8) {
4315 TEST_REQUIRES_X86_SSE2;
4316 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004317 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004318 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004319 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004320 }
4321 }
4322
4323 TEST(F32_VSIGMOID__SSE2_P5_DIV_X8, batch_gt_8) {
4324 TEST_REQUIRES_X86_SSE2;
4325 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004326 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004327 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004328 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004329 }
4330 }
4331
4332 TEST(F32_VSIGMOID__SSE2_P5_DIV_X8, inplace) {
4333 TEST_REQUIRES_X86_SSE2;
4334 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004335 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004336 .batch_size(batch_size)
4337 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004338 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004339 }
4340 }
4341#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4342
4343
4344#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4345 TEST(F32_VSIGMOID__SSE2_P5_DIV_X12, batch_eq_12) {
4346 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004347 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004348 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004349 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004350 }
4351
4352 TEST(F32_VSIGMOID__SSE2_P5_DIV_X12, batch_div_12) {
4353 TEST_REQUIRES_X86_SSE2;
4354 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004355 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004356 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004357 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004358 }
4359 }
4360
4361 TEST(F32_VSIGMOID__SSE2_P5_DIV_X12, batch_lt_12) {
4362 TEST_REQUIRES_X86_SSE2;
4363 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004364 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004365 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004366 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004367 }
4368 }
4369
4370 TEST(F32_VSIGMOID__SSE2_P5_DIV_X12, batch_gt_12) {
4371 TEST_REQUIRES_X86_SSE2;
4372 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004373 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004374 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004375 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004376 }
4377 }
4378
4379 TEST(F32_VSIGMOID__SSE2_P5_DIV_X12, inplace) {
4380 TEST_REQUIRES_X86_SSE2;
4381 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004382 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004383 .batch_size(batch_size)
4384 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004385 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004386 }
4387 }
4388#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4389
4390
4391#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4392 TEST(F32_VSIGMOID__SSE2_P5_DIV_X16, batch_eq_16) {
4393 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004394 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004395 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004396 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004397 }
4398
4399 TEST(F32_VSIGMOID__SSE2_P5_DIV_X16, batch_div_16) {
4400 TEST_REQUIRES_X86_SSE2;
4401 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004402 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004403 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004404 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004405 }
4406 }
4407
4408 TEST(F32_VSIGMOID__SSE2_P5_DIV_X16, batch_lt_16) {
4409 TEST_REQUIRES_X86_SSE2;
4410 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004411 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004412 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004413 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004414 }
4415 }
4416
4417 TEST(F32_VSIGMOID__SSE2_P5_DIV_X16, batch_gt_16) {
4418 TEST_REQUIRES_X86_SSE2;
4419 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004420 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004421 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004422 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004423 }
4424 }
4425
4426 TEST(F32_VSIGMOID__SSE2_P5_DIV_X16, inplace) {
4427 TEST_REQUIRES_X86_SSE2;
4428 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004429 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004430 .batch_size(batch_size)
4431 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004432 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004433 }
4434 }
4435#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4436
4437
4438#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4439 TEST(F32_VSIGMOID__SSE2_P5_DIV_X20, batch_eq_20) {
4440 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004441 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004442 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004443 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004444 }
4445
4446 TEST(F32_VSIGMOID__SSE2_P5_DIV_X20, batch_div_20) {
4447 TEST_REQUIRES_X86_SSE2;
4448 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004449 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004450 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004451 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004452 }
4453 }
4454
4455 TEST(F32_VSIGMOID__SSE2_P5_DIV_X20, batch_lt_20) {
4456 TEST_REQUIRES_X86_SSE2;
4457 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004458 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004459 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004460 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004461 }
4462 }
4463
4464 TEST(F32_VSIGMOID__SSE2_P5_DIV_X20, batch_gt_20) {
4465 TEST_REQUIRES_X86_SSE2;
4466 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004467 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004468 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004469 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004470 }
4471 }
4472
4473 TEST(F32_VSIGMOID__SSE2_P5_DIV_X20, inplace) {
4474 TEST_REQUIRES_X86_SSE2;
4475 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004476 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004477 .batch_size(batch_size)
4478 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004479 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004480 }
4481 }
4482#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4483
4484
4485#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4486 TEST(F32_VSIGMOID__SSE2_P5_DIV_X24, batch_eq_24) {
4487 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004488 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004489 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004490 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004491 }
4492
4493 TEST(F32_VSIGMOID__SSE2_P5_DIV_X24, batch_div_24) {
4494 TEST_REQUIRES_X86_SSE2;
4495 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004496 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004497 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004498 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004499 }
4500 }
4501
4502 TEST(F32_VSIGMOID__SSE2_P5_DIV_X24, batch_lt_24) {
4503 TEST_REQUIRES_X86_SSE2;
4504 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004505 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004506 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004507 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004508 }
4509 }
4510
4511 TEST(F32_VSIGMOID__SSE2_P5_DIV_X24, batch_gt_24) {
4512 TEST_REQUIRES_X86_SSE2;
4513 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004514 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004515 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004516 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004517 }
4518 }
4519
4520 TEST(F32_VSIGMOID__SSE2_P5_DIV_X24, inplace) {
4521 TEST_REQUIRES_X86_SSE2;
4522 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004523 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004524 .batch_size(batch_size)
4525 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004526 .Test(xnn_f32_vsigmoid_ukernel__sse2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004527 }
4528 }
4529#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4530
4531
4532#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4533 TEST(F32_VSIGMOID__SSE41_P5_DIV_X4, batch_eq_4) {
4534 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004535 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004536 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004537 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004538 }
4539
4540 TEST(F32_VSIGMOID__SSE41_P5_DIV_X4, batch_div_4) {
4541 TEST_REQUIRES_X86_SSE41;
4542 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004543 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004544 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004545 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004546 }
4547 }
4548
4549 TEST(F32_VSIGMOID__SSE41_P5_DIV_X4, batch_lt_4) {
4550 TEST_REQUIRES_X86_SSE41;
4551 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004552 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004553 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004554 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004555 }
4556 }
4557
4558 TEST(F32_VSIGMOID__SSE41_P5_DIV_X4, batch_gt_4) {
4559 TEST_REQUIRES_X86_SSE41;
4560 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004561 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004562 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004563 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004564 }
4565 }
4566
4567 TEST(F32_VSIGMOID__SSE41_P5_DIV_X4, inplace) {
4568 TEST_REQUIRES_X86_SSE41;
4569 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004570 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004571 .batch_size(batch_size)
4572 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004573 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004574 }
4575 }
4576#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4577
4578
4579#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4580 TEST(F32_VSIGMOID__SSE41_P5_DIV_X8, batch_eq_8) {
4581 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004582 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004583 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004584 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004585 }
4586
4587 TEST(F32_VSIGMOID__SSE41_P5_DIV_X8, batch_div_8) {
4588 TEST_REQUIRES_X86_SSE41;
4589 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004590 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004591 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004592 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004593 }
4594 }
4595
4596 TEST(F32_VSIGMOID__SSE41_P5_DIV_X8, batch_lt_8) {
4597 TEST_REQUIRES_X86_SSE41;
4598 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004599 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004600 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004601 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004602 }
4603 }
4604
4605 TEST(F32_VSIGMOID__SSE41_P5_DIV_X8, batch_gt_8) {
4606 TEST_REQUIRES_X86_SSE41;
4607 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004608 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004609 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004610 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004611 }
4612 }
4613
4614 TEST(F32_VSIGMOID__SSE41_P5_DIV_X8, inplace) {
4615 TEST_REQUIRES_X86_SSE41;
4616 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004617 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004618 .batch_size(batch_size)
4619 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004620 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004621 }
4622 }
4623#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4624
4625
4626#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4627 TEST(F32_VSIGMOID__SSE41_P5_DIV_X12, batch_eq_12) {
4628 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004629 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004630 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004631 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004632 }
4633
4634 TEST(F32_VSIGMOID__SSE41_P5_DIV_X12, batch_div_12) {
4635 TEST_REQUIRES_X86_SSE41;
4636 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004637 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004638 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004639 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004640 }
4641 }
4642
4643 TEST(F32_VSIGMOID__SSE41_P5_DIV_X12, batch_lt_12) {
4644 TEST_REQUIRES_X86_SSE41;
4645 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004646 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004647 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004648 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004649 }
4650 }
4651
4652 TEST(F32_VSIGMOID__SSE41_P5_DIV_X12, batch_gt_12) {
4653 TEST_REQUIRES_X86_SSE41;
4654 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004655 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004656 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004657 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004658 }
4659 }
4660
4661 TEST(F32_VSIGMOID__SSE41_P5_DIV_X12, inplace) {
4662 TEST_REQUIRES_X86_SSE41;
4663 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004664 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004665 .batch_size(batch_size)
4666 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004667 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004668 }
4669 }
4670#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4671
4672
4673#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4674 TEST(F32_VSIGMOID__SSE41_P5_DIV_X16, batch_eq_16) {
4675 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004676 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004677 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004678 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004679 }
4680
4681 TEST(F32_VSIGMOID__SSE41_P5_DIV_X16, batch_div_16) {
4682 TEST_REQUIRES_X86_SSE41;
4683 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004684 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004685 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004686 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004687 }
4688 }
4689
4690 TEST(F32_VSIGMOID__SSE41_P5_DIV_X16, batch_lt_16) {
4691 TEST_REQUIRES_X86_SSE41;
4692 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004693 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004694 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004695 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004696 }
4697 }
4698
4699 TEST(F32_VSIGMOID__SSE41_P5_DIV_X16, batch_gt_16) {
4700 TEST_REQUIRES_X86_SSE41;
4701 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004702 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004703 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004704 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004705 }
4706 }
4707
4708 TEST(F32_VSIGMOID__SSE41_P5_DIV_X16, inplace) {
4709 TEST_REQUIRES_X86_SSE41;
4710 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004711 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004712 .batch_size(batch_size)
4713 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004714 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004715 }
4716 }
4717#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4718
4719
4720#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4721 TEST(F32_VSIGMOID__SSE41_P5_DIV_X20, batch_eq_20) {
4722 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004723 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004724 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004725 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004726 }
4727
4728 TEST(F32_VSIGMOID__SSE41_P5_DIV_X20, batch_div_20) {
4729 TEST_REQUIRES_X86_SSE41;
4730 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004731 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004732 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004733 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004734 }
4735 }
4736
4737 TEST(F32_VSIGMOID__SSE41_P5_DIV_X20, batch_lt_20) {
4738 TEST_REQUIRES_X86_SSE41;
4739 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004740 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004741 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004742 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004743 }
4744 }
4745
4746 TEST(F32_VSIGMOID__SSE41_P5_DIV_X20, batch_gt_20) {
4747 TEST_REQUIRES_X86_SSE41;
4748 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004749 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004750 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004751 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004752 }
4753 }
4754
4755 TEST(F32_VSIGMOID__SSE41_P5_DIV_X20, inplace) {
4756 TEST_REQUIRES_X86_SSE41;
4757 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004758 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004759 .batch_size(batch_size)
4760 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004761 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004762 }
4763 }
4764#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4765
4766
4767#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4768 TEST(F32_VSIGMOID__SSE41_P5_DIV_X24, batch_eq_24) {
4769 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004770 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004771 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004772 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004773 }
4774
4775 TEST(F32_VSIGMOID__SSE41_P5_DIV_X24, batch_div_24) {
4776 TEST_REQUIRES_X86_SSE41;
4777 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004778 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004779 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004780 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004781 }
4782 }
4783
4784 TEST(F32_VSIGMOID__SSE41_P5_DIV_X24, batch_lt_24) {
4785 TEST_REQUIRES_X86_SSE41;
4786 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004787 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004788 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004789 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004790 }
4791 }
4792
4793 TEST(F32_VSIGMOID__SSE41_P5_DIV_X24, batch_gt_24) {
4794 TEST_REQUIRES_X86_SSE41;
4795 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004796 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004797 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004798 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004799 }
4800 }
4801
4802 TEST(F32_VSIGMOID__SSE41_P5_DIV_X24, inplace) {
4803 TEST_REQUIRES_X86_SSE41;
4804 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004805 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004806 .batch_size(batch_size)
4807 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004808 .Test(xnn_f32_vsigmoid_ukernel__sse41_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004809 }
4810 }
4811#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4812
4813
4814#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4815 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X4, batch_eq_4) {
4816 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004817 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004818 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004819 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004820 }
4821
4822 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X4, batch_div_4) {
4823 TEST_REQUIRES_X86_SSE2;
4824 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004825 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004826 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004827 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004828 }
4829 }
4830
4831 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X4, batch_lt_4) {
4832 TEST_REQUIRES_X86_SSE2;
4833 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004834 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004835 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004836 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004837 }
4838 }
4839
4840 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X4, batch_gt_4) {
4841 TEST_REQUIRES_X86_SSE2;
4842 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004843 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004844 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004845 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004846 }
4847 }
4848
4849 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X4, inplace) {
4850 TEST_REQUIRES_X86_SSE2;
4851 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004852 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004853 .batch_size(batch_size)
4854 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004855 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004856 }
4857 }
4858#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4859
4860
4861#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4862 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X8, batch_eq_8) {
4863 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004864 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004865 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004866 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004867 }
4868
4869 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X8, batch_div_8) {
4870 TEST_REQUIRES_X86_SSE2;
4871 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004872 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004873 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004874 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004875 }
4876 }
4877
4878 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X8, batch_lt_8) {
4879 TEST_REQUIRES_X86_SSE2;
4880 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004881 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004882 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004883 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004884 }
4885 }
4886
4887 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X8, batch_gt_8) {
4888 TEST_REQUIRES_X86_SSE2;
4889 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004890 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004891 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004892 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004893 }
4894 }
4895
4896 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X8, inplace) {
4897 TEST_REQUIRES_X86_SSE2;
4898 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004899 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004900 .batch_size(batch_size)
4901 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004902 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004903 }
4904 }
4905#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4906
4907
4908#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4909 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X12, batch_eq_12) {
4910 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004911 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004912 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004913 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004914 }
4915
4916 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X12, batch_div_12) {
4917 TEST_REQUIRES_X86_SSE2;
4918 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004919 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004920 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004921 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004922 }
4923 }
4924
4925 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X12, batch_lt_12) {
4926 TEST_REQUIRES_X86_SSE2;
4927 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004928 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004929 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004930 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004931 }
4932 }
4933
4934 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X12, batch_gt_12) {
4935 TEST_REQUIRES_X86_SSE2;
4936 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004937 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004938 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004939 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004940 }
4941 }
4942
4943 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X12, inplace) {
4944 TEST_REQUIRES_X86_SSE2;
4945 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004946 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004947 .batch_size(batch_size)
4948 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004949 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004950 }
4951 }
4952#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
4953
4954
4955#if XNN_ARCH_X86 || XNN_ARCH_X86_64
4956 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X16, batch_eq_16) {
4957 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004958 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004959 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004960 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004961 }
4962
4963 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X16, batch_div_16) {
4964 TEST_REQUIRES_X86_SSE2;
4965 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004966 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004967 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004968 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004969 }
4970 }
4971
4972 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X16, batch_lt_16) {
4973 TEST_REQUIRES_X86_SSE2;
4974 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004975 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004976 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004977 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004978 }
4979 }
4980
4981 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X16, batch_gt_16) {
4982 TEST_REQUIRES_X86_SSE2;
4983 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004984 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004985 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004986 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004987 }
4988 }
4989
4990 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X16, inplace) {
4991 TEST_REQUIRES_X86_SSE2;
4992 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07004993 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07004994 .batch_size(batch_size)
4995 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07004996 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07004997 }
4998 }
4999#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5000
5001
5002#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5003 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X20, batch_eq_20) {
5004 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005005 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005006 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005007 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005008 }
5009
5010 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X20, batch_div_20) {
5011 TEST_REQUIRES_X86_SSE2;
5012 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005013 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005014 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005015 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005016 }
5017 }
5018
5019 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X20, batch_lt_20) {
5020 TEST_REQUIRES_X86_SSE2;
5021 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005022 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005023 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005024 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005025 }
5026 }
5027
5028 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X20, batch_gt_20) {
5029 TEST_REQUIRES_X86_SSE2;
5030 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005031 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005032 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005033 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005034 }
5035 }
5036
5037 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X20, inplace) {
5038 TEST_REQUIRES_X86_SSE2;
5039 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005040 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005041 .batch_size(batch_size)
5042 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005043 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005044 }
5045 }
5046#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5047
5048
5049#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5050 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X24, batch_eq_24) {
5051 TEST_REQUIRES_X86_SSE2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005052 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005053 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005054 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005055 }
5056
5057 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X24, batch_div_24) {
5058 TEST_REQUIRES_X86_SSE2;
5059 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005060 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005061 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005062 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005063 }
5064 }
5065
5066 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X24, batch_lt_24) {
5067 TEST_REQUIRES_X86_SSE2;
5068 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005069 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005070 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005071 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005072 }
5073 }
5074
5075 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X24, batch_gt_24) {
5076 TEST_REQUIRES_X86_SSE2;
5077 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005078 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005079 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005080 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005081 }
5082 }
5083
5084 TEST(F32_VSIGMOID__SSE2_LUT64_P2_DIV_X24, inplace) {
5085 TEST_REQUIRES_X86_SSE2;
5086 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005087 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005088 .batch_size(batch_size)
5089 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005090 .Test(xnn_f32_vsigmoid_ukernel__sse2_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005091 }
5092 }
5093#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5094
5095
5096#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5097 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X4, batch_eq_4) {
5098 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005099 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005100 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005101 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005102 }
5103
5104 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X4, batch_div_4) {
5105 TEST_REQUIRES_X86_SSE41;
5106 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005107 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005108 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005109 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005110 }
5111 }
5112
5113 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X4, batch_lt_4) {
5114 TEST_REQUIRES_X86_SSE41;
5115 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005116 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005117 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005118 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005119 }
5120 }
5121
5122 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X4, batch_gt_4) {
5123 TEST_REQUIRES_X86_SSE41;
5124 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005125 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005126 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005127 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005128 }
5129 }
5130
5131 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X4, inplace) {
5132 TEST_REQUIRES_X86_SSE41;
5133 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005134 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005135 .batch_size(batch_size)
5136 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005137 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005138 }
5139 }
5140#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5141
5142
5143#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5144 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X8, batch_eq_8) {
5145 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005146 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005147 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005148 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005149 }
5150
5151 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X8, batch_div_8) {
5152 TEST_REQUIRES_X86_SSE41;
5153 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005154 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005155 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005156 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005157 }
5158 }
5159
5160 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X8, batch_lt_8) {
5161 TEST_REQUIRES_X86_SSE41;
5162 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005163 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005164 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005165 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005166 }
5167 }
5168
5169 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X8, batch_gt_8) {
5170 TEST_REQUIRES_X86_SSE41;
5171 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005172 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005173 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005174 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005175 }
5176 }
5177
5178 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X8, inplace) {
5179 TEST_REQUIRES_X86_SSE41;
5180 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005181 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005182 .batch_size(batch_size)
5183 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005184 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005185 }
5186 }
5187#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5188
5189
5190#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5191 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X12, batch_eq_12) {
5192 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005193 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005194 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005195 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005196 }
5197
5198 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X12, batch_div_12) {
5199 TEST_REQUIRES_X86_SSE41;
5200 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005201 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005202 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005203 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005204 }
5205 }
5206
5207 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X12, batch_lt_12) {
5208 TEST_REQUIRES_X86_SSE41;
5209 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005210 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005211 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005212 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005213 }
5214 }
5215
5216 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X12, batch_gt_12) {
5217 TEST_REQUIRES_X86_SSE41;
5218 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005219 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005220 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005221 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005222 }
5223 }
5224
5225 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X12, inplace) {
5226 TEST_REQUIRES_X86_SSE41;
5227 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005228 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005229 .batch_size(batch_size)
5230 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005231 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005232 }
5233 }
5234#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5235
5236
5237#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5238 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X16, batch_eq_16) {
5239 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005240 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005241 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005242 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005243 }
5244
5245 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X16, batch_div_16) {
5246 TEST_REQUIRES_X86_SSE41;
5247 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005248 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005249 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005250 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005251 }
5252 }
5253
5254 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X16, batch_lt_16) {
5255 TEST_REQUIRES_X86_SSE41;
5256 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005257 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005258 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005259 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005260 }
5261 }
5262
5263 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X16, batch_gt_16) {
5264 TEST_REQUIRES_X86_SSE41;
5265 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005266 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005267 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005268 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005269 }
5270 }
5271
5272 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X16, inplace) {
5273 TEST_REQUIRES_X86_SSE41;
5274 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005275 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005276 .batch_size(batch_size)
5277 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005278 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005279 }
5280 }
5281#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5282
5283
5284#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5285 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X20, batch_eq_20) {
5286 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005287 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005288 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005289 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005290 }
5291
5292 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X20, batch_div_20) {
5293 TEST_REQUIRES_X86_SSE41;
5294 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005295 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005296 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005297 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005298 }
5299 }
5300
5301 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X20, batch_lt_20) {
5302 TEST_REQUIRES_X86_SSE41;
5303 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005304 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005305 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005306 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005307 }
5308 }
5309
5310 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X20, batch_gt_20) {
5311 TEST_REQUIRES_X86_SSE41;
5312 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005313 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005314 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005315 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005316 }
5317 }
5318
5319 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X20, inplace) {
5320 TEST_REQUIRES_X86_SSE41;
5321 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005322 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005323 .batch_size(batch_size)
5324 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005325 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005326 }
5327 }
5328#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5329
5330
5331#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5332 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X24, batch_eq_24) {
5333 TEST_REQUIRES_X86_SSE41;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005334 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005335 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005336 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005337 }
5338
5339 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X24, batch_div_24) {
5340 TEST_REQUIRES_X86_SSE41;
5341 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005342 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005343 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005344 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005345 }
5346 }
5347
5348 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X24, batch_lt_24) {
5349 TEST_REQUIRES_X86_SSE41;
5350 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005351 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005352 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005353 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005354 }
5355 }
5356
5357 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X24, batch_gt_24) {
5358 TEST_REQUIRES_X86_SSE41;
5359 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005360 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005361 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005362 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005363 }
5364 }
5365
5366 TEST(F32_VSIGMOID__SSE41_LUT64_P2_DIV_X24, inplace) {
5367 TEST_REQUIRES_X86_SSE41;
5368 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005369 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005370 .batch_size(batch_size)
5371 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005372 .Test(xnn_f32_vsigmoid_ukernel__sse41_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005373 }
5374 }
5375#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5376
5377
5378#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5379 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X8, batch_eq_8) {
5380 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005381 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005382 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005383 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005384 }
5385
5386 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X8, batch_div_8) {
5387 TEST_REQUIRES_X86_AVX;
5388 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005389 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005390 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005391 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005392 }
5393 }
5394
5395 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X8, batch_lt_8) {
5396 TEST_REQUIRES_X86_AVX;
5397 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005398 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005399 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005400 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005401 }
5402 }
5403
5404 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X8, batch_gt_8) {
5405 TEST_REQUIRES_X86_AVX;
5406 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005407 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005408 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005409 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005410 }
5411 }
5412
5413 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X8, inplace) {
5414 TEST_REQUIRES_X86_AVX;
5415 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005416 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005417 .batch_size(batch_size)
5418 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005419 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005420 }
5421 }
5422#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5423
5424
5425#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5426 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X16, batch_eq_16) {
5427 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005428 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005429 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005430 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005431 }
5432
5433 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X16, batch_div_16) {
5434 TEST_REQUIRES_X86_AVX;
5435 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005436 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005437 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005438 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005439 }
5440 }
5441
5442 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X16, batch_lt_16) {
5443 TEST_REQUIRES_X86_AVX;
5444 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005445 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005446 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005447 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005448 }
5449 }
5450
5451 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X16, batch_gt_16) {
5452 TEST_REQUIRES_X86_AVX;
5453 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005454 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005455 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005456 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005457 }
5458 }
5459
5460 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X16, inplace) {
5461 TEST_REQUIRES_X86_AVX;
5462 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005463 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005464 .batch_size(batch_size)
5465 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005466 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005467 }
5468 }
5469#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5470
5471
5472#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5473 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X24, batch_eq_24) {
5474 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005475 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005476 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005477 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005478 }
5479
5480 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X24, batch_div_24) {
5481 TEST_REQUIRES_X86_AVX;
5482 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005483 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005484 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005485 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005486 }
5487 }
5488
5489 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X24, batch_lt_24) {
5490 TEST_REQUIRES_X86_AVX;
5491 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005492 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005493 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005494 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005495 }
5496 }
5497
5498 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X24, batch_gt_24) {
5499 TEST_REQUIRES_X86_AVX;
5500 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005501 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005502 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005503 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005504 }
5505 }
5506
5507 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X24, inplace) {
5508 TEST_REQUIRES_X86_AVX;
5509 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005510 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005511 .batch_size(batch_size)
5512 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005513 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005514 }
5515 }
5516#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5517
5518
5519#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5520 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X32, batch_eq_32) {
5521 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005522 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005523 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005524 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005525 }
5526
5527 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X32, batch_div_32) {
5528 TEST_REQUIRES_X86_AVX;
5529 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005530 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005531 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005532 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005533 }
5534 }
5535
5536 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X32, batch_lt_32) {
5537 TEST_REQUIRES_X86_AVX;
5538 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005539 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005540 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005541 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005542 }
5543 }
5544
5545 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X32, batch_gt_32) {
5546 TEST_REQUIRES_X86_AVX;
5547 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005548 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005549 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005550 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005551 }
5552 }
5553
5554 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X32, inplace) {
5555 TEST_REQUIRES_X86_AVX;
5556 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005557 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005558 .batch_size(batch_size)
5559 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005560 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005561 }
5562 }
5563#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5564
5565
5566#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5567 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X40, batch_eq_40) {
5568 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005569 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005570 .batch_size(40)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005571 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005572 }
5573
5574 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X40, batch_div_40) {
5575 TEST_REQUIRES_X86_AVX;
5576 for (size_t batch_size = 80; batch_size < 400; batch_size += 40) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005577 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005578 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005579 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005580 }
5581 }
5582
5583 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X40, batch_lt_40) {
5584 TEST_REQUIRES_X86_AVX;
5585 for (size_t batch_size = 1; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005586 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005587 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005588 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005589 }
5590 }
5591
5592 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X40, batch_gt_40) {
5593 TEST_REQUIRES_X86_AVX;
5594 for (size_t batch_size = 41; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005595 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005596 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005597 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005598 }
5599 }
5600
5601 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X40, inplace) {
5602 TEST_REQUIRES_X86_AVX;
5603 for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005604 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005605 .batch_size(batch_size)
5606 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005607 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005608 }
5609 }
5610#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5611
5612
5613#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5614 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X48, batch_eq_48) {
5615 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005616 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005617 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005618 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005619 }
5620
5621 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X48, batch_div_48) {
5622 TEST_REQUIRES_X86_AVX;
5623 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005624 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005625 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005626 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005627 }
5628 }
5629
5630 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X48, batch_lt_48) {
5631 TEST_REQUIRES_X86_AVX;
5632 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005633 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005634 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005635 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005636 }
5637 }
5638
5639 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X48, batch_gt_48) {
5640 TEST_REQUIRES_X86_AVX;
5641 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005642 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005643 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005644 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005645 }
5646 }
5647
5648 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X48, inplace) {
5649 TEST_REQUIRES_X86_AVX;
5650 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005651 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005652 .batch_size(batch_size)
5653 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005654 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005655 }
5656 }
5657#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5658
5659
5660#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5661 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X56, batch_eq_56) {
5662 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005663 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005664 .batch_size(56)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005665 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005666 }
5667
5668 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X56, batch_div_56) {
5669 TEST_REQUIRES_X86_AVX;
5670 for (size_t batch_size = 112; batch_size < 560; batch_size += 56) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005671 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005672 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005673 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005674 }
5675 }
5676
5677 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X56, batch_lt_56) {
5678 TEST_REQUIRES_X86_AVX;
5679 for (size_t batch_size = 1; batch_size < 56; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005680 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005681 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005682 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005683 }
5684 }
5685
5686 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X56, batch_gt_56) {
5687 TEST_REQUIRES_X86_AVX;
5688 for (size_t batch_size = 57; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005689 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005690 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005691 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005692 }
5693 }
5694
5695 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X56, inplace) {
5696 TEST_REQUIRES_X86_AVX;
5697 for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005698 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005699 .batch_size(batch_size)
5700 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005701 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005702 }
5703 }
5704#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5705
5706
5707#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5708 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X64, batch_eq_64) {
5709 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005710 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005711 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005712 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005713 }
5714
5715 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X64, batch_div_64) {
5716 TEST_REQUIRES_X86_AVX;
5717 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005718 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005719 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005720 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005721 }
5722 }
5723
5724 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X64, batch_lt_64) {
5725 TEST_REQUIRES_X86_AVX;
5726 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005727 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005728 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005729 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005730 }
5731 }
5732
5733 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X64, batch_gt_64) {
5734 TEST_REQUIRES_X86_AVX;
5735 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005736 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005737 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005738 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005739 }
5740 }
5741
5742 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X64, inplace) {
5743 TEST_REQUIRES_X86_AVX;
5744 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005745 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005746 .batch_size(batch_size)
5747 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005748 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005749 }
5750 }
5751#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5752
5753
5754#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5755 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X72, batch_eq_72) {
5756 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005757 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005758 .batch_size(72)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005759 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005760 }
5761
5762 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X72, batch_div_72) {
5763 TEST_REQUIRES_X86_AVX;
5764 for (size_t batch_size = 144; batch_size < 720; batch_size += 72) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005765 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005766 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005767 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005768 }
5769 }
5770
5771 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X72, batch_lt_72) {
5772 TEST_REQUIRES_X86_AVX;
5773 for (size_t batch_size = 1; batch_size < 72; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005774 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005775 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005776 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005777 }
5778 }
5779
5780 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X72, batch_gt_72) {
5781 TEST_REQUIRES_X86_AVX;
5782 for (size_t batch_size = 73; batch_size < 144; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005783 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005784 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005785 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005786 }
5787 }
5788
5789 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X72, inplace) {
5790 TEST_REQUIRES_X86_AVX;
5791 for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005792 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005793 .batch_size(batch_size)
5794 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005795 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005796 }
5797 }
5798#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5799
5800
5801#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5802 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X80, batch_eq_80) {
5803 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005804 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005805 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005806 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005807 }
5808
5809 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X80, batch_div_80) {
5810 TEST_REQUIRES_X86_AVX;
5811 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005812 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005813 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005814 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005815 }
5816 }
5817
5818 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X80, batch_lt_80) {
5819 TEST_REQUIRES_X86_AVX;
5820 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005821 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005822 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005823 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005824 }
5825 }
5826
5827 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X80, batch_gt_80) {
5828 TEST_REQUIRES_X86_AVX;
5829 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005830 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005831 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005832 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005833 }
5834 }
5835
5836 TEST(F32_VSIGMOID__AVX_RR2_P5_DIV_X80, inplace) {
5837 TEST_REQUIRES_X86_AVX;
5838 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005839 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005840 .batch_size(batch_size)
5841 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005842 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005843 }
5844 }
5845#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5846
5847
5848#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5849 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X8, batch_eq_8) {
5850 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005851 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005852 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005853 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005854 }
5855
5856 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X8, batch_div_8) {
5857 TEST_REQUIRES_X86_AVX;
5858 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005859 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005860 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005861 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005862 }
5863 }
5864
5865 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X8, batch_lt_8) {
5866 TEST_REQUIRES_X86_AVX;
5867 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005868 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005869 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005870 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005871 }
5872 }
5873
5874 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X8, batch_gt_8) {
5875 TEST_REQUIRES_X86_AVX;
5876 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005877 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005878 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005879 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005880 }
5881 }
5882
5883 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X8, inplace) {
5884 TEST_REQUIRES_X86_AVX;
5885 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005886 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005887 .batch_size(batch_size)
5888 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005889 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005890 }
5891 }
5892#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5893
5894
5895#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5896 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X16, batch_eq_16) {
5897 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005898 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005899 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005900 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005901 }
5902
5903 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X16, batch_div_16) {
5904 TEST_REQUIRES_X86_AVX;
5905 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005906 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005907 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005908 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005909 }
5910 }
5911
5912 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X16, batch_lt_16) {
5913 TEST_REQUIRES_X86_AVX;
5914 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005915 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005916 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005917 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005918 }
5919 }
5920
5921 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X16, batch_gt_16) {
5922 TEST_REQUIRES_X86_AVX;
5923 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005924 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005925 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005926 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005927 }
5928 }
5929
5930 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X16, inplace) {
5931 TEST_REQUIRES_X86_AVX;
5932 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005933 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005934 .batch_size(batch_size)
5935 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005936 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005937 }
5938 }
5939#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5940
5941
5942#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5943 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X24, batch_eq_24) {
5944 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005945 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005946 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005947 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005948 }
5949
5950 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X24, batch_div_24) {
5951 TEST_REQUIRES_X86_AVX;
5952 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005953 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005954 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005955 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005956 }
5957 }
5958
5959 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X24, batch_lt_24) {
5960 TEST_REQUIRES_X86_AVX;
5961 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005962 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005963 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005964 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005965 }
5966 }
5967
5968 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X24, batch_gt_24) {
5969 TEST_REQUIRES_X86_AVX;
5970 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005971 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005972 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005973 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005974 }
5975 }
5976
5977 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X24, inplace) {
5978 TEST_REQUIRES_X86_AVX;
5979 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005980 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005981 .batch_size(batch_size)
5982 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005983 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005984 }
5985 }
5986#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5987
5988
5989#if XNN_ARCH_X86 || XNN_ARCH_X86_64
5990 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X32, batch_eq_32) {
5991 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07005992 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07005993 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07005994 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07005995 }
5996
5997 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X32, batch_div_32) {
5998 TEST_REQUIRES_X86_AVX;
5999 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006000 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006001 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006002 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006003 }
6004 }
6005
6006 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X32, batch_lt_32) {
6007 TEST_REQUIRES_X86_AVX;
6008 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006009 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006010 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006011 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006012 }
6013 }
6014
6015 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X32, batch_gt_32) {
6016 TEST_REQUIRES_X86_AVX;
6017 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006018 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006019 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006020 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006021 }
6022 }
6023
6024 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X32, inplace) {
6025 TEST_REQUIRES_X86_AVX;
6026 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006027 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006028 .batch_size(batch_size)
6029 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006030 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006031 }
6032 }
6033#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6034
6035
6036#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6037 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X40, batch_eq_40) {
6038 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006039 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006040 .batch_size(40)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006041 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006042 }
6043
6044 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X40, batch_div_40) {
6045 TEST_REQUIRES_X86_AVX;
6046 for (size_t batch_size = 80; batch_size < 400; batch_size += 40) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006047 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006048 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006049 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006050 }
6051 }
6052
6053 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X40, batch_lt_40) {
6054 TEST_REQUIRES_X86_AVX;
6055 for (size_t batch_size = 1; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006056 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006057 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006058 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006059 }
6060 }
6061
6062 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X40, batch_gt_40) {
6063 TEST_REQUIRES_X86_AVX;
6064 for (size_t batch_size = 41; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006065 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006066 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006067 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006068 }
6069 }
6070
6071 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X40, inplace) {
6072 TEST_REQUIRES_X86_AVX;
6073 for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006074 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006075 .batch_size(batch_size)
6076 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006077 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006078 }
6079 }
6080#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6081
6082
6083#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6084 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X48, batch_eq_48) {
6085 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006086 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006087 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006088 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006089 }
6090
6091 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X48, batch_div_48) {
6092 TEST_REQUIRES_X86_AVX;
6093 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006094 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006095 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006096 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006097 }
6098 }
6099
6100 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X48, batch_lt_48) {
6101 TEST_REQUIRES_X86_AVX;
6102 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006103 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006104 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006105 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006106 }
6107 }
6108
6109 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X48, batch_gt_48) {
6110 TEST_REQUIRES_X86_AVX;
6111 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006112 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006113 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006114 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006115 }
6116 }
6117
6118 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X48, inplace) {
6119 TEST_REQUIRES_X86_AVX;
6120 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006121 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006122 .batch_size(batch_size)
6123 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006124 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006125 }
6126 }
6127#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6128
6129
6130#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6131 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X56, batch_eq_56) {
6132 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006133 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006134 .batch_size(56)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006135 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006136 }
6137
6138 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X56, batch_div_56) {
6139 TEST_REQUIRES_X86_AVX;
6140 for (size_t batch_size = 112; batch_size < 560; batch_size += 56) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006141 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006142 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006143 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006144 }
6145 }
6146
6147 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X56, batch_lt_56) {
6148 TEST_REQUIRES_X86_AVX;
6149 for (size_t batch_size = 1; batch_size < 56; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006150 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006151 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006152 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006153 }
6154 }
6155
6156 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X56, batch_gt_56) {
6157 TEST_REQUIRES_X86_AVX;
6158 for (size_t batch_size = 57; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006159 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006160 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006161 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006162 }
6163 }
6164
6165 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X56, inplace) {
6166 TEST_REQUIRES_X86_AVX;
6167 for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006168 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006169 .batch_size(batch_size)
6170 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006171 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006172 }
6173 }
6174#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6175
6176
6177#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6178 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X64, batch_eq_64) {
6179 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006180 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006181 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006182 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006183 }
6184
6185 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X64, batch_div_64) {
6186 TEST_REQUIRES_X86_AVX;
6187 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006188 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006189 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006190 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006191 }
6192 }
6193
6194 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X64, batch_lt_64) {
6195 TEST_REQUIRES_X86_AVX;
6196 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006197 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006198 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006199 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006200 }
6201 }
6202
6203 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X64, batch_gt_64) {
6204 TEST_REQUIRES_X86_AVX;
6205 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006206 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006207 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006208 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006209 }
6210 }
6211
6212 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X64, inplace) {
6213 TEST_REQUIRES_X86_AVX;
6214 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006215 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006216 .batch_size(batch_size)
6217 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006218 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006219 }
6220 }
6221#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6222
6223
6224#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6225 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X72, batch_eq_72) {
6226 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006227 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006228 .batch_size(72)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006229 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006230 }
6231
6232 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X72, batch_div_72) {
6233 TEST_REQUIRES_X86_AVX;
6234 for (size_t batch_size = 144; batch_size < 720; batch_size += 72) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006235 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006236 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006237 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006238 }
6239 }
6240
6241 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X72, batch_lt_72) {
6242 TEST_REQUIRES_X86_AVX;
6243 for (size_t batch_size = 1; batch_size < 72; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006244 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006245 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006246 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006247 }
6248 }
6249
6250 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X72, batch_gt_72) {
6251 TEST_REQUIRES_X86_AVX;
6252 for (size_t batch_size = 73; batch_size < 144; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006253 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006254 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006255 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006256 }
6257 }
6258
6259 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X72, inplace) {
6260 TEST_REQUIRES_X86_AVX;
6261 for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006262 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006263 .batch_size(batch_size)
6264 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006265 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006266 }
6267 }
6268#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6269
6270
6271#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6272 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X80, batch_eq_80) {
6273 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006274 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006275 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006276 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006277 }
6278
6279 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X80, batch_div_80) {
6280 TEST_REQUIRES_X86_AVX;
6281 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006282 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006283 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006284 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006285 }
6286 }
6287
6288 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X80, batch_lt_80) {
6289 TEST_REQUIRES_X86_AVX;
6290 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006291 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006292 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006293 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006294 }
6295 }
6296
6297 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X80, batch_gt_80) {
6298 TEST_REQUIRES_X86_AVX;
6299 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006300 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006301 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006302 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006303 }
6304 }
6305
6306 TEST(F32_VSIGMOID__AVX_RR2_P5_NR2_X80, inplace) {
6307 TEST_REQUIRES_X86_AVX;
6308 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006309 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006310 .batch_size(batch_size)
6311 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006312 .Test(xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006313 }
6314 }
6315#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6316
6317
6318#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6319 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X8, batch_eq_8) {
6320 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006321 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006322 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006323 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006324 }
6325
6326 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X8, batch_div_8) {
6327 TEST_REQUIRES_X86_AVX2;
6328 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006329 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006330 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006331 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006332 }
6333 }
6334
6335 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X8, batch_lt_8) {
6336 TEST_REQUIRES_X86_AVX2;
6337 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006338 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006339 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006340 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006341 }
6342 }
6343
6344 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X8, batch_gt_8) {
6345 TEST_REQUIRES_X86_AVX2;
6346 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006347 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006348 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006349 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006350 }
6351 }
6352
6353 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X8, inplace) {
6354 TEST_REQUIRES_X86_AVX2;
6355 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006356 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006357 .batch_size(batch_size)
6358 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006359 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006360 }
6361 }
6362#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6363
6364
6365#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6366 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X16, batch_eq_16) {
6367 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006368 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006369 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006370 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006371 }
6372
6373 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X16, batch_div_16) {
6374 TEST_REQUIRES_X86_AVX2;
6375 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006376 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006377 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006378 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006379 }
6380 }
6381
6382 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X16, batch_lt_16) {
6383 TEST_REQUIRES_X86_AVX2;
6384 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006385 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006386 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006387 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006388 }
6389 }
6390
6391 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X16, batch_gt_16) {
6392 TEST_REQUIRES_X86_AVX2;
6393 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006394 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006395 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006396 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006397 }
6398 }
6399
6400 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X16, inplace) {
6401 TEST_REQUIRES_X86_AVX2;
6402 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006403 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006404 .batch_size(batch_size)
6405 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006406 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006407 }
6408 }
6409#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6410
6411
6412#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6413 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X24, batch_eq_24) {
6414 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006415 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006416 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006417 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006418 }
6419
6420 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X24, batch_div_24) {
6421 TEST_REQUIRES_X86_AVX2;
6422 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006423 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006424 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006425 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006426 }
6427 }
6428
6429 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X24, batch_lt_24) {
6430 TEST_REQUIRES_X86_AVX2;
6431 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006432 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006433 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006434 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006435 }
6436 }
6437
6438 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X24, batch_gt_24) {
6439 TEST_REQUIRES_X86_AVX2;
6440 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006441 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006442 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006443 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006444 }
6445 }
6446
6447 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X24, inplace) {
6448 TEST_REQUIRES_X86_AVX2;
6449 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006450 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006451 .batch_size(batch_size)
6452 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006453 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006454 }
6455 }
6456#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6457
6458
6459#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6460 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X32, batch_eq_32) {
6461 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006462 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006463 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006464 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006465 }
6466
6467 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X32, batch_div_32) {
6468 TEST_REQUIRES_X86_AVX2;
6469 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006470 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006471 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006472 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006473 }
6474 }
6475
6476 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X32, batch_lt_32) {
6477 TEST_REQUIRES_X86_AVX2;
6478 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006479 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006480 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006481 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006482 }
6483 }
6484
6485 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X32, batch_gt_32) {
6486 TEST_REQUIRES_X86_AVX2;
6487 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006488 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006489 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006490 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006491 }
6492 }
6493
6494 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X32, inplace) {
6495 TEST_REQUIRES_X86_AVX2;
6496 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006497 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006498 .batch_size(batch_size)
6499 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006500 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006501 }
6502 }
6503#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6504
6505
6506#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6507 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X40, batch_eq_40) {
6508 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006509 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006510 .batch_size(40)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006511 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006512 }
6513
6514 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X40, batch_div_40) {
6515 TEST_REQUIRES_X86_AVX2;
6516 for (size_t batch_size = 80; batch_size < 400; batch_size += 40) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006517 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006518 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006519 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006520 }
6521 }
6522
6523 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X40, batch_lt_40) {
6524 TEST_REQUIRES_X86_AVX2;
6525 for (size_t batch_size = 1; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006526 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006527 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006528 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006529 }
6530 }
6531
6532 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X40, batch_gt_40) {
6533 TEST_REQUIRES_X86_AVX2;
6534 for (size_t batch_size = 41; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006535 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006536 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006537 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006538 }
6539 }
6540
6541 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X40, inplace) {
6542 TEST_REQUIRES_X86_AVX2;
6543 for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006544 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006545 .batch_size(batch_size)
6546 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006547 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006548 }
6549 }
6550#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6551
6552
6553#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6554 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X48, batch_eq_48) {
6555 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006556 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006557 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006558 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006559 }
6560
6561 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X48, batch_div_48) {
6562 TEST_REQUIRES_X86_AVX2;
6563 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006564 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006565 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006566 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006567 }
6568 }
6569
6570 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X48, batch_lt_48) {
6571 TEST_REQUIRES_X86_AVX2;
6572 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006573 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006574 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006575 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006576 }
6577 }
6578
6579 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X48, batch_gt_48) {
6580 TEST_REQUIRES_X86_AVX2;
6581 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006582 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006583 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006584 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006585 }
6586 }
6587
6588 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X48, inplace) {
6589 TEST_REQUIRES_X86_AVX2;
6590 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006591 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006592 .batch_size(batch_size)
6593 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006594 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006595 }
6596 }
6597#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6598
6599
6600#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6601 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X56, batch_eq_56) {
6602 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006603 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006604 .batch_size(56)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006605 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006606 }
6607
6608 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X56, batch_div_56) {
6609 TEST_REQUIRES_X86_AVX2;
6610 for (size_t batch_size = 112; batch_size < 560; batch_size += 56) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006611 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006612 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006613 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006614 }
6615 }
6616
6617 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X56, batch_lt_56) {
6618 TEST_REQUIRES_X86_AVX2;
6619 for (size_t batch_size = 1; batch_size < 56; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006620 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006621 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006622 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006623 }
6624 }
6625
6626 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X56, batch_gt_56) {
6627 TEST_REQUIRES_X86_AVX2;
6628 for (size_t batch_size = 57; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006629 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006630 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006631 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006632 }
6633 }
6634
6635 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X56, inplace) {
6636 TEST_REQUIRES_X86_AVX2;
6637 for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006638 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006639 .batch_size(batch_size)
6640 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006641 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006642 }
6643 }
6644#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6645
6646
6647#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6648 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X64, batch_eq_64) {
6649 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006650 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006651 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006652 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006653 }
6654
6655 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X64, batch_div_64) {
6656 TEST_REQUIRES_X86_AVX2;
6657 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006658 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006659 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006660 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006661 }
6662 }
6663
6664 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X64, batch_lt_64) {
6665 TEST_REQUIRES_X86_AVX2;
6666 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006667 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006668 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006669 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006670 }
6671 }
6672
6673 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X64, batch_gt_64) {
6674 TEST_REQUIRES_X86_AVX2;
6675 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006676 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006677 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006678 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006679 }
6680 }
6681
6682 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X64, inplace) {
6683 TEST_REQUIRES_X86_AVX2;
6684 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006685 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006686 .batch_size(batch_size)
6687 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006688 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006689 }
6690 }
6691#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6692
6693
6694#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6695 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X72, batch_eq_72) {
6696 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006697 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006698 .batch_size(72)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006699 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006700 }
6701
6702 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X72, batch_div_72) {
6703 TEST_REQUIRES_X86_AVX2;
6704 for (size_t batch_size = 144; batch_size < 720; batch_size += 72) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006705 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006706 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006707 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006708 }
6709 }
6710
6711 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X72, batch_lt_72) {
6712 TEST_REQUIRES_X86_AVX2;
6713 for (size_t batch_size = 1; batch_size < 72; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006714 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006715 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006716 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006717 }
6718 }
6719
6720 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X72, batch_gt_72) {
6721 TEST_REQUIRES_X86_AVX2;
6722 for (size_t batch_size = 73; batch_size < 144; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006723 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006724 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006725 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006726 }
6727 }
6728
6729 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X72, inplace) {
6730 TEST_REQUIRES_X86_AVX2;
6731 for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006732 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006733 .batch_size(batch_size)
6734 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006735 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006736 }
6737 }
6738#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6739
6740
6741#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6742 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X80, batch_eq_80) {
6743 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006744 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006745 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006746 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006747 }
6748
6749 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X80, batch_div_80) {
6750 TEST_REQUIRES_X86_AVX2;
6751 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006752 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006753 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006754 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006755 }
6756 }
6757
6758 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X80, batch_lt_80) {
6759 TEST_REQUIRES_X86_AVX2;
6760 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006761 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006762 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006763 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006764 }
6765 }
6766
6767 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X80, batch_gt_80) {
6768 TEST_REQUIRES_X86_AVX2;
6769 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006770 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006771 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006772 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006773 }
6774 }
6775
6776 TEST(F32_VSIGMOID__AVX2_RR1_P5_DIV_X80, inplace) {
6777 TEST_REQUIRES_X86_AVX2;
6778 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006779 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006780 .batch_size(batch_size)
6781 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006782 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006783 }
6784 }
6785#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6786
6787
6788#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6789 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X8, batch_eq_8) {
6790 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006791 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006792 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006793 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006794 }
6795
6796 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X8, batch_div_8) {
6797 TEST_REQUIRES_X86_AVX2;
6798 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006799 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006800 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006801 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006802 }
6803 }
6804
6805 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X8, batch_lt_8) {
6806 TEST_REQUIRES_X86_AVX2;
6807 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006808 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006809 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006810 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006811 }
6812 }
6813
6814 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X8, batch_gt_8) {
6815 TEST_REQUIRES_X86_AVX2;
6816 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006817 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006818 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006819 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006820 }
6821 }
6822
6823 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X8, inplace) {
6824 TEST_REQUIRES_X86_AVX2;
6825 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006826 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006827 .batch_size(batch_size)
6828 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006829 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006830 }
6831 }
6832#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6833
6834
6835#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6836 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X16, batch_eq_16) {
6837 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006838 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006839 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006840 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006841 }
6842
6843 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X16, batch_div_16) {
6844 TEST_REQUIRES_X86_AVX2;
6845 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006846 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006847 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006848 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006849 }
6850 }
6851
6852 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X16, batch_lt_16) {
6853 TEST_REQUIRES_X86_AVX2;
6854 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006855 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006856 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006857 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006858 }
6859 }
6860
6861 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X16, batch_gt_16) {
6862 TEST_REQUIRES_X86_AVX2;
6863 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006864 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006865 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006866 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006867 }
6868 }
6869
6870 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X16, inplace) {
6871 TEST_REQUIRES_X86_AVX2;
6872 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006873 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006874 .batch_size(batch_size)
6875 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006876 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006877 }
6878 }
6879#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6880
6881
6882#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6883 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X24, batch_eq_24) {
6884 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006885 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006886 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006887 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006888 }
6889
6890 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X24, batch_div_24) {
6891 TEST_REQUIRES_X86_AVX2;
6892 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006893 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006894 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006895 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006896 }
6897 }
6898
6899 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X24, batch_lt_24) {
6900 TEST_REQUIRES_X86_AVX2;
6901 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006902 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006903 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006904 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006905 }
6906 }
6907
6908 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X24, batch_gt_24) {
6909 TEST_REQUIRES_X86_AVX2;
6910 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006911 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006912 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006913 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006914 }
6915 }
6916
6917 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X24, inplace) {
6918 TEST_REQUIRES_X86_AVX2;
6919 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006920 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006921 .batch_size(batch_size)
6922 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006923 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006924 }
6925 }
6926#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6927
6928
6929#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6930 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X32, batch_eq_32) {
6931 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006932 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006933 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006934 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006935 }
6936
6937 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X32, batch_div_32) {
6938 TEST_REQUIRES_X86_AVX2;
6939 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006940 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006941 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006942 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006943 }
6944 }
6945
6946 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X32, batch_lt_32) {
6947 TEST_REQUIRES_X86_AVX2;
6948 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006949 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006950 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006951 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006952 }
6953 }
6954
6955 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X32, batch_gt_32) {
6956 TEST_REQUIRES_X86_AVX2;
6957 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006958 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006959 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006960 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006961 }
6962 }
6963
6964 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X32, inplace) {
6965 TEST_REQUIRES_X86_AVX2;
6966 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006967 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006968 .batch_size(batch_size)
6969 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006970 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006971 }
6972 }
6973#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
6974
6975
6976#if XNN_ARCH_X86 || XNN_ARCH_X86_64
6977 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X40, batch_eq_40) {
6978 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006979 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006980 .batch_size(40)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006981 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006982 }
6983
6984 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X40, batch_div_40) {
6985 TEST_REQUIRES_X86_AVX2;
6986 for (size_t batch_size = 80; batch_size < 400; batch_size += 40) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006987 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006988 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006989 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006990 }
6991 }
6992
6993 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X40, batch_lt_40) {
6994 TEST_REQUIRES_X86_AVX2;
6995 for (size_t batch_size = 1; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07006996 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07006997 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07006998 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07006999 }
7000 }
7001
7002 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X40, batch_gt_40) {
7003 TEST_REQUIRES_X86_AVX2;
7004 for (size_t batch_size = 41; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007005 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007006 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007007 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007008 }
7009 }
7010
7011 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X40, inplace) {
7012 TEST_REQUIRES_X86_AVX2;
7013 for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007014 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007015 .batch_size(batch_size)
7016 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007017 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007018 }
7019 }
7020#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7021
7022
7023#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7024 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X48, batch_eq_48) {
7025 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007026 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007027 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007028 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007029 }
7030
7031 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X48, batch_div_48) {
7032 TEST_REQUIRES_X86_AVX2;
7033 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007034 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007035 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007036 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007037 }
7038 }
7039
7040 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X48, batch_lt_48) {
7041 TEST_REQUIRES_X86_AVX2;
7042 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007043 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007044 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007045 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007046 }
7047 }
7048
7049 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X48, batch_gt_48) {
7050 TEST_REQUIRES_X86_AVX2;
7051 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007052 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007053 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007054 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007055 }
7056 }
7057
7058 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X48, inplace) {
7059 TEST_REQUIRES_X86_AVX2;
7060 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007061 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007062 .batch_size(batch_size)
7063 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007064 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007065 }
7066 }
7067#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7068
7069
7070#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7071 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X56, batch_eq_56) {
7072 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007073 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007074 .batch_size(56)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007075 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007076 }
7077
7078 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X56, batch_div_56) {
7079 TEST_REQUIRES_X86_AVX2;
7080 for (size_t batch_size = 112; batch_size < 560; batch_size += 56) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007081 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007082 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007083 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007084 }
7085 }
7086
7087 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X56, batch_lt_56) {
7088 TEST_REQUIRES_X86_AVX2;
7089 for (size_t batch_size = 1; batch_size < 56; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007090 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007091 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007092 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007093 }
7094 }
7095
7096 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X56, batch_gt_56) {
7097 TEST_REQUIRES_X86_AVX2;
7098 for (size_t batch_size = 57; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007099 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007100 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007101 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007102 }
7103 }
7104
7105 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X56, inplace) {
7106 TEST_REQUIRES_X86_AVX2;
7107 for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007108 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007109 .batch_size(batch_size)
7110 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007111 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007112 }
7113 }
7114#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7115
7116
7117#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7118 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X64, batch_eq_64) {
7119 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007120 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007121 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007122 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007123 }
7124
7125 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X64, batch_div_64) {
7126 TEST_REQUIRES_X86_AVX2;
7127 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007128 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007129 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007130 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007131 }
7132 }
7133
7134 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X64, batch_lt_64) {
7135 TEST_REQUIRES_X86_AVX2;
7136 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007137 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007138 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007139 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007140 }
7141 }
7142
7143 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X64, batch_gt_64) {
7144 TEST_REQUIRES_X86_AVX2;
7145 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007146 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007147 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007148 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007149 }
7150 }
7151
7152 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X64, inplace) {
7153 TEST_REQUIRES_X86_AVX2;
7154 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007155 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007156 .batch_size(batch_size)
7157 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007158 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007159 }
7160 }
7161#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7162
7163
7164#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7165 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X72, batch_eq_72) {
7166 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007167 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007168 .batch_size(72)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007169 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007170 }
7171
7172 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X72, batch_div_72) {
7173 TEST_REQUIRES_X86_AVX2;
7174 for (size_t batch_size = 144; batch_size < 720; batch_size += 72) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007175 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007176 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007177 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007178 }
7179 }
7180
7181 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X72, batch_lt_72) {
7182 TEST_REQUIRES_X86_AVX2;
7183 for (size_t batch_size = 1; batch_size < 72; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007184 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007185 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007186 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007187 }
7188 }
7189
7190 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X72, batch_gt_72) {
7191 TEST_REQUIRES_X86_AVX2;
7192 for (size_t batch_size = 73; batch_size < 144; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007193 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007194 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007195 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007196 }
7197 }
7198
7199 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X72, inplace) {
7200 TEST_REQUIRES_X86_AVX2;
7201 for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007202 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007203 .batch_size(batch_size)
7204 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007205 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007206 }
7207 }
7208#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7209
7210
7211#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7212 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X80, batch_eq_80) {
7213 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007214 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007215 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007216 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007217 }
7218
7219 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X80, batch_div_80) {
7220 TEST_REQUIRES_X86_AVX2;
7221 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007222 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007223 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007224 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007225 }
7226 }
7227
7228 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X80, batch_lt_80) {
7229 TEST_REQUIRES_X86_AVX2;
7230 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007231 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007232 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007233 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007234 }
7235 }
7236
7237 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X80, batch_gt_80) {
7238 TEST_REQUIRES_X86_AVX2;
7239 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007240 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007241 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007242 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007243 }
7244 }
7245
7246 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR1FMA_X80, inplace) {
7247 TEST_REQUIRES_X86_AVX2;
7248 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007249 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007250 .batch_size(batch_size)
7251 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007252 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007253 }
7254 }
7255#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7256
7257
7258#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7259 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X8, batch_eq_8) {
7260 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007261 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007262 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007263 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007264 }
7265
7266 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X8, batch_div_8) {
7267 TEST_REQUIRES_X86_AVX2;
7268 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007269 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007270 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007271 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007272 }
7273 }
7274
7275 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X8, batch_lt_8) {
7276 TEST_REQUIRES_X86_AVX2;
7277 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007278 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007279 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007280 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007281 }
7282 }
7283
7284 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X8, batch_gt_8) {
7285 TEST_REQUIRES_X86_AVX2;
7286 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007287 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007288 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007289 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007290 }
7291 }
7292
7293 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X8, inplace) {
7294 TEST_REQUIRES_X86_AVX2;
7295 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007296 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007297 .batch_size(batch_size)
7298 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007299 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007300 }
7301 }
7302#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7303
7304
7305#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7306 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X16, batch_eq_16) {
7307 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007308 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007309 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007310 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007311 }
7312
7313 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X16, batch_div_16) {
7314 TEST_REQUIRES_X86_AVX2;
7315 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007316 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007317 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007318 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007319 }
7320 }
7321
7322 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X16, batch_lt_16) {
7323 TEST_REQUIRES_X86_AVX2;
7324 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007325 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007326 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007327 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007328 }
7329 }
7330
7331 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X16, batch_gt_16) {
7332 TEST_REQUIRES_X86_AVX2;
7333 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007334 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007335 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007336 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007337 }
7338 }
7339
7340 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X16, inplace) {
7341 TEST_REQUIRES_X86_AVX2;
7342 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007343 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007344 .batch_size(batch_size)
7345 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007346 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007347 }
7348 }
7349#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7350
7351
7352#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7353 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X24, batch_eq_24) {
7354 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007355 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007356 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007357 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007358 }
7359
7360 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X24, batch_div_24) {
7361 TEST_REQUIRES_X86_AVX2;
7362 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007363 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007364 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007365 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007366 }
7367 }
7368
7369 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X24, batch_lt_24) {
7370 TEST_REQUIRES_X86_AVX2;
7371 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007372 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007373 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007374 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007375 }
7376 }
7377
7378 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X24, batch_gt_24) {
7379 TEST_REQUIRES_X86_AVX2;
7380 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007381 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007382 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007383 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007384 }
7385 }
7386
7387 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X24, inplace) {
7388 TEST_REQUIRES_X86_AVX2;
7389 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007390 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007391 .batch_size(batch_size)
7392 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007393 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007394 }
7395 }
7396#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7397
7398
7399#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7400 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X32, batch_eq_32) {
7401 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007402 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007403 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007404 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007405 }
7406
7407 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X32, batch_div_32) {
7408 TEST_REQUIRES_X86_AVX2;
7409 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007410 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007411 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007412 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007413 }
7414 }
7415
7416 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X32, batch_lt_32) {
7417 TEST_REQUIRES_X86_AVX2;
7418 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007419 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007420 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007421 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007422 }
7423 }
7424
7425 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X32, batch_gt_32) {
7426 TEST_REQUIRES_X86_AVX2;
7427 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007428 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007429 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007430 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007431 }
7432 }
7433
7434 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X32, inplace) {
7435 TEST_REQUIRES_X86_AVX2;
7436 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007437 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007438 .batch_size(batch_size)
7439 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007440 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007441 }
7442 }
7443#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7444
7445
7446#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7447 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X40, batch_eq_40) {
7448 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007449 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007450 .batch_size(40)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007451 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007452 }
7453
7454 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X40, batch_div_40) {
7455 TEST_REQUIRES_X86_AVX2;
7456 for (size_t batch_size = 80; batch_size < 400; batch_size += 40) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007457 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007458 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007459 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007460 }
7461 }
7462
7463 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X40, batch_lt_40) {
7464 TEST_REQUIRES_X86_AVX2;
7465 for (size_t batch_size = 1; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007466 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007467 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007468 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007469 }
7470 }
7471
7472 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X40, batch_gt_40) {
7473 TEST_REQUIRES_X86_AVX2;
7474 for (size_t batch_size = 41; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007475 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007476 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007477 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007478 }
7479 }
7480
7481 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X40, inplace) {
7482 TEST_REQUIRES_X86_AVX2;
7483 for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007484 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007485 .batch_size(batch_size)
7486 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007487 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x40, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007488 }
7489 }
7490#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7491
7492
7493#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7494 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X48, batch_eq_48) {
7495 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007496 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007497 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007498 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007499 }
7500
7501 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X48, batch_div_48) {
7502 TEST_REQUIRES_X86_AVX2;
7503 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007504 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007505 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007506 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007507 }
7508 }
7509
7510 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X48, batch_lt_48) {
7511 TEST_REQUIRES_X86_AVX2;
7512 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007513 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007514 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007515 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007516 }
7517 }
7518
7519 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X48, batch_gt_48) {
7520 TEST_REQUIRES_X86_AVX2;
7521 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007522 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007523 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007524 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007525 }
7526 }
7527
7528 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X48, inplace) {
7529 TEST_REQUIRES_X86_AVX2;
7530 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007531 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007532 .batch_size(batch_size)
7533 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007534 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007535 }
7536 }
7537#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7538
7539
7540#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7541 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X56, batch_eq_56) {
7542 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007543 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007544 .batch_size(56)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007545 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007546 }
7547
7548 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X56, batch_div_56) {
7549 TEST_REQUIRES_X86_AVX2;
7550 for (size_t batch_size = 112; batch_size < 560; batch_size += 56) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007551 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007552 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007553 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007554 }
7555 }
7556
7557 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X56, batch_lt_56) {
7558 TEST_REQUIRES_X86_AVX2;
7559 for (size_t batch_size = 1; batch_size < 56; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007560 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007561 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007562 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007563 }
7564 }
7565
7566 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X56, batch_gt_56) {
7567 TEST_REQUIRES_X86_AVX2;
7568 for (size_t batch_size = 57; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007569 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007570 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007571 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007572 }
7573 }
7574
7575 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X56, inplace) {
7576 TEST_REQUIRES_X86_AVX2;
7577 for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007578 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007579 .batch_size(batch_size)
7580 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007581 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x56, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007582 }
7583 }
7584#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7585
7586
7587#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7588 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X64, batch_eq_64) {
7589 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007590 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007591 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007592 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007593 }
7594
7595 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X64, batch_div_64) {
7596 TEST_REQUIRES_X86_AVX2;
7597 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007598 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007599 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007600 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007601 }
7602 }
7603
7604 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X64, batch_lt_64) {
7605 TEST_REQUIRES_X86_AVX2;
7606 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007607 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007608 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007609 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007610 }
7611 }
7612
7613 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X64, batch_gt_64) {
7614 TEST_REQUIRES_X86_AVX2;
7615 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007616 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007617 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007618 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007619 }
7620 }
7621
7622 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X64, inplace) {
7623 TEST_REQUIRES_X86_AVX2;
7624 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007625 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007626 .batch_size(batch_size)
7627 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007628 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007629 }
7630 }
7631#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7632
7633
7634#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7635 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X72, batch_eq_72) {
7636 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007637 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007638 .batch_size(72)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007639 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007640 }
7641
7642 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X72, batch_div_72) {
7643 TEST_REQUIRES_X86_AVX2;
7644 for (size_t batch_size = 144; batch_size < 720; batch_size += 72) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007645 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007646 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007647 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007648 }
7649 }
7650
7651 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X72, batch_lt_72) {
7652 TEST_REQUIRES_X86_AVX2;
7653 for (size_t batch_size = 1; batch_size < 72; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007654 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007655 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007656 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007657 }
7658 }
7659
7660 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X72, batch_gt_72) {
7661 TEST_REQUIRES_X86_AVX2;
7662 for (size_t batch_size = 73; batch_size < 144; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007663 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007664 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007665 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007666 }
7667 }
7668
7669 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X72, inplace) {
7670 TEST_REQUIRES_X86_AVX2;
7671 for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007672 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007673 .batch_size(batch_size)
7674 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007675 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x72, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007676 }
7677 }
7678#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7679
7680
7681#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7682 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X80, batch_eq_80) {
7683 TEST_REQUIRES_X86_AVX2;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007684 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007685 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007686 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007687 }
7688
7689 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X80, batch_div_80) {
7690 TEST_REQUIRES_X86_AVX2;
7691 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007692 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007693 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007694 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007695 }
7696 }
7697
7698 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X80, batch_lt_80) {
7699 TEST_REQUIRES_X86_AVX2;
7700 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007701 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007702 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007703 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007704 }
7705 }
7706
7707 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X80, batch_gt_80) {
7708 TEST_REQUIRES_X86_AVX2;
7709 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007710 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007711 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007712 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007713 }
7714 }
7715
7716 TEST(F32_VSIGMOID__AVX2_RR1_P5_NR2FMA_X80, inplace) {
7717 TEST_REQUIRES_X86_AVX2;
7718 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007719 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007720 .batch_size(batch_size)
7721 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007722 .Test(xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007723 }
7724 }
7725#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7726
7727
7728#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7729 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X16, batch_eq_16) {
7730 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007731 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007732 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007733 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007734 }
7735
7736 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X16, batch_div_16) {
7737 TEST_REQUIRES_X86_AVX512F;
7738 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007739 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007740 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007741 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007742 }
7743 }
7744
7745 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X16, batch_lt_16) {
7746 TEST_REQUIRES_X86_AVX512F;
7747 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007748 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007749 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007750 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007751 }
7752 }
7753
7754 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X16, batch_gt_16) {
7755 TEST_REQUIRES_X86_AVX512F;
7756 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007757 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007758 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007759 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007760 }
7761 }
7762
7763 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X16, inplace) {
7764 TEST_REQUIRES_X86_AVX512F;
7765 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007766 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007767 .batch_size(batch_size)
7768 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007769 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007770 }
7771 }
7772#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7773
7774
7775#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7776 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X32, batch_eq_32) {
7777 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007778 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007779 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007780 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007781 }
7782
7783 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X32, batch_div_32) {
7784 TEST_REQUIRES_X86_AVX512F;
7785 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007786 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007787 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007788 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007789 }
7790 }
7791
7792 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X32, batch_lt_32) {
7793 TEST_REQUIRES_X86_AVX512F;
7794 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007795 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007796 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007797 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007798 }
7799 }
7800
7801 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X32, batch_gt_32) {
7802 TEST_REQUIRES_X86_AVX512F;
7803 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007804 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007805 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007806 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007807 }
7808 }
7809
7810 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X32, inplace) {
7811 TEST_REQUIRES_X86_AVX512F;
7812 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007813 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007814 .batch_size(batch_size)
7815 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007816 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007817 }
7818 }
7819#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7820
7821
7822#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7823 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X48, batch_eq_48) {
7824 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007825 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007826 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007827 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007828 }
7829
7830 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X48, batch_div_48) {
7831 TEST_REQUIRES_X86_AVX512F;
7832 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007833 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007834 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007835 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007836 }
7837 }
7838
7839 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X48, batch_lt_48) {
7840 TEST_REQUIRES_X86_AVX512F;
7841 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007842 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007843 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007844 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007845 }
7846 }
7847
7848 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X48, batch_gt_48) {
7849 TEST_REQUIRES_X86_AVX512F;
7850 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007851 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007852 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007853 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007854 }
7855 }
7856
7857 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X48, inplace) {
7858 TEST_REQUIRES_X86_AVX512F;
7859 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007860 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007861 .batch_size(batch_size)
7862 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007863 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007864 }
7865 }
7866#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7867
7868
7869#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7870 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X64, batch_eq_64) {
7871 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007872 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007873 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007874 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007875 }
7876
7877 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X64, batch_div_64) {
7878 TEST_REQUIRES_X86_AVX512F;
7879 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007880 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007881 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007882 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007883 }
7884 }
7885
7886 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X64, batch_lt_64) {
7887 TEST_REQUIRES_X86_AVX512F;
7888 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007889 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007890 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007891 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007892 }
7893 }
7894
7895 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X64, batch_gt_64) {
7896 TEST_REQUIRES_X86_AVX512F;
7897 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007898 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007899 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007900 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007901 }
7902 }
7903
7904 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X64, inplace) {
7905 TEST_REQUIRES_X86_AVX512F;
7906 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007907 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007908 .batch_size(batch_size)
7909 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007910 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007911 }
7912 }
7913#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7914
7915
7916#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7917 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X80, batch_eq_80) {
7918 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007919 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007920 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007921 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007922 }
7923
7924 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X80, batch_div_80) {
7925 TEST_REQUIRES_X86_AVX512F;
7926 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007927 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007928 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007929 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007930 }
7931 }
7932
7933 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X80, batch_lt_80) {
7934 TEST_REQUIRES_X86_AVX512F;
7935 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007936 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007937 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007938 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007939 }
7940 }
7941
7942 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X80, batch_gt_80) {
7943 TEST_REQUIRES_X86_AVX512F;
7944 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007945 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007946 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007947 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007948 }
7949 }
7950
7951 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X80, inplace) {
7952 TEST_REQUIRES_X86_AVX512F;
7953 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007954 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007955 .batch_size(batch_size)
7956 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007957 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007958 }
7959 }
7960#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
7961
7962
7963#if XNN_ARCH_X86 || XNN_ARCH_X86_64
7964 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X96, batch_eq_96) {
7965 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007966 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007967 .batch_size(96)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007968 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007969 }
7970
7971 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X96, batch_div_96) {
7972 TEST_REQUIRES_X86_AVX512F;
7973 for (size_t batch_size = 192; batch_size < 960; batch_size += 96) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007974 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007975 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007976 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007977 }
7978 }
7979
7980 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X96, batch_lt_96) {
7981 TEST_REQUIRES_X86_AVX512F;
7982 for (size_t batch_size = 1; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007983 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007984 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007985 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007986 }
7987 }
7988
7989 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X96, batch_gt_96) {
7990 TEST_REQUIRES_X86_AVX512F;
7991 for (size_t batch_size = 97; batch_size < 192; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07007992 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07007993 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07007994 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07007995 }
7996 }
7997
7998 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X96, inplace) {
7999 TEST_REQUIRES_X86_AVX512F;
8000 for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008001 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008002 .batch_size(batch_size)
8003 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008004 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008005 }
8006 }
8007#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8008
8009
8010#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8011 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X112, batch_eq_112) {
8012 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008013 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008014 .batch_size(112)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008015 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008016 }
8017
8018 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X112, batch_div_112) {
8019 TEST_REQUIRES_X86_AVX512F;
8020 for (size_t batch_size = 224; batch_size < 1120; batch_size += 112) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008021 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008022 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008023 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008024 }
8025 }
8026
8027 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X112, batch_lt_112) {
8028 TEST_REQUIRES_X86_AVX512F;
8029 for (size_t batch_size = 1; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008030 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008031 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008032 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008033 }
8034 }
8035
8036 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X112, batch_gt_112) {
8037 TEST_REQUIRES_X86_AVX512F;
8038 for (size_t batch_size = 113; batch_size < 224; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008039 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008040 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008041 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008042 }
8043 }
8044
8045 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X112, inplace) {
8046 TEST_REQUIRES_X86_AVX512F;
8047 for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008048 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008049 .batch_size(batch_size)
8050 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008051 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008052 }
8053 }
8054#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8055
8056
8057#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8058 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X128, batch_eq_128) {
8059 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008060 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008061 .batch_size(128)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008062 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008063 }
8064
8065 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X128, batch_div_128) {
8066 TEST_REQUIRES_X86_AVX512F;
8067 for (size_t batch_size = 256; batch_size < 1280; batch_size += 128) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008068 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008069 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008070 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008071 }
8072 }
8073
8074 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X128, batch_lt_128) {
8075 TEST_REQUIRES_X86_AVX512F;
8076 for (size_t batch_size = 1; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008077 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008078 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008079 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008080 }
8081 }
8082
8083 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X128, batch_gt_128) {
8084 TEST_REQUIRES_X86_AVX512F;
8085 for (size_t batch_size = 129; batch_size < 256; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008086 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008087 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008088 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008089 }
8090 }
8091
8092 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_DIV_X128, inplace) {
8093 TEST_REQUIRES_X86_AVX512F;
8094 for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008095 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008096 .batch_size(batch_size)
8097 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008098 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008099 }
8100 }
8101#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8102
8103
8104#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8105 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X16, batch_eq_16) {
8106 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008107 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008108 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008109 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008110 }
8111
8112 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X16, batch_div_16) {
8113 TEST_REQUIRES_X86_AVX512F;
8114 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008115 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008116 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008117 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008118 }
8119 }
8120
8121 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X16, batch_lt_16) {
8122 TEST_REQUIRES_X86_AVX512F;
8123 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008124 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008125 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008126 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008127 }
8128 }
8129
8130 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X16, batch_gt_16) {
8131 TEST_REQUIRES_X86_AVX512F;
8132 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008133 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008134 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008135 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008136 }
8137 }
8138
8139 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X16, inplace) {
8140 TEST_REQUIRES_X86_AVX512F;
8141 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008142 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008143 .batch_size(batch_size)
8144 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008145 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008146 }
8147 }
8148#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8149
8150
8151#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8152 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X32, batch_eq_32) {
8153 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008154 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008155 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008156 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008157 }
8158
8159 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X32, batch_div_32) {
8160 TEST_REQUIRES_X86_AVX512F;
8161 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008162 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008163 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008164 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008165 }
8166 }
8167
8168 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X32, batch_lt_32) {
8169 TEST_REQUIRES_X86_AVX512F;
8170 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008171 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008172 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008173 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008174 }
8175 }
8176
8177 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X32, batch_gt_32) {
8178 TEST_REQUIRES_X86_AVX512F;
8179 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008180 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008181 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008182 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008183 }
8184 }
8185
8186 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X32, inplace) {
8187 TEST_REQUIRES_X86_AVX512F;
8188 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008189 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008190 .batch_size(batch_size)
8191 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008192 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008193 }
8194 }
8195#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8196
8197
8198#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8199 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X48, batch_eq_48) {
8200 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008201 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008202 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008203 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008204 }
8205
8206 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X48, batch_div_48) {
8207 TEST_REQUIRES_X86_AVX512F;
8208 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008209 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008210 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008211 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008212 }
8213 }
8214
8215 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X48, batch_lt_48) {
8216 TEST_REQUIRES_X86_AVX512F;
8217 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008218 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008219 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008220 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008221 }
8222 }
8223
8224 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X48, batch_gt_48) {
8225 TEST_REQUIRES_X86_AVX512F;
8226 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008227 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008228 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008229 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008230 }
8231 }
8232
8233 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X48, inplace) {
8234 TEST_REQUIRES_X86_AVX512F;
8235 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008236 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008237 .batch_size(batch_size)
8238 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008239 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008240 }
8241 }
8242#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8243
8244
8245#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8246 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X64, batch_eq_64) {
8247 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008248 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008249 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008250 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008251 }
8252
8253 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X64, batch_div_64) {
8254 TEST_REQUIRES_X86_AVX512F;
8255 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008256 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008257 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008258 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008259 }
8260 }
8261
8262 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X64, batch_lt_64) {
8263 TEST_REQUIRES_X86_AVX512F;
8264 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008265 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008266 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008267 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008268 }
8269 }
8270
8271 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X64, batch_gt_64) {
8272 TEST_REQUIRES_X86_AVX512F;
8273 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008274 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008275 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008276 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008277 }
8278 }
8279
8280 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X64, inplace) {
8281 TEST_REQUIRES_X86_AVX512F;
8282 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008283 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008284 .batch_size(batch_size)
8285 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008286 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008287 }
8288 }
8289#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8290
8291
8292#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8293 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X80, batch_eq_80) {
8294 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008295 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008296 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008297 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008298 }
8299
8300 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X80, batch_div_80) {
8301 TEST_REQUIRES_X86_AVX512F;
8302 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008303 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008304 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008305 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008306 }
8307 }
8308
8309 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X80, batch_lt_80) {
8310 TEST_REQUIRES_X86_AVX512F;
8311 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008312 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008313 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008314 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008315 }
8316 }
8317
8318 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X80, batch_gt_80) {
8319 TEST_REQUIRES_X86_AVX512F;
8320 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008321 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008322 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008323 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008324 }
8325 }
8326
8327 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X80, inplace) {
8328 TEST_REQUIRES_X86_AVX512F;
8329 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008330 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008331 .batch_size(batch_size)
8332 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008333 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008334 }
8335 }
8336#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8337
8338
8339#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8340 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X96, batch_eq_96) {
8341 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008342 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008343 .batch_size(96)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008344 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008345 }
8346
8347 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X96, batch_div_96) {
8348 TEST_REQUIRES_X86_AVX512F;
8349 for (size_t batch_size = 192; batch_size < 960; batch_size += 96) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008350 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008351 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008352 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008353 }
8354 }
8355
8356 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X96, batch_lt_96) {
8357 TEST_REQUIRES_X86_AVX512F;
8358 for (size_t batch_size = 1; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008359 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008360 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008361 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008362 }
8363 }
8364
8365 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X96, batch_gt_96) {
8366 TEST_REQUIRES_X86_AVX512F;
8367 for (size_t batch_size = 97; batch_size < 192; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008368 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008369 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008370 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008371 }
8372 }
8373
8374 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X96, inplace) {
8375 TEST_REQUIRES_X86_AVX512F;
8376 for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008377 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008378 .batch_size(batch_size)
8379 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008380 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008381 }
8382 }
8383#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8384
8385
8386#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8387 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X112, batch_eq_112) {
8388 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008389 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008390 .batch_size(112)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008391 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008392 }
8393
8394 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X112, batch_div_112) {
8395 TEST_REQUIRES_X86_AVX512F;
8396 for (size_t batch_size = 224; batch_size < 1120; batch_size += 112) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008397 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008398 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008399 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008400 }
8401 }
8402
8403 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X112, batch_lt_112) {
8404 TEST_REQUIRES_X86_AVX512F;
8405 for (size_t batch_size = 1; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008406 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008407 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008408 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008409 }
8410 }
8411
8412 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X112, batch_gt_112) {
8413 TEST_REQUIRES_X86_AVX512F;
8414 for (size_t batch_size = 113; batch_size < 224; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008415 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008416 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008417 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008418 }
8419 }
8420
8421 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X112, inplace) {
8422 TEST_REQUIRES_X86_AVX512F;
8423 for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008424 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008425 .batch_size(batch_size)
8426 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008427 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008428 }
8429 }
8430#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8431
8432
8433#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8434 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X128, batch_eq_128) {
8435 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008436 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008437 .batch_size(128)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008438 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008439 }
8440
8441 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X128, batch_div_128) {
8442 TEST_REQUIRES_X86_AVX512F;
8443 for (size_t batch_size = 256; batch_size < 1280; batch_size += 128) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008444 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008445 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008446 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008447 }
8448 }
8449
8450 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X128, batch_lt_128) {
8451 TEST_REQUIRES_X86_AVX512F;
8452 for (size_t batch_size = 1; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008453 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008454 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008455 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008456 }
8457 }
8458
8459 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X128, batch_gt_128) {
8460 TEST_REQUIRES_X86_AVX512F;
8461 for (size_t batch_size = 129; batch_size < 256; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008462 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008463 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008464 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008465 }
8466 }
8467
8468 TEST(F32_VSIGMOID__AVX512F_RR1_P5_SCALEF_NR1FMA_X128, inplace) {
8469 TEST_REQUIRES_X86_AVX512F;
8470 for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008471 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008472 .batch_size(batch_size)
8473 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008474 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008475 }
8476 }
8477#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8478
8479
8480#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8481 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X16, batch_eq_16) {
8482 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008483 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008484 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008485 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008486 }
8487
8488 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X16, batch_div_16) {
8489 TEST_REQUIRES_X86_AVX512F;
8490 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008491 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008492 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008493 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008494 }
8495 }
8496
8497 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X16, batch_lt_16) {
8498 TEST_REQUIRES_X86_AVX512F;
8499 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008500 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008501 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008502 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008503 }
8504 }
8505
8506 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X16, batch_gt_16) {
8507 TEST_REQUIRES_X86_AVX512F;
8508 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008509 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008510 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008511 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008512 }
8513 }
8514
8515 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X16, inplace) {
8516 TEST_REQUIRES_X86_AVX512F;
8517 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008518 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008519 .batch_size(batch_size)
8520 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008521 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008522 }
8523 }
8524#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8525
8526
8527#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8528 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X32, batch_eq_32) {
8529 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008530 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008531 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008532 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008533 }
8534
8535 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X32, batch_div_32) {
8536 TEST_REQUIRES_X86_AVX512F;
8537 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008538 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008539 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008540 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008541 }
8542 }
8543
8544 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X32, batch_lt_32) {
8545 TEST_REQUIRES_X86_AVX512F;
8546 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008547 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008548 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008549 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008550 }
8551 }
8552
8553 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X32, batch_gt_32) {
8554 TEST_REQUIRES_X86_AVX512F;
8555 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008556 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008557 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008558 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008559 }
8560 }
8561
8562 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X32, inplace) {
8563 TEST_REQUIRES_X86_AVX512F;
8564 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008565 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008566 .batch_size(batch_size)
8567 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008568 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008569 }
8570 }
8571#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8572
8573
8574#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8575 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X48, batch_eq_48) {
8576 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008577 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008578 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008579 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008580 }
8581
8582 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X48, batch_div_48) {
8583 TEST_REQUIRES_X86_AVX512F;
8584 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008585 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008586 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008587 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008588 }
8589 }
8590
8591 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X48, batch_lt_48) {
8592 TEST_REQUIRES_X86_AVX512F;
8593 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008594 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008595 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008596 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008597 }
8598 }
8599
8600 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X48, batch_gt_48) {
8601 TEST_REQUIRES_X86_AVX512F;
8602 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008603 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008604 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008605 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008606 }
8607 }
8608
8609 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X48, inplace) {
8610 TEST_REQUIRES_X86_AVX512F;
8611 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008612 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008613 .batch_size(batch_size)
8614 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008615 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008616 }
8617 }
8618#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8619
8620
8621#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8622 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X64, batch_eq_64) {
8623 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008624 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008625 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008626 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008627 }
8628
8629 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X64, batch_div_64) {
8630 TEST_REQUIRES_X86_AVX512F;
8631 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008632 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008633 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008634 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008635 }
8636 }
8637
8638 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X64, batch_lt_64) {
8639 TEST_REQUIRES_X86_AVX512F;
8640 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008641 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008642 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008643 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008644 }
8645 }
8646
8647 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X64, batch_gt_64) {
8648 TEST_REQUIRES_X86_AVX512F;
8649 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008650 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008651 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008652 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008653 }
8654 }
8655
8656 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X64, inplace) {
8657 TEST_REQUIRES_X86_AVX512F;
8658 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008659 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008660 .batch_size(batch_size)
8661 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008662 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008663 }
8664 }
8665#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8666
8667
8668#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8669 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X80, batch_eq_80) {
8670 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008671 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008672 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008673 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008674 }
8675
8676 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X80, batch_div_80) {
8677 TEST_REQUIRES_X86_AVX512F;
8678 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008679 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008680 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008681 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008682 }
8683 }
8684
8685 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X80, batch_lt_80) {
8686 TEST_REQUIRES_X86_AVX512F;
8687 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008688 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008689 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008690 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008691 }
8692 }
8693
8694 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X80, batch_gt_80) {
8695 TEST_REQUIRES_X86_AVX512F;
8696 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008697 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008698 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008699 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008700 }
8701 }
8702
8703 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X80, inplace) {
8704 TEST_REQUIRES_X86_AVX512F;
8705 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008706 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008707 .batch_size(batch_size)
8708 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008709 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008710 }
8711 }
8712#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8713
8714
8715#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8716 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X96, batch_eq_96) {
8717 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008718 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008719 .batch_size(96)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008720 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008721 }
8722
8723 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X96, batch_div_96) {
8724 TEST_REQUIRES_X86_AVX512F;
8725 for (size_t batch_size = 192; batch_size < 960; batch_size += 96) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008726 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008727 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008728 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008729 }
8730 }
8731
8732 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X96, batch_lt_96) {
8733 TEST_REQUIRES_X86_AVX512F;
8734 for (size_t batch_size = 1; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008735 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008736 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008737 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008738 }
8739 }
8740
8741 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X96, batch_gt_96) {
8742 TEST_REQUIRES_X86_AVX512F;
8743 for (size_t batch_size = 97; batch_size < 192; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008744 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008745 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008746 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008747 }
8748 }
8749
8750 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X96, inplace) {
8751 TEST_REQUIRES_X86_AVX512F;
8752 for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008753 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008754 .batch_size(batch_size)
8755 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008756 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008757 }
8758 }
8759#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8760
8761
8762#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8763 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X112, batch_eq_112) {
8764 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008765 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008766 .batch_size(112)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008767 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008768 }
8769
8770 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X112, batch_div_112) {
8771 TEST_REQUIRES_X86_AVX512F;
8772 for (size_t batch_size = 224; batch_size < 1120; batch_size += 112) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008773 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008774 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008775 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008776 }
8777 }
8778
8779 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X112, batch_lt_112) {
8780 TEST_REQUIRES_X86_AVX512F;
8781 for (size_t batch_size = 1; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008782 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008783 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008784 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008785 }
8786 }
8787
8788 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X112, batch_gt_112) {
8789 TEST_REQUIRES_X86_AVX512F;
8790 for (size_t batch_size = 113; batch_size < 224; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008791 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008792 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008793 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008794 }
8795 }
8796
8797 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X112, inplace) {
8798 TEST_REQUIRES_X86_AVX512F;
8799 for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008800 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008801 .batch_size(batch_size)
8802 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008803 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008804 }
8805 }
8806#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8807
8808
8809#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8810 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X128, batch_eq_128) {
8811 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008812 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008813 .batch_size(128)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008814 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008815 }
8816
8817 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X128, batch_div_128) {
8818 TEST_REQUIRES_X86_AVX512F;
8819 for (size_t batch_size = 256; batch_size < 1280; batch_size += 128) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008820 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008821 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008822 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008823 }
8824 }
8825
8826 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X128, batch_lt_128) {
8827 TEST_REQUIRES_X86_AVX512F;
8828 for (size_t batch_size = 1; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008829 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008830 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008831 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008832 }
8833 }
8834
8835 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X128, batch_gt_128) {
8836 TEST_REQUIRES_X86_AVX512F;
8837 for (size_t batch_size = 129; batch_size < 256; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008838 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008839 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008840 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008841 }
8842 }
8843
8844 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_DIV_X128, inplace) {
8845 TEST_REQUIRES_X86_AVX512F;
8846 for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008847 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008848 .batch_size(batch_size)
8849 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008850 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008851 }
8852 }
8853#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8854
8855
8856#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8857 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X16, batch_eq_16) {
8858 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008859 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008860 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008861 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008862 }
8863
8864 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X16, batch_div_16) {
8865 TEST_REQUIRES_X86_AVX512F;
8866 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008867 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008868 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008869 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008870 }
8871 }
8872
8873 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X16, batch_lt_16) {
8874 TEST_REQUIRES_X86_AVX512F;
8875 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008876 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008877 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008878 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008879 }
8880 }
8881
8882 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X16, batch_gt_16) {
8883 TEST_REQUIRES_X86_AVX512F;
8884 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008885 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008886 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008887 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008888 }
8889 }
8890
8891 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X16, inplace) {
8892 TEST_REQUIRES_X86_AVX512F;
8893 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008894 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008895 .batch_size(batch_size)
8896 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008897 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008898 }
8899 }
8900#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8901
8902
8903#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8904 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X32, batch_eq_32) {
8905 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008906 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008907 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008908 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008909 }
8910
8911 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X32, batch_div_32) {
8912 TEST_REQUIRES_X86_AVX512F;
8913 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008914 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008915 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008916 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008917 }
8918 }
8919
8920 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X32, batch_lt_32) {
8921 TEST_REQUIRES_X86_AVX512F;
8922 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008923 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008924 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008925 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008926 }
8927 }
8928
8929 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X32, batch_gt_32) {
8930 TEST_REQUIRES_X86_AVX512F;
8931 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008932 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008933 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008934 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008935 }
8936 }
8937
8938 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X32, inplace) {
8939 TEST_REQUIRES_X86_AVX512F;
8940 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008941 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008942 .batch_size(batch_size)
8943 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008944 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008945 }
8946 }
8947#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8948
8949
8950#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8951 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X48, batch_eq_48) {
8952 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008953 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008954 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008955 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008956 }
8957
8958 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X48, batch_div_48) {
8959 TEST_REQUIRES_X86_AVX512F;
8960 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008961 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008962 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008963 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008964 }
8965 }
8966
8967 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X48, batch_lt_48) {
8968 TEST_REQUIRES_X86_AVX512F;
8969 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008970 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008971 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008972 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008973 }
8974 }
8975
8976 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X48, batch_gt_48) {
8977 TEST_REQUIRES_X86_AVX512F;
8978 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008979 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008980 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008981 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008982 }
8983 }
8984
8985 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X48, inplace) {
8986 TEST_REQUIRES_X86_AVX512F;
8987 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07008988 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07008989 .batch_size(batch_size)
8990 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07008991 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07008992 }
8993 }
8994#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
8995
8996
8997#if XNN_ARCH_X86 || XNN_ARCH_X86_64
8998 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X64, batch_eq_64) {
8999 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009000 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009001 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009002 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009003 }
9004
9005 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X64, batch_div_64) {
9006 TEST_REQUIRES_X86_AVX512F;
9007 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009008 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009009 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009010 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009011 }
9012 }
9013
9014 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X64, batch_lt_64) {
9015 TEST_REQUIRES_X86_AVX512F;
9016 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009017 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009018 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009019 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009020 }
9021 }
9022
9023 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X64, batch_gt_64) {
9024 TEST_REQUIRES_X86_AVX512F;
9025 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009026 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009027 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009028 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009029 }
9030 }
9031
9032 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X64, inplace) {
9033 TEST_REQUIRES_X86_AVX512F;
9034 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009035 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009036 .batch_size(batch_size)
9037 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009038 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009039 }
9040 }
9041#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9042
9043
9044#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9045 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X80, batch_eq_80) {
9046 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009047 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009048 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009049 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009050 }
9051
9052 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X80, batch_div_80) {
9053 TEST_REQUIRES_X86_AVX512F;
9054 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009055 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009056 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009057 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009058 }
9059 }
9060
9061 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X80, batch_lt_80) {
9062 TEST_REQUIRES_X86_AVX512F;
9063 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009064 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009065 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009066 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009067 }
9068 }
9069
9070 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X80, batch_gt_80) {
9071 TEST_REQUIRES_X86_AVX512F;
9072 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009073 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009074 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009075 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009076 }
9077 }
9078
9079 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X80, inplace) {
9080 TEST_REQUIRES_X86_AVX512F;
9081 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009082 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009083 .batch_size(batch_size)
9084 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009085 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009086 }
9087 }
9088#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9089
9090
9091#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9092 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X96, batch_eq_96) {
9093 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009094 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009095 .batch_size(96)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009096 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009097 }
9098
9099 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X96, batch_div_96) {
9100 TEST_REQUIRES_X86_AVX512F;
9101 for (size_t batch_size = 192; batch_size < 960; batch_size += 96) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009102 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009103 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009104 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009105 }
9106 }
9107
9108 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X96, batch_lt_96) {
9109 TEST_REQUIRES_X86_AVX512F;
9110 for (size_t batch_size = 1; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009111 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009112 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009113 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009114 }
9115 }
9116
9117 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X96, batch_gt_96) {
9118 TEST_REQUIRES_X86_AVX512F;
9119 for (size_t batch_size = 97; batch_size < 192; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009120 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009121 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009122 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009123 }
9124 }
9125
9126 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X96, inplace) {
9127 TEST_REQUIRES_X86_AVX512F;
9128 for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009129 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009130 .batch_size(batch_size)
9131 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009132 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009133 }
9134 }
9135#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9136
9137
9138#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9139 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X112, batch_eq_112) {
9140 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009141 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009142 .batch_size(112)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009143 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009144 }
9145
9146 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X112, batch_div_112) {
9147 TEST_REQUIRES_X86_AVX512F;
9148 for (size_t batch_size = 224; batch_size < 1120; batch_size += 112) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009149 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009150 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009151 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009152 }
9153 }
9154
9155 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X112, batch_lt_112) {
9156 TEST_REQUIRES_X86_AVX512F;
9157 for (size_t batch_size = 1; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009158 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009159 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009160 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009161 }
9162 }
9163
9164 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X112, batch_gt_112) {
9165 TEST_REQUIRES_X86_AVX512F;
9166 for (size_t batch_size = 113; batch_size < 224; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009167 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009168 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009169 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009170 }
9171 }
9172
9173 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X112, inplace) {
9174 TEST_REQUIRES_X86_AVX512F;
9175 for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009176 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009177 .batch_size(batch_size)
9178 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009179 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009180 }
9181 }
9182#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9183
9184
9185#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9186 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X128, batch_eq_128) {
9187 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009188 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009189 .batch_size(128)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009190 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009191 }
9192
9193 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X128, batch_div_128) {
9194 TEST_REQUIRES_X86_AVX512F;
9195 for (size_t batch_size = 256; batch_size < 1280; batch_size += 128) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009196 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009197 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009198 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009199 }
9200 }
9201
9202 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X128, batch_lt_128) {
9203 TEST_REQUIRES_X86_AVX512F;
9204 for (size_t batch_size = 1; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009205 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009206 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009207 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009208 }
9209 }
9210
9211 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X128, batch_gt_128) {
9212 TEST_REQUIRES_X86_AVX512F;
9213 for (size_t batch_size = 129; batch_size < 256; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009214 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009215 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009216 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009217 }
9218 }
9219
9220 TEST(F32_VSIGMOID__AVX512F_RR1_LUT16_P3_PERM_SCALEF_NR1FMA_X128, inplace) {
9221 TEST_REQUIRES_X86_AVX512F;
9222 for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009223 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009224 .batch_size(batch_size)
9225 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009226 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009227 }
9228 }
9229#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9230
9231
9232#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9233 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X16, batch_eq_16) {
9234 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009235 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009236 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009237 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009238 }
9239
9240 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X16, batch_div_16) {
9241 TEST_REQUIRES_X86_AVX512F;
9242 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009243 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009244 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009245 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009246 }
9247 }
9248
9249 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X16, batch_lt_16) {
9250 TEST_REQUIRES_X86_AVX512F;
9251 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009252 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009253 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009254 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009255 }
9256 }
9257
9258 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X16, batch_gt_16) {
9259 TEST_REQUIRES_X86_AVX512F;
9260 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009261 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009262 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009263 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009264 }
9265 }
9266
9267 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X16, inplace) {
9268 TEST_REQUIRES_X86_AVX512F;
9269 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009270 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009271 .batch_size(batch_size)
9272 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009273 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009274 }
9275 }
9276#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9277
9278
9279#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9280 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X32, batch_eq_32) {
9281 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009282 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009283 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009284 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009285 }
9286
9287 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X32, batch_div_32) {
9288 TEST_REQUIRES_X86_AVX512F;
9289 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009290 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009291 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009292 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009293 }
9294 }
9295
9296 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X32, batch_lt_32) {
9297 TEST_REQUIRES_X86_AVX512F;
9298 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009299 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009300 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009301 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009302 }
9303 }
9304
9305 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X32, batch_gt_32) {
9306 TEST_REQUIRES_X86_AVX512F;
9307 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009308 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009309 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009310 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009311 }
9312 }
9313
9314 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X32, inplace) {
9315 TEST_REQUIRES_X86_AVX512F;
9316 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009317 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009318 .batch_size(batch_size)
9319 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009320 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009321 }
9322 }
9323#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9324
9325
9326#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9327 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X48, batch_eq_48) {
9328 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009329 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009330 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009331 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009332 }
9333
9334 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X48, batch_div_48) {
9335 TEST_REQUIRES_X86_AVX512F;
9336 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009337 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009338 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009339 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009340 }
9341 }
9342
9343 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X48, batch_lt_48) {
9344 TEST_REQUIRES_X86_AVX512F;
9345 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009346 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009347 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009348 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009349 }
9350 }
9351
9352 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X48, batch_gt_48) {
9353 TEST_REQUIRES_X86_AVX512F;
9354 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009355 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009356 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009357 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009358 }
9359 }
9360
9361 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X48, inplace) {
9362 TEST_REQUIRES_X86_AVX512F;
9363 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009364 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009365 .batch_size(batch_size)
9366 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009367 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009368 }
9369 }
9370#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9371
9372
9373#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9374 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X64, batch_eq_64) {
9375 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009376 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009377 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009378 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009379 }
9380
9381 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X64, batch_div_64) {
9382 TEST_REQUIRES_X86_AVX512F;
9383 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009384 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009385 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009386 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009387 }
9388 }
9389
9390 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X64, batch_lt_64) {
9391 TEST_REQUIRES_X86_AVX512F;
9392 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009393 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009394 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009395 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009396 }
9397 }
9398
9399 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X64, batch_gt_64) {
9400 TEST_REQUIRES_X86_AVX512F;
9401 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009402 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009403 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009404 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009405 }
9406 }
9407
9408 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X64, inplace) {
9409 TEST_REQUIRES_X86_AVX512F;
9410 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009411 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009412 .batch_size(batch_size)
9413 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009414 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009415 }
9416 }
9417#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9418
9419
9420#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9421 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X80, batch_eq_80) {
9422 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009423 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009424 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009425 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009426 }
9427
9428 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X80, batch_div_80) {
9429 TEST_REQUIRES_X86_AVX512F;
9430 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009431 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009432 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009433 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009434 }
9435 }
9436
9437 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X80, batch_lt_80) {
9438 TEST_REQUIRES_X86_AVX512F;
9439 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009440 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009441 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009442 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009443 }
9444 }
9445
9446 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X80, batch_gt_80) {
9447 TEST_REQUIRES_X86_AVX512F;
9448 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009449 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009450 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009451 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009452 }
9453 }
9454
9455 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X80, inplace) {
9456 TEST_REQUIRES_X86_AVX512F;
9457 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009458 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009459 .batch_size(batch_size)
9460 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009461 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009462 }
9463 }
9464#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9465
9466
9467#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9468 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X96, batch_eq_96) {
9469 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009470 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009471 .batch_size(96)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009472 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009473 }
9474
9475 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X96, batch_div_96) {
9476 TEST_REQUIRES_X86_AVX512F;
9477 for (size_t batch_size = 192; batch_size < 960; batch_size += 96) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009478 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009479 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009480 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009481 }
9482 }
9483
9484 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X96, batch_lt_96) {
9485 TEST_REQUIRES_X86_AVX512F;
9486 for (size_t batch_size = 1; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009487 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009488 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009489 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009490 }
9491 }
9492
9493 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X96, batch_gt_96) {
9494 TEST_REQUIRES_X86_AVX512F;
9495 for (size_t batch_size = 97; batch_size < 192; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009496 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009497 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009498 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009499 }
9500 }
9501
9502 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X96, inplace) {
9503 TEST_REQUIRES_X86_AVX512F;
9504 for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009505 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009506 .batch_size(batch_size)
9507 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009508 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009509 }
9510 }
9511#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9512
9513
9514#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9515 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X112, batch_eq_112) {
9516 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009517 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009518 .batch_size(112)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009519 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009520 }
9521
9522 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X112, batch_div_112) {
9523 TEST_REQUIRES_X86_AVX512F;
9524 for (size_t batch_size = 224; batch_size < 1120; batch_size += 112) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009525 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009526 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009527 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009528 }
9529 }
9530
9531 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X112, batch_lt_112) {
9532 TEST_REQUIRES_X86_AVX512F;
9533 for (size_t batch_size = 1; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009534 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009535 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009536 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009537 }
9538 }
9539
9540 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X112, batch_gt_112) {
9541 TEST_REQUIRES_X86_AVX512F;
9542 for (size_t batch_size = 113; batch_size < 224; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009543 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009544 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009545 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009546 }
9547 }
9548
9549 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X112, inplace) {
9550 TEST_REQUIRES_X86_AVX512F;
9551 for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009552 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009553 .batch_size(batch_size)
9554 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009555 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009556 }
9557 }
9558#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9559
9560
9561#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9562 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X128, batch_eq_128) {
9563 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009564 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009565 .batch_size(128)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009566 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009567 }
9568
9569 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X128, batch_div_128) {
9570 TEST_REQUIRES_X86_AVX512F;
9571 for (size_t batch_size = 256; batch_size < 1280; batch_size += 128) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009572 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009573 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009574 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009575 }
9576 }
9577
9578 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X128, batch_lt_128) {
9579 TEST_REQUIRES_X86_AVX512F;
9580 for (size_t batch_size = 1; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009581 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009582 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009583 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009584 }
9585 }
9586
9587 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X128, batch_gt_128) {
9588 TEST_REQUIRES_X86_AVX512F;
9589 for (size_t batch_size = 129; batch_size < 256; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009590 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009591 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009592 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009593 }
9594 }
9595
9596 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_DIV_X128, inplace) {
9597 TEST_REQUIRES_X86_AVX512F;
9598 for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009599 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009600 .batch_size(batch_size)
9601 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009602 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009603 }
9604 }
9605#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9606
9607
9608#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9609 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X16, batch_eq_16) {
9610 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009611 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009612 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009613 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009614 }
9615
9616 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X16, batch_div_16) {
9617 TEST_REQUIRES_X86_AVX512F;
9618 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009619 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009620 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009621 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009622 }
9623 }
9624
9625 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X16, batch_lt_16) {
9626 TEST_REQUIRES_X86_AVX512F;
9627 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009628 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009629 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009630 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009631 }
9632 }
9633
9634 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X16, batch_gt_16) {
9635 TEST_REQUIRES_X86_AVX512F;
9636 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009637 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009638 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009639 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009640 }
9641 }
9642
9643 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X16, inplace) {
9644 TEST_REQUIRES_X86_AVX512F;
9645 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009646 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009647 .batch_size(batch_size)
9648 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009649 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009650 }
9651 }
9652#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9653
9654
9655#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9656 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X32, batch_eq_32) {
9657 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009658 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009659 .batch_size(32)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009660 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009661 }
9662
9663 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X32, batch_div_32) {
9664 TEST_REQUIRES_X86_AVX512F;
9665 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009666 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009667 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009668 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009669 }
9670 }
9671
9672 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X32, batch_lt_32) {
9673 TEST_REQUIRES_X86_AVX512F;
9674 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009675 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009676 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009677 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009678 }
9679 }
9680
9681 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X32, batch_gt_32) {
9682 TEST_REQUIRES_X86_AVX512F;
9683 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009684 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009685 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009686 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009687 }
9688 }
9689
9690 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X32, inplace) {
9691 TEST_REQUIRES_X86_AVX512F;
9692 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009693 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009694 .batch_size(batch_size)
9695 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009696 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x32, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009697 }
9698 }
9699#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9700
9701
9702#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9703 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X48, batch_eq_48) {
9704 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009705 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009706 .batch_size(48)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009707 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009708 }
9709
9710 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X48, batch_div_48) {
9711 TEST_REQUIRES_X86_AVX512F;
9712 for (size_t batch_size = 96; batch_size < 480; batch_size += 48) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009713 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009714 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009715 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009716 }
9717 }
9718
9719 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X48, batch_lt_48) {
9720 TEST_REQUIRES_X86_AVX512F;
9721 for (size_t batch_size = 1; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009722 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009723 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009724 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009725 }
9726 }
9727
9728 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X48, batch_gt_48) {
9729 TEST_REQUIRES_X86_AVX512F;
9730 for (size_t batch_size = 49; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009731 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009732 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009733 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009734 }
9735 }
9736
9737 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X48, inplace) {
9738 TEST_REQUIRES_X86_AVX512F;
9739 for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009740 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009741 .batch_size(batch_size)
9742 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009743 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x48, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009744 }
9745 }
9746#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9747
9748
9749#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9750 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X64, batch_eq_64) {
9751 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009752 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009753 .batch_size(64)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009754 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009755 }
9756
9757 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X64, batch_div_64) {
9758 TEST_REQUIRES_X86_AVX512F;
9759 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009760 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009761 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009762 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009763 }
9764 }
9765
9766 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X64, batch_lt_64) {
9767 TEST_REQUIRES_X86_AVX512F;
9768 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009769 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009770 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009771 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009772 }
9773 }
9774
9775 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X64, batch_gt_64) {
9776 TEST_REQUIRES_X86_AVX512F;
9777 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009778 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009779 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009780 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009781 }
9782 }
9783
9784 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X64, inplace) {
9785 TEST_REQUIRES_X86_AVX512F;
9786 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009787 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009788 .batch_size(batch_size)
9789 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009790 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x64, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009791 }
9792 }
9793#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9794
9795
9796#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9797 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X80, batch_eq_80) {
9798 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009799 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009800 .batch_size(80)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009801 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009802 }
9803
9804 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X80, batch_div_80) {
9805 TEST_REQUIRES_X86_AVX512F;
9806 for (size_t batch_size = 160; batch_size < 800; batch_size += 80) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009807 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009808 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009809 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009810 }
9811 }
9812
9813 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X80, batch_lt_80) {
9814 TEST_REQUIRES_X86_AVX512F;
9815 for (size_t batch_size = 1; batch_size < 80; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009816 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009817 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009818 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009819 }
9820 }
9821
9822 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X80, batch_gt_80) {
9823 TEST_REQUIRES_X86_AVX512F;
9824 for (size_t batch_size = 81; batch_size < 160; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009825 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009826 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009827 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009828 }
9829 }
9830
9831 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X80, inplace) {
9832 TEST_REQUIRES_X86_AVX512F;
9833 for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009834 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009835 .batch_size(batch_size)
9836 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009837 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x80, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009838 }
9839 }
9840#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9841
9842
9843#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9844 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X96, batch_eq_96) {
9845 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009846 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009847 .batch_size(96)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009848 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009849 }
9850
9851 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X96, batch_div_96) {
9852 TEST_REQUIRES_X86_AVX512F;
9853 for (size_t batch_size = 192; batch_size < 960; batch_size += 96) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009854 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009855 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009856 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009857 }
9858 }
9859
9860 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X96, batch_lt_96) {
9861 TEST_REQUIRES_X86_AVX512F;
9862 for (size_t batch_size = 1; batch_size < 96; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009863 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009864 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009865 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009866 }
9867 }
9868
9869 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X96, batch_gt_96) {
9870 TEST_REQUIRES_X86_AVX512F;
9871 for (size_t batch_size = 97; batch_size < 192; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009872 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009873 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009874 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009875 }
9876 }
9877
9878 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X96, inplace) {
9879 TEST_REQUIRES_X86_AVX512F;
9880 for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009881 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009882 .batch_size(batch_size)
9883 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009884 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x96, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009885 }
9886 }
9887#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9888
9889
9890#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9891 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X112, batch_eq_112) {
9892 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009893 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009894 .batch_size(112)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009895 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009896 }
9897
9898 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X112, batch_div_112) {
9899 TEST_REQUIRES_X86_AVX512F;
9900 for (size_t batch_size = 224; batch_size < 1120; batch_size += 112) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009901 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009902 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009903 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009904 }
9905 }
9906
9907 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X112, batch_lt_112) {
9908 TEST_REQUIRES_X86_AVX512F;
9909 for (size_t batch_size = 1; batch_size < 112; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009910 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009911 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009912 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009913 }
9914 }
9915
9916 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X112, batch_gt_112) {
9917 TEST_REQUIRES_X86_AVX512F;
9918 for (size_t batch_size = 113; batch_size < 224; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009919 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009920 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009921 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009922 }
9923 }
9924
9925 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X112, inplace) {
9926 TEST_REQUIRES_X86_AVX512F;
9927 for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009928 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009929 .batch_size(batch_size)
9930 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009931 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x112, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009932 }
9933 }
9934#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9935
9936
9937#if XNN_ARCH_X86 || XNN_ARCH_X86_64
9938 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X128, batch_eq_128) {
9939 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009940 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009941 .batch_size(128)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009942 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009943 }
9944
9945 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X128, batch_div_128) {
9946 TEST_REQUIRES_X86_AVX512F;
9947 for (size_t batch_size = 256; batch_size < 1280; batch_size += 128) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009948 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009949 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009950 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009951 }
9952 }
9953
9954 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X128, batch_lt_128) {
9955 TEST_REQUIRES_X86_AVX512F;
9956 for (size_t batch_size = 1; batch_size < 128; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009957 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009958 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009959 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009960 }
9961 }
9962
9963 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X128, batch_gt_128) {
9964 TEST_REQUIRES_X86_AVX512F;
9965 for (size_t batch_size = 129; batch_size < 256; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009966 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009967 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009968 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009969 }
9970 }
9971
9972 TEST(F32_VSIGMOID__AVX512F_RR2_LUT32_P2_PERM2_SCALEF_NR1FMA_X128, inplace) {
9973 TEST_REQUIRES_X86_AVX512F;
9974 for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009975 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009976 .batch_size(batch_size)
9977 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009978 .Test(xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_nr1fma_x128, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009979 }
9980 }
9981#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
9982
9983
Marat Dukhan4c617792021-12-21 15:47:58 -08009984#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -07009985 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X4, batch_eq_4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009986 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009987 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009988 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009989 }
9990
9991 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X4, batch_div_4) {
9992 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -07009993 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -07009994 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -07009995 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -07009996 }
9997 }
9998
9999 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X4, batch_lt_4) {
10000 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010001 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010002 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010003 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010004 }
10005 }
10006
10007 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X4, batch_gt_4) {
10008 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010009 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010010 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010011 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010012 }
10013 }
10014
10015 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X4, inplace) {
10016 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010017 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010018 .batch_size(batch_size)
10019 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010020 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010021 }
10022 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010023#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010024
10025
Marat Dukhan4c617792021-12-21 15:47:58 -080010026#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010027 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X8, batch_eq_8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010028 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010029 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010030 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010031 }
10032
10033 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X8, batch_div_8) {
10034 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010035 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010036 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010037 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010038 }
10039 }
10040
10041 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X8, batch_lt_8) {
10042 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010043 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010044 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010045 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010046 }
10047 }
10048
10049 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X8, batch_gt_8) {
10050 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010051 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010052 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010053 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010054 }
10055 }
10056
10057 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X8, inplace) {
10058 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010059 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010060 .batch_size(batch_size)
10061 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010062 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010063 }
10064 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010065#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010066
10067
Marat Dukhan4c617792021-12-21 15:47:58 -080010068#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010069 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X12, batch_eq_12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010070 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010071 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010072 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010073 }
10074
10075 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X12, batch_div_12) {
10076 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010077 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010078 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010079 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010080 }
10081 }
10082
10083 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X12, batch_lt_12) {
10084 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010085 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010086 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010087 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010088 }
10089 }
10090
10091 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X12, batch_gt_12) {
10092 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010093 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010094 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010095 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010096 }
10097 }
10098
10099 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X12, inplace) {
10100 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010101 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010102 .batch_size(batch_size)
10103 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010104 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010105 }
10106 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010107#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010108
10109
Marat Dukhan4c617792021-12-21 15:47:58 -080010110#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010111 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X16, batch_eq_16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010112 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010113 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010114 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010115 }
10116
10117 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X16, batch_div_16) {
10118 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010119 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010120 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010121 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010122 }
10123 }
10124
10125 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X16, batch_lt_16) {
10126 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010127 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010128 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010129 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010130 }
10131 }
10132
10133 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X16, batch_gt_16) {
10134 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010135 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010136 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010137 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010138 }
10139 }
10140
10141 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X16, inplace) {
10142 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010143 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010144 .batch_size(batch_size)
10145 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010146 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010147 }
10148 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010149#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010150
10151
Marat Dukhan4c617792021-12-21 15:47:58 -080010152#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010153 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X20, batch_eq_20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010154 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010155 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010156 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010157 }
10158
10159 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X20, batch_div_20) {
10160 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010161 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010162 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010163 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010164 }
10165 }
10166
10167 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X20, batch_lt_20) {
10168 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010169 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010170 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010171 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010172 }
10173 }
10174
10175 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X20, batch_gt_20) {
10176 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010177 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010178 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010179 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010180 }
10181 }
10182
10183 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X20, inplace) {
10184 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010185 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010186 .batch_size(batch_size)
10187 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010188 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010189 }
10190 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010191#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010192
10193
Marat Dukhan4c617792021-12-21 15:47:58 -080010194#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010195 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X24, batch_eq_24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010196 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010197 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010198 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010199 }
10200
10201 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X24, batch_div_24) {
10202 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010203 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010204 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010205 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010206 }
10207 }
10208
10209 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X24, batch_lt_24) {
10210 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010211 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010212 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010213 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010214 }
10215 }
10216
10217 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X24, batch_gt_24) {
10218 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010219 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010220 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010221 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010222 }
10223 }
10224
10225 TEST(F32_VSIGMOID__WASMSIMD_P5_DIV_X24, inplace) {
10226 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010227 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010228 .batch_size(batch_size)
10229 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010230 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_p5_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010231 }
10232 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010233#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010234
10235
Marat Dukhan4c617792021-12-21 15:47:58 -080010236#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010237 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X4, batch_eq_4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010238 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010239 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010240 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010241 }
10242
10243 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X4, batch_div_4) {
10244 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010245 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010246 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010247 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010248 }
10249 }
10250
10251 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X4, batch_lt_4) {
10252 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010253 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010254 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010255 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010256 }
10257 }
10258
10259 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X4, batch_gt_4) {
10260 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010261 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010262 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010263 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010264 }
10265 }
10266
10267 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X4, inplace) {
10268 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010269 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010270 .batch_size(batch_size)
10271 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010272 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010273 }
10274 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010275#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010276
10277
Marat Dukhan4c617792021-12-21 15:47:58 -080010278#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010279 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X8, batch_eq_8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010280 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010281 .batch_size(8)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010282 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010283 }
10284
10285 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X8, batch_div_8) {
10286 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010287 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010288 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010289 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010290 }
10291 }
10292
10293 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X8, batch_lt_8) {
10294 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010295 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010296 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010297 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010298 }
10299 }
10300
10301 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X8, batch_gt_8) {
10302 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010303 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010304 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010305 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010306 }
10307 }
10308
10309 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X8, inplace) {
10310 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010311 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010312 .batch_size(batch_size)
10313 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010314 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x8, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010315 }
10316 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010317#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010318
10319
Marat Dukhan4c617792021-12-21 15:47:58 -080010320#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010321 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X12, batch_eq_12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010322 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010323 .batch_size(12)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010324 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010325 }
10326
10327 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X12, batch_div_12) {
10328 for (size_t batch_size = 24; batch_size < 120; batch_size += 12) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010329 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010330 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010331 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010332 }
10333 }
10334
10335 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X12, batch_lt_12) {
10336 for (size_t batch_size = 1; batch_size < 12; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010337 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010338 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010339 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010340 }
10341 }
10342
10343 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X12, batch_gt_12) {
10344 for (size_t batch_size = 13; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010345 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010346 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010347 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010348 }
10349 }
10350
10351 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X12, inplace) {
10352 for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010353 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010354 .batch_size(batch_size)
10355 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010356 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x12, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010357 }
10358 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010359#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010360
10361
Marat Dukhan4c617792021-12-21 15:47:58 -080010362#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010363 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X16, batch_eq_16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010364 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010365 .batch_size(16)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010366 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010367 }
10368
10369 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X16, batch_div_16) {
10370 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010371 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010372 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010373 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010374 }
10375 }
10376
10377 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X16, batch_lt_16) {
10378 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010379 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010380 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010381 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010382 }
10383 }
10384
10385 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X16, batch_gt_16) {
10386 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010387 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010388 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010389 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010390 }
10391 }
10392
10393 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X16, inplace) {
10394 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010395 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010396 .batch_size(batch_size)
10397 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010398 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x16, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010399 }
10400 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010401#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010402
10403
Marat Dukhan4c617792021-12-21 15:47:58 -080010404#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010405 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X20, batch_eq_20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010406 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010407 .batch_size(20)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010408 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010409 }
10410
10411 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X20, batch_div_20) {
10412 for (size_t batch_size = 40; batch_size < 200; batch_size += 20) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010413 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010414 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010415 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010416 }
10417 }
10418
10419 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X20, batch_lt_20) {
10420 for (size_t batch_size = 1; batch_size < 20; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010421 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010422 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010423 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010424 }
10425 }
10426
10427 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X20, batch_gt_20) {
10428 for (size_t batch_size = 21; batch_size < 40; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010429 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010430 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010431 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010432 }
10433 }
10434
10435 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X20, inplace) {
10436 for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010437 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010438 .batch_size(batch_size)
10439 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010440 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x20, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010441 }
10442 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010443#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010444
10445
Marat Dukhan4c617792021-12-21 15:47:58 -080010446#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010447 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X24, batch_eq_24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010448 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010449 .batch_size(24)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010450 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010451 }
10452
10453 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X24, batch_div_24) {
10454 for (size_t batch_size = 48; batch_size < 240; batch_size += 24) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010455 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010456 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010457 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010458 }
10459 }
10460
10461 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X24, batch_lt_24) {
10462 for (size_t batch_size = 1; batch_size < 24; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010463 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010464 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010465 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010466 }
10467 }
10468
10469 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X24, batch_gt_24) {
10470 for (size_t batch_size = 25; batch_size < 48; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010471 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010472 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010473 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010474 }
10475 }
10476
10477 TEST(F32_VSIGMOID__WASMSIMD_LUT64_P2_DIV_X24, inplace) {
10478 for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010479 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010480 .batch_size(batch_size)
10481 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010482 .Test(xnn_f32_vsigmoid_ukernel__wasmsimd_lut64_p2_div_x24, VUnaryMicrokernelTester::OpType::Sigmoid);
Marat Dukhan6674d692021-05-05 22:27:00 -070010483 }
10484 }
Marat Dukhan4c617792021-12-21 15:47:58 -080010485#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -070010486
10487
10488TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X1, batch_eq_1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010489 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010490 .batch_size(1)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010491 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010492}
10493
10494TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X1, batch_gt_1) {
10495 for (size_t batch_size = 2; batch_size < 10; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010496 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010497 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010498 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010499 }
10500}
10501
10502TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X1, inplace) {
10503 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010504 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010505 .batch_size(batch_size)
10506 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010507 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010508 }
10509}
10510
10511
10512TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X2, batch_eq_2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010513 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010514 .batch_size(2)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010515 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010516}
10517
10518TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X2, batch_div_2) {
10519 for (size_t batch_size = 4; batch_size < 20; batch_size += 2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010520 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010521 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010522 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010523 }
10524}
10525
10526TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X2, batch_lt_2) {
10527 for (size_t batch_size = 1; batch_size < 2; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010528 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010529 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010530 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010531 }
10532}
10533
10534TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X2, batch_gt_2) {
10535 for (size_t batch_size = 3; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010536 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010537 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010538 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010539 }
10540}
10541
10542TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X2, inplace) {
10543 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010544 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010545 .batch_size(batch_size)
10546 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010547 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010548 }
10549}
10550
10551
10552TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X4, batch_eq_4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010553 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010554 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010555 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010556}
10557
10558TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X4, batch_div_4) {
10559 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010560 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010561 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010562 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010563 }
10564}
10565
10566TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X4, batch_lt_4) {
10567 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010568 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010569 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010570 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010571 }
10572}
10573
10574TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X4, batch_gt_4) {
10575 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010576 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010577 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010578 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010579 }
10580}
10581
10582TEST(F32_VSIGMOID__SCALAR_LUT2048_P1_DIV_X4, inplace) {
10583 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010584 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010585 .batch_size(batch_size)
10586 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010587 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut2048_p1_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010588 }
10589}
10590
10591
10592TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X1, batch_eq_1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010593 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010594 .batch_size(1)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010595 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010596}
10597
10598TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X1, batch_gt_1) {
10599 for (size_t batch_size = 2; batch_size < 10; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010600 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010601 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010602 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010603 }
10604}
10605
10606TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X1, inplace) {
10607 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010608 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010609 .batch_size(batch_size)
10610 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010611 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010612 }
10613}
10614
10615
10616TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X2, batch_eq_2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010617 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010618 .batch_size(2)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010619 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010620}
10621
10622TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X2, batch_div_2) {
10623 for (size_t batch_size = 4; batch_size < 20; batch_size += 2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010624 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010625 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010626 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010627 }
10628}
10629
10630TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X2, batch_lt_2) {
10631 for (size_t batch_size = 1; batch_size < 2; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010632 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010633 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010634 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010635 }
10636}
10637
10638TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X2, batch_gt_2) {
10639 for (size_t batch_size = 3; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010640 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010641 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010642 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010643 }
10644}
10645
10646TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X2, inplace) {
10647 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010648 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010649 .batch_size(batch_size)
10650 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010651 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010652 }
10653}
10654
10655
10656TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X4, batch_eq_4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010657 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010658 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010659 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010660}
10661
10662TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X4, batch_div_4) {
10663 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010664 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010665 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010666 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010667 }
10668}
10669
10670TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X4, batch_lt_4) {
10671 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010672 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010673 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010674 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010675 }
10676}
10677
10678TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X4, batch_gt_4) {
10679 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010680 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010681 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010682 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010683 }
10684}
10685
10686TEST(F32_VSIGMOID__SCALAR_LUT64_P2_DIV_X4, inplace) {
10687 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010688 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010689 .batch_size(batch_size)
10690 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010691 .Test(xnn_f32_vsigmoid_ukernel__scalar_lut64_p2_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010692 }
10693}
10694
10695
10696TEST(F32_VSIGMOID__SCALAR_P5_DIV_X1, batch_eq_1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010697 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010698 .batch_size(1)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010699 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010700}
10701
10702TEST(F32_VSIGMOID__SCALAR_P5_DIV_X1, batch_gt_1) {
10703 for (size_t batch_size = 2; batch_size < 10; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010704 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010705 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010706 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010707 }
10708}
10709
10710TEST(F32_VSIGMOID__SCALAR_P5_DIV_X1, inplace) {
10711 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010712 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010713 .batch_size(batch_size)
10714 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010715 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x1, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010716 }
10717}
10718
10719
10720TEST(F32_VSIGMOID__SCALAR_P5_DIV_X2, batch_eq_2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010721 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010722 .batch_size(2)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010723 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010724}
10725
10726TEST(F32_VSIGMOID__SCALAR_P5_DIV_X2, batch_div_2) {
10727 for (size_t batch_size = 4; batch_size < 20; batch_size += 2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010728 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010729 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010730 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010731 }
10732}
10733
10734TEST(F32_VSIGMOID__SCALAR_P5_DIV_X2, batch_lt_2) {
10735 for (size_t batch_size = 1; batch_size < 2; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010736 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010737 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010738 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010739 }
10740}
10741
10742TEST(F32_VSIGMOID__SCALAR_P5_DIV_X2, batch_gt_2) {
10743 for (size_t batch_size = 3; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010744 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010745 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010746 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010747 }
10748}
10749
10750TEST(F32_VSIGMOID__SCALAR_P5_DIV_X2, inplace) {
10751 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010752 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010753 .batch_size(batch_size)
10754 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010755 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x2, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010756 }
10757}
10758
10759
10760TEST(F32_VSIGMOID__SCALAR_P5_DIV_X4, batch_eq_4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010761 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010762 .batch_size(4)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010763 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010764}
10765
10766TEST(F32_VSIGMOID__SCALAR_P5_DIV_X4, batch_div_4) {
10767 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010768 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010769 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010770 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010771 }
10772}
10773
10774TEST(F32_VSIGMOID__SCALAR_P5_DIV_X4, batch_lt_4) {
10775 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010776 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010777 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010778 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010779 }
10780}
10781
10782TEST(F32_VSIGMOID__SCALAR_P5_DIV_X4, batch_gt_4) {
10783 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010784 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010785 .batch_size(batch_size)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010786 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010787 }
10788}
10789
10790TEST(F32_VSIGMOID__SCALAR_P5_DIV_X4, inplace) {
10791 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070010792 VUnaryMicrokernelTester()
Marat Dukhan6674d692021-05-05 22:27:00 -070010793 .batch_size(batch_size)
10794 .inplace(true)
Marat Dukhan6eaab712021-05-13 15:20:58 -070010795 .Test(xnn_f32_vsigmoid_ukernel__scalar_p5_div_x4, VUnaryMicrokernelTester::OpType::Sigmoid, VUnaryMicrokernelTester::Variant::Scalar);
Marat Dukhan6674d692021-05-05 22:27:00 -070010796 }
10797}