Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 1 | // Auto-generated file. Do not edit! |
| 2 | // Template: src/qs8-igemm/MRx4c8-wasmsimd-dot16x2.c.in |
| 3 | // Generator: tools/xngen |
| 4 | // |
| 5 | // Copyright 2021 Google LLC |
| 6 | // |
| 7 | // This source code is licensed under the BSD-style license found in the |
| 8 | // LICENSE file in the root directory of this source tree. |
| 9 | |
| 10 | #include <assert.h> |
| 11 | |
| 12 | #include <wasm_simd128.h> |
| 13 | |
| 14 | #include <xnnpack/gemm.h> |
| 15 | #include <xnnpack/math.h> |
| 16 | |
| 17 | |
| 18 | void xnn_qc8_igemm_minmax_fp32_ukernel_4x4c8__wasmsimd_dot16x2_ld128( |
| 19 | size_t mr, |
| 20 | size_t nc, |
| 21 | size_t kc, |
| 22 | size_t ks, |
| 23 | const int8_t** restrict a, |
| 24 | const void* restrict w, |
| 25 | int8_t* restrict c, |
| 26 | size_t cm_stride, |
| 27 | size_t cn_stride, |
| 28 | size_t a_offset, |
| 29 | const int8_t* zero, |
| 30 | const union xnn_qs8_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN XNN_DISABLE_MSAN |
| 31 | { |
| 32 | assert(mr != 0); |
| 33 | assert(mr <= 4); |
| 34 | assert(nc != 0); |
| 35 | assert(kc != 0); |
| 36 | assert(ks != 0); |
| 37 | assert(ks % (4 * sizeof(void*)) == 0); |
| 38 | assert(a_offset % sizeof(int8_t) == 0); |
| 39 | assert(a != NULL); |
| 40 | assert(w != NULL); |
| 41 | assert(c != NULL); |
| 42 | |
| 43 | kc = round_up_po2(kc, 8); |
| 44 | int8_t* c0 = c; |
| 45 | int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); |
| 46 | if XNN_UNPREDICTABLE(mr < 2) { |
| 47 | c1 = c0; |
| 48 | } |
| 49 | int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride); |
| 50 | if XNN_UNPREDICTABLE(mr <= 2) { |
| 51 | c2 = c1; |
| 52 | } |
| 53 | int8_t* c3 = (int8_t*) ((uintptr_t) c2 + cm_stride); |
| 54 | if XNN_UNPREDICTABLE(mr != 4) { |
| 55 | c3 = c2; |
| 56 | } |
| 57 | |
| 58 | do { |
| 59 | v128_t vacc0x0 = wasm_f32x4_replace_lane(wasm_f32x4_const_splat(0.0f), 0, ((const float*) w)[0]); |
| 60 | v128_t vacc0x1 = wasm_f32x4_replace_lane(wasm_f32x4_const_splat(0.0f), 0, ((const float*) w)[1]); |
| 61 | v128_t vacc0x2 = wasm_f32x4_replace_lane(wasm_f32x4_const_splat(0.0f), 0, ((const float*) w)[2]); |
| 62 | v128_t vacc0x3 = wasm_f32x4_replace_lane(wasm_f32x4_const_splat(0.0f), 0, ((const float*) w)[3]); |
| 63 | v128_t vacc1x0 = vacc0x0; |
| 64 | v128_t vacc1x1 = vacc0x1; |
| 65 | v128_t vacc1x2 = vacc0x2; |
| 66 | v128_t vacc1x3 = vacc0x3; |
| 67 | v128_t vacc2x0 = vacc0x0; |
| 68 | v128_t vacc2x1 = vacc0x1; |
| 69 | v128_t vacc2x2 = vacc0x2; |
| 70 | v128_t vacc2x3 = vacc0x3; |
| 71 | v128_t vacc3x0 = vacc0x0; |
| 72 | v128_t vacc3x1 = vacc0x1; |
| 73 | v128_t vacc3x2 = vacc0x2; |
| 74 | v128_t vacc3x3 = vacc0x3; |
| 75 | w = (const void*) ((const int32_t*) w + 4); |
| 76 | |
| 77 | size_t p = ks; |
| 78 | do { |
| 79 | const int8_t* restrict a0 = a[0]; |
| 80 | if XNN_UNPREDICTABLE(a0 != zero) { |
| 81 | a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); |
| 82 | } |
| 83 | const int8_t* restrict a1 = a[1]; |
| 84 | if XNN_UNPREDICTABLE(a1 != zero) { |
| 85 | a1 = (const int8_t*) ((uintptr_t) a1 + a_offset); |
| 86 | } |
| 87 | const int8_t* restrict a2 = a[2]; |
| 88 | if XNN_UNPREDICTABLE(a2 != zero) { |
| 89 | a2 = (const int8_t*) ((uintptr_t) a2 + a_offset); |
| 90 | } |
| 91 | const int8_t* restrict a3 = a[3]; |
| 92 | if XNN_UNPREDICTABLE(a3 != zero) { |
| 93 | a3 = (const int8_t*) ((uintptr_t) a3 + a_offset); |
| 94 | } |
| 95 | a += 4; |
| 96 | |
| 97 | size_t k = 0; |
| 98 | while (k < kc) { |
| 99 | const v128_t vxa0 = wasm_i16x8_load8x8(a0); |
| 100 | a0 += 8; |
| 101 | const v128_t vxa1 = wasm_i16x8_load8x8(a1); |
| 102 | a1 += 8; |
| 103 | const v128_t vxa2 = wasm_i16x8_load8x8(a2); |
| 104 | a2 += 8; |
| 105 | const v128_t vxa3 = wasm_i16x8_load8x8(a3); |
| 106 | a3 += 8; |
| 107 | |
| 108 | const v128_t vb01 = wasm_v128_load(w); |
| 109 | const v128_t vxb0 = wasm_i16x8_extend_low_i8x16(vb01); |
| 110 | const v128_t vxb1 = wasm_i16x8_extend_high_i8x16(vb01); |
| 111 | |
| 112 | vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_dot_i16x8(vxa0, vxb0)); |
Marat Dukhan | e7e001f | 2021-08-31 21:58:11 -0700 | [diff] [blame^] | 113 | vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_dot_i16x8(vxa0, vxb1)); |
Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 114 | vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_dot_i16x8(vxa1, vxb0)); |
Marat Dukhan | e7e001f | 2021-08-31 21:58:11 -0700 | [diff] [blame^] | 115 | vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_dot_i16x8(vxa1, vxb1)); |
Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 116 | vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_dot_i16x8(vxa2, vxb0)); |
Marat Dukhan | e7e001f | 2021-08-31 21:58:11 -0700 | [diff] [blame^] | 117 | vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_dot_i16x8(vxa2, vxb1)); |
Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 118 | vacc3x0 = wasm_i32x4_add(vacc3x0, wasm_i32x4_dot_i16x8(vxa3, vxb0)); |
Marat Dukhan | e7e001f | 2021-08-31 21:58:11 -0700 | [diff] [blame^] | 119 | vacc3x1 = wasm_i32x4_add(vacc3x1, wasm_i32x4_dot_i16x8(vxa3, vxb1)); |
Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 120 | const v128_t vb23 = wasm_v128_load((const int8_t*) w + 16); |
| 121 | const v128_t vxb2 = wasm_i16x8_extend_low_i8x16(vb23); |
| 122 | const v128_t vxb3 = wasm_i16x8_extend_high_i8x16(vb23); |
| 123 | |
| 124 | vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_dot_i16x8(vxa0, vxb2)); |
Marat Dukhan | e7e001f | 2021-08-31 21:58:11 -0700 | [diff] [blame^] | 125 | vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_dot_i16x8(vxa0, vxb3)); |
Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 126 | vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_dot_i16x8(vxa1, vxb2)); |
Marat Dukhan | e7e001f | 2021-08-31 21:58:11 -0700 | [diff] [blame^] | 127 | vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_dot_i16x8(vxa1, vxb3)); |
Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 128 | vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_dot_i16x8(vxa2, vxb2)); |
Marat Dukhan | e7e001f | 2021-08-31 21:58:11 -0700 | [diff] [blame^] | 129 | vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_dot_i16x8(vxa2, vxb3)); |
Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 130 | vacc3x2 = wasm_i32x4_add(vacc3x2, wasm_i32x4_dot_i16x8(vxa3, vxb2)); |
Marat Dukhan | e7e001f | 2021-08-31 21:58:11 -0700 | [diff] [blame^] | 131 | vacc3x3 = wasm_i32x4_add(vacc3x3, wasm_i32x4_dot_i16x8(vxa3, vxb3)); |
Marat Dukhan | 8dc106e | 2021-08-31 15:23:02 -0700 | [diff] [blame] | 132 | |
| 133 | w = (const void*) ((const int8_t*) w + 32); |
| 134 | k += 8 * sizeof(int8_t); |
| 135 | } |
| 136 | p -= 4 * sizeof(void*); |
| 137 | } while (p != 0); |
| 138 | |
| 139 | const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); |
| 140 | const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); |
| 141 | const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); |
| 142 | const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); |
| 143 | const v128_t vacc2x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x0, vacc2x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x0, vacc2x2, 2, 6, 3, 7)); |
| 144 | const v128_t vacc2x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x1, vacc2x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x1, vacc2x3, 2, 6, 3, 7)); |
| 145 | const v128_t vacc3x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc3x0, vacc3x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc3x0, vacc3x2, 2, 6, 3, 7)); |
| 146 | const v128_t vacc3x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc3x1, vacc3x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc3x1, vacc3x3, 2, 6, 3, 7)); |
| 147 | |
| 148 | v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); |
| 149 | v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); |
| 150 | v128_t vacc2x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x02, vacc2x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x02, vacc2x13, 2, 6, 3, 7)); |
| 151 | v128_t vacc3x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc3x02, vacc3x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc3x02, vacc3x13, 2, 6, 3, 7)); |
| 152 | |
| 153 | vacc0x0123 = wasm_f32x4_convert_i32x4(vacc0x0123); |
| 154 | vacc1x0123 = wasm_f32x4_convert_i32x4(vacc1x0123); |
| 155 | vacc2x0123 = wasm_f32x4_convert_i32x4(vacc2x0123); |
| 156 | vacc3x0123 = wasm_f32x4_convert_i32x4(vacc3x0123); |
| 157 | |
| 158 | const v128_t vscale0123 = wasm_v128_load(w); |
| 159 | w = (const void*) ((const float*) w + 4); |
| 160 | vacc0x0123 = wasm_f32x4_mul(vacc0x0123, vscale0123); |
| 161 | vacc1x0123 = wasm_f32x4_mul(vacc1x0123, vscale0123); |
| 162 | vacc2x0123 = wasm_f32x4_mul(vacc2x0123, vscale0123); |
| 163 | vacc3x0123 = wasm_f32x4_mul(vacc3x0123, vscale0123); |
| 164 | |
| 165 | const v128_t voutput_min_less_zero_point = wasm_v128_load(params->wasmsimd.output_min_less_zero_point); |
| 166 | vacc0x0123 = wasm_f32x4_max(voutput_min_less_zero_point, vacc0x0123); |
| 167 | vacc1x0123 = wasm_f32x4_max(voutput_min_less_zero_point, vacc1x0123); |
| 168 | vacc2x0123 = wasm_f32x4_max(voutput_min_less_zero_point, vacc2x0123); |
| 169 | vacc3x0123 = wasm_f32x4_max(voutput_min_less_zero_point, vacc3x0123); |
| 170 | |
| 171 | const v128_t voutput_max_less_zero_point = wasm_v128_load(params->wasmsimd.output_max_less_zero_point); |
| 172 | vacc0x0123 = wasm_f32x4_min(voutput_max_less_zero_point, vacc0x0123); |
| 173 | vacc1x0123 = wasm_f32x4_min(voutput_max_less_zero_point, vacc1x0123); |
| 174 | vacc2x0123 = wasm_f32x4_min(voutput_max_less_zero_point, vacc2x0123); |
| 175 | vacc3x0123 = wasm_f32x4_min(voutput_max_less_zero_point, vacc3x0123); |
| 176 | |
| 177 | const v128_t vmagic_bias = wasm_v128_load(params->wasmsimd.magic_bias); |
| 178 | vacc0x0123 = wasm_f32x4_add(vacc0x0123, vmagic_bias); |
| 179 | vacc1x0123 = wasm_f32x4_add(vacc1x0123, vmagic_bias); |
| 180 | vacc2x0123 = wasm_f32x4_add(vacc2x0123, vmagic_bias); |
| 181 | vacc3x0123 = wasm_f32x4_add(vacc3x0123, vmagic_bias); |
| 182 | |
| 183 | const v128_t vmagic_bias_less_output_zero_point = wasm_v128_load(params->wasmsimd.magic_bias_less_output_zero_point); |
| 184 | vacc0x0123 = wasm_i32x4_sub(vacc0x0123, vmagic_bias_less_output_zero_point); |
| 185 | vacc1x0123 = wasm_i32x4_sub(vacc1x0123, vmagic_bias_less_output_zero_point); |
| 186 | vacc2x0123 = wasm_i32x4_sub(vacc2x0123, vmagic_bias_less_output_zero_point); |
| 187 | vacc3x0123 = wasm_i32x4_sub(vacc3x0123, vmagic_bias_less_output_zero_point); |
| 188 | |
| 189 | v128_t vacc01x0123 = wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123); |
| 190 | v128_t vacc23x0123 = wasm_i16x8_narrow_i32x4(vacc2x0123, vacc3x0123); |
| 191 | |
| 192 | v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc23x0123); |
| 193 | |
| 194 | if (nc >= 4) { |
| 195 | *((float*) c3) = (float) wasm_f32x4_extract_lane(vout, 3); |
| 196 | *((float*) c2) = (float) wasm_f32x4_extract_lane(vout, 2); |
| 197 | *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); |
| 198 | *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); |
| 199 | |
| 200 | c3 = (int8_t*) ((uintptr_t) c3 + cn_stride); |
| 201 | c2 = (int8_t*) ((uintptr_t) c2 + cn_stride); |
| 202 | c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); |
| 203 | c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); |
| 204 | |
| 205 | a = (const int8_t**restrict) ((uintptr_t) a - ks); |
| 206 | |
| 207 | nc -= 4; |
| 208 | } else { |
| 209 | uint32_t vout3 = wasm_i32x4_extract_lane(vout, 3); |
| 210 | uint32_t vout2 = wasm_i32x4_extract_lane(vout, 2); |
| 211 | uint32_t vout1 = wasm_i32x4_extract_lane(vout, 1); |
| 212 | uint32_t vout0 = wasm_i32x4_extract_lane(vout, 0); |
| 213 | if (nc & 2) { |
| 214 | *((uint16_t*) c3) = (uint16_t) vout3; |
| 215 | vout3 >>= 16; |
| 216 | c3 += 2; |
| 217 | *((uint16_t*) c2) = (uint16_t) vout2; |
| 218 | vout2 >>= 16; |
| 219 | c2 += 2; |
| 220 | *((uint16_t*) c1) = (uint16_t) vout1; |
| 221 | vout1 >>= 16; |
| 222 | c1 += 2; |
| 223 | *((uint16_t*) c0) = (uint16_t) vout0; |
| 224 | vout0 >>= 16; |
| 225 | c0 += 2; |
| 226 | } |
| 227 | if (nc & 1) { |
| 228 | *c3 = (int8_t) vout3; |
| 229 | *c2 = (int8_t) vout2; |
| 230 | *c1 = (int8_t) vout1; |
| 231 | *c0 = (int8_t) vout0; |
| 232 | } |
| 233 | |
| 234 | nc = 0; |
| 235 | } |
| 236 | } while (nc != 0); |
| 237 | } |