Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 8 | // |
| 9 | // Auto-generated file. Do not edit! |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10 | // Specification: test/f32-maxpool-minmax.yaml |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 11 | // Generator: tools/generate-maxpool-test.py |
| 12 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 13 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 14 | #include <gtest/gtest.h> |
| 15 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 16 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 17 | #include <xnnpack/isa-checks.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 18 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 19 | #include <xnnpack/maxpool.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 20 | #include "maxpool-microkernel-tester.h" |
| 21 | |
| 22 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 23 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 24 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_unipass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 25 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 26 | MaxPoolMicrokernelTester() |
| 27 | .pooling_elements(9) |
| 28 | .pooling_tile(9, 8) |
| 29 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 30 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 31 | } |
| 32 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 33 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 34 | TEST_REQUIRES_X86_SSE; |
| 35 | MaxPoolMicrokernelTester() |
| 36 | .pooling_elements(9) |
| 37 | .pooling_tile(9, 8) |
| 38 | .channels(4) |
| 39 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 40 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 41 | } |
| 42 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 43 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 44 | TEST_REQUIRES_X86_SSE; |
| 45 | MaxPoolMicrokernelTester() |
| 46 | .pooling_elements(9) |
| 47 | .pooling_tile(9, 8) |
| 48 | .channels(4) |
| 49 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 50 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 51 | } |
| 52 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 53 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 54 | TEST_REQUIRES_X86_SSE; |
| 55 | MaxPoolMicrokernelTester() |
| 56 | .pooling_elements(9) |
| 57 | .pooling_tile(9, 8) |
| 58 | .channels(4) |
| 59 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 60 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 61 | } |
| 62 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 63 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_unipass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 64 | TEST_REQUIRES_X86_SSE; |
| 65 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 66 | MaxPoolMicrokernelTester() |
| 67 | .pooling_elements(pooling_elements) |
| 68 | .pooling_tile(9, 8) |
| 69 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 70 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 71 | } |
| 72 | } |
| 73 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 74 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 75 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 76 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 77 | MaxPoolMicrokernelTester() |
| 78 | .pooling_elements(pooling_elements) |
| 79 | .pooling_tile(9, 8) |
| 80 | .channels(4) |
| 81 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 82 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 83 | } |
| 84 | } |
| 85 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 86 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_unipass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 87 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 88 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 89 | MaxPoolMicrokernelTester() |
| 90 | .pooling_elements(9) |
| 91 | .pooling_tile(9, 8) |
| 92 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 93 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 94 | } |
| 95 | } |
| 96 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 97 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 98 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 99 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 100 | MaxPoolMicrokernelTester() |
| 101 | .pooling_elements(9) |
| 102 | .pooling_tile(9, 8) |
| 103 | .channels(channels) |
| 104 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 105 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 106 | } |
| 107 | } |
| 108 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 109 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_unipass_fulltile_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 110 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 111 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 112 | MaxPoolMicrokernelTester() |
| 113 | .pooling_elements(9) |
| 114 | .pooling_tile(9, 8) |
| 115 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 116 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 117 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 118 | } |
| 119 | } |
| 120 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 121 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 122 | TEST_REQUIRES_X86_SSE; |
| 123 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 124 | MaxPoolMicrokernelTester() |
| 125 | .pooling_elements(9) |
| 126 | .pooling_tile(9, 8) |
| 127 | .channels(channels) |
| 128 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 129 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 130 | } |
| 131 | } |
| 132 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 133 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_unipass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 134 | TEST_REQUIRES_X86_SSE; |
| 135 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 136 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 137 | MaxPoolMicrokernelTester() |
| 138 | .pooling_elements(pooling_elements) |
| 139 | .pooling_tile(9, 8) |
| 140 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 141 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 142 | } |
| 143 | } |
| 144 | } |
| 145 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 146 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 147 | TEST_REQUIRES_X86_SSE; |
| 148 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 149 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 150 | MaxPoolMicrokernelTester() |
| 151 | .pooling_elements(pooling_elements) |
| 152 | .pooling_tile(9, 8) |
| 153 | .channels(channels) |
| 154 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 155 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 156 | } |
| 157 | } |
| 158 | } |
| 159 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 160 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_unipass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 161 | TEST_REQUIRES_X86_SSE; |
| 162 | for (size_t channels = 1; channels < 4; channels++) { |
| 163 | MaxPoolMicrokernelTester() |
| 164 | .pooling_elements(9) |
| 165 | .pooling_tile(9, 8) |
| 166 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 167 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 168 | } |
| 169 | } |
| 170 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 171 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 172 | TEST_REQUIRES_X86_SSE; |
| 173 | for (size_t channels = 1; channels < 4; channels++) { |
| 174 | MaxPoolMicrokernelTester() |
| 175 | .pooling_elements(9) |
| 176 | .pooling_tile(9, 8) |
| 177 | .channels(channels) |
| 178 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 179 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 180 | } |
| 181 | } |
| 182 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 183 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 184 | TEST_REQUIRES_X86_SSE; |
| 185 | for (size_t channels = 1; channels < 4; channels++) { |
| 186 | MaxPoolMicrokernelTester() |
| 187 | .pooling_elements(9) |
| 188 | .pooling_tile(9, 8) |
| 189 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 190 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 191 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 192 | } |
| 193 | } |
| 194 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 195 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 196 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 197 | for (size_t channels = 1; channels < 4; channels++) { |
| 198 | MaxPoolMicrokernelTester() |
| 199 | .pooling_elements(9) |
| 200 | .pooling_tile(9, 8) |
| 201 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 202 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 203 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 204 | } |
| 205 | } |
| 206 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 207 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_unipass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 208 | TEST_REQUIRES_X86_SSE; |
| 209 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 210 | for (size_t channels = 1; channels < 4; channels++) { |
| 211 | MaxPoolMicrokernelTester() |
| 212 | .pooling_elements(pooling_elements) |
| 213 | .pooling_tile(9, 8) |
| 214 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 215 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 216 | } |
| 217 | } |
| 218 | } |
| 219 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 220 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 221 | TEST_REQUIRES_X86_SSE; |
| 222 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 223 | for (size_t channels = 1; channels < 4; channels++) { |
| 224 | MaxPoolMicrokernelTester() |
| 225 | .pooling_elements(pooling_elements) |
| 226 | .pooling_tile(9, 8) |
| 227 | .channels(channels) |
| 228 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 229 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 230 | } |
| 231 | } |
| 232 | } |
| 233 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 234 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_unipass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 235 | TEST_REQUIRES_X86_SSE; |
| 236 | for (size_t channels = 5; channels < 8; channels++) { |
| 237 | MaxPoolMicrokernelTester() |
| 238 | .pooling_elements(9) |
| 239 | .pooling_tile(9, 8) |
| 240 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 241 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 242 | } |
| 243 | } |
| 244 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 245 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 246 | TEST_REQUIRES_X86_SSE; |
| 247 | for (size_t channels = 5; channels < 8; channels++) { |
| 248 | MaxPoolMicrokernelTester() |
| 249 | .pooling_elements(9) |
| 250 | .pooling_tile(9, 8) |
| 251 | .channels(channels) |
| 252 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 253 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 254 | } |
| 255 | } |
| 256 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 257 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 258 | TEST_REQUIRES_X86_SSE; |
| 259 | for (size_t channels = 5; channels < 8; channels++) { |
| 260 | MaxPoolMicrokernelTester() |
| 261 | .pooling_elements(9) |
| 262 | .pooling_tile(9, 8) |
| 263 | .channels(channels) |
| 264 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 265 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 266 | } |
| 267 | } |
| 268 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 269 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 270 | TEST_REQUIRES_X86_SSE; |
| 271 | for (size_t channels = 5; channels < 8; channels++) { |
| 272 | MaxPoolMicrokernelTester() |
| 273 | .pooling_elements(9) |
| 274 | .pooling_tile(9, 8) |
| 275 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 276 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 277 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 278 | } |
| 279 | } |
| 280 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 281 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_unipass_subtile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 282 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 283 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 284 | for (size_t channels = 5; channels < 8; channels++) { |
| 285 | MaxPoolMicrokernelTester() |
| 286 | .pooling_elements(pooling_elements) |
| 287 | .pooling_tile(9, 8) |
| 288 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 289 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 290 | } |
| 291 | } |
| 292 | } |
| 293 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 294 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 295 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 296 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 297 | for (size_t channels = 5; channels < 8; channels++) { |
| 298 | MaxPoolMicrokernelTester() |
| 299 | .pooling_elements(pooling_elements) |
| 300 | .pooling_tile(9, 8) |
| 301 | .channels(channels) |
| 302 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 303 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 304 | } |
| 305 | } |
| 306 | } |
| 307 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 308 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 309 | TEST_REQUIRES_X86_SSE; |
| 310 | MaxPoolMicrokernelTester() |
| 311 | .pooling_elements(17) |
| 312 | .pooling_tile(9, 8) |
| 313 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 314 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 315 | } |
| 316 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 317 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 318 | TEST_REQUIRES_X86_SSE; |
| 319 | MaxPoolMicrokernelTester() |
| 320 | .pooling_elements(17) |
| 321 | .pooling_tile(9, 8) |
| 322 | .channels(4) |
| 323 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 324 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 325 | } |
| 326 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 327 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 328 | TEST_REQUIRES_X86_SSE; |
| 329 | MaxPoolMicrokernelTester() |
| 330 | .pooling_elements(17) |
| 331 | .pooling_tile(9, 8) |
| 332 | .channels(4) |
| 333 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 334 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 335 | } |
| 336 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 337 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 338 | TEST_REQUIRES_X86_SSE; |
| 339 | MaxPoolMicrokernelTester() |
| 340 | .pooling_elements(17) |
| 341 | .pooling_tile(9, 8) |
| 342 | .channels(4) |
| 343 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 344 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 345 | } |
| 346 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 347 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 348 | TEST_REQUIRES_X86_SSE; |
| 349 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 350 | MaxPoolMicrokernelTester() |
| 351 | .pooling_elements(pooling_elements) |
| 352 | .pooling_tile(9, 8) |
| 353 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 354 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 355 | } |
| 356 | } |
| 357 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 358 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 359 | TEST_REQUIRES_X86_SSE; |
| 360 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 361 | MaxPoolMicrokernelTester() |
| 362 | .pooling_elements(pooling_elements) |
| 363 | .pooling_tile(9, 8) |
| 364 | .channels(4) |
| 365 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 366 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 367 | } |
| 368 | } |
| 369 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 370 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 371 | TEST_REQUIRES_X86_SSE; |
| 372 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 373 | MaxPoolMicrokernelTester() |
| 374 | .pooling_elements(17) |
| 375 | .pooling_tile(9, 8) |
| 376 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 377 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 378 | } |
| 379 | } |
| 380 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 381 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 382 | TEST_REQUIRES_X86_SSE; |
| 383 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 384 | MaxPoolMicrokernelTester() |
| 385 | .pooling_elements(17) |
| 386 | .pooling_tile(9, 8) |
| 387 | .channels(channels) |
| 388 | .input_offset(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 389 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 390 | } |
| 391 | } |
| 392 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 393 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 394 | TEST_REQUIRES_X86_SSE; |
| 395 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 396 | MaxPoolMicrokernelTester() |
| 397 | .pooling_elements(17) |
| 398 | .pooling_tile(9, 8) |
| 399 | .channels(channels) |
| 400 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 401 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 402 | } |
| 403 | } |
| 404 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 405 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 406 | TEST_REQUIRES_X86_SSE; |
| 407 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 408 | MaxPoolMicrokernelTester() |
| 409 | .pooling_elements(17) |
| 410 | .pooling_tile(9, 8) |
| 411 | .channels(channels) |
| 412 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 413 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 414 | } |
| 415 | } |
| 416 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 417 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 418 | TEST_REQUIRES_X86_SSE; |
| 419 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 420 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 421 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 422 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 423 | .pooling_tile(9, 8) |
| 424 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 425 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 426 | } |
| 427 | } |
| 428 | } |
| 429 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 430 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 431 | TEST_REQUIRES_X86_SSE; |
| 432 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 433 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 434 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 435 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 436 | .pooling_tile(9, 8) |
| 437 | .channels(channels) |
| 438 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 439 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 440 | } |
| 441 | } |
| 442 | } |
| 443 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 444 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 445 | TEST_REQUIRES_X86_SSE; |
| 446 | for (size_t channels = 1; channels < 4; channels++) { |
| 447 | MaxPoolMicrokernelTester() |
| 448 | .pooling_elements(17) |
| 449 | .pooling_tile(9, 8) |
| 450 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 451 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 452 | } |
| 453 | } |
| 454 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 455 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 456 | TEST_REQUIRES_X86_SSE; |
| 457 | for (size_t channels = 1; channels < 4; channels++) { |
| 458 | MaxPoolMicrokernelTester() |
| 459 | .pooling_elements(17) |
| 460 | .pooling_tile(9, 8) |
| 461 | .channels(channels) |
| 462 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 463 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 464 | } |
| 465 | } |
| 466 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 467 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 468 | TEST_REQUIRES_X86_SSE; |
| 469 | for (size_t channels = 1; channels < 4; channels++) { |
| 470 | MaxPoolMicrokernelTester() |
| 471 | .pooling_elements(17) |
| 472 | .pooling_tile(9, 8) |
| 473 | .channels(channels) |
| 474 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 475 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 476 | } |
| 477 | } |
| 478 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 479 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 480 | TEST_REQUIRES_X86_SSE; |
| 481 | for (size_t channels = 1; channels < 4; channels++) { |
| 482 | MaxPoolMicrokernelTester() |
| 483 | .pooling_elements(17) |
| 484 | .pooling_tile(9, 8) |
| 485 | .channels(channels) |
| 486 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 487 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 488 | } |
| 489 | } |
| 490 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 491 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 492 | TEST_REQUIRES_X86_SSE; |
| 493 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 494 | for (size_t channels = 1; channels < 4; channels++) { |
| 495 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 496 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 497 | .pooling_tile(9, 8) |
| 498 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 499 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 500 | } |
| 501 | } |
| 502 | } |
| 503 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 504 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 505 | TEST_REQUIRES_X86_SSE; |
| 506 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 507 | for (size_t channels = 1; channels < 4; channels++) { |
| 508 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 509 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 510 | .pooling_tile(9, 8) |
| 511 | .channels(channels) |
| 512 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 513 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 514 | } |
| 515 | } |
| 516 | } |
| 517 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 518 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 519 | TEST_REQUIRES_X86_SSE; |
| 520 | for (size_t channels = 5; channels < 8; channels++) { |
| 521 | MaxPoolMicrokernelTester() |
| 522 | .pooling_elements(17) |
| 523 | .pooling_tile(9, 8) |
| 524 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 525 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 526 | } |
| 527 | } |
| 528 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 529 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 530 | TEST_REQUIRES_X86_SSE; |
| 531 | for (size_t channels = 5; channels < 8; channels++) { |
| 532 | MaxPoolMicrokernelTester() |
| 533 | .pooling_elements(17) |
| 534 | .pooling_tile(9, 8) |
| 535 | .channels(channels) |
| 536 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 537 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 538 | } |
| 539 | } |
| 540 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 541 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 542 | TEST_REQUIRES_X86_SSE; |
| 543 | for (size_t channels = 5; channels < 8; channels++) { |
| 544 | MaxPoolMicrokernelTester() |
| 545 | .pooling_elements(17) |
| 546 | .pooling_tile(9, 8) |
| 547 | .channels(channels) |
| 548 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 549 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 550 | } |
| 551 | } |
| 552 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 553 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 554 | TEST_REQUIRES_X86_SSE; |
| 555 | for (size_t channels = 5; channels < 8; channels++) { |
| 556 | MaxPoolMicrokernelTester() |
| 557 | .pooling_elements(17) |
| 558 | .pooling_tile(9, 8) |
| 559 | .channels(channels) |
| 560 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 561 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 562 | } |
| 563 | } |
| 564 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 565 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 566 | TEST_REQUIRES_X86_SSE; |
| 567 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 568 | for (size_t channels = 5; channels < 8; channels++) { |
| 569 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 570 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 571 | .pooling_tile(9, 8) |
| 572 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 573 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 574 | } |
| 575 | } |
| 576 | } |
| 577 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 578 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 579 | TEST_REQUIRES_X86_SSE; |
| 580 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 581 | for (size_t channels = 5; channels < 8; channels++) { |
| 582 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 583 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 584 | .pooling_tile(9, 8) |
| 585 | .channels(channels) |
| 586 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 587 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 588 | } |
| 589 | } |
| 590 | } |
| 591 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 592 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 593 | TEST_REQUIRES_X86_SSE; |
| 594 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 595 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 596 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 597 | .pooling_tile(9, 8) |
| 598 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 599 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 600 | } |
| 601 | } |
| 602 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 603 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 604 | TEST_REQUIRES_X86_SSE; |
| 605 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 606 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 607 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 608 | .pooling_tile(9, 8) |
| 609 | .channels(4) |
| 610 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 611 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 612 | } |
| 613 | } |
| 614 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 615 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 616 | TEST_REQUIRES_X86_SSE; |
| 617 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 618 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 619 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 620 | .pooling_tile(9, 8) |
| 621 | .channels(4) |
| 622 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 623 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 624 | } |
| 625 | } |
| 626 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 627 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 628 | TEST_REQUIRES_X86_SSE; |
| 629 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 630 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 631 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 632 | .pooling_tile(9, 8) |
| 633 | .channels(4) |
| 634 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 635 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 636 | } |
| 637 | } |
| 638 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 639 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 640 | TEST_REQUIRES_X86_SSE; |
| 641 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 642 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 643 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 644 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 645 | .pooling_tile(9, 8) |
| 646 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 647 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 648 | } |
| 649 | } |
| 650 | } |
| 651 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 652 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 653 | TEST_REQUIRES_X86_SSE; |
| 654 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 655 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 656 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 657 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 658 | .pooling_tile(9, 8) |
| 659 | .channels(channels) |
| 660 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 661 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 662 | } |
| 663 | } |
| 664 | } |
| 665 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 666 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 667 | TEST_REQUIRES_X86_SSE; |
| 668 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 669 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 670 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 671 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 672 | .pooling_tile(9, 8) |
| 673 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 674 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 675 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 676 | } |
| 677 | } |
| 678 | } |
| 679 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 680 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 681 | TEST_REQUIRES_X86_SSE; |
| 682 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 683 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 684 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 685 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 686 | .pooling_tile(9, 8) |
| 687 | .channels(channels) |
| 688 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 689 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 690 | } |
| 691 | } |
| 692 | } |
| 693 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 694 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 695 | TEST_REQUIRES_X86_SSE; |
| 696 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 697 | for (size_t channels = 1; channels < 4; channels++) { |
| 698 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 699 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 700 | .pooling_tile(9, 8) |
| 701 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 702 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 703 | } |
| 704 | } |
| 705 | } |
| 706 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 707 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 708 | TEST_REQUIRES_X86_SSE; |
| 709 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 710 | for (size_t channels = 1; channels < 4; channels++) { |
| 711 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 712 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 713 | .pooling_tile(9, 8) |
| 714 | .channels(channels) |
| 715 | .input_offset(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 716 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 717 | } |
| 718 | } |
| 719 | } |
| 720 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 721 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 722 | TEST_REQUIRES_X86_SSE; |
| 723 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 724 | for (size_t channels = 1; channels < 4; channels++) { |
| 725 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 726 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 727 | .pooling_tile(9, 8) |
| 728 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 729 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 730 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 731 | } |
| 732 | } |
| 733 | } |
| 734 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 735 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 736 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 737 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 738 | for (size_t channels = 1; channels < 4; channels++) { |
| 739 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 740 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 741 | .pooling_tile(9, 8) |
| 742 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 743 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 744 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 745 | } |
| 746 | } |
| 747 | } |
| 748 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 749 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 750 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 751 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 752 | for (size_t channels = 5; channels < 8; channels++) { |
| 753 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 754 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 755 | .pooling_tile(9, 8) |
| 756 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 757 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 758 | } |
| 759 | } |
| 760 | } |
| 761 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 762 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 763 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 764 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 765 | for (size_t channels = 5; channels < 8; channels++) { |
| 766 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 767 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 768 | .pooling_tile(9, 8) |
| 769 | .channels(channels) |
| 770 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 771 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 772 | } |
| 773 | } |
| 774 | } |
| 775 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 776 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 777 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 778 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 779 | for (size_t channels = 5; channels < 8; channels++) { |
| 780 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 781 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 782 | .pooling_tile(9, 8) |
| 783 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 784 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 785 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 786 | } |
| 787 | } |
| 788 | } |
| 789 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 790 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 791 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 792 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 793 | for (size_t channels = 5; channels < 8; channels++) { |
| 794 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 795 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 796 | .pooling_tile(9, 8) |
| 797 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 798 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 799 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 800 | } |
| 801 | } |
| 802 | } |
| 803 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 804 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 805 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 806 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 807 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 808 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 809 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 810 | .output_pixels(output_pixels) |
| 811 | .pooling_elements(pooling_elements) |
| 812 | .pooling_tile(9, 8) |
| 813 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 814 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 815 | } |
| 816 | } |
| 817 | } |
| 818 | } |
| 819 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 820 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 821 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 822 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 823 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 824 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 825 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 826 | .output_pixels(output_pixels) |
| 827 | .pooling_elements(pooling_elements) |
| 828 | .pooling_tile(9, 8) |
| 829 | .channels(channels) |
| 830 | .input_offset(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 831 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 832 | } |
| 833 | } |
| 834 | } |
| 835 | } |
| 836 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 837 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 838 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 839 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 840 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 841 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 842 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 843 | .output_pixels(output_pixels) |
| 844 | .pooling_elements(pooling_elements) |
| 845 | .pooling_tile(9, 8) |
| 846 | .channels(channels) |
| 847 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 848 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 849 | } |
| 850 | } |
| 851 | } |
| 852 | } |
| 853 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 854 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 855 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 856 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 857 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 858 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 859 | MaxPoolMicrokernelTester() |
| 860 | .output_pixels(output_pixels) |
| 861 | .pooling_elements(pooling_elements) |
| 862 | .pooling_tile(9, 8) |
| 863 | .channels(channels) |
| 864 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 865 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 866 | } |
| 867 | } |
| 868 | } |
| 869 | } |
| 870 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 871 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_output_stride) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 872 | TEST_REQUIRES_X86_SSE; |
| 873 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 874 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 875 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 876 | MaxPoolMicrokernelTester() |
| 877 | .output_pixels(output_pixels) |
| 878 | .pooling_elements(pooling_elements) |
| 879 | .pooling_tile(9, 8) |
| 880 | .channels(channels) |
| 881 | .output_stride(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 882 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 883 | } |
| 884 | } |
| 885 | } |
| 886 | } |
| 887 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 888 | TEST(F32_MAXPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_step) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 889 | TEST_REQUIRES_X86_SSE; |
| 890 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 891 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 892 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 893 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 894 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 895 | .output_pixels(output_pixels) |
| 896 | .pooling_elements(pooling_elements) |
| 897 | .pooling_tile(9, 8) |
| 898 | .step(step) |
| 899 | .channels(channels) |
| 900 | .output_stride(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 901 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 902 | } |
| 903 | } |
| 904 | } |
| 905 | } |
| 906 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 907 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 908 | |
| 909 | |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 910 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 911 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_unipass_fulltile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 912 | TEST_REQUIRES_ARM_NEON; |
| 913 | MaxPoolMicrokernelTester() |
| 914 | .pooling_elements(9) |
| 915 | .pooling_tile(9, 8) |
| 916 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 917 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 918 | } |
| 919 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 920 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 921 | TEST_REQUIRES_ARM_NEON; |
| 922 | MaxPoolMicrokernelTester() |
| 923 | .pooling_elements(9) |
| 924 | .pooling_tile(9, 8) |
| 925 | .channels(4) |
| 926 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 927 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 928 | } |
| 929 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 930 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 931 | TEST_REQUIRES_ARM_NEON; |
| 932 | MaxPoolMicrokernelTester() |
| 933 | .pooling_elements(9) |
| 934 | .pooling_tile(9, 8) |
| 935 | .channels(4) |
| 936 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 937 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 938 | } |
| 939 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 940 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 941 | TEST_REQUIRES_ARM_NEON; |
| 942 | MaxPoolMicrokernelTester() |
| 943 | .pooling_elements(9) |
| 944 | .pooling_tile(9, 8) |
| 945 | .channels(4) |
| 946 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 947 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 948 | } |
| 949 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 950 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_unipass_subtile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 951 | TEST_REQUIRES_ARM_NEON; |
| 952 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 953 | MaxPoolMicrokernelTester() |
| 954 | .pooling_elements(pooling_elements) |
| 955 | .pooling_tile(9, 8) |
| 956 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 957 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 958 | } |
| 959 | } |
| 960 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 961 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 962 | TEST_REQUIRES_ARM_NEON; |
| 963 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 964 | MaxPoolMicrokernelTester() |
| 965 | .pooling_elements(pooling_elements) |
| 966 | .pooling_tile(9, 8) |
| 967 | .channels(4) |
| 968 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 969 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 970 | } |
| 971 | } |
| 972 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 973 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_unipass_fulltile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 974 | TEST_REQUIRES_ARM_NEON; |
| 975 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 976 | MaxPoolMicrokernelTester() |
| 977 | .pooling_elements(9) |
| 978 | .pooling_tile(9, 8) |
| 979 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 980 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 981 | } |
| 982 | } |
| 983 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 984 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 985 | TEST_REQUIRES_ARM_NEON; |
| 986 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 987 | MaxPoolMicrokernelTester() |
| 988 | .pooling_elements(9) |
| 989 | .pooling_tile(9, 8) |
| 990 | .channels(channels) |
| 991 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 992 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 993 | } |
| 994 | } |
| 995 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 996 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_unipass_fulltile_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 997 | TEST_REQUIRES_ARM_NEON; |
| 998 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 999 | MaxPoolMicrokernelTester() |
| 1000 | .pooling_elements(9) |
| 1001 | .pooling_tile(9, 8) |
| 1002 | .channels(channels) |
| 1003 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1004 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1005 | } |
| 1006 | } |
| 1007 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1008 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_unipass_fulltile_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1009 | TEST_REQUIRES_ARM_NEON; |
| 1010 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1011 | MaxPoolMicrokernelTester() |
| 1012 | .pooling_elements(9) |
| 1013 | .pooling_tile(9, 8) |
| 1014 | .channels(channels) |
| 1015 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1016 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1017 | } |
| 1018 | } |
| 1019 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1020 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_unipass_subtile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1021 | TEST_REQUIRES_ARM_NEON; |
| 1022 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1023 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1024 | MaxPoolMicrokernelTester() |
| 1025 | .pooling_elements(pooling_elements) |
| 1026 | .pooling_tile(9, 8) |
| 1027 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1028 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1029 | } |
| 1030 | } |
| 1031 | } |
| 1032 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1033 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_unipass_subtile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1034 | TEST_REQUIRES_ARM_NEON; |
| 1035 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1036 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1037 | MaxPoolMicrokernelTester() |
| 1038 | .pooling_elements(pooling_elements) |
| 1039 | .pooling_tile(9, 8) |
| 1040 | .channels(channels) |
| 1041 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1042 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1043 | } |
| 1044 | } |
| 1045 | } |
| 1046 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1047 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_unipass_fulltile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1048 | TEST_REQUIRES_ARM_NEON; |
| 1049 | for (size_t channels = 1; channels < 4; channels++) { |
| 1050 | MaxPoolMicrokernelTester() |
| 1051 | .pooling_elements(9) |
| 1052 | .pooling_tile(9, 8) |
| 1053 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1054 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1055 | } |
| 1056 | } |
| 1057 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1058 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1059 | TEST_REQUIRES_ARM_NEON; |
| 1060 | for (size_t channels = 1; channels < 4; channels++) { |
| 1061 | MaxPoolMicrokernelTester() |
| 1062 | .pooling_elements(9) |
| 1063 | .pooling_tile(9, 8) |
| 1064 | .channels(channels) |
| 1065 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1066 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1067 | } |
| 1068 | } |
| 1069 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1070 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1071 | TEST_REQUIRES_ARM_NEON; |
| 1072 | for (size_t channels = 1; channels < 4; channels++) { |
| 1073 | MaxPoolMicrokernelTester() |
| 1074 | .pooling_elements(9) |
| 1075 | .pooling_tile(9, 8) |
| 1076 | .channels(channels) |
| 1077 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1078 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1079 | } |
| 1080 | } |
| 1081 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1082 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1083 | TEST_REQUIRES_ARM_NEON; |
| 1084 | for (size_t channels = 1; channels < 4; channels++) { |
| 1085 | MaxPoolMicrokernelTester() |
| 1086 | .pooling_elements(9) |
| 1087 | .pooling_tile(9, 8) |
| 1088 | .channels(channels) |
| 1089 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1090 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1091 | } |
| 1092 | } |
| 1093 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1094 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_unipass_subtile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1095 | TEST_REQUIRES_ARM_NEON; |
| 1096 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1097 | for (size_t channels = 1; channels < 4; channels++) { |
| 1098 | MaxPoolMicrokernelTester() |
| 1099 | .pooling_elements(pooling_elements) |
| 1100 | .pooling_tile(9, 8) |
| 1101 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1102 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1103 | } |
| 1104 | } |
| 1105 | } |
| 1106 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1107 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1108 | TEST_REQUIRES_ARM_NEON; |
| 1109 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1110 | for (size_t channels = 1; channels < 4; channels++) { |
| 1111 | MaxPoolMicrokernelTester() |
| 1112 | .pooling_elements(pooling_elements) |
| 1113 | .pooling_tile(9, 8) |
| 1114 | .channels(channels) |
| 1115 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1116 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1117 | } |
| 1118 | } |
| 1119 | } |
| 1120 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1121 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_unipass_fulltile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1122 | TEST_REQUIRES_ARM_NEON; |
| 1123 | for (size_t channels = 5; channels < 8; channels++) { |
| 1124 | MaxPoolMicrokernelTester() |
| 1125 | .pooling_elements(9) |
| 1126 | .pooling_tile(9, 8) |
| 1127 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1128 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1129 | } |
| 1130 | } |
| 1131 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1132 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1133 | TEST_REQUIRES_ARM_NEON; |
| 1134 | for (size_t channels = 5; channels < 8; channels++) { |
| 1135 | MaxPoolMicrokernelTester() |
| 1136 | .pooling_elements(9) |
| 1137 | .pooling_tile(9, 8) |
| 1138 | .channels(channels) |
| 1139 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1140 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1141 | } |
| 1142 | } |
| 1143 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1144 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1145 | TEST_REQUIRES_ARM_NEON; |
| 1146 | for (size_t channels = 5; channels < 8; channels++) { |
| 1147 | MaxPoolMicrokernelTester() |
| 1148 | .pooling_elements(9) |
| 1149 | .pooling_tile(9, 8) |
| 1150 | .channels(channels) |
| 1151 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1152 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1153 | } |
| 1154 | } |
| 1155 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1156 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1157 | TEST_REQUIRES_ARM_NEON; |
| 1158 | for (size_t channels = 5; channels < 8; channels++) { |
| 1159 | MaxPoolMicrokernelTester() |
| 1160 | .pooling_elements(9) |
| 1161 | .pooling_tile(9, 8) |
| 1162 | .channels(channels) |
| 1163 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1164 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1165 | } |
| 1166 | } |
| 1167 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1168 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_unipass_subtile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1169 | TEST_REQUIRES_ARM_NEON; |
| 1170 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1171 | for (size_t channels = 5; channels < 8; channels++) { |
| 1172 | MaxPoolMicrokernelTester() |
| 1173 | .pooling_elements(pooling_elements) |
| 1174 | .pooling_tile(9, 8) |
| 1175 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1176 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1177 | } |
| 1178 | } |
| 1179 | } |
| 1180 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1181 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1182 | TEST_REQUIRES_ARM_NEON; |
| 1183 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1184 | for (size_t channels = 5; channels < 8; channels++) { |
| 1185 | MaxPoolMicrokernelTester() |
| 1186 | .pooling_elements(pooling_elements) |
| 1187 | .pooling_tile(9, 8) |
| 1188 | .channels(channels) |
| 1189 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1190 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1191 | } |
| 1192 | } |
| 1193 | } |
| 1194 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1195 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1196 | TEST_REQUIRES_ARM_NEON; |
| 1197 | MaxPoolMicrokernelTester() |
| 1198 | .pooling_elements(17) |
| 1199 | .pooling_tile(9, 8) |
| 1200 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1201 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1202 | } |
| 1203 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1204 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1205 | TEST_REQUIRES_ARM_NEON; |
| 1206 | MaxPoolMicrokernelTester() |
| 1207 | .pooling_elements(17) |
| 1208 | .pooling_tile(9, 8) |
| 1209 | .channels(4) |
| 1210 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1211 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1212 | } |
| 1213 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1214 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1215 | TEST_REQUIRES_ARM_NEON; |
| 1216 | MaxPoolMicrokernelTester() |
| 1217 | .pooling_elements(17) |
| 1218 | .pooling_tile(9, 8) |
| 1219 | .channels(4) |
| 1220 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1221 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1222 | } |
| 1223 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1224 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1225 | TEST_REQUIRES_ARM_NEON; |
| 1226 | MaxPoolMicrokernelTester() |
| 1227 | .pooling_elements(17) |
| 1228 | .pooling_tile(9, 8) |
| 1229 | .channels(4) |
| 1230 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1231 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1232 | } |
| 1233 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1234 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_subtile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1235 | TEST_REQUIRES_ARM_NEON; |
| 1236 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1237 | MaxPoolMicrokernelTester() |
| 1238 | .pooling_elements(pooling_elements) |
| 1239 | .pooling_tile(9, 8) |
| 1240 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1241 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1242 | } |
| 1243 | } |
| 1244 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1245 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1246 | TEST_REQUIRES_ARM_NEON; |
| 1247 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1248 | MaxPoolMicrokernelTester() |
| 1249 | .pooling_elements(pooling_elements) |
| 1250 | .pooling_tile(9, 8) |
| 1251 | .channels(4) |
| 1252 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1253 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1254 | } |
| 1255 | } |
| 1256 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1257 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1258 | TEST_REQUIRES_ARM_NEON; |
| 1259 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1260 | MaxPoolMicrokernelTester() |
| 1261 | .pooling_elements(17) |
| 1262 | .pooling_tile(9, 8) |
| 1263 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1264 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1265 | } |
| 1266 | } |
| 1267 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1268 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1269 | TEST_REQUIRES_ARM_NEON; |
| 1270 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1271 | MaxPoolMicrokernelTester() |
| 1272 | .pooling_elements(17) |
| 1273 | .pooling_tile(9, 8) |
| 1274 | .channels(channels) |
| 1275 | .input_offset(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1276 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1277 | } |
| 1278 | } |
| 1279 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1280 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1281 | TEST_REQUIRES_ARM_NEON; |
| 1282 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1283 | MaxPoolMicrokernelTester() |
| 1284 | .pooling_elements(17) |
| 1285 | .pooling_tile(9, 8) |
| 1286 | .channels(channels) |
| 1287 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1288 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1289 | } |
| 1290 | } |
| 1291 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1292 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1293 | TEST_REQUIRES_ARM_NEON; |
| 1294 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1295 | MaxPoolMicrokernelTester() |
| 1296 | .pooling_elements(17) |
| 1297 | .pooling_tile(9, 8) |
| 1298 | .channels(channels) |
| 1299 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1300 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1301 | } |
| 1302 | } |
| 1303 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1304 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_subtile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1305 | TEST_REQUIRES_ARM_NEON; |
| 1306 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1307 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1308 | MaxPoolMicrokernelTester() |
| 1309 | .pooling_elements(pooling_elements) |
| 1310 | .pooling_tile(9, 8) |
| 1311 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1312 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1313 | } |
| 1314 | } |
| 1315 | } |
| 1316 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1317 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_subtile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1318 | TEST_REQUIRES_ARM_NEON; |
| 1319 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1320 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1321 | MaxPoolMicrokernelTester() |
| 1322 | .pooling_elements(pooling_elements) |
| 1323 | .pooling_tile(9, 8) |
| 1324 | .channels(channels) |
| 1325 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1326 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1327 | } |
| 1328 | } |
| 1329 | } |
| 1330 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1331 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1332 | TEST_REQUIRES_ARM_NEON; |
| 1333 | for (size_t channels = 1; channels < 4; channels++) { |
| 1334 | MaxPoolMicrokernelTester() |
| 1335 | .pooling_elements(17) |
| 1336 | .pooling_tile(9, 8) |
| 1337 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1338 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1339 | } |
| 1340 | } |
| 1341 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1342 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1343 | TEST_REQUIRES_ARM_NEON; |
| 1344 | for (size_t channels = 1; channels < 4; channels++) { |
| 1345 | MaxPoolMicrokernelTester() |
| 1346 | .pooling_elements(17) |
| 1347 | .pooling_tile(9, 8) |
| 1348 | .channels(channels) |
| 1349 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1350 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1351 | } |
| 1352 | } |
| 1353 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1354 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1355 | TEST_REQUIRES_ARM_NEON; |
| 1356 | for (size_t channels = 1; channels < 4; channels++) { |
| 1357 | MaxPoolMicrokernelTester() |
| 1358 | .pooling_elements(17) |
| 1359 | .pooling_tile(9, 8) |
| 1360 | .channels(channels) |
| 1361 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1362 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1363 | } |
| 1364 | } |
| 1365 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1366 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1367 | TEST_REQUIRES_ARM_NEON; |
| 1368 | for (size_t channels = 1; channels < 4; channels++) { |
| 1369 | MaxPoolMicrokernelTester() |
| 1370 | .pooling_elements(17) |
| 1371 | .pooling_tile(9, 8) |
| 1372 | .channels(channels) |
| 1373 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1374 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1375 | } |
| 1376 | } |
| 1377 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1378 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_subtile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1379 | TEST_REQUIRES_ARM_NEON; |
| 1380 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1381 | for (size_t channels = 1; channels < 4; channels++) { |
| 1382 | MaxPoolMicrokernelTester() |
| 1383 | .pooling_elements(pooling_elements) |
| 1384 | .pooling_tile(9, 8) |
| 1385 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1386 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1387 | } |
| 1388 | } |
| 1389 | } |
| 1390 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1391 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1392 | TEST_REQUIRES_ARM_NEON; |
| 1393 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1394 | for (size_t channels = 1; channels < 4; channels++) { |
| 1395 | MaxPoolMicrokernelTester() |
| 1396 | .pooling_elements(pooling_elements) |
| 1397 | .pooling_tile(9, 8) |
| 1398 | .channels(channels) |
| 1399 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1400 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1401 | } |
| 1402 | } |
| 1403 | } |
| 1404 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1405 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1406 | TEST_REQUIRES_ARM_NEON; |
| 1407 | for (size_t channels = 5; channels < 8; channels++) { |
| 1408 | MaxPoolMicrokernelTester() |
| 1409 | .pooling_elements(17) |
| 1410 | .pooling_tile(9, 8) |
| 1411 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1412 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1413 | } |
| 1414 | } |
| 1415 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1416 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1417 | TEST_REQUIRES_ARM_NEON; |
| 1418 | for (size_t channels = 5; channels < 8; channels++) { |
| 1419 | MaxPoolMicrokernelTester() |
| 1420 | .pooling_elements(17) |
| 1421 | .pooling_tile(9, 8) |
| 1422 | .channels(channels) |
| 1423 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1424 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1425 | } |
| 1426 | } |
| 1427 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1428 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1429 | TEST_REQUIRES_ARM_NEON; |
| 1430 | for (size_t channels = 5; channels < 8; channels++) { |
| 1431 | MaxPoolMicrokernelTester() |
| 1432 | .pooling_elements(17) |
| 1433 | .pooling_tile(9, 8) |
| 1434 | .channels(channels) |
| 1435 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1436 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1437 | } |
| 1438 | } |
| 1439 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1440 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1441 | TEST_REQUIRES_ARM_NEON; |
| 1442 | for (size_t channels = 5; channels < 8; channels++) { |
| 1443 | MaxPoolMicrokernelTester() |
| 1444 | .pooling_elements(17) |
| 1445 | .pooling_tile(9, 8) |
| 1446 | .channels(channels) |
| 1447 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1448 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1449 | } |
| 1450 | } |
| 1451 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1452 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_subtile) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1453 | TEST_REQUIRES_ARM_NEON; |
| 1454 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1455 | for (size_t channels = 5; channels < 8; channels++) { |
| 1456 | MaxPoolMicrokernelTester() |
| 1457 | .pooling_elements(pooling_elements) |
| 1458 | .pooling_tile(9, 8) |
| 1459 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1460 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1461 | } |
| 1462 | } |
| 1463 | } |
| 1464 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1465 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1466 | TEST_REQUIRES_ARM_NEON; |
| 1467 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1468 | for (size_t channels = 5; channels < 8; channels++) { |
| 1469 | MaxPoolMicrokernelTester() |
| 1470 | .pooling_elements(pooling_elements) |
| 1471 | .pooling_tile(9, 8) |
| 1472 | .channels(channels) |
| 1473 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1474 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1475 | } |
| 1476 | } |
| 1477 | } |
| 1478 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1479 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1480 | TEST_REQUIRES_ARM_NEON; |
| 1481 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1482 | MaxPoolMicrokernelTester() |
| 1483 | .pooling_elements(pooling_elements) |
| 1484 | .pooling_tile(9, 8) |
| 1485 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1486 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1487 | } |
| 1488 | } |
| 1489 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1490 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1491 | TEST_REQUIRES_ARM_NEON; |
| 1492 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1493 | MaxPoolMicrokernelTester() |
| 1494 | .pooling_elements(pooling_elements) |
| 1495 | .pooling_tile(9, 8) |
| 1496 | .channels(4) |
| 1497 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1498 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1499 | } |
| 1500 | } |
| 1501 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1502 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1503 | TEST_REQUIRES_ARM_NEON; |
| 1504 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1505 | MaxPoolMicrokernelTester() |
| 1506 | .pooling_elements(pooling_elements) |
| 1507 | .pooling_tile(9, 8) |
| 1508 | .channels(4) |
| 1509 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1510 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1511 | } |
| 1512 | } |
| 1513 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1514 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1515 | TEST_REQUIRES_ARM_NEON; |
| 1516 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1517 | MaxPoolMicrokernelTester() |
| 1518 | .pooling_elements(pooling_elements) |
| 1519 | .pooling_tile(9, 8) |
| 1520 | .channels(4) |
| 1521 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1522 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1523 | } |
| 1524 | } |
| 1525 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1526 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1527 | TEST_REQUIRES_ARM_NEON; |
| 1528 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1529 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1530 | MaxPoolMicrokernelTester() |
| 1531 | .pooling_elements(pooling_elements) |
| 1532 | .pooling_tile(9, 8) |
| 1533 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1534 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1535 | } |
| 1536 | } |
| 1537 | } |
| 1538 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1539 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1540 | TEST_REQUIRES_ARM_NEON; |
| 1541 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1542 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1543 | MaxPoolMicrokernelTester() |
| 1544 | .pooling_elements(pooling_elements) |
| 1545 | .pooling_tile(9, 8) |
| 1546 | .channels(channels) |
| 1547 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1548 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1549 | } |
| 1550 | } |
| 1551 | } |
| 1552 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1553 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1554 | TEST_REQUIRES_ARM_NEON; |
| 1555 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1556 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1557 | MaxPoolMicrokernelTester() |
| 1558 | .pooling_elements(pooling_elements) |
| 1559 | .pooling_tile(9, 8) |
| 1560 | .channels(channels) |
| 1561 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1562 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1563 | } |
| 1564 | } |
| 1565 | } |
| 1566 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1567 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1568 | TEST_REQUIRES_ARM_NEON; |
| 1569 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1570 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1571 | MaxPoolMicrokernelTester() |
| 1572 | .pooling_elements(pooling_elements) |
| 1573 | .pooling_tile(9, 8) |
| 1574 | .channels(channels) |
| 1575 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1576 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1577 | } |
| 1578 | } |
| 1579 | } |
| 1580 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1581 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1582 | TEST_REQUIRES_ARM_NEON; |
| 1583 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1584 | for (size_t channels = 1; channels < 4; channels++) { |
| 1585 | MaxPoolMicrokernelTester() |
| 1586 | .pooling_elements(pooling_elements) |
| 1587 | .pooling_tile(9, 8) |
| 1588 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1589 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1590 | } |
| 1591 | } |
| 1592 | } |
| 1593 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1594 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1595 | TEST_REQUIRES_ARM_NEON; |
| 1596 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1597 | for (size_t channels = 1; channels < 4; channels++) { |
| 1598 | MaxPoolMicrokernelTester() |
| 1599 | .pooling_elements(pooling_elements) |
| 1600 | .pooling_tile(9, 8) |
| 1601 | .channels(channels) |
| 1602 | .input_offset(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1603 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1604 | } |
| 1605 | } |
| 1606 | } |
| 1607 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1608 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1609 | TEST_REQUIRES_ARM_NEON; |
| 1610 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1611 | for (size_t channels = 1; channels < 4; channels++) { |
| 1612 | MaxPoolMicrokernelTester() |
| 1613 | .pooling_elements(pooling_elements) |
| 1614 | .pooling_tile(9, 8) |
| 1615 | .channels(channels) |
| 1616 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1617 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1618 | } |
| 1619 | } |
| 1620 | } |
| 1621 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1622 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1623 | TEST_REQUIRES_ARM_NEON; |
| 1624 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1625 | for (size_t channels = 1; channels < 4; channels++) { |
| 1626 | MaxPoolMicrokernelTester() |
| 1627 | .pooling_elements(pooling_elements) |
| 1628 | .pooling_tile(9, 8) |
| 1629 | .channels(channels) |
| 1630 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1631 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1632 | } |
| 1633 | } |
| 1634 | } |
| 1635 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1636 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1637 | TEST_REQUIRES_ARM_NEON; |
| 1638 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1639 | for (size_t channels = 5; channels < 8; channels++) { |
| 1640 | MaxPoolMicrokernelTester() |
| 1641 | .pooling_elements(pooling_elements) |
| 1642 | .pooling_tile(9, 8) |
| 1643 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1644 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1645 | } |
| 1646 | } |
| 1647 | } |
| 1648 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1649 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1650 | TEST_REQUIRES_ARM_NEON; |
| 1651 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1652 | for (size_t channels = 5; channels < 8; channels++) { |
| 1653 | MaxPoolMicrokernelTester() |
| 1654 | .pooling_elements(pooling_elements) |
| 1655 | .pooling_tile(9, 8) |
| 1656 | .channels(channels) |
| 1657 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1658 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1659 | } |
| 1660 | } |
| 1661 | } |
| 1662 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1663 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1664 | TEST_REQUIRES_ARM_NEON; |
| 1665 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1666 | for (size_t channels = 5; channels < 8; channels++) { |
| 1667 | MaxPoolMicrokernelTester() |
| 1668 | .pooling_elements(pooling_elements) |
| 1669 | .pooling_tile(9, 8) |
| 1670 | .channels(channels) |
| 1671 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1672 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1673 | } |
| 1674 | } |
| 1675 | } |
| 1676 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1677 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1678 | TEST_REQUIRES_ARM_NEON; |
| 1679 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1680 | for (size_t channels = 5; channels < 8; channels++) { |
| 1681 | MaxPoolMicrokernelTester() |
| 1682 | .pooling_elements(pooling_elements) |
| 1683 | .pooling_tile(9, 8) |
| 1684 | .channels(channels) |
| 1685 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1686 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1687 | } |
| 1688 | } |
| 1689 | } |
| 1690 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1691 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1692 | TEST_REQUIRES_ARM_NEON; |
| 1693 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1694 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1695 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1696 | MaxPoolMicrokernelTester() |
| 1697 | .output_pixels(output_pixels) |
| 1698 | .pooling_elements(pooling_elements) |
| 1699 | .pooling_tile(9, 8) |
| 1700 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1701 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1702 | } |
| 1703 | } |
| 1704 | } |
| 1705 | } |
| 1706 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1707 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_input_offset) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1708 | TEST_REQUIRES_ARM_NEON; |
| 1709 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1710 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1711 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1712 | MaxPoolMicrokernelTester() |
| 1713 | .output_pixels(output_pixels) |
| 1714 | .pooling_elements(pooling_elements) |
| 1715 | .pooling_tile(9, 8) |
| 1716 | .channels(channels) |
| 1717 | .input_offset(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1718 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1719 | } |
| 1720 | } |
| 1721 | } |
| 1722 | } |
| 1723 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1724 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_qmin) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1725 | TEST_REQUIRES_ARM_NEON; |
| 1726 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1727 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1728 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1729 | MaxPoolMicrokernelTester() |
| 1730 | .output_pixels(output_pixels) |
| 1731 | .pooling_elements(pooling_elements) |
| 1732 | .pooling_tile(9, 8) |
| 1733 | .channels(channels) |
| 1734 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1735 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1736 | } |
| 1737 | } |
| 1738 | } |
| 1739 | } |
| 1740 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1741 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_qmax) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1742 | TEST_REQUIRES_ARM_NEON; |
| 1743 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1744 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1745 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1746 | MaxPoolMicrokernelTester() |
| 1747 | .output_pixels(output_pixels) |
| 1748 | .pooling_elements(pooling_elements) |
| 1749 | .pooling_tile(9, 8) |
| 1750 | .channels(channels) |
| 1751 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1752 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1753 | } |
| 1754 | } |
| 1755 | } |
| 1756 | } |
| 1757 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1758 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_output_stride) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1759 | TEST_REQUIRES_ARM_NEON; |
| 1760 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1761 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1762 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1763 | MaxPoolMicrokernelTester() |
| 1764 | .output_pixels(output_pixels) |
| 1765 | .pooling_elements(pooling_elements) |
| 1766 | .pooling_tile(9, 8) |
| 1767 | .channels(channels) |
| 1768 | .output_stride(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1769 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1770 | } |
| 1771 | } |
| 1772 | } |
| 1773 | } |
| 1774 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1775 | TEST(F32_MAXPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_step) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1776 | TEST_REQUIRES_ARM_NEON; |
| 1777 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1778 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1779 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1780 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 1781 | MaxPoolMicrokernelTester() |
| 1782 | .output_pixels(output_pixels) |
| 1783 | .pooling_elements(pooling_elements) |
| 1784 | .pooling_tile(9, 8) |
| 1785 | .step(step) |
| 1786 | .channels(channels) |
| 1787 | .output_stride(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1788 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4); |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 1789 | } |
| 1790 | } |
| 1791 | } |
| 1792 | } |
| 1793 | } |
| 1794 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1795 | |
| 1796 | |
Marat Dukhan | 29c6b26 | 2020-04-14 18:07:56 -0700 | [diff] [blame] | 1797 | #if !XNN_ARCH_ASMJS && !XNN_ARCH_WASM && !XNN_COMPILER_MSVC && !XNN_COMPILER_ICC |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1798 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_unipass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1799 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1800 | MaxPoolMicrokernelTester() |
| 1801 | .pooling_elements(9) |
| 1802 | .pooling_tile(9, 8) |
| 1803 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1804 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1805 | } |
| 1806 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1807 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1808 | TEST_REQUIRES_PSIMD; |
| 1809 | MaxPoolMicrokernelTester() |
| 1810 | .pooling_elements(9) |
| 1811 | .pooling_tile(9, 8) |
| 1812 | .channels(4) |
| 1813 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1814 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1815 | } |
| 1816 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1817 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1818 | TEST_REQUIRES_PSIMD; |
| 1819 | MaxPoolMicrokernelTester() |
| 1820 | .pooling_elements(9) |
| 1821 | .pooling_tile(9, 8) |
| 1822 | .channels(4) |
| 1823 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1824 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1825 | } |
| 1826 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1827 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1828 | TEST_REQUIRES_PSIMD; |
| 1829 | MaxPoolMicrokernelTester() |
| 1830 | .pooling_elements(9) |
| 1831 | .pooling_tile(9, 8) |
| 1832 | .channels(4) |
| 1833 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1834 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1835 | } |
| 1836 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1837 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_unipass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1838 | TEST_REQUIRES_PSIMD; |
| 1839 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1840 | MaxPoolMicrokernelTester() |
| 1841 | .pooling_elements(pooling_elements) |
| 1842 | .pooling_tile(9, 8) |
| 1843 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1844 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1845 | } |
| 1846 | } |
| 1847 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1848 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1849 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1850 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1851 | MaxPoolMicrokernelTester() |
| 1852 | .pooling_elements(pooling_elements) |
| 1853 | .pooling_tile(9, 8) |
| 1854 | .channels(4) |
| 1855 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1856 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1857 | } |
| 1858 | } |
| 1859 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1860 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_unipass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1861 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1862 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1863 | MaxPoolMicrokernelTester() |
| 1864 | .pooling_elements(9) |
| 1865 | .pooling_tile(9, 8) |
| 1866 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1867 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1868 | } |
| 1869 | } |
| 1870 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1871 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1872 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1873 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1874 | MaxPoolMicrokernelTester() |
| 1875 | .pooling_elements(9) |
| 1876 | .pooling_tile(9, 8) |
| 1877 | .channels(channels) |
| 1878 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1879 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1880 | } |
| 1881 | } |
| 1882 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1883 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_unipass_fulltile_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1884 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1885 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1886 | MaxPoolMicrokernelTester() |
| 1887 | .pooling_elements(9) |
| 1888 | .pooling_tile(9, 8) |
| 1889 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1890 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1891 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1892 | } |
| 1893 | } |
| 1894 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1895 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1896 | TEST_REQUIRES_PSIMD; |
| 1897 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1898 | MaxPoolMicrokernelTester() |
| 1899 | .pooling_elements(9) |
| 1900 | .pooling_tile(9, 8) |
| 1901 | .channels(channels) |
| 1902 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1903 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1904 | } |
| 1905 | } |
| 1906 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1907 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_unipass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1908 | TEST_REQUIRES_PSIMD; |
| 1909 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1910 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1911 | MaxPoolMicrokernelTester() |
| 1912 | .pooling_elements(pooling_elements) |
| 1913 | .pooling_tile(9, 8) |
| 1914 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1915 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1916 | } |
| 1917 | } |
| 1918 | } |
| 1919 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1920 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1921 | TEST_REQUIRES_PSIMD; |
| 1922 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1923 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1924 | MaxPoolMicrokernelTester() |
| 1925 | .pooling_elements(pooling_elements) |
| 1926 | .pooling_tile(9, 8) |
| 1927 | .channels(channels) |
| 1928 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1929 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1930 | } |
| 1931 | } |
| 1932 | } |
| 1933 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1934 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_unipass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1935 | TEST_REQUIRES_PSIMD; |
| 1936 | for (size_t channels = 1; channels < 4; channels++) { |
| 1937 | MaxPoolMicrokernelTester() |
| 1938 | .pooling_elements(9) |
| 1939 | .pooling_tile(9, 8) |
| 1940 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1941 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1942 | } |
| 1943 | } |
| 1944 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1945 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1946 | TEST_REQUIRES_PSIMD; |
| 1947 | for (size_t channels = 1; channels < 4; channels++) { |
| 1948 | MaxPoolMicrokernelTester() |
| 1949 | .pooling_elements(9) |
| 1950 | .pooling_tile(9, 8) |
| 1951 | .channels(channels) |
| 1952 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1953 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1954 | } |
| 1955 | } |
| 1956 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1957 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1958 | TEST_REQUIRES_PSIMD; |
| 1959 | for (size_t channels = 1; channels < 4; channels++) { |
| 1960 | MaxPoolMicrokernelTester() |
| 1961 | .pooling_elements(9) |
| 1962 | .pooling_tile(9, 8) |
| 1963 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1964 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1965 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1966 | } |
| 1967 | } |
| 1968 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1969 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1970 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1971 | for (size_t channels = 1; channels < 4; channels++) { |
| 1972 | MaxPoolMicrokernelTester() |
| 1973 | .pooling_elements(9) |
| 1974 | .pooling_tile(9, 8) |
| 1975 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1976 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1977 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1978 | } |
| 1979 | } |
| 1980 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1981 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_unipass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1982 | TEST_REQUIRES_PSIMD; |
| 1983 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1984 | for (size_t channels = 1; channels < 4; channels++) { |
| 1985 | MaxPoolMicrokernelTester() |
| 1986 | .pooling_elements(pooling_elements) |
| 1987 | .pooling_tile(9, 8) |
| 1988 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1989 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1990 | } |
| 1991 | } |
| 1992 | } |
| 1993 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1994 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1995 | TEST_REQUIRES_PSIMD; |
| 1996 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1997 | for (size_t channels = 1; channels < 4; channels++) { |
| 1998 | MaxPoolMicrokernelTester() |
| 1999 | .pooling_elements(pooling_elements) |
| 2000 | .pooling_tile(9, 8) |
| 2001 | .channels(channels) |
| 2002 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2003 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2004 | } |
| 2005 | } |
| 2006 | } |
| 2007 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2008 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_unipass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2009 | TEST_REQUIRES_PSIMD; |
| 2010 | for (size_t channels = 5; channels < 8; channels++) { |
| 2011 | MaxPoolMicrokernelTester() |
| 2012 | .pooling_elements(9) |
| 2013 | .pooling_tile(9, 8) |
| 2014 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2015 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2016 | } |
| 2017 | } |
| 2018 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2019 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2020 | TEST_REQUIRES_PSIMD; |
| 2021 | for (size_t channels = 5; channels < 8; channels++) { |
| 2022 | MaxPoolMicrokernelTester() |
| 2023 | .pooling_elements(9) |
| 2024 | .pooling_tile(9, 8) |
| 2025 | .channels(channels) |
| 2026 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2027 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2028 | } |
| 2029 | } |
| 2030 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2031 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2032 | TEST_REQUIRES_PSIMD; |
| 2033 | for (size_t channels = 5; channels < 8; channels++) { |
| 2034 | MaxPoolMicrokernelTester() |
| 2035 | .pooling_elements(9) |
| 2036 | .pooling_tile(9, 8) |
| 2037 | .channels(channels) |
| 2038 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2039 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2040 | } |
| 2041 | } |
| 2042 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2043 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2044 | TEST_REQUIRES_PSIMD; |
| 2045 | for (size_t channels = 5; channels < 8; channels++) { |
| 2046 | MaxPoolMicrokernelTester() |
| 2047 | .pooling_elements(9) |
| 2048 | .pooling_tile(9, 8) |
| 2049 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2050 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2051 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2052 | } |
| 2053 | } |
| 2054 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2055 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_unipass_subtile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2056 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2057 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2058 | for (size_t channels = 5; channels < 8; channels++) { |
| 2059 | MaxPoolMicrokernelTester() |
| 2060 | .pooling_elements(pooling_elements) |
| 2061 | .pooling_tile(9, 8) |
| 2062 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2063 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2064 | } |
| 2065 | } |
| 2066 | } |
| 2067 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2068 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2069 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2070 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2071 | for (size_t channels = 5; channels < 8; channels++) { |
| 2072 | MaxPoolMicrokernelTester() |
| 2073 | .pooling_elements(pooling_elements) |
| 2074 | .pooling_tile(9, 8) |
| 2075 | .channels(channels) |
| 2076 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2077 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2078 | } |
| 2079 | } |
| 2080 | } |
| 2081 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2082 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2083 | TEST_REQUIRES_PSIMD; |
| 2084 | MaxPoolMicrokernelTester() |
| 2085 | .pooling_elements(17) |
| 2086 | .pooling_tile(9, 8) |
| 2087 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2088 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2089 | } |
| 2090 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2091 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2092 | TEST_REQUIRES_PSIMD; |
| 2093 | MaxPoolMicrokernelTester() |
| 2094 | .pooling_elements(17) |
| 2095 | .pooling_tile(9, 8) |
| 2096 | .channels(4) |
| 2097 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2098 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2099 | } |
| 2100 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2101 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2102 | TEST_REQUIRES_PSIMD; |
| 2103 | MaxPoolMicrokernelTester() |
| 2104 | .pooling_elements(17) |
| 2105 | .pooling_tile(9, 8) |
| 2106 | .channels(4) |
| 2107 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2108 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2109 | } |
| 2110 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2111 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2112 | TEST_REQUIRES_PSIMD; |
| 2113 | MaxPoolMicrokernelTester() |
| 2114 | .pooling_elements(17) |
| 2115 | .pooling_tile(9, 8) |
| 2116 | .channels(4) |
| 2117 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2118 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2119 | } |
| 2120 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2121 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2122 | TEST_REQUIRES_PSIMD; |
| 2123 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2124 | MaxPoolMicrokernelTester() |
| 2125 | .pooling_elements(pooling_elements) |
| 2126 | .pooling_tile(9, 8) |
| 2127 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2128 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2129 | } |
| 2130 | } |
| 2131 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2132 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2133 | TEST_REQUIRES_PSIMD; |
| 2134 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2135 | MaxPoolMicrokernelTester() |
| 2136 | .pooling_elements(pooling_elements) |
| 2137 | .pooling_tile(9, 8) |
| 2138 | .channels(4) |
| 2139 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2140 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2141 | } |
| 2142 | } |
| 2143 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2144 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2145 | TEST_REQUIRES_PSIMD; |
| 2146 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2147 | MaxPoolMicrokernelTester() |
| 2148 | .pooling_elements(17) |
| 2149 | .pooling_tile(9, 8) |
| 2150 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2151 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2152 | } |
| 2153 | } |
| 2154 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2155 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2156 | TEST_REQUIRES_PSIMD; |
| 2157 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2158 | MaxPoolMicrokernelTester() |
| 2159 | .pooling_elements(17) |
| 2160 | .pooling_tile(9, 8) |
| 2161 | .channels(channels) |
| 2162 | .input_offset(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2163 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2164 | } |
| 2165 | } |
| 2166 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2167 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2168 | TEST_REQUIRES_PSIMD; |
| 2169 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2170 | MaxPoolMicrokernelTester() |
| 2171 | .pooling_elements(17) |
| 2172 | .pooling_tile(9, 8) |
| 2173 | .channels(channels) |
| 2174 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2175 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2176 | } |
| 2177 | } |
| 2178 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2179 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2180 | TEST_REQUIRES_PSIMD; |
| 2181 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2182 | MaxPoolMicrokernelTester() |
| 2183 | .pooling_elements(17) |
| 2184 | .pooling_tile(9, 8) |
| 2185 | .channels(channels) |
| 2186 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2187 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2188 | } |
| 2189 | } |
| 2190 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2191 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2192 | TEST_REQUIRES_PSIMD; |
| 2193 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2194 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2195 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2196 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2197 | .pooling_tile(9, 8) |
| 2198 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2199 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2200 | } |
| 2201 | } |
| 2202 | } |
| 2203 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2204 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2205 | TEST_REQUIRES_PSIMD; |
| 2206 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2207 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2208 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2209 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2210 | .pooling_tile(9, 8) |
| 2211 | .channels(channels) |
| 2212 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2213 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2214 | } |
| 2215 | } |
| 2216 | } |
| 2217 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2218 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2219 | TEST_REQUIRES_PSIMD; |
| 2220 | for (size_t channels = 1; channels < 4; channels++) { |
| 2221 | MaxPoolMicrokernelTester() |
| 2222 | .pooling_elements(17) |
| 2223 | .pooling_tile(9, 8) |
| 2224 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2225 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2226 | } |
| 2227 | } |
| 2228 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2229 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2230 | TEST_REQUIRES_PSIMD; |
| 2231 | for (size_t channels = 1; channels < 4; channels++) { |
| 2232 | MaxPoolMicrokernelTester() |
| 2233 | .pooling_elements(17) |
| 2234 | .pooling_tile(9, 8) |
| 2235 | .channels(channels) |
| 2236 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2237 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2238 | } |
| 2239 | } |
| 2240 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2241 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2242 | TEST_REQUIRES_PSIMD; |
| 2243 | for (size_t channels = 1; channels < 4; channels++) { |
| 2244 | MaxPoolMicrokernelTester() |
| 2245 | .pooling_elements(17) |
| 2246 | .pooling_tile(9, 8) |
| 2247 | .channels(channels) |
| 2248 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2249 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2250 | } |
| 2251 | } |
| 2252 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2253 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2254 | TEST_REQUIRES_PSIMD; |
| 2255 | for (size_t channels = 1; channels < 4; channels++) { |
| 2256 | MaxPoolMicrokernelTester() |
| 2257 | .pooling_elements(17) |
| 2258 | .pooling_tile(9, 8) |
| 2259 | .channels(channels) |
| 2260 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2261 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2262 | } |
| 2263 | } |
| 2264 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2265 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2266 | TEST_REQUIRES_PSIMD; |
| 2267 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2268 | for (size_t channels = 1; channels < 4; channels++) { |
| 2269 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2270 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2271 | .pooling_tile(9, 8) |
| 2272 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2273 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2274 | } |
| 2275 | } |
| 2276 | } |
| 2277 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2278 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2279 | TEST_REQUIRES_PSIMD; |
| 2280 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2281 | for (size_t channels = 1; channels < 4; channels++) { |
| 2282 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2283 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2284 | .pooling_tile(9, 8) |
| 2285 | .channels(channels) |
| 2286 | .input_offset(5) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2287 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2288 | } |
| 2289 | } |
| 2290 | } |
| 2291 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2292 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2293 | TEST_REQUIRES_PSIMD; |
| 2294 | for (size_t channels = 5; channels < 8; channels++) { |
| 2295 | MaxPoolMicrokernelTester() |
| 2296 | .pooling_elements(17) |
| 2297 | .pooling_tile(9, 8) |
| 2298 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2299 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2300 | } |
| 2301 | } |
| 2302 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2303 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2304 | TEST_REQUIRES_PSIMD; |
| 2305 | for (size_t channels = 5; channels < 8; channels++) { |
| 2306 | MaxPoolMicrokernelTester() |
| 2307 | .pooling_elements(17) |
| 2308 | .pooling_tile(9, 8) |
| 2309 | .channels(channels) |
| 2310 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2311 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2312 | } |
| 2313 | } |
| 2314 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2315 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2316 | TEST_REQUIRES_PSIMD; |
| 2317 | for (size_t channels = 5; channels < 8; channels++) { |
| 2318 | MaxPoolMicrokernelTester() |
| 2319 | .pooling_elements(17) |
| 2320 | .pooling_tile(9, 8) |
| 2321 | .channels(channels) |
| 2322 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2323 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2324 | } |
| 2325 | } |
| 2326 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2327 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2328 | TEST_REQUIRES_PSIMD; |
| 2329 | for (size_t channels = 5; channels < 8; channels++) { |
| 2330 | MaxPoolMicrokernelTester() |
| 2331 | .pooling_elements(17) |
| 2332 | .pooling_tile(9, 8) |
| 2333 | .channels(channels) |
| 2334 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2335 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2336 | } |
| 2337 | } |
| 2338 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2339 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2340 | TEST_REQUIRES_PSIMD; |
| 2341 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2342 | for (size_t channels = 5; channels < 8; channels++) { |
| 2343 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2344 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2345 | .pooling_tile(9, 8) |
| 2346 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2347 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2348 | } |
| 2349 | } |
| 2350 | } |
| 2351 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2352 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2353 | TEST_REQUIRES_PSIMD; |
| 2354 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2355 | for (size_t channels = 5; channels < 8; channels++) { |
| 2356 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2357 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2358 | .pooling_tile(9, 8) |
| 2359 | .channels(channels) |
| 2360 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2361 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2362 | } |
| 2363 | } |
| 2364 | } |
| 2365 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2366 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_multipass) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2367 | TEST_REQUIRES_PSIMD; |
| 2368 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2369 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2370 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2371 | .pooling_tile(9, 8) |
| 2372 | .channels(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2373 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2374 | } |
| 2375 | } |
| 2376 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2377 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_multipass_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2378 | TEST_REQUIRES_PSIMD; |
| 2379 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2380 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2381 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2382 | .pooling_tile(9, 8) |
| 2383 | .channels(4) |
| 2384 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2385 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2386 | } |
| 2387 | } |
| 2388 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2389 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_multipass_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2390 | TEST_REQUIRES_PSIMD; |
| 2391 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2392 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2393 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2394 | .pooling_tile(9, 8) |
| 2395 | .channels(4) |
| 2396 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2397 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2398 | } |
| 2399 | } |
| 2400 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2401 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_eq_4_multipass_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2402 | TEST_REQUIRES_PSIMD; |
| 2403 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2404 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2405 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2406 | .pooling_tile(9, 8) |
| 2407 | .channels(4) |
| 2408 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2409 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2410 | } |
| 2411 | } |
| 2412 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2413 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_multipass) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2414 | TEST_REQUIRES_PSIMD; |
| 2415 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2416 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2417 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2418 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2419 | .pooling_tile(9, 8) |
| 2420 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2421 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2422 | } |
| 2423 | } |
| 2424 | } |
| 2425 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2426 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_multipass_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2427 | TEST_REQUIRES_PSIMD; |
| 2428 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2429 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2430 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2431 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2432 | .pooling_tile(9, 8) |
| 2433 | .channels(channels) |
| 2434 | .input_offset(37) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2435 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2436 | } |
| 2437 | } |
| 2438 | } |
| 2439 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2440 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_multipass_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2441 | TEST_REQUIRES_PSIMD; |
| 2442 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2443 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2444 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2445 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2446 | .pooling_tile(9, 8) |
| 2447 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2448 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2449 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2450 | } |
| 2451 | } |
| 2452 | } |
| 2453 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2454 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_div_4_multipass_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2455 | TEST_REQUIRES_PSIMD; |
| 2456 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2457 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2458 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2459 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2460 | .pooling_tile(9, 8) |
| 2461 | .channels(channels) |
| 2462 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2463 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2464 | } |
| 2465 | } |
| 2466 | } |
| 2467 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2468 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_multipass) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2469 | TEST_REQUIRES_PSIMD; |
| 2470 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2471 | for (size_t channels = 1; channels < 4; channels++) { |
| 2472 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2473 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2474 | .pooling_tile(9, 8) |
| 2475 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2476 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2477 | } |
| 2478 | } |
| 2479 | } |
| 2480 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2481 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_multipass_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2482 | TEST_REQUIRES_PSIMD; |
| 2483 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2484 | for (size_t channels = 1; channels < 4; channels++) { |
| 2485 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2486 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2487 | .pooling_tile(9, 8) |
| 2488 | .channels(channels) |
| 2489 | .input_offset(4) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2490 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2491 | } |
| 2492 | } |
| 2493 | } |
| 2494 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2495 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_multipass_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2496 | TEST_REQUIRES_PSIMD; |
| 2497 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2498 | for (size_t channels = 1; channels < 4; channels++) { |
| 2499 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2500 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2501 | .pooling_tile(9, 8) |
| 2502 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2503 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2504 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2505 | } |
| 2506 | } |
| 2507 | } |
| 2508 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2509 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_lt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2510 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2511 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2512 | for (size_t channels = 1; channels < 4; channels++) { |
| 2513 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2514 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2515 | .pooling_tile(9, 8) |
| 2516 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2517 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2518 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2519 | } |
| 2520 | } |
| 2521 | } |
| 2522 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2523 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_multipass) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2524 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2525 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2526 | for (size_t channels = 5; channels < 8; channels++) { |
| 2527 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2528 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2529 | .pooling_tile(9, 8) |
| 2530 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2531 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2532 | } |
| 2533 | } |
| 2534 | } |
| 2535 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2536 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_multipass_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2537 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2538 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2539 | for (size_t channels = 5; channels < 8; channels++) { |
| 2540 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2541 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2542 | .pooling_tile(9, 8) |
| 2543 | .channels(channels) |
| 2544 | .input_offset(11) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2545 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2546 | } |
| 2547 | } |
| 2548 | } |
| 2549 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2550 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_multipass_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2551 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2552 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2553 | for (size_t channels = 5; channels < 8; channels++) { |
| 2554 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2555 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2556 | .pooling_tile(9, 8) |
| 2557 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2558 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2559 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2560 | } |
| 2561 | } |
| 2562 | } |
| 2563 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2564 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, channels_gt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2565 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2566 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2567 | for (size_t channels = 5; channels < 8; channels++) { |
| 2568 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 2569 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2570 | .pooling_tile(9, 8) |
| 2571 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2572 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2573 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2574 | } |
| 2575 | } |
| 2576 | } |
| 2577 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2578 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, few_output_pixels) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2579 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2580 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2581 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2582 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2583 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2584 | .output_pixels(output_pixels) |
| 2585 | .pooling_elements(pooling_elements) |
| 2586 | .pooling_tile(9, 8) |
| 2587 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2588 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2589 | } |
| 2590 | } |
| 2591 | } |
| 2592 | } |
| 2593 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2594 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, few_output_pixels_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2595 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2596 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2597 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2598 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2599 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2600 | .output_pixels(output_pixels) |
| 2601 | .pooling_elements(pooling_elements) |
| 2602 | .pooling_tile(9, 8) |
| 2603 | .channels(channels) |
| 2604 | .input_offset(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2605 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2606 | } |
| 2607 | } |
| 2608 | } |
| 2609 | } |
| 2610 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2611 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, few_output_pixels_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2612 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2613 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2614 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2615 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2616 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2617 | .output_pixels(output_pixels) |
| 2618 | .pooling_elements(pooling_elements) |
| 2619 | .pooling_tile(9, 8) |
| 2620 | .channels(channels) |
| 2621 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2622 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2623 | } |
| 2624 | } |
| 2625 | } |
| 2626 | } |
| 2627 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2628 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, few_output_pixels_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2629 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2630 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2631 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2632 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2633 | MaxPoolMicrokernelTester() |
| 2634 | .output_pixels(output_pixels) |
| 2635 | .pooling_elements(pooling_elements) |
| 2636 | .pooling_tile(9, 8) |
| 2637 | .channels(channels) |
| 2638 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2639 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2640 | } |
| 2641 | } |
| 2642 | } |
| 2643 | } |
| 2644 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2645 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, few_output_pixels_with_output_stride) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2646 | TEST_REQUIRES_PSIMD; |
| 2647 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2648 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2649 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2650 | MaxPoolMicrokernelTester() |
| 2651 | .output_pixels(output_pixels) |
| 2652 | .pooling_elements(pooling_elements) |
| 2653 | .pooling_tile(9, 8) |
| 2654 | .channels(channels) |
| 2655 | .output_stride(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2656 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2657 | } |
| 2658 | } |
| 2659 | } |
| 2660 | } |
| 2661 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2662 | TEST(F32_MAXPOOL_MINMAX_9P8X__PSIMD_C4, few_output_pixels_with_step) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2663 | TEST_REQUIRES_PSIMD; |
| 2664 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2665 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2666 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2667 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2668 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2669 | .output_pixels(output_pixels) |
| 2670 | .pooling_elements(pooling_elements) |
| 2671 | .pooling_tile(9, 8) |
| 2672 | .step(step) |
| 2673 | .channels(channels) |
| 2674 | .output_stride(23) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 2675 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2676 | } |
| 2677 | } |
| 2678 | } |
| 2679 | } |
| 2680 | } |
Marat Dukhan | 29c6b26 | 2020-04-14 18:07:56 -0700 | [diff] [blame] | 2681 | #endif // !XNN_ARCH_ASMJS && !XNN_ARCH_WASM && !XNN_COMPILER_MSVC && !XNN_COMPILER_ICC |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2682 | |
| 2683 | |
Marat Dukhan | f6e2480 | 2020-07-08 22:20:40 -0700 | [diff] [blame^] | 2684 | #if XNN_ARCH_WASMSIMD |
| 2685 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile) { |
| 2686 | MaxPoolMicrokernelTester() |
| 2687 | .pooling_elements(9) |
| 2688 | .pooling_tile(9, 8) |
| 2689 | .channels(4) |
| 2690 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2691 | } |
| 2692 | |
| 2693 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
| 2694 | MaxPoolMicrokernelTester() |
| 2695 | .pooling_elements(9) |
| 2696 | .pooling_tile(9, 8) |
| 2697 | .channels(4) |
| 2698 | .input_offset(7) |
| 2699 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2700 | } |
| 2701 | |
| 2702 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
| 2703 | MaxPoolMicrokernelTester() |
| 2704 | .pooling_elements(9) |
| 2705 | .pooling_tile(9, 8) |
| 2706 | .channels(4) |
| 2707 | .qmin(192) |
| 2708 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2709 | } |
| 2710 | |
| 2711 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
| 2712 | MaxPoolMicrokernelTester() |
| 2713 | .pooling_elements(9) |
| 2714 | .pooling_tile(9, 8) |
| 2715 | .channels(4) |
| 2716 | .qmax(192) |
| 2717 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2718 | } |
| 2719 | |
| 2720 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_subtile) { |
| 2721 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2722 | MaxPoolMicrokernelTester() |
| 2723 | .pooling_elements(pooling_elements) |
| 2724 | .pooling_tile(9, 8) |
| 2725 | .channels(4) |
| 2726 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2727 | } |
| 2728 | } |
| 2729 | |
| 2730 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
| 2731 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2732 | MaxPoolMicrokernelTester() |
| 2733 | .pooling_elements(pooling_elements) |
| 2734 | .pooling_tile(9, 8) |
| 2735 | .channels(4) |
| 2736 | .input_offset(7) |
| 2737 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2738 | } |
| 2739 | } |
| 2740 | |
| 2741 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile) { |
| 2742 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2743 | MaxPoolMicrokernelTester() |
| 2744 | .pooling_elements(9) |
| 2745 | .pooling_tile(9, 8) |
| 2746 | .channels(channels) |
| 2747 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2748 | } |
| 2749 | } |
| 2750 | |
| 2751 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
| 2752 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2753 | MaxPoolMicrokernelTester() |
| 2754 | .pooling_elements(9) |
| 2755 | .pooling_tile(9, 8) |
| 2756 | .channels(channels) |
| 2757 | .input_offset(37) |
| 2758 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2759 | } |
| 2760 | } |
| 2761 | |
| 2762 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_qmin) { |
| 2763 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2764 | MaxPoolMicrokernelTester() |
| 2765 | .pooling_elements(9) |
| 2766 | .pooling_tile(9, 8) |
| 2767 | .channels(channels) |
| 2768 | .qmin(192) |
| 2769 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2770 | } |
| 2771 | } |
| 2772 | |
| 2773 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_qmax) { |
| 2774 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2775 | MaxPoolMicrokernelTester() |
| 2776 | .pooling_elements(9) |
| 2777 | .pooling_tile(9, 8) |
| 2778 | .channels(channels) |
| 2779 | .qmax(192) |
| 2780 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2781 | } |
| 2782 | } |
| 2783 | |
| 2784 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_subtile) { |
| 2785 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2786 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2787 | MaxPoolMicrokernelTester() |
| 2788 | .pooling_elements(pooling_elements) |
| 2789 | .pooling_tile(9, 8) |
| 2790 | .channels(channels) |
| 2791 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2792 | } |
| 2793 | } |
| 2794 | } |
| 2795 | |
| 2796 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_subtile_with_input_offset) { |
| 2797 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2798 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2799 | MaxPoolMicrokernelTester() |
| 2800 | .pooling_elements(pooling_elements) |
| 2801 | .pooling_tile(9, 8) |
| 2802 | .channels(channels) |
| 2803 | .input_offset(37) |
| 2804 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2805 | } |
| 2806 | } |
| 2807 | } |
| 2808 | |
| 2809 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile) { |
| 2810 | for (size_t channels = 1; channels < 4; channels++) { |
| 2811 | MaxPoolMicrokernelTester() |
| 2812 | .pooling_elements(9) |
| 2813 | .pooling_tile(9, 8) |
| 2814 | .channels(channels) |
| 2815 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2816 | } |
| 2817 | } |
| 2818 | |
| 2819 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
| 2820 | for (size_t channels = 1; channels < 4; channels++) { |
| 2821 | MaxPoolMicrokernelTester() |
| 2822 | .pooling_elements(9) |
| 2823 | .pooling_tile(9, 8) |
| 2824 | .channels(channels) |
| 2825 | .input_offset(5) |
| 2826 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2827 | } |
| 2828 | } |
| 2829 | |
| 2830 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
| 2831 | for (size_t channels = 1; channels < 4; channels++) { |
| 2832 | MaxPoolMicrokernelTester() |
| 2833 | .pooling_elements(9) |
| 2834 | .pooling_tile(9, 8) |
| 2835 | .channels(channels) |
| 2836 | .qmin(192) |
| 2837 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2838 | } |
| 2839 | } |
| 2840 | |
| 2841 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
| 2842 | for (size_t channels = 1; channels < 4; channels++) { |
| 2843 | MaxPoolMicrokernelTester() |
| 2844 | .pooling_elements(9) |
| 2845 | .pooling_tile(9, 8) |
| 2846 | .channels(channels) |
| 2847 | .qmax(192) |
| 2848 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2849 | } |
| 2850 | } |
| 2851 | |
| 2852 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_subtile) { |
| 2853 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2854 | for (size_t channels = 1; channels < 4; channels++) { |
| 2855 | MaxPoolMicrokernelTester() |
| 2856 | .pooling_elements(pooling_elements) |
| 2857 | .pooling_tile(9, 8) |
| 2858 | .channels(channels) |
| 2859 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2860 | } |
| 2861 | } |
| 2862 | } |
| 2863 | |
| 2864 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
| 2865 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2866 | for (size_t channels = 1; channels < 4; channels++) { |
| 2867 | MaxPoolMicrokernelTester() |
| 2868 | .pooling_elements(pooling_elements) |
| 2869 | .pooling_tile(9, 8) |
| 2870 | .channels(channels) |
| 2871 | .input_offset(5) |
| 2872 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2873 | } |
| 2874 | } |
| 2875 | } |
| 2876 | |
| 2877 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile) { |
| 2878 | for (size_t channels = 5; channels < 8; channels++) { |
| 2879 | MaxPoolMicrokernelTester() |
| 2880 | .pooling_elements(9) |
| 2881 | .pooling_tile(9, 8) |
| 2882 | .channels(channels) |
| 2883 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2884 | } |
| 2885 | } |
| 2886 | |
| 2887 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
| 2888 | for (size_t channels = 5; channels < 8; channels++) { |
| 2889 | MaxPoolMicrokernelTester() |
| 2890 | .pooling_elements(9) |
| 2891 | .pooling_tile(9, 8) |
| 2892 | .channels(channels) |
| 2893 | .input_offset(11) |
| 2894 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2895 | } |
| 2896 | } |
| 2897 | |
| 2898 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
| 2899 | for (size_t channels = 5; channels < 8; channels++) { |
| 2900 | MaxPoolMicrokernelTester() |
| 2901 | .pooling_elements(9) |
| 2902 | .pooling_tile(9, 8) |
| 2903 | .channels(channels) |
| 2904 | .qmin(192) |
| 2905 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2906 | } |
| 2907 | } |
| 2908 | |
| 2909 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
| 2910 | for (size_t channels = 5; channels < 8; channels++) { |
| 2911 | MaxPoolMicrokernelTester() |
| 2912 | .pooling_elements(9) |
| 2913 | .pooling_tile(9, 8) |
| 2914 | .channels(channels) |
| 2915 | .qmax(192) |
| 2916 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2917 | } |
| 2918 | } |
| 2919 | |
| 2920 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_subtile) { |
| 2921 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2922 | for (size_t channels = 5; channels < 8; channels++) { |
| 2923 | MaxPoolMicrokernelTester() |
| 2924 | .pooling_elements(pooling_elements) |
| 2925 | .pooling_tile(9, 8) |
| 2926 | .channels(channels) |
| 2927 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2928 | } |
| 2929 | } |
| 2930 | } |
| 2931 | |
| 2932 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
| 2933 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 2934 | for (size_t channels = 5; channels < 8; channels++) { |
| 2935 | MaxPoolMicrokernelTester() |
| 2936 | .pooling_elements(pooling_elements) |
| 2937 | .pooling_tile(9, 8) |
| 2938 | .channels(channels) |
| 2939 | .input_offset(11) |
| 2940 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2941 | } |
| 2942 | } |
| 2943 | } |
| 2944 | |
| 2945 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile) { |
| 2946 | MaxPoolMicrokernelTester() |
| 2947 | .pooling_elements(17) |
| 2948 | .pooling_tile(9, 8) |
| 2949 | .channels(4) |
| 2950 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2951 | } |
| 2952 | |
| 2953 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
| 2954 | MaxPoolMicrokernelTester() |
| 2955 | .pooling_elements(17) |
| 2956 | .pooling_tile(9, 8) |
| 2957 | .channels(4) |
| 2958 | .input_offset(7) |
| 2959 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2960 | } |
| 2961 | |
| 2962 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
| 2963 | MaxPoolMicrokernelTester() |
| 2964 | .pooling_elements(17) |
| 2965 | .pooling_tile(9, 8) |
| 2966 | .channels(4) |
| 2967 | .qmin(192) |
| 2968 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2969 | } |
| 2970 | |
| 2971 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
| 2972 | MaxPoolMicrokernelTester() |
| 2973 | .pooling_elements(17) |
| 2974 | .pooling_tile(9, 8) |
| 2975 | .channels(4) |
| 2976 | .qmax(192) |
| 2977 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2978 | } |
| 2979 | |
| 2980 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_subtile) { |
| 2981 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2982 | MaxPoolMicrokernelTester() |
| 2983 | .pooling_elements(pooling_elements) |
| 2984 | .pooling_tile(9, 8) |
| 2985 | .channels(4) |
| 2986 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2987 | } |
| 2988 | } |
| 2989 | |
| 2990 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
| 2991 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2992 | MaxPoolMicrokernelTester() |
| 2993 | .pooling_elements(pooling_elements) |
| 2994 | .pooling_tile(9, 8) |
| 2995 | .channels(4) |
| 2996 | .input_offset(7) |
| 2997 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 2998 | } |
| 2999 | } |
| 3000 | |
| 3001 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile) { |
| 3002 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3003 | MaxPoolMicrokernelTester() |
| 3004 | .pooling_elements(17) |
| 3005 | .pooling_tile(9, 8) |
| 3006 | .channels(channels) |
| 3007 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3008 | } |
| 3009 | } |
| 3010 | |
| 3011 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
| 3012 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3013 | MaxPoolMicrokernelTester() |
| 3014 | .pooling_elements(17) |
| 3015 | .pooling_tile(9, 8) |
| 3016 | .channels(channels) |
| 3017 | .input_offset(23) |
| 3018 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3019 | } |
| 3020 | } |
| 3021 | |
| 3022 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_qmin) { |
| 3023 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3024 | MaxPoolMicrokernelTester() |
| 3025 | .pooling_elements(17) |
| 3026 | .pooling_tile(9, 8) |
| 3027 | .channels(channels) |
| 3028 | .qmin(192) |
| 3029 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3030 | } |
| 3031 | } |
| 3032 | |
| 3033 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_qmax) { |
| 3034 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3035 | MaxPoolMicrokernelTester() |
| 3036 | .pooling_elements(17) |
| 3037 | .pooling_tile(9, 8) |
| 3038 | .channels(channels) |
| 3039 | .qmax(192) |
| 3040 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3041 | } |
| 3042 | } |
| 3043 | |
| 3044 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_subtile) { |
| 3045 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3046 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3047 | MaxPoolMicrokernelTester() |
| 3048 | .pooling_elements(pooling_elements) |
| 3049 | .pooling_tile(9, 8) |
| 3050 | .channels(channels) |
| 3051 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3052 | } |
| 3053 | } |
| 3054 | } |
| 3055 | |
| 3056 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_subtile_with_input_offset) { |
| 3057 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3058 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3059 | MaxPoolMicrokernelTester() |
| 3060 | .pooling_elements(pooling_elements) |
| 3061 | .pooling_tile(9, 8) |
| 3062 | .channels(channels) |
| 3063 | .input_offset(37) |
| 3064 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3065 | } |
| 3066 | } |
| 3067 | } |
| 3068 | |
| 3069 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile) { |
| 3070 | for (size_t channels = 1; channels < 4; channels++) { |
| 3071 | MaxPoolMicrokernelTester() |
| 3072 | .pooling_elements(17) |
| 3073 | .pooling_tile(9, 8) |
| 3074 | .channels(channels) |
| 3075 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3076 | } |
| 3077 | } |
| 3078 | |
| 3079 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
| 3080 | for (size_t channels = 1; channels < 4; channels++) { |
| 3081 | MaxPoolMicrokernelTester() |
| 3082 | .pooling_elements(17) |
| 3083 | .pooling_tile(9, 8) |
| 3084 | .channels(channels) |
| 3085 | .input_offset(5) |
| 3086 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3087 | } |
| 3088 | } |
| 3089 | |
| 3090 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
| 3091 | for (size_t channels = 1; channels < 4; channels++) { |
| 3092 | MaxPoolMicrokernelTester() |
| 3093 | .pooling_elements(17) |
| 3094 | .pooling_tile(9, 8) |
| 3095 | .channels(channels) |
| 3096 | .qmin(192) |
| 3097 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3098 | } |
| 3099 | } |
| 3100 | |
| 3101 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
| 3102 | for (size_t channels = 1; channels < 4; channels++) { |
| 3103 | MaxPoolMicrokernelTester() |
| 3104 | .pooling_elements(17) |
| 3105 | .pooling_tile(9, 8) |
| 3106 | .channels(channels) |
| 3107 | .qmax(192) |
| 3108 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3109 | } |
| 3110 | } |
| 3111 | |
| 3112 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_subtile) { |
| 3113 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3114 | for (size_t channels = 1; channels < 4; channels++) { |
| 3115 | MaxPoolMicrokernelTester() |
| 3116 | .pooling_elements(pooling_elements) |
| 3117 | .pooling_tile(9, 8) |
| 3118 | .channels(channels) |
| 3119 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3120 | } |
| 3121 | } |
| 3122 | } |
| 3123 | |
| 3124 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
| 3125 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3126 | for (size_t channels = 1; channels < 4; channels++) { |
| 3127 | MaxPoolMicrokernelTester() |
| 3128 | .pooling_elements(pooling_elements) |
| 3129 | .pooling_tile(9, 8) |
| 3130 | .channels(channels) |
| 3131 | .input_offset(5) |
| 3132 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3133 | } |
| 3134 | } |
| 3135 | } |
| 3136 | |
| 3137 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile) { |
| 3138 | for (size_t channels = 5; channels < 8; channels++) { |
| 3139 | MaxPoolMicrokernelTester() |
| 3140 | .pooling_elements(17) |
| 3141 | .pooling_tile(9, 8) |
| 3142 | .channels(channels) |
| 3143 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3144 | } |
| 3145 | } |
| 3146 | |
| 3147 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
| 3148 | for (size_t channels = 5; channels < 8; channels++) { |
| 3149 | MaxPoolMicrokernelTester() |
| 3150 | .pooling_elements(17) |
| 3151 | .pooling_tile(9, 8) |
| 3152 | .channels(channels) |
| 3153 | .input_offset(11) |
| 3154 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3155 | } |
| 3156 | } |
| 3157 | |
| 3158 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
| 3159 | for (size_t channels = 5; channels < 8; channels++) { |
| 3160 | MaxPoolMicrokernelTester() |
| 3161 | .pooling_elements(17) |
| 3162 | .pooling_tile(9, 8) |
| 3163 | .channels(channels) |
| 3164 | .qmin(192) |
| 3165 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3166 | } |
| 3167 | } |
| 3168 | |
| 3169 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
| 3170 | for (size_t channels = 5; channels < 8; channels++) { |
| 3171 | MaxPoolMicrokernelTester() |
| 3172 | .pooling_elements(17) |
| 3173 | .pooling_tile(9, 8) |
| 3174 | .channels(channels) |
| 3175 | .qmax(192) |
| 3176 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3177 | } |
| 3178 | } |
| 3179 | |
| 3180 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_subtile) { |
| 3181 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3182 | for (size_t channels = 5; channels < 8; channels++) { |
| 3183 | MaxPoolMicrokernelTester() |
| 3184 | .pooling_elements(pooling_elements) |
| 3185 | .pooling_tile(9, 8) |
| 3186 | .channels(channels) |
| 3187 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3188 | } |
| 3189 | } |
| 3190 | } |
| 3191 | |
| 3192 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
| 3193 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3194 | for (size_t channels = 5; channels < 8; channels++) { |
| 3195 | MaxPoolMicrokernelTester() |
| 3196 | .pooling_elements(pooling_elements) |
| 3197 | .pooling_tile(9, 8) |
| 3198 | .channels(channels) |
| 3199 | .input_offset(11) |
| 3200 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3201 | } |
| 3202 | } |
| 3203 | } |
| 3204 | |
| 3205 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass) { |
| 3206 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3207 | MaxPoolMicrokernelTester() |
| 3208 | .pooling_elements(pooling_elements) |
| 3209 | .pooling_tile(9, 8) |
| 3210 | .channels(4) |
| 3211 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3212 | } |
| 3213 | } |
| 3214 | |
| 3215 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_input_offset) { |
| 3216 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3217 | MaxPoolMicrokernelTester() |
| 3218 | .pooling_elements(pooling_elements) |
| 3219 | .pooling_tile(9, 8) |
| 3220 | .channels(4) |
| 3221 | .input_offset(7) |
| 3222 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3223 | } |
| 3224 | } |
| 3225 | |
| 3226 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_qmin) { |
| 3227 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3228 | MaxPoolMicrokernelTester() |
| 3229 | .pooling_elements(pooling_elements) |
| 3230 | .pooling_tile(9, 8) |
| 3231 | .channels(4) |
| 3232 | .qmin(192) |
| 3233 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3234 | } |
| 3235 | } |
| 3236 | |
| 3237 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_qmax) { |
| 3238 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3239 | MaxPoolMicrokernelTester() |
| 3240 | .pooling_elements(pooling_elements) |
| 3241 | .pooling_tile(9, 8) |
| 3242 | .channels(4) |
| 3243 | .qmax(192) |
| 3244 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3245 | } |
| 3246 | } |
| 3247 | |
| 3248 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass) { |
| 3249 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3250 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3251 | MaxPoolMicrokernelTester() |
| 3252 | .pooling_elements(pooling_elements) |
| 3253 | .pooling_tile(9, 8) |
| 3254 | .channels(channels) |
| 3255 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3256 | } |
| 3257 | } |
| 3258 | } |
| 3259 | |
| 3260 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_input_offset) { |
| 3261 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3262 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3263 | MaxPoolMicrokernelTester() |
| 3264 | .pooling_elements(pooling_elements) |
| 3265 | .pooling_tile(9, 8) |
| 3266 | .channels(channels) |
| 3267 | .input_offset(37) |
| 3268 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3269 | } |
| 3270 | } |
| 3271 | } |
| 3272 | |
| 3273 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_qmin) { |
| 3274 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3275 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3276 | MaxPoolMicrokernelTester() |
| 3277 | .pooling_elements(pooling_elements) |
| 3278 | .pooling_tile(9, 8) |
| 3279 | .channels(channels) |
| 3280 | .qmin(192) |
| 3281 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3282 | } |
| 3283 | } |
| 3284 | } |
| 3285 | |
| 3286 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_qmax) { |
| 3287 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3288 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3289 | MaxPoolMicrokernelTester() |
| 3290 | .pooling_elements(pooling_elements) |
| 3291 | .pooling_tile(9, 8) |
| 3292 | .channels(channels) |
| 3293 | .qmax(192) |
| 3294 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3295 | } |
| 3296 | } |
| 3297 | } |
| 3298 | |
| 3299 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass) { |
| 3300 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3301 | for (size_t channels = 1; channels < 4; channels++) { |
| 3302 | MaxPoolMicrokernelTester() |
| 3303 | .pooling_elements(pooling_elements) |
| 3304 | .pooling_tile(9, 8) |
| 3305 | .channels(channels) |
| 3306 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3307 | } |
| 3308 | } |
| 3309 | } |
| 3310 | |
| 3311 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_input_offset) { |
| 3312 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3313 | for (size_t channels = 1; channels < 4; channels++) { |
| 3314 | MaxPoolMicrokernelTester() |
| 3315 | .pooling_elements(pooling_elements) |
| 3316 | .pooling_tile(9, 8) |
| 3317 | .channels(channels) |
| 3318 | .input_offset(4) |
| 3319 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3320 | } |
| 3321 | } |
| 3322 | } |
| 3323 | |
| 3324 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_qmin) { |
| 3325 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3326 | for (size_t channels = 1; channels < 4; channels++) { |
| 3327 | MaxPoolMicrokernelTester() |
| 3328 | .pooling_elements(pooling_elements) |
| 3329 | .pooling_tile(9, 8) |
| 3330 | .channels(channels) |
| 3331 | .qmin(192) |
| 3332 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3333 | } |
| 3334 | } |
| 3335 | } |
| 3336 | |
| 3337 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_qmax) { |
| 3338 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3339 | for (size_t channels = 1; channels < 4; channels++) { |
| 3340 | MaxPoolMicrokernelTester() |
| 3341 | .pooling_elements(pooling_elements) |
| 3342 | .pooling_tile(9, 8) |
| 3343 | .channels(channels) |
| 3344 | .qmax(192) |
| 3345 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3346 | } |
| 3347 | } |
| 3348 | } |
| 3349 | |
| 3350 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass) { |
| 3351 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3352 | for (size_t channels = 5; channels < 8; channels++) { |
| 3353 | MaxPoolMicrokernelTester() |
| 3354 | .pooling_elements(pooling_elements) |
| 3355 | .pooling_tile(9, 8) |
| 3356 | .channels(channels) |
| 3357 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3358 | } |
| 3359 | } |
| 3360 | } |
| 3361 | |
| 3362 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_input_offset) { |
| 3363 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3364 | for (size_t channels = 5; channels < 8; channels++) { |
| 3365 | MaxPoolMicrokernelTester() |
| 3366 | .pooling_elements(pooling_elements) |
| 3367 | .pooling_tile(9, 8) |
| 3368 | .channels(channels) |
| 3369 | .input_offset(11) |
| 3370 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3371 | } |
| 3372 | } |
| 3373 | } |
| 3374 | |
| 3375 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_qmin) { |
| 3376 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3377 | for (size_t channels = 5; channels < 8; channels++) { |
| 3378 | MaxPoolMicrokernelTester() |
| 3379 | .pooling_elements(pooling_elements) |
| 3380 | .pooling_tile(9, 8) |
| 3381 | .channels(channels) |
| 3382 | .qmin(192) |
| 3383 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3384 | } |
| 3385 | } |
| 3386 | } |
| 3387 | |
| 3388 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_qmax) { |
| 3389 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3390 | for (size_t channels = 5; channels < 8; channels++) { |
| 3391 | MaxPoolMicrokernelTester() |
| 3392 | .pooling_elements(pooling_elements) |
| 3393 | .pooling_tile(9, 8) |
| 3394 | .channels(channels) |
| 3395 | .qmax(192) |
| 3396 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3397 | } |
| 3398 | } |
| 3399 | } |
| 3400 | |
| 3401 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels) { |
| 3402 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3403 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 3404 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3405 | MaxPoolMicrokernelTester() |
| 3406 | .output_pixels(output_pixels) |
| 3407 | .pooling_elements(pooling_elements) |
| 3408 | .pooling_tile(9, 8) |
| 3409 | .channels(channels) |
| 3410 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3411 | } |
| 3412 | } |
| 3413 | } |
| 3414 | } |
| 3415 | |
| 3416 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_input_offset) { |
| 3417 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3418 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 3419 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3420 | MaxPoolMicrokernelTester() |
| 3421 | .output_pixels(output_pixels) |
| 3422 | .pooling_elements(pooling_elements) |
| 3423 | .pooling_tile(9, 8) |
| 3424 | .channels(channels) |
| 3425 | .input_offset(23) |
| 3426 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3427 | } |
| 3428 | } |
| 3429 | } |
| 3430 | } |
| 3431 | |
| 3432 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_qmin) { |
| 3433 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3434 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 3435 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3436 | MaxPoolMicrokernelTester() |
| 3437 | .output_pixels(output_pixels) |
| 3438 | .pooling_elements(pooling_elements) |
| 3439 | .pooling_tile(9, 8) |
| 3440 | .channels(channels) |
| 3441 | .qmin(192) |
| 3442 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3443 | } |
| 3444 | } |
| 3445 | } |
| 3446 | } |
| 3447 | |
| 3448 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_qmax) { |
| 3449 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3450 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 3451 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3452 | MaxPoolMicrokernelTester() |
| 3453 | .output_pixels(output_pixels) |
| 3454 | .pooling_elements(pooling_elements) |
| 3455 | .pooling_tile(9, 8) |
| 3456 | .channels(channels) |
| 3457 | .qmax(192) |
| 3458 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3459 | } |
| 3460 | } |
| 3461 | } |
| 3462 | } |
| 3463 | |
| 3464 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_output_stride) { |
| 3465 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3466 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 3467 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3468 | MaxPoolMicrokernelTester() |
| 3469 | .output_pixels(output_pixels) |
| 3470 | .pooling_elements(pooling_elements) |
| 3471 | .pooling_tile(9, 8) |
| 3472 | .channels(channels) |
| 3473 | .output_stride(23) |
| 3474 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3475 | } |
| 3476 | } |
| 3477 | } |
| 3478 | } |
| 3479 | |
| 3480 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_step) { |
| 3481 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3482 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 3483 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3484 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 3485 | MaxPoolMicrokernelTester() |
| 3486 | .output_pixels(output_pixels) |
| 3487 | .pooling_elements(pooling_elements) |
| 3488 | .pooling_tile(9, 8) |
| 3489 | .step(step) |
| 3490 | .channels(channels) |
| 3491 | .output_stride(23) |
| 3492 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4); |
| 3493 | } |
| 3494 | } |
| 3495 | } |
| 3496 | } |
| 3497 | } |
| 3498 | #endif // XNN_ARCH_WASMSIMD |
| 3499 | |
| 3500 | |
| 3501 | #if XNN_ARCH_WASMSIMD |
| 3502 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile) { |
| 3503 | MaxPoolMicrokernelTester() |
| 3504 | .pooling_elements(9) |
| 3505 | .pooling_tile(9, 8) |
| 3506 | .channels(4) |
| 3507 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3508 | } |
| 3509 | |
| 3510 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
| 3511 | MaxPoolMicrokernelTester() |
| 3512 | .pooling_elements(9) |
| 3513 | .pooling_tile(9, 8) |
| 3514 | .channels(4) |
| 3515 | .input_offset(7) |
| 3516 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3517 | } |
| 3518 | |
| 3519 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
| 3520 | MaxPoolMicrokernelTester() |
| 3521 | .pooling_elements(9) |
| 3522 | .pooling_tile(9, 8) |
| 3523 | .channels(4) |
| 3524 | .qmin(192) |
| 3525 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3526 | } |
| 3527 | |
| 3528 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
| 3529 | MaxPoolMicrokernelTester() |
| 3530 | .pooling_elements(9) |
| 3531 | .pooling_tile(9, 8) |
| 3532 | .channels(4) |
| 3533 | .qmax(192) |
| 3534 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3535 | } |
| 3536 | |
| 3537 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_subtile) { |
| 3538 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 3539 | MaxPoolMicrokernelTester() |
| 3540 | .pooling_elements(pooling_elements) |
| 3541 | .pooling_tile(9, 8) |
| 3542 | .channels(4) |
| 3543 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3544 | } |
| 3545 | } |
| 3546 | |
| 3547 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
| 3548 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 3549 | MaxPoolMicrokernelTester() |
| 3550 | .pooling_elements(pooling_elements) |
| 3551 | .pooling_tile(9, 8) |
| 3552 | .channels(4) |
| 3553 | .input_offset(7) |
| 3554 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3555 | } |
| 3556 | } |
| 3557 | |
| 3558 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile) { |
| 3559 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3560 | MaxPoolMicrokernelTester() |
| 3561 | .pooling_elements(9) |
| 3562 | .pooling_tile(9, 8) |
| 3563 | .channels(channels) |
| 3564 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3565 | } |
| 3566 | } |
| 3567 | |
| 3568 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
| 3569 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3570 | MaxPoolMicrokernelTester() |
| 3571 | .pooling_elements(9) |
| 3572 | .pooling_tile(9, 8) |
| 3573 | .channels(channels) |
| 3574 | .input_offset(37) |
| 3575 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3576 | } |
| 3577 | } |
| 3578 | |
| 3579 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_qmin) { |
| 3580 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3581 | MaxPoolMicrokernelTester() |
| 3582 | .pooling_elements(9) |
| 3583 | .pooling_tile(9, 8) |
| 3584 | .channels(channels) |
| 3585 | .qmin(192) |
| 3586 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3587 | } |
| 3588 | } |
| 3589 | |
| 3590 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_qmax) { |
| 3591 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3592 | MaxPoolMicrokernelTester() |
| 3593 | .pooling_elements(9) |
| 3594 | .pooling_tile(9, 8) |
| 3595 | .channels(channels) |
| 3596 | .qmax(192) |
| 3597 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3598 | } |
| 3599 | } |
| 3600 | |
| 3601 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_subtile) { |
| 3602 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 3603 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3604 | MaxPoolMicrokernelTester() |
| 3605 | .pooling_elements(pooling_elements) |
| 3606 | .pooling_tile(9, 8) |
| 3607 | .channels(channels) |
| 3608 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3609 | } |
| 3610 | } |
| 3611 | } |
| 3612 | |
| 3613 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_subtile_with_input_offset) { |
| 3614 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 3615 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3616 | MaxPoolMicrokernelTester() |
| 3617 | .pooling_elements(pooling_elements) |
| 3618 | .pooling_tile(9, 8) |
| 3619 | .channels(channels) |
| 3620 | .input_offset(37) |
| 3621 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3622 | } |
| 3623 | } |
| 3624 | } |
| 3625 | |
| 3626 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile) { |
| 3627 | for (size_t channels = 1; channels < 4; channels++) { |
| 3628 | MaxPoolMicrokernelTester() |
| 3629 | .pooling_elements(9) |
| 3630 | .pooling_tile(9, 8) |
| 3631 | .channels(channels) |
| 3632 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3633 | } |
| 3634 | } |
| 3635 | |
| 3636 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
| 3637 | for (size_t channels = 1; channels < 4; channels++) { |
| 3638 | MaxPoolMicrokernelTester() |
| 3639 | .pooling_elements(9) |
| 3640 | .pooling_tile(9, 8) |
| 3641 | .channels(channels) |
| 3642 | .input_offset(5) |
| 3643 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3644 | } |
| 3645 | } |
| 3646 | |
| 3647 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
| 3648 | for (size_t channels = 1; channels < 4; channels++) { |
| 3649 | MaxPoolMicrokernelTester() |
| 3650 | .pooling_elements(9) |
| 3651 | .pooling_tile(9, 8) |
| 3652 | .channels(channels) |
| 3653 | .qmin(192) |
| 3654 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3655 | } |
| 3656 | } |
| 3657 | |
| 3658 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
| 3659 | for (size_t channels = 1; channels < 4; channels++) { |
| 3660 | MaxPoolMicrokernelTester() |
| 3661 | .pooling_elements(9) |
| 3662 | .pooling_tile(9, 8) |
| 3663 | .channels(channels) |
| 3664 | .qmax(192) |
| 3665 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3666 | } |
| 3667 | } |
| 3668 | |
| 3669 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_subtile) { |
| 3670 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 3671 | for (size_t channels = 1; channels < 4; channels++) { |
| 3672 | MaxPoolMicrokernelTester() |
| 3673 | .pooling_elements(pooling_elements) |
| 3674 | .pooling_tile(9, 8) |
| 3675 | .channels(channels) |
| 3676 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3677 | } |
| 3678 | } |
| 3679 | } |
| 3680 | |
| 3681 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
| 3682 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 3683 | for (size_t channels = 1; channels < 4; channels++) { |
| 3684 | MaxPoolMicrokernelTester() |
| 3685 | .pooling_elements(pooling_elements) |
| 3686 | .pooling_tile(9, 8) |
| 3687 | .channels(channels) |
| 3688 | .input_offset(5) |
| 3689 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3690 | } |
| 3691 | } |
| 3692 | } |
| 3693 | |
| 3694 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile) { |
| 3695 | for (size_t channels = 5; channels < 8; channels++) { |
| 3696 | MaxPoolMicrokernelTester() |
| 3697 | .pooling_elements(9) |
| 3698 | .pooling_tile(9, 8) |
| 3699 | .channels(channels) |
| 3700 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3701 | } |
| 3702 | } |
| 3703 | |
| 3704 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
| 3705 | for (size_t channels = 5; channels < 8; channels++) { |
| 3706 | MaxPoolMicrokernelTester() |
| 3707 | .pooling_elements(9) |
| 3708 | .pooling_tile(9, 8) |
| 3709 | .channels(channels) |
| 3710 | .input_offset(11) |
| 3711 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3712 | } |
| 3713 | } |
| 3714 | |
| 3715 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
| 3716 | for (size_t channels = 5; channels < 8; channels++) { |
| 3717 | MaxPoolMicrokernelTester() |
| 3718 | .pooling_elements(9) |
| 3719 | .pooling_tile(9, 8) |
| 3720 | .channels(channels) |
| 3721 | .qmin(192) |
| 3722 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3723 | } |
| 3724 | } |
| 3725 | |
| 3726 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
| 3727 | for (size_t channels = 5; channels < 8; channels++) { |
| 3728 | MaxPoolMicrokernelTester() |
| 3729 | .pooling_elements(9) |
| 3730 | .pooling_tile(9, 8) |
| 3731 | .channels(channels) |
| 3732 | .qmax(192) |
| 3733 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3734 | } |
| 3735 | } |
| 3736 | |
| 3737 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_subtile) { |
| 3738 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 3739 | for (size_t channels = 5; channels < 8; channels++) { |
| 3740 | MaxPoolMicrokernelTester() |
| 3741 | .pooling_elements(pooling_elements) |
| 3742 | .pooling_tile(9, 8) |
| 3743 | .channels(channels) |
| 3744 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3745 | } |
| 3746 | } |
| 3747 | } |
| 3748 | |
| 3749 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
| 3750 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 3751 | for (size_t channels = 5; channels < 8; channels++) { |
| 3752 | MaxPoolMicrokernelTester() |
| 3753 | .pooling_elements(pooling_elements) |
| 3754 | .pooling_tile(9, 8) |
| 3755 | .channels(channels) |
| 3756 | .input_offset(11) |
| 3757 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3758 | } |
| 3759 | } |
| 3760 | } |
| 3761 | |
| 3762 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile) { |
| 3763 | MaxPoolMicrokernelTester() |
| 3764 | .pooling_elements(17) |
| 3765 | .pooling_tile(9, 8) |
| 3766 | .channels(4) |
| 3767 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3768 | } |
| 3769 | |
| 3770 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
| 3771 | MaxPoolMicrokernelTester() |
| 3772 | .pooling_elements(17) |
| 3773 | .pooling_tile(9, 8) |
| 3774 | .channels(4) |
| 3775 | .input_offset(7) |
| 3776 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3777 | } |
| 3778 | |
| 3779 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
| 3780 | MaxPoolMicrokernelTester() |
| 3781 | .pooling_elements(17) |
| 3782 | .pooling_tile(9, 8) |
| 3783 | .channels(4) |
| 3784 | .qmin(192) |
| 3785 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3786 | } |
| 3787 | |
| 3788 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
| 3789 | MaxPoolMicrokernelTester() |
| 3790 | .pooling_elements(17) |
| 3791 | .pooling_tile(9, 8) |
| 3792 | .channels(4) |
| 3793 | .qmax(192) |
| 3794 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3795 | } |
| 3796 | |
| 3797 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_subtile) { |
| 3798 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3799 | MaxPoolMicrokernelTester() |
| 3800 | .pooling_elements(pooling_elements) |
| 3801 | .pooling_tile(9, 8) |
| 3802 | .channels(4) |
| 3803 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3804 | } |
| 3805 | } |
| 3806 | |
| 3807 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
| 3808 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3809 | MaxPoolMicrokernelTester() |
| 3810 | .pooling_elements(pooling_elements) |
| 3811 | .pooling_tile(9, 8) |
| 3812 | .channels(4) |
| 3813 | .input_offset(7) |
| 3814 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3815 | } |
| 3816 | } |
| 3817 | |
| 3818 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile) { |
| 3819 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3820 | MaxPoolMicrokernelTester() |
| 3821 | .pooling_elements(17) |
| 3822 | .pooling_tile(9, 8) |
| 3823 | .channels(channels) |
| 3824 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3825 | } |
| 3826 | } |
| 3827 | |
| 3828 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
| 3829 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3830 | MaxPoolMicrokernelTester() |
| 3831 | .pooling_elements(17) |
| 3832 | .pooling_tile(9, 8) |
| 3833 | .channels(channels) |
| 3834 | .input_offset(23) |
| 3835 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3836 | } |
| 3837 | } |
| 3838 | |
| 3839 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_qmin) { |
| 3840 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3841 | MaxPoolMicrokernelTester() |
| 3842 | .pooling_elements(17) |
| 3843 | .pooling_tile(9, 8) |
| 3844 | .channels(channels) |
| 3845 | .qmin(192) |
| 3846 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3847 | } |
| 3848 | } |
| 3849 | |
| 3850 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_qmax) { |
| 3851 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3852 | MaxPoolMicrokernelTester() |
| 3853 | .pooling_elements(17) |
| 3854 | .pooling_tile(9, 8) |
| 3855 | .channels(channels) |
| 3856 | .qmax(192) |
| 3857 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3858 | } |
| 3859 | } |
| 3860 | |
| 3861 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_subtile) { |
| 3862 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3863 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3864 | MaxPoolMicrokernelTester() |
| 3865 | .pooling_elements(pooling_elements) |
| 3866 | .pooling_tile(9, 8) |
| 3867 | .channels(channels) |
| 3868 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3869 | } |
| 3870 | } |
| 3871 | } |
| 3872 | |
| 3873 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_subtile_with_input_offset) { |
| 3874 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3875 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 3876 | MaxPoolMicrokernelTester() |
| 3877 | .pooling_elements(pooling_elements) |
| 3878 | .pooling_tile(9, 8) |
| 3879 | .channels(channels) |
| 3880 | .input_offset(37) |
| 3881 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3882 | } |
| 3883 | } |
| 3884 | } |
| 3885 | |
| 3886 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile) { |
| 3887 | for (size_t channels = 1; channels < 4; channels++) { |
| 3888 | MaxPoolMicrokernelTester() |
| 3889 | .pooling_elements(17) |
| 3890 | .pooling_tile(9, 8) |
| 3891 | .channels(channels) |
| 3892 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3893 | } |
| 3894 | } |
| 3895 | |
| 3896 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
| 3897 | for (size_t channels = 1; channels < 4; channels++) { |
| 3898 | MaxPoolMicrokernelTester() |
| 3899 | .pooling_elements(17) |
| 3900 | .pooling_tile(9, 8) |
| 3901 | .channels(channels) |
| 3902 | .input_offset(5) |
| 3903 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3904 | } |
| 3905 | } |
| 3906 | |
| 3907 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
| 3908 | for (size_t channels = 1; channels < 4; channels++) { |
| 3909 | MaxPoolMicrokernelTester() |
| 3910 | .pooling_elements(17) |
| 3911 | .pooling_tile(9, 8) |
| 3912 | .channels(channels) |
| 3913 | .qmin(192) |
| 3914 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3915 | } |
| 3916 | } |
| 3917 | |
| 3918 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
| 3919 | for (size_t channels = 1; channels < 4; channels++) { |
| 3920 | MaxPoolMicrokernelTester() |
| 3921 | .pooling_elements(17) |
| 3922 | .pooling_tile(9, 8) |
| 3923 | .channels(channels) |
| 3924 | .qmax(192) |
| 3925 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3926 | } |
| 3927 | } |
| 3928 | |
| 3929 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_subtile) { |
| 3930 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3931 | for (size_t channels = 1; channels < 4; channels++) { |
| 3932 | MaxPoolMicrokernelTester() |
| 3933 | .pooling_elements(pooling_elements) |
| 3934 | .pooling_tile(9, 8) |
| 3935 | .channels(channels) |
| 3936 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3937 | } |
| 3938 | } |
| 3939 | } |
| 3940 | |
| 3941 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
| 3942 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3943 | for (size_t channels = 1; channels < 4; channels++) { |
| 3944 | MaxPoolMicrokernelTester() |
| 3945 | .pooling_elements(pooling_elements) |
| 3946 | .pooling_tile(9, 8) |
| 3947 | .channels(channels) |
| 3948 | .input_offset(5) |
| 3949 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3950 | } |
| 3951 | } |
| 3952 | } |
| 3953 | |
| 3954 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile) { |
| 3955 | for (size_t channels = 5; channels < 8; channels++) { |
| 3956 | MaxPoolMicrokernelTester() |
| 3957 | .pooling_elements(17) |
| 3958 | .pooling_tile(9, 8) |
| 3959 | .channels(channels) |
| 3960 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3961 | } |
| 3962 | } |
| 3963 | |
| 3964 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
| 3965 | for (size_t channels = 5; channels < 8; channels++) { |
| 3966 | MaxPoolMicrokernelTester() |
| 3967 | .pooling_elements(17) |
| 3968 | .pooling_tile(9, 8) |
| 3969 | .channels(channels) |
| 3970 | .input_offset(11) |
| 3971 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3972 | } |
| 3973 | } |
| 3974 | |
| 3975 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
| 3976 | for (size_t channels = 5; channels < 8; channels++) { |
| 3977 | MaxPoolMicrokernelTester() |
| 3978 | .pooling_elements(17) |
| 3979 | .pooling_tile(9, 8) |
| 3980 | .channels(channels) |
| 3981 | .qmin(192) |
| 3982 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3983 | } |
| 3984 | } |
| 3985 | |
| 3986 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
| 3987 | for (size_t channels = 5; channels < 8; channels++) { |
| 3988 | MaxPoolMicrokernelTester() |
| 3989 | .pooling_elements(17) |
| 3990 | .pooling_tile(9, 8) |
| 3991 | .channels(channels) |
| 3992 | .qmax(192) |
| 3993 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 3994 | } |
| 3995 | } |
| 3996 | |
| 3997 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_subtile) { |
| 3998 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3999 | for (size_t channels = 5; channels < 8; channels++) { |
| 4000 | MaxPoolMicrokernelTester() |
| 4001 | .pooling_elements(pooling_elements) |
| 4002 | .pooling_tile(9, 8) |
| 4003 | .channels(channels) |
| 4004 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4005 | } |
| 4006 | } |
| 4007 | } |
| 4008 | |
| 4009 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
| 4010 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4011 | for (size_t channels = 5; channels < 8; channels++) { |
| 4012 | MaxPoolMicrokernelTester() |
| 4013 | .pooling_elements(pooling_elements) |
| 4014 | .pooling_tile(9, 8) |
| 4015 | .channels(channels) |
| 4016 | .input_offset(11) |
| 4017 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4018 | } |
| 4019 | } |
| 4020 | } |
| 4021 | |
| 4022 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass) { |
| 4023 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4024 | MaxPoolMicrokernelTester() |
| 4025 | .pooling_elements(pooling_elements) |
| 4026 | .pooling_tile(9, 8) |
| 4027 | .channels(4) |
| 4028 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4029 | } |
| 4030 | } |
| 4031 | |
| 4032 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_input_offset) { |
| 4033 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4034 | MaxPoolMicrokernelTester() |
| 4035 | .pooling_elements(pooling_elements) |
| 4036 | .pooling_tile(9, 8) |
| 4037 | .channels(4) |
| 4038 | .input_offset(7) |
| 4039 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4040 | } |
| 4041 | } |
| 4042 | |
| 4043 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_qmin) { |
| 4044 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4045 | MaxPoolMicrokernelTester() |
| 4046 | .pooling_elements(pooling_elements) |
| 4047 | .pooling_tile(9, 8) |
| 4048 | .channels(4) |
| 4049 | .qmin(192) |
| 4050 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4051 | } |
| 4052 | } |
| 4053 | |
| 4054 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_qmax) { |
| 4055 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4056 | MaxPoolMicrokernelTester() |
| 4057 | .pooling_elements(pooling_elements) |
| 4058 | .pooling_tile(9, 8) |
| 4059 | .channels(4) |
| 4060 | .qmax(192) |
| 4061 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4062 | } |
| 4063 | } |
| 4064 | |
| 4065 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass) { |
| 4066 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4067 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4068 | MaxPoolMicrokernelTester() |
| 4069 | .pooling_elements(pooling_elements) |
| 4070 | .pooling_tile(9, 8) |
| 4071 | .channels(channels) |
| 4072 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4073 | } |
| 4074 | } |
| 4075 | } |
| 4076 | |
| 4077 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_input_offset) { |
| 4078 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4079 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4080 | MaxPoolMicrokernelTester() |
| 4081 | .pooling_elements(pooling_elements) |
| 4082 | .pooling_tile(9, 8) |
| 4083 | .channels(channels) |
| 4084 | .input_offset(37) |
| 4085 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4086 | } |
| 4087 | } |
| 4088 | } |
| 4089 | |
| 4090 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_qmin) { |
| 4091 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4092 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4093 | MaxPoolMicrokernelTester() |
| 4094 | .pooling_elements(pooling_elements) |
| 4095 | .pooling_tile(9, 8) |
| 4096 | .channels(channels) |
| 4097 | .qmin(192) |
| 4098 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4099 | } |
| 4100 | } |
| 4101 | } |
| 4102 | |
| 4103 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_qmax) { |
| 4104 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4105 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4106 | MaxPoolMicrokernelTester() |
| 4107 | .pooling_elements(pooling_elements) |
| 4108 | .pooling_tile(9, 8) |
| 4109 | .channels(channels) |
| 4110 | .qmax(192) |
| 4111 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4112 | } |
| 4113 | } |
| 4114 | } |
| 4115 | |
| 4116 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass) { |
| 4117 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4118 | for (size_t channels = 1; channels < 4; channels++) { |
| 4119 | MaxPoolMicrokernelTester() |
| 4120 | .pooling_elements(pooling_elements) |
| 4121 | .pooling_tile(9, 8) |
| 4122 | .channels(channels) |
| 4123 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4124 | } |
| 4125 | } |
| 4126 | } |
| 4127 | |
| 4128 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_input_offset) { |
| 4129 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4130 | for (size_t channels = 1; channels < 4; channels++) { |
| 4131 | MaxPoolMicrokernelTester() |
| 4132 | .pooling_elements(pooling_elements) |
| 4133 | .pooling_tile(9, 8) |
| 4134 | .channels(channels) |
| 4135 | .input_offset(4) |
| 4136 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4137 | } |
| 4138 | } |
| 4139 | } |
| 4140 | |
| 4141 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_qmin) { |
| 4142 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4143 | for (size_t channels = 1; channels < 4; channels++) { |
| 4144 | MaxPoolMicrokernelTester() |
| 4145 | .pooling_elements(pooling_elements) |
| 4146 | .pooling_tile(9, 8) |
| 4147 | .channels(channels) |
| 4148 | .qmin(192) |
| 4149 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4150 | } |
| 4151 | } |
| 4152 | } |
| 4153 | |
| 4154 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_qmax) { |
| 4155 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4156 | for (size_t channels = 1; channels < 4; channels++) { |
| 4157 | MaxPoolMicrokernelTester() |
| 4158 | .pooling_elements(pooling_elements) |
| 4159 | .pooling_tile(9, 8) |
| 4160 | .channels(channels) |
| 4161 | .qmax(192) |
| 4162 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4163 | } |
| 4164 | } |
| 4165 | } |
| 4166 | |
| 4167 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass) { |
| 4168 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4169 | for (size_t channels = 5; channels < 8; channels++) { |
| 4170 | MaxPoolMicrokernelTester() |
| 4171 | .pooling_elements(pooling_elements) |
| 4172 | .pooling_tile(9, 8) |
| 4173 | .channels(channels) |
| 4174 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4175 | } |
| 4176 | } |
| 4177 | } |
| 4178 | |
| 4179 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_input_offset) { |
| 4180 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4181 | for (size_t channels = 5; channels < 8; channels++) { |
| 4182 | MaxPoolMicrokernelTester() |
| 4183 | .pooling_elements(pooling_elements) |
| 4184 | .pooling_tile(9, 8) |
| 4185 | .channels(channels) |
| 4186 | .input_offset(11) |
| 4187 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4188 | } |
| 4189 | } |
| 4190 | } |
| 4191 | |
| 4192 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_qmin) { |
| 4193 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4194 | for (size_t channels = 5; channels < 8; channels++) { |
| 4195 | MaxPoolMicrokernelTester() |
| 4196 | .pooling_elements(pooling_elements) |
| 4197 | .pooling_tile(9, 8) |
| 4198 | .channels(channels) |
| 4199 | .qmin(192) |
| 4200 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4201 | } |
| 4202 | } |
| 4203 | } |
| 4204 | |
| 4205 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_qmax) { |
| 4206 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4207 | for (size_t channels = 5; channels < 8; channels++) { |
| 4208 | MaxPoolMicrokernelTester() |
| 4209 | .pooling_elements(pooling_elements) |
| 4210 | .pooling_tile(9, 8) |
| 4211 | .channels(channels) |
| 4212 | .qmax(192) |
| 4213 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4214 | } |
| 4215 | } |
| 4216 | } |
| 4217 | |
| 4218 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels) { |
| 4219 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4220 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4221 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4222 | MaxPoolMicrokernelTester() |
| 4223 | .output_pixels(output_pixels) |
| 4224 | .pooling_elements(pooling_elements) |
| 4225 | .pooling_tile(9, 8) |
| 4226 | .channels(channels) |
| 4227 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4228 | } |
| 4229 | } |
| 4230 | } |
| 4231 | } |
| 4232 | |
| 4233 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_input_offset) { |
| 4234 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4235 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4236 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4237 | MaxPoolMicrokernelTester() |
| 4238 | .output_pixels(output_pixels) |
| 4239 | .pooling_elements(pooling_elements) |
| 4240 | .pooling_tile(9, 8) |
| 4241 | .channels(channels) |
| 4242 | .input_offset(23) |
| 4243 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4244 | } |
| 4245 | } |
| 4246 | } |
| 4247 | } |
| 4248 | |
| 4249 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_qmin) { |
| 4250 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4251 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4252 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4253 | MaxPoolMicrokernelTester() |
| 4254 | .output_pixels(output_pixels) |
| 4255 | .pooling_elements(pooling_elements) |
| 4256 | .pooling_tile(9, 8) |
| 4257 | .channels(channels) |
| 4258 | .qmin(192) |
| 4259 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4260 | } |
| 4261 | } |
| 4262 | } |
| 4263 | } |
| 4264 | |
| 4265 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_qmax) { |
| 4266 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4267 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4268 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4269 | MaxPoolMicrokernelTester() |
| 4270 | .output_pixels(output_pixels) |
| 4271 | .pooling_elements(pooling_elements) |
| 4272 | .pooling_tile(9, 8) |
| 4273 | .channels(channels) |
| 4274 | .qmax(192) |
| 4275 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4276 | } |
| 4277 | } |
| 4278 | } |
| 4279 | } |
| 4280 | |
| 4281 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_output_stride) { |
| 4282 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4283 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4284 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4285 | MaxPoolMicrokernelTester() |
| 4286 | .output_pixels(output_pixels) |
| 4287 | .pooling_elements(pooling_elements) |
| 4288 | .pooling_tile(9, 8) |
| 4289 | .channels(channels) |
| 4290 | .output_stride(23) |
| 4291 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4292 | } |
| 4293 | } |
| 4294 | } |
| 4295 | } |
| 4296 | |
| 4297 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_step) { |
| 4298 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4299 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4300 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4301 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 4302 | MaxPoolMicrokernelTester() |
| 4303 | .output_pixels(output_pixels) |
| 4304 | .pooling_elements(pooling_elements) |
| 4305 | .pooling_tile(9, 8) |
| 4306 | .step(step) |
| 4307 | .channels(channels) |
| 4308 | .output_stride(23) |
| 4309 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4); |
| 4310 | } |
| 4311 | } |
| 4312 | } |
| 4313 | } |
| 4314 | } |
| 4315 | #endif // XNN_ARCH_WASMSIMD |
| 4316 | |
| 4317 | |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4318 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4319 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_unipass_fulltile) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4320 | MaxPoolMicrokernelTester() |
| 4321 | .pooling_elements(9) |
| 4322 | .pooling_tile(9, 8) |
| 4323 | .channels(1) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4324 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4325 | } |
| 4326 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4327 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4328 | MaxPoolMicrokernelTester() |
| 4329 | .pooling_elements(9) |
| 4330 | .pooling_tile(9, 8) |
| 4331 | .channels(1) |
| 4332 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4333 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4334 | } |
| 4335 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4336 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_unipass_fulltile_with_qmin) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4337 | MaxPoolMicrokernelTester() |
| 4338 | .pooling_elements(9) |
| 4339 | .pooling_tile(9, 8) |
| 4340 | .channels(1) |
| 4341 | .qmin(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4342 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4343 | } |
| 4344 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4345 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_unipass_fulltile_with_qmax) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4346 | MaxPoolMicrokernelTester() |
| 4347 | .pooling_elements(9) |
| 4348 | .pooling_tile(9, 8) |
| 4349 | .channels(1) |
| 4350 | .qmax(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4351 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4352 | } |
| 4353 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4354 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_unipass_subtile) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4355 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4356 | MaxPoolMicrokernelTester() |
| 4357 | .pooling_elements(pooling_elements) |
| 4358 | .pooling_tile(9, 8) |
| 4359 | .channels(1) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4360 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4361 | } |
| 4362 | } |
| 4363 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4364 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_unipass_subtile_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4365 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4366 | MaxPoolMicrokernelTester() |
| 4367 | .pooling_elements(pooling_elements) |
| 4368 | .pooling_tile(9, 8) |
| 4369 | .channels(1) |
| 4370 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4371 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4372 | } |
| 4373 | } |
| 4374 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4375 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_unipass_fulltile) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4376 | for (size_t channels = 2; channels < 10; channels++) { |
| 4377 | MaxPoolMicrokernelTester() |
| 4378 | .pooling_elements(9) |
| 4379 | .pooling_tile(9, 8) |
| 4380 | .channels(channels) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4381 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4382 | } |
| 4383 | } |
| 4384 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4385 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4386 | for (size_t channels = 2; channels < 10; channels++) { |
| 4387 | MaxPoolMicrokernelTester() |
| 4388 | .pooling_elements(9) |
| 4389 | .pooling_tile(9, 8) |
| 4390 | .channels(channels) |
| 4391 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4392 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4393 | } |
| 4394 | } |
| 4395 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4396 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_unipass_fulltile_with_qmin) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4397 | for (size_t channels = 2; channels < 10; channels++) { |
| 4398 | MaxPoolMicrokernelTester() |
| 4399 | .pooling_elements(9) |
| 4400 | .pooling_tile(9, 8) |
| 4401 | .channels(channels) |
| 4402 | .qmin(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4403 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4404 | } |
| 4405 | } |
| 4406 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4407 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_unipass_fulltile_with_qmax) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4408 | for (size_t channels = 2; channels < 10; channels++) { |
| 4409 | MaxPoolMicrokernelTester() |
| 4410 | .pooling_elements(9) |
| 4411 | .pooling_tile(9, 8) |
| 4412 | .channels(channels) |
| 4413 | .qmax(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4414 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4415 | } |
| 4416 | } |
| 4417 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4418 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_unipass_subtile) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4419 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4420 | for (size_t channels = 2; channels < 10; channels++) { |
| 4421 | MaxPoolMicrokernelTester() |
| 4422 | .pooling_elements(pooling_elements) |
| 4423 | .pooling_tile(9, 8) |
| 4424 | .channels(channels) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4425 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4426 | } |
| 4427 | } |
| 4428 | } |
| 4429 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4430 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_unipass_subtile_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4431 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4432 | for (size_t channels = 2; channels < 10; channels++) { |
| 4433 | MaxPoolMicrokernelTester() |
| 4434 | .pooling_elements(pooling_elements) |
| 4435 | .pooling_tile(9, 8) |
| 4436 | .channels(channels) |
| 4437 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4438 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4439 | } |
| 4440 | } |
| 4441 | } |
| 4442 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4443 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4444 | MaxPoolMicrokernelTester() |
| 4445 | .pooling_elements(17) |
| 4446 | .pooling_tile(9, 8) |
| 4447 | .channels(1) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4448 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4449 | } |
| 4450 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4451 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4452 | MaxPoolMicrokernelTester() |
| 4453 | .pooling_elements(17) |
| 4454 | .pooling_tile(9, 8) |
| 4455 | .channels(1) |
| 4456 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4457 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4458 | } |
| 4459 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4460 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile_with_qmin) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4461 | MaxPoolMicrokernelTester() |
| 4462 | .pooling_elements(17) |
| 4463 | .pooling_tile(9, 8) |
| 4464 | .channels(1) |
| 4465 | .qmin(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4466 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4467 | } |
| 4468 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4469 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile_with_qmax) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4470 | MaxPoolMicrokernelTester() |
| 4471 | .pooling_elements(17) |
| 4472 | .pooling_tile(9, 8) |
| 4473 | .channels(1) |
| 4474 | .qmax(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4475 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4476 | } |
| 4477 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4478 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_subtile) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4479 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4480 | MaxPoolMicrokernelTester() |
| 4481 | .pooling_elements(pooling_elements) |
| 4482 | .pooling_tile(9, 8) |
| 4483 | .channels(1) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4484 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4485 | } |
| 4486 | } |
| 4487 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4488 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_subtile_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4489 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4490 | MaxPoolMicrokernelTester() |
| 4491 | .pooling_elements(pooling_elements) |
| 4492 | .pooling_tile(9, 8) |
| 4493 | .channels(1) |
| 4494 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4495 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4496 | } |
| 4497 | } |
| 4498 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4499 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4500 | for (size_t channels = 2; channels < 10; channels++) { |
| 4501 | MaxPoolMicrokernelTester() |
| 4502 | .pooling_elements(17) |
| 4503 | .pooling_tile(9, 8) |
| 4504 | .channels(channels) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4505 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4506 | } |
| 4507 | } |
| 4508 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4509 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4510 | for (size_t channels = 2; channels < 10; channels++) { |
| 4511 | MaxPoolMicrokernelTester() |
| 4512 | .pooling_elements(17) |
| 4513 | .pooling_tile(9, 8) |
| 4514 | .channels(channels) |
| 4515 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4516 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4517 | } |
| 4518 | } |
| 4519 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4520 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile_with_qmin) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4521 | for (size_t channels = 2; channels < 10; channels++) { |
| 4522 | MaxPoolMicrokernelTester() |
| 4523 | .pooling_elements(17) |
| 4524 | .pooling_tile(9, 8) |
| 4525 | .channels(channels) |
| 4526 | .qmin(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4527 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4528 | } |
| 4529 | } |
| 4530 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4531 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile_with_qmax) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4532 | for (size_t channels = 2; channels < 10; channels++) { |
| 4533 | MaxPoolMicrokernelTester() |
| 4534 | .pooling_elements(17) |
| 4535 | .pooling_tile(9, 8) |
| 4536 | .channels(channels) |
| 4537 | .qmax(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4538 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4539 | } |
| 4540 | } |
| 4541 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4542 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_subtile) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4543 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4544 | for (size_t channels = 2; channels < 10; channels++) { |
| 4545 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4546 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4547 | .pooling_tile(9, 8) |
| 4548 | .channels(channels) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4549 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4550 | } |
| 4551 | } |
| 4552 | } |
| 4553 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4554 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_subtile_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4555 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4556 | for (size_t channels = 2; channels < 10; channels++) { |
| 4557 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4558 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4559 | .pooling_tile(9, 8) |
| 4560 | .channels(channels) |
| 4561 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4562 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4563 | } |
| 4564 | } |
| 4565 | } |
| 4566 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4567 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4568 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4569 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4570 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4571 | .pooling_tile(9, 8) |
| 4572 | .channels(1) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4573 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4574 | } |
| 4575 | } |
| 4576 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4577 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4578 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4579 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4580 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4581 | .pooling_tile(9, 8) |
| 4582 | .channels(1) |
| 4583 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4584 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4585 | } |
| 4586 | } |
| 4587 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4588 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass_with_qmin) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4589 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4590 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4591 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4592 | .pooling_tile(9, 8) |
| 4593 | .channels(1) |
| 4594 | .qmin(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4595 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4596 | } |
| 4597 | } |
| 4598 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4599 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass_with_qmax) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4600 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4601 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4602 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4603 | .pooling_tile(9, 8) |
| 4604 | .channels(1) |
| 4605 | .qmax(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4606 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4607 | } |
| 4608 | } |
| 4609 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4610 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4611 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4612 | for (size_t channels = 2; channels < 10; channels++) { |
| 4613 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4614 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4615 | .pooling_tile(9, 8) |
| 4616 | .channels(channels) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4617 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4618 | } |
| 4619 | } |
| 4620 | } |
| 4621 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4622 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4623 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4624 | for (size_t channels = 2; channels < 10; channels++) { |
| 4625 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4626 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4627 | .pooling_tile(9, 8) |
| 4628 | .channels(channels) |
| 4629 | .input_offset(3) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4630 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4631 | } |
| 4632 | } |
| 4633 | } |
| 4634 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4635 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass_with_qmin) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4636 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4637 | for (size_t channels = 2; channels < 10; channels++) { |
| 4638 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4639 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4640 | .pooling_tile(9, 8) |
| 4641 | .channels(channels) |
| 4642 | .qmin(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4643 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4644 | } |
| 4645 | } |
| 4646 | } |
| 4647 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4648 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass_with_qmax) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4649 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 4650 | for (size_t channels = 2; channels < 10; channels++) { |
| 4651 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4652 | .pooling_elements(pooling_elements) |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4653 | .pooling_tile(9, 8) |
| 4654 | .channels(channels) |
| 4655 | .qmax(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4656 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4657 | } |
| 4658 | } |
| 4659 | } |
| 4660 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4661 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4662 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4663 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4664 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 4665 | MaxPoolMicrokernelTester() |
| 4666 | .output_pixels(output_pixels) |
| 4667 | .pooling_elements(pooling_elements) |
| 4668 | .pooling_tile(9, 8) |
| 4669 | .channels(channels) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4670 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4671 | } |
| 4672 | } |
| 4673 | } |
| 4674 | } |
| 4675 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4676 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_input_offset) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4677 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4678 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4679 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 4680 | MaxPoolMicrokernelTester() |
| 4681 | .output_pixels(output_pixels) |
| 4682 | .pooling_elements(pooling_elements) |
| 4683 | .pooling_tile(9, 8) |
| 4684 | .channels(channels) |
| 4685 | .input_offset(7) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4686 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4687 | } |
| 4688 | } |
| 4689 | } |
| 4690 | } |
| 4691 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4692 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_qmin) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4693 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4694 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4695 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 4696 | MaxPoolMicrokernelTester() |
| 4697 | .output_pixels(output_pixels) |
| 4698 | .pooling_elements(pooling_elements) |
| 4699 | .pooling_tile(9, 8) |
| 4700 | .channels(channels) |
| 4701 | .qmin(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4702 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4703 | } |
| 4704 | } |
| 4705 | } |
| 4706 | } |
| 4707 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4708 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_qmax) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4709 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4710 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4711 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 4712 | MaxPoolMicrokernelTester() |
| 4713 | .output_pixels(output_pixels) |
| 4714 | .pooling_elements(pooling_elements) |
| 4715 | .pooling_tile(9, 8) |
| 4716 | .channels(channels) |
| 4717 | .qmax(192) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4718 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4719 | } |
| 4720 | } |
| 4721 | } |
| 4722 | } |
| 4723 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4724 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_output_stride) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4725 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4726 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4727 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 4728 | MaxPoolMicrokernelTester() |
| 4729 | .output_pixels(output_pixels) |
| 4730 | .pooling_elements(pooling_elements) |
| 4731 | .pooling_tile(9, 8) |
| 4732 | .channels(channels) |
| 4733 | .output_stride(7) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4734 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4735 | } |
| 4736 | } |
| 4737 | } |
| 4738 | } |
| 4739 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4740 | TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_step) { |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4741 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4742 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 4743 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 4744 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 4745 | MaxPoolMicrokernelTester() |
| 4746 | .output_pixels(output_pixels) |
| 4747 | .pooling_elements(pooling_elements) |
| 4748 | .pooling_tile(9, 8) |
| 4749 | .step(step) |
| 4750 | .channels(channels) |
| 4751 | .output_stride(7) |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4752 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1); |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4753 | } |
| 4754 | } |
| 4755 | } |
| 4756 | } |
| 4757 | } |
Frank Barchard | 609ac84 | 2020-07-01 12:09:33 -0700 | [diff] [blame] | 4758 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 5cb8ff0 | 2020-02-26 21:02:33 -0800 | [diff] [blame] | 4759 | |
| 4760 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4761 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_unipass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4762 | MaxPoolMicrokernelTester() |
| 4763 | .pooling_elements(9) |
| 4764 | .pooling_tile(9, 8) |
| 4765 | .channels(1) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4766 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4767 | } |
| 4768 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4769 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4770 | MaxPoolMicrokernelTester() |
| 4771 | .pooling_elements(9) |
| 4772 | .pooling_tile(9, 8) |
| 4773 | .channels(1) |
| 4774 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4775 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4776 | } |
| 4777 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4778 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4779 | MaxPoolMicrokernelTester() |
| 4780 | .pooling_elements(9) |
| 4781 | .pooling_tile(9, 8) |
| 4782 | .channels(1) |
| 4783 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4784 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4785 | } |
| 4786 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4787 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4788 | MaxPoolMicrokernelTester() |
| 4789 | .pooling_elements(9) |
| 4790 | .pooling_tile(9, 8) |
| 4791 | .channels(1) |
| 4792 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4793 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4794 | } |
| 4795 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4796 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_unipass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4797 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4798 | MaxPoolMicrokernelTester() |
| 4799 | .pooling_elements(pooling_elements) |
| 4800 | .pooling_tile(9, 8) |
| 4801 | .channels(1) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4802 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4803 | } |
| 4804 | } |
| 4805 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4806 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_unipass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4807 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4808 | MaxPoolMicrokernelTester() |
| 4809 | .pooling_elements(pooling_elements) |
| 4810 | .pooling_tile(9, 8) |
| 4811 | .channels(1) |
| 4812 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4813 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4814 | } |
| 4815 | } |
| 4816 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4817 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_unipass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4818 | for (size_t channels = 2; channels < 10; channels++) { |
| 4819 | MaxPoolMicrokernelTester() |
| 4820 | .pooling_elements(9) |
| 4821 | .pooling_tile(9, 8) |
| 4822 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4823 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4824 | } |
| 4825 | } |
| 4826 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4827 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4828 | for (size_t channels = 2; channels < 10; channels++) { |
| 4829 | MaxPoolMicrokernelTester() |
| 4830 | .pooling_elements(9) |
| 4831 | .pooling_tile(9, 8) |
| 4832 | .channels(channels) |
| 4833 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4834 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4835 | } |
| 4836 | } |
| 4837 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4838 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4839 | for (size_t channels = 2; channels < 10; channels++) { |
| 4840 | MaxPoolMicrokernelTester() |
| 4841 | .pooling_elements(9) |
| 4842 | .pooling_tile(9, 8) |
| 4843 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4844 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4845 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4846 | } |
| 4847 | } |
| 4848 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4849 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4850 | for (size_t channels = 2; channels < 10; channels++) { |
| 4851 | MaxPoolMicrokernelTester() |
| 4852 | .pooling_elements(9) |
| 4853 | .pooling_tile(9, 8) |
| 4854 | .channels(channels) |
| 4855 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4856 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4857 | } |
| 4858 | } |
| 4859 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4860 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_unipass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4861 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4862 | for (size_t channels = 2; channels < 10; channels++) { |
| 4863 | MaxPoolMicrokernelTester() |
| 4864 | .pooling_elements(pooling_elements) |
| 4865 | .pooling_tile(9, 8) |
| 4866 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4867 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4868 | } |
| 4869 | } |
| 4870 | } |
| 4871 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4872 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_unipass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4873 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4874 | for (size_t channels = 2; channels < 10; channels++) { |
| 4875 | MaxPoolMicrokernelTester() |
| 4876 | .pooling_elements(pooling_elements) |
| 4877 | .pooling_tile(9, 8) |
| 4878 | .channels(channels) |
| 4879 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4880 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4881 | } |
| 4882 | } |
| 4883 | } |
| 4884 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4885 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4886 | MaxPoolMicrokernelTester() |
| 4887 | .pooling_elements(17) |
| 4888 | .pooling_tile(9, 8) |
| 4889 | .channels(1) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4890 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4891 | } |
| 4892 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4893 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4894 | MaxPoolMicrokernelTester() |
| 4895 | .pooling_elements(17) |
| 4896 | .pooling_tile(9, 8) |
| 4897 | .channels(1) |
| 4898 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4899 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4900 | } |
| 4901 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4902 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4903 | MaxPoolMicrokernelTester() |
| 4904 | .pooling_elements(17) |
| 4905 | .pooling_tile(9, 8) |
| 4906 | .channels(1) |
| 4907 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4908 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4909 | } |
| 4910 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4911 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4912 | MaxPoolMicrokernelTester() |
| 4913 | .pooling_elements(17) |
| 4914 | .pooling_tile(9, 8) |
| 4915 | .channels(1) |
| 4916 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4917 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4918 | } |
| 4919 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4920 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4921 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4922 | MaxPoolMicrokernelTester() |
| 4923 | .pooling_elements(pooling_elements) |
| 4924 | .pooling_tile(9, 8) |
| 4925 | .channels(1) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4926 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4927 | } |
| 4928 | } |
| 4929 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4930 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4931 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4932 | MaxPoolMicrokernelTester() |
| 4933 | .pooling_elements(pooling_elements) |
| 4934 | .pooling_tile(9, 8) |
| 4935 | .channels(1) |
| 4936 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4937 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4938 | } |
| 4939 | } |
| 4940 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4941 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4942 | for (size_t channels = 2; channels < 10; channels++) { |
| 4943 | MaxPoolMicrokernelTester() |
| 4944 | .pooling_elements(17) |
| 4945 | .pooling_tile(9, 8) |
| 4946 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4947 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4948 | } |
| 4949 | } |
| 4950 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4951 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4952 | for (size_t channels = 2; channels < 10; channels++) { |
| 4953 | MaxPoolMicrokernelTester() |
| 4954 | .pooling_elements(17) |
| 4955 | .pooling_tile(9, 8) |
| 4956 | .channels(channels) |
| 4957 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4958 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4959 | } |
| 4960 | } |
| 4961 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4962 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4963 | for (size_t channels = 2; channels < 10; channels++) { |
| 4964 | MaxPoolMicrokernelTester() |
| 4965 | .pooling_elements(17) |
| 4966 | .pooling_tile(9, 8) |
| 4967 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4968 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4969 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4970 | } |
| 4971 | } |
| 4972 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4973 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4974 | for (size_t channels = 2; channels < 10; channels++) { |
| 4975 | MaxPoolMicrokernelTester() |
| 4976 | .pooling_elements(17) |
| 4977 | .pooling_tile(9, 8) |
| 4978 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4979 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4980 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4981 | } |
| 4982 | } |
| 4983 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4984 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4985 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4986 | for (size_t channels = 2; channels < 10; channels++) { |
| 4987 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 4988 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4989 | .pooling_tile(9, 8) |
| 4990 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4991 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4992 | } |
| 4993 | } |
| 4994 | } |
| 4995 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4996 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 4997 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 4998 | for (size_t channels = 2; channels < 10; channels++) { |
| 4999 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5000 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5001 | .pooling_tile(9, 8) |
| 5002 | .channels(channels) |
| 5003 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5004 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5005 | } |
| 5006 | } |
| 5007 | } |
| 5008 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5009 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5010 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 5011 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5012 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5013 | .pooling_tile(9, 8) |
| 5014 | .channels(1) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5015 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5016 | } |
| 5017 | } |
| 5018 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5019 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5020 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 5021 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5022 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5023 | .pooling_tile(9, 8) |
| 5024 | .channels(1) |
| 5025 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5026 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5027 | } |
| 5028 | } |
| 5029 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5030 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5031 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 5032 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5033 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5034 | .pooling_tile(9, 8) |
| 5035 | .channels(1) |
| 5036 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5037 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5038 | } |
| 5039 | } |
| 5040 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5041 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5042 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 5043 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5044 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5045 | .pooling_tile(9, 8) |
| 5046 | .channels(1) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5047 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5048 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5049 | } |
| 5050 | } |
| 5051 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5052 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5053 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 5054 | for (size_t channels = 2; channels < 10; channels++) { |
| 5055 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5056 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5057 | .pooling_tile(9, 8) |
| 5058 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5059 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5060 | } |
| 5061 | } |
| 5062 | } |
| 5063 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5064 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5065 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 5066 | for (size_t channels = 2; channels < 10; channels++) { |
| 5067 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5068 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5069 | .pooling_tile(9, 8) |
| 5070 | .channels(channels) |
| 5071 | .input_offset(3) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5072 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5073 | } |
| 5074 | } |
| 5075 | } |
| 5076 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5077 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5078 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 5079 | for (size_t channels = 2; channels < 10; channels++) { |
| 5080 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5081 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5082 | .pooling_tile(9, 8) |
| 5083 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5084 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5085 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5086 | } |
| 5087 | } |
| 5088 | } |
| 5089 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5090 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5091 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 5092 | for (size_t channels = 2; channels < 10; channels++) { |
| 5093 | MaxPoolMicrokernelTester() |
Marat Dukhan | f5fec4b | 2020-02-27 13:48:33 -0800 | [diff] [blame] | 5094 | .pooling_elements(pooling_elements) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5095 | .pooling_tile(9, 8) |
| 5096 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5097 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5098 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5099 | } |
| 5100 | } |
| 5101 | } |
| 5102 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5103 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5104 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5105 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 5106 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5107 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5108 | .output_pixels(output_pixels) |
| 5109 | .pooling_elements(pooling_elements) |
| 5110 | .pooling_tile(9, 8) |
| 5111 | .channels(channels) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5112 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5113 | } |
| 5114 | } |
| 5115 | } |
| 5116 | } |
| 5117 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5118 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_input_offset) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5119 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5120 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 5121 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5122 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5123 | .output_pixels(output_pixels) |
| 5124 | .pooling_elements(pooling_elements) |
| 5125 | .pooling_tile(9, 8) |
| 5126 | .channels(channels) |
| 5127 | .input_offset(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5128 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5129 | } |
| 5130 | } |
| 5131 | } |
| 5132 | } |
| 5133 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5134 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_qmin) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5135 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5136 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 5137 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5138 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5139 | .output_pixels(output_pixels) |
| 5140 | .pooling_elements(pooling_elements) |
| 5141 | .pooling_tile(9, 8) |
| 5142 | .channels(channels) |
| 5143 | .qmin(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5144 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5145 | } |
| 5146 | } |
| 5147 | } |
| 5148 | } |
| 5149 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5150 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_qmax) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5151 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5152 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 5153 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 5154 | MaxPoolMicrokernelTester() |
| 5155 | .output_pixels(output_pixels) |
| 5156 | .pooling_elements(pooling_elements) |
| 5157 | .pooling_tile(9, 8) |
| 5158 | .channels(channels) |
| 5159 | .qmax(192) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5160 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5161 | } |
| 5162 | } |
| 5163 | } |
| 5164 | } |
| 5165 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5166 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_output_stride) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5167 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5168 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 5169 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 5170 | MaxPoolMicrokernelTester() |
| 5171 | .output_pixels(output_pixels) |
| 5172 | .pooling_elements(pooling_elements) |
| 5173 | .pooling_tile(9, 8) |
| 5174 | .channels(channels) |
| 5175 | .output_stride(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5176 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5177 | } |
| 5178 | } |
| 5179 | } |
| 5180 | } |
| 5181 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5182 | TEST(F32_MAXPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_step) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5183 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5184 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 5185 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 5186 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5187 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5188 | .output_pixels(output_pixels) |
| 5189 | .pooling_elements(pooling_elements) |
| 5190 | .pooling_tile(9, 8) |
| 5191 | .step(step) |
| 5192 | .channels(channels) |
| 5193 | .output_stride(7) |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5194 | .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5195 | } |
| 5196 | } |
| 5197 | } |
| 5198 | } |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 5199 | } |