Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2020 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | // |
| 9 | // Auto-generated file. Do not edit! |
| 10 | // Specification: test/qs8-gavgpool-minmax-fp32.yaml |
| 11 | // Generator: tools/generate-gavgpool-test.py |
| 12 | |
| 13 | |
| 14 | #include <gtest/gtest.h> |
| 15 | |
| 16 | #include <xnnpack/common.h> |
| 17 | #include <xnnpack/isa-checks.h> |
| 18 | |
| 19 | #include <xnnpack/gavgpool.h> |
| 20 | #include "gavgpool-microkernel-tester.h" |
| 21 | |
| 22 | |
| 23 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 24 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_eq_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 25 | TEST_REQUIRES_ARM_NEON; |
| 26 | GAvgPoolMicrokernelTester() |
| 27 | .rows(14) |
| 28 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 29 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 30 | } |
| 31 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 32 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 33 | TEST_REQUIRES_ARM_NEON; |
| 34 | GAvgPoolMicrokernelTester() |
| 35 | .rows(14) |
| 36 | .channels(8) |
| 37 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 38 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 39 | } |
| 40 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 41 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 42 | TEST_REQUIRES_ARM_NEON; |
| 43 | GAvgPoolMicrokernelTester() |
| 44 | .rows(14) |
| 45 | .channels(8) |
| 46 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 47 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 48 | } |
| 49 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 50 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 51 | TEST_REQUIRES_ARM_NEON; |
| 52 | GAvgPoolMicrokernelTester() |
| 53 | .rows(14) |
| 54 | .channels(8) |
| 55 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 56 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 57 | } |
| 58 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 59 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_eq_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 60 | TEST_REQUIRES_ARM_NEON; |
| 61 | for (size_t rows = 8; rows < 14; rows++) { |
| 62 | GAvgPoolMicrokernelTester() |
| 63 | .rows(rows) |
| 64 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 65 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 66 | } |
| 67 | } |
| 68 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 69 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_eq_8_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 70 | TEST_REQUIRES_ARM_NEON; |
| 71 | for (size_t rows = 8; rows < 14; rows++) { |
| 72 | GAvgPoolMicrokernelTester() |
| 73 | .rows(rows) |
| 74 | .channels(8) |
| 75 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 76 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 77 | } |
| 78 | } |
| 79 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 80 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_eq_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 81 | TEST_REQUIRES_ARM_NEON; |
| 82 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 83 | GAvgPoolMicrokernelTester() |
| 84 | .rows(rows) |
| 85 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 86 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 87 | } |
| 88 | } |
| 89 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 90 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_eq_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 91 | TEST_REQUIRES_ARM_NEON; |
| 92 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 93 | GAvgPoolMicrokernelTester() |
| 94 | .rows(rows) |
| 95 | .channels(8) |
| 96 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 97 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 98 | } |
| 99 | } |
| 100 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 101 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_div_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 102 | TEST_REQUIRES_ARM_NEON; |
| 103 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 104 | GAvgPoolMicrokernelTester() |
| 105 | .rows(14) |
| 106 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 107 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 108 | } |
| 109 | } |
| 110 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 111 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_div_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 112 | TEST_REQUIRES_ARM_NEON; |
| 113 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 114 | for (size_t rows = 8; rows < 14; rows++) { |
| 115 | GAvgPoolMicrokernelTester() |
| 116 | .rows(rows) |
| 117 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 118 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 119 | } |
| 120 | } |
| 121 | } |
| 122 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 123 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_div_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 124 | TEST_REQUIRES_ARM_NEON; |
| 125 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 126 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 127 | GAvgPoolMicrokernelTester() |
| 128 | .rows(rows) |
| 129 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 130 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 131 | } |
| 132 | } |
| 133 | } |
| 134 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 135 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_div_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 136 | TEST_REQUIRES_ARM_NEON; |
| 137 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 138 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 139 | GAvgPoolMicrokernelTester() |
| 140 | .rows(rows) |
| 141 | .channels(channels) |
| 142 | .input_stride(131) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 143 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 144 | } |
| 145 | } |
| 146 | } |
| 147 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 148 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_lt_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 149 | TEST_REQUIRES_ARM_NEON; |
| 150 | for (size_t channels = 1; channels < 8; channels++) { |
| 151 | GAvgPoolMicrokernelTester() |
| 152 | .rows(14) |
| 153 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 154 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 155 | } |
| 156 | } |
| 157 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 158 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 159 | TEST_REQUIRES_ARM_NEON; |
| 160 | for (size_t channels = 1; channels < 8; channels++) { |
| 161 | GAvgPoolMicrokernelTester() |
| 162 | .rows(14) |
| 163 | .channels(channels) |
| 164 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 165 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 166 | } |
| 167 | } |
| 168 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 169 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 170 | TEST_REQUIRES_ARM_NEON; |
| 171 | for (size_t channels = 1; channels < 8; channels++) { |
| 172 | GAvgPoolMicrokernelTester() |
| 173 | .rows(14) |
| 174 | .channels(channels) |
| 175 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 176 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 177 | } |
| 178 | } |
| 179 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 180 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_lt_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 181 | TEST_REQUIRES_ARM_NEON; |
| 182 | for (size_t channels = 1; channels < 8; channels++) { |
| 183 | for (size_t rows = 8; rows < 14; rows++) { |
| 184 | GAvgPoolMicrokernelTester() |
| 185 | .rows(rows) |
| 186 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 187 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 188 | } |
| 189 | } |
| 190 | } |
| 191 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 192 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_lt_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 193 | TEST_REQUIRES_ARM_NEON; |
| 194 | for (size_t channels = 1; channels < 8; channels++) { |
| 195 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 196 | GAvgPoolMicrokernelTester() |
| 197 | .rows(rows) |
| 198 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 199 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 200 | } |
| 201 | } |
| 202 | } |
| 203 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 204 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_lt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 205 | TEST_REQUIRES_ARM_NEON; |
| 206 | for (size_t channels = 1; channels < 8; channels++) { |
| 207 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 208 | GAvgPoolMicrokernelTester() |
| 209 | .rows(rows) |
| 210 | .channels(channels) |
| 211 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 212 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 213 | } |
| 214 | } |
| 215 | } |
| 216 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 217 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_gt_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 218 | TEST_REQUIRES_ARM_NEON; |
| 219 | for (size_t channels = 9; channels < 16; channels++) { |
| 220 | GAvgPoolMicrokernelTester() |
| 221 | .rows(14) |
| 222 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 223 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 224 | } |
| 225 | } |
| 226 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 227 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 228 | TEST_REQUIRES_ARM_NEON; |
| 229 | for (size_t channels = 9; channels < 16; channels++) { |
| 230 | GAvgPoolMicrokernelTester() |
| 231 | .rows(14) |
| 232 | .channels(channels) |
| 233 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 234 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 235 | } |
| 236 | } |
| 237 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 238 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 239 | TEST_REQUIRES_ARM_NEON; |
| 240 | for (size_t channels = 9; channels < 16; channels++) { |
| 241 | GAvgPoolMicrokernelTester() |
| 242 | .rows(14) |
| 243 | .channels(channels) |
| 244 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 245 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 246 | } |
| 247 | } |
| 248 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 249 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_gt_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 250 | TEST_REQUIRES_ARM_NEON; |
| 251 | for (size_t channels = 9; channels < 16; channels++) { |
| 252 | for (size_t rows = 8; rows < 14; rows++) { |
| 253 | GAvgPoolMicrokernelTester() |
| 254 | .rows(rows) |
| 255 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 256 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 257 | } |
| 258 | } |
| 259 | } |
| 260 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 261 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_gt_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 262 | TEST_REQUIRES_ARM_NEON; |
| 263 | for (size_t channels = 9; channels < 16; channels++) { |
| 264 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 265 | GAvgPoolMicrokernelTester() |
| 266 | .rows(rows) |
| 267 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 268 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 269 | } |
| 270 | } |
| 271 | } |
| 272 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 273 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C8, channels_gt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 274 | TEST_REQUIRES_ARM_NEON; |
| 275 | for (size_t channels = 9; channels < 16; channels++) { |
| 276 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 277 | GAvgPoolMicrokernelTester() |
| 278 | .rows(rows) |
| 279 | .channels(channels) |
| 280 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 281 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 282 | } |
| 283 | } |
| 284 | } |
| 285 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 286 | |
| 287 | |
| 288 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 289 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_eq_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 290 | TEST_REQUIRES_ARM_NEON; |
| 291 | GAvgPoolMicrokernelTester() |
| 292 | .rows(14) |
| 293 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 294 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 295 | } |
| 296 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 297 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_eq_16_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 298 | TEST_REQUIRES_ARM_NEON; |
| 299 | GAvgPoolMicrokernelTester() |
| 300 | .rows(14) |
| 301 | .channels(16) |
| 302 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 303 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 304 | } |
| 305 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 306 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_eq_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 307 | TEST_REQUIRES_ARM_NEON; |
| 308 | GAvgPoolMicrokernelTester() |
| 309 | .rows(14) |
| 310 | .channels(16) |
| 311 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 312 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 313 | } |
| 314 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 315 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_eq_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 316 | TEST_REQUIRES_ARM_NEON; |
| 317 | GAvgPoolMicrokernelTester() |
| 318 | .rows(14) |
| 319 | .channels(16) |
| 320 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 321 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 322 | } |
| 323 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 324 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_eq_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 325 | TEST_REQUIRES_ARM_NEON; |
| 326 | for (size_t rows = 8; rows < 14; rows++) { |
| 327 | GAvgPoolMicrokernelTester() |
| 328 | .rows(rows) |
| 329 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 330 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 331 | } |
| 332 | } |
| 333 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 334 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_eq_16_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 335 | TEST_REQUIRES_ARM_NEON; |
| 336 | for (size_t rows = 8; rows < 14; rows++) { |
| 337 | GAvgPoolMicrokernelTester() |
| 338 | .rows(rows) |
| 339 | .channels(16) |
| 340 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 341 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 342 | } |
| 343 | } |
| 344 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 345 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_eq_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 346 | TEST_REQUIRES_ARM_NEON; |
| 347 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 348 | GAvgPoolMicrokernelTester() |
| 349 | .rows(rows) |
| 350 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 351 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 352 | } |
| 353 | } |
| 354 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 355 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_eq_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 356 | TEST_REQUIRES_ARM_NEON; |
| 357 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 358 | GAvgPoolMicrokernelTester() |
| 359 | .rows(rows) |
| 360 | .channels(16) |
| 361 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 362 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 363 | } |
| 364 | } |
| 365 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 366 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_div_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 367 | TEST_REQUIRES_ARM_NEON; |
| 368 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 369 | GAvgPoolMicrokernelTester() |
| 370 | .rows(14) |
| 371 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 372 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 373 | } |
| 374 | } |
| 375 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 376 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_div_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 377 | TEST_REQUIRES_ARM_NEON; |
| 378 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 379 | for (size_t rows = 8; rows < 14; rows++) { |
| 380 | GAvgPoolMicrokernelTester() |
| 381 | .rows(rows) |
| 382 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 383 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 384 | } |
| 385 | } |
| 386 | } |
| 387 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 388 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_div_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 389 | TEST_REQUIRES_ARM_NEON; |
| 390 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 391 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 392 | GAvgPoolMicrokernelTester() |
| 393 | .rows(rows) |
| 394 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 395 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 396 | } |
| 397 | } |
| 398 | } |
| 399 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 400 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_div_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 401 | TEST_REQUIRES_ARM_NEON; |
| 402 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 403 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 404 | GAvgPoolMicrokernelTester() |
| 405 | .rows(rows) |
| 406 | .channels(channels) |
| 407 | .input_stride(263) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 408 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 409 | } |
| 410 | } |
| 411 | } |
| 412 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 413 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_lt_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 414 | TEST_REQUIRES_ARM_NEON; |
| 415 | for (size_t channels = 1; channels < 16; channels++) { |
| 416 | GAvgPoolMicrokernelTester() |
| 417 | .rows(14) |
| 418 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 419 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 420 | } |
| 421 | } |
| 422 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 423 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_lt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 424 | TEST_REQUIRES_ARM_NEON; |
| 425 | for (size_t channels = 1; channels < 16; channels++) { |
| 426 | GAvgPoolMicrokernelTester() |
| 427 | .rows(14) |
| 428 | .channels(channels) |
| 429 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 430 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 431 | } |
| 432 | } |
| 433 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 434 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_lt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 435 | TEST_REQUIRES_ARM_NEON; |
| 436 | for (size_t channels = 1; channels < 16; channels++) { |
| 437 | GAvgPoolMicrokernelTester() |
| 438 | .rows(14) |
| 439 | .channels(channels) |
| 440 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 441 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 442 | } |
| 443 | } |
| 444 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 445 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_lt_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 446 | TEST_REQUIRES_ARM_NEON; |
| 447 | for (size_t channels = 1; channels < 16; channels++) { |
| 448 | for (size_t rows = 8; rows < 14; rows++) { |
| 449 | GAvgPoolMicrokernelTester() |
| 450 | .rows(rows) |
| 451 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 452 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 453 | } |
| 454 | } |
| 455 | } |
| 456 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 457 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_lt_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 458 | TEST_REQUIRES_ARM_NEON; |
| 459 | for (size_t channels = 1; channels < 16; channels++) { |
| 460 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 461 | GAvgPoolMicrokernelTester() |
| 462 | .rows(rows) |
| 463 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 464 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 465 | } |
| 466 | } |
| 467 | } |
| 468 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 469 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_lt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 470 | TEST_REQUIRES_ARM_NEON; |
| 471 | for (size_t channels = 1; channels < 16; channels++) { |
| 472 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 473 | GAvgPoolMicrokernelTester() |
| 474 | .rows(rows) |
| 475 | .channels(channels) |
| 476 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 477 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 478 | } |
| 479 | } |
| 480 | } |
| 481 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 482 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_gt_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 483 | TEST_REQUIRES_ARM_NEON; |
| 484 | for (size_t channels = 17; channels < 32; channels++) { |
| 485 | GAvgPoolMicrokernelTester() |
| 486 | .rows(14) |
| 487 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 488 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 489 | } |
| 490 | } |
| 491 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 492 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_gt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 493 | TEST_REQUIRES_ARM_NEON; |
| 494 | for (size_t channels = 17; channels < 32; channels++) { |
| 495 | GAvgPoolMicrokernelTester() |
| 496 | .rows(14) |
| 497 | .channels(channels) |
| 498 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 499 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 500 | } |
| 501 | } |
| 502 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 503 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_gt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 504 | TEST_REQUIRES_ARM_NEON; |
| 505 | for (size_t channels = 17; channels < 32; channels++) { |
| 506 | GAvgPoolMicrokernelTester() |
| 507 | .rows(14) |
| 508 | .channels(channels) |
| 509 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 510 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 511 | } |
| 512 | } |
| 513 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 514 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_gt_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 515 | TEST_REQUIRES_ARM_NEON; |
| 516 | for (size_t channels = 17; channels < 32; channels++) { |
| 517 | for (size_t rows = 8; rows < 14; rows++) { |
| 518 | GAvgPoolMicrokernelTester() |
| 519 | .rows(rows) |
| 520 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 521 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 522 | } |
| 523 | } |
| 524 | } |
| 525 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 526 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_gt_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 527 | TEST_REQUIRES_ARM_NEON; |
| 528 | for (size_t channels = 17; channels < 32; channels++) { |
| 529 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 530 | GAvgPoolMicrokernelTester() |
| 531 | .rows(rows) |
| 532 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 533 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 534 | } |
| 535 | } |
| 536 | } |
| 537 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 538 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C16, channels_gt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 539 | TEST_REQUIRES_ARM_NEON; |
| 540 | for (size_t channels = 17; channels < 32; channels++) { |
| 541 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 542 | GAvgPoolMicrokernelTester() |
| 543 | .rows(rows) |
| 544 | .channels(channels) |
| 545 | .input_stride(47) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 546 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 547 | } |
| 548 | } |
| 549 | } |
| 550 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 551 | |
| 552 | |
| 553 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 554 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_eq_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 555 | TEST_REQUIRES_ARM_NEON; |
| 556 | GAvgPoolMicrokernelTester() |
| 557 | .rows(14) |
| 558 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 559 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 560 | } |
| 561 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 562 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_eq_24_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 563 | TEST_REQUIRES_ARM_NEON; |
| 564 | GAvgPoolMicrokernelTester() |
| 565 | .rows(14) |
| 566 | .channels(24) |
| 567 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 568 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 569 | } |
| 570 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 571 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_eq_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 572 | TEST_REQUIRES_ARM_NEON; |
| 573 | GAvgPoolMicrokernelTester() |
| 574 | .rows(14) |
| 575 | .channels(24) |
| 576 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 577 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 578 | } |
| 579 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 580 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_eq_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 581 | TEST_REQUIRES_ARM_NEON; |
| 582 | GAvgPoolMicrokernelTester() |
| 583 | .rows(14) |
| 584 | .channels(24) |
| 585 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 586 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 587 | } |
| 588 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 589 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_eq_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 590 | TEST_REQUIRES_ARM_NEON; |
| 591 | for (size_t rows = 8; rows < 14; rows++) { |
| 592 | GAvgPoolMicrokernelTester() |
| 593 | .rows(rows) |
| 594 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 595 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 596 | } |
| 597 | } |
| 598 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 599 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_eq_24_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 600 | TEST_REQUIRES_ARM_NEON; |
| 601 | for (size_t rows = 8; rows < 14; rows++) { |
| 602 | GAvgPoolMicrokernelTester() |
| 603 | .rows(rows) |
| 604 | .channels(24) |
| 605 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 606 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 607 | } |
| 608 | } |
| 609 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 610 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_eq_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 611 | TEST_REQUIRES_ARM_NEON; |
| 612 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 613 | GAvgPoolMicrokernelTester() |
| 614 | .rows(rows) |
| 615 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 616 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 617 | } |
| 618 | } |
| 619 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 620 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_eq_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 621 | TEST_REQUIRES_ARM_NEON; |
| 622 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 623 | GAvgPoolMicrokernelTester() |
| 624 | .rows(rows) |
| 625 | .channels(24) |
| 626 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 627 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 628 | } |
| 629 | } |
| 630 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 631 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_div_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 632 | TEST_REQUIRES_ARM_NEON; |
| 633 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 634 | GAvgPoolMicrokernelTester() |
| 635 | .rows(14) |
| 636 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 637 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 638 | } |
| 639 | } |
| 640 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 641 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_div_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 642 | TEST_REQUIRES_ARM_NEON; |
| 643 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 644 | for (size_t rows = 8; rows < 14; rows++) { |
| 645 | GAvgPoolMicrokernelTester() |
| 646 | .rows(rows) |
| 647 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 648 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 649 | } |
| 650 | } |
| 651 | } |
| 652 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 653 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_div_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 654 | TEST_REQUIRES_ARM_NEON; |
| 655 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 656 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 657 | GAvgPoolMicrokernelTester() |
| 658 | .rows(rows) |
| 659 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 660 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 661 | } |
| 662 | } |
| 663 | } |
| 664 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 665 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_div_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 666 | TEST_REQUIRES_ARM_NEON; |
| 667 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 668 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 669 | GAvgPoolMicrokernelTester() |
| 670 | .rows(rows) |
| 671 | .channels(channels) |
| 672 | .input_stride(389) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 673 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 674 | } |
| 675 | } |
| 676 | } |
| 677 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 678 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_lt_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 679 | TEST_REQUIRES_ARM_NEON; |
| 680 | for (size_t channels = 1; channels < 24; channels++) { |
| 681 | GAvgPoolMicrokernelTester() |
| 682 | .rows(14) |
| 683 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 684 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 685 | } |
| 686 | } |
| 687 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 688 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_lt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 689 | TEST_REQUIRES_ARM_NEON; |
| 690 | for (size_t channels = 1; channels < 24; channels++) { |
| 691 | GAvgPoolMicrokernelTester() |
| 692 | .rows(14) |
| 693 | .channels(channels) |
| 694 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 695 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 696 | } |
| 697 | } |
| 698 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 699 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_lt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 700 | TEST_REQUIRES_ARM_NEON; |
| 701 | for (size_t channels = 1; channels < 24; channels++) { |
| 702 | GAvgPoolMicrokernelTester() |
| 703 | .rows(14) |
| 704 | .channels(channels) |
| 705 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 706 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 707 | } |
| 708 | } |
| 709 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 710 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_lt_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 711 | TEST_REQUIRES_ARM_NEON; |
| 712 | for (size_t channels = 1; channels < 24; channels++) { |
| 713 | for (size_t rows = 8; rows < 14; rows++) { |
| 714 | GAvgPoolMicrokernelTester() |
| 715 | .rows(rows) |
| 716 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 717 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 718 | } |
| 719 | } |
| 720 | } |
| 721 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 722 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_lt_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 723 | TEST_REQUIRES_ARM_NEON; |
| 724 | for (size_t channels = 1; channels < 24; channels++) { |
| 725 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 726 | GAvgPoolMicrokernelTester() |
| 727 | .rows(rows) |
| 728 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 729 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 730 | } |
| 731 | } |
| 732 | } |
| 733 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 734 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_lt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 735 | TEST_REQUIRES_ARM_NEON; |
| 736 | for (size_t channels = 1; channels < 24; channels++) { |
| 737 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 738 | GAvgPoolMicrokernelTester() |
| 739 | .rows(rows) |
| 740 | .channels(channels) |
| 741 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 742 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 743 | } |
| 744 | } |
| 745 | } |
| 746 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 747 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_gt_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 748 | TEST_REQUIRES_ARM_NEON; |
| 749 | for (size_t channels = 25; channels < 48; channels++) { |
| 750 | GAvgPoolMicrokernelTester() |
| 751 | .rows(14) |
| 752 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 753 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 754 | } |
| 755 | } |
| 756 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 757 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_gt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 758 | TEST_REQUIRES_ARM_NEON; |
| 759 | for (size_t channels = 25; channels < 48; channels++) { |
| 760 | GAvgPoolMicrokernelTester() |
| 761 | .rows(14) |
| 762 | .channels(channels) |
| 763 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 764 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 765 | } |
| 766 | } |
| 767 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 768 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_gt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 769 | TEST_REQUIRES_ARM_NEON; |
| 770 | for (size_t channels = 25; channels < 48; channels++) { |
| 771 | GAvgPoolMicrokernelTester() |
| 772 | .rows(14) |
| 773 | .channels(channels) |
| 774 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 775 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 776 | } |
| 777 | } |
| 778 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 779 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_gt_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 780 | TEST_REQUIRES_ARM_NEON; |
| 781 | for (size_t channels = 25; channels < 48; channels++) { |
| 782 | for (size_t rows = 8; rows < 14; rows++) { |
| 783 | GAvgPoolMicrokernelTester() |
| 784 | .rows(rows) |
| 785 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 786 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 787 | } |
| 788 | } |
| 789 | } |
| 790 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 791 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_gt_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 792 | TEST_REQUIRES_ARM_NEON; |
| 793 | for (size_t channels = 25; channels < 48; channels++) { |
| 794 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 795 | GAvgPoolMicrokernelTester() |
| 796 | .rows(rows) |
| 797 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 798 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 799 | } |
| 800 | } |
| 801 | } |
| 802 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 803 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C24, channels_gt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 804 | TEST_REQUIRES_ARM_NEON; |
| 805 | for (size_t channels = 25; channels < 48; channels++) { |
| 806 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 807 | GAvgPoolMicrokernelTester() |
| 808 | .rows(rows) |
| 809 | .channels(channels) |
| 810 | .input_stride(61) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 811 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 812 | } |
| 813 | } |
| 814 | } |
| 815 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 816 | |
| 817 | |
| 818 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 819 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_eq_32_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 820 | TEST_REQUIRES_ARM_NEON; |
| 821 | GAvgPoolMicrokernelTester() |
| 822 | .rows(14) |
| 823 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 824 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 825 | } |
| 826 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 827 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_eq_32_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 828 | TEST_REQUIRES_ARM_NEON; |
| 829 | GAvgPoolMicrokernelTester() |
| 830 | .rows(14) |
| 831 | .channels(32) |
| 832 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 833 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 834 | } |
| 835 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 836 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_eq_32_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 837 | TEST_REQUIRES_ARM_NEON; |
| 838 | GAvgPoolMicrokernelTester() |
| 839 | .rows(14) |
| 840 | .channels(32) |
| 841 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 842 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 843 | } |
| 844 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 845 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_eq_32_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 846 | TEST_REQUIRES_ARM_NEON; |
| 847 | GAvgPoolMicrokernelTester() |
| 848 | .rows(14) |
| 849 | .channels(32) |
| 850 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 851 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 852 | } |
| 853 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 854 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_eq_32_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 855 | TEST_REQUIRES_ARM_NEON; |
| 856 | for (size_t rows = 8; rows < 14; rows++) { |
| 857 | GAvgPoolMicrokernelTester() |
| 858 | .rows(rows) |
| 859 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 860 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 861 | } |
| 862 | } |
| 863 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 864 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_eq_32_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 865 | TEST_REQUIRES_ARM_NEON; |
| 866 | for (size_t rows = 8; rows < 14; rows++) { |
| 867 | GAvgPoolMicrokernelTester() |
| 868 | .rows(rows) |
| 869 | .channels(32) |
| 870 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 871 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 872 | } |
| 873 | } |
| 874 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 875 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_eq_32_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 876 | TEST_REQUIRES_ARM_NEON; |
| 877 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 878 | GAvgPoolMicrokernelTester() |
| 879 | .rows(rows) |
| 880 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 881 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 882 | } |
| 883 | } |
| 884 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 885 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_eq_32_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 886 | TEST_REQUIRES_ARM_NEON; |
| 887 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 888 | GAvgPoolMicrokernelTester() |
| 889 | .rows(rows) |
| 890 | .channels(32) |
| 891 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 892 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 893 | } |
| 894 | } |
| 895 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 896 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_div_32_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 897 | TEST_REQUIRES_ARM_NEON; |
| 898 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 899 | GAvgPoolMicrokernelTester() |
| 900 | .rows(14) |
| 901 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 902 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 903 | } |
| 904 | } |
| 905 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 906 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_div_32_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 907 | TEST_REQUIRES_ARM_NEON; |
| 908 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 909 | for (size_t rows = 8; rows < 14; rows++) { |
| 910 | GAvgPoolMicrokernelTester() |
| 911 | .rows(rows) |
| 912 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 913 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 914 | } |
| 915 | } |
| 916 | } |
| 917 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 918 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_div_32_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 919 | TEST_REQUIRES_ARM_NEON; |
| 920 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 921 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 922 | GAvgPoolMicrokernelTester() |
| 923 | .rows(rows) |
| 924 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 925 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 926 | } |
| 927 | } |
| 928 | } |
| 929 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 930 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_div_32_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 931 | TEST_REQUIRES_ARM_NEON; |
| 932 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 933 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 934 | GAvgPoolMicrokernelTester() |
| 935 | .rows(rows) |
| 936 | .channels(channels) |
| 937 | .input_stride(521) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 938 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 939 | } |
| 940 | } |
| 941 | } |
| 942 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 943 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_lt_32_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 944 | TEST_REQUIRES_ARM_NEON; |
| 945 | for (size_t channels = 1; channels < 32; channels++) { |
| 946 | GAvgPoolMicrokernelTester() |
| 947 | .rows(14) |
| 948 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 949 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 950 | } |
| 951 | } |
| 952 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 953 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_lt_32_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 954 | TEST_REQUIRES_ARM_NEON; |
| 955 | for (size_t channels = 1; channels < 32; channels++) { |
| 956 | GAvgPoolMicrokernelTester() |
| 957 | .rows(14) |
| 958 | .channels(channels) |
| 959 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 960 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 961 | } |
| 962 | } |
| 963 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 964 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_lt_32_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 965 | TEST_REQUIRES_ARM_NEON; |
| 966 | for (size_t channels = 1; channels < 32; channels++) { |
| 967 | GAvgPoolMicrokernelTester() |
| 968 | .rows(14) |
| 969 | .channels(channels) |
| 970 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 971 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 972 | } |
| 973 | } |
| 974 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 975 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_lt_32_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 976 | TEST_REQUIRES_ARM_NEON; |
| 977 | for (size_t channels = 1; channels < 32; channels++) { |
| 978 | for (size_t rows = 8; rows < 14; rows++) { |
| 979 | GAvgPoolMicrokernelTester() |
| 980 | .rows(rows) |
| 981 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 982 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 983 | } |
| 984 | } |
| 985 | } |
| 986 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 987 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_lt_32_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 988 | TEST_REQUIRES_ARM_NEON; |
| 989 | for (size_t channels = 1; channels < 32; channels++) { |
| 990 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 991 | GAvgPoolMicrokernelTester() |
| 992 | .rows(rows) |
| 993 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 994 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 995 | } |
| 996 | } |
| 997 | } |
| 998 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 999 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_lt_32_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1000 | TEST_REQUIRES_ARM_NEON; |
| 1001 | for (size_t channels = 1; channels < 32; channels++) { |
| 1002 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 1003 | GAvgPoolMicrokernelTester() |
| 1004 | .rows(rows) |
| 1005 | .channels(channels) |
| 1006 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1007 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1008 | } |
| 1009 | } |
| 1010 | } |
| 1011 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1012 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_gt_32_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1013 | TEST_REQUIRES_ARM_NEON; |
| 1014 | for (size_t channels = 33; channels < 64; channels++) { |
| 1015 | GAvgPoolMicrokernelTester() |
| 1016 | .rows(14) |
| 1017 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1018 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1019 | } |
| 1020 | } |
| 1021 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1022 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_gt_32_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1023 | TEST_REQUIRES_ARM_NEON; |
| 1024 | for (size_t channels = 33; channels < 64; channels++) { |
| 1025 | GAvgPoolMicrokernelTester() |
| 1026 | .rows(14) |
| 1027 | .channels(channels) |
| 1028 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1029 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1030 | } |
| 1031 | } |
| 1032 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1033 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_gt_32_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1034 | TEST_REQUIRES_ARM_NEON; |
| 1035 | for (size_t channels = 33; channels < 64; channels++) { |
| 1036 | GAvgPoolMicrokernelTester() |
| 1037 | .rows(14) |
| 1038 | .channels(channels) |
| 1039 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1040 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1041 | } |
| 1042 | } |
| 1043 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1044 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_gt_32_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1045 | TEST_REQUIRES_ARM_NEON; |
| 1046 | for (size_t channels = 33; channels < 64; channels++) { |
| 1047 | for (size_t rows = 8; rows < 14; rows++) { |
| 1048 | GAvgPoolMicrokernelTester() |
| 1049 | .rows(rows) |
| 1050 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1051 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1052 | } |
| 1053 | } |
| 1054 | } |
| 1055 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1056 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_gt_32_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1057 | TEST_REQUIRES_ARM_NEON; |
| 1058 | for (size_t channels = 33; channels < 64; channels++) { |
| 1059 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 1060 | GAvgPoolMicrokernelTester() |
| 1061 | .rows(rows) |
| 1062 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1063 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1064 | } |
| 1065 | } |
| 1066 | } |
| 1067 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1068 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEON_C32, channels_gt_32_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1069 | TEST_REQUIRES_ARM_NEON; |
| 1070 | for (size_t channels = 33; channels < 64; channels++) { |
| 1071 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 1072 | GAvgPoolMicrokernelTester() |
| 1073 | .rows(rows) |
| 1074 | .channels(channels) |
| 1075 | .input_stride(79) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1076 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1077 | } |
| 1078 | } |
| 1079 | } |
| 1080 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1081 | |
| 1082 | |
| 1083 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1084 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_eq_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1085 | TEST_REQUIRES_ARM_NEON; |
| 1086 | GAvgPoolMicrokernelTester() |
| 1087 | .rows(7) |
| 1088 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1089 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1090 | } |
| 1091 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1092 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_eq_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1093 | TEST_REQUIRES_ARM_NEON; |
| 1094 | for (size_t rows = 1; rows < 7; rows++) { |
| 1095 | GAvgPoolMicrokernelTester() |
| 1096 | .rows(rows) |
| 1097 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1098 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1099 | } |
| 1100 | } |
| 1101 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1102 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_eq_8_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1103 | TEST_REQUIRES_ARM_NEON; |
| 1104 | GAvgPoolMicrokernelTester() |
| 1105 | .rows(7) |
| 1106 | .channels(8) |
| 1107 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1108 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1109 | } |
| 1110 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1111 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_eq_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1112 | TEST_REQUIRES_ARM_NEON; |
| 1113 | GAvgPoolMicrokernelTester() |
| 1114 | .rows(7) |
| 1115 | .channels(8) |
| 1116 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1117 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1118 | } |
| 1119 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1120 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_eq_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1121 | TEST_REQUIRES_ARM_NEON; |
| 1122 | GAvgPoolMicrokernelTester() |
| 1123 | .rows(7) |
| 1124 | .channels(8) |
| 1125 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1126 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1127 | } |
| 1128 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1129 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_div_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1130 | TEST_REQUIRES_ARM_NEON; |
| 1131 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 1132 | GAvgPoolMicrokernelTester() |
| 1133 | .rows(7) |
| 1134 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1135 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1136 | } |
| 1137 | } |
| 1138 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1139 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_div_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1140 | TEST_REQUIRES_ARM_NEON; |
| 1141 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 1142 | for (size_t rows = 1; rows < 7; rows++) { |
| 1143 | GAvgPoolMicrokernelTester() |
| 1144 | .rows(rows) |
| 1145 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1146 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1147 | } |
| 1148 | } |
| 1149 | } |
| 1150 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1151 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_lt_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1152 | TEST_REQUIRES_ARM_NEON; |
| 1153 | for (size_t channels = 1; channels < 8; channels++) { |
| 1154 | GAvgPoolMicrokernelTester() |
| 1155 | .rows(7) |
| 1156 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1157 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1158 | } |
| 1159 | } |
| 1160 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1161 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_lt_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1162 | TEST_REQUIRES_ARM_NEON; |
| 1163 | for (size_t channels = 1; channels < 8; channels++) { |
| 1164 | for (size_t rows = 1; rows < 7; rows++) { |
| 1165 | GAvgPoolMicrokernelTester() |
| 1166 | .rows(rows) |
| 1167 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1168 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1169 | } |
| 1170 | } |
| 1171 | } |
| 1172 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1173 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_lt_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1174 | TEST_REQUIRES_ARM_NEON; |
| 1175 | for (size_t channels = 1; channels < 8; channels++) { |
| 1176 | GAvgPoolMicrokernelTester() |
| 1177 | .rows(7) |
| 1178 | .channels(channels) |
| 1179 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1180 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1181 | } |
| 1182 | } |
| 1183 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1184 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_lt_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1185 | TEST_REQUIRES_ARM_NEON; |
| 1186 | for (size_t channels = 1; channels < 8; channels++) { |
| 1187 | GAvgPoolMicrokernelTester() |
| 1188 | .rows(7) |
| 1189 | .channels(channels) |
| 1190 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1191 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1192 | } |
| 1193 | } |
| 1194 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1195 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_gt_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1196 | TEST_REQUIRES_ARM_NEON; |
| 1197 | for (size_t channels = 9; channels < 16; channels++) { |
| 1198 | GAvgPoolMicrokernelTester() |
| 1199 | .rows(7) |
| 1200 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1201 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1202 | } |
| 1203 | } |
| 1204 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1205 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_gt_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1206 | TEST_REQUIRES_ARM_NEON; |
| 1207 | for (size_t channels = 9; channels < 16; channels++) { |
| 1208 | for (size_t rows = 1; rows < 7; rows++) { |
| 1209 | GAvgPoolMicrokernelTester() |
| 1210 | .rows(rows) |
| 1211 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1212 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1213 | } |
| 1214 | } |
| 1215 | } |
| 1216 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1217 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_gt_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1218 | TEST_REQUIRES_ARM_NEON; |
| 1219 | for (size_t channels = 9; channels < 16; channels++) { |
| 1220 | GAvgPoolMicrokernelTester() |
| 1221 | .rows(7) |
| 1222 | .channels(channels) |
| 1223 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1224 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1225 | } |
| 1226 | } |
| 1227 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1228 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C8, channels_gt_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1229 | TEST_REQUIRES_ARM_NEON; |
| 1230 | for (size_t channels = 9; channels < 16; channels++) { |
| 1231 | GAvgPoolMicrokernelTester() |
| 1232 | .rows(7) |
| 1233 | .channels(channels) |
| 1234 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1235 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c8, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1236 | } |
| 1237 | } |
| 1238 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1239 | |
| 1240 | |
| 1241 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1242 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_eq_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1243 | TEST_REQUIRES_ARM_NEON; |
| 1244 | GAvgPoolMicrokernelTester() |
| 1245 | .rows(7) |
| 1246 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1247 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1248 | } |
| 1249 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1250 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_eq_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1251 | TEST_REQUIRES_ARM_NEON; |
| 1252 | for (size_t rows = 1; rows < 7; rows++) { |
| 1253 | GAvgPoolMicrokernelTester() |
| 1254 | .rows(rows) |
| 1255 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1256 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1257 | } |
| 1258 | } |
| 1259 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1260 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_eq_16_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1261 | TEST_REQUIRES_ARM_NEON; |
| 1262 | GAvgPoolMicrokernelTester() |
| 1263 | .rows(7) |
| 1264 | .channels(16) |
| 1265 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1266 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1267 | } |
| 1268 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1269 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_eq_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1270 | TEST_REQUIRES_ARM_NEON; |
| 1271 | GAvgPoolMicrokernelTester() |
| 1272 | .rows(7) |
| 1273 | .channels(16) |
| 1274 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1275 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1276 | } |
| 1277 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1278 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_eq_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1279 | TEST_REQUIRES_ARM_NEON; |
| 1280 | GAvgPoolMicrokernelTester() |
| 1281 | .rows(7) |
| 1282 | .channels(16) |
| 1283 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1284 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1285 | } |
| 1286 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1287 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_div_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1288 | TEST_REQUIRES_ARM_NEON; |
| 1289 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 1290 | GAvgPoolMicrokernelTester() |
| 1291 | .rows(7) |
| 1292 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1293 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1294 | } |
| 1295 | } |
| 1296 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1297 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_div_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1298 | TEST_REQUIRES_ARM_NEON; |
| 1299 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 1300 | for (size_t rows = 1; rows < 7; rows++) { |
| 1301 | GAvgPoolMicrokernelTester() |
| 1302 | .rows(rows) |
| 1303 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1304 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1305 | } |
| 1306 | } |
| 1307 | } |
| 1308 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1309 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_lt_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1310 | TEST_REQUIRES_ARM_NEON; |
| 1311 | for (size_t channels = 1; channels < 16; channels++) { |
| 1312 | GAvgPoolMicrokernelTester() |
| 1313 | .rows(7) |
| 1314 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1315 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1316 | } |
| 1317 | } |
| 1318 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1319 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_lt_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1320 | TEST_REQUIRES_ARM_NEON; |
| 1321 | for (size_t channels = 1; channels < 16; channels++) { |
| 1322 | for (size_t rows = 1; rows < 7; rows++) { |
| 1323 | GAvgPoolMicrokernelTester() |
| 1324 | .rows(rows) |
| 1325 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1326 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1327 | } |
| 1328 | } |
| 1329 | } |
| 1330 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1331 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_lt_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1332 | TEST_REQUIRES_ARM_NEON; |
| 1333 | for (size_t channels = 1; channels < 16; channels++) { |
| 1334 | GAvgPoolMicrokernelTester() |
| 1335 | .rows(7) |
| 1336 | .channels(channels) |
| 1337 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1338 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1339 | } |
| 1340 | } |
| 1341 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1342 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_lt_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1343 | TEST_REQUIRES_ARM_NEON; |
| 1344 | for (size_t channels = 1; channels < 16; channels++) { |
| 1345 | GAvgPoolMicrokernelTester() |
| 1346 | .rows(7) |
| 1347 | .channels(channels) |
| 1348 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1349 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1350 | } |
| 1351 | } |
| 1352 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1353 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_gt_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1354 | TEST_REQUIRES_ARM_NEON; |
| 1355 | for (size_t channels = 17; channels < 32; channels++) { |
| 1356 | GAvgPoolMicrokernelTester() |
| 1357 | .rows(7) |
| 1358 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1359 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1360 | } |
| 1361 | } |
| 1362 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1363 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_gt_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1364 | TEST_REQUIRES_ARM_NEON; |
| 1365 | for (size_t channels = 17; channels < 32; channels++) { |
| 1366 | for (size_t rows = 1; rows < 7; rows++) { |
| 1367 | GAvgPoolMicrokernelTester() |
| 1368 | .rows(rows) |
| 1369 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1370 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1371 | } |
| 1372 | } |
| 1373 | } |
| 1374 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1375 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_gt_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1376 | TEST_REQUIRES_ARM_NEON; |
| 1377 | for (size_t channels = 17; channels < 32; channels++) { |
| 1378 | GAvgPoolMicrokernelTester() |
| 1379 | .rows(7) |
| 1380 | .channels(channels) |
| 1381 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1382 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1383 | } |
| 1384 | } |
| 1385 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1386 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C16, channels_gt_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1387 | TEST_REQUIRES_ARM_NEON; |
| 1388 | for (size_t channels = 17; channels < 32; channels++) { |
| 1389 | GAvgPoolMicrokernelTester() |
| 1390 | .rows(7) |
| 1391 | .channels(channels) |
| 1392 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1393 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c16, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1394 | } |
| 1395 | } |
| 1396 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1397 | |
| 1398 | |
| 1399 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1400 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_eq_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1401 | TEST_REQUIRES_ARM_NEON; |
| 1402 | GAvgPoolMicrokernelTester() |
| 1403 | .rows(7) |
| 1404 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1405 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1406 | } |
| 1407 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1408 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_eq_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1409 | TEST_REQUIRES_ARM_NEON; |
| 1410 | for (size_t rows = 1; rows < 7; rows++) { |
| 1411 | GAvgPoolMicrokernelTester() |
| 1412 | .rows(rows) |
| 1413 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1414 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1415 | } |
| 1416 | } |
| 1417 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1418 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_eq_24_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1419 | TEST_REQUIRES_ARM_NEON; |
| 1420 | GAvgPoolMicrokernelTester() |
| 1421 | .rows(7) |
| 1422 | .channels(24) |
| 1423 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1424 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1425 | } |
| 1426 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1427 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_eq_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1428 | TEST_REQUIRES_ARM_NEON; |
| 1429 | GAvgPoolMicrokernelTester() |
| 1430 | .rows(7) |
| 1431 | .channels(24) |
| 1432 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1433 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1434 | } |
| 1435 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1436 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_eq_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1437 | TEST_REQUIRES_ARM_NEON; |
| 1438 | GAvgPoolMicrokernelTester() |
| 1439 | .rows(7) |
| 1440 | .channels(24) |
| 1441 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1442 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1443 | } |
| 1444 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1445 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_div_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1446 | TEST_REQUIRES_ARM_NEON; |
| 1447 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 1448 | GAvgPoolMicrokernelTester() |
| 1449 | .rows(7) |
| 1450 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1451 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1452 | } |
| 1453 | } |
| 1454 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1455 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_div_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1456 | TEST_REQUIRES_ARM_NEON; |
| 1457 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 1458 | for (size_t rows = 1; rows < 7; rows++) { |
| 1459 | GAvgPoolMicrokernelTester() |
| 1460 | .rows(rows) |
| 1461 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1462 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1463 | } |
| 1464 | } |
| 1465 | } |
| 1466 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1467 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_lt_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1468 | TEST_REQUIRES_ARM_NEON; |
| 1469 | for (size_t channels = 1; channels < 24; channels++) { |
| 1470 | GAvgPoolMicrokernelTester() |
| 1471 | .rows(7) |
| 1472 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1473 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1474 | } |
| 1475 | } |
| 1476 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1477 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_lt_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1478 | TEST_REQUIRES_ARM_NEON; |
| 1479 | for (size_t channels = 1; channels < 24; channels++) { |
| 1480 | for (size_t rows = 1; rows < 7; rows++) { |
| 1481 | GAvgPoolMicrokernelTester() |
| 1482 | .rows(rows) |
| 1483 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1484 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1485 | } |
| 1486 | } |
| 1487 | } |
| 1488 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1489 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_lt_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1490 | TEST_REQUIRES_ARM_NEON; |
| 1491 | for (size_t channels = 1; channels < 24; channels++) { |
| 1492 | GAvgPoolMicrokernelTester() |
| 1493 | .rows(7) |
| 1494 | .channels(channels) |
| 1495 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1496 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1497 | } |
| 1498 | } |
| 1499 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1500 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_lt_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1501 | TEST_REQUIRES_ARM_NEON; |
| 1502 | for (size_t channels = 1; channels < 24; channels++) { |
| 1503 | GAvgPoolMicrokernelTester() |
| 1504 | .rows(7) |
| 1505 | .channels(channels) |
| 1506 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1507 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1508 | } |
| 1509 | } |
| 1510 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1511 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_gt_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1512 | TEST_REQUIRES_ARM_NEON; |
| 1513 | for (size_t channels = 25; channels < 48; channels++) { |
| 1514 | GAvgPoolMicrokernelTester() |
| 1515 | .rows(7) |
| 1516 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1517 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1518 | } |
| 1519 | } |
| 1520 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1521 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_gt_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1522 | TEST_REQUIRES_ARM_NEON; |
| 1523 | for (size_t channels = 25; channels < 48; channels++) { |
| 1524 | for (size_t rows = 1; rows < 7; rows++) { |
| 1525 | GAvgPoolMicrokernelTester() |
| 1526 | .rows(rows) |
| 1527 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1528 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1529 | } |
| 1530 | } |
| 1531 | } |
| 1532 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1533 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_gt_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1534 | TEST_REQUIRES_ARM_NEON; |
| 1535 | for (size_t channels = 25; channels < 48; channels++) { |
| 1536 | GAvgPoolMicrokernelTester() |
| 1537 | .rows(7) |
| 1538 | .channels(channels) |
| 1539 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1540 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1541 | } |
| 1542 | } |
| 1543 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1544 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C24, channels_gt_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1545 | TEST_REQUIRES_ARM_NEON; |
| 1546 | for (size_t channels = 25; channels < 48; channels++) { |
| 1547 | GAvgPoolMicrokernelTester() |
| 1548 | .rows(7) |
| 1549 | .channels(channels) |
| 1550 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1551 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c24, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1552 | } |
| 1553 | } |
| 1554 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1555 | |
| 1556 | |
| 1557 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1558 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_eq_32_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1559 | TEST_REQUIRES_ARM_NEON; |
| 1560 | GAvgPoolMicrokernelTester() |
| 1561 | .rows(7) |
| 1562 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1563 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1564 | } |
| 1565 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1566 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_eq_32_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1567 | TEST_REQUIRES_ARM_NEON; |
| 1568 | for (size_t rows = 1; rows < 7; rows++) { |
| 1569 | GAvgPoolMicrokernelTester() |
| 1570 | .rows(rows) |
| 1571 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1572 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1573 | } |
| 1574 | } |
| 1575 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1576 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_eq_32_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1577 | TEST_REQUIRES_ARM_NEON; |
| 1578 | GAvgPoolMicrokernelTester() |
| 1579 | .rows(7) |
| 1580 | .channels(32) |
| 1581 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1582 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1583 | } |
| 1584 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1585 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_eq_32_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1586 | TEST_REQUIRES_ARM_NEON; |
| 1587 | GAvgPoolMicrokernelTester() |
| 1588 | .rows(7) |
| 1589 | .channels(32) |
| 1590 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1591 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1592 | } |
| 1593 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1594 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_eq_32_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1595 | TEST_REQUIRES_ARM_NEON; |
| 1596 | GAvgPoolMicrokernelTester() |
| 1597 | .rows(7) |
| 1598 | .channels(32) |
| 1599 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1600 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1601 | } |
| 1602 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1603 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_div_32_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1604 | TEST_REQUIRES_ARM_NEON; |
| 1605 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 1606 | GAvgPoolMicrokernelTester() |
| 1607 | .rows(7) |
| 1608 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1609 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1610 | } |
| 1611 | } |
| 1612 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1613 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_div_32_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1614 | TEST_REQUIRES_ARM_NEON; |
| 1615 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 1616 | for (size_t rows = 1; rows < 7; rows++) { |
| 1617 | GAvgPoolMicrokernelTester() |
| 1618 | .rows(rows) |
| 1619 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1620 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1621 | } |
| 1622 | } |
| 1623 | } |
| 1624 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1625 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_lt_32_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1626 | TEST_REQUIRES_ARM_NEON; |
| 1627 | for (size_t channels = 1; channels < 32; channels++) { |
| 1628 | GAvgPoolMicrokernelTester() |
| 1629 | .rows(7) |
| 1630 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1631 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1632 | } |
| 1633 | } |
| 1634 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1635 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_lt_32_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1636 | TEST_REQUIRES_ARM_NEON; |
| 1637 | for (size_t channels = 1; channels < 32; channels++) { |
| 1638 | for (size_t rows = 1; rows < 7; rows++) { |
| 1639 | GAvgPoolMicrokernelTester() |
| 1640 | .rows(rows) |
| 1641 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1642 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1643 | } |
| 1644 | } |
| 1645 | } |
| 1646 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1647 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_lt_32_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1648 | TEST_REQUIRES_ARM_NEON; |
| 1649 | for (size_t channels = 1; channels < 32; channels++) { |
| 1650 | GAvgPoolMicrokernelTester() |
| 1651 | .rows(7) |
| 1652 | .channels(channels) |
| 1653 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1654 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1655 | } |
| 1656 | } |
| 1657 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1658 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_lt_32_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1659 | TEST_REQUIRES_ARM_NEON; |
| 1660 | for (size_t channels = 1; channels < 32; channels++) { |
| 1661 | GAvgPoolMicrokernelTester() |
| 1662 | .rows(7) |
| 1663 | .channels(channels) |
| 1664 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1665 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1666 | } |
| 1667 | } |
| 1668 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1669 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_gt_32_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1670 | TEST_REQUIRES_ARM_NEON; |
| 1671 | for (size_t channels = 33; channels < 64; channels++) { |
| 1672 | GAvgPoolMicrokernelTester() |
| 1673 | .rows(7) |
| 1674 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1675 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1676 | } |
| 1677 | } |
| 1678 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1679 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_gt_32_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1680 | TEST_REQUIRES_ARM_NEON; |
| 1681 | for (size_t channels = 33; channels < 64; channels++) { |
| 1682 | for (size_t rows = 1; rows < 7; rows++) { |
| 1683 | GAvgPoolMicrokernelTester() |
| 1684 | .rows(rows) |
| 1685 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1686 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1687 | } |
| 1688 | } |
| 1689 | } |
| 1690 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1691 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_gt_32_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1692 | TEST_REQUIRES_ARM_NEON; |
| 1693 | for (size_t channels = 33; channels < 64; channels++) { |
| 1694 | GAvgPoolMicrokernelTester() |
| 1695 | .rows(7) |
| 1696 | .channels(channels) |
| 1697 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1698 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1699 | } |
| 1700 | } |
| 1701 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1702 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEON_C32, channels_gt_32_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1703 | TEST_REQUIRES_ARM_NEON; |
| 1704 | for (size_t channels = 33; channels < 64; channels++) { |
| 1705 | GAvgPoolMicrokernelTester() |
| 1706 | .rows(7) |
| 1707 | .channels(channels) |
| 1708 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1709 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neon_c32, xnn_init_qs8_avgpool_minmax_fp32_neon_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 1710 | } |
| 1711 | } |
| 1712 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1713 | |
| 1714 | |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1715 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1716 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_eq_8_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1717 | TEST_REQUIRES_ARM_NEON_V8; |
| 1718 | GAvgPoolMicrokernelTester() |
| 1719 | .rows(14) |
| 1720 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1721 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1722 | } |
| 1723 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1724 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_eq_8_2pass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1725 | TEST_REQUIRES_ARM_NEON_V8; |
| 1726 | GAvgPoolMicrokernelTester() |
| 1727 | .rows(14) |
| 1728 | .channels(8) |
| 1729 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1730 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1731 | } |
| 1732 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1733 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_eq_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1734 | TEST_REQUIRES_ARM_NEON_V8; |
| 1735 | GAvgPoolMicrokernelTester() |
| 1736 | .rows(14) |
| 1737 | .channels(8) |
| 1738 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1739 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1740 | } |
| 1741 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1742 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_eq_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1743 | TEST_REQUIRES_ARM_NEON_V8; |
| 1744 | GAvgPoolMicrokernelTester() |
| 1745 | .rows(14) |
| 1746 | .channels(8) |
| 1747 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1748 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1749 | } |
| 1750 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1751 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_eq_8_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1752 | TEST_REQUIRES_ARM_NEON_V8; |
| 1753 | for (size_t rows = 8; rows < 14; rows++) { |
| 1754 | GAvgPoolMicrokernelTester() |
| 1755 | .rows(rows) |
| 1756 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1757 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1758 | } |
| 1759 | } |
| 1760 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1761 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_eq_8_2pass_subtile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1762 | TEST_REQUIRES_ARM_NEON_V8; |
| 1763 | for (size_t rows = 8; rows < 14; rows++) { |
| 1764 | GAvgPoolMicrokernelTester() |
| 1765 | .rows(rows) |
| 1766 | .channels(8) |
| 1767 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1768 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1769 | } |
| 1770 | } |
| 1771 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1772 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_eq_8_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1773 | TEST_REQUIRES_ARM_NEON_V8; |
| 1774 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 1775 | GAvgPoolMicrokernelTester() |
| 1776 | .rows(rows) |
| 1777 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1778 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1779 | } |
| 1780 | } |
| 1781 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1782 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_eq_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1783 | TEST_REQUIRES_ARM_NEON_V8; |
| 1784 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 1785 | GAvgPoolMicrokernelTester() |
| 1786 | .rows(rows) |
| 1787 | .channels(8) |
| 1788 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1789 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1790 | } |
| 1791 | } |
| 1792 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1793 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_div_8_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1794 | TEST_REQUIRES_ARM_NEON_V8; |
| 1795 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 1796 | GAvgPoolMicrokernelTester() |
| 1797 | .rows(14) |
| 1798 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1799 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1800 | } |
| 1801 | } |
| 1802 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1803 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_div_8_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1804 | TEST_REQUIRES_ARM_NEON_V8; |
| 1805 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 1806 | for (size_t rows = 8; rows < 14; rows++) { |
| 1807 | GAvgPoolMicrokernelTester() |
| 1808 | .rows(rows) |
| 1809 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1810 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1811 | } |
| 1812 | } |
| 1813 | } |
| 1814 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1815 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_div_8_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1816 | TEST_REQUIRES_ARM_NEON_V8; |
| 1817 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 1818 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 1819 | GAvgPoolMicrokernelTester() |
| 1820 | .rows(rows) |
| 1821 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1822 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1823 | } |
| 1824 | } |
| 1825 | } |
| 1826 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1827 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_div_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1828 | TEST_REQUIRES_ARM_NEON_V8; |
| 1829 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 1830 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 1831 | GAvgPoolMicrokernelTester() |
| 1832 | .rows(rows) |
| 1833 | .channels(channels) |
| 1834 | .input_stride(131) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1835 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1836 | } |
| 1837 | } |
| 1838 | } |
| 1839 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1840 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_lt_8_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1841 | TEST_REQUIRES_ARM_NEON_V8; |
| 1842 | for (size_t channels = 1; channels < 8; channels++) { |
| 1843 | GAvgPoolMicrokernelTester() |
| 1844 | .rows(14) |
| 1845 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1846 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1847 | } |
| 1848 | } |
| 1849 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1850 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_lt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1851 | TEST_REQUIRES_ARM_NEON_V8; |
| 1852 | for (size_t channels = 1; channels < 8; channels++) { |
| 1853 | GAvgPoolMicrokernelTester() |
| 1854 | .rows(14) |
| 1855 | .channels(channels) |
| 1856 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1857 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1858 | } |
| 1859 | } |
| 1860 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1861 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_lt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1862 | TEST_REQUIRES_ARM_NEON_V8; |
| 1863 | for (size_t channels = 1; channels < 8; channels++) { |
| 1864 | GAvgPoolMicrokernelTester() |
| 1865 | .rows(14) |
| 1866 | .channels(channels) |
| 1867 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1868 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1869 | } |
| 1870 | } |
| 1871 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1872 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_lt_8_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1873 | TEST_REQUIRES_ARM_NEON_V8; |
| 1874 | for (size_t channels = 1; channels < 8; channels++) { |
| 1875 | for (size_t rows = 8; rows < 14; rows++) { |
| 1876 | GAvgPoolMicrokernelTester() |
| 1877 | .rows(rows) |
| 1878 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1879 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1880 | } |
| 1881 | } |
| 1882 | } |
| 1883 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1884 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_lt_8_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1885 | TEST_REQUIRES_ARM_NEON_V8; |
| 1886 | for (size_t channels = 1; channels < 8; channels++) { |
| 1887 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 1888 | GAvgPoolMicrokernelTester() |
| 1889 | .rows(rows) |
| 1890 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1891 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1892 | } |
| 1893 | } |
| 1894 | } |
| 1895 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1896 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_lt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1897 | TEST_REQUIRES_ARM_NEON_V8; |
| 1898 | for (size_t channels = 1; channels < 8; channels++) { |
| 1899 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 1900 | GAvgPoolMicrokernelTester() |
| 1901 | .rows(rows) |
| 1902 | .channels(channels) |
| 1903 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1904 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1905 | } |
| 1906 | } |
| 1907 | } |
| 1908 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1909 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_gt_8_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1910 | TEST_REQUIRES_ARM_NEON_V8; |
| 1911 | for (size_t channels = 9; channels < 16; channels++) { |
| 1912 | GAvgPoolMicrokernelTester() |
| 1913 | .rows(14) |
| 1914 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1915 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1916 | } |
| 1917 | } |
| 1918 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1919 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_gt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1920 | TEST_REQUIRES_ARM_NEON_V8; |
| 1921 | for (size_t channels = 9; channels < 16; channels++) { |
| 1922 | GAvgPoolMicrokernelTester() |
| 1923 | .rows(14) |
| 1924 | .channels(channels) |
| 1925 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1926 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1927 | } |
| 1928 | } |
| 1929 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1930 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_gt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1931 | TEST_REQUIRES_ARM_NEON_V8; |
| 1932 | for (size_t channels = 9; channels < 16; channels++) { |
| 1933 | GAvgPoolMicrokernelTester() |
| 1934 | .rows(14) |
| 1935 | .channels(channels) |
| 1936 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1937 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1938 | } |
| 1939 | } |
| 1940 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1941 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_gt_8_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1942 | TEST_REQUIRES_ARM_NEON_V8; |
| 1943 | for (size_t channels = 9; channels < 16; channels++) { |
| 1944 | for (size_t rows = 8; rows < 14; rows++) { |
| 1945 | GAvgPoolMicrokernelTester() |
| 1946 | .rows(rows) |
| 1947 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1948 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1949 | } |
| 1950 | } |
| 1951 | } |
| 1952 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1953 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_gt_8_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1954 | TEST_REQUIRES_ARM_NEON_V8; |
| 1955 | for (size_t channels = 9; channels < 16; channels++) { |
| 1956 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 1957 | GAvgPoolMicrokernelTester() |
| 1958 | .rows(rows) |
| 1959 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1960 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1961 | } |
| 1962 | } |
| 1963 | } |
| 1964 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1965 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C8, channels_gt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1966 | TEST_REQUIRES_ARM_NEON_V8; |
| 1967 | for (size_t channels = 9; channels < 16; channels++) { |
| 1968 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 1969 | GAvgPoolMicrokernelTester() |
| 1970 | .rows(rows) |
| 1971 | .channels(channels) |
| 1972 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1973 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1974 | } |
| 1975 | } |
| 1976 | } |
| 1977 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1978 | |
| 1979 | |
| 1980 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1981 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_eq_16_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1982 | TEST_REQUIRES_ARM_NEON_V8; |
| 1983 | GAvgPoolMicrokernelTester() |
| 1984 | .rows(14) |
| 1985 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1986 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1987 | } |
| 1988 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1989 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_eq_16_2pass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1990 | TEST_REQUIRES_ARM_NEON_V8; |
| 1991 | GAvgPoolMicrokernelTester() |
| 1992 | .rows(14) |
| 1993 | .channels(16) |
| 1994 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 1995 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1996 | } |
| 1997 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 1998 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_eq_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 1999 | TEST_REQUIRES_ARM_NEON_V8; |
| 2000 | GAvgPoolMicrokernelTester() |
| 2001 | .rows(14) |
| 2002 | .channels(16) |
| 2003 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2004 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2005 | } |
| 2006 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2007 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_eq_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2008 | TEST_REQUIRES_ARM_NEON_V8; |
| 2009 | GAvgPoolMicrokernelTester() |
| 2010 | .rows(14) |
| 2011 | .channels(16) |
| 2012 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2013 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2014 | } |
| 2015 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2016 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_eq_16_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2017 | TEST_REQUIRES_ARM_NEON_V8; |
| 2018 | for (size_t rows = 8; rows < 14; rows++) { |
| 2019 | GAvgPoolMicrokernelTester() |
| 2020 | .rows(rows) |
| 2021 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2022 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2023 | } |
| 2024 | } |
| 2025 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2026 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_eq_16_2pass_subtile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2027 | TEST_REQUIRES_ARM_NEON_V8; |
| 2028 | for (size_t rows = 8; rows < 14; rows++) { |
| 2029 | GAvgPoolMicrokernelTester() |
| 2030 | .rows(rows) |
| 2031 | .channels(16) |
| 2032 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2033 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2034 | } |
| 2035 | } |
| 2036 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2037 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_eq_16_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2038 | TEST_REQUIRES_ARM_NEON_V8; |
| 2039 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2040 | GAvgPoolMicrokernelTester() |
| 2041 | .rows(rows) |
| 2042 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2043 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2044 | } |
| 2045 | } |
| 2046 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2047 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_eq_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2048 | TEST_REQUIRES_ARM_NEON_V8; |
| 2049 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2050 | GAvgPoolMicrokernelTester() |
| 2051 | .rows(rows) |
| 2052 | .channels(16) |
| 2053 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2054 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2055 | } |
| 2056 | } |
| 2057 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2058 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_div_16_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2059 | TEST_REQUIRES_ARM_NEON_V8; |
| 2060 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 2061 | GAvgPoolMicrokernelTester() |
| 2062 | .rows(14) |
| 2063 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2064 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2065 | } |
| 2066 | } |
| 2067 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2068 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_div_16_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2069 | TEST_REQUIRES_ARM_NEON_V8; |
| 2070 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 2071 | for (size_t rows = 8; rows < 14; rows++) { |
| 2072 | GAvgPoolMicrokernelTester() |
| 2073 | .rows(rows) |
| 2074 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2075 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2076 | } |
| 2077 | } |
| 2078 | } |
| 2079 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2080 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_div_16_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2081 | TEST_REQUIRES_ARM_NEON_V8; |
| 2082 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 2083 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2084 | GAvgPoolMicrokernelTester() |
| 2085 | .rows(rows) |
| 2086 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2087 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2088 | } |
| 2089 | } |
| 2090 | } |
| 2091 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2092 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_div_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2093 | TEST_REQUIRES_ARM_NEON_V8; |
| 2094 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 2095 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2096 | GAvgPoolMicrokernelTester() |
| 2097 | .rows(rows) |
| 2098 | .channels(channels) |
| 2099 | .input_stride(263) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2100 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2101 | } |
| 2102 | } |
| 2103 | } |
| 2104 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2105 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_lt_16_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2106 | TEST_REQUIRES_ARM_NEON_V8; |
| 2107 | for (size_t channels = 1; channels < 16; channels++) { |
| 2108 | GAvgPoolMicrokernelTester() |
| 2109 | .rows(14) |
| 2110 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2111 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2112 | } |
| 2113 | } |
| 2114 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2115 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_lt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2116 | TEST_REQUIRES_ARM_NEON_V8; |
| 2117 | for (size_t channels = 1; channels < 16; channels++) { |
| 2118 | GAvgPoolMicrokernelTester() |
| 2119 | .rows(14) |
| 2120 | .channels(channels) |
| 2121 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2122 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2123 | } |
| 2124 | } |
| 2125 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2126 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_lt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2127 | TEST_REQUIRES_ARM_NEON_V8; |
| 2128 | for (size_t channels = 1; channels < 16; channels++) { |
| 2129 | GAvgPoolMicrokernelTester() |
| 2130 | .rows(14) |
| 2131 | .channels(channels) |
| 2132 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2133 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2134 | } |
| 2135 | } |
| 2136 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2137 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_lt_16_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2138 | TEST_REQUIRES_ARM_NEON_V8; |
| 2139 | for (size_t channels = 1; channels < 16; channels++) { |
| 2140 | for (size_t rows = 8; rows < 14; rows++) { |
| 2141 | GAvgPoolMicrokernelTester() |
| 2142 | .rows(rows) |
| 2143 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2144 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2145 | } |
| 2146 | } |
| 2147 | } |
| 2148 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2149 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_lt_16_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2150 | TEST_REQUIRES_ARM_NEON_V8; |
| 2151 | for (size_t channels = 1; channels < 16; channels++) { |
| 2152 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2153 | GAvgPoolMicrokernelTester() |
| 2154 | .rows(rows) |
| 2155 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2156 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2157 | } |
| 2158 | } |
| 2159 | } |
| 2160 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2161 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_lt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2162 | TEST_REQUIRES_ARM_NEON_V8; |
| 2163 | for (size_t channels = 1; channels < 16; channels++) { |
| 2164 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2165 | GAvgPoolMicrokernelTester() |
| 2166 | .rows(rows) |
| 2167 | .channels(channels) |
| 2168 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2169 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2170 | } |
| 2171 | } |
| 2172 | } |
| 2173 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2174 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_gt_16_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2175 | TEST_REQUIRES_ARM_NEON_V8; |
| 2176 | for (size_t channels = 17; channels < 32; channels++) { |
| 2177 | GAvgPoolMicrokernelTester() |
| 2178 | .rows(14) |
| 2179 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2180 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2181 | } |
| 2182 | } |
| 2183 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2184 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_gt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2185 | TEST_REQUIRES_ARM_NEON_V8; |
| 2186 | for (size_t channels = 17; channels < 32; channels++) { |
| 2187 | GAvgPoolMicrokernelTester() |
| 2188 | .rows(14) |
| 2189 | .channels(channels) |
| 2190 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2191 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2192 | } |
| 2193 | } |
| 2194 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2195 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_gt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2196 | TEST_REQUIRES_ARM_NEON_V8; |
| 2197 | for (size_t channels = 17; channels < 32; channels++) { |
| 2198 | GAvgPoolMicrokernelTester() |
| 2199 | .rows(14) |
| 2200 | .channels(channels) |
| 2201 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2202 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2203 | } |
| 2204 | } |
| 2205 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2206 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_gt_16_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2207 | TEST_REQUIRES_ARM_NEON_V8; |
| 2208 | for (size_t channels = 17; channels < 32; channels++) { |
| 2209 | for (size_t rows = 8; rows < 14; rows++) { |
| 2210 | GAvgPoolMicrokernelTester() |
| 2211 | .rows(rows) |
| 2212 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2213 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2214 | } |
| 2215 | } |
| 2216 | } |
| 2217 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2218 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_gt_16_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2219 | TEST_REQUIRES_ARM_NEON_V8; |
| 2220 | for (size_t channels = 17; channels < 32; channels++) { |
| 2221 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 2222 | GAvgPoolMicrokernelTester() |
| 2223 | .rows(rows) |
| 2224 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2225 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2226 | } |
| 2227 | } |
| 2228 | } |
| 2229 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2230 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C16, channels_gt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2231 | TEST_REQUIRES_ARM_NEON_V8; |
| 2232 | for (size_t channels = 17; channels < 32; channels++) { |
| 2233 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 2234 | GAvgPoolMicrokernelTester() |
| 2235 | .rows(rows) |
| 2236 | .channels(channels) |
| 2237 | .input_stride(47) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2238 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2239 | } |
| 2240 | } |
| 2241 | } |
| 2242 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2243 | |
| 2244 | |
| 2245 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2246 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_eq_24_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2247 | TEST_REQUIRES_ARM_NEON_V8; |
| 2248 | GAvgPoolMicrokernelTester() |
| 2249 | .rows(14) |
| 2250 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2251 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2252 | } |
| 2253 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2254 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_eq_24_2pass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2255 | TEST_REQUIRES_ARM_NEON_V8; |
| 2256 | GAvgPoolMicrokernelTester() |
| 2257 | .rows(14) |
| 2258 | .channels(24) |
| 2259 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2260 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2261 | } |
| 2262 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2263 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_eq_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2264 | TEST_REQUIRES_ARM_NEON_V8; |
| 2265 | GAvgPoolMicrokernelTester() |
| 2266 | .rows(14) |
| 2267 | .channels(24) |
| 2268 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2269 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2270 | } |
| 2271 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2272 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_eq_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2273 | TEST_REQUIRES_ARM_NEON_V8; |
| 2274 | GAvgPoolMicrokernelTester() |
| 2275 | .rows(14) |
| 2276 | .channels(24) |
| 2277 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2278 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2279 | } |
| 2280 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2281 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_eq_24_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2282 | TEST_REQUIRES_ARM_NEON_V8; |
| 2283 | for (size_t rows = 8; rows < 14; rows++) { |
| 2284 | GAvgPoolMicrokernelTester() |
| 2285 | .rows(rows) |
| 2286 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2287 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2288 | } |
| 2289 | } |
| 2290 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2291 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_eq_24_2pass_subtile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2292 | TEST_REQUIRES_ARM_NEON_V8; |
| 2293 | for (size_t rows = 8; rows < 14; rows++) { |
| 2294 | GAvgPoolMicrokernelTester() |
| 2295 | .rows(rows) |
| 2296 | .channels(24) |
| 2297 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2298 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2299 | } |
| 2300 | } |
| 2301 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2302 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_eq_24_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2303 | TEST_REQUIRES_ARM_NEON_V8; |
| 2304 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2305 | GAvgPoolMicrokernelTester() |
| 2306 | .rows(rows) |
| 2307 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2308 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2309 | } |
| 2310 | } |
| 2311 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2312 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_eq_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2313 | TEST_REQUIRES_ARM_NEON_V8; |
| 2314 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2315 | GAvgPoolMicrokernelTester() |
| 2316 | .rows(rows) |
| 2317 | .channels(24) |
| 2318 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2319 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2320 | } |
| 2321 | } |
| 2322 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2323 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_div_24_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2324 | TEST_REQUIRES_ARM_NEON_V8; |
| 2325 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 2326 | GAvgPoolMicrokernelTester() |
| 2327 | .rows(14) |
| 2328 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2329 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2330 | } |
| 2331 | } |
| 2332 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2333 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_div_24_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2334 | TEST_REQUIRES_ARM_NEON_V8; |
| 2335 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 2336 | for (size_t rows = 8; rows < 14; rows++) { |
| 2337 | GAvgPoolMicrokernelTester() |
| 2338 | .rows(rows) |
| 2339 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2340 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2341 | } |
| 2342 | } |
| 2343 | } |
| 2344 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2345 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_div_24_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2346 | TEST_REQUIRES_ARM_NEON_V8; |
| 2347 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 2348 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2349 | GAvgPoolMicrokernelTester() |
| 2350 | .rows(rows) |
| 2351 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2352 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2353 | } |
| 2354 | } |
| 2355 | } |
| 2356 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2357 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_div_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2358 | TEST_REQUIRES_ARM_NEON_V8; |
| 2359 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 2360 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2361 | GAvgPoolMicrokernelTester() |
| 2362 | .rows(rows) |
| 2363 | .channels(channels) |
| 2364 | .input_stride(389) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2365 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2366 | } |
| 2367 | } |
| 2368 | } |
| 2369 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2370 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_lt_24_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2371 | TEST_REQUIRES_ARM_NEON_V8; |
| 2372 | for (size_t channels = 1; channels < 24; channels++) { |
| 2373 | GAvgPoolMicrokernelTester() |
| 2374 | .rows(14) |
| 2375 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2376 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2377 | } |
| 2378 | } |
| 2379 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2380 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_lt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2381 | TEST_REQUIRES_ARM_NEON_V8; |
| 2382 | for (size_t channels = 1; channels < 24; channels++) { |
| 2383 | GAvgPoolMicrokernelTester() |
| 2384 | .rows(14) |
| 2385 | .channels(channels) |
| 2386 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2387 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2388 | } |
| 2389 | } |
| 2390 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2391 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_lt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2392 | TEST_REQUIRES_ARM_NEON_V8; |
| 2393 | for (size_t channels = 1; channels < 24; channels++) { |
| 2394 | GAvgPoolMicrokernelTester() |
| 2395 | .rows(14) |
| 2396 | .channels(channels) |
| 2397 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2398 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2399 | } |
| 2400 | } |
| 2401 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2402 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_lt_24_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2403 | TEST_REQUIRES_ARM_NEON_V8; |
| 2404 | for (size_t channels = 1; channels < 24; channels++) { |
| 2405 | for (size_t rows = 8; rows < 14; rows++) { |
| 2406 | GAvgPoolMicrokernelTester() |
| 2407 | .rows(rows) |
| 2408 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2409 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2410 | } |
| 2411 | } |
| 2412 | } |
| 2413 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2414 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_lt_24_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2415 | TEST_REQUIRES_ARM_NEON_V8; |
| 2416 | for (size_t channels = 1; channels < 24; channels++) { |
| 2417 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2418 | GAvgPoolMicrokernelTester() |
| 2419 | .rows(rows) |
| 2420 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2421 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2422 | } |
| 2423 | } |
| 2424 | } |
| 2425 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2426 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_lt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2427 | TEST_REQUIRES_ARM_NEON_V8; |
| 2428 | for (size_t channels = 1; channels < 24; channels++) { |
| 2429 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2430 | GAvgPoolMicrokernelTester() |
| 2431 | .rows(rows) |
| 2432 | .channels(channels) |
| 2433 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2434 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2435 | } |
| 2436 | } |
| 2437 | } |
| 2438 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2439 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_gt_24_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2440 | TEST_REQUIRES_ARM_NEON_V8; |
| 2441 | for (size_t channels = 25; channels < 48; channels++) { |
| 2442 | GAvgPoolMicrokernelTester() |
| 2443 | .rows(14) |
| 2444 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2445 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2446 | } |
| 2447 | } |
| 2448 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2449 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_gt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2450 | TEST_REQUIRES_ARM_NEON_V8; |
| 2451 | for (size_t channels = 25; channels < 48; channels++) { |
| 2452 | GAvgPoolMicrokernelTester() |
| 2453 | .rows(14) |
| 2454 | .channels(channels) |
| 2455 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2456 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2457 | } |
| 2458 | } |
| 2459 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2460 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_gt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2461 | TEST_REQUIRES_ARM_NEON_V8; |
| 2462 | for (size_t channels = 25; channels < 48; channels++) { |
| 2463 | GAvgPoolMicrokernelTester() |
| 2464 | .rows(14) |
| 2465 | .channels(channels) |
| 2466 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2467 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2468 | } |
| 2469 | } |
| 2470 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2471 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_gt_24_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2472 | TEST_REQUIRES_ARM_NEON_V8; |
| 2473 | for (size_t channels = 25; channels < 48; channels++) { |
| 2474 | for (size_t rows = 8; rows < 14; rows++) { |
| 2475 | GAvgPoolMicrokernelTester() |
| 2476 | .rows(rows) |
| 2477 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2478 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2479 | } |
| 2480 | } |
| 2481 | } |
| 2482 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2483 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_gt_24_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2484 | TEST_REQUIRES_ARM_NEON_V8; |
| 2485 | for (size_t channels = 25; channels < 48; channels++) { |
| 2486 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 2487 | GAvgPoolMicrokernelTester() |
| 2488 | .rows(rows) |
| 2489 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2490 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2491 | } |
| 2492 | } |
| 2493 | } |
| 2494 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2495 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C24, channels_gt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2496 | TEST_REQUIRES_ARM_NEON_V8; |
| 2497 | for (size_t channels = 25; channels < 48; channels++) { |
| 2498 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 2499 | GAvgPoolMicrokernelTester() |
| 2500 | .rows(rows) |
| 2501 | .channels(channels) |
| 2502 | .input_stride(61) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2503 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2504 | } |
| 2505 | } |
| 2506 | } |
| 2507 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2508 | |
| 2509 | |
| 2510 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2511 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_eq_32_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2512 | TEST_REQUIRES_ARM_NEON_V8; |
| 2513 | GAvgPoolMicrokernelTester() |
| 2514 | .rows(14) |
| 2515 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2516 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2517 | } |
| 2518 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2519 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_eq_32_2pass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2520 | TEST_REQUIRES_ARM_NEON_V8; |
| 2521 | GAvgPoolMicrokernelTester() |
| 2522 | .rows(14) |
| 2523 | .channels(32) |
| 2524 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2525 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2526 | } |
| 2527 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2528 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_eq_32_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2529 | TEST_REQUIRES_ARM_NEON_V8; |
| 2530 | GAvgPoolMicrokernelTester() |
| 2531 | .rows(14) |
| 2532 | .channels(32) |
| 2533 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2534 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2535 | } |
| 2536 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2537 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_eq_32_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2538 | TEST_REQUIRES_ARM_NEON_V8; |
| 2539 | GAvgPoolMicrokernelTester() |
| 2540 | .rows(14) |
| 2541 | .channels(32) |
| 2542 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2543 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2544 | } |
| 2545 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2546 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_eq_32_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2547 | TEST_REQUIRES_ARM_NEON_V8; |
| 2548 | for (size_t rows = 8; rows < 14; rows++) { |
| 2549 | GAvgPoolMicrokernelTester() |
| 2550 | .rows(rows) |
| 2551 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2552 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2553 | } |
| 2554 | } |
| 2555 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2556 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_eq_32_2pass_subtile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2557 | TEST_REQUIRES_ARM_NEON_V8; |
| 2558 | for (size_t rows = 8; rows < 14; rows++) { |
| 2559 | GAvgPoolMicrokernelTester() |
| 2560 | .rows(rows) |
| 2561 | .channels(32) |
| 2562 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2563 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2564 | } |
| 2565 | } |
| 2566 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2567 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_eq_32_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2568 | TEST_REQUIRES_ARM_NEON_V8; |
| 2569 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2570 | GAvgPoolMicrokernelTester() |
| 2571 | .rows(rows) |
| 2572 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2573 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2574 | } |
| 2575 | } |
| 2576 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2577 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_eq_32_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2578 | TEST_REQUIRES_ARM_NEON_V8; |
| 2579 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2580 | GAvgPoolMicrokernelTester() |
| 2581 | .rows(rows) |
| 2582 | .channels(32) |
| 2583 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2584 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2585 | } |
| 2586 | } |
| 2587 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2588 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_div_32_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2589 | TEST_REQUIRES_ARM_NEON_V8; |
| 2590 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 2591 | GAvgPoolMicrokernelTester() |
| 2592 | .rows(14) |
| 2593 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2594 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2595 | } |
| 2596 | } |
| 2597 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2598 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_div_32_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2599 | TEST_REQUIRES_ARM_NEON_V8; |
| 2600 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 2601 | for (size_t rows = 8; rows < 14; rows++) { |
| 2602 | GAvgPoolMicrokernelTester() |
| 2603 | .rows(rows) |
| 2604 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2605 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2606 | } |
| 2607 | } |
| 2608 | } |
| 2609 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2610 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_div_32_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2611 | TEST_REQUIRES_ARM_NEON_V8; |
| 2612 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 2613 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2614 | GAvgPoolMicrokernelTester() |
| 2615 | .rows(rows) |
| 2616 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2617 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2618 | } |
| 2619 | } |
| 2620 | } |
| 2621 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2622 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_div_32_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2623 | TEST_REQUIRES_ARM_NEON_V8; |
| 2624 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 2625 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2626 | GAvgPoolMicrokernelTester() |
| 2627 | .rows(rows) |
| 2628 | .channels(channels) |
| 2629 | .input_stride(521) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2630 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2631 | } |
| 2632 | } |
| 2633 | } |
| 2634 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2635 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_lt_32_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2636 | TEST_REQUIRES_ARM_NEON_V8; |
| 2637 | for (size_t channels = 1; channels < 32; channels++) { |
| 2638 | GAvgPoolMicrokernelTester() |
| 2639 | .rows(14) |
| 2640 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2641 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2642 | } |
| 2643 | } |
| 2644 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2645 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_lt_32_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2646 | TEST_REQUIRES_ARM_NEON_V8; |
| 2647 | for (size_t channels = 1; channels < 32; channels++) { |
| 2648 | GAvgPoolMicrokernelTester() |
| 2649 | .rows(14) |
| 2650 | .channels(channels) |
| 2651 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2652 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2653 | } |
| 2654 | } |
| 2655 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2656 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_lt_32_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2657 | TEST_REQUIRES_ARM_NEON_V8; |
| 2658 | for (size_t channels = 1; channels < 32; channels++) { |
| 2659 | GAvgPoolMicrokernelTester() |
| 2660 | .rows(14) |
| 2661 | .channels(channels) |
| 2662 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2663 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2664 | } |
| 2665 | } |
| 2666 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2667 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_lt_32_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2668 | TEST_REQUIRES_ARM_NEON_V8; |
| 2669 | for (size_t channels = 1; channels < 32; channels++) { |
| 2670 | for (size_t rows = 8; rows < 14; rows++) { |
| 2671 | GAvgPoolMicrokernelTester() |
| 2672 | .rows(rows) |
| 2673 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2674 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2675 | } |
| 2676 | } |
| 2677 | } |
| 2678 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2679 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_lt_32_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2680 | TEST_REQUIRES_ARM_NEON_V8; |
| 2681 | for (size_t channels = 1; channels < 32; channels++) { |
| 2682 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2683 | GAvgPoolMicrokernelTester() |
| 2684 | .rows(rows) |
| 2685 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2686 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2687 | } |
| 2688 | } |
| 2689 | } |
| 2690 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2691 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_lt_32_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2692 | TEST_REQUIRES_ARM_NEON_V8; |
| 2693 | for (size_t channels = 1; channels < 32; channels++) { |
| 2694 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 2695 | GAvgPoolMicrokernelTester() |
| 2696 | .rows(rows) |
| 2697 | .channels(channels) |
| 2698 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2699 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2700 | } |
| 2701 | } |
| 2702 | } |
| 2703 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2704 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_gt_32_2pass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2705 | TEST_REQUIRES_ARM_NEON_V8; |
| 2706 | for (size_t channels = 33; channels < 64; channels++) { |
| 2707 | GAvgPoolMicrokernelTester() |
| 2708 | .rows(14) |
| 2709 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2710 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2711 | } |
| 2712 | } |
| 2713 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2714 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_gt_32_2pass_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2715 | TEST_REQUIRES_ARM_NEON_V8; |
| 2716 | for (size_t channels = 33; channels < 64; channels++) { |
| 2717 | GAvgPoolMicrokernelTester() |
| 2718 | .rows(14) |
| 2719 | .channels(channels) |
| 2720 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2721 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2722 | } |
| 2723 | } |
| 2724 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2725 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_gt_32_2pass_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2726 | TEST_REQUIRES_ARM_NEON_V8; |
| 2727 | for (size_t channels = 33; channels < 64; channels++) { |
| 2728 | GAvgPoolMicrokernelTester() |
| 2729 | .rows(14) |
| 2730 | .channels(channels) |
| 2731 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2732 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2733 | } |
| 2734 | } |
| 2735 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2736 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_gt_32_2pass_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2737 | TEST_REQUIRES_ARM_NEON_V8; |
| 2738 | for (size_t channels = 33; channels < 64; channels++) { |
| 2739 | for (size_t rows = 8; rows < 14; rows++) { |
| 2740 | GAvgPoolMicrokernelTester() |
| 2741 | .rows(rows) |
| 2742 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2743 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2744 | } |
| 2745 | } |
| 2746 | } |
| 2747 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2748 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_gt_32_multipass_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2749 | TEST_REQUIRES_ARM_NEON_V8; |
| 2750 | for (size_t channels = 33; channels < 64; channels++) { |
| 2751 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 2752 | GAvgPoolMicrokernelTester() |
| 2753 | .rows(rows) |
| 2754 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2755 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2756 | } |
| 2757 | } |
| 2758 | } |
| 2759 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2760 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__NEONV8_C32, channels_gt_32_multipass_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2761 | TEST_REQUIRES_ARM_NEON_V8; |
| 2762 | for (size_t channels = 33; channels < 64; channels++) { |
| 2763 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 2764 | GAvgPoolMicrokernelTester() |
| 2765 | .rows(rows) |
| 2766 | .channels(channels) |
| 2767 | .input_stride(79) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2768 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2769 | } |
| 2770 | } |
| 2771 | } |
| 2772 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2773 | |
| 2774 | |
| 2775 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2776 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_eq_8_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2777 | TEST_REQUIRES_ARM_NEON_V8; |
| 2778 | GAvgPoolMicrokernelTester() |
| 2779 | .rows(7) |
| 2780 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2781 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2782 | } |
| 2783 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2784 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_eq_8_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2785 | TEST_REQUIRES_ARM_NEON_V8; |
| 2786 | for (size_t rows = 1; rows < 7; rows++) { |
| 2787 | GAvgPoolMicrokernelTester() |
| 2788 | .rows(rows) |
| 2789 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2790 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2791 | } |
| 2792 | } |
| 2793 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2794 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_eq_8_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2795 | TEST_REQUIRES_ARM_NEON_V8; |
| 2796 | GAvgPoolMicrokernelTester() |
| 2797 | .rows(7) |
| 2798 | .channels(8) |
| 2799 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2800 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2801 | } |
| 2802 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2803 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_eq_8_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2804 | TEST_REQUIRES_ARM_NEON_V8; |
| 2805 | GAvgPoolMicrokernelTester() |
| 2806 | .rows(7) |
| 2807 | .channels(8) |
| 2808 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2809 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2810 | } |
| 2811 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2812 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_eq_8_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2813 | TEST_REQUIRES_ARM_NEON_V8; |
| 2814 | GAvgPoolMicrokernelTester() |
| 2815 | .rows(7) |
| 2816 | .channels(8) |
| 2817 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2818 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2819 | } |
| 2820 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2821 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_div_8_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2822 | TEST_REQUIRES_ARM_NEON_V8; |
| 2823 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 2824 | GAvgPoolMicrokernelTester() |
| 2825 | .rows(7) |
| 2826 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2827 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2828 | } |
| 2829 | } |
| 2830 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2831 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_div_8_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2832 | TEST_REQUIRES_ARM_NEON_V8; |
| 2833 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 2834 | for (size_t rows = 1; rows < 7; rows++) { |
| 2835 | GAvgPoolMicrokernelTester() |
| 2836 | .rows(rows) |
| 2837 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2838 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2839 | } |
| 2840 | } |
| 2841 | } |
| 2842 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2843 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_lt_8_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2844 | TEST_REQUIRES_ARM_NEON_V8; |
| 2845 | for (size_t channels = 1; channels < 8; channels++) { |
| 2846 | GAvgPoolMicrokernelTester() |
| 2847 | .rows(7) |
| 2848 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2849 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2850 | } |
| 2851 | } |
| 2852 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2853 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_lt_8_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2854 | TEST_REQUIRES_ARM_NEON_V8; |
| 2855 | for (size_t channels = 1; channels < 8; channels++) { |
| 2856 | for (size_t rows = 1; rows < 7; rows++) { |
| 2857 | GAvgPoolMicrokernelTester() |
| 2858 | .rows(rows) |
| 2859 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2860 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2861 | } |
| 2862 | } |
| 2863 | } |
| 2864 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2865 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_lt_8_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2866 | TEST_REQUIRES_ARM_NEON_V8; |
| 2867 | for (size_t channels = 1; channels < 8; channels++) { |
| 2868 | GAvgPoolMicrokernelTester() |
| 2869 | .rows(7) |
| 2870 | .channels(channels) |
| 2871 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2872 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2873 | } |
| 2874 | } |
| 2875 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2876 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_lt_8_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2877 | TEST_REQUIRES_ARM_NEON_V8; |
| 2878 | for (size_t channels = 1; channels < 8; channels++) { |
| 2879 | GAvgPoolMicrokernelTester() |
| 2880 | .rows(7) |
| 2881 | .channels(channels) |
| 2882 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2883 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2884 | } |
| 2885 | } |
| 2886 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2887 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_gt_8_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2888 | TEST_REQUIRES_ARM_NEON_V8; |
| 2889 | for (size_t channels = 9; channels < 16; channels++) { |
| 2890 | GAvgPoolMicrokernelTester() |
| 2891 | .rows(7) |
| 2892 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2893 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2894 | } |
| 2895 | } |
| 2896 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2897 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_gt_8_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2898 | TEST_REQUIRES_ARM_NEON_V8; |
| 2899 | for (size_t channels = 9; channels < 16; channels++) { |
| 2900 | for (size_t rows = 1; rows < 7; rows++) { |
| 2901 | GAvgPoolMicrokernelTester() |
| 2902 | .rows(rows) |
| 2903 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2904 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2905 | } |
| 2906 | } |
| 2907 | } |
| 2908 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2909 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_gt_8_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2910 | TEST_REQUIRES_ARM_NEON_V8; |
| 2911 | for (size_t channels = 9; channels < 16; channels++) { |
| 2912 | GAvgPoolMicrokernelTester() |
| 2913 | .rows(7) |
| 2914 | .channels(channels) |
| 2915 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2916 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2917 | } |
| 2918 | } |
| 2919 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2920 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C8, channels_gt_8_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2921 | TEST_REQUIRES_ARM_NEON_V8; |
| 2922 | for (size_t channels = 9; channels < 16; channels++) { |
| 2923 | GAvgPoolMicrokernelTester() |
| 2924 | .rows(7) |
| 2925 | .channels(channels) |
| 2926 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2927 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2928 | } |
| 2929 | } |
| 2930 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2931 | |
| 2932 | |
| 2933 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2934 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_eq_16_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2935 | TEST_REQUIRES_ARM_NEON_V8; |
| 2936 | GAvgPoolMicrokernelTester() |
| 2937 | .rows(7) |
| 2938 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2939 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2940 | } |
| 2941 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2942 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_eq_16_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2943 | TEST_REQUIRES_ARM_NEON_V8; |
| 2944 | for (size_t rows = 1; rows < 7; rows++) { |
| 2945 | GAvgPoolMicrokernelTester() |
| 2946 | .rows(rows) |
| 2947 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2948 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2949 | } |
| 2950 | } |
| 2951 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2952 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_eq_16_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2953 | TEST_REQUIRES_ARM_NEON_V8; |
| 2954 | GAvgPoolMicrokernelTester() |
| 2955 | .rows(7) |
| 2956 | .channels(16) |
| 2957 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2958 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2959 | } |
| 2960 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2961 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_eq_16_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2962 | TEST_REQUIRES_ARM_NEON_V8; |
| 2963 | GAvgPoolMicrokernelTester() |
| 2964 | .rows(7) |
| 2965 | .channels(16) |
| 2966 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2967 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2968 | } |
| 2969 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2970 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_eq_16_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2971 | TEST_REQUIRES_ARM_NEON_V8; |
| 2972 | GAvgPoolMicrokernelTester() |
| 2973 | .rows(7) |
| 2974 | .channels(16) |
| 2975 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2976 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2977 | } |
| 2978 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2979 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_div_16_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2980 | TEST_REQUIRES_ARM_NEON_V8; |
| 2981 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 2982 | GAvgPoolMicrokernelTester() |
| 2983 | .rows(7) |
| 2984 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2985 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2986 | } |
| 2987 | } |
| 2988 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 2989 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_div_16_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2990 | TEST_REQUIRES_ARM_NEON_V8; |
| 2991 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 2992 | for (size_t rows = 1; rows < 7; rows++) { |
| 2993 | GAvgPoolMicrokernelTester() |
| 2994 | .rows(rows) |
| 2995 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 2996 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 2997 | } |
| 2998 | } |
| 2999 | } |
| 3000 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3001 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_lt_16_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3002 | TEST_REQUIRES_ARM_NEON_V8; |
| 3003 | for (size_t channels = 1; channels < 16; channels++) { |
| 3004 | GAvgPoolMicrokernelTester() |
| 3005 | .rows(7) |
| 3006 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3007 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3008 | } |
| 3009 | } |
| 3010 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3011 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_lt_16_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3012 | TEST_REQUIRES_ARM_NEON_V8; |
| 3013 | for (size_t channels = 1; channels < 16; channels++) { |
| 3014 | for (size_t rows = 1; rows < 7; rows++) { |
| 3015 | GAvgPoolMicrokernelTester() |
| 3016 | .rows(rows) |
| 3017 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3018 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3019 | } |
| 3020 | } |
| 3021 | } |
| 3022 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3023 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_lt_16_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3024 | TEST_REQUIRES_ARM_NEON_V8; |
| 3025 | for (size_t channels = 1; channels < 16; channels++) { |
| 3026 | GAvgPoolMicrokernelTester() |
| 3027 | .rows(7) |
| 3028 | .channels(channels) |
| 3029 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3030 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3031 | } |
| 3032 | } |
| 3033 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3034 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_lt_16_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3035 | TEST_REQUIRES_ARM_NEON_V8; |
| 3036 | for (size_t channels = 1; channels < 16; channels++) { |
| 3037 | GAvgPoolMicrokernelTester() |
| 3038 | .rows(7) |
| 3039 | .channels(channels) |
| 3040 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3041 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3042 | } |
| 3043 | } |
| 3044 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3045 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_gt_16_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3046 | TEST_REQUIRES_ARM_NEON_V8; |
| 3047 | for (size_t channels = 17; channels < 32; channels++) { |
| 3048 | GAvgPoolMicrokernelTester() |
| 3049 | .rows(7) |
| 3050 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3051 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3052 | } |
| 3053 | } |
| 3054 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3055 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_gt_16_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3056 | TEST_REQUIRES_ARM_NEON_V8; |
| 3057 | for (size_t channels = 17; channels < 32; channels++) { |
| 3058 | for (size_t rows = 1; rows < 7; rows++) { |
| 3059 | GAvgPoolMicrokernelTester() |
| 3060 | .rows(rows) |
| 3061 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3062 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3063 | } |
| 3064 | } |
| 3065 | } |
| 3066 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3067 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_gt_16_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3068 | TEST_REQUIRES_ARM_NEON_V8; |
| 3069 | for (size_t channels = 17; channels < 32; channels++) { |
| 3070 | GAvgPoolMicrokernelTester() |
| 3071 | .rows(7) |
| 3072 | .channels(channels) |
| 3073 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3074 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3075 | } |
| 3076 | } |
| 3077 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3078 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C16, channels_gt_16_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3079 | TEST_REQUIRES_ARM_NEON_V8; |
| 3080 | for (size_t channels = 17; channels < 32; channels++) { |
| 3081 | GAvgPoolMicrokernelTester() |
| 3082 | .rows(7) |
| 3083 | .channels(channels) |
| 3084 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3085 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3086 | } |
| 3087 | } |
| 3088 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 3089 | |
| 3090 | |
| 3091 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3092 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_eq_24_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3093 | TEST_REQUIRES_ARM_NEON_V8; |
| 3094 | GAvgPoolMicrokernelTester() |
| 3095 | .rows(7) |
| 3096 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3097 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3098 | } |
| 3099 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3100 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_eq_24_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3101 | TEST_REQUIRES_ARM_NEON_V8; |
| 3102 | for (size_t rows = 1; rows < 7; rows++) { |
| 3103 | GAvgPoolMicrokernelTester() |
| 3104 | .rows(rows) |
| 3105 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3106 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3107 | } |
| 3108 | } |
| 3109 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3110 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_eq_24_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3111 | TEST_REQUIRES_ARM_NEON_V8; |
| 3112 | GAvgPoolMicrokernelTester() |
| 3113 | .rows(7) |
| 3114 | .channels(24) |
| 3115 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3116 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3117 | } |
| 3118 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3119 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_eq_24_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3120 | TEST_REQUIRES_ARM_NEON_V8; |
| 3121 | GAvgPoolMicrokernelTester() |
| 3122 | .rows(7) |
| 3123 | .channels(24) |
| 3124 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3125 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3126 | } |
| 3127 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3128 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_eq_24_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3129 | TEST_REQUIRES_ARM_NEON_V8; |
| 3130 | GAvgPoolMicrokernelTester() |
| 3131 | .rows(7) |
| 3132 | .channels(24) |
| 3133 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3134 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3135 | } |
| 3136 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3137 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_div_24_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3138 | TEST_REQUIRES_ARM_NEON_V8; |
| 3139 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 3140 | GAvgPoolMicrokernelTester() |
| 3141 | .rows(7) |
| 3142 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3143 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3144 | } |
| 3145 | } |
| 3146 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3147 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_div_24_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3148 | TEST_REQUIRES_ARM_NEON_V8; |
| 3149 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 3150 | for (size_t rows = 1; rows < 7; rows++) { |
| 3151 | GAvgPoolMicrokernelTester() |
| 3152 | .rows(rows) |
| 3153 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3154 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3155 | } |
| 3156 | } |
| 3157 | } |
| 3158 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3159 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_lt_24_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3160 | TEST_REQUIRES_ARM_NEON_V8; |
| 3161 | for (size_t channels = 1; channels < 24; channels++) { |
| 3162 | GAvgPoolMicrokernelTester() |
| 3163 | .rows(7) |
| 3164 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3165 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3166 | } |
| 3167 | } |
| 3168 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3169 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_lt_24_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3170 | TEST_REQUIRES_ARM_NEON_V8; |
| 3171 | for (size_t channels = 1; channels < 24; channels++) { |
| 3172 | for (size_t rows = 1; rows < 7; rows++) { |
| 3173 | GAvgPoolMicrokernelTester() |
| 3174 | .rows(rows) |
| 3175 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3176 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3177 | } |
| 3178 | } |
| 3179 | } |
| 3180 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3181 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_lt_24_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3182 | TEST_REQUIRES_ARM_NEON_V8; |
| 3183 | for (size_t channels = 1; channels < 24; channels++) { |
| 3184 | GAvgPoolMicrokernelTester() |
| 3185 | .rows(7) |
| 3186 | .channels(channels) |
| 3187 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3188 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3189 | } |
| 3190 | } |
| 3191 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3192 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_lt_24_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3193 | TEST_REQUIRES_ARM_NEON_V8; |
| 3194 | for (size_t channels = 1; channels < 24; channels++) { |
| 3195 | GAvgPoolMicrokernelTester() |
| 3196 | .rows(7) |
| 3197 | .channels(channels) |
| 3198 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3199 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3200 | } |
| 3201 | } |
| 3202 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3203 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_gt_24_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3204 | TEST_REQUIRES_ARM_NEON_V8; |
| 3205 | for (size_t channels = 25; channels < 48; channels++) { |
| 3206 | GAvgPoolMicrokernelTester() |
| 3207 | .rows(7) |
| 3208 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3209 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3210 | } |
| 3211 | } |
| 3212 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3213 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_gt_24_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3214 | TEST_REQUIRES_ARM_NEON_V8; |
| 3215 | for (size_t channels = 25; channels < 48; channels++) { |
| 3216 | for (size_t rows = 1; rows < 7; rows++) { |
| 3217 | GAvgPoolMicrokernelTester() |
| 3218 | .rows(rows) |
| 3219 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3220 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3221 | } |
| 3222 | } |
| 3223 | } |
| 3224 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3225 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_gt_24_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3226 | TEST_REQUIRES_ARM_NEON_V8; |
| 3227 | for (size_t channels = 25; channels < 48; channels++) { |
| 3228 | GAvgPoolMicrokernelTester() |
| 3229 | .rows(7) |
| 3230 | .channels(channels) |
| 3231 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3232 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3233 | } |
| 3234 | } |
| 3235 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3236 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C24, channels_gt_24_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3237 | TEST_REQUIRES_ARM_NEON_V8; |
| 3238 | for (size_t channels = 25; channels < 48; channels++) { |
| 3239 | GAvgPoolMicrokernelTester() |
| 3240 | .rows(7) |
| 3241 | .channels(channels) |
| 3242 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3243 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c24, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3244 | } |
| 3245 | } |
| 3246 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 3247 | |
| 3248 | |
| 3249 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3250 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_eq_32_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3251 | TEST_REQUIRES_ARM_NEON_V8; |
| 3252 | GAvgPoolMicrokernelTester() |
| 3253 | .rows(7) |
| 3254 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3255 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3256 | } |
| 3257 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3258 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_eq_32_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3259 | TEST_REQUIRES_ARM_NEON_V8; |
| 3260 | for (size_t rows = 1; rows < 7; rows++) { |
| 3261 | GAvgPoolMicrokernelTester() |
| 3262 | .rows(rows) |
| 3263 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3264 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3265 | } |
| 3266 | } |
| 3267 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3268 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_eq_32_fulltile_with_input_stride) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3269 | TEST_REQUIRES_ARM_NEON_V8; |
| 3270 | GAvgPoolMicrokernelTester() |
| 3271 | .rows(7) |
| 3272 | .channels(32) |
| 3273 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3274 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3275 | } |
| 3276 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3277 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_eq_32_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3278 | TEST_REQUIRES_ARM_NEON_V8; |
| 3279 | GAvgPoolMicrokernelTester() |
| 3280 | .rows(7) |
| 3281 | .channels(32) |
| 3282 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3283 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3284 | } |
| 3285 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3286 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_eq_32_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3287 | TEST_REQUIRES_ARM_NEON_V8; |
| 3288 | GAvgPoolMicrokernelTester() |
| 3289 | .rows(7) |
| 3290 | .channels(32) |
| 3291 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3292 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3293 | } |
| 3294 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3295 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_div_32_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3296 | TEST_REQUIRES_ARM_NEON_V8; |
| 3297 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 3298 | GAvgPoolMicrokernelTester() |
| 3299 | .rows(7) |
| 3300 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3301 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3302 | } |
| 3303 | } |
| 3304 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3305 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_div_32_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3306 | TEST_REQUIRES_ARM_NEON_V8; |
| 3307 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 3308 | for (size_t rows = 1; rows < 7; rows++) { |
| 3309 | GAvgPoolMicrokernelTester() |
| 3310 | .rows(rows) |
| 3311 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3312 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3313 | } |
| 3314 | } |
| 3315 | } |
| 3316 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3317 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_lt_32_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3318 | TEST_REQUIRES_ARM_NEON_V8; |
| 3319 | for (size_t channels = 1; channels < 32; channels++) { |
| 3320 | GAvgPoolMicrokernelTester() |
| 3321 | .rows(7) |
| 3322 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3323 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3324 | } |
| 3325 | } |
| 3326 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3327 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_lt_32_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3328 | TEST_REQUIRES_ARM_NEON_V8; |
| 3329 | for (size_t channels = 1; channels < 32; channels++) { |
| 3330 | for (size_t rows = 1; rows < 7; rows++) { |
| 3331 | GAvgPoolMicrokernelTester() |
| 3332 | .rows(rows) |
| 3333 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3334 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3335 | } |
| 3336 | } |
| 3337 | } |
| 3338 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3339 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_lt_32_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3340 | TEST_REQUIRES_ARM_NEON_V8; |
| 3341 | for (size_t channels = 1; channels < 32; channels++) { |
| 3342 | GAvgPoolMicrokernelTester() |
| 3343 | .rows(7) |
| 3344 | .channels(channels) |
| 3345 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3346 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3347 | } |
| 3348 | } |
| 3349 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3350 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_lt_32_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3351 | TEST_REQUIRES_ARM_NEON_V8; |
| 3352 | for (size_t channels = 1; channels < 32; channels++) { |
| 3353 | GAvgPoolMicrokernelTester() |
| 3354 | .rows(7) |
| 3355 | .channels(channels) |
| 3356 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3357 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3358 | } |
| 3359 | } |
| 3360 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3361 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_gt_32_fulltile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3362 | TEST_REQUIRES_ARM_NEON_V8; |
| 3363 | for (size_t channels = 33; channels < 64; channels++) { |
| 3364 | GAvgPoolMicrokernelTester() |
| 3365 | .rows(7) |
| 3366 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3367 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3368 | } |
| 3369 | } |
| 3370 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3371 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_gt_32_subtile) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3372 | TEST_REQUIRES_ARM_NEON_V8; |
| 3373 | for (size_t channels = 33; channels < 64; channels++) { |
| 3374 | for (size_t rows = 1; rows < 7; rows++) { |
| 3375 | GAvgPoolMicrokernelTester() |
| 3376 | .rows(rows) |
| 3377 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3378 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3379 | } |
| 3380 | } |
| 3381 | } |
| 3382 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3383 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_gt_32_fulltile_with_qmax) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3384 | TEST_REQUIRES_ARM_NEON_V8; |
| 3385 | for (size_t channels = 33; channels < 64; channels++) { |
| 3386 | GAvgPoolMicrokernelTester() |
| 3387 | .rows(7) |
| 3388 | .channels(channels) |
| 3389 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3390 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3391 | } |
| 3392 | } |
| 3393 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3394 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__NEONV8_C32, channels_gt_32_fulltile_with_qmin) { |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3395 | TEST_REQUIRES_ARM_NEON_V8; |
| 3396 | for (size_t channels = 33; channels < 64; channels++) { |
| 3397 | GAvgPoolMicrokernelTester() |
| 3398 | .rows(7) |
| 3399 | .channels(channels) |
| 3400 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3401 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c32, xnn_init_qs8_avgpool_minmax_fp32_neonv8_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 3402 | } |
| 3403 | } |
| 3404 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 3405 | |
| 3406 | |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3407 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3408 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3409 | TEST_REQUIRES_X86_SSE2; |
| 3410 | GAvgPoolMicrokernelTester() |
| 3411 | .rows(14) |
| 3412 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3413 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3414 | } |
| 3415 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3416 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3417 | TEST_REQUIRES_X86_SSE2; |
| 3418 | GAvgPoolMicrokernelTester() |
| 3419 | .rows(14) |
| 3420 | .channels(8) |
| 3421 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3422 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3423 | } |
| 3424 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3425 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3426 | TEST_REQUIRES_X86_SSE2; |
| 3427 | GAvgPoolMicrokernelTester() |
| 3428 | .rows(14) |
| 3429 | .channels(8) |
| 3430 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3431 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3432 | } |
| 3433 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3434 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3435 | TEST_REQUIRES_X86_SSE2; |
| 3436 | GAvgPoolMicrokernelTester() |
| 3437 | .rows(14) |
| 3438 | .channels(8) |
| 3439 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3440 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3441 | } |
| 3442 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3443 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_eq_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3444 | TEST_REQUIRES_X86_SSE2; |
| 3445 | for (size_t rows = 8; rows < 14; rows++) { |
| 3446 | GAvgPoolMicrokernelTester() |
| 3447 | .rows(rows) |
| 3448 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3449 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3450 | } |
| 3451 | } |
| 3452 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3453 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_eq_8_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3454 | TEST_REQUIRES_X86_SSE2; |
| 3455 | for (size_t rows = 8; rows < 14; rows++) { |
| 3456 | GAvgPoolMicrokernelTester() |
| 3457 | .rows(rows) |
| 3458 | .channels(8) |
| 3459 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3460 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3461 | } |
| 3462 | } |
| 3463 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3464 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_eq_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3465 | TEST_REQUIRES_X86_SSE2; |
| 3466 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3467 | GAvgPoolMicrokernelTester() |
| 3468 | .rows(rows) |
| 3469 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3470 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3471 | } |
| 3472 | } |
| 3473 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3474 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_eq_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3475 | TEST_REQUIRES_X86_SSE2; |
| 3476 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3477 | GAvgPoolMicrokernelTester() |
| 3478 | .rows(rows) |
| 3479 | .channels(8) |
| 3480 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3481 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3482 | } |
| 3483 | } |
| 3484 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3485 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_div_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3486 | TEST_REQUIRES_X86_SSE2; |
| 3487 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 3488 | GAvgPoolMicrokernelTester() |
| 3489 | .rows(14) |
| 3490 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3491 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3492 | } |
| 3493 | } |
| 3494 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3495 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_div_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3496 | TEST_REQUIRES_X86_SSE2; |
| 3497 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 3498 | for (size_t rows = 8; rows < 14; rows++) { |
| 3499 | GAvgPoolMicrokernelTester() |
| 3500 | .rows(rows) |
| 3501 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3502 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3503 | } |
| 3504 | } |
| 3505 | } |
| 3506 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3507 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_div_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3508 | TEST_REQUIRES_X86_SSE2; |
| 3509 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 3510 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3511 | GAvgPoolMicrokernelTester() |
| 3512 | .rows(rows) |
| 3513 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3514 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3515 | } |
| 3516 | } |
| 3517 | } |
| 3518 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3519 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_div_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3520 | TEST_REQUIRES_X86_SSE2; |
| 3521 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 3522 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3523 | GAvgPoolMicrokernelTester() |
| 3524 | .rows(rows) |
| 3525 | .channels(channels) |
| 3526 | .input_stride(131) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3527 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3528 | } |
| 3529 | } |
| 3530 | } |
| 3531 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3532 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3533 | TEST_REQUIRES_X86_SSE2; |
| 3534 | for (size_t channels = 1; channels < 8; channels++) { |
| 3535 | GAvgPoolMicrokernelTester() |
| 3536 | .rows(14) |
| 3537 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3538 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3539 | } |
| 3540 | } |
| 3541 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3542 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3543 | TEST_REQUIRES_X86_SSE2; |
| 3544 | for (size_t channels = 1; channels < 8; channels++) { |
| 3545 | GAvgPoolMicrokernelTester() |
| 3546 | .rows(14) |
| 3547 | .channels(channels) |
| 3548 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3549 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3550 | } |
| 3551 | } |
| 3552 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3553 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3554 | TEST_REQUIRES_X86_SSE2; |
| 3555 | for (size_t channels = 1; channels < 8; channels++) { |
| 3556 | GAvgPoolMicrokernelTester() |
| 3557 | .rows(14) |
| 3558 | .channels(channels) |
| 3559 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3560 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3561 | } |
| 3562 | } |
| 3563 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3564 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_lt_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3565 | TEST_REQUIRES_X86_SSE2; |
| 3566 | for (size_t channels = 1; channels < 8; channels++) { |
| 3567 | for (size_t rows = 8; rows < 14; rows++) { |
| 3568 | GAvgPoolMicrokernelTester() |
| 3569 | .rows(rows) |
| 3570 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3571 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3572 | } |
| 3573 | } |
| 3574 | } |
| 3575 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3576 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_lt_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3577 | TEST_REQUIRES_X86_SSE2; |
| 3578 | for (size_t channels = 1; channels < 8; channels++) { |
| 3579 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3580 | GAvgPoolMicrokernelTester() |
| 3581 | .rows(rows) |
| 3582 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3583 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3584 | } |
| 3585 | } |
| 3586 | } |
| 3587 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3588 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_lt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3589 | TEST_REQUIRES_X86_SSE2; |
| 3590 | for (size_t channels = 1; channels < 8; channels++) { |
| 3591 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3592 | GAvgPoolMicrokernelTester() |
| 3593 | .rows(rows) |
| 3594 | .channels(channels) |
| 3595 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3596 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3597 | } |
| 3598 | } |
| 3599 | } |
| 3600 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3601 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3602 | TEST_REQUIRES_X86_SSE2; |
| 3603 | for (size_t channels = 9; channels < 16; channels++) { |
| 3604 | GAvgPoolMicrokernelTester() |
| 3605 | .rows(14) |
| 3606 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3607 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3608 | } |
| 3609 | } |
| 3610 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3611 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3612 | TEST_REQUIRES_X86_SSE2; |
| 3613 | for (size_t channels = 9; channels < 16; channels++) { |
| 3614 | GAvgPoolMicrokernelTester() |
| 3615 | .rows(14) |
| 3616 | .channels(channels) |
| 3617 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3618 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3619 | } |
| 3620 | } |
| 3621 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3622 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3623 | TEST_REQUIRES_X86_SSE2; |
| 3624 | for (size_t channels = 9; channels < 16; channels++) { |
| 3625 | GAvgPoolMicrokernelTester() |
| 3626 | .rows(14) |
| 3627 | .channels(channels) |
| 3628 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3629 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3630 | } |
| 3631 | } |
| 3632 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3633 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_gt_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3634 | TEST_REQUIRES_X86_SSE2; |
| 3635 | for (size_t channels = 9; channels < 16; channels++) { |
| 3636 | for (size_t rows = 8; rows < 14; rows++) { |
| 3637 | GAvgPoolMicrokernelTester() |
| 3638 | .rows(rows) |
| 3639 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3640 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3641 | } |
| 3642 | } |
| 3643 | } |
| 3644 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3645 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_gt_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3646 | TEST_REQUIRES_X86_SSE2; |
| 3647 | for (size_t channels = 9; channels < 16; channels++) { |
| 3648 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 3649 | GAvgPoolMicrokernelTester() |
| 3650 | .rows(rows) |
| 3651 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3652 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3653 | } |
| 3654 | } |
| 3655 | } |
| 3656 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3657 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C8, channels_gt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3658 | TEST_REQUIRES_X86_SSE2; |
| 3659 | for (size_t channels = 9; channels < 16; channels++) { |
| 3660 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 3661 | GAvgPoolMicrokernelTester() |
| 3662 | .rows(rows) |
| 3663 | .channels(channels) |
| 3664 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3665 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3666 | } |
| 3667 | } |
| 3668 | } |
| 3669 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3670 | |
| 3671 | |
| 3672 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3673 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_eq_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3674 | TEST_REQUIRES_X86_SSE2; |
| 3675 | GAvgPoolMicrokernelTester() |
| 3676 | .rows(14) |
| 3677 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3678 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3679 | } |
| 3680 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3681 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_eq_16_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3682 | TEST_REQUIRES_X86_SSE2; |
| 3683 | GAvgPoolMicrokernelTester() |
| 3684 | .rows(14) |
| 3685 | .channels(16) |
| 3686 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3687 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3688 | } |
| 3689 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3690 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_eq_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3691 | TEST_REQUIRES_X86_SSE2; |
| 3692 | GAvgPoolMicrokernelTester() |
| 3693 | .rows(14) |
| 3694 | .channels(16) |
| 3695 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3696 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3697 | } |
| 3698 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3699 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_eq_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3700 | TEST_REQUIRES_X86_SSE2; |
| 3701 | GAvgPoolMicrokernelTester() |
| 3702 | .rows(14) |
| 3703 | .channels(16) |
| 3704 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3705 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3706 | } |
| 3707 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3708 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_eq_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3709 | TEST_REQUIRES_X86_SSE2; |
| 3710 | for (size_t rows = 8; rows < 14; rows++) { |
| 3711 | GAvgPoolMicrokernelTester() |
| 3712 | .rows(rows) |
| 3713 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3714 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3715 | } |
| 3716 | } |
| 3717 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3718 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_eq_16_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3719 | TEST_REQUIRES_X86_SSE2; |
| 3720 | for (size_t rows = 8; rows < 14; rows++) { |
| 3721 | GAvgPoolMicrokernelTester() |
| 3722 | .rows(rows) |
| 3723 | .channels(16) |
| 3724 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3725 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3726 | } |
| 3727 | } |
| 3728 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3729 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_eq_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3730 | TEST_REQUIRES_X86_SSE2; |
| 3731 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3732 | GAvgPoolMicrokernelTester() |
| 3733 | .rows(rows) |
| 3734 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3735 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3736 | } |
| 3737 | } |
| 3738 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3739 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_eq_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3740 | TEST_REQUIRES_X86_SSE2; |
| 3741 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3742 | GAvgPoolMicrokernelTester() |
| 3743 | .rows(rows) |
| 3744 | .channels(16) |
| 3745 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3746 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3747 | } |
| 3748 | } |
| 3749 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3750 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_div_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3751 | TEST_REQUIRES_X86_SSE2; |
| 3752 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 3753 | GAvgPoolMicrokernelTester() |
| 3754 | .rows(14) |
| 3755 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3756 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3757 | } |
| 3758 | } |
| 3759 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3760 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_div_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3761 | TEST_REQUIRES_X86_SSE2; |
| 3762 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 3763 | for (size_t rows = 8; rows < 14; rows++) { |
| 3764 | GAvgPoolMicrokernelTester() |
| 3765 | .rows(rows) |
| 3766 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3767 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3768 | } |
| 3769 | } |
| 3770 | } |
| 3771 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3772 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_div_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3773 | TEST_REQUIRES_X86_SSE2; |
| 3774 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 3775 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3776 | GAvgPoolMicrokernelTester() |
| 3777 | .rows(rows) |
| 3778 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3779 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3780 | } |
| 3781 | } |
| 3782 | } |
| 3783 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3784 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_div_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3785 | TEST_REQUIRES_X86_SSE2; |
| 3786 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 3787 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3788 | GAvgPoolMicrokernelTester() |
| 3789 | .rows(rows) |
| 3790 | .channels(channels) |
| 3791 | .input_stride(263) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3792 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3793 | } |
| 3794 | } |
| 3795 | } |
| 3796 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3797 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_lt_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3798 | TEST_REQUIRES_X86_SSE2; |
| 3799 | for (size_t channels = 1; channels < 16; channels++) { |
| 3800 | GAvgPoolMicrokernelTester() |
| 3801 | .rows(14) |
| 3802 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3803 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3804 | } |
| 3805 | } |
| 3806 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3807 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_lt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3808 | TEST_REQUIRES_X86_SSE2; |
| 3809 | for (size_t channels = 1; channels < 16; channels++) { |
| 3810 | GAvgPoolMicrokernelTester() |
| 3811 | .rows(14) |
| 3812 | .channels(channels) |
| 3813 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3814 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3815 | } |
| 3816 | } |
| 3817 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3818 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_lt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3819 | TEST_REQUIRES_X86_SSE2; |
| 3820 | for (size_t channels = 1; channels < 16; channels++) { |
| 3821 | GAvgPoolMicrokernelTester() |
| 3822 | .rows(14) |
| 3823 | .channels(channels) |
| 3824 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3825 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3826 | } |
| 3827 | } |
| 3828 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3829 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_lt_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3830 | TEST_REQUIRES_X86_SSE2; |
| 3831 | for (size_t channels = 1; channels < 16; channels++) { |
| 3832 | for (size_t rows = 8; rows < 14; rows++) { |
| 3833 | GAvgPoolMicrokernelTester() |
| 3834 | .rows(rows) |
| 3835 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3836 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3837 | } |
| 3838 | } |
| 3839 | } |
| 3840 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3841 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_lt_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3842 | TEST_REQUIRES_X86_SSE2; |
| 3843 | for (size_t channels = 1; channels < 16; channels++) { |
| 3844 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3845 | GAvgPoolMicrokernelTester() |
| 3846 | .rows(rows) |
| 3847 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3848 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3849 | } |
| 3850 | } |
| 3851 | } |
| 3852 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3853 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_lt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3854 | TEST_REQUIRES_X86_SSE2; |
| 3855 | for (size_t channels = 1; channels < 16; channels++) { |
| 3856 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3857 | GAvgPoolMicrokernelTester() |
| 3858 | .rows(rows) |
| 3859 | .channels(channels) |
| 3860 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3861 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3862 | } |
| 3863 | } |
| 3864 | } |
| 3865 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3866 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_gt_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3867 | TEST_REQUIRES_X86_SSE2; |
| 3868 | for (size_t channels = 17; channels < 32; channels++) { |
| 3869 | GAvgPoolMicrokernelTester() |
| 3870 | .rows(14) |
| 3871 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3872 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3873 | } |
| 3874 | } |
| 3875 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3876 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_gt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3877 | TEST_REQUIRES_X86_SSE2; |
| 3878 | for (size_t channels = 17; channels < 32; channels++) { |
| 3879 | GAvgPoolMicrokernelTester() |
| 3880 | .rows(14) |
| 3881 | .channels(channels) |
| 3882 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3883 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3884 | } |
| 3885 | } |
| 3886 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3887 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_gt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3888 | TEST_REQUIRES_X86_SSE2; |
| 3889 | for (size_t channels = 17; channels < 32; channels++) { |
| 3890 | GAvgPoolMicrokernelTester() |
| 3891 | .rows(14) |
| 3892 | .channels(channels) |
| 3893 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3894 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3895 | } |
| 3896 | } |
| 3897 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3898 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_gt_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3899 | TEST_REQUIRES_X86_SSE2; |
| 3900 | for (size_t channels = 17; channels < 32; channels++) { |
| 3901 | for (size_t rows = 8; rows < 14; rows++) { |
| 3902 | GAvgPoolMicrokernelTester() |
| 3903 | .rows(rows) |
| 3904 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3905 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3906 | } |
| 3907 | } |
| 3908 | } |
| 3909 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3910 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_gt_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3911 | TEST_REQUIRES_X86_SSE2; |
| 3912 | for (size_t channels = 17; channels < 32; channels++) { |
| 3913 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 3914 | GAvgPoolMicrokernelTester() |
| 3915 | .rows(rows) |
| 3916 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3917 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3918 | } |
| 3919 | } |
| 3920 | } |
| 3921 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3922 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C16, channels_gt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3923 | TEST_REQUIRES_X86_SSE2; |
| 3924 | for (size_t channels = 17; channels < 32; channels++) { |
| 3925 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 3926 | GAvgPoolMicrokernelTester() |
| 3927 | .rows(rows) |
| 3928 | .channels(channels) |
| 3929 | .input_stride(47) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3930 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3931 | } |
| 3932 | } |
| 3933 | } |
| 3934 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3935 | |
| 3936 | |
| 3937 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3938 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_eq_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3939 | TEST_REQUIRES_X86_SSE2; |
| 3940 | GAvgPoolMicrokernelTester() |
| 3941 | .rows(14) |
| 3942 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3943 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3944 | } |
| 3945 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3946 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_eq_24_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3947 | TEST_REQUIRES_X86_SSE2; |
| 3948 | GAvgPoolMicrokernelTester() |
| 3949 | .rows(14) |
| 3950 | .channels(24) |
| 3951 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3952 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3953 | } |
| 3954 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3955 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_eq_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3956 | TEST_REQUIRES_X86_SSE2; |
| 3957 | GAvgPoolMicrokernelTester() |
| 3958 | .rows(14) |
| 3959 | .channels(24) |
| 3960 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3961 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3962 | } |
| 3963 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3964 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_eq_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3965 | TEST_REQUIRES_X86_SSE2; |
| 3966 | GAvgPoolMicrokernelTester() |
| 3967 | .rows(14) |
| 3968 | .channels(24) |
| 3969 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3970 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3971 | } |
| 3972 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3973 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_eq_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3974 | TEST_REQUIRES_X86_SSE2; |
| 3975 | for (size_t rows = 8; rows < 14; rows++) { |
| 3976 | GAvgPoolMicrokernelTester() |
| 3977 | .rows(rows) |
| 3978 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3979 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3980 | } |
| 3981 | } |
| 3982 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3983 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_eq_24_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3984 | TEST_REQUIRES_X86_SSE2; |
| 3985 | for (size_t rows = 8; rows < 14; rows++) { |
| 3986 | GAvgPoolMicrokernelTester() |
| 3987 | .rows(rows) |
| 3988 | .channels(24) |
| 3989 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 3990 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3991 | } |
| 3992 | } |
| 3993 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 3994 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_eq_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 3995 | TEST_REQUIRES_X86_SSE2; |
| 3996 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 3997 | GAvgPoolMicrokernelTester() |
| 3998 | .rows(rows) |
| 3999 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4000 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4001 | } |
| 4002 | } |
| 4003 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4004 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_eq_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4005 | TEST_REQUIRES_X86_SSE2; |
| 4006 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4007 | GAvgPoolMicrokernelTester() |
| 4008 | .rows(rows) |
| 4009 | .channels(24) |
| 4010 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4011 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4012 | } |
| 4013 | } |
| 4014 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4015 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_div_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4016 | TEST_REQUIRES_X86_SSE2; |
| 4017 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 4018 | GAvgPoolMicrokernelTester() |
| 4019 | .rows(14) |
| 4020 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4021 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4022 | } |
| 4023 | } |
| 4024 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4025 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_div_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4026 | TEST_REQUIRES_X86_SSE2; |
| 4027 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 4028 | for (size_t rows = 8; rows < 14; rows++) { |
| 4029 | GAvgPoolMicrokernelTester() |
| 4030 | .rows(rows) |
| 4031 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4032 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4033 | } |
| 4034 | } |
| 4035 | } |
| 4036 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4037 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_div_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4038 | TEST_REQUIRES_X86_SSE2; |
| 4039 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 4040 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4041 | GAvgPoolMicrokernelTester() |
| 4042 | .rows(rows) |
| 4043 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4044 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4045 | } |
| 4046 | } |
| 4047 | } |
| 4048 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4049 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_div_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4050 | TEST_REQUIRES_X86_SSE2; |
| 4051 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 4052 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4053 | GAvgPoolMicrokernelTester() |
| 4054 | .rows(rows) |
| 4055 | .channels(channels) |
| 4056 | .input_stride(389) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4057 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4058 | } |
| 4059 | } |
| 4060 | } |
| 4061 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4062 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_lt_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4063 | TEST_REQUIRES_X86_SSE2; |
| 4064 | for (size_t channels = 1; channels < 24; channels++) { |
| 4065 | GAvgPoolMicrokernelTester() |
| 4066 | .rows(14) |
| 4067 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4068 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4069 | } |
| 4070 | } |
| 4071 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4072 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_lt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4073 | TEST_REQUIRES_X86_SSE2; |
| 4074 | for (size_t channels = 1; channels < 24; channels++) { |
| 4075 | GAvgPoolMicrokernelTester() |
| 4076 | .rows(14) |
| 4077 | .channels(channels) |
| 4078 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4079 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4080 | } |
| 4081 | } |
| 4082 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4083 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_lt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4084 | TEST_REQUIRES_X86_SSE2; |
| 4085 | for (size_t channels = 1; channels < 24; channels++) { |
| 4086 | GAvgPoolMicrokernelTester() |
| 4087 | .rows(14) |
| 4088 | .channels(channels) |
| 4089 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4090 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4091 | } |
| 4092 | } |
| 4093 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4094 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_lt_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4095 | TEST_REQUIRES_X86_SSE2; |
| 4096 | for (size_t channels = 1; channels < 24; channels++) { |
| 4097 | for (size_t rows = 8; rows < 14; rows++) { |
| 4098 | GAvgPoolMicrokernelTester() |
| 4099 | .rows(rows) |
| 4100 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4101 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4102 | } |
| 4103 | } |
| 4104 | } |
| 4105 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4106 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_lt_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4107 | TEST_REQUIRES_X86_SSE2; |
| 4108 | for (size_t channels = 1; channels < 24; channels++) { |
| 4109 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4110 | GAvgPoolMicrokernelTester() |
| 4111 | .rows(rows) |
| 4112 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4113 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4114 | } |
| 4115 | } |
| 4116 | } |
| 4117 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4118 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_lt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4119 | TEST_REQUIRES_X86_SSE2; |
| 4120 | for (size_t channels = 1; channels < 24; channels++) { |
| 4121 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4122 | GAvgPoolMicrokernelTester() |
| 4123 | .rows(rows) |
| 4124 | .channels(channels) |
| 4125 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4126 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4127 | } |
| 4128 | } |
| 4129 | } |
| 4130 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4131 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_gt_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4132 | TEST_REQUIRES_X86_SSE2; |
| 4133 | for (size_t channels = 25; channels < 48; channels++) { |
| 4134 | GAvgPoolMicrokernelTester() |
| 4135 | .rows(14) |
| 4136 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4137 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4138 | } |
| 4139 | } |
| 4140 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4141 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_gt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4142 | TEST_REQUIRES_X86_SSE2; |
| 4143 | for (size_t channels = 25; channels < 48; channels++) { |
| 4144 | GAvgPoolMicrokernelTester() |
| 4145 | .rows(14) |
| 4146 | .channels(channels) |
| 4147 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4148 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4149 | } |
| 4150 | } |
| 4151 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4152 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_gt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4153 | TEST_REQUIRES_X86_SSE2; |
| 4154 | for (size_t channels = 25; channels < 48; channels++) { |
| 4155 | GAvgPoolMicrokernelTester() |
| 4156 | .rows(14) |
| 4157 | .channels(channels) |
| 4158 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4159 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4160 | } |
| 4161 | } |
| 4162 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4163 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_gt_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4164 | TEST_REQUIRES_X86_SSE2; |
| 4165 | for (size_t channels = 25; channels < 48; channels++) { |
| 4166 | for (size_t rows = 8; rows < 14; rows++) { |
| 4167 | GAvgPoolMicrokernelTester() |
| 4168 | .rows(rows) |
| 4169 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4170 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4171 | } |
| 4172 | } |
| 4173 | } |
| 4174 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4175 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_gt_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4176 | TEST_REQUIRES_X86_SSE2; |
| 4177 | for (size_t channels = 25; channels < 48; channels++) { |
| 4178 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 4179 | GAvgPoolMicrokernelTester() |
| 4180 | .rows(rows) |
| 4181 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4182 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4183 | } |
| 4184 | } |
| 4185 | } |
| 4186 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4187 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE2_C24, channels_gt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4188 | TEST_REQUIRES_X86_SSE2; |
| 4189 | for (size_t channels = 25; channels < 48; channels++) { |
| 4190 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 4191 | GAvgPoolMicrokernelTester() |
| 4192 | .rows(rows) |
| 4193 | .channels(channels) |
| 4194 | .input_stride(61) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4195 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4196 | } |
| 4197 | } |
| 4198 | } |
| 4199 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4200 | |
| 4201 | |
| 4202 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4203 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_eq_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4204 | TEST_REQUIRES_X86_SSE2; |
| 4205 | GAvgPoolMicrokernelTester() |
| 4206 | .rows(7) |
| 4207 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4208 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4209 | } |
| 4210 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4211 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_eq_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4212 | TEST_REQUIRES_X86_SSE2; |
| 4213 | for (size_t rows = 1; rows < 7; rows++) { |
| 4214 | GAvgPoolMicrokernelTester() |
| 4215 | .rows(rows) |
| 4216 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4217 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4218 | } |
| 4219 | } |
| 4220 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4221 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_eq_8_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4222 | TEST_REQUIRES_X86_SSE2; |
| 4223 | GAvgPoolMicrokernelTester() |
| 4224 | .rows(7) |
| 4225 | .channels(8) |
| 4226 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4227 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4228 | } |
| 4229 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4230 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_eq_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4231 | TEST_REQUIRES_X86_SSE2; |
| 4232 | GAvgPoolMicrokernelTester() |
| 4233 | .rows(7) |
| 4234 | .channels(8) |
| 4235 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4236 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4237 | } |
| 4238 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4239 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_eq_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4240 | TEST_REQUIRES_X86_SSE2; |
| 4241 | GAvgPoolMicrokernelTester() |
| 4242 | .rows(7) |
| 4243 | .channels(8) |
| 4244 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4245 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4246 | } |
| 4247 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4248 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_div_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4249 | TEST_REQUIRES_X86_SSE2; |
| 4250 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 4251 | GAvgPoolMicrokernelTester() |
| 4252 | .rows(7) |
| 4253 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4254 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4255 | } |
| 4256 | } |
| 4257 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4258 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_div_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4259 | TEST_REQUIRES_X86_SSE2; |
| 4260 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 4261 | for (size_t rows = 1; rows < 7; rows++) { |
| 4262 | GAvgPoolMicrokernelTester() |
| 4263 | .rows(rows) |
| 4264 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4265 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4266 | } |
| 4267 | } |
| 4268 | } |
| 4269 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4270 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_lt_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4271 | TEST_REQUIRES_X86_SSE2; |
| 4272 | for (size_t channels = 1; channels < 8; channels++) { |
| 4273 | GAvgPoolMicrokernelTester() |
| 4274 | .rows(7) |
| 4275 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4276 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4277 | } |
| 4278 | } |
| 4279 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4280 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_lt_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4281 | TEST_REQUIRES_X86_SSE2; |
| 4282 | for (size_t channels = 1; channels < 8; channels++) { |
| 4283 | for (size_t rows = 1; rows < 7; rows++) { |
| 4284 | GAvgPoolMicrokernelTester() |
| 4285 | .rows(rows) |
| 4286 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4287 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4288 | } |
| 4289 | } |
| 4290 | } |
| 4291 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4292 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_lt_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4293 | TEST_REQUIRES_X86_SSE2; |
| 4294 | for (size_t channels = 1; channels < 8; channels++) { |
| 4295 | GAvgPoolMicrokernelTester() |
| 4296 | .rows(7) |
| 4297 | .channels(channels) |
| 4298 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4299 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4300 | } |
| 4301 | } |
| 4302 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4303 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_lt_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4304 | TEST_REQUIRES_X86_SSE2; |
| 4305 | for (size_t channels = 1; channels < 8; channels++) { |
| 4306 | GAvgPoolMicrokernelTester() |
| 4307 | .rows(7) |
| 4308 | .channels(channels) |
| 4309 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4310 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4311 | } |
| 4312 | } |
| 4313 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4314 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_gt_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4315 | TEST_REQUIRES_X86_SSE2; |
| 4316 | for (size_t channels = 9; channels < 16; channels++) { |
| 4317 | GAvgPoolMicrokernelTester() |
| 4318 | .rows(7) |
| 4319 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4320 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4321 | } |
| 4322 | } |
| 4323 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4324 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_gt_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4325 | TEST_REQUIRES_X86_SSE2; |
| 4326 | for (size_t channels = 9; channels < 16; channels++) { |
| 4327 | for (size_t rows = 1; rows < 7; rows++) { |
| 4328 | GAvgPoolMicrokernelTester() |
| 4329 | .rows(rows) |
| 4330 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4331 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4332 | } |
| 4333 | } |
| 4334 | } |
| 4335 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4336 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_gt_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4337 | TEST_REQUIRES_X86_SSE2; |
| 4338 | for (size_t channels = 9; channels < 16; channels++) { |
| 4339 | GAvgPoolMicrokernelTester() |
| 4340 | .rows(7) |
| 4341 | .channels(channels) |
| 4342 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4343 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4344 | } |
| 4345 | } |
| 4346 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4347 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C8, channels_gt_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4348 | TEST_REQUIRES_X86_SSE2; |
| 4349 | for (size_t channels = 9; channels < 16; channels++) { |
| 4350 | GAvgPoolMicrokernelTester() |
| 4351 | .rows(7) |
| 4352 | .channels(channels) |
| 4353 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4354 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4355 | } |
| 4356 | } |
| 4357 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4358 | |
| 4359 | |
| 4360 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4361 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_eq_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4362 | TEST_REQUIRES_X86_SSE2; |
| 4363 | GAvgPoolMicrokernelTester() |
| 4364 | .rows(7) |
| 4365 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4366 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4367 | } |
| 4368 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4369 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_eq_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4370 | TEST_REQUIRES_X86_SSE2; |
| 4371 | for (size_t rows = 1; rows < 7; rows++) { |
| 4372 | GAvgPoolMicrokernelTester() |
| 4373 | .rows(rows) |
| 4374 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4375 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4376 | } |
| 4377 | } |
| 4378 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4379 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_eq_16_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4380 | TEST_REQUIRES_X86_SSE2; |
| 4381 | GAvgPoolMicrokernelTester() |
| 4382 | .rows(7) |
| 4383 | .channels(16) |
| 4384 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4385 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4386 | } |
| 4387 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4388 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_eq_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4389 | TEST_REQUIRES_X86_SSE2; |
| 4390 | GAvgPoolMicrokernelTester() |
| 4391 | .rows(7) |
| 4392 | .channels(16) |
| 4393 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4394 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4395 | } |
| 4396 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4397 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_eq_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4398 | TEST_REQUIRES_X86_SSE2; |
| 4399 | GAvgPoolMicrokernelTester() |
| 4400 | .rows(7) |
| 4401 | .channels(16) |
| 4402 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4403 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4404 | } |
| 4405 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4406 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_div_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4407 | TEST_REQUIRES_X86_SSE2; |
| 4408 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 4409 | GAvgPoolMicrokernelTester() |
| 4410 | .rows(7) |
| 4411 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4412 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4413 | } |
| 4414 | } |
| 4415 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4416 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_div_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4417 | TEST_REQUIRES_X86_SSE2; |
| 4418 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 4419 | for (size_t rows = 1; rows < 7; rows++) { |
| 4420 | GAvgPoolMicrokernelTester() |
| 4421 | .rows(rows) |
| 4422 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4423 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4424 | } |
| 4425 | } |
| 4426 | } |
| 4427 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4428 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_lt_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4429 | TEST_REQUIRES_X86_SSE2; |
| 4430 | for (size_t channels = 1; channels < 16; channels++) { |
| 4431 | GAvgPoolMicrokernelTester() |
| 4432 | .rows(7) |
| 4433 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4434 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4435 | } |
| 4436 | } |
| 4437 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4438 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_lt_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4439 | TEST_REQUIRES_X86_SSE2; |
| 4440 | for (size_t channels = 1; channels < 16; channels++) { |
| 4441 | for (size_t rows = 1; rows < 7; rows++) { |
| 4442 | GAvgPoolMicrokernelTester() |
| 4443 | .rows(rows) |
| 4444 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4445 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4446 | } |
| 4447 | } |
| 4448 | } |
| 4449 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4450 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_lt_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4451 | TEST_REQUIRES_X86_SSE2; |
| 4452 | for (size_t channels = 1; channels < 16; channels++) { |
| 4453 | GAvgPoolMicrokernelTester() |
| 4454 | .rows(7) |
| 4455 | .channels(channels) |
| 4456 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4457 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4458 | } |
| 4459 | } |
| 4460 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4461 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_lt_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4462 | TEST_REQUIRES_X86_SSE2; |
| 4463 | for (size_t channels = 1; channels < 16; channels++) { |
| 4464 | GAvgPoolMicrokernelTester() |
| 4465 | .rows(7) |
| 4466 | .channels(channels) |
| 4467 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4468 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4469 | } |
| 4470 | } |
| 4471 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4472 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_gt_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4473 | TEST_REQUIRES_X86_SSE2; |
| 4474 | for (size_t channels = 17; channels < 32; channels++) { |
| 4475 | GAvgPoolMicrokernelTester() |
| 4476 | .rows(7) |
| 4477 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4478 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4479 | } |
| 4480 | } |
| 4481 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4482 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_gt_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4483 | TEST_REQUIRES_X86_SSE2; |
| 4484 | for (size_t channels = 17; channels < 32; channels++) { |
| 4485 | for (size_t rows = 1; rows < 7; rows++) { |
| 4486 | GAvgPoolMicrokernelTester() |
| 4487 | .rows(rows) |
| 4488 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4489 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4490 | } |
| 4491 | } |
| 4492 | } |
| 4493 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4494 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_gt_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4495 | TEST_REQUIRES_X86_SSE2; |
| 4496 | for (size_t channels = 17; channels < 32; channels++) { |
| 4497 | GAvgPoolMicrokernelTester() |
| 4498 | .rows(7) |
| 4499 | .channels(channels) |
| 4500 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4501 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4502 | } |
| 4503 | } |
| 4504 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4505 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C16, channels_gt_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4506 | TEST_REQUIRES_X86_SSE2; |
| 4507 | for (size_t channels = 17; channels < 32; channels++) { |
| 4508 | GAvgPoolMicrokernelTester() |
| 4509 | .rows(7) |
| 4510 | .channels(channels) |
| 4511 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4512 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c16, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4513 | } |
| 4514 | } |
| 4515 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4516 | |
| 4517 | |
| 4518 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4519 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_eq_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4520 | TEST_REQUIRES_X86_SSE2; |
| 4521 | GAvgPoolMicrokernelTester() |
| 4522 | .rows(7) |
| 4523 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4524 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4525 | } |
| 4526 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4527 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_eq_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4528 | TEST_REQUIRES_X86_SSE2; |
| 4529 | for (size_t rows = 1; rows < 7; rows++) { |
| 4530 | GAvgPoolMicrokernelTester() |
| 4531 | .rows(rows) |
| 4532 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4533 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4534 | } |
| 4535 | } |
| 4536 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4537 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_eq_24_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4538 | TEST_REQUIRES_X86_SSE2; |
| 4539 | GAvgPoolMicrokernelTester() |
| 4540 | .rows(7) |
| 4541 | .channels(24) |
| 4542 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4543 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4544 | } |
| 4545 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4546 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_eq_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4547 | TEST_REQUIRES_X86_SSE2; |
| 4548 | GAvgPoolMicrokernelTester() |
| 4549 | .rows(7) |
| 4550 | .channels(24) |
| 4551 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4552 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4553 | } |
| 4554 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4555 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_eq_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4556 | TEST_REQUIRES_X86_SSE2; |
| 4557 | GAvgPoolMicrokernelTester() |
| 4558 | .rows(7) |
| 4559 | .channels(24) |
| 4560 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4561 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4562 | } |
| 4563 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4564 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_div_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4565 | TEST_REQUIRES_X86_SSE2; |
| 4566 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 4567 | GAvgPoolMicrokernelTester() |
| 4568 | .rows(7) |
| 4569 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4570 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4571 | } |
| 4572 | } |
| 4573 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4574 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_div_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4575 | TEST_REQUIRES_X86_SSE2; |
| 4576 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 4577 | for (size_t rows = 1; rows < 7; rows++) { |
| 4578 | GAvgPoolMicrokernelTester() |
| 4579 | .rows(rows) |
| 4580 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4581 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4582 | } |
| 4583 | } |
| 4584 | } |
| 4585 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4586 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_lt_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4587 | TEST_REQUIRES_X86_SSE2; |
| 4588 | for (size_t channels = 1; channels < 24; channels++) { |
| 4589 | GAvgPoolMicrokernelTester() |
| 4590 | .rows(7) |
| 4591 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4592 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4593 | } |
| 4594 | } |
| 4595 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4596 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_lt_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4597 | TEST_REQUIRES_X86_SSE2; |
| 4598 | for (size_t channels = 1; channels < 24; channels++) { |
| 4599 | for (size_t rows = 1; rows < 7; rows++) { |
| 4600 | GAvgPoolMicrokernelTester() |
| 4601 | .rows(rows) |
| 4602 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4603 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4604 | } |
| 4605 | } |
| 4606 | } |
| 4607 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4608 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_lt_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4609 | TEST_REQUIRES_X86_SSE2; |
| 4610 | for (size_t channels = 1; channels < 24; channels++) { |
| 4611 | GAvgPoolMicrokernelTester() |
| 4612 | .rows(7) |
| 4613 | .channels(channels) |
| 4614 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4615 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4616 | } |
| 4617 | } |
| 4618 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4619 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_lt_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4620 | TEST_REQUIRES_X86_SSE2; |
| 4621 | for (size_t channels = 1; channels < 24; channels++) { |
| 4622 | GAvgPoolMicrokernelTester() |
| 4623 | .rows(7) |
| 4624 | .channels(channels) |
| 4625 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4626 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4627 | } |
| 4628 | } |
| 4629 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4630 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_gt_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4631 | TEST_REQUIRES_X86_SSE2; |
| 4632 | for (size_t channels = 25; channels < 48; channels++) { |
| 4633 | GAvgPoolMicrokernelTester() |
| 4634 | .rows(7) |
| 4635 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4636 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4637 | } |
| 4638 | } |
| 4639 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4640 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_gt_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4641 | TEST_REQUIRES_X86_SSE2; |
| 4642 | for (size_t channels = 25; channels < 48; channels++) { |
| 4643 | for (size_t rows = 1; rows < 7; rows++) { |
| 4644 | GAvgPoolMicrokernelTester() |
| 4645 | .rows(rows) |
| 4646 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4647 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4648 | } |
| 4649 | } |
| 4650 | } |
| 4651 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4652 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_gt_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4653 | TEST_REQUIRES_X86_SSE2; |
| 4654 | for (size_t channels = 25; channels < 48; channels++) { |
| 4655 | GAvgPoolMicrokernelTester() |
| 4656 | .rows(7) |
| 4657 | .channels(channels) |
| 4658 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4659 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4660 | } |
| 4661 | } |
| 4662 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4663 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE2_C24, channels_gt_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4664 | TEST_REQUIRES_X86_SSE2; |
| 4665 | for (size_t channels = 25; channels < 48; channels++) { |
| 4666 | GAvgPoolMicrokernelTester() |
| 4667 | .rows(7) |
| 4668 | .channels(channels) |
| 4669 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4670 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c24, xnn_init_qs8_avgpool_minmax_fp32_sse2_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4671 | } |
| 4672 | } |
| 4673 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4674 | |
| 4675 | |
| 4676 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4677 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_eq_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4678 | TEST_REQUIRES_X86_SSE41; |
| 4679 | GAvgPoolMicrokernelTester() |
| 4680 | .rows(14) |
| 4681 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4682 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4683 | } |
| 4684 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4685 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_eq_8_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4686 | TEST_REQUIRES_X86_SSE41; |
| 4687 | GAvgPoolMicrokernelTester() |
| 4688 | .rows(14) |
| 4689 | .channels(8) |
| 4690 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4691 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4692 | } |
| 4693 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4694 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_eq_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4695 | TEST_REQUIRES_X86_SSE41; |
| 4696 | GAvgPoolMicrokernelTester() |
| 4697 | .rows(14) |
| 4698 | .channels(8) |
| 4699 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4700 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4701 | } |
| 4702 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4703 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_eq_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4704 | TEST_REQUIRES_X86_SSE41; |
| 4705 | GAvgPoolMicrokernelTester() |
| 4706 | .rows(14) |
| 4707 | .channels(8) |
| 4708 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4709 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4710 | } |
| 4711 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4712 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_eq_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4713 | TEST_REQUIRES_X86_SSE41; |
| 4714 | for (size_t rows = 8; rows < 14; rows++) { |
| 4715 | GAvgPoolMicrokernelTester() |
| 4716 | .rows(rows) |
| 4717 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4718 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4719 | } |
| 4720 | } |
| 4721 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4722 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_eq_8_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4723 | TEST_REQUIRES_X86_SSE41; |
| 4724 | for (size_t rows = 8; rows < 14; rows++) { |
| 4725 | GAvgPoolMicrokernelTester() |
| 4726 | .rows(rows) |
| 4727 | .channels(8) |
| 4728 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4729 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4730 | } |
| 4731 | } |
| 4732 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4733 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_eq_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4734 | TEST_REQUIRES_X86_SSE41; |
| 4735 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4736 | GAvgPoolMicrokernelTester() |
| 4737 | .rows(rows) |
| 4738 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4739 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4740 | } |
| 4741 | } |
| 4742 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4743 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_eq_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4744 | TEST_REQUIRES_X86_SSE41; |
| 4745 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4746 | GAvgPoolMicrokernelTester() |
| 4747 | .rows(rows) |
| 4748 | .channels(8) |
| 4749 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4750 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4751 | } |
| 4752 | } |
| 4753 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4754 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_div_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4755 | TEST_REQUIRES_X86_SSE41; |
| 4756 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 4757 | GAvgPoolMicrokernelTester() |
| 4758 | .rows(14) |
| 4759 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4760 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4761 | } |
| 4762 | } |
| 4763 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4764 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_div_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4765 | TEST_REQUIRES_X86_SSE41; |
| 4766 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 4767 | for (size_t rows = 8; rows < 14; rows++) { |
| 4768 | GAvgPoolMicrokernelTester() |
| 4769 | .rows(rows) |
| 4770 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4771 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4772 | } |
| 4773 | } |
| 4774 | } |
| 4775 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4776 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_div_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4777 | TEST_REQUIRES_X86_SSE41; |
| 4778 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 4779 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4780 | GAvgPoolMicrokernelTester() |
| 4781 | .rows(rows) |
| 4782 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4783 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4784 | } |
| 4785 | } |
| 4786 | } |
| 4787 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4788 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_div_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4789 | TEST_REQUIRES_X86_SSE41; |
| 4790 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 4791 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4792 | GAvgPoolMicrokernelTester() |
| 4793 | .rows(rows) |
| 4794 | .channels(channels) |
| 4795 | .input_stride(131) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4796 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4797 | } |
| 4798 | } |
| 4799 | } |
| 4800 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4801 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_lt_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4802 | TEST_REQUIRES_X86_SSE41; |
| 4803 | for (size_t channels = 1; channels < 8; channels++) { |
| 4804 | GAvgPoolMicrokernelTester() |
| 4805 | .rows(14) |
| 4806 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4807 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4808 | } |
| 4809 | } |
| 4810 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4811 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_lt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4812 | TEST_REQUIRES_X86_SSE41; |
| 4813 | for (size_t channels = 1; channels < 8; channels++) { |
| 4814 | GAvgPoolMicrokernelTester() |
| 4815 | .rows(14) |
| 4816 | .channels(channels) |
| 4817 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4818 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4819 | } |
| 4820 | } |
| 4821 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4822 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_lt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4823 | TEST_REQUIRES_X86_SSE41; |
| 4824 | for (size_t channels = 1; channels < 8; channels++) { |
| 4825 | GAvgPoolMicrokernelTester() |
| 4826 | .rows(14) |
| 4827 | .channels(channels) |
| 4828 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4829 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4830 | } |
| 4831 | } |
| 4832 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4833 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_lt_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4834 | TEST_REQUIRES_X86_SSE41; |
| 4835 | for (size_t channels = 1; channels < 8; channels++) { |
| 4836 | for (size_t rows = 8; rows < 14; rows++) { |
| 4837 | GAvgPoolMicrokernelTester() |
| 4838 | .rows(rows) |
| 4839 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4840 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4841 | } |
| 4842 | } |
| 4843 | } |
| 4844 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4845 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_lt_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4846 | TEST_REQUIRES_X86_SSE41; |
| 4847 | for (size_t channels = 1; channels < 8; channels++) { |
| 4848 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4849 | GAvgPoolMicrokernelTester() |
| 4850 | .rows(rows) |
| 4851 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4852 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4853 | } |
| 4854 | } |
| 4855 | } |
| 4856 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4857 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_lt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4858 | TEST_REQUIRES_X86_SSE41; |
| 4859 | for (size_t channels = 1; channels < 8; channels++) { |
| 4860 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 4861 | GAvgPoolMicrokernelTester() |
| 4862 | .rows(rows) |
| 4863 | .channels(channels) |
| 4864 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4865 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4866 | } |
| 4867 | } |
| 4868 | } |
| 4869 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4870 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_gt_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4871 | TEST_REQUIRES_X86_SSE41; |
| 4872 | for (size_t channels = 9; channels < 16; channels++) { |
| 4873 | GAvgPoolMicrokernelTester() |
| 4874 | .rows(14) |
| 4875 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4876 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4877 | } |
| 4878 | } |
| 4879 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4880 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_gt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4881 | TEST_REQUIRES_X86_SSE41; |
| 4882 | for (size_t channels = 9; channels < 16; channels++) { |
| 4883 | GAvgPoolMicrokernelTester() |
| 4884 | .rows(14) |
| 4885 | .channels(channels) |
| 4886 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4887 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4888 | } |
| 4889 | } |
| 4890 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4891 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_gt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4892 | TEST_REQUIRES_X86_SSE41; |
| 4893 | for (size_t channels = 9; channels < 16; channels++) { |
| 4894 | GAvgPoolMicrokernelTester() |
| 4895 | .rows(14) |
| 4896 | .channels(channels) |
| 4897 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4898 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4899 | } |
| 4900 | } |
| 4901 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4902 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_gt_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4903 | TEST_REQUIRES_X86_SSE41; |
| 4904 | for (size_t channels = 9; channels < 16; channels++) { |
| 4905 | for (size_t rows = 8; rows < 14; rows++) { |
| 4906 | GAvgPoolMicrokernelTester() |
| 4907 | .rows(rows) |
| 4908 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4909 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4910 | } |
| 4911 | } |
| 4912 | } |
| 4913 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4914 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_gt_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4915 | TEST_REQUIRES_X86_SSE41; |
| 4916 | for (size_t channels = 9; channels < 16; channels++) { |
| 4917 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 4918 | GAvgPoolMicrokernelTester() |
| 4919 | .rows(rows) |
| 4920 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4921 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4922 | } |
| 4923 | } |
| 4924 | } |
| 4925 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4926 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C8, channels_gt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4927 | TEST_REQUIRES_X86_SSE41; |
| 4928 | for (size_t channels = 9; channels < 16; channels++) { |
| 4929 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 4930 | GAvgPoolMicrokernelTester() |
| 4931 | .rows(rows) |
| 4932 | .channels(channels) |
| 4933 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4934 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4935 | } |
| 4936 | } |
| 4937 | } |
| 4938 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4939 | |
| 4940 | |
| 4941 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4942 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_eq_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4943 | TEST_REQUIRES_X86_SSE41; |
| 4944 | GAvgPoolMicrokernelTester() |
| 4945 | .rows(14) |
| 4946 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4947 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4948 | } |
| 4949 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4950 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_eq_16_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4951 | TEST_REQUIRES_X86_SSE41; |
| 4952 | GAvgPoolMicrokernelTester() |
| 4953 | .rows(14) |
| 4954 | .channels(16) |
| 4955 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4956 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4957 | } |
| 4958 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4959 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_eq_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4960 | TEST_REQUIRES_X86_SSE41; |
| 4961 | GAvgPoolMicrokernelTester() |
| 4962 | .rows(14) |
| 4963 | .channels(16) |
| 4964 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4965 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4966 | } |
| 4967 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4968 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_eq_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4969 | TEST_REQUIRES_X86_SSE41; |
| 4970 | GAvgPoolMicrokernelTester() |
| 4971 | .rows(14) |
| 4972 | .channels(16) |
| 4973 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4974 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4975 | } |
| 4976 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4977 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_eq_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4978 | TEST_REQUIRES_X86_SSE41; |
| 4979 | for (size_t rows = 8; rows < 14; rows++) { |
| 4980 | GAvgPoolMicrokernelTester() |
| 4981 | .rows(rows) |
| 4982 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4983 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4984 | } |
| 4985 | } |
| 4986 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4987 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_eq_16_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4988 | TEST_REQUIRES_X86_SSE41; |
| 4989 | for (size_t rows = 8; rows < 14; rows++) { |
| 4990 | GAvgPoolMicrokernelTester() |
| 4991 | .rows(rows) |
| 4992 | .channels(16) |
| 4993 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 4994 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4995 | } |
| 4996 | } |
| 4997 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 4998 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_eq_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 4999 | TEST_REQUIRES_X86_SSE41; |
| 5000 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5001 | GAvgPoolMicrokernelTester() |
| 5002 | .rows(rows) |
| 5003 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5004 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5005 | } |
| 5006 | } |
| 5007 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5008 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_eq_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5009 | TEST_REQUIRES_X86_SSE41; |
| 5010 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5011 | GAvgPoolMicrokernelTester() |
| 5012 | .rows(rows) |
| 5013 | .channels(16) |
| 5014 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5015 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5016 | } |
| 5017 | } |
| 5018 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5019 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_div_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5020 | TEST_REQUIRES_X86_SSE41; |
| 5021 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 5022 | GAvgPoolMicrokernelTester() |
| 5023 | .rows(14) |
| 5024 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5025 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5026 | } |
| 5027 | } |
| 5028 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5029 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_div_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5030 | TEST_REQUIRES_X86_SSE41; |
| 5031 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 5032 | for (size_t rows = 8; rows < 14; rows++) { |
| 5033 | GAvgPoolMicrokernelTester() |
| 5034 | .rows(rows) |
| 5035 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5036 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5037 | } |
| 5038 | } |
| 5039 | } |
| 5040 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5041 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_div_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5042 | TEST_REQUIRES_X86_SSE41; |
| 5043 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 5044 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5045 | GAvgPoolMicrokernelTester() |
| 5046 | .rows(rows) |
| 5047 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5048 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5049 | } |
| 5050 | } |
| 5051 | } |
| 5052 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5053 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_div_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5054 | TEST_REQUIRES_X86_SSE41; |
| 5055 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 5056 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5057 | GAvgPoolMicrokernelTester() |
| 5058 | .rows(rows) |
| 5059 | .channels(channels) |
| 5060 | .input_stride(263) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5061 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5062 | } |
| 5063 | } |
| 5064 | } |
| 5065 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5066 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_lt_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5067 | TEST_REQUIRES_X86_SSE41; |
| 5068 | for (size_t channels = 1; channels < 16; channels++) { |
| 5069 | GAvgPoolMicrokernelTester() |
| 5070 | .rows(14) |
| 5071 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5072 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5073 | } |
| 5074 | } |
| 5075 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5076 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_lt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5077 | TEST_REQUIRES_X86_SSE41; |
| 5078 | for (size_t channels = 1; channels < 16; channels++) { |
| 5079 | GAvgPoolMicrokernelTester() |
| 5080 | .rows(14) |
| 5081 | .channels(channels) |
| 5082 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5083 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5084 | } |
| 5085 | } |
| 5086 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5087 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_lt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5088 | TEST_REQUIRES_X86_SSE41; |
| 5089 | for (size_t channels = 1; channels < 16; channels++) { |
| 5090 | GAvgPoolMicrokernelTester() |
| 5091 | .rows(14) |
| 5092 | .channels(channels) |
| 5093 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5094 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5095 | } |
| 5096 | } |
| 5097 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5098 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_lt_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5099 | TEST_REQUIRES_X86_SSE41; |
| 5100 | for (size_t channels = 1; channels < 16; channels++) { |
| 5101 | for (size_t rows = 8; rows < 14; rows++) { |
| 5102 | GAvgPoolMicrokernelTester() |
| 5103 | .rows(rows) |
| 5104 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5105 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5106 | } |
| 5107 | } |
| 5108 | } |
| 5109 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5110 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_lt_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5111 | TEST_REQUIRES_X86_SSE41; |
| 5112 | for (size_t channels = 1; channels < 16; channels++) { |
| 5113 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5114 | GAvgPoolMicrokernelTester() |
| 5115 | .rows(rows) |
| 5116 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5117 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5118 | } |
| 5119 | } |
| 5120 | } |
| 5121 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5122 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_lt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5123 | TEST_REQUIRES_X86_SSE41; |
| 5124 | for (size_t channels = 1; channels < 16; channels++) { |
| 5125 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5126 | GAvgPoolMicrokernelTester() |
| 5127 | .rows(rows) |
| 5128 | .channels(channels) |
| 5129 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5130 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5131 | } |
| 5132 | } |
| 5133 | } |
| 5134 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5135 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_gt_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5136 | TEST_REQUIRES_X86_SSE41; |
| 5137 | for (size_t channels = 17; channels < 32; channels++) { |
| 5138 | GAvgPoolMicrokernelTester() |
| 5139 | .rows(14) |
| 5140 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5141 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5142 | } |
| 5143 | } |
| 5144 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5145 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_gt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5146 | TEST_REQUIRES_X86_SSE41; |
| 5147 | for (size_t channels = 17; channels < 32; channels++) { |
| 5148 | GAvgPoolMicrokernelTester() |
| 5149 | .rows(14) |
| 5150 | .channels(channels) |
| 5151 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5152 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5153 | } |
| 5154 | } |
| 5155 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5156 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_gt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5157 | TEST_REQUIRES_X86_SSE41; |
| 5158 | for (size_t channels = 17; channels < 32; channels++) { |
| 5159 | GAvgPoolMicrokernelTester() |
| 5160 | .rows(14) |
| 5161 | .channels(channels) |
| 5162 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5163 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5164 | } |
| 5165 | } |
| 5166 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5167 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_gt_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5168 | TEST_REQUIRES_X86_SSE41; |
| 5169 | for (size_t channels = 17; channels < 32; channels++) { |
| 5170 | for (size_t rows = 8; rows < 14; rows++) { |
| 5171 | GAvgPoolMicrokernelTester() |
| 5172 | .rows(rows) |
| 5173 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5174 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5175 | } |
| 5176 | } |
| 5177 | } |
| 5178 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5179 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_gt_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5180 | TEST_REQUIRES_X86_SSE41; |
| 5181 | for (size_t channels = 17; channels < 32; channels++) { |
| 5182 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 5183 | GAvgPoolMicrokernelTester() |
| 5184 | .rows(rows) |
| 5185 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5186 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5187 | } |
| 5188 | } |
| 5189 | } |
| 5190 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5191 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C16, channels_gt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5192 | TEST_REQUIRES_X86_SSE41; |
| 5193 | for (size_t channels = 17; channels < 32; channels++) { |
| 5194 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 5195 | GAvgPoolMicrokernelTester() |
| 5196 | .rows(rows) |
| 5197 | .channels(channels) |
| 5198 | .input_stride(47) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5199 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5200 | } |
| 5201 | } |
| 5202 | } |
| 5203 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5204 | |
| 5205 | |
| 5206 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5207 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_eq_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5208 | TEST_REQUIRES_X86_SSE41; |
| 5209 | GAvgPoolMicrokernelTester() |
| 5210 | .rows(14) |
| 5211 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5212 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5213 | } |
| 5214 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5215 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_eq_24_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5216 | TEST_REQUIRES_X86_SSE41; |
| 5217 | GAvgPoolMicrokernelTester() |
| 5218 | .rows(14) |
| 5219 | .channels(24) |
| 5220 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5221 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5222 | } |
| 5223 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5224 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_eq_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5225 | TEST_REQUIRES_X86_SSE41; |
| 5226 | GAvgPoolMicrokernelTester() |
| 5227 | .rows(14) |
| 5228 | .channels(24) |
| 5229 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5230 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5231 | } |
| 5232 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5233 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_eq_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5234 | TEST_REQUIRES_X86_SSE41; |
| 5235 | GAvgPoolMicrokernelTester() |
| 5236 | .rows(14) |
| 5237 | .channels(24) |
| 5238 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5239 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5240 | } |
| 5241 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5242 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_eq_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5243 | TEST_REQUIRES_X86_SSE41; |
| 5244 | for (size_t rows = 8; rows < 14; rows++) { |
| 5245 | GAvgPoolMicrokernelTester() |
| 5246 | .rows(rows) |
| 5247 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5248 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5249 | } |
| 5250 | } |
| 5251 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5252 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_eq_24_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5253 | TEST_REQUIRES_X86_SSE41; |
| 5254 | for (size_t rows = 8; rows < 14; rows++) { |
| 5255 | GAvgPoolMicrokernelTester() |
| 5256 | .rows(rows) |
| 5257 | .channels(24) |
| 5258 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5259 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5260 | } |
| 5261 | } |
| 5262 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5263 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_eq_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5264 | TEST_REQUIRES_X86_SSE41; |
| 5265 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5266 | GAvgPoolMicrokernelTester() |
| 5267 | .rows(rows) |
| 5268 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5269 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5270 | } |
| 5271 | } |
| 5272 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5273 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_eq_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5274 | TEST_REQUIRES_X86_SSE41; |
| 5275 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5276 | GAvgPoolMicrokernelTester() |
| 5277 | .rows(rows) |
| 5278 | .channels(24) |
| 5279 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5280 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5281 | } |
| 5282 | } |
| 5283 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5284 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_div_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5285 | TEST_REQUIRES_X86_SSE41; |
| 5286 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 5287 | GAvgPoolMicrokernelTester() |
| 5288 | .rows(14) |
| 5289 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5290 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5291 | } |
| 5292 | } |
| 5293 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5294 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_div_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5295 | TEST_REQUIRES_X86_SSE41; |
| 5296 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 5297 | for (size_t rows = 8; rows < 14; rows++) { |
| 5298 | GAvgPoolMicrokernelTester() |
| 5299 | .rows(rows) |
| 5300 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5301 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5302 | } |
| 5303 | } |
| 5304 | } |
| 5305 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5306 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_div_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5307 | TEST_REQUIRES_X86_SSE41; |
| 5308 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 5309 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5310 | GAvgPoolMicrokernelTester() |
| 5311 | .rows(rows) |
| 5312 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5313 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5314 | } |
| 5315 | } |
| 5316 | } |
| 5317 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5318 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_div_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5319 | TEST_REQUIRES_X86_SSE41; |
| 5320 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 5321 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5322 | GAvgPoolMicrokernelTester() |
| 5323 | .rows(rows) |
| 5324 | .channels(channels) |
| 5325 | .input_stride(389) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5326 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5327 | } |
| 5328 | } |
| 5329 | } |
| 5330 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5331 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_lt_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5332 | TEST_REQUIRES_X86_SSE41; |
| 5333 | for (size_t channels = 1; channels < 24; channels++) { |
| 5334 | GAvgPoolMicrokernelTester() |
| 5335 | .rows(14) |
| 5336 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5337 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5338 | } |
| 5339 | } |
| 5340 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5341 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_lt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5342 | TEST_REQUIRES_X86_SSE41; |
| 5343 | for (size_t channels = 1; channels < 24; channels++) { |
| 5344 | GAvgPoolMicrokernelTester() |
| 5345 | .rows(14) |
| 5346 | .channels(channels) |
| 5347 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5348 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5349 | } |
| 5350 | } |
| 5351 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5352 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_lt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5353 | TEST_REQUIRES_X86_SSE41; |
| 5354 | for (size_t channels = 1; channels < 24; channels++) { |
| 5355 | GAvgPoolMicrokernelTester() |
| 5356 | .rows(14) |
| 5357 | .channels(channels) |
| 5358 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5359 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5360 | } |
| 5361 | } |
| 5362 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5363 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_lt_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5364 | TEST_REQUIRES_X86_SSE41; |
| 5365 | for (size_t channels = 1; channels < 24; channels++) { |
| 5366 | for (size_t rows = 8; rows < 14; rows++) { |
| 5367 | GAvgPoolMicrokernelTester() |
| 5368 | .rows(rows) |
| 5369 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5370 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5371 | } |
| 5372 | } |
| 5373 | } |
| 5374 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5375 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_lt_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5376 | TEST_REQUIRES_X86_SSE41; |
| 5377 | for (size_t channels = 1; channels < 24; channels++) { |
| 5378 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5379 | GAvgPoolMicrokernelTester() |
| 5380 | .rows(rows) |
| 5381 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5382 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5383 | } |
| 5384 | } |
| 5385 | } |
| 5386 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5387 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_lt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5388 | TEST_REQUIRES_X86_SSE41; |
| 5389 | for (size_t channels = 1; channels < 24; channels++) { |
| 5390 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 5391 | GAvgPoolMicrokernelTester() |
| 5392 | .rows(rows) |
| 5393 | .channels(channels) |
| 5394 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5395 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5396 | } |
| 5397 | } |
| 5398 | } |
| 5399 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5400 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_gt_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5401 | TEST_REQUIRES_X86_SSE41; |
| 5402 | for (size_t channels = 25; channels < 48; channels++) { |
| 5403 | GAvgPoolMicrokernelTester() |
| 5404 | .rows(14) |
| 5405 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5406 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5407 | } |
| 5408 | } |
| 5409 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5410 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_gt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5411 | TEST_REQUIRES_X86_SSE41; |
| 5412 | for (size_t channels = 25; channels < 48; channels++) { |
| 5413 | GAvgPoolMicrokernelTester() |
| 5414 | .rows(14) |
| 5415 | .channels(channels) |
| 5416 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5417 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5418 | } |
| 5419 | } |
| 5420 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5421 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_gt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5422 | TEST_REQUIRES_X86_SSE41; |
| 5423 | for (size_t channels = 25; channels < 48; channels++) { |
| 5424 | GAvgPoolMicrokernelTester() |
| 5425 | .rows(14) |
| 5426 | .channels(channels) |
| 5427 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5428 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5429 | } |
| 5430 | } |
| 5431 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5432 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_gt_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5433 | TEST_REQUIRES_X86_SSE41; |
| 5434 | for (size_t channels = 25; channels < 48; channels++) { |
| 5435 | for (size_t rows = 8; rows < 14; rows++) { |
| 5436 | GAvgPoolMicrokernelTester() |
| 5437 | .rows(rows) |
| 5438 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5439 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5440 | } |
| 5441 | } |
| 5442 | } |
| 5443 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5444 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_gt_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5445 | TEST_REQUIRES_X86_SSE41; |
| 5446 | for (size_t channels = 25; channels < 48; channels++) { |
| 5447 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 5448 | GAvgPoolMicrokernelTester() |
| 5449 | .rows(rows) |
| 5450 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5451 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5452 | } |
| 5453 | } |
| 5454 | } |
| 5455 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5456 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SSE41_C24, channels_gt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5457 | TEST_REQUIRES_X86_SSE41; |
| 5458 | for (size_t channels = 25; channels < 48; channels++) { |
| 5459 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 5460 | GAvgPoolMicrokernelTester() |
| 5461 | .rows(rows) |
| 5462 | .channels(channels) |
| 5463 | .input_stride(61) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5464 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5465 | } |
| 5466 | } |
| 5467 | } |
| 5468 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5469 | |
| 5470 | |
| 5471 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5472 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_eq_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5473 | TEST_REQUIRES_X86_SSE41; |
| 5474 | GAvgPoolMicrokernelTester() |
| 5475 | .rows(7) |
| 5476 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5477 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5478 | } |
| 5479 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5480 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_eq_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5481 | TEST_REQUIRES_X86_SSE41; |
| 5482 | for (size_t rows = 1; rows < 7; rows++) { |
| 5483 | GAvgPoolMicrokernelTester() |
| 5484 | .rows(rows) |
| 5485 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5486 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5487 | } |
| 5488 | } |
| 5489 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5490 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_eq_8_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5491 | TEST_REQUIRES_X86_SSE41; |
| 5492 | GAvgPoolMicrokernelTester() |
| 5493 | .rows(7) |
| 5494 | .channels(8) |
| 5495 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5496 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5497 | } |
| 5498 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5499 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_eq_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5500 | TEST_REQUIRES_X86_SSE41; |
| 5501 | GAvgPoolMicrokernelTester() |
| 5502 | .rows(7) |
| 5503 | .channels(8) |
| 5504 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5505 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5506 | } |
| 5507 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5508 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_eq_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5509 | TEST_REQUIRES_X86_SSE41; |
| 5510 | GAvgPoolMicrokernelTester() |
| 5511 | .rows(7) |
| 5512 | .channels(8) |
| 5513 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5514 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5515 | } |
| 5516 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5517 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_div_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5518 | TEST_REQUIRES_X86_SSE41; |
| 5519 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 5520 | GAvgPoolMicrokernelTester() |
| 5521 | .rows(7) |
| 5522 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5523 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5524 | } |
| 5525 | } |
| 5526 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5527 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_div_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5528 | TEST_REQUIRES_X86_SSE41; |
| 5529 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 5530 | for (size_t rows = 1; rows < 7; rows++) { |
| 5531 | GAvgPoolMicrokernelTester() |
| 5532 | .rows(rows) |
| 5533 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5534 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5535 | } |
| 5536 | } |
| 5537 | } |
| 5538 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5539 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_lt_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5540 | TEST_REQUIRES_X86_SSE41; |
| 5541 | for (size_t channels = 1; channels < 8; channels++) { |
| 5542 | GAvgPoolMicrokernelTester() |
| 5543 | .rows(7) |
| 5544 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5545 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5546 | } |
| 5547 | } |
| 5548 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5549 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_lt_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5550 | TEST_REQUIRES_X86_SSE41; |
| 5551 | for (size_t channels = 1; channels < 8; channels++) { |
| 5552 | for (size_t rows = 1; rows < 7; rows++) { |
| 5553 | GAvgPoolMicrokernelTester() |
| 5554 | .rows(rows) |
| 5555 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5556 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5557 | } |
| 5558 | } |
| 5559 | } |
| 5560 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5561 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_lt_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5562 | TEST_REQUIRES_X86_SSE41; |
| 5563 | for (size_t channels = 1; channels < 8; channels++) { |
| 5564 | GAvgPoolMicrokernelTester() |
| 5565 | .rows(7) |
| 5566 | .channels(channels) |
| 5567 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5568 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5569 | } |
| 5570 | } |
| 5571 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5572 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_lt_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5573 | TEST_REQUIRES_X86_SSE41; |
| 5574 | for (size_t channels = 1; channels < 8; channels++) { |
| 5575 | GAvgPoolMicrokernelTester() |
| 5576 | .rows(7) |
| 5577 | .channels(channels) |
| 5578 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5579 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5580 | } |
| 5581 | } |
| 5582 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5583 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_gt_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5584 | TEST_REQUIRES_X86_SSE41; |
| 5585 | for (size_t channels = 9; channels < 16; channels++) { |
| 5586 | GAvgPoolMicrokernelTester() |
| 5587 | .rows(7) |
| 5588 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5589 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5590 | } |
| 5591 | } |
| 5592 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5593 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_gt_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5594 | TEST_REQUIRES_X86_SSE41; |
| 5595 | for (size_t channels = 9; channels < 16; channels++) { |
| 5596 | for (size_t rows = 1; rows < 7; rows++) { |
| 5597 | GAvgPoolMicrokernelTester() |
| 5598 | .rows(rows) |
| 5599 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5600 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5601 | } |
| 5602 | } |
| 5603 | } |
| 5604 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5605 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_gt_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5606 | TEST_REQUIRES_X86_SSE41; |
| 5607 | for (size_t channels = 9; channels < 16; channels++) { |
| 5608 | GAvgPoolMicrokernelTester() |
| 5609 | .rows(7) |
| 5610 | .channels(channels) |
| 5611 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5612 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5613 | } |
| 5614 | } |
| 5615 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5616 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C8, channels_gt_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5617 | TEST_REQUIRES_X86_SSE41; |
| 5618 | for (size_t channels = 9; channels < 16; channels++) { |
| 5619 | GAvgPoolMicrokernelTester() |
| 5620 | .rows(7) |
| 5621 | .channels(channels) |
| 5622 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5623 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5624 | } |
| 5625 | } |
| 5626 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5627 | |
| 5628 | |
| 5629 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5630 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_eq_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5631 | TEST_REQUIRES_X86_SSE41; |
| 5632 | GAvgPoolMicrokernelTester() |
| 5633 | .rows(7) |
| 5634 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5635 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5636 | } |
| 5637 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5638 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_eq_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5639 | TEST_REQUIRES_X86_SSE41; |
| 5640 | for (size_t rows = 1; rows < 7; rows++) { |
| 5641 | GAvgPoolMicrokernelTester() |
| 5642 | .rows(rows) |
| 5643 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5644 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5645 | } |
| 5646 | } |
| 5647 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5648 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_eq_16_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5649 | TEST_REQUIRES_X86_SSE41; |
| 5650 | GAvgPoolMicrokernelTester() |
| 5651 | .rows(7) |
| 5652 | .channels(16) |
| 5653 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5654 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5655 | } |
| 5656 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5657 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_eq_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5658 | TEST_REQUIRES_X86_SSE41; |
| 5659 | GAvgPoolMicrokernelTester() |
| 5660 | .rows(7) |
| 5661 | .channels(16) |
| 5662 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5663 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5664 | } |
| 5665 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5666 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_eq_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5667 | TEST_REQUIRES_X86_SSE41; |
| 5668 | GAvgPoolMicrokernelTester() |
| 5669 | .rows(7) |
| 5670 | .channels(16) |
| 5671 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5672 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5673 | } |
| 5674 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5675 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_div_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5676 | TEST_REQUIRES_X86_SSE41; |
| 5677 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 5678 | GAvgPoolMicrokernelTester() |
| 5679 | .rows(7) |
| 5680 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5681 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5682 | } |
| 5683 | } |
| 5684 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5685 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_div_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5686 | TEST_REQUIRES_X86_SSE41; |
| 5687 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 5688 | for (size_t rows = 1; rows < 7; rows++) { |
| 5689 | GAvgPoolMicrokernelTester() |
| 5690 | .rows(rows) |
| 5691 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5692 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5693 | } |
| 5694 | } |
| 5695 | } |
| 5696 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5697 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_lt_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5698 | TEST_REQUIRES_X86_SSE41; |
| 5699 | for (size_t channels = 1; channels < 16; channels++) { |
| 5700 | GAvgPoolMicrokernelTester() |
| 5701 | .rows(7) |
| 5702 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5703 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5704 | } |
| 5705 | } |
| 5706 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5707 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_lt_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5708 | TEST_REQUIRES_X86_SSE41; |
| 5709 | for (size_t channels = 1; channels < 16; channels++) { |
| 5710 | for (size_t rows = 1; rows < 7; rows++) { |
| 5711 | GAvgPoolMicrokernelTester() |
| 5712 | .rows(rows) |
| 5713 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5714 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5715 | } |
| 5716 | } |
| 5717 | } |
| 5718 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5719 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_lt_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5720 | TEST_REQUIRES_X86_SSE41; |
| 5721 | for (size_t channels = 1; channels < 16; channels++) { |
| 5722 | GAvgPoolMicrokernelTester() |
| 5723 | .rows(7) |
| 5724 | .channels(channels) |
| 5725 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5726 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5727 | } |
| 5728 | } |
| 5729 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5730 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_lt_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5731 | TEST_REQUIRES_X86_SSE41; |
| 5732 | for (size_t channels = 1; channels < 16; channels++) { |
| 5733 | GAvgPoolMicrokernelTester() |
| 5734 | .rows(7) |
| 5735 | .channels(channels) |
| 5736 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5737 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5738 | } |
| 5739 | } |
| 5740 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5741 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_gt_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5742 | TEST_REQUIRES_X86_SSE41; |
| 5743 | for (size_t channels = 17; channels < 32; channels++) { |
| 5744 | GAvgPoolMicrokernelTester() |
| 5745 | .rows(7) |
| 5746 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5747 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5748 | } |
| 5749 | } |
| 5750 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5751 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_gt_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5752 | TEST_REQUIRES_X86_SSE41; |
| 5753 | for (size_t channels = 17; channels < 32; channels++) { |
| 5754 | for (size_t rows = 1; rows < 7; rows++) { |
| 5755 | GAvgPoolMicrokernelTester() |
| 5756 | .rows(rows) |
| 5757 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5758 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5759 | } |
| 5760 | } |
| 5761 | } |
| 5762 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5763 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_gt_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5764 | TEST_REQUIRES_X86_SSE41; |
| 5765 | for (size_t channels = 17; channels < 32; channels++) { |
| 5766 | GAvgPoolMicrokernelTester() |
| 5767 | .rows(7) |
| 5768 | .channels(channels) |
| 5769 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5770 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5771 | } |
| 5772 | } |
| 5773 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5774 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C16, channels_gt_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5775 | TEST_REQUIRES_X86_SSE41; |
| 5776 | for (size_t channels = 17; channels < 32; channels++) { |
| 5777 | GAvgPoolMicrokernelTester() |
| 5778 | .rows(7) |
| 5779 | .channels(channels) |
| 5780 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5781 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5782 | } |
| 5783 | } |
| 5784 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5785 | |
| 5786 | |
| 5787 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5788 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_eq_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5789 | TEST_REQUIRES_X86_SSE41; |
| 5790 | GAvgPoolMicrokernelTester() |
| 5791 | .rows(7) |
| 5792 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5793 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5794 | } |
| 5795 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5796 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_eq_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5797 | TEST_REQUIRES_X86_SSE41; |
| 5798 | for (size_t rows = 1; rows < 7; rows++) { |
| 5799 | GAvgPoolMicrokernelTester() |
| 5800 | .rows(rows) |
| 5801 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5802 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5803 | } |
| 5804 | } |
| 5805 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5806 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_eq_24_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5807 | TEST_REQUIRES_X86_SSE41; |
| 5808 | GAvgPoolMicrokernelTester() |
| 5809 | .rows(7) |
| 5810 | .channels(24) |
| 5811 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5812 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5813 | } |
| 5814 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5815 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_eq_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5816 | TEST_REQUIRES_X86_SSE41; |
| 5817 | GAvgPoolMicrokernelTester() |
| 5818 | .rows(7) |
| 5819 | .channels(24) |
| 5820 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5821 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5822 | } |
| 5823 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5824 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_eq_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5825 | TEST_REQUIRES_X86_SSE41; |
| 5826 | GAvgPoolMicrokernelTester() |
| 5827 | .rows(7) |
| 5828 | .channels(24) |
| 5829 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5830 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5831 | } |
| 5832 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5833 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_div_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5834 | TEST_REQUIRES_X86_SSE41; |
| 5835 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 5836 | GAvgPoolMicrokernelTester() |
| 5837 | .rows(7) |
| 5838 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5839 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5840 | } |
| 5841 | } |
| 5842 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5843 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_div_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5844 | TEST_REQUIRES_X86_SSE41; |
| 5845 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 5846 | for (size_t rows = 1; rows < 7; rows++) { |
| 5847 | GAvgPoolMicrokernelTester() |
| 5848 | .rows(rows) |
| 5849 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5850 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5851 | } |
| 5852 | } |
| 5853 | } |
| 5854 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5855 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_lt_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5856 | TEST_REQUIRES_X86_SSE41; |
| 5857 | for (size_t channels = 1; channels < 24; channels++) { |
| 5858 | GAvgPoolMicrokernelTester() |
| 5859 | .rows(7) |
| 5860 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5861 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5862 | } |
| 5863 | } |
| 5864 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5865 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_lt_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5866 | TEST_REQUIRES_X86_SSE41; |
| 5867 | for (size_t channels = 1; channels < 24; channels++) { |
| 5868 | for (size_t rows = 1; rows < 7; rows++) { |
| 5869 | GAvgPoolMicrokernelTester() |
| 5870 | .rows(rows) |
| 5871 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5872 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5873 | } |
| 5874 | } |
| 5875 | } |
| 5876 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5877 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_lt_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5878 | TEST_REQUIRES_X86_SSE41; |
| 5879 | for (size_t channels = 1; channels < 24; channels++) { |
| 5880 | GAvgPoolMicrokernelTester() |
| 5881 | .rows(7) |
| 5882 | .channels(channels) |
| 5883 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5884 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5885 | } |
| 5886 | } |
| 5887 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5888 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_lt_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5889 | TEST_REQUIRES_X86_SSE41; |
| 5890 | for (size_t channels = 1; channels < 24; channels++) { |
| 5891 | GAvgPoolMicrokernelTester() |
| 5892 | .rows(7) |
| 5893 | .channels(channels) |
| 5894 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5895 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5896 | } |
| 5897 | } |
| 5898 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5899 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_gt_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5900 | TEST_REQUIRES_X86_SSE41; |
| 5901 | for (size_t channels = 25; channels < 48; channels++) { |
| 5902 | GAvgPoolMicrokernelTester() |
| 5903 | .rows(7) |
| 5904 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5905 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5906 | } |
| 5907 | } |
| 5908 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5909 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_gt_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5910 | TEST_REQUIRES_X86_SSE41; |
| 5911 | for (size_t channels = 25; channels < 48; channels++) { |
| 5912 | for (size_t rows = 1; rows < 7; rows++) { |
| 5913 | GAvgPoolMicrokernelTester() |
| 5914 | .rows(rows) |
| 5915 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5916 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5917 | } |
| 5918 | } |
| 5919 | } |
| 5920 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5921 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_gt_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5922 | TEST_REQUIRES_X86_SSE41; |
| 5923 | for (size_t channels = 25; channels < 48; channels++) { |
| 5924 | GAvgPoolMicrokernelTester() |
| 5925 | .rows(7) |
| 5926 | .channels(channels) |
| 5927 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5928 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5929 | } |
| 5930 | } |
| 5931 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5932 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SSE41_C24, channels_gt_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5933 | TEST_REQUIRES_X86_SSE41; |
| 5934 | for (size_t channels = 25; channels < 48; channels++) { |
| 5935 | GAvgPoolMicrokernelTester() |
| 5936 | .rows(7) |
| 5937 | .channels(channels) |
| 5938 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5939 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24, xnn_init_qs8_avgpool_minmax_fp32_sse4_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5940 | } |
| 5941 | } |
| 5942 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5943 | |
| 5944 | |
| 5945 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5946 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_eq_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5947 | GAvgPoolMicrokernelTester() |
| 5948 | .rows(7) |
| 5949 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5950 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5951 | } |
| 5952 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5953 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_eq_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5954 | for (size_t rows = 1; rows < 7; rows++) { |
| 5955 | GAvgPoolMicrokernelTester() |
| 5956 | .rows(rows) |
| 5957 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5958 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5959 | } |
| 5960 | } |
| 5961 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5962 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_eq_8_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5963 | GAvgPoolMicrokernelTester() |
| 5964 | .rows(7) |
| 5965 | .channels(8) |
| 5966 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5967 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5968 | } |
| 5969 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5970 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_eq_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5971 | GAvgPoolMicrokernelTester() |
| 5972 | .rows(7) |
| 5973 | .channels(8) |
| 5974 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5975 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5976 | } |
| 5977 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5978 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_eq_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5979 | GAvgPoolMicrokernelTester() |
| 5980 | .rows(7) |
| 5981 | .channels(8) |
| 5982 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5983 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5984 | } |
| 5985 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5986 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_div_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5987 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 5988 | GAvgPoolMicrokernelTester() |
| 5989 | .rows(7) |
| 5990 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 5991 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5992 | } |
| 5993 | } |
| 5994 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 5995 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_div_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 5996 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 5997 | for (size_t rows = 1; rows < 7; rows++) { |
| 5998 | GAvgPoolMicrokernelTester() |
| 5999 | .rows(rows) |
| 6000 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6001 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6002 | } |
| 6003 | } |
| 6004 | } |
| 6005 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6006 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_lt_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6007 | for (size_t channels = 1; channels < 8; channels++) { |
| 6008 | GAvgPoolMicrokernelTester() |
| 6009 | .rows(7) |
| 6010 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6011 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6012 | } |
| 6013 | } |
| 6014 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6015 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_lt_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6016 | for (size_t channels = 1; channels < 8; channels++) { |
| 6017 | for (size_t rows = 1; rows < 7; rows++) { |
| 6018 | GAvgPoolMicrokernelTester() |
| 6019 | .rows(rows) |
| 6020 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6021 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6022 | } |
| 6023 | } |
| 6024 | } |
| 6025 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6026 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_lt_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6027 | for (size_t channels = 1; channels < 8; channels++) { |
| 6028 | GAvgPoolMicrokernelTester() |
| 6029 | .rows(7) |
| 6030 | .channels(channels) |
| 6031 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6032 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6033 | } |
| 6034 | } |
| 6035 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6036 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_lt_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6037 | for (size_t channels = 1; channels < 8; channels++) { |
| 6038 | GAvgPoolMicrokernelTester() |
| 6039 | .rows(7) |
| 6040 | .channels(channels) |
| 6041 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6042 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6043 | } |
| 6044 | } |
| 6045 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6046 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_gt_8_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6047 | for (size_t channels = 9; channels < 16; channels++) { |
| 6048 | GAvgPoolMicrokernelTester() |
| 6049 | .rows(7) |
| 6050 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6051 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6052 | } |
| 6053 | } |
| 6054 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6055 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_gt_8_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6056 | for (size_t channels = 9; channels < 16; channels++) { |
| 6057 | for (size_t rows = 1; rows < 7; rows++) { |
| 6058 | GAvgPoolMicrokernelTester() |
| 6059 | .rows(rows) |
| 6060 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6061 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6062 | } |
| 6063 | } |
| 6064 | } |
| 6065 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6066 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_gt_8_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6067 | for (size_t channels = 9; channels < 16; channels++) { |
| 6068 | GAvgPoolMicrokernelTester() |
| 6069 | .rows(7) |
| 6070 | .channels(channels) |
| 6071 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6072 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6073 | } |
| 6074 | } |
| 6075 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6076 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C8, channels_gt_8_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6077 | for (size_t channels = 9; channels < 16; channels++) { |
| 6078 | GAvgPoolMicrokernelTester() |
| 6079 | .rows(7) |
| 6080 | .channels(channels) |
| 6081 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6082 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6083 | } |
| 6084 | } |
| 6085 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 6086 | |
| 6087 | |
| 6088 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6089 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_eq_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6090 | GAvgPoolMicrokernelTester() |
| 6091 | .rows(7) |
| 6092 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6093 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6094 | } |
| 6095 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6096 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_eq_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6097 | for (size_t rows = 1; rows < 7; rows++) { |
| 6098 | GAvgPoolMicrokernelTester() |
| 6099 | .rows(rows) |
| 6100 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6101 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6102 | } |
| 6103 | } |
| 6104 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6105 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_eq_16_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6106 | GAvgPoolMicrokernelTester() |
| 6107 | .rows(7) |
| 6108 | .channels(16) |
| 6109 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6110 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6111 | } |
| 6112 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6113 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_eq_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6114 | GAvgPoolMicrokernelTester() |
| 6115 | .rows(7) |
| 6116 | .channels(16) |
| 6117 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6118 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6119 | } |
| 6120 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6121 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_eq_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6122 | GAvgPoolMicrokernelTester() |
| 6123 | .rows(7) |
| 6124 | .channels(16) |
| 6125 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6126 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6127 | } |
| 6128 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6129 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_div_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6130 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 6131 | GAvgPoolMicrokernelTester() |
| 6132 | .rows(7) |
| 6133 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6134 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6135 | } |
| 6136 | } |
| 6137 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6138 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_div_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6139 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 6140 | for (size_t rows = 1; rows < 7; rows++) { |
| 6141 | GAvgPoolMicrokernelTester() |
| 6142 | .rows(rows) |
| 6143 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6144 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6145 | } |
| 6146 | } |
| 6147 | } |
| 6148 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6149 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_lt_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6150 | for (size_t channels = 1; channels < 16; channels++) { |
| 6151 | GAvgPoolMicrokernelTester() |
| 6152 | .rows(7) |
| 6153 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6154 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6155 | } |
| 6156 | } |
| 6157 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6158 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_lt_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6159 | for (size_t channels = 1; channels < 16; channels++) { |
| 6160 | for (size_t rows = 1; rows < 7; rows++) { |
| 6161 | GAvgPoolMicrokernelTester() |
| 6162 | .rows(rows) |
| 6163 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6164 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6165 | } |
| 6166 | } |
| 6167 | } |
| 6168 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6169 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_lt_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6170 | for (size_t channels = 1; channels < 16; channels++) { |
| 6171 | GAvgPoolMicrokernelTester() |
| 6172 | .rows(7) |
| 6173 | .channels(channels) |
| 6174 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6175 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6176 | } |
| 6177 | } |
| 6178 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6179 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_lt_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6180 | for (size_t channels = 1; channels < 16; channels++) { |
| 6181 | GAvgPoolMicrokernelTester() |
| 6182 | .rows(7) |
| 6183 | .channels(channels) |
| 6184 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6185 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6186 | } |
| 6187 | } |
| 6188 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6189 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_gt_16_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6190 | for (size_t channels = 17; channels < 32; channels++) { |
| 6191 | GAvgPoolMicrokernelTester() |
| 6192 | .rows(7) |
| 6193 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6194 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6195 | } |
| 6196 | } |
| 6197 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6198 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_gt_16_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6199 | for (size_t channels = 17; channels < 32; channels++) { |
| 6200 | for (size_t rows = 1; rows < 7; rows++) { |
| 6201 | GAvgPoolMicrokernelTester() |
| 6202 | .rows(rows) |
| 6203 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6204 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6205 | } |
| 6206 | } |
| 6207 | } |
| 6208 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6209 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_gt_16_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6210 | for (size_t channels = 17; channels < 32; channels++) { |
| 6211 | GAvgPoolMicrokernelTester() |
| 6212 | .rows(7) |
| 6213 | .channels(channels) |
| 6214 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6215 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6216 | } |
| 6217 | } |
| 6218 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6219 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C16, channels_gt_16_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6220 | for (size_t channels = 17; channels < 32; channels++) { |
| 6221 | GAvgPoolMicrokernelTester() |
| 6222 | .rows(7) |
| 6223 | .channels(channels) |
| 6224 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6225 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6226 | } |
| 6227 | } |
| 6228 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 6229 | |
| 6230 | |
| 6231 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6232 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_eq_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6233 | GAvgPoolMicrokernelTester() |
| 6234 | .rows(7) |
| 6235 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6236 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6237 | } |
| 6238 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6239 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_eq_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6240 | for (size_t rows = 1; rows < 7; rows++) { |
| 6241 | GAvgPoolMicrokernelTester() |
| 6242 | .rows(rows) |
| 6243 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6244 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6245 | } |
| 6246 | } |
| 6247 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6248 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_eq_24_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6249 | GAvgPoolMicrokernelTester() |
| 6250 | .rows(7) |
| 6251 | .channels(24) |
| 6252 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6253 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6254 | } |
| 6255 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6256 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_eq_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6257 | GAvgPoolMicrokernelTester() |
| 6258 | .rows(7) |
| 6259 | .channels(24) |
| 6260 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6261 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6262 | } |
| 6263 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6264 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_eq_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6265 | GAvgPoolMicrokernelTester() |
| 6266 | .rows(7) |
| 6267 | .channels(24) |
| 6268 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6269 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6270 | } |
| 6271 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6272 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_div_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6273 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 6274 | GAvgPoolMicrokernelTester() |
| 6275 | .rows(7) |
| 6276 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6277 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6278 | } |
| 6279 | } |
| 6280 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6281 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_div_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6282 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 6283 | for (size_t rows = 1; rows < 7; rows++) { |
| 6284 | GAvgPoolMicrokernelTester() |
| 6285 | .rows(rows) |
| 6286 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6287 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6288 | } |
| 6289 | } |
| 6290 | } |
| 6291 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6292 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_lt_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6293 | for (size_t channels = 1; channels < 24; channels++) { |
| 6294 | GAvgPoolMicrokernelTester() |
| 6295 | .rows(7) |
| 6296 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6297 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6298 | } |
| 6299 | } |
| 6300 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6301 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_lt_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6302 | for (size_t channels = 1; channels < 24; channels++) { |
| 6303 | for (size_t rows = 1; rows < 7; rows++) { |
| 6304 | GAvgPoolMicrokernelTester() |
| 6305 | .rows(rows) |
| 6306 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6307 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6308 | } |
| 6309 | } |
| 6310 | } |
| 6311 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6312 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_lt_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6313 | for (size_t channels = 1; channels < 24; channels++) { |
| 6314 | GAvgPoolMicrokernelTester() |
| 6315 | .rows(7) |
| 6316 | .channels(channels) |
| 6317 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6318 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6319 | } |
| 6320 | } |
| 6321 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6322 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_lt_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6323 | for (size_t channels = 1; channels < 24; channels++) { |
| 6324 | GAvgPoolMicrokernelTester() |
| 6325 | .rows(7) |
| 6326 | .channels(channels) |
| 6327 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6328 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6329 | } |
| 6330 | } |
| 6331 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6332 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_gt_24_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6333 | for (size_t channels = 25; channels < 48; channels++) { |
| 6334 | GAvgPoolMicrokernelTester() |
| 6335 | .rows(7) |
| 6336 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6337 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6338 | } |
| 6339 | } |
| 6340 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6341 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_gt_24_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6342 | for (size_t channels = 25; channels < 48; channels++) { |
| 6343 | for (size_t rows = 1; rows < 7; rows++) { |
| 6344 | GAvgPoolMicrokernelTester() |
| 6345 | .rows(rows) |
| 6346 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6347 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6348 | } |
| 6349 | } |
| 6350 | } |
| 6351 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6352 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_gt_24_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6353 | for (size_t channels = 25; channels < 48; channels++) { |
| 6354 | GAvgPoolMicrokernelTester() |
| 6355 | .rows(7) |
| 6356 | .channels(channels) |
| 6357 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6358 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6359 | } |
| 6360 | } |
| 6361 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6362 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C24, channels_gt_24_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6363 | for (size_t channels = 25; channels < 48; channels++) { |
| 6364 | GAvgPoolMicrokernelTester() |
| 6365 | .rows(7) |
| 6366 | .channels(channels) |
| 6367 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6368 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6369 | } |
| 6370 | } |
| 6371 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 6372 | |
| 6373 | |
| 6374 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6375 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_eq_32_fulltile) { |
| 6376 | GAvgPoolMicrokernelTester() |
| 6377 | .rows(7) |
| 6378 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6379 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6380 | } |
| 6381 | |
| 6382 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_eq_32_subtile) { |
| 6383 | for (size_t rows = 1; rows < 7; rows++) { |
| 6384 | GAvgPoolMicrokernelTester() |
| 6385 | .rows(rows) |
| 6386 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6387 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6388 | } |
| 6389 | } |
| 6390 | |
| 6391 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_eq_32_fulltile_with_input_stride) { |
| 6392 | GAvgPoolMicrokernelTester() |
| 6393 | .rows(7) |
| 6394 | .channels(32) |
| 6395 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6396 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6397 | } |
| 6398 | |
| 6399 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_eq_32_fulltile_with_qmax) { |
| 6400 | GAvgPoolMicrokernelTester() |
| 6401 | .rows(7) |
| 6402 | .channels(32) |
| 6403 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6404 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6405 | } |
| 6406 | |
| 6407 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_eq_32_fulltile_with_qmin) { |
| 6408 | GAvgPoolMicrokernelTester() |
| 6409 | .rows(7) |
| 6410 | .channels(32) |
| 6411 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6412 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6413 | } |
| 6414 | |
| 6415 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_div_32_fulltile) { |
| 6416 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 6417 | GAvgPoolMicrokernelTester() |
| 6418 | .rows(7) |
| 6419 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6420 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6421 | } |
| 6422 | } |
| 6423 | |
| 6424 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_div_32_subtile) { |
| 6425 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 6426 | for (size_t rows = 1; rows < 7; rows++) { |
| 6427 | GAvgPoolMicrokernelTester() |
| 6428 | .rows(rows) |
| 6429 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6430 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6431 | } |
| 6432 | } |
| 6433 | } |
| 6434 | |
| 6435 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_lt_32_fulltile) { |
| 6436 | for (size_t channels = 1; channels < 32; channels++) { |
| 6437 | GAvgPoolMicrokernelTester() |
| 6438 | .rows(7) |
| 6439 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6440 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6441 | } |
| 6442 | } |
| 6443 | |
| 6444 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_lt_32_subtile) { |
| 6445 | for (size_t channels = 1; channels < 32; channels++) { |
| 6446 | for (size_t rows = 1; rows < 7; rows++) { |
| 6447 | GAvgPoolMicrokernelTester() |
| 6448 | .rows(rows) |
| 6449 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6450 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6451 | } |
| 6452 | } |
| 6453 | } |
| 6454 | |
| 6455 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_lt_32_fulltile_with_qmax) { |
| 6456 | for (size_t channels = 1; channels < 32; channels++) { |
| 6457 | GAvgPoolMicrokernelTester() |
| 6458 | .rows(7) |
| 6459 | .channels(channels) |
| 6460 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6461 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6462 | } |
| 6463 | } |
| 6464 | |
| 6465 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_lt_32_fulltile_with_qmin) { |
| 6466 | for (size_t channels = 1; channels < 32; channels++) { |
| 6467 | GAvgPoolMicrokernelTester() |
| 6468 | .rows(7) |
| 6469 | .channels(channels) |
| 6470 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6471 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6472 | } |
| 6473 | } |
| 6474 | |
| 6475 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_gt_32_fulltile) { |
| 6476 | for (size_t channels = 33; channels < 64; channels++) { |
| 6477 | GAvgPoolMicrokernelTester() |
| 6478 | .rows(7) |
| 6479 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6480 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6481 | } |
| 6482 | } |
| 6483 | |
| 6484 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_gt_32_subtile) { |
| 6485 | for (size_t channels = 33; channels < 64; channels++) { |
| 6486 | for (size_t rows = 1; rows < 7; rows++) { |
| 6487 | GAvgPoolMicrokernelTester() |
| 6488 | .rows(rows) |
| 6489 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6490 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6491 | } |
| 6492 | } |
| 6493 | } |
| 6494 | |
| 6495 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_gt_32_fulltile_with_qmax) { |
| 6496 | for (size_t channels = 33; channels < 64; channels++) { |
| 6497 | GAvgPoolMicrokernelTester() |
| 6498 | .rows(7) |
| 6499 | .channels(channels) |
| 6500 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6501 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6502 | } |
| 6503 | } |
| 6504 | |
| 6505 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__WASMSIMD_C32, channels_gt_32_fulltile_with_qmin) { |
| 6506 | for (size_t channels = 33; channels < 64; channels++) { |
| 6507 | GAvgPoolMicrokernelTester() |
| 6508 | .rows(7) |
| 6509 | .channels(channels) |
| 6510 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6511 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6512 | } |
| 6513 | } |
| 6514 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 6515 | |
| 6516 | |
| 6517 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 6518 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_eq_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6519 | GAvgPoolMicrokernelTester() |
| 6520 | .rows(14) |
| 6521 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6522 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6523 | } |
| 6524 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6525 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_eq_8_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6526 | GAvgPoolMicrokernelTester() |
| 6527 | .rows(14) |
| 6528 | .channels(8) |
| 6529 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6530 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6531 | } |
| 6532 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6533 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_eq_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6534 | GAvgPoolMicrokernelTester() |
| 6535 | .rows(14) |
| 6536 | .channels(8) |
| 6537 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6538 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6539 | } |
| 6540 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6541 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_eq_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6542 | GAvgPoolMicrokernelTester() |
| 6543 | .rows(14) |
| 6544 | .channels(8) |
| 6545 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6546 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6547 | } |
| 6548 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6549 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_eq_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6550 | for (size_t rows = 8; rows < 14; rows++) { |
| 6551 | GAvgPoolMicrokernelTester() |
| 6552 | .rows(rows) |
| 6553 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6554 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6555 | } |
| 6556 | } |
| 6557 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6558 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_eq_8_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6559 | for (size_t rows = 8; rows < 14; rows++) { |
| 6560 | GAvgPoolMicrokernelTester() |
| 6561 | .rows(rows) |
| 6562 | .channels(8) |
| 6563 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6564 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6565 | } |
| 6566 | } |
| 6567 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6568 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_eq_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6569 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6570 | GAvgPoolMicrokernelTester() |
| 6571 | .rows(rows) |
| 6572 | .channels(8) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6573 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6574 | } |
| 6575 | } |
| 6576 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6577 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_eq_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6578 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6579 | GAvgPoolMicrokernelTester() |
| 6580 | .rows(rows) |
| 6581 | .channels(8) |
| 6582 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6583 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6584 | } |
| 6585 | } |
| 6586 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6587 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_div_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6588 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 6589 | GAvgPoolMicrokernelTester() |
| 6590 | .rows(14) |
| 6591 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6592 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6593 | } |
| 6594 | } |
| 6595 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6596 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_div_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6597 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 6598 | for (size_t rows = 8; rows < 14; rows++) { |
| 6599 | GAvgPoolMicrokernelTester() |
| 6600 | .rows(rows) |
| 6601 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6602 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6603 | } |
| 6604 | } |
| 6605 | } |
| 6606 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6607 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_div_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6608 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 6609 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6610 | GAvgPoolMicrokernelTester() |
| 6611 | .rows(rows) |
| 6612 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6613 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6614 | } |
| 6615 | } |
| 6616 | } |
| 6617 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6618 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_div_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6619 | for (size_t channels = 16; channels < 64; channels += 8) { |
| 6620 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6621 | GAvgPoolMicrokernelTester() |
| 6622 | .rows(rows) |
| 6623 | .channels(channels) |
| 6624 | .input_stride(131) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6625 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6626 | } |
| 6627 | } |
| 6628 | } |
| 6629 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6630 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_lt_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6631 | for (size_t channels = 1; channels < 8; channels++) { |
| 6632 | GAvgPoolMicrokernelTester() |
| 6633 | .rows(14) |
| 6634 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6635 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6636 | } |
| 6637 | } |
| 6638 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6639 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_lt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6640 | for (size_t channels = 1; channels < 8; channels++) { |
| 6641 | GAvgPoolMicrokernelTester() |
| 6642 | .rows(14) |
| 6643 | .channels(channels) |
| 6644 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6645 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6646 | } |
| 6647 | } |
| 6648 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6649 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_lt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6650 | for (size_t channels = 1; channels < 8; channels++) { |
| 6651 | GAvgPoolMicrokernelTester() |
| 6652 | .rows(14) |
| 6653 | .channels(channels) |
| 6654 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6655 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6656 | } |
| 6657 | } |
| 6658 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6659 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_lt_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6660 | for (size_t channels = 1; channels < 8; channels++) { |
| 6661 | for (size_t rows = 8; rows < 14; rows++) { |
| 6662 | GAvgPoolMicrokernelTester() |
| 6663 | .rows(rows) |
| 6664 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6665 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6666 | } |
| 6667 | } |
| 6668 | } |
| 6669 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6670 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_lt_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6671 | for (size_t channels = 1; channels < 8; channels++) { |
| 6672 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6673 | GAvgPoolMicrokernelTester() |
| 6674 | .rows(rows) |
| 6675 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6676 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6677 | } |
| 6678 | } |
| 6679 | } |
| 6680 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6681 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_lt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6682 | for (size_t channels = 1; channels < 8; channels++) { |
| 6683 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6684 | GAvgPoolMicrokernelTester() |
| 6685 | .rows(rows) |
| 6686 | .channels(channels) |
| 6687 | .input_stride(11) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6688 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6689 | } |
| 6690 | } |
| 6691 | } |
| 6692 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6693 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_gt_8_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6694 | for (size_t channels = 9; channels < 16; channels++) { |
| 6695 | GAvgPoolMicrokernelTester() |
| 6696 | .rows(14) |
| 6697 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6698 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6699 | } |
| 6700 | } |
| 6701 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6702 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_gt_8_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6703 | for (size_t channels = 9; channels < 16; channels++) { |
| 6704 | GAvgPoolMicrokernelTester() |
| 6705 | .rows(14) |
| 6706 | .channels(channels) |
| 6707 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6708 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6709 | } |
| 6710 | } |
| 6711 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6712 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_gt_8_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6713 | for (size_t channels = 9; channels < 16; channels++) { |
| 6714 | GAvgPoolMicrokernelTester() |
| 6715 | .rows(14) |
| 6716 | .channels(channels) |
| 6717 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6718 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6719 | } |
| 6720 | } |
| 6721 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6722 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_gt_8_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6723 | for (size_t channels = 9; channels < 16; channels++) { |
| 6724 | for (size_t rows = 8; rows < 14; rows++) { |
| 6725 | GAvgPoolMicrokernelTester() |
| 6726 | .rows(rows) |
| 6727 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6728 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6729 | } |
| 6730 | } |
| 6731 | } |
| 6732 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6733 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_gt_8_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6734 | for (size_t channels = 9; channels < 16; channels++) { |
| 6735 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 6736 | GAvgPoolMicrokernelTester() |
| 6737 | .rows(rows) |
| 6738 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6739 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6740 | } |
| 6741 | } |
| 6742 | } |
| 6743 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6744 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C8, channels_gt_8_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6745 | for (size_t channels = 9; channels < 16; channels++) { |
| 6746 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 6747 | GAvgPoolMicrokernelTester() |
| 6748 | .rows(rows) |
| 6749 | .channels(channels) |
| 6750 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6751 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c8, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6752 | } |
| 6753 | } |
| 6754 | } |
| 6755 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 6756 | |
| 6757 | |
| 6758 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6759 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_eq_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6760 | GAvgPoolMicrokernelTester() |
| 6761 | .rows(14) |
| 6762 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6763 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6764 | } |
| 6765 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6766 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_eq_16_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6767 | GAvgPoolMicrokernelTester() |
| 6768 | .rows(14) |
| 6769 | .channels(16) |
| 6770 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6771 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6772 | } |
| 6773 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6774 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_eq_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6775 | GAvgPoolMicrokernelTester() |
| 6776 | .rows(14) |
| 6777 | .channels(16) |
| 6778 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6779 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6780 | } |
| 6781 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6782 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_eq_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6783 | GAvgPoolMicrokernelTester() |
| 6784 | .rows(14) |
| 6785 | .channels(16) |
| 6786 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6787 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6788 | } |
| 6789 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6790 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_eq_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6791 | for (size_t rows = 8; rows < 14; rows++) { |
| 6792 | GAvgPoolMicrokernelTester() |
| 6793 | .rows(rows) |
| 6794 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6795 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6796 | } |
| 6797 | } |
| 6798 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6799 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_eq_16_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6800 | for (size_t rows = 8; rows < 14; rows++) { |
| 6801 | GAvgPoolMicrokernelTester() |
| 6802 | .rows(rows) |
| 6803 | .channels(16) |
| 6804 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6805 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6806 | } |
| 6807 | } |
| 6808 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6809 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_eq_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6810 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6811 | GAvgPoolMicrokernelTester() |
| 6812 | .rows(rows) |
| 6813 | .channels(16) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6814 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6815 | } |
| 6816 | } |
| 6817 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6818 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_eq_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6819 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6820 | GAvgPoolMicrokernelTester() |
| 6821 | .rows(rows) |
| 6822 | .channels(16) |
| 6823 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6824 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6825 | } |
| 6826 | } |
| 6827 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6828 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_div_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6829 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 6830 | GAvgPoolMicrokernelTester() |
| 6831 | .rows(14) |
| 6832 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6833 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6834 | } |
| 6835 | } |
| 6836 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6837 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_div_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6838 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 6839 | for (size_t rows = 8; rows < 14; rows++) { |
| 6840 | GAvgPoolMicrokernelTester() |
| 6841 | .rows(rows) |
| 6842 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6843 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6844 | } |
| 6845 | } |
| 6846 | } |
| 6847 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6848 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_div_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6849 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 6850 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6851 | GAvgPoolMicrokernelTester() |
| 6852 | .rows(rows) |
| 6853 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6854 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6855 | } |
| 6856 | } |
| 6857 | } |
| 6858 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6859 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_div_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6860 | for (size_t channels = 32; channels < 128; channels += 16) { |
| 6861 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6862 | GAvgPoolMicrokernelTester() |
| 6863 | .rows(rows) |
| 6864 | .channels(channels) |
| 6865 | .input_stride(263) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6866 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6867 | } |
| 6868 | } |
| 6869 | } |
| 6870 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6871 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_lt_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6872 | for (size_t channels = 1; channels < 16; channels++) { |
| 6873 | GAvgPoolMicrokernelTester() |
| 6874 | .rows(14) |
| 6875 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6876 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6877 | } |
| 6878 | } |
| 6879 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6880 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_lt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6881 | for (size_t channels = 1; channels < 16; channels++) { |
| 6882 | GAvgPoolMicrokernelTester() |
| 6883 | .rows(14) |
| 6884 | .channels(channels) |
| 6885 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6886 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6887 | } |
| 6888 | } |
| 6889 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6890 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_lt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6891 | for (size_t channels = 1; channels < 16; channels++) { |
| 6892 | GAvgPoolMicrokernelTester() |
| 6893 | .rows(14) |
| 6894 | .channels(channels) |
| 6895 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6896 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6897 | } |
| 6898 | } |
| 6899 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6900 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_lt_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6901 | for (size_t channels = 1; channels < 16; channels++) { |
| 6902 | for (size_t rows = 8; rows < 14; rows++) { |
| 6903 | GAvgPoolMicrokernelTester() |
| 6904 | .rows(rows) |
| 6905 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6906 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6907 | } |
| 6908 | } |
| 6909 | } |
| 6910 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6911 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_lt_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6912 | for (size_t channels = 1; channels < 16; channels++) { |
| 6913 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6914 | GAvgPoolMicrokernelTester() |
| 6915 | .rows(rows) |
| 6916 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6917 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6918 | } |
| 6919 | } |
| 6920 | } |
| 6921 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6922 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_lt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6923 | for (size_t channels = 1; channels < 16; channels++) { |
| 6924 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 6925 | GAvgPoolMicrokernelTester() |
| 6926 | .rows(rows) |
| 6927 | .channels(channels) |
| 6928 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6929 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6930 | } |
| 6931 | } |
| 6932 | } |
| 6933 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6934 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_gt_16_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6935 | for (size_t channels = 17; channels < 32; channels++) { |
| 6936 | GAvgPoolMicrokernelTester() |
| 6937 | .rows(14) |
| 6938 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6939 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6940 | } |
| 6941 | } |
| 6942 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6943 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_gt_16_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6944 | for (size_t channels = 17; channels < 32; channels++) { |
| 6945 | GAvgPoolMicrokernelTester() |
| 6946 | .rows(14) |
| 6947 | .channels(channels) |
| 6948 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6949 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6950 | } |
| 6951 | } |
| 6952 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6953 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_gt_16_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6954 | for (size_t channels = 17; channels < 32; channels++) { |
| 6955 | GAvgPoolMicrokernelTester() |
| 6956 | .rows(14) |
| 6957 | .channels(channels) |
| 6958 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6959 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6960 | } |
| 6961 | } |
| 6962 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6963 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_gt_16_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6964 | for (size_t channels = 17; channels < 32; channels++) { |
| 6965 | for (size_t rows = 8; rows < 14; rows++) { |
| 6966 | GAvgPoolMicrokernelTester() |
| 6967 | .rows(rows) |
| 6968 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6969 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6970 | } |
| 6971 | } |
| 6972 | } |
| 6973 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6974 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_gt_16_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6975 | for (size_t channels = 17; channels < 32; channels++) { |
| 6976 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 6977 | GAvgPoolMicrokernelTester() |
| 6978 | .rows(rows) |
| 6979 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6980 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6981 | } |
| 6982 | } |
| 6983 | } |
| 6984 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 6985 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C16, channels_gt_16_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6986 | for (size_t channels = 17; channels < 32; channels++) { |
| 6987 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 6988 | GAvgPoolMicrokernelTester() |
| 6989 | .rows(rows) |
| 6990 | .channels(channels) |
| 6991 | .input_stride(47) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 6992 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c16, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 6993 | } |
| 6994 | } |
| 6995 | } |
| 6996 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 6997 | |
| 6998 | |
| 6999 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7000 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_eq_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7001 | GAvgPoolMicrokernelTester() |
| 7002 | .rows(14) |
| 7003 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7004 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7005 | } |
| 7006 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7007 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_eq_24_2pass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7008 | GAvgPoolMicrokernelTester() |
| 7009 | .rows(14) |
| 7010 | .channels(24) |
| 7011 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7012 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7013 | } |
| 7014 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7015 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_eq_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7016 | GAvgPoolMicrokernelTester() |
| 7017 | .rows(14) |
| 7018 | .channels(24) |
| 7019 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7020 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7021 | } |
| 7022 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7023 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_eq_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7024 | GAvgPoolMicrokernelTester() |
| 7025 | .rows(14) |
| 7026 | .channels(24) |
| 7027 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7028 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7029 | } |
| 7030 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7031 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_eq_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7032 | for (size_t rows = 8; rows < 14; rows++) { |
| 7033 | GAvgPoolMicrokernelTester() |
| 7034 | .rows(rows) |
| 7035 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7036 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7037 | } |
| 7038 | } |
| 7039 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7040 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_eq_24_2pass_subtile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7041 | for (size_t rows = 8; rows < 14; rows++) { |
| 7042 | GAvgPoolMicrokernelTester() |
| 7043 | .rows(rows) |
| 7044 | .channels(24) |
| 7045 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7046 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7047 | } |
| 7048 | } |
| 7049 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7050 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_eq_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7051 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7052 | GAvgPoolMicrokernelTester() |
| 7053 | .rows(rows) |
| 7054 | .channels(24) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7055 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7056 | } |
| 7057 | } |
| 7058 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7059 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_eq_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7060 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7061 | GAvgPoolMicrokernelTester() |
| 7062 | .rows(rows) |
| 7063 | .channels(24) |
| 7064 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7065 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7066 | } |
| 7067 | } |
| 7068 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7069 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_div_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7070 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 7071 | GAvgPoolMicrokernelTester() |
| 7072 | .rows(14) |
| 7073 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7074 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7075 | } |
| 7076 | } |
| 7077 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7078 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_div_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7079 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 7080 | for (size_t rows = 8; rows < 14; rows++) { |
| 7081 | GAvgPoolMicrokernelTester() |
| 7082 | .rows(rows) |
| 7083 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7084 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7085 | } |
| 7086 | } |
| 7087 | } |
| 7088 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7089 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_div_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7090 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 7091 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7092 | GAvgPoolMicrokernelTester() |
| 7093 | .rows(rows) |
| 7094 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7095 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7096 | } |
| 7097 | } |
| 7098 | } |
| 7099 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7100 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_div_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7101 | for (size_t channels = 48; channels < 192; channels += 24) { |
| 7102 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7103 | GAvgPoolMicrokernelTester() |
| 7104 | .rows(rows) |
| 7105 | .channels(channels) |
| 7106 | .input_stride(389) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7107 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7108 | } |
| 7109 | } |
| 7110 | } |
| 7111 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7112 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_lt_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7113 | for (size_t channels = 1; channels < 24; channels++) { |
| 7114 | GAvgPoolMicrokernelTester() |
| 7115 | .rows(14) |
| 7116 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7117 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7118 | } |
| 7119 | } |
| 7120 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7121 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_lt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7122 | for (size_t channels = 1; channels < 24; channels++) { |
| 7123 | GAvgPoolMicrokernelTester() |
| 7124 | .rows(14) |
| 7125 | .channels(channels) |
| 7126 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7127 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7128 | } |
| 7129 | } |
| 7130 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7131 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_lt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7132 | for (size_t channels = 1; channels < 24; channels++) { |
| 7133 | GAvgPoolMicrokernelTester() |
| 7134 | .rows(14) |
| 7135 | .channels(channels) |
| 7136 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7137 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7138 | } |
| 7139 | } |
| 7140 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7141 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_lt_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7142 | for (size_t channels = 1; channels < 24; channels++) { |
| 7143 | for (size_t rows = 8; rows < 14; rows++) { |
| 7144 | GAvgPoolMicrokernelTester() |
| 7145 | .rows(rows) |
| 7146 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7147 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7148 | } |
| 7149 | } |
| 7150 | } |
| 7151 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7152 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_lt_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7153 | for (size_t channels = 1; channels < 24; channels++) { |
| 7154 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7155 | GAvgPoolMicrokernelTester() |
| 7156 | .rows(rows) |
| 7157 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7158 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7159 | } |
| 7160 | } |
| 7161 | } |
| 7162 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7163 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_lt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7164 | for (size_t channels = 1; channels < 24; channels++) { |
| 7165 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7166 | GAvgPoolMicrokernelTester() |
| 7167 | .rows(rows) |
| 7168 | .channels(channels) |
| 7169 | .input_stride(29) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7170 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7171 | } |
| 7172 | } |
| 7173 | } |
| 7174 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7175 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_gt_24_2pass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7176 | for (size_t channels = 25; channels < 48; channels++) { |
| 7177 | GAvgPoolMicrokernelTester() |
| 7178 | .rows(14) |
| 7179 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7180 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7181 | } |
| 7182 | } |
| 7183 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7184 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_gt_24_2pass_fulltile_with_qmax) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7185 | for (size_t channels = 25; channels < 48; channels++) { |
| 7186 | GAvgPoolMicrokernelTester() |
| 7187 | .rows(14) |
| 7188 | .channels(channels) |
| 7189 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7190 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7191 | } |
| 7192 | } |
| 7193 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7194 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_gt_24_2pass_fulltile_with_qmin) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7195 | for (size_t channels = 25; channels < 48; channels++) { |
| 7196 | GAvgPoolMicrokernelTester() |
| 7197 | .rows(14) |
| 7198 | .channels(channels) |
| 7199 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7200 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7201 | } |
| 7202 | } |
| 7203 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7204 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_gt_24_2pass_subtile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7205 | for (size_t channels = 25; channels < 48; channels++) { |
| 7206 | for (size_t rows = 8; rows < 14; rows++) { |
| 7207 | GAvgPoolMicrokernelTester() |
| 7208 | .rows(rows) |
| 7209 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7210 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7211 | } |
| 7212 | } |
| 7213 | } |
| 7214 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7215 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_gt_24_multipass_fulltile) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7216 | for (size_t channels = 25; channels < 48; channels++) { |
| 7217 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 7218 | GAvgPoolMicrokernelTester() |
| 7219 | .rows(rows) |
| 7220 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7221 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7222 | } |
| 7223 | } |
| 7224 | } |
| 7225 | |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7226 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C24, channels_gt_24_multipass_fulltile_with_input_stride) { |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7227 | for (size_t channels = 25; channels < 48; channels++) { |
| 7228 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 7229 | GAvgPoolMicrokernelTester() |
| 7230 | .rows(rows) |
| 7231 | .channels(channels) |
| 7232 | .input_stride(61) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7233 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c24, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7234 | } |
| 7235 | } |
| 7236 | } |
| 7237 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 7238 | |
| 7239 | |
| 7240 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 7241 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_eq_32_2pass_fulltile) { |
| 7242 | GAvgPoolMicrokernelTester() |
| 7243 | .rows(14) |
| 7244 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7245 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7246 | } |
| 7247 | |
| 7248 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_eq_32_2pass_fulltile_with_input_stride) { |
| 7249 | GAvgPoolMicrokernelTester() |
| 7250 | .rows(14) |
| 7251 | .channels(32) |
| 7252 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7253 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7254 | } |
| 7255 | |
| 7256 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_eq_32_2pass_fulltile_with_qmax) { |
| 7257 | GAvgPoolMicrokernelTester() |
| 7258 | .rows(14) |
| 7259 | .channels(32) |
| 7260 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7261 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7262 | } |
| 7263 | |
| 7264 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_eq_32_2pass_fulltile_with_qmin) { |
| 7265 | GAvgPoolMicrokernelTester() |
| 7266 | .rows(14) |
| 7267 | .channels(32) |
| 7268 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7269 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7270 | } |
| 7271 | |
| 7272 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_eq_32_2pass_subtile) { |
| 7273 | for (size_t rows = 8; rows < 14; rows++) { |
| 7274 | GAvgPoolMicrokernelTester() |
| 7275 | .rows(rows) |
| 7276 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7277 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7278 | } |
| 7279 | } |
| 7280 | |
| 7281 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_eq_32_2pass_subtile_with_input_stride) { |
| 7282 | for (size_t rows = 8; rows < 14; rows++) { |
| 7283 | GAvgPoolMicrokernelTester() |
| 7284 | .rows(rows) |
| 7285 | .channels(32) |
| 7286 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7287 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7288 | } |
| 7289 | } |
| 7290 | |
| 7291 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_eq_32_multipass_fulltile) { |
| 7292 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7293 | GAvgPoolMicrokernelTester() |
| 7294 | .rows(rows) |
| 7295 | .channels(32) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7296 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7297 | } |
| 7298 | } |
| 7299 | |
| 7300 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_eq_32_multipass_fulltile_with_input_stride) { |
| 7301 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7302 | GAvgPoolMicrokernelTester() |
| 7303 | .rows(rows) |
| 7304 | .channels(32) |
| 7305 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7306 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7307 | } |
| 7308 | } |
| 7309 | |
| 7310 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_div_32_2pass_fulltile) { |
| 7311 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 7312 | GAvgPoolMicrokernelTester() |
| 7313 | .rows(14) |
| 7314 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7315 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7316 | } |
| 7317 | } |
| 7318 | |
| 7319 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_div_32_2pass_subtile) { |
| 7320 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 7321 | for (size_t rows = 8; rows < 14; rows++) { |
| 7322 | GAvgPoolMicrokernelTester() |
| 7323 | .rows(rows) |
| 7324 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7325 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7326 | } |
| 7327 | } |
| 7328 | } |
| 7329 | |
| 7330 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_div_32_multipass_fulltile) { |
| 7331 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 7332 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7333 | GAvgPoolMicrokernelTester() |
| 7334 | .rows(rows) |
| 7335 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7336 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7337 | } |
| 7338 | } |
| 7339 | } |
| 7340 | |
| 7341 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_div_32_multipass_fulltile_with_input_stride) { |
| 7342 | for (size_t channels = 64; channels < 256; channels += 32) { |
| 7343 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7344 | GAvgPoolMicrokernelTester() |
| 7345 | .rows(rows) |
| 7346 | .channels(channels) |
| 7347 | .input_stride(521) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7348 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7349 | } |
| 7350 | } |
| 7351 | } |
| 7352 | |
| 7353 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_lt_32_2pass_fulltile) { |
| 7354 | for (size_t channels = 1; channels < 32; channels++) { |
| 7355 | GAvgPoolMicrokernelTester() |
| 7356 | .rows(14) |
| 7357 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7358 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7359 | } |
| 7360 | } |
| 7361 | |
| 7362 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_lt_32_2pass_fulltile_with_qmax) { |
| 7363 | for (size_t channels = 1; channels < 32; channels++) { |
| 7364 | GAvgPoolMicrokernelTester() |
| 7365 | .rows(14) |
| 7366 | .channels(channels) |
| 7367 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7368 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7369 | } |
| 7370 | } |
| 7371 | |
| 7372 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_lt_32_2pass_fulltile_with_qmin) { |
| 7373 | for (size_t channels = 1; channels < 32; channels++) { |
| 7374 | GAvgPoolMicrokernelTester() |
| 7375 | .rows(14) |
| 7376 | .channels(channels) |
| 7377 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7378 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7379 | } |
| 7380 | } |
| 7381 | |
| 7382 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_lt_32_2pass_subtile) { |
| 7383 | for (size_t channels = 1; channels < 32; channels++) { |
| 7384 | for (size_t rows = 8; rows < 14; rows++) { |
| 7385 | GAvgPoolMicrokernelTester() |
| 7386 | .rows(rows) |
| 7387 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7388 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7389 | } |
| 7390 | } |
| 7391 | } |
| 7392 | |
| 7393 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_lt_32_multipass_fulltile) { |
| 7394 | for (size_t channels = 1; channels < 32; channels++) { |
| 7395 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7396 | GAvgPoolMicrokernelTester() |
| 7397 | .rows(rows) |
| 7398 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7399 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7400 | } |
| 7401 | } |
| 7402 | } |
| 7403 | |
| 7404 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_lt_32_multipass_fulltile_with_input_stride) { |
| 7405 | for (size_t channels = 1; channels < 32; channels++) { |
| 7406 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7407 | GAvgPoolMicrokernelTester() |
| 7408 | .rows(rows) |
| 7409 | .channels(channels) |
| 7410 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7411 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7412 | } |
| 7413 | } |
| 7414 | } |
| 7415 | |
| 7416 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_gt_32_2pass_fulltile) { |
| 7417 | for (size_t channels = 33; channels < 64; channels++) { |
| 7418 | GAvgPoolMicrokernelTester() |
| 7419 | .rows(14) |
| 7420 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7421 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7422 | } |
| 7423 | } |
| 7424 | |
| 7425 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_gt_32_2pass_fulltile_with_qmax) { |
| 7426 | for (size_t channels = 33; channels < 64; channels++) { |
| 7427 | GAvgPoolMicrokernelTester() |
| 7428 | .rows(14) |
| 7429 | .channels(channels) |
| 7430 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7431 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7432 | } |
| 7433 | } |
| 7434 | |
| 7435 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_gt_32_2pass_fulltile_with_qmin) { |
| 7436 | for (size_t channels = 33; channels < 64; channels++) { |
| 7437 | GAvgPoolMicrokernelTester() |
| 7438 | .rows(14) |
| 7439 | .channels(channels) |
| 7440 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7441 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7442 | } |
| 7443 | } |
| 7444 | |
| 7445 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_gt_32_2pass_subtile) { |
| 7446 | for (size_t channels = 33; channels < 64; channels++) { |
| 7447 | for (size_t rows = 8; rows < 14; rows++) { |
| 7448 | GAvgPoolMicrokernelTester() |
| 7449 | .rows(rows) |
| 7450 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7451 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7452 | } |
| 7453 | } |
| 7454 | } |
| 7455 | |
| 7456 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_gt_32_multipass_fulltile) { |
| 7457 | for (size_t channels = 33; channels < 64; channels++) { |
| 7458 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 7459 | GAvgPoolMicrokernelTester() |
| 7460 | .rows(rows) |
| 7461 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7462 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 9e258d6 | 2022-01-12 10:50:51 -0800 | [diff] [blame] | 7463 | } |
| 7464 | } |
| 7465 | } |
| 7466 | |
| 7467 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__WASMSIMD_C32, channels_gt_32_multipass_fulltile_with_input_stride) { |
| 7468 | for (size_t channels = 33; channels < 64; channels++) { |
| 7469 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 7470 | GAvgPoolMicrokernelTester() |
| 7471 | .rows(rows) |
| 7472 | .channels(channels) |
| 7473 | .input_stride(79) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7474 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__wasmsimd_c32, xnn_init_qs8_avgpool_minmax_fp32_wasmsimd_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7475 | } |
| 7476 | } |
| 7477 | } |
| 7478 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| 7479 | |
| 7480 | |
| 7481 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_eq_1_fulltile) { |
| 7482 | GAvgPoolMicrokernelTester() |
| 7483 | .rows(7) |
| 7484 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7485 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7486 | } |
| 7487 | |
| 7488 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_eq_1_subtile) { |
| 7489 | for (size_t rows = 1; rows < 7; rows++) { |
| 7490 | GAvgPoolMicrokernelTester() |
| 7491 | .rows(rows) |
| 7492 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7493 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7494 | } |
| 7495 | } |
| 7496 | |
| 7497 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_eq_1_fulltile_with_input_stride) { |
| 7498 | GAvgPoolMicrokernelTester() |
| 7499 | .rows(7) |
| 7500 | .channels(1) |
| 7501 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7502 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7503 | } |
| 7504 | |
| 7505 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_eq_1_fulltile_with_qmax) { |
| 7506 | GAvgPoolMicrokernelTester() |
| 7507 | .rows(7) |
| 7508 | .channels(1) |
| 7509 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7510 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7511 | } |
| 7512 | |
| 7513 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_eq_1_fulltile_with_qmin) { |
| 7514 | GAvgPoolMicrokernelTester() |
| 7515 | .rows(7) |
| 7516 | .channels(1) |
| 7517 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7518 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7519 | } |
| 7520 | |
| 7521 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_gt_1_fulltile) { |
| 7522 | for (size_t channels = 2; channels < 10; channels++) { |
| 7523 | GAvgPoolMicrokernelTester() |
| 7524 | .rows(7) |
| 7525 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7526 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7527 | } |
| 7528 | } |
| 7529 | |
| 7530 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_gt_1_subtile) { |
| 7531 | for (size_t channels = 2; channels < 10; channels++) { |
| 7532 | for (size_t rows = 1; rows < 7; rows++) { |
| 7533 | GAvgPoolMicrokernelTester() |
| 7534 | .rows(rows) |
| 7535 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7536 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7537 | } |
| 7538 | } |
| 7539 | } |
| 7540 | |
| 7541 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_gt_1_fulltile_with_qmax) { |
| 7542 | for (size_t channels = 2; channels < 10; channels++) { |
| 7543 | GAvgPoolMicrokernelTester() |
| 7544 | .rows(7) |
| 7545 | .channels(channels) |
| 7546 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7547 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7548 | } |
| 7549 | } |
| 7550 | |
| 7551 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C1, channels_gt_1_fulltile_with_qmin) { |
| 7552 | for (size_t channels = 2; channels < 10; channels++) { |
| 7553 | GAvgPoolMicrokernelTester() |
| 7554 | .rows(7) |
| 7555 | .channels(channels) |
| 7556 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7557 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7558 | } |
| 7559 | } |
| 7560 | |
| 7561 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_eq_2_fulltile) { |
| 7562 | GAvgPoolMicrokernelTester() |
| 7563 | .rows(7) |
| 7564 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7565 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7566 | } |
| 7567 | |
| 7568 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_eq_2_subtile) { |
| 7569 | for (size_t rows = 1; rows < 7; rows++) { |
| 7570 | GAvgPoolMicrokernelTester() |
| 7571 | .rows(rows) |
| 7572 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7573 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7574 | } |
| 7575 | } |
| 7576 | |
| 7577 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_eq_2_fulltile_with_input_stride) { |
| 7578 | GAvgPoolMicrokernelTester() |
| 7579 | .rows(7) |
| 7580 | .channels(2) |
| 7581 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7582 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7583 | } |
| 7584 | |
| 7585 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_eq_2_fulltile_with_qmax) { |
| 7586 | GAvgPoolMicrokernelTester() |
| 7587 | .rows(7) |
| 7588 | .channels(2) |
| 7589 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7590 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7591 | } |
| 7592 | |
| 7593 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_eq_2_fulltile_with_qmin) { |
| 7594 | GAvgPoolMicrokernelTester() |
| 7595 | .rows(7) |
| 7596 | .channels(2) |
| 7597 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7598 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7599 | } |
| 7600 | |
| 7601 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_div_2_fulltile) { |
| 7602 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 7603 | GAvgPoolMicrokernelTester() |
| 7604 | .rows(7) |
| 7605 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7606 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7607 | } |
| 7608 | } |
| 7609 | |
| 7610 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_div_2_subtile) { |
| 7611 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 7612 | for (size_t rows = 1; rows < 7; rows++) { |
| 7613 | GAvgPoolMicrokernelTester() |
| 7614 | .rows(rows) |
| 7615 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7616 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7617 | } |
| 7618 | } |
| 7619 | } |
| 7620 | |
| 7621 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_lt_2_fulltile) { |
| 7622 | for (size_t channels = 1; channels < 2; channels++) { |
| 7623 | GAvgPoolMicrokernelTester() |
| 7624 | .rows(7) |
| 7625 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7626 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7627 | } |
| 7628 | } |
| 7629 | |
| 7630 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_lt_2_subtile) { |
| 7631 | for (size_t channels = 1; channels < 2; channels++) { |
| 7632 | for (size_t rows = 1; rows < 7; rows++) { |
| 7633 | GAvgPoolMicrokernelTester() |
| 7634 | .rows(rows) |
| 7635 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7636 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7637 | } |
| 7638 | } |
| 7639 | } |
| 7640 | |
| 7641 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_lt_2_fulltile_with_qmax) { |
| 7642 | for (size_t channels = 1; channels < 2; channels++) { |
| 7643 | GAvgPoolMicrokernelTester() |
| 7644 | .rows(7) |
| 7645 | .channels(channels) |
| 7646 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7647 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7648 | } |
| 7649 | } |
| 7650 | |
| 7651 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_lt_2_fulltile_with_qmin) { |
| 7652 | for (size_t channels = 1; channels < 2; channels++) { |
| 7653 | GAvgPoolMicrokernelTester() |
| 7654 | .rows(7) |
| 7655 | .channels(channels) |
| 7656 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7657 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7658 | } |
| 7659 | } |
| 7660 | |
| 7661 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_gt_2_fulltile) { |
| 7662 | for (size_t channels = 3; channels < 4; channels++) { |
| 7663 | GAvgPoolMicrokernelTester() |
| 7664 | .rows(7) |
| 7665 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7666 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7667 | } |
| 7668 | } |
| 7669 | |
| 7670 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_gt_2_subtile) { |
| 7671 | for (size_t channels = 3; channels < 4; channels++) { |
| 7672 | for (size_t rows = 1; rows < 7; rows++) { |
| 7673 | GAvgPoolMicrokernelTester() |
| 7674 | .rows(rows) |
| 7675 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7676 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7677 | } |
| 7678 | } |
| 7679 | } |
| 7680 | |
| 7681 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_gt_2_fulltile_with_qmax) { |
| 7682 | for (size_t channels = 3; channels < 4; channels++) { |
| 7683 | GAvgPoolMicrokernelTester() |
| 7684 | .rows(7) |
| 7685 | .channels(channels) |
| 7686 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7687 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7688 | } |
| 7689 | } |
| 7690 | |
| 7691 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C2, channels_gt_2_fulltile_with_qmin) { |
| 7692 | for (size_t channels = 3; channels < 4; channels++) { |
| 7693 | GAvgPoolMicrokernelTester() |
| 7694 | .rows(7) |
| 7695 | .channels(channels) |
| 7696 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7697 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7698 | } |
| 7699 | } |
| 7700 | |
| 7701 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_eq_4_fulltile) { |
| 7702 | GAvgPoolMicrokernelTester() |
| 7703 | .rows(7) |
| 7704 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7705 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7706 | } |
| 7707 | |
| 7708 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_eq_4_subtile) { |
| 7709 | for (size_t rows = 1; rows < 7; rows++) { |
| 7710 | GAvgPoolMicrokernelTester() |
| 7711 | .rows(rows) |
| 7712 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7713 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7714 | } |
| 7715 | } |
| 7716 | |
| 7717 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_eq_4_fulltile_with_input_stride) { |
| 7718 | GAvgPoolMicrokernelTester() |
| 7719 | .rows(7) |
| 7720 | .channels(4) |
| 7721 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7722 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7723 | } |
| 7724 | |
| 7725 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_eq_4_fulltile_with_qmax) { |
| 7726 | GAvgPoolMicrokernelTester() |
| 7727 | .rows(7) |
| 7728 | .channels(4) |
| 7729 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7730 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7731 | } |
| 7732 | |
| 7733 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_eq_4_fulltile_with_qmin) { |
| 7734 | GAvgPoolMicrokernelTester() |
| 7735 | .rows(7) |
| 7736 | .channels(4) |
| 7737 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7738 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7739 | } |
| 7740 | |
| 7741 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_div_4_fulltile) { |
| 7742 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 7743 | GAvgPoolMicrokernelTester() |
| 7744 | .rows(7) |
| 7745 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7746 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7747 | } |
| 7748 | } |
| 7749 | |
| 7750 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_div_4_subtile) { |
| 7751 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 7752 | for (size_t rows = 1; rows < 7; rows++) { |
| 7753 | GAvgPoolMicrokernelTester() |
| 7754 | .rows(rows) |
| 7755 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7756 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7757 | } |
| 7758 | } |
| 7759 | } |
| 7760 | |
| 7761 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_lt_4_fulltile) { |
| 7762 | for (size_t channels = 1; channels < 4; channels++) { |
| 7763 | GAvgPoolMicrokernelTester() |
| 7764 | .rows(7) |
| 7765 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7766 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7767 | } |
| 7768 | } |
| 7769 | |
| 7770 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_lt_4_subtile) { |
| 7771 | for (size_t channels = 1; channels < 4; channels++) { |
| 7772 | for (size_t rows = 1; rows < 7; rows++) { |
| 7773 | GAvgPoolMicrokernelTester() |
| 7774 | .rows(rows) |
| 7775 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7776 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7777 | } |
| 7778 | } |
| 7779 | } |
| 7780 | |
| 7781 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_lt_4_fulltile_with_qmax) { |
| 7782 | for (size_t channels = 1; channels < 4; channels++) { |
| 7783 | GAvgPoolMicrokernelTester() |
| 7784 | .rows(7) |
| 7785 | .channels(channels) |
| 7786 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7787 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7788 | } |
| 7789 | } |
| 7790 | |
| 7791 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_lt_4_fulltile_with_qmin) { |
| 7792 | for (size_t channels = 1; channels < 4; channels++) { |
| 7793 | GAvgPoolMicrokernelTester() |
| 7794 | .rows(7) |
| 7795 | .channels(channels) |
| 7796 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7797 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7798 | } |
| 7799 | } |
| 7800 | |
| 7801 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_gt_4_fulltile) { |
| 7802 | for (size_t channels = 5; channels < 8; channels++) { |
| 7803 | GAvgPoolMicrokernelTester() |
| 7804 | .rows(7) |
| 7805 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7806 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7807 | } |
| 7808 | } |
| 7809 | |
| 7810 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_gt_4_subtile) { |
| 7811 | for (size_t channels = 5; channels < 8; channels++) { |
| 7812 | for (size_t rows = 1; rows < 7; rows++) { |
| 7813 | GAvgPoolMicrokernelTester() |
| 7814 | .rows(rows) |
| 7815 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7816 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7817 | } |
| 7818 | } |
| 7819 | } |
| 7820 | |
| 7821 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_gt_4_fulltile_with_qmax) { |
| 7822 | for (size_t channels = 5; channels < 8; channels++) { |
| 7823 | GAvgPoolMicrokernelTester() |
| 7824 | .rows(7) |
| 7825 | .channels(channels) |
| 7826 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7827 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7828 | } |
| 7829 | } |
| 7830 | |
| 7831 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_IMAGIC_C4, channels_gt_4_fulltile_with_qmin) { |
| 7832 | for (size_t channels = 5; channels < 8; channels++) { |
| 7833 | GAvgPoolMicrokernelTester() |
| 7834 | .rows(7) |
| 7835 | .channels(channels) |
| 7836 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7837 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7838 | } |
| 7839 | } |
| 7840 | |
| 7841 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_eq_1_2pass_fulltile) { |
| 7842 | GAvgPoolMicrokernelTester() |
| 7843 | .rows(14) |
| 7844 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7845 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7846 | } |
| 7847 | |
| 7848 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_eq_1_2pass_fulltile_with_input_stride) { |
| 7849 | GAvgPoolMicrokernelTester() |
| 7850 | .rows(14) |
| 7851 | .channels(1) |
| 7852 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7853 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7854 | } |
| 7855 | |
| 7856 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_eq_1_2pass_fulltile_with_qmax) { |
| 7857 | GAvgPoolMicrokernelTester() |
| 7858 | .rows(14) |
| 7859 | .channels(1) |
| 7860 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7861 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7862 | } |
| 7863 | |
| 7864 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_eq_1_2pass_fulltile_with_qmin) { |
| 7865 | GAvgPoolMicrokernelTester() |
| 7866 | .rows(14) |
| 7867 | .channels(1) |
| 7868 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7869 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7870 | } |
| 7871 | |
| 7872 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_eq_1_2pass_subtile) { |
| 7873 | for (size_t rows = 8; rows < 14; rows++) { |
| 7874 | GAvgPoolMicrokernelTester() |
| 7875 | .rows(rows) |
| 7876 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7877 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7878 | } |
| 7879 | } |
| 7880 | |
| 7881 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_eq_1_2pass_subtile_with_input_stride) { |
| 7882 | for (size_t rows = 8; rows < 14; rows++) { |
| 7883 | GAvgPoolMicrokernelTester() |
| 7884 | .rows(rows) |
| 7885 | .channels(1) |
| 7886 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7887 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7888 | } |
| 7889 | } |
| 7890 | |
| 7891 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_eq_1_multipass_fulltile) { |
| 7892 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7893 | GAvgPoolMicrokernelTester() |
| 7894 | .rows(rows) |
| 7895 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7896 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7897 | } |
| 7898 | } |
| 7899 | |
| 7900 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_eq_1_multipass_fulltile_with_input_stride) { |
| 7901 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7902 | GAvgPoolMicrokernelTester() |
| 7903 | .rows(rows) |
| 7904 | .channels(1) |
| 7905 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7906 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7907 | } |
| 7908 | } |
| 7909 | |
| 7910 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_div_1_2pass_fulltile) { |
| 7911 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 7912 | GAvgPoolMicrokernelTester() |
| 7913 | .rows(14) |
| 7914 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7915 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7916 | } |
| 7917 | } |
| 7918 | |
| 7919 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_div_1_2pass_subtile) { |
| 7920 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 7921 | for (size_t rows = 8; rows < 14; rows++) { |
| 7922 | GAvgPoolMicrokernelTester() |
| 7923 | .rows(rows) |
| 7924 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7925 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7926 | } |
| 7927 | } |
| 7928 | } |
| 7929 | |
| 7930 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_div_1_multipass_fulltile) { |
| 7931 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 7932 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7933 | GAvgPoolMicrokernelTester() |
| 7934 | .rows(rows) |
| 7935 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7936 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7937 | } |
| 7938 | } |
| 7939 | } |
| 7940 | |
| 7941 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_div_1_multipass_fulltile_with_input_stride) { |
| 7942 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 7943 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 7944 | GAvgPoolMicrokernelTester() |
| 7945 | .rows(rows) |
| 7946 | .channels(channels) |
| 7947 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7948 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7949 | } |
| 7950 | } |
| 7951 | } |
| 7952 | |
| 7953 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_gt_1_2pass_fulltile) { |
| 7954 | for (size_t channels = 2; channels < 10; channels++) { |
| 7955 | GAvgPoolMicrokernelTester() |
| 7956 | .rows(14) |
| 7957 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7958 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7959 | } |
| 7960 | } |
| 7961 | |
| 7962 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_gt_1_2pass_fulltile_with_qmax) { |
| 7963 | for (size_t channels = 2; channels < 10; channels++) { |
| 7964 | GAvgPoolMicrokernelTester() |
| 7965 | .rows(14) |
| 7966 | .channels(channels) |
| 7967 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7968 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7969 | } |
| 7970 | } |
| 7971 | |
| 7972 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_gt_1_2pass_fulltile_with_qmin) { |
| 7973 | for (size_t channels = 2; channels < 10; channels++) { |
| 7974 | GAvgPoolMicrokernelTester() |
| 7975 | .rows(14) |
| 7976 | .channels(channels) |
| 7977 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7978 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7979 | } |
| 7980 | } |
| 7981 | |
| 7982 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_gt_1_2pass_subtile) { |
| 7983 | for (size_t channels = 2; channels < 10; channels++) { |
| 7984 | for (size_t rows = 8; rows < 14; rows++) { |
| 7985 | GAvgPoolMicrokernelTester() |
| 7986 | .rows(rows) |
| 7987 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7988 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 7989 | } |
| 7990 | } |
| 7991 | } |
| 7992 | |
| 7993 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_gt_1_multipass_fulltile) { |
| 7994 | for (size_t channels = 2; channels < 10; channels++) { |
| 7995 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 7996 | GAvgPoolMicrokernelTester() |
| 7997 | .rows(rows) |
| 7998 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 7999 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8000 | } |
| 8001 | } |
| 8002 | } |
| 8003 | |
| 8004 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C1, channels_gt_1_multipass_fulltile_with_input_stride) { |
| 8005 | for (size_t channels = 2; channels < 10; channels++) { |
| 8006 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 8007 | GAvgPoolMicrokernelTester() |
| 8008 | .rows(rows) |
| 8009 | .channels(channels) |
| 8010 | .input_stride(17) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8011 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8012 | } |
| 8013 | } |
| 8014 | } |
| 8015 | |
| 8016 | |
| 8017 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_eq_2_2pass_fulltile) { |
| 8018 | GAvgPoolMicrokernelTester() |
| 8019 | .rows(14) |
| 8020 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8021 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8022 | } |
| 8023 | |
| 8024 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_eq_2_2pass_fulltile_with_input_stride) { |
| 8025 | GAvgPoolMicrokernelTester() |
| 8026 | .rows(14) |
| 8027 | .channels(2) |
| 8028 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8029 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8030 | } |
| 8031 | |
| 8032 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_eq_2_2pass_fulltile_with_qmax) { |
| 8033 | GAvgPoolMicrokernelTester() |
| 8034 | .rows(14) |
| 8035 | .channels(2) |
| 8036 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8037 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8038 | } |
| 8039 | |
| 8040 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_eq_2_2pass_fulltile_with_qmin) { |
| 8041 | GAvgPoolMicrokernelTester() |
| 8042 | .rows(14) |
| 8043 | .channels(2) |
| 8044 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8045 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8046 | } |
| 8047 | |
| 8048 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_eq_2_2pass_subtile) { |
| 8049 | for (size_t rows = 8; rows < 14; rows++) { |
| 8050 | GAvgPoolMicrokernelTester() |
| 8051 | .rows(rows) |
| 8052 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8053 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8054 | } |
| 8055 | } |
| 8056 | |
| 8057 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_eq_2_2pass_subtile_with_input_stride) { |
| 8058 | for (size_t rows = 8; rows < 14; rows++) { |
| 8059 | GAvgPoolMicrokernelTester() |
| 8060 | .rows(rows) |
| 8061 | .channels(2) |
| 8062 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8063 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8064 | } |
| 8065 | } |
| 8066 | |
| 8067 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_eq_2_multipass_fulltile) { |
| 8068 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8069 | GAvgPoolMicrokernelTester() |
| 8070 | .rows(rows) |
| 8071 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8072 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8073 | } |
| 8074 | } |
| 8075 | |
| 8076 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_eq_2_multipass_fulltile_with_input_stride) { |
| 8077 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8078 | GAvgPoolMicrokernelTester() |
| 8079 | .rows(rows) |
| 8080 | .channels(2) |
| 8081 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8082 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8083 | } |
| 8084 | } |
| 8085 | |
| 8086 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_div_2_2pass_fulltile) { |
| 8087 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 8088 | GAvgPoolMicrokernelTester() |
| 8089 | .rows(14) |
| 8090 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8091 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8092 | } |
| 8093 | } |
| 8094 | |
| 8095 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_div_2_2pass_subtile) { |
| 8096 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 8097 | for (size_t rows = 8; rows < 14; rows++) { |
| 8098 | GAvgPoolMicrokernelTester() |
| 8099 | .rows(rows) |
| 8100 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8101 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8102 | } |
| 8103 | } |
| 8104 | } |
| 8105 | |
| 8106 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_div_2_multipass_fulltile) { |
| 8107 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 8108 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8109 | GAvgPoolMicrokernelTester() |
| 8110 | .rows(rows) |
| 8111 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8112 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8113 | } |
| 8114 | } |
| 8115 | } |
| 8116 | |
| 8117 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_div_2_multipass_fulltile_with_input_stride) { |
| 8118 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 8119 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8120 | GAvgPoolMicrokernelTester() |
| 8121 | .rows(rows) |
| 8122 | .channels(channels) |
| 8123 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8124 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8125 | } |
| 8126 | } |
| 8127 | } |
| 8128 | |
| 8129 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_lt_2_2pass_fulltile) { |
| 8130 | for (size_t channels = 1; channels < 2; channels++) { |
| 8131 | GAvgPoolMicrokernelTester() |
| 8132 | .rows(14) |
| 8133 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8134 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8135 | } |
| 8136 | } |
| 8137 | |
| 8138 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_lt_2_2pass_fulltile_with_qmax) { |
| 8139 | for (size_t channels = 1; channels < 2; channels++) { |
| 8140 | GAvgPoolMicrokernelTester() |
| 8141 | .rows(14) |
| 8142 | .channels(channels) |
| 8143 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8144 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8145 | } |
| 8146 | } |
| 8147 | |
| 8148 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_lt_2_2pass_fulltile_with_qmin) { |
| 8149 | for (size_t channels = 1; channels < 2; channels++) { |
| 8150 | GAvgPoolMicrokernelTester() |
| 8151 | .rows(14) |
| 8152 | .channels(channels) |
| 8153 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8154 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8155 | } |
| 8156 | } |
| 8157 | |
| 8158 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_lt_2_2pass_subtile) { |
| 8159 | for (size_t channels = 1; channels < 2; channels++) { |
| 8160 | for (size_t rows = 8; rows < 14; rows++) { |
| 8161 | GAvgPoolMicrokernelTester() |
| 8162 | .rows(rows) |
| 8163 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8164 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8165 | } |
| 8166 | } |
| 8167 | } |
| 8168 | |
| 8169 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_lt_2_multipass_fulltile) { |
| 8170 | for (size_t channels = 1; channels < 2; channels++) { |
| 8171 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8172 | GAvgPoolMicrokernelTester() |
| 8173 | .rows(rows) |
| 8174 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8175 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8176 | } |
| 8177 | } |
| 8178 | } |
| 8179 | |
| 8180 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_lt_2_multipass_fulltile_with_input_stride) { |
| 8181 | for (size_t channels = 1; channels < 2; channels++) { |
| 8182 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8183 | GAvgPoolMicrokernelTester() |
| 8184 | .rows(rows) |
| 8185 | .channels(channels) |
| 8186 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8187 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8188 | } |
| 8189 | } |
| 8190 | } |
| 8191 | |
| 8192 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_gt_2_2pass_fulltile) { |
| 8193 | for (size_t channels = 3; channels < 4; channels++) { |
| 8194 | GAvgPoolMicrokernelTester() |
| 8195 | .rows(14) |
| 8196 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8197 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8198 | } |
| 8199 | } |
| 8200 | |
| 8201 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_gt_2_2pass_fulltile_with_qmax) { |
| 8202 | for (size_t channels = 3; channels < 4; channels++) { |
| 8203 | GAvgPoolMicrokernelTester() |
| 8204 | .rows(14) |
| 8205 | .channels(channels) |
| 8206 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8207 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8208 | } |
| 8209 | } |
| 8210 | |
| 8211 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_gt_2_2pass_fulltile_with_qmin) { |
| 8212 | for (size_t channels = 3; channels < 4; channels++) { |
| 8213 | GAvgPoolMicrokernelTester() |
| 8214 | .rows(14) |
| 8215 | .channels(channels) |
| 8216 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8217 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8218 | } |
| 8219 | } |
| 8220 | |
| 8221 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_gt_2_2pass_subtile) { |
| 8222 | for (size_t channels = 3; channels < 4; channels++) { |
| 8223 | for (size_t rows = 8; rows < 14; rows++) { |
| 8224 | GAvgPoolMicrokernelTester() |
| 8225 | .rows(rows) |
| 8226 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8227 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8228 | } |
| 8229 | } |
| 8230 | } |
| 8231 | |
| 8232 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_gt_2_multipass_fulltile) { |
| 8233 | for (size_t channels = 3; channels < 4; channels++) { |
| 8234 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 8235 | GAvgPoolMicrokernelTester() |
| 8236 | .rows(rows) |
| 8237 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8238 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8239 | } |
| 8240 | } |
| 8241 | } |
| 8242 | |
| 8243 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C2, channels_gt_2_multipass_fulltile_with_input_stride) { |
| 8244 | for (size_t channels = 3; channels < 4; channels++) { |
| 8245 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 8246 | GAvgPoolMicrokernelTester() |
| 8247 | .rows(rows) |
| 8248 | .channels(channels) |
| 8249 | .input_stride(17) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8250 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8251 | } |
| 8252 | } |
| 8253 | } |
| 8254 | |
| 8255 | |
| 8256 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_eq_4_2pass_fulltile) { |
| 8257 | GAvgPoolMicrokernelTester() |
| 8258 | .rows(14) |
| 8259 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8260 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8261 | } |
| 8262 | |
| 8263 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_eq_4_2pass_fulltile_with_input_stride) { |
| 8264 | GAvgPoolMicrokernelTester() |
| 8265 | .rows(14) |
| 8266 | .channels(4) |
| 8267 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8268 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8269 | } |
| 8270 | |
| 8271 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_eq_4_2pass_fulltile_with_qmax) { |
| 8272 | GAvgPoolMicrokernelTester() |
| 8273 | .rows(14) |
| 8274 | .channels(4) |
| 8275 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8276 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8277 | } |
| 8278 | |
| 8279 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_eq_4_2pass_fulltile_with_qmin) { |
| 8280 | GAvgPoolMicrokernelTester() |
| 8281 | .rows(14) |
| 8282 | .channels(4) |
| 8283 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8284 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8285 | } |
| 8286 | |
| 8287 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_eq_4_2pass_subtile) { |
| 8288 | for (size_t rows = 8; rows < 14; rows++) { |
| 8289 | GAvgPoolMicrokernelTester() |
| 8290 | .rows(rows) |
| 8291 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8292 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8293 | } |
| 8294 | } |
| 8295 | |
| 8296 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_eq_4_2pass_subtile_with_input_stride) { |
| 8297 | for (size_t rows = 8; rows < 14; rows++) { |
| 8298 | GAvgPoolMicrokernelTester() |
| 8299 | .rows(rows) |
| 8300 | .channels(4) |
| 8301 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8302 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8303 | } |
| 8304 | } |
| 8305 | |
| 8306 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_eq_4_multipass_fulltile) { |
| 8307 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8308 | GAvgPoolMicrokernelTester() |
| 8309 | .rows(rows) |
| 8310 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8311 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8312 | } |
| 8313 | } |
| 8314 | |
| 8315 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_eq_4_multipass_fulltile_with_input_stride) { |
| 8316 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8317 | GAvgPoolMicrokernelTester() |
| 8318 | .rows(rows) |
| 8319 | .channels(4) |
| 8320 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8321 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8322 | } |
| 8323 | } |
| 8324 | |
| 8325 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_div_4_2pass_fulltile) { |
| 8326 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 8327 | GAvgPoolMicrokernelTester() |
| 8328 | .rows(14) |
| 8329 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8330 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8331 | } |
| 8332 | } |
| 8333 | |
| 8334 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_div_4_2pass_subtile) { |
| 8335 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 8336 | for (size_t rows = 8; rows < 14; rows++) { |
| 8337 | GAvgPoolMicrokernelTester() |
| 8338 | .rows(rows) |
| 8339 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8340 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8341 | } |
| 8342 | } |
| 8343 | } |
| 8344 | |
| 8345 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_div_4_multipass_fulltile) { |
| 8346 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 8347 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8348 | GAvgPoolMicrokernelTester() |
| 8349 | .rows(rows) |
| 8350 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8351 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8352 | } |
| 8353 | } |
| 8354 | } |
| 8355 | |
| 8356 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_div_4_multipass_fulltile_with_input_stride) { |
| 8357 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 8358 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8359 | GAvgPoolMicrokernelTester() |
| 8360 | .rows(rows) |
| 8361 | .channels(channels) |
| 8362 | .input_stride(67) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8363 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8364 | } |
| 8365 | } |
| 8366 | } |
| 8367 | |
| 8368 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_lt_4_2pass_fulltile) { |
| 8369 | for (size_t channels = 1; channels < 4; channels++) { |
| 8370 | GAvgPoolMicrokernelTester() |
| 8371 | .rows(14) |
| 8372 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8373 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8374 | } |
| 8375 | } |
| 8376 | |
| 8377 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_lt_4_2pass_fulltile_with_qmax) { |
| 8378 | for (size_t channels = 1; channels < 4; channels++) { |
| 8379 | GAvgPoolMicrokernelTester() |
| 8380 | .rows(14) |
| 8381 | .channels(channels) |
| 8382 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8383 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8384 | } |
| 8385 | } |
| 8386 | |
| 8387 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_lt_4_2pass_fulltile_with_qmin) { |
| 8388 | for (size_t channels = 1; channels < 4; channels++) { |
| 8389 | GAvgPoolMicrokernelTester() |
| 8390 | .rows(14) |
| 8391 | .channels(channels) |
| 8392 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8393 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8394 | } |
| 8395 | } |
| 8396 | |
| 8397 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_lt_4_2pass_subtile) { |
| 8398 | for (size_t channels = 1; channels < 4; channels++) { |
| 8399 | for (size_t rows = 8; rows < 14; rows++) { |
| 8400 | GAvgPoolMicrokernelTester() |
| 8401 | .rows(rows) |
| 8402 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8403 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8404 | } |
| 8405 | } |
| 8406 | } |
| 8407 | |
| 8408 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_lt_4_multipass_fulltile) { |
| 8409 | for (size_t channels = 1; channels < 4; channels++) { |
| 8410 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8411 | GAvgPoolMicrokernelTester() |
| 8412 | .rows(rows) |
| 8413 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8414 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8415 | } |
| 8416 | } |
| 8417 | } |
| 8418 | |
| 8419 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_lt_4_multipass_fulltile_with_input_stride) { |
| 8420 | for (size_t channels = 1; channels < 4; channels++) { |
| 8421 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8422 | GAvgPoolMicrokernelTester() |
| 8423 | .rows(rows) |
| 8424 | .channels(channels) |
| 8425 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8426 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8427 | } |
| 8428 | } |
| 8429 | } |
| 8430 | |
| 8431 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_gt_4_2pass_fulltile) { |
| 8432 | for (size_t channels = 5; channels < 8; channels++) { |
| 8433 | GAvgPoolMicrokernelTester() |
| 8434 | .rows(14) |
| 8435 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8436 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8437 | } |
| 8438 | } |
| 8439 | |
| 8440 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_gt_4_2pass_fulltile_with_qmax) { |
| 8441 | for (size_t channels = 5; channels < 8; channels++) { |
| 8442 | GAvgPoolMicrokernelTester() |
| 8443 | .rows(14) |
| 8444 | .channels(channels) |
| 8445 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8446 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8447 | } |
| 8448 | } |
| 8449 | |
| 8450 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_gt_4_2pass_fulltile_with_qmin) { |
| 8451 | for (size_t channels = 5; channels < 8; channels++) { |
| 8452 | GAvgPoolMicrokernelTester() |
| 8453 | .rows(14) |
| 8454 | .channels(channels) |
| 8455 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8456 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8457 | } |
| 8458 | } |
| 8459 | |
| 8460 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_gt_4_2pass_subtile) { |
| 8461 | for (size_t channels = 5; channels < 8; channels++) { |
| 8462 | for (size_t rows = 8; rows < 14; rows++) { |
| 8463 | GAvgPoolMicrokernelTester() |
| 8464 | .rows(rows) |
| 8465 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8466 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8467 | } |
| 8468 | } |
| 8469 | } |
| 8470 | |
| 8471 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_gt_4_multipass_fulltile) { |
| 8472 | for (size_t channels = 5; channels < 8; channels++) { |
| 8473 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 8474 | GAvgPoolMicrokernelTester() |
| 8475 | .rows(rows) |
| 8476 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8477 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8478 | } |
| 8479 | } |
| 8480 | } |
| 8481 | |
| 8482 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_IMAGIC_C4, channels_gt_4_multipass_fulltile_with_input_stride) { |
| 8483 | for (size_t channels = 5; channels < 8; channels++) { |
| 8484 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 8485 | GAvgPoolMicrokernelTester() |
| 8486 | .rows(rows) |
| 8487 | .channels(channels) |
| 8488 | .input_stride(23) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8489 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_imagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_imagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | 847ff5e | 2022-01-11 20:31:06 -0800 | [diff] [blame] | 8490 | } |
| 8491 | } |
| 8492 | } |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8493 | |
| 8494 | |
| 8495 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_eq_1_fulltile) { |
| 8496 | GAvgPoolMicrokernelTester() |
| 8497 | .rows(7) |
| 8498 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8499 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8500 | } |
| 8501 | |
| 8502 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_eq_1_subtile) { |
| 8503 | for (size_t rows = 1; rows < 7; rows++) { |
| 8504 | GAvgPoolMicrokernelTester() |
| 8505 | .rows(rows) |
| 8506 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8507 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8508 | } |
| 8509 | } |
| 8510 | |
| 8511 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_eq_1_fulltile_with_input_stride) { |
| 8512 | GAvgPoolMicrokernelTester() |
| 8513 | .rows(7) |
| 8514 | .channels(1) |
| 8515 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8516 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8517 | } |
| 8518 | |
| 8519 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_eq_1_fulltile_with_qmax) { |
| 8520 | GAvgPoolMicrokernelTester() |
| 8521 | .rows(7) |
| 8522 | .channels(1) |
| 8523 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8524 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8525 | } |
| 8526 | |
| 8527 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_eq_1_fulltile_with_qmin) { |
| 8528 | GAvgPoolMicrokernelTester() |
| 8529 | .rows(7) |
| 8530 | .channels(1) |
| 8531 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8532 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8533 | } |
| 8534 | |
| 8535 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_gt_1_fulltile) { |
| 8536 | for (size_t channels = 2; channels < 10; channels++) { |
| 8537 | GAvgPoolMicrokernelTester() |
| 8538 | .rows(7) |
| 8539 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8540 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8541 | } |
| 8542 | } |
| 8543 | |
| 8544 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_gt_1_subtile) { |
| 8545 | for (size_t channels = 2; channels < 10; channels++) { |
| 8546 | for (size_t rows = 1; rows < 7; rows++) { |
| 8547 | GAvgPoolMicrokernelTester() |
| 8548 | .rows(rows) |
| 8549 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8550 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8551 | } |
| 8552 | } |
| 8553 | } |
| 8554 | |
| 8555 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_gt_1_fulltile_with_qmax) { |
| 8556 | for (size_t channels = 2; channels < 10; channels++) { |
| 8557 | GAvgPoolMicrokernelTester() |
| 8558 | .rows(7) |
| 8559 | .channels(channels) |
| 8560 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8561 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8562 | } |
| 8563 | } |
| 8564 | |
| 8565 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C1, channels_gt_1_fulltile_with_qmin) { |
| 8566 | for (size_t channels = 2; channels < 10; channels++) { |
| 8567 | GAvgPoolMicrokernelTester() |
| 8568 | .rows(7) |
| 8569 | .channels(channels) |
| 8570 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8571 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8572 | } |
| 8573 | } |
| 8574 | |
| 8575 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_eq_2_fulltile) { |
| 8576 | GAvgPoolMicrokernelTester() |
| 8577 | .rows(7) |
| 8578 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8579 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8580 | } |
| 8581 | |
| 8582 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_eq_2_subtile) { |
| 8583 | for (size_t rows = 1; rows < 7; rows++) { |
| 8584 | GAvgPoolMicrokernelTester() |
| 8585 | .rows(rows) |
| 8586 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8587 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8588 | } |
| 8589 | } |
| 8590 | |
| 8591 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_eq_2_fulltile_with_input_stride) { |
| 8592 | GAvgPoolMicrokernelTester() |
| 8593 | .rows(7) |
| 8594 | .channels(2) |
| 8595 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8596 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8597 | } |
| 8598 | |
| 8599 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_eq_2_fulltile_with_qmax) { |
| 8600 | GAvgPoolMicrokernelTester() |
| 8601 | .rows(7) |
| 8602 | .channels(2) |
| 8603 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8604 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8605 | } |
| 8606 | |
| 8607 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_eq_2_fulltile_with_qmin) { |
| 8608 | GAvgPoolMicrokernelTester() |
| 8609 | .rows(7) |
| 8610 | .channels(2) |
| 8611 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8612 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8613 | } |
| 8614 | |
| 8615 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_div_2_fulltile) { |
| 8616 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 8617 | GAvgPoolMicrokernelTester() |
| 8618 | .rows(7) |
| 8619 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8620 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8621 | } |
| 8622 | } |
| 8623 | |
| 8624 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_div_2_subtile) { |
| 8625 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 8626 | for (size_t rows = 1; rows < 7; rows++) { |
| 8627 | GAvgPoolMicrokernelTester() |
| 8628 | .rows(rows) |
| 8629 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8630 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8631 | } |
| 8632 | } |
| 8633 | } |
| 8634 | |
| 8635 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_lt_2_fulltile) { |
| 8636 | for (size_t channels = 1; channels < 2; channels++) { |
| 8637 | GAvgPoolMicrokernelTester() |
| 8638 | .rows(7) |
| 8639 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8640 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8641 | } |
| 8642 | } |
| 8643 | |
| 8644 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_lt_2_subtile) { |
| 8645 | for (size_t channels = 1; channels < 2; channels++) { |
| 8646 | for (size_t rows = 1; rows < 7; rows++) { |
| 8647 | GAvgPoolMicrokernelTester() |
| 8648 | .rows(rows) |
| 8649 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8650 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8651 | } |
| 8652 | } |
| 8653 | } |
| 8654 | |
| 8655 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_lt_2_fulltile_with_qmax) { |
| 8656 | for (size_t channels = 1; channels < 2; channels++) { |
| 8657 | GAvgPoolMicrokernelTester() |
| 8658 | .rows(7) |
| 8659 | .channels(channels) |
| 8660 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8661 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8662 | } |
| 8663 | } |
| 8664 | |
| 8665 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_lt_2_fulltile_with_qmin) { |
| 8666 | for (size_t channels = 1; channels < 2; channels++) { |
| 8667 | GAvgPoolMicrokernelTester() |
| 8668 | .rows(7) |
| 8669 | .channels(channels) |
| 8670 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8671 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8672 | } |
| 8673 | } |
| 8674 | |
| 8675 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_gt_2_fulltile) { |
| 8676 | for (size_t channels = 3; channels < 4; channels++) { |
| 8677 | GAvgPoolMicrokernelTester() |
| 8678 | .rows(7) |
| 8679 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8680 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8681 | } |
| 8682 | } |
| 8683 | |
| 8684 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_gt_2_subtile) { |
| 8685 | for (size_t channels = 3; channels < 4; channels++) { |
| 8686 | for (size_t rows = 1; rows < 7; rows++) { |
| 8687 | GAvgPoolMicrokernelTester() |
| 8688 | .rows(rows) |
| 8689 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8690 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8691 | } |
| 8692 | } |
| 8693 | } |
| 8694 | |
| 8695 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_gt_2_fulltile_with_qmax) { |
| 8696 | for (size_t channels = 3; channels < 4; channels++) { |
| 8697 | GAvgPoolMicrokernelTester() |
| 8698 | .rows(7) |
| 8699 | .channels(channels) |
| 8700 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8701 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8702 | } |
| 8703 | } |
| 8704 | |
| 8705 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C2, channels_gt_2_fulltile_with_qmin) { |
| 8706 | for (size_t channels = 3; channels < 4; channels++) { |
| 8707 | GAvgPoolMicrokernelTester() |
| 8708 | .rows(7) |
| 8709 | .channels(channels) |
| 8710 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8711 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8712 | } |
| 8713 | } |
| 8714 | |
| 8715 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_eq_4_fulltile) { |
| 8716 | GAvgPoolMicrokernelTester() |
| 8717 | .rows(7) |
| 8718 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8719 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8720 | } |
| 8721 | |
| 8722 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_eq_4_subtile) { |
| 8723 | for (size_t rows = 1; rows < 7; rows++) { |
| 8724 | GAvgPoolMicrokernelTester() |
| 8725 | .rows(rows) |
| 8726 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8727 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8728 | } |
| 8729 | } |
| 8730 | |
| 8731 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_eq_4_fulltile_with_input_stride) { |
| 8732 | GAvgPoolMicrokernelTester() |
| 8733 | .rows(7) |
| 8734 | .channels(4) |
| 8735 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8736 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8737 | } |
| 8738 | |
| 8739 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_eq_4_fulltile_with_qmax) { |
| 8740 | GAvgPoolMicrokernelTester() |
| 8741 | .rows(7) |
| 8742 | .channels(4) |
| 8743 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8744 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8745 | } |
| 8746 | |
| 8747 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_eq_4_fulltile_with_qmin) { |
| 8748 | GAvgPoolMicrokernelTester() |
| 8749 | .rows(7) |
| 8750 | .channels(4) |
| 8751 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8752 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8753 | } |
| 8754 | |
| 8755 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_div_4_fulltile) { |
| 8756 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 8757 | GAvgPoolMicrokernelTester() |
| 8758 | .rows(7) |
| 8759 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8760 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8761 | } |
| 8762 | } |
| 8763 | |
| 8764 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_div_4_subtile) { |
| 8765 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 8766 | for (size_t rows = 1; rows < 7; rows++) { |
| 8767 | GAvgPoolMicrokernelTester() |
| 8768 | .rows(rows) |
| 8769 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8770 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8771 | } |
| 8772 | } |
| 8773 | } |
| 8774 | |
| 8775 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_lt_4_fulltile) { |
| 8776 | for (size_t channels = 1; channels < 4; channels++) { |
| 8777 | GAvgPoolMicrokernelTester() |
| 8778 | .rows(7) |
| 8779 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8780 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8781 | } |
| 8782 | } |
| 8783 | |
| 8784 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_lt_4_subtile) { |
| 8785 | for (size_t channels = 1; channels < 4; channels++) { |
| 8786 | for (size_t rows = 1; rows < 7; rows++) { |
| 8787 | GAvgPoolMicrokernelTester() |
| 8788 | .rows(rows) |
| 8789 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8790 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8791 | } |
| 8792 | } |
| 8793 | } |
| 8794 | |
| 8795 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_lt_4_fulltile_with_qmax) { |
| 8796 | for (size_t channels = 1; channels < 4; channels++) { |
| 8797 | GAvgPoolMicrokernelTester() |
| 8798 | .rows(7) |
| 8799 | .channels(channels) |
| 8800 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8801 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8802 | } |
| 8803 | } |
| 8804 | |
| 8805 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_lt_4_fulltile_with_qmin) { |
| 8806 | for (size_t channels = 1; channels < 4; channels++) { |
| 8807 | GAvgPoolMicrokernelTester() |
| 8808 | .rows(7) |
| 8809 | .channels(channels) |
| 8810 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8811 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8812 | } |
| 8813 | } |
| 8814 | |
| 8815 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_gt_4_fulltile) { |
| 8816 | for (size_t channels = 5; channels < 8; channels++) { |
| 8817 | GAvgPoolMicrokernelTester() |
| 8818 | .rows(7) |
| 8819 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8820 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8821 | } |
| 8822 | } |
| 8823 | |
| 8824 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_gt_4_subtile) { |
| 8825 | for (size_t channels = 5; channels < 8; channels++) { |
| 8826 | for (size_t rows = 1; rows < 7; rows++) { |
| 8827 | GAvgPoolMicrokernelTester() |
| 8828 | .rows(rows) |
| 8829 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8830 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8831 | } |
| 8832 | } |
| 8833 | } |
| 8834 | |
| 8835 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_gt_4_fulltile_with_qmax) { |
| 8836 | for (size_t channels = 5; channels < 8; channels++) { |
| 8837 | GAvgPoolMicrokernelTester() |
| 8838 | .rows(7) |
| 8839 | .channels(channels) |
| 8840 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8841 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8842 | } |
| 8843 | } |
| 8844 | |
| 8845 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_FMAGIC_C4, channels_gt_4_fulltile_with_qmin) { |
| 8846 | for (size_t channels = 5; channels < 8; channels++) { |
| 8847 | GAvgPoolMicrokernelTester() |
| 8848 | .rows(7) |
| 8849 | .channels(channels) |
| 8850 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8851 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8852 | } |
| 8853 | } |
| 8854 | |
| 8855 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_eq_1_2pass_fulltile) { |
| 8856 | GAvgPoolMicrokernelTester() |
| 8857 | .rows(14) |
| 8858 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8859 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8860 | } |
| 8861 | |
| 8862 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_eq_1_2pass_fulltile_with_input_stride) { |
| 8863 | GAvgPoolMicrokernelTester() |
| 8864 | .rows(14) |
| 8865 | .channels(1) |
| 8866 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8867 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8868 | } |
| 8869 | |
| 8870 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_eq_1_2pass_fulltile_with_qmax) { |
| 8871 | GAvgPoolMicrokernelTester() |
| 8872 | .rows(14) |
| 8873 | .channels(1) |
| 8874 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8875 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8876 | } |
| 8877 | |
| 8878 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_eq_1_2pass_fulltile_with_qmin) { |
| 8879 | GAvgPoolMicrokernelTester() |
| 8880 | .rows(14) |
| 8881 | .channels(1) |
| 8882 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8883 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8884 | } |
| 8885 | |
| 8886 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_eq_1_2pass_subtile) { |
| 8887 | for (size_t rows = 8; rows < 14; rows++) { |
| 8888 | GAvgPoolMicrokernelTester() |
| 8889 | .rows(rows) |
| 8890 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8891 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8892 | } |
| 8893 | } |
| 8894 | |
| 8895 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_eq_1_2pass_subtile_with_input_stride) { |
| 8896 | for (size_t rows = 8; rows < 14; rows++) { |
| 8897 | GAvgPoolMicrokernelTester() |
| 8898 | .rows(rows) |
| 8899 | .channels(1) |
| 8900 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8901 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8902 | } |
| 8903 | } |
| 8904 | |
| 8905 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_eq_1_multipass_fulltile) { |
| 8906 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8907 | GAvgPoolMicrokernelTester() |
| 8908 | .rows(rows) |
| 8909 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8910 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8911 | } |
| 8912 | } |
| 8913 | |
| 8914 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_eq_1_multipass_fulltile_with_input_stride) { |
| 8915 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8916 | GAvgPoolMicrokernelTester() |
| 8917 | .rows(rows) |
| 8918 | .channels(1) |
| 8919 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8920 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8921 | } |
| 8922 | } |
| 8923 | |
| 8924 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_div_1_2pass_fulltile) { |
| 8925 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 8926 | GAvgPoolMicrokernelTester() |
| 8927 | .rows(14) |
| 8928 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8929 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8930 | } |
| 8931 | } |
| 8932 | |
| 8933 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_div_1_2pass_subtile) { |
| 8934 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 8935 | for (size_t rows = 8; rows < 14; rows++) { |
| 8936 | GAvgPoolMicrokernelTester() |
| 8937 | .rows(rows) |
| 8938 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8939 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8940 | } |
| 8941 | } |
| 8942 | } |
| 8943 | |
| 8944 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_div_1_multipass_fulltile) { |
| 8945 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 8946 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8947 | GAvgPoolMicrokernelTester() |
| 8948 | .rows(rows) |
| 8949 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8950 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8951 | } |
| 8952 | } |
| 8953 | } |
| 8954 | |
| 8955 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_div_1_multipass_fulltile_with_input_stride) { |
| 8956 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 8957 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 8958 | GAvgPoolMicrokernelTester() |
| 8959 | .rows(rows) |
| 8960 | .channels(channels) |
| 8961 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8962 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8963 | } |
| 8964 | } |
| 8965 | } |
| 8966 | |
| 8967 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_gt_1_2pass_fulltile) { |
| 8968 | for (size_t channels = 2; channels < 10; channels++) { |
| 8969 | GAvgPoolMicrokernelTester() |
| 8970 | .rows(14) |
| 8971 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8972 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8973 | } |
| 8974 | } |
| 8975 | |
| 8976 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_gt_1_2pass_fulltile_with_qmax) { |
| 8977 | for (size_t channels = 2; channels < 10; channels++) { |
| 8978 | GAvgPoolMicrokernelTester() |
| 8979 | .rows(14) |
| 8980 | .channels(channels) |
| 8981 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8982 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8983 | } |
| 8984 | } |
| 8985 | |
| 8986 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_gt_1_2pass_fulltile_with_qmin) { |
| 8987 | for (size_t channels = 2; channels < 10; channels++) { |
| 8988 | GAvgPoolMicrokernelTester() |
| 8989 | .rows(14) |
| 8990 | .channels(channels) |
| 8991 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 8992 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 8993 | } |
| 8994 | } |
| 8995 | |
| 8996 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_gt_1_2pass_subtile) { |
| 8997 | for (size_t channels = 2; channels < 10; channels++) { |
| 8998 | for (size_t rows = 8; rows < 14; rows++) { |
| 8999 | GAvgPoolMicrokernelTester() |
| 9000 | .rows(rows) |
| 9001 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9002 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9003 | } |
| 9004 | } |
| 9005 | } |
| 9006 | |
| 9007 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_gt_1_multipass_fulltile) { |
| 9008 | for (size_t channels = 2; channels < 10; channels++) { |
| 9009 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 9010 | GAvgPoolMicrokernelTester() |
| 9011 | .rows(rows) |
| 9012 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9013 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9014 | } |
| 9015 | } |
| 9016 | } |
| 9017 | |
| 9018 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C1, channels_gt_1_multipass_fulltile_with_input_stride) { |
| 9019 | for (size_t channels = 2; channels < 10; channels++) { |
| 9020 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 9021 | GAvgPoolMicrokernelTester() |
| 9022 | .rows(rows) |
| 9023 | .channels(channels) |
| 9024 | .input_stride(17) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9025 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9026 | } |
| 9027 | } |
| 9028 | } |
| 9029 | |
| 9030 | |
| 9031 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_eq_2_2pass_fulltile) { |
| 9032 | GAvgPoolMicrokernelTester() |
| 9033 | .rows(14) |
| 9034 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9035 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9036 | } |
| 9037 | |
| 9038 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_eq_2_2pass_fulltile_with_input_stride) { |
| 9039 | GAvgPoolMicrokernelTester() |
| 9040 | .rows(14) |
| 9041 | .channels(2) |
| 9042 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9043 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9044 | } |
| 9045 | |
| 9046 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_eq_2_2pass_fulltile_with_qmax) { |
| 9047 | GAvgPoolMicrokernelTester() |
| 9048 | .rows(14) |
| 9049 | .channels(2) |
| 9050 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9051 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9052 | } |
| 9053 | |
| 9054 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_eq_2_2pass_fulltile_with_qmin) { |
| 9055 | GAvgPoolMicrokernelTester() |
| 9056 | .rows(14) |
| 9057 | .channels(2) |
| 9058 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9059 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9060 | } |
| 9061 | |
| 9062 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_eq_2_2pass_subtile) { |
| 9063 | for (size_t rows = 8; rows < 14; rows++) { |
| 9064 | GAvgPoolMicrokernelTester() |
| 9065 | .rows(rows) |
| 9066 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9067 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9068 | } |
| 9069 | } |
| 9070 | |
| 9071 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_eq_2_2pass_subtile_with_input_stride) { |
| 9072 | for (size_t rows = 8; rows < 14; rows++) { |
| 9073 | GAvgPoolMicrokernelTester() |
| 9074 | .rows(rows) |
| 9075 | .channels(2) |
| 9076 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9077 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9078 | } |
| 9079 | } |
| 9080 | |
| 9081 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_eq_2_multipass_fulltile) { |
| 9082 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9083 | GAvgPoolMicrokernelTester() |
| 9084 | .rows(rows) |
| 9085 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9086 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9087 | } |
| 9088 | } |
| 9089 | |
| 9090 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_eq_2_multipass_fulltile_with_input_stride) { |
| 9091 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9092 | GAvgPoolMicrokernelTester() |
| 9093 | .rows(rows) |
| 9094 | .channels(2) |
| 9095 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9096 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9097 | } |
| 9098 | } |
| 9099 | |
| 9100 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_div_2_2pass_fulltile) { |
| 9101 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 9102 | GAvgPoolMicrokernelTester() |
| 9103 | .rows(14) |
| 9104 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9105 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9106 | } |
| 9107 | } |
| 9108 | |
| 9109 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_div_2_2pass_subtile) { |
| 9110 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 9111 | for (size_t rows = 8; rows < 14; rows++) { |
| 9112 | GAvgPoolMicrokernelTester() |
| 9113 | .rows(rows) |
| 9114 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9115 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9116 | } |
| 9117 | } |
| 9118 | } |
| 9119 | |
| 9120 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_div_2_multipass_fulltile) { |
| 9121 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 9122 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9123 | GAvgPoolMicrokernelTester() |
| 9124 | .rows(rows) |
| 9125 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9126 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9127 | } |
| 9128 | } |
| 9129 | } |
| 9130 | |
| 9131 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_div_2_multipass_fulltile_with_input_stride) { |
| 9132 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 9133 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9134 | GAvgPoolMicrokernelTester() |
| 9135 | .rows(rows) |
| 9136 | .channels(channels) |
| 9137 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9138 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9139 | } |
| 9140 | } |
| 9141 | } |
| 9142 | |
| 9143 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_lt_2_2pass_fulltile) { |
| 9144 | for (size_t channels = 1; channels < 2; channels++) { |
| 9145 | GAvgPoolMicrokernelTester() |
| 9146 | .rows(14) |
| 9147 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9148 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9149 | } |
| 9150 | } |
| 9151 | |
| 9152 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_lt_2_2pass_fulltile_with_qmax) { |
| 9153 | for (size_t channels = 1; channels < 2; channels++) { |
| 9154 | GAvgPoolMicrokernelTester() |
| 9155 | .rows(14) |
| 9156 | .channels(channels) |
| 9157 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9158 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9159 | } |
| 9160 | } |
| 9161 | |
| 9162 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_lt_2_2pass_fulltile_with_qmin) { |
| 9163 | for (size_t channels = 1; channels < 2; channels++) { |
| 9164 | GAvgPoolMicrokernelTester() |
| 9165 | .rows(14) |
| 9166 | .channels(channels) |
| 9167 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9168 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9169 | } |
| 9170 | } |
| 9171 | |
| 9172 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_lt_2_2pass_subtile) { |
| 9173 | for (size_t channels = 1; channels < 2; channels++) { |
| 9174 | for (size_t rows = 8; rows < 14; rows++) { |
| 9175 | GAvgPoolMicrokernelTester() |
| 9176 | .rows(rows) |
| 9177 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9178 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9179 | } |
| 9180 | } |
| 9181 | } |
| 9182 | |
| 9183 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_lt_2_multipass_fulltile) { |
| 9184 | for (size_t channels = 1; channels < 2; channels++) { |
| 9185 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9186 | GAvgPoolMicrokernelTester() |
| 9187 | .rows(rows) |
| 9188 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9189 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9190 | } |
| 9191 | } |
| 9192 | } |
| 9193 | |
| 9194 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_lt_2_multipass_fulltile_with_input_stride) { |
| 9195 | for (size_t channels = 1; channels < 2; channels++) { |
| 9196 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9197 | GAvgPoolMicrokernelTester() |
| 9198 | .rows(rows) |
| 9199 | .channels(channels) |
| 9200 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9201 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9202 | } |
| 9203 | } |
| 9204 | } |
| 9205 | |
| 9206 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_gt_2_2pass_fulltile) { |
| 9207 | for (size_t channels = 3; channels < 4; channels++) { |
| 9208 | GAvgPoolMicrokernelTester() |
| 9209 | .rows(14) |
| 9210 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9211 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9212 | } |
| 9213 | } |
| 9214 | |
| 9215 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_gt_2_2pass_fulltile_with_qmax) { |
| 9216 | for (size_t channels = 3; channels < 4; channels++) { |
| 9217 | GAvgPoolMicrokernelTester() |
| 9218 | .rows(14) |
| 9219 | .channels(channels) |
| 9220 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9221 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9222 | } |
| 9223 | } |
| 9224 | |
| 9225 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_gt_2_2pass_fulltile_with_qmin) { |
| 9226 | for (size_t channels = 3; channels < 4; channels++) { |
| 9227 | GAvgPoolMicrokernelTester() |
| 9228 | .rows(14) |
| 9229 | .channels(channels) |
| 9230 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9231 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9232 | } |
| 9233 | } |
| 9234 | |
| 9235 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_gt_2_2pass_subtile) { |
| 9236 | for (size_t channels = 3; channels < 4; channels++) { |
| 9237 | for (size_t rows = 8; rows < 14; rows++) { |
| 9238 | GAvgPoolMicrokernelTester() |
| 9239 | .rows(rows) |
| 9240 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9241 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9242 | } |
| 9243 | } |
| 9244 | } |
| 9245 | |
| 9246 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_gt_2_multipass_fulltile) { |
| 9247 | for (size_t channels = 3; channels < 4; channels++) { |
| 9248 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 9249 | GAvgPoolMicrokernelTester() |
| 9250 | .rows(rows) |
| 9251 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9252 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9253 | } |
| 9254 | } |
| 9255 | } |
| 9256 | |
| 9257 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C2, channels_gt_2_multipass_fulltile_with_input_stride) { |
| 9258 | for (size_t channels = 3; channels < 4; channels++) { |
| 9259 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 9260 | GAvgPoolMicrokernelTester() |
| 9261 | .rows(rows) |
| 9262 | .channels(channels) |
| 9263 | .input_stride(17) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9264 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9265 | } |
| 9266 | } |
| 9267 | } |
| 9268 | |
| 9269 | |
| 9270 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_eq_4_2pass_fulltile) { |
| 9271 | GAvgPoolMicrokernelTester() |
| 9272 | .rows(14) |
| 9273 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9274 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9275 | } |
| 9276 | |
| 9277 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_eq_4_2pass_fulltile_with_input_stride) { |
| 9278 | GAvgPoolMicrokernelTester() |
| 9279 | .rows(14) |
| 9280 | .channels(4) |
| 9281 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9282 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9283 | } |
| 9284 | |
| 9285 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_eq_4_2pass_fulltile_with_qmax) { |
| 9286 | GAvgPoolMicrokernelTester() |
| 9287 | .rows(14) |
| 9288 | .channels(4) |
| 9289 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9290 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9291 | } |
| 9292 | |
| 9293 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_eq_4_2pass_fulltile_with_qmin) { |
| 9294 | GAvgPoolMicrokernelTester() |
| 9295 | .rows(14) |
| 9296 | .channels(4) |
| 9297 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9298 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9299 | } |
| 9300 | |
| 9301 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_eq_4_2pass_subtile) { |
| 9302 | for (size_t rows = 8; rows < 14; rows++) { |
| 9303 | GAvgPoolMicrokernelTester() |
| 9304 | .rows(rows) |
| 9305 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9306 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9307 | } |
| 9308 | } |
| 9309 | |
| 9310 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_eq_4_2pass_subtile_with_input_stride) { |
| 9311 | for (size_t rows = 8; rows < 14; rows++) { |
| 9312 | GAvgPoolMicrokernelTester() |
| 9313 | .rows(rows) |
| 9314 | .channels(4) |
| 9315 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9316 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9317 | } |
| 9318 | } |
| 9319 | |
| 9320 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_eq_4_multipass_fulltile) { |
| 9321 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9322 | GAvgPoolMicrokernelTester() |
| 9323 | .rows(rows) |
| 9324 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9325 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9326 | } |
| 9327 | } |
| 9328 | |
| 9329 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_eq_4_multipass_fulltile_with_input_stride) { |
| 9330 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9331 | GAvgPoolMicrokernelTester() |
| 9332 | .rows(rows) |
| 9333 | .channels(4) |
| 9334 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9335 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9336 | } |
| 9337 | } |
| 9338 | |
| 9339 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_div_4_2pass_fulltile) { |
| 9340 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 9341 | GAvgPoolMicrokernelTester() |
| 9342 | .rows(14) |
| 9343 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9344 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9345 | } |
| 9346 | } |
| 9347 | |
| 9348 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_div_4_2pass_subtile) { |
| 9349 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 9350 | for (size_t rows = 8; rows < 14; rows++) { |
| 9351 | GAvgPoolMicrokernelTester() |
| 9352 | .rows(rows) |
| 9353 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9354 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9355 | } |
| 9356 | } |
| 9357 | } |
| 9358 | |
| 9359 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_div_4_multipass_fulltile) { |
| 9360 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 9361 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9362 | GAvgPoolMicrokernelTester() |
| 9363 | .rows(rows) |
| 9364 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9365 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9366 | } |
| 9367 | } |
| 9368 | } |
| 9369 | |
| 9370 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_div_4_multipass_fulltile_with_input_stride) { |
| 9371 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 9372 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9373 | GAvgPoolMicrokernelTester() |
| 9374 | .rows(rows) |
| 9375 | .channels(channels) |
| 9376 | .input_stride(67) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9377 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9378 | } |
| 9379 | } |
| 9380 | } |
| 9381 | |
| 9382 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_lt_4_2pass_fulltile) { |
| 9383 | for (size_t channels = 1; channels < 4; channels++) { |
| 9384 | GAvgPoolMicrokernelTester() |
| 9385 | .rows(14) |
| 9386 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9387 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9388 | } |
| 9389 | } |
| 9390 | |
| 9391 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_lt_4_2pass_fulltile_with_qmax) { |
| 9392 | for (size_t channels = 1; channels < 4; channels++) { |
| 9393 | GAvgPoolMicrokernelTester() |
| 9394 | .rows(14) |
| 9395 | .channels(channels) |
| 9396 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9397 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9398 | } |
| 9399 | } |
| 9400 | |
| 9401 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_lt_4_2pass_fulltile_with_qmin) { |
| 9402 | for (size_t channels = 1; channels < 4; channels++) { |
| 9403 | GAvgPoolMicrokernelTester() |
| 9404 | .rows(14) |
| 9405 | .channels(channels) |
| 9406 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9407 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9408 | } |
| 9409 | } |
| 9410 | |
| 9411 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_lt_4_2pass_subtile) { |
| 9412 | for (size_t channels = 1; channels < 4; channels++) { |
| 9413 | for (size_t rows = 8; rows < 14; rows++) { |
| 9414 | GAvgPoolMicrokernelTester() |
| 9415 | .rows(rows) |
| 9416 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9417 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9418 | } |
| 9419 | } |
| 9420 | } |
| 9421 | |
| 9422 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_lt_4_multipass_fulltile) { |
| 9423 | for (size_t channels = 1; channels < 4; channels++) { |
| 9424 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9425 | GAvgPoolMicrokernelTester() |
| 9426 | .rows(rows) |
| 9427 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9428 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9429 | } |
| 9430 | } |
| 9431 | } |
| 9432 | |
| 9433 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_lt_4_multipass_fulltile_with_input_stride) { |
| 9434 | for (size_t channels = 1; channels < 4; channels++) { |
| 9435 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9436 | GAvgPoolMicrokernelTester() |
| 9437 | .rows(rows) |
| 9438 | .channels(channels) |
| 9439 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9440 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9441 | } |
| 9442 | } |
| 9443 | } |
| 9444 | |
| 9445 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_gt_4_2pass_fulltile) { |
| 9446 | for (size_t channels = 5; channels < 8; channels++) { |
| 9447 | GAvgPoolMicrokernelTester() |
| 9448 | .rows(14) |
| 9449 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9450 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9451 | } |
| 9452 | } |
| 9453 | |
| 9454 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_gt_4_2pass_fulltile_with_qmax) { |
| 9455 | for (size_t channels = 5; channels < 8; channels++) { |
| 9456 | GAvgPoolMicrokernelTester() |
| 9457 | .rows(14) |
| 9458 | .channels(channels) |
| 9459 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9460 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9461 | } |
| 9462 | } |
| 9463 | |
| 9464 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_gt_4_2pass_fulltile_with_qmin) { |
| 9465 | for (size_t channels = 5; channels < 8; channels++) { |
| 9466 | GAvgPoolMicrokernelTester() |
| 9467 | .rows(14) |
| 9468 | .channels(channels) |
| 9469 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9470 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9471 | } |
| 9472 | } |
| 9473 | |
| 9474 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_gt_4_2pass_subtile) { |
| 9475 | for (size_t channels = 5; channels < 8; channels++) { |
| 9476 | for (size_t rows = 8; rows < 14; rows++) { |
| 9477 | GAvgPoolMicrokernelTester() |
| 9478 | .rows(rows) |
| 9479 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9480 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9481 | } |
| 9482 | } |
| 9483 | } |
| 9484 | |
| 9485 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_gt_4_multipass_fulltile) { |
| 9486 | for (size_t channels = 5; channels < 8; channels++) { |
| 9487 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 9488 | GAvgPoolMicrokernelTester() |
| 9489 | .rows(rows) |
| 9490 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9491 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9492 | } |
| 9493 | } |
| 9494 | } |
| 9495 | |
| 9496 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_FMAGIC_C4, channels_gt_4_multipass_fulltile_with_input_stride) { |
| 9497 | for (size_t channels = 5; channels < 8; channels++) { |
| 9498 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 9499 | GAvgPoolMicrokernelTester() |
| 9500 | .rows(rows) |
| 9501 | .channels(channels) |
| 9502 | .input_stride(23) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9503 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_fmagic_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_fmagic_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9504 | } |
| 9505 | } |
| 9506 | } |
| 9507 | |
| 9508 | |
| 9509 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_eq_1_fulltile) { |
| 9510 | GAvgPoolMicrokernelTester() |
| 9511 | .rows(7) |
| 9512 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9513 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9514 | } |
| 9515 | |
| 9516 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_eq_1_subtile) { |
| 9517 | for (size_t rows = 1; rows < 7; rows++) { |
| 9518 | GAvgPoolMicrokernelTester() |
| 9519 | .rows(rows) |
| 9520 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9521 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9522 | } |
| 9523 | } |
| 9524 | |
| 9525 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_eq_1_fulltile_with_input_stride) { |
| 9526 | GAvgPoolMicrokernelTester() |
| 9527 | .rows(7) |
| 9528 | .channels(1) |
| 9529 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9530 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9531 | } |
| 9532 | |
| 9533 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_eq_1_fulltile_with_qmax) { |
| 9534 | GAvgPoolMicrokernelTester() |
| 9535 | .rows(7) |
| 9536 | .channels(1) |
| 9537 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9538 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9539 | } |
| 9540 | |
| 9541 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_eq_1_fulltile_with_qmin) { |
| 9542 | GAvgPoolMicrokernelTester() |
| 9543 | .rows(7) |
| 9544 | .channels(1) |
| 9545 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9546 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9547 | } |
| 9548 | |
| 9549 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_gt_1_fulltile) { |
| 9550 | for (size_t channels = 2; channels < 10; channels++) { |
| 9551 | GAvgPoolMicrokernelTester() |
| 9552 | .rows(7) |
| 9553 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9554 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9555 | } |
| 9556 | } |
| 9557 | |
| 9558 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_gt_1_subtile) { |
| 9559 | for (size_t channels = 2; channels < 10; channels++) { |
| 9560 | for (size_t rows = 1; rows < 7; rows++) { |
| 9561 | GAvgPoolMicrokernelTester() |
| 9562 | .rows(rows) |
| 9563 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9564 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9565 | } |
| 9566 | } |
| 9567 | } |
| 9568 | |
| 9569 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_gt_1_fulltile_with_qmax) { |
| 9570 | for (size_t channels = 2; channels < 10; channels++) { |
| 9571 | GAvgPoolMicrokernelTester() |
| 9572 | .rows(7) |
| 9573 | .channels(channels) |
| 9574 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9575 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9576 | } |
| 9577 | } |
| 9578 | |
| 9579 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C1, channels_gt_1_fulltile_with_qmin) { |
| 9580 | for (size_t channels = 2; channels < 10; channels++) { |
| 9581 | GAvgPoolMicrokernelTester() |
| 9582 | .rows(7) |
| 9583 | .channels(channels) |
| 9584 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9585 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9586 | } |
| 9587 | } |
| 9588 | |
| 9589 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_eq_2_fulltile) { |
| 9590 | GAvgPoolMicrokernelTester() |
| 9591 | .rows(7) |
| 9592 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9593 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9594 | } |
| 9595 | |
| 9596 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_eq_2_subtile) { |
| 9597 | for (size_t rows = 1; rows < 7; rows++) { |
| 9598 | GAvgPoolMicrokernelTester() |
| 9599 | .rows(rows) |
| 9600 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9601 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9602 | } |
| 9603 | } |
| 9604 | |
| 9605 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_eq_2_fulltile_with_input_stride) { |
| 9606 | GAvgPoolMicrokernelTester() |
| 9607 | .rows(7) |
| 9608 | .channels(2) |
| 9609 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9610 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9611 | } |
| 9612 | |
| 9613 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_eq_2_fulltile_with_qmax) { |
| 9614 | GAvgPoolMicrokernelTester() |
| 9615 | .rows(7) |
| 9616 | .channels(2) |
| 9617 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9618 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9619 | } |
| 9620 | |
| 9621 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_eq_2_fulltile_with_qmin) { |
| 9622 | GAvgPoolMicrokernelTester() |
| 9623 | .rows(7) |
| 9624 | .channels(2) |
| 9625 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9626 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9627 | } |
| 9628 | |
| 9629 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_div_2_fulltile) { |
| 9630 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 9631 | GAvgPoolMicrokernelTester() |
| 9632 | .rows(7) |
| 9633 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9634 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9635 | } |
| 9636 | } |
| 9637 | |
| 9638 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_div_2_subtile) { |
| 9639 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 9640 | for (size_t rows = 1; rows < 7; rows++) { |
| 9641 | GAvgPoolMicrokernelTester() |
| 9642 | .rows(rows) |
| 9643 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9644 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9645 | } |
| 9646 | } |
| 9647 | } |
| 9648 | |
| 9649 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_lt_2_fulltile) { |
| 9650 | for (size_t channels = 1; channels < 2; channels++) { |
| 9651 | GAvgPoolMicrokernelTester() |
| 9652 | .rows(7) |
| 9653 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9654 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9655 | } |
| 9656 | } |
| 9657 | |
| 9658 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_lt_2_subtile) { |
| 9659 | for (size_t channels = 1; channels < 2; channels++) { |
| 9660 | for (size_t rows = 1; rows < 7; rows++) { |
| 9661 | GAvgPoolMicrokernelTester() |
| 9662 | .rows(rows) |
| 9663 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9664 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9665 | } |
| 9666 | } |
| 9667 | } |
| 9668 | |
| 9669 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_lt_2_fulltile_with_qmax) { |
| 9670 | for (size_t channels = 1; channels < 2; channels++) { |
| 9671 | GAvgPoolMicrokernelTester() |
| 9672 | .rows(7) |
| 9673 | .channels(channels) |
| 9674 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9675 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9676 | } |
| 9677 | } |
| 9678 | |
| 9679 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_lt_2_fulltile_with_qmin) { |
| 9680 | for (size_t channels = 1; channels < 2; channels++) { |
| 9681 | GAvgPoolMicrokernelTester() |
| 9682 | .rows(7) |
| 9683 | .channels(channels) |
| 9684 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9685 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9686 | } |
| 9687 | } |
| 9688 | |
| 9689 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_gt_2_fulltile) { |
| 9690 | for (size_t channels = 3; channels < 4; channels++) { |
| 9691 | GAvgPoolMicrokernelTester() |
| 9692 | .rows(7) |
| 9693 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9694 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9695 | } |
| 9696 | } |
| 9697 | |
| 9698 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_gt_2_subtile) { |
| 9699 | for (size_t channels = 3; channels < 4; channels++) { |
| 9700 | for (size_t rows = 1; rows < 7; rows++) { |
| 9701 | GAvgPoolMicrokernelTester() |
| 9702 | .rows(rows) |
| 9703 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9704 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9705 | } |
| 9706 | } |
| 9707 | } |
| 9708 | |
| 9709 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_gt_2_fulltile_with_qmax) { |
| 9710 | for (size_t channels = 3; channels < 4; channels++) { |
| 9711 | GAvgPoolMicrokernelTester() |
| 9712 | .rows(7) |
| 9713 | .channels(channels) |
| 9714 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9715 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9716 | } |
| 9717 | } |
| 9718 | |
| 9719 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C2, channels_gt_2_fulltile_with_qmin) { |
| 9720 | for (size_t channels = 3; channels < 4; channels++) { |
| 9721 | GAvgPoolMicrokernelTester() |
| 9722 | .rows(7) |
| 9723 | .channels(channels) |
| 9724 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9725 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9726 | } |
| 9727 | } |
| 9728 | |
| 9729 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_eq_4_fulltile) { |
| 9730 | GAvgPoolMicrokernelTester() |
| 9731 | .rows(7) |
| 9732 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9733 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9734 | } |
| 9735 | |
| 9736 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_eq_4_subtile) { |
| 9737 | for (size_t rows = 1; rows < 7; rows++) { |
| 9738 | GAvgPoolMicrokernelTester() |
| 9739 | .rows(rows) |
| 9740 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9741 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9742 | } |
| 9743 | } |
| 9744 | |
| 9745 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_eq_4_fulltile_with_input_stride) { |
| 9746 | GAvgPoolMicrokernelTester() |
| 9747 | .rows(7) |
| 9748 | .channels(4) |
| 9749 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9750 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9751 | } |
| 9752 | |
| 9753 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_eq_4_fulltile_with_qmax) { |
| 9754 | GAvgPoolMicrokernelTester() |
| 9755 | .rows(7) |
| 9756 | .channels(4) |
| 9757 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9758 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9759 | } |
| 9760 | |
| 9761 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_eq_4_fulltile_with_qmin) { |
| 9762 | GAvgPoolMicrokernelTester() |
| 9763 | .rows(7) |
| 9764 | .channels(4) |
| 9765 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9766 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9767 | } |
| 9768 | |
| 9769 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_div_4_fulltile) { |
| 9770 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 9771 | GAvgPoolMicrokernelTester() |
| 9772 | .rows(7) |
| 9773 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9774 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9775 | } |
| 9776 | } |
| 9777 | |
| 9778 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_div_4_subtile) { |
| 9779 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 9780 | for (size_t rows = 1; rows < 7; rows++) { |
| 9781 | GAvgPoolMicrokernelTester() |
| 9782 | .rows(rows) |
| 9783 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9784 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9785 | } |
| 9786 | } |
| 9787 | } |
| 9788 | |
| 9789 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_lt_4_fulltile) { |
| 9790 | for (size_t channels = 1; channels < 4; channels++) { |
| 9791 | GAvgPoolMicrokernelTester() |
| 9792 | .rows(7) |
| 9793 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9794 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9795 | } |
| 9796 | } |
| 9797 | |
| 9798 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_lt_4_subtile) { |
| 9799 | for (size_t channels = 1; channels < 4; channels++) { |
| 9800 | for (size_t rows = 1; rows < 7; rows++) { |
| 9801 | GAvgPoolMicrokernelTester() |
| 9802 | .rows(rows) |
| 9803 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9804 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9805 | } |
| 9806 | } |
| 9807 | } |
| 9808 | |
| 9809 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_lt_4_fulltile_with_qmax) { |
| 9810 | for (size_t channels = 1; channels < 4; channels++) { |
| 9811 | GAvgPoolMicrokernelTester() |
| 9812 | .rows(7) |
| 9813 | .channels(channels) |
| 9814 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9815 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9816 | } |
| 9817 | } |
| 9818 | |
| 9819 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_lt_4_fulltile_with_qmin) { |
| 9820 | for (size_t channels = 1; channels < 4; channels++) { |
| 9821 | GAvgPoolMicrokernelTester() |
| 9822 | .rows(7) |
| 9823 | .channels(channels) |
| 9824 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9825 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9826 | } |
| 9827 | } |
| 9828 | |
| 9829 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_gt_4_fulltile) { |
| 9830 | for (size_t channels = 5; channels < 8; channels++) { |
| 9831 | GAvgPoolMicrokernelTester() |
| 9832 | .rows(7) |
| 9833 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9834 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9835 | } |
| 9836 | } |
| 9837 | |
| 9838 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_gt_4_subtile) { |
| 9839 | for (size_t channels = 5; channels < 8; channels++) { |
| 9840 | for (size_t rows = 1; rows < 7; rows++) { |
| 9841 | GAvgPoolMicrokernelTester() |
| 9842 | .rows(rows) |
| 9843 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9844 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9845 | } |
| 9846 | } |
| 9847 | } |
| 9848 | |
| 9849 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_gt_4_fulltile_with_qmax) { |
| 9850 | for (size_t channels = 5; channels < 8; channels++) { |
| 9851 | GAvgPoolMicrokernelTester() |
| 9852 | .rows(7) |
| 9853 | .channels(channels) |
| 9854 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9855 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9856 | } |
| 9857 | } |
| 9858 | |
| 9859 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7X__SCALAR_LRINTF_C4, channels_gt_4_fulltile_with_qmin) { |
| 9860 | for (size_t channels = 5; channels < 8; channels++) { |
| 9861 | GAvgPoolMicrokernelTester() |
| 9862 | .rows(7) |
| 9863 | .channels(channels) |
| 9864 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9865 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9866 | } |
| 9867 | } |
| 9868 | |
| 9869 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_eq_1_2pass_fulltile) { |
| 9870 | GAvgPoolMicrokernelTester() |
| 9871 | .rows(14) |
| 9872 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9873 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9874 | } |
| 9875 | |
| 9876 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_eq_1_2pass_fulltile_with_input_stride) { |
| 9877 | GAvgPoolMicrokernelTester() |
| 9878 | .rows(14) |
| 9879 | .channels(1) |
| 9880 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9881 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9882 | } |
| 9883 | |
| 9884 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_eq_1_2pass_fulltile_with_qmax) { |
| 9885 | GAvgPoolMicrokernelTester() |
| 9886 | .rows(14) |
| 9887 | .channels(1) |
| 9888 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9889 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9890 | } |
| 9891 | |
| 9892 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_eq_1_2pass_fulltile_with_qmin) { |
| 9893 | GAvgPoolMicrokernelTester() |
| 9894 | .rows(14) |
| 9895 | .channels(1) |
| 9896 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9897 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9898 | } |
| 9899 | |
| 9900 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_eq_1_2pass_subtile) { |
| 9901 | for (size_t rows = 8; rows < 14; rows++) { |
| 9902 | GAvgPoolMicrokernelTester() |
| 9903 | .rows(rows) |
| 9904 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9905 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9906 | } |
| 9907 | } |
| 9908 | |
| 9909 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_eq_1_2pass_subtile_with_input_stride) { |
| 9910 | for (size_t rows = 8; rows < 14; rows++) { |
| 9911 | GAvgPoolMicrokernelTester() |
| 9912 | .rows(rows) |
| 9913 | .channels(1) |
| 9914 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9915 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9916 | } |
| 9917 | } |
| 9918 | |
| 9919 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_eq_1_multipass_fulltile) { |
| 9920 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9921 | GAvgPoolMicrokernelTester() |
| 9922 | .rows(rows) |
| 9923 | .channels(1) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9924 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9925 | } |
| 9926 | } |
| 9927 | |
| 9928 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_eq_1_multipass_fulltile_with_input_stride) { |
| 9929 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9930 | GAvgPoolMicrokernelTester() |
| 9931 | .rows(rows) |
| 9932 | .channels(1) |
| 9933 | .input_stride(3) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9934 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9935 | } |
| 9936 | } |
| 9937 | |
| 9938 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_div_1_2pass_fulltile) { |
| 9939 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 9940 | GAvgPoolMicrokernelTester() |
| 9941 | .rows(14) |
| 9942 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9943 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9944 | } |
| 9945 | } |
| 9946 | |
| 9947 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_div_1_2pass_subtile) { |
| 9948 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 9949 | for (size_t rows = 8; rows < 14; rows++) { |
| 9950 | GAvgPoolMicrokernelTester() |
| 9951 | .rows(rows) |
| 9952 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9953 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9954 | } |
| 9955 | } |
| 9956 | } |
| 9957 | |
| 9958 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_div_1_multipass_fulltile) { |
| 9959 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 9960 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9961 | GAvgPoolMicrokernelTester() |
| 9962 | .rows(rows) |
| 9963 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9964 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9965 | } |
| 9966 | } |
| 9967 | } |
| 9968 | |
| 9969 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_div_1_multipass_fulltile_with_input_stride) { |
| 9970 | for (size_t channels = 2; channels < 8; channels += 1) { |
| 9971 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 9972 | GAvgPoolMicrokernelTester() |
| 9973 | .rows(rows) |
| 9974 | .channels(channels) |
| 9975 | .input_stride(19) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9976 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9977 | } |
| 9978 | } |
| 9979 | } |
| 9980 | |
| 9981 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_gt_1_2pass_fulltile) { |
| 9982 | for (size_t channels = 2; channels < 10; channels++) { |
| 9983 | GAvgPoolMicrokernelTester() |
| 9984 | .rows(14) |
| 9985 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9986 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9987 | } |
| 9988 | } |
| 9989 | |
| 9990 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_gt_1_2pass_fulltile_with_qmax) { |
| 9991 | for (size_t channels = 2; channels < 10; channels++) { |
| 9992 | GAvgPoolMicrokernelTester() |
| 9993 | .rows(14) |
| 9994 | .channels(channels) |
| 9995 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 9996 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 9997 | } |
| 9998 | } |
| 9999 | |
| 10000 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_gt_1_2pass_fulltile_with_qmin) { |
| 10001 | for (size_t channels = 2; channels < 10; channels++) { |
| 10002 | GAvgPoolMicrokernelTester() |
| 10003 | .rows(14) |
| 10004 | .channels(channels) |
| 10005 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10006 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10007 | } |
| 10008 | } |
| 10009 | |
| 10010 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_gt_1_2pass_subtile) { |
| 10011 | for (size_t channels = 2; channels < 10; channels++) { |
| 10012 | for (size_t rows = 8; rows < 14; rows++) { |
| 10013 | GAvgPoolMicrokernelTester() |
| 10014 | .rows(rows) |
| 10015 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10016 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10017 | } |
| 10018 | } |
| 10019 | } |
| 10020 | |
| 10021 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_gt_1_multipass_fulltile) { |
| 10022 | for (size_t channels = 2; channels < 10; channels++) { |
| 10023 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 10024 | GAvgPoolMicrokernelTester() |
| 10025 | .rows(rows) |
| 10026 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10027 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10028 | } |
| 10029 | } |
| 10030 | } |
| 10031 | |
| 10032 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C1, channels_gt_1_multipass_fulltile_with_input_stride) { |
| 10033 | for (size_t channels = 2; channels < 10; channels++) { |
| 10034 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 10035 | GAvgPoolMicrokernelTester() |
| 10036 | .rows(rows) |
| 10037 | .channels(channels) |
| 10038 | .input_stride(17) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10039 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c1, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10040 | } |
| 10041 | } |
| 10042 | } |
| 10043 | |
| 10044 | |
| 10045 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_eq_2_2pass_fulltile) { |
| 10046 | GAvgPoolMicrokernelTester() |
| 10047 | .rows(14) |
| 10048 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10049 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10050 | } |
| 10051 | |
| 10052 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_eq_2_2pass_fulltile_with_input_stride) { |
| 10053 | GAvgPoolMicrokernelTester() |
| 10054 | .rows(14) |
| 10055 | .channels(2) |
| 10056 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10057 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10058 | } |
| 10059 | |
| 10060 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_eq_2_2pass_fulltile_with_qmax) { |
| 10061 | GAvgPoolMicrokernelTester() |
| 10062 | .rows(14) |
| 10063 | .channels(2) |
| 10064 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10065 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10066 | } |
| 10067 | |
| 10068 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_eq_2_2pass_fulltile_with_qmin) { |
| 10069 | GAvgPoolMicrokernelTester() |
| 10070 | .rows(14) |
| 10071 | .channels(2) |
| 10072 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10073 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10074 | } |
| 10075 | |
| 10076 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_eq_2_2pass_subtile) { |
| 10077 | for (size_t rows = 8; rows < 14; rows++) { |
| 10078 | GAvgPoolMicrokernelTester() |
| 10079 | .rows(rows) |
| 10080 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10081 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10082 | } |
| 10083 | } |
| 10084 | |
| 10085 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_eq_2_2pass_subtile_with_input_stride) { |
| 10086 | for (size_t rows = 8; rows < 14; rows++) { |
| 10087 | GAvgPoolMicrokernelTester() |
| 10088 | .rows(rows) |
| 10089 | .channels(2) |
| 10090 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10091 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10092 | } |
| 10093 | } |
| 10094 | |
| 10095 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_eq_2_multipass_fulltile) { |
| 10096 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10097 | GAvgPoolMicrokernelTester() |
| 10098 | .rows(rows) |
| 10099 | .channels(2) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10100 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10101 | } |
| 10102 | } |
| 10103 | |
| 10104 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_eq_2_multipass_fulltile_with_input_stride) { |
| 10105 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10106 | GAvgPoolMicrokernelTester() |
| 10107 | .rows(rows) |
| 10108 | .channels(2) |
| 10109 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10110 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10111 | } |
| 10112 | } |
| 10113 | |
| 10114 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_div_2_2pass_fulltile) { |
| 10115 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 10116 | GAvgPoolMicrokernelTester() |
| 10117 | .rows(14) |
| 10118 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10119 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10120 | } |
| 10121 | } |
| 10122 | |
| 10123 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_div_2_2pass_subtile) { |
| 10124 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 10125 | for (size_t rows = 8; rows < 14; rows++) { |
| 10126 | GAvgPoolMicrokernelTester() |
| 10127 | .rows(rows) |
| 10128 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10129 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10130 | } |
| 10131 | } |
| 10132 | } |
| 10133 | |
| 10134 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_div_2_multipass_fulltile) { |
| 10135 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 10136 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10137 | GAvgPoolMicrokernelTester() |
| 10138 | .rows(rows) |
| 10139 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10140 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10141 | } |
| 10142 | } |
| 10143 | } |
| 10144 | |
| 10145 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_div_2_multipass_fulltile_with_input_stride) { |
| 10146 | for (size_t channels = 4; channels < 16; channels += 2) { |
| 10147 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10148 | GAvgPoolMicrokernelTester() |
| 10149 | .rows(rows) |
| 10150 | .channels(channels) |
| 10151 | .input_stride(37) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10152 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10153 | } |
| 10154 | } |
| 10155 | } |
| 10156 | |
| 10157 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_lt_2_2pass_fulltile) { |
| 10158 | for (size_t channels = 1; channels < 2; channels++) { |
| 10159 | GAvgPoolMicrokernelTester() |
| 10160 | .rows(14) |
| 10161 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10162 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10163 | } |
| 10164 | } |
| 10165 | |
| 10166 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_lt_2_2pass_fulltile_with_qmax) { |
| 10167 | for (size_t channels = 1; channels < 2; channels++) { |
| 10168 | GAvgPoolMicrokernelTester() |
| 10169 | .rows(14) |
| 10170 | .channels(channels) |
| 10171 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10172 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10173 | } |
| 10174 | } |
| 10175 | |
| 10176 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_lt_2_2pass_fulltile_with_qmin) { |
| 10177 | for (size_t channels = 1; channels < 2; channels++) { |
| 10178 | GAvgPoolMicrokernelTester() |
| 10179 | .rows(14) |
| 10180 | .channels(channels) |
| 10181 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10182 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10183 | } |
| 10184 | } |
| 10185 | |
| 10186 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_lt_2_2pass_subtile) { |
| 10187 | for (size_t channels = 1; channels < 2; channels++) { |
| 10188 | for (size_t rows = 8; rows < 14; rows++) { |
| 10189 | GAvgPoolMicrokernelTester() |
| 10190 | .rows(rows) |
| 10191 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10192 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10193 | } |
| 10194 | } |
| 10195 | } |
| 10196 | |
| 10197 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_lt_2_multipass_fulltile) { |
| 10198 | for (size_t channels = 1; channels < 2; channels++) { |
| 10199 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10200 | GAvgPoolMicrokernelTester() |
| 10201 | .rows(rows) |
| 10202 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10203 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10204 | } |
| 10205 | } |
| 10206 | } |
| 10207 | |
| 10208 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_lt_2_multipass_fulltile_with_input_stride) { |
| 10209 | for (size_t channels = 1; channels < 2; channels++) { |
| 10210 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10211 | GAvgPoolMicrokernelTester() |
| 10212 | .rows(rows) |
| 10213 | .channels(channels) |
| 10214 | .input_stride(5) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10215 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10216 | } |
| 10217 | } |
| 10218 | } |
| 10219 | |
| 10220 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_gt_2_2pass_fulltile) { |
| 10221 | for (size_t channels = 3; channels < 4; channels++) { |
| 10222 | GAvgPoolMicrokernelTester() |
| 10223 | .rows(14) |
| 10224 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10225 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10226 | } |
| 10227 | } |
| 10228 | |
| 10229 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_gt_2_2pass_fulltile_with_qmax) { |
| 10230 | for (size_t channels = 3; channels < 4; channels++) { |
| 10231 | GAvgPoolMicrokernelTester() |
| 10232 | .rows(14) |
| 10233 | .channels(channels) |
| 10234 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10235 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10236 | } |
| 10237 | } |
| 10238 | |
| 10239 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_gt_2_2pass_fulltile_with_qmin) { |
| 10240 | for (size_t channels = 3; channels < 4; channels++) { |
| 10241 | GAvgPoolMicrokernelTester() |
| 10242 | .rows(14) |
| 10243 | .channels(channels) |
| 10244 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10245 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10246 | } |
| 10247 | } |
| 10248 | |
| 10249 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_gt_2_2pass_subtile) { |
| 10250 | for (size_t channels = 3; channels < 4; channels++) { |
| 10251 | for (size_t rows = 8; rows < 14; rows++) { |
| 10252 | GAvgPoolMicrokernelTester() |
| 10253 | .rows(rows) |
| 10254 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10255 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10256 | } |
| 10257 | } |
| 10258 | } |
| 10259 | |
| 10260 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_gt_2_multipass_fulltile) { |
| 10261 | for (size_t channels = 3; channels < 4; channels++) { |
| 10262 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 10263 | GAvgPoolMicrokernelTester() |
| 10264 | .rows(rows) |
| 10265 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10266 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10267 | } |
| 10268 | } |
| 10269 | } |
| 10270 | |
| 10271 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C2, channels_gt_2_multipass_fulltile_with_input_stride) { |
| 10272 | for (size_t channels = 3; channels < 4; channels++) { |
| 10273 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 10274 | GAvgPoolMicrokernelTester() |
| 10275 | .rows(rows) |
| 10276 | .channels(channels) |
| 10277 | .input_stride(17) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10278 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c2, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10279 | } |
| 10280 | } |
| 10281 | } |
| 10282 | |
| 10283 | |
| 10284 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_eq_4_2pass_fulltile) { |
| 10285 | GAvgPoolMicrokernelTester() |
| 10286 | .rows(14) |
| 10287 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10288 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10289 | } |
| 10290 | |
| 10291 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_eq_4_2pass_fulltile_with_input_stride) { |
| 10292 | GAvgPoolMicrokernelTester() |
| 10293 | .rows(14) |
| 10294 | .channels(4) |
| 10295 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10296 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10297 | } |
| 10298 | |
| 10299 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_eq_4_2pass_fulltile_with_qmax) { |
| 10300 | GAvgPoolMicrokernelTester() |
| 10301 | .rows(14) |
| 10302 | .channels(4) |
| 10303 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10304 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10305 | } |
| 10306 | |
| 10307 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_eq_4_2pass_fulltile_with_qmin) { |
| 10308 | GAvgPoolMicrokernelTester() |
| 10309 | .rows(14) |
| 10310 | .channels(4) |
| 10311 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10312 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10313 | } |
| 10314 | |
| 10315 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_eq_4_2pass_subtile) { |
| 10316 | for (size_t rows = 8; rows < 14; rows++) { |
| 10317 | GAvgPoolMicrokernelTester() |
| 10318 | .rows(rows) |
| 10319 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10320 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10321 | } |
| 10322 | } |
| 10323 | |
| 10324 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_eq_4_2pass_subtile_with_input_stride) { |
| 10325 | for (size_t rows = 8; rows < 14; rows++) { |
| 10326 | GAvgPoolMicrokernelTester() |
| 10327 | .rows(rows) |
| 10328 | .channels(4) |
| 10329 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10330 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10331 | } |
| 10332 | } |
| 10333 | |
| 10334 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_eq_4_multipass_fulltile) { |
| 10335 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10336 | GAvgPoolMicrokernelTester() |
| 10337 | .rows(rows) |
| 10338 | .channels(4) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10339 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10340 | } |
| 10341 | } |
| 10342 | |
| 10343 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_eq_4_multipass_fulltile_with_input_stride) { |
| 10344 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10345 | GAvgPoolMicrokernelTester() |
| 10346 | .rows(rows) |
| 10347 | .channels(4) |
| 10348 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10349 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10350 | } |
| 10351 | } |
| 10352 | |
| 10353 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_div_4_2pass_fulltile) { |
| 10354 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 10355 | GAvgPoolMicrokernelTester() |
| 10356 | .rows(14) |
| 10357 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10358 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10359 | } |
| 10360 | } |
| 10361 | |
| 10362 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_div_4_2pass_subtile) { |
| 10363 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 10364 | for (size_t rows = 8; rows < 14; rows++) { |
| 10365 | GAvgPoolMicrokernelTester() |
| 10366 | .rows(rows) |
| 10367 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10368 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10369 | } |
| 10370 | } |
| 10371 | } |
| 10372 | |
| 10373 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_div_4_multipass_fulltile) { |
| 10374 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 10375 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10376 | GAvgPoolMicrokernelTester() |
| 10377 | .rows(rows) |
| 10378 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10379 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10380 | } |
| 10381 | } |
| 10382 | } |
| 10383 | |
| 10384 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_div_4_multipass_fulltile_with_input_stride) { |
| 10385 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 10386 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10387 | GAvgPoolMicrokernelTester() |
| 10388 | .rows(rows) |
| 10389 | .channels(channels) |
| 10390 | .input_stride(67) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10391 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10392 | } |
| 10393 | } |
| 10394 | } |
| 10395 | |
| 10396 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_lt_4_2pass_fulltile) { |
| 10397 | for (size_t channels = 1; channels < 4; channels++) { |
| 10398 | GAvgPoolMicrokernelTester() |
| 10399 | .rows(14) |
| 10400 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10401 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10402 | } |
| 10403 | } |
| 10404 | |
| 10405 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_lt_4_2pass_fulltile_with_qmax) { |
| 10406 | for (size_t channels = 1; channels < 4; channels++) { |
| 10407 | GAvgPoolMicrokernelTester() |
| 10408 | .rows(14) |
| 10409 | .channels(channels) |
| 10410 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10411 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10412 | } |
| 10413 | } |
| 10414 | |
| 10415 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_lt_4_2pass_fulltile_with_qmin) { |
| 10416 | for (size_t channels = 1; channels < 4; channels++) { |
| 10417 | GAvgPoolMicrokernelTester() |
| 10418 | .rows(14) |
| 10419 | .channels(channels) |
| 10420 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10421 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10422 | } |
| 10423 | } |
| 10424 | |
| 10425 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_lt_4_2pass_subtile) { |
| 10426 | for (size_t channels = 1; channels < 4; channels++) { |
| 10427 | for (size_t rows = 8; rows < 14; rows++) { |
| 10428 | GAvgPoolMicrokernelTester() |
| 10429 | .rows(rows) |
| 10430 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10431 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10432 | } |
| 10433 | } |
| 10434 | } |
| 10435 | |
| 10436 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_lt_4_multipass_fulltile) { |
| 10437 | for (size_t channels = 1; channels < 4; channels++) { |
| 10438 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10439 | GAvgPoolMicrokernelTester() |
| 10440 | .rows(rows) |
| 10441 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10442 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10443 | } |
| 10444 | } |
| 10445 | } |
| 10446 | |
| 10447 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_lt_4_multipass_fulltile_with_input_stride) { |
| 10448 | for (size_t channels = 1; channels < 4; channels++) { |
| 10449 | for (size_t rows = 14; rows <= 35; rows += 7) { |
| 10450 | GAvgPoolMicrokernelTester() |
| 10451 | .rows(rows) |
| 10452 | .channels(channels) |
| 10453 | .input_stride(7) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10454 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10455 | } |
| 10456 | } |
| 10457 | } |
| 10458 | |
| 10459 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_gt_4_2pass_fulltile) { |
| 10460 | for (size_t channels = 5; channels < 8; channels++) { |
| 10461 | GAvgPoolMicrokernelTester() |
| 10462 | .rows(14) |
| 10463 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10464 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10465 | } |
| 10466 | } |
| 10467 | |
| 10468 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_gt_4_2pass_fulltile_with_qmax) { |
| 10469 | for (size_t channels = 5; channels < 8; channels++) { |
| 10470 | GAvgPoolMicrokernelTester() |
| 10471 | .rows(14) |
| 10472 | .channels(channels) |
| 10473 | .qmax(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10474 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10475 | } |
| 10476 | } |
| 10477 | |
| 10478 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_gt_4_2pass_fulltile_with_qmin) { |
| 10479 | for (size_t channels = 5; channels < 8; channels++) { |
| 10480 | GAvgPoolMicrokernelTester() |
| 10481 | .rows(14) |
| 10482 | .channels(channels) |
| 10483 | .qmin(128) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10484 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10485 | } |
| 10486 | } |
| 10487 | |
| 10488 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_gt_4_2pass_subtile) { |
| 10489 | for (size_t channels = 5; channels < 8; channels++) { |
| 10490 | for (size_t rows = 8; rows < 14; rows++) { |
| 10491 | GAvgPoolMicrokernelTester() |
| 10492 | .rows(rows) |
| 10493 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10494 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10495 | } |
| 10496 | } |
| 10497 | } |
| 10498 | |
| 10499 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_gt_4_multipass_fulltile) { |
| 10500 | for (size_t channels = 5; channels < 8; channels++) { |
| 10501 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 10502 | GAvgPoolMicrokernelTester() |
| 10503 | .rows(rows) |
| 10504 | .channels(channels) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10505 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10506 | } |
| 10507 | } |
| 10508 | } |
| 10509 | |
| 10510 | TEST(QS8_GAVGPOOL_MINMAX_FP32_7P7X__SCALAR_LRINTF_C4, channels_gt_4_multipass_fulltile_with_input_stride) { |
| 10511 | for (size_t channels = 5; channels < 8; channels++) { |
| 10512 | for (size_t rows = 14; rows < 35; rows += 14) { |
| 10513 | GAvgPoolMicrokernelTester() |
| 10514 | .rows(rows) |
| 10515 | .channels(channels) |
| 10516 | .input_stride(23) |
Marat Dukhan | 8575504 | 2022-01-13 01:46:05 -0800 | [diff] [blame] | 10517 | .Test(xnn_qs8_gavgpool_minmax_fp32_ukernel_7p7x__scalar_lrintf_c4, xnn_init_qs8_avgpool_minmax_fp32_scalar_lrintf_params, xnn_qs8_requantize_fp32); |
Marat Dukhan | d7a4b22 | 2022-01-11 22:25:20 -0800 | [diff] [blame] | 10518 | } |
| 10519 | } |
| 10520 | } |