blob: d0ae6d0dbd97238d5a4dba765ca16de6f149e5fc [file] [log] [blame]
Marat Dukhan33a98fa2022-01-13 00:08:57 -08001// Copyright 2019 Google LLC
2//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
5//
6// Auto-generated file. Do not edit!
7// Specification: test/qu8-vmul-minmax-rndnu.yaml
8// Generator: tools/generate-vbinary-test.py
9
10
11#include <gtest/gtest.h>
12
13#include <xnnpack/common.h>
14#include <xnnpack/isa-checks.h>
15
16#include <xnnpack/params-init.h>
17#include <xnnpack/vmul.h>
18#include "vmul-microkernel-tester.h"
19
20
21#if XNN_ARCH_ARM || XNN_ARCH_ARM64
22 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, batch_eq_8) {
23 TEST_REQUIRES_ARM_NEON;
24 VMulMicrokernelTester()
25 .batch_size(8)
26 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
27 }
28
29 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, batch_div_8) {
30 TEST_REQUIRES_ARM_NEON;
31 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
32 VMulMicrokernelTester()
33 .batch_size(batch_size)
34 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
35 }
36 }
37
38 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, batch_lt_8) {
39 TEST_REQUIRES_ARM_NEON;
40 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
41 VMulMicrokernelTester()
42 .batch_size(batch_size)
43 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
44 }
45 }
46
47 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, batch_gt_8) {
48 TEST_REQUIRES_ARM_NEON;
49 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
50 VMulMicrokernelTester()
51 .batch_size(batch_size)
52 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
53 }
54 }
55
56 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, inplace_a) {
57 TEST_REQUIRES_ARM_NEON;
58 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
59 VMulMicrokernelTester()
60 .batch_size(batch_size)
61 .inplace_a(true)
62 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
63 }
64 }
65
66 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, inplace_b) {
67 TEST_REQUIRES_ARM_NEON;
68 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
69 VMulMicrokernelTester()
70 .batch_size(batch_size)
71 .inplace_b(true)
72 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
73 }
74 }
75
76 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, inplace_a_and_b) {
77 TEST_REQUIRES_ARM_NEON;
78 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
79 VMulMicrokernelTester()
80 .batch_size(batch_size)
81 .inplace_a(true)
82 .inplace_b(true)
83 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
84 }
85 }
86
87 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, a_zero_point) {
88 TEST_REQUIRES_ARM_NEON;
89 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
90 for (int32_t a_zero_point = -128; a_zero_point <= 127; a_zero_point += 51) {
91 VMulMicrokernelTester()
92 .batch_size(batch_size)
93 .a_zero_point(a_zero_point)
94 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
95 }
96 }
97 }
98
99 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, b_zero_point) {
100 TEST_REQUIRES_ARM_NEON;
101 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
102 for (int32_t b_zero_point = -128; b_zero_point <= 127; b_zero_point += 51) {
103 VMulMicrokernelTester()
104 .batch_size(batch_size)
105 .b_zero_point(b_zero_point)
106 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
107 }
108 }
109 }
110
111 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, y_zero_point) {
112 TEST_REQUIRES_ARM_NEON;
113 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
114 for (int32_t y_zero_point = -128; y_zero_point <= 127; y_zero_point += 51) {
115 VMulMicrokernelTester()
116 .batch_size(batch_size)
117 .y_zero_point(y_zero_point)
118 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
119 }
120 }
121 }
122
123 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, a_scale) {
124 TEST_REQUIRES_ARM_NEON;
125 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
126 for (float a_scale = 0.1f; a_scale <= 10.0f; a_scale *= 3.14f) {
127 VMulMicrokernelTester()
128 .batch_size(batch_size)
129 .a_scale(a_scale)
130 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
131 }
132 }
133 }
134
135 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, b_scale) {
136 TEST_REQUIRES_ARM_NEON;
137 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
138 for (float b_scale = 0.1f; b_scale <= 10.0f; b_scale *= 3.14f) {
139 VMulMicrokernelTester()
140 .batch_size(batch_size)
141 .b_scale(b_scale)
142 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
143 }
144 }
145 }
146
147 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, y_scale) {
148 TEST_REQUIRES_ARM_NEON;
149 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
150 for (float y_scale = 0.1f; y_scale <= 10.0f; y_scale *= 3.14f) {
151 VMulMicrokernelTester()
152 .batch_size(batch_size)
153 .y_scale(y_scale)
154 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
155 }
156 }
157 }
158
159 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, qmin) {
160 TEST_REQUIRES_ARM_NEON;
161 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
162 VMulMicrokernelTester()
163 .batch_size(batch_size)
164 .qmin(128)
165 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
166 }
167 }
168
169 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X8, qmax) {
170 TEST_REQUIRES_ARM_NEON;
171 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
172 VMulMicrokernelTester()
173 .batch_size(batch_size)
174 .qmax(128)
175 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
176 }
177 }
178#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
179
180
181#if XNN_ARCH_ARM || XNN_ARCH_ARM64
182 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, batch_eq_16) {
183 TEST_REQUIRES_ARM_NEON;
184 VMulMicrokernelTester()
185 .batch_size(16)
186 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
187 }
188
189 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, batch_div_16) {
190 TEST_REQUIRES_ARM_NEON;
191 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
192 VMulMicrokernelTester()
193 .batch_size(batch_size)
194 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
195 }
196 }
197
198 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, batch_lt_16) {
199 TEST_REQUIRES_ARM_NEON;
200 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
201 VMulMicrokernelTester()
202 .batch_size(batch_size)
203 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
204 }
205 }
206
207 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, batch_gt_16) {
208 TEST_REQUIRES_ARM_NEON;
209 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
210 VMulMicrokernelTester()
211 .batch_size(batch_size)
212 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
213 }
214 }
215
216 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, inplace_a) {
217 TEST_REQUIRES_ARM_NEON;
218 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
219 VMulMicrokernelTester()
220 .batch_size(batch_size)
221 .inplace_a(true)
222 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
223 }
224 }
225
226 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, inplace_b) {
227 TEST_REQUIRES_ARM_NEON;
228 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
229 VMulMicrokernelTester()
230 .batch_size(batch_size)
231 .inplace_b(true)
232 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
233 }
234 }
235
236 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, inplace_a_and_b) {
237 TEST_REQUIRES_ARM_NEON;
238 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
239 VMulMicrokernelTester()
240 .batch_size(batch_size)
241 .inplace_a(true)
242 .inplace_b(true)
243 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
244 }
245 }
246
247 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, a_zero_point) {
248 TEST_REQUIRES_ARM_NEON;
249 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
250 for (int32_t a_zero_point = -128; a_zero_point <= 127; a_zero_point += 51) {
251 VMulMicrokernelTester()
252 .batch_size(batch_size)
253 .a_zero_point(a_zero_point)
254 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
255 }
256 }
257 }
258
259 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, b_zero_point) {
260 TEST_REQUIRES_ARM_NEON;
261 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
262 for (int32_t b_zero_point = -128; b_zero_point <= 127; b_zero_point += 51) {
263 VMulMicrokernelTester()
264 .batch_size(batch_size)
265 .b_zero_point(b_zero_point)
266 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
267 }
268 }
269 }
270
271 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, y_zero_point) {
272 TEST_REQUIRES_ARM_NEON;
273 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
274 for (int32_t y_zero_point = -128; y_zero_point <= 127; y_zero_point += 51) {
275 VMulMicrokernelTester()
276 .batch_size(batch_size)
277 .y_zero_point(y_zero_point)
278 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
279 }
280 }
281 }
282
283 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, a_scale) {
284 TEST_REQUIRES_ARM_NEON;
285 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
286 for (float a_scale = 0.1f; a_scale <= 10.0f; a_scale *= 3.14f) {
287 VMulMicrokernelTester()
288 .batch_size(batch_size)
289 .a_scale(a_scale)
290 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
291 }
292 }
293 }
294
295 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, b_scale) {
296 TEST_REQUIRES_ARM_NEON;
297 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
298 for (float b_scale = 0.1f; b_scale <= 10.0f; b_scale *= 3.14f) {
299 VMulMicrokernelTester()
300 .batch_size(batch_size)
301 .b_scale(b_scale)
302 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
303 }
304 }
305 }
306
307 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, y_scale) {
308 TEST_REQUIRES_ARM_NEON;
309 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
310 for (float y_scale = 0.1f; y_scale <= 10.0f; y_scale *= 3.14f) {
311 VMulMicrokernelTester()
312 .batch_size(batch_size)
313 .y_scale(y_scale)
314 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
315 }
316 }
317 }
318
319 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, qmin) {
320 TEST_REQUIRES_ARM_NEON;
321 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
322 VMulMicrokernelTester()
323 .batch_size(batch_size)
324 .qmin(128)
325 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
326 }
327 }
328
329 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD64_X16, qmax) {
330 TEST_REQUIRES_ARM_NEON;
331 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
332 VMulMicrokernelTester()
333 .batch_size(batch_size)
334 .qmax(128)
335 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
336 }
337 }
338#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
339
340
341#if XNN_ARCH_ARM || XNN_ARCH_ARM64
342 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, batch_eq_16) {
343 TEST_REQUIRES_ARM_NEON;
344 VMulMicrokernelTester()
345 .batch_size(16)
346 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
347 }
348
349 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, batch_div_16) {
350 TEST_REQUIRES_ARM_NEON;
351 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
352 VMulMicrokernelTester()
353 .batch_size(batch_size)
354 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
355 }
356 }
357
358 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, batch_lt_16) {
359 TEST_REQUIRES_ARM_NEON;
360 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
361 VMulMicrokernelTester()
362 .batch_size(batch_size)
363 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
364 }
365 }
366
367 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, batch_gt_16) {
368 TEST_REQUIRES_ARM_NEON;
369 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
370 VMulMicrokernelTester()
371 .batch_size(batch_size)
372 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
373 }
374 }
375
376 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, inplace_a) {
377 TEST_REQUIRES_ARM_NEON;
378 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
379 VMulMicrokernelTester()
380 .batch_size(batch_size)
381 .inplace_a(true)
382 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
383 }
384 }
385
386 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, inplace_b) {
387 TEST_REQUIRES_ARM_NEON;
388 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
389 VMulMicrokernelTester()
390 .batch_size(batch_size)
391 .inplace_b(true)
392 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
393 }
394 }
395
396 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, inplace_a_and_b) {
397 TEST_REQUIRES_ARM_NEON;
398 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
399 VMulMicrokernelTester()
400 .batch_size(batch_size)
401 .inplace_a(true)
402 .inplace_b(true)
403 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
404 }
405 }
406
407 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, a_zero_point) {
408 TEST_REQUIRES_ARM_NEON;
409 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
410 for (int32_t a_zero_point = -128; a_zero_point <= 127; a_zero_point += 51) {
411 VMulMicrokernelTester()
412 .batch_size(batch_size)
413 .a_zero_point(a_zero_point)
414 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
415 }
416 }
417 }
418
419 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, b_zero_point) {
420 TEST_REQUIRES_ARM_NEON;
421 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
422 for (int32_t b_zero_point = -128; b_zero_point <= 127; b_zero_point += 51) {
423 VMulMicrokernelTester()
424 .batch_size(batch_size)
425 .b_zero_point(b_zero_point)
426 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
427 }
428 }
429 }
430
431 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, y_zero_point) {
432 TEST_REQUIRES_ARM_NEON;
433 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
434 for (int32_t y_zero_point = -128; y_zero_point <= 127; y_zero_point += 51) {
435 VMulMicrokernelTester()
436 .batch_size(batch_size)
437 .y_zero_point(y_zero_point)
438 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
439 }
440 }
441 }
442
443 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, a_scale) {
444 TEST_REQUIRES_ARM_NEON;
445 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
446 for (float a_scale = 0.1f; a_scale <= 10.0f; a_scale *= 3.14f) {
447 VMulMicrokernelTester()
448 .batch_size(batch_size)
449 .a_scale(a_scale)
450 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
451 }
452 }
453 }
454
455 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, b_scale) {
456 TEST_REQUIRES_ARM_NEON;
457 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
458 for (float b_scale = 0.1f; b_scale <= 10.0f; b_scale *= 3.14f) {
459 VMulMicrokernelTester()
460 .batch_size(batch_size)
461 .b_scale(b_scale)
462 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
463 }
464 }
465 }
466
467 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, y_scale) {
468 TEST_REQUIRES_ARM_NEON;
469 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
470 for (float y_scale = 0.1f; y_scale <= 10.0f; y_scale *= 3.14f) {
471 VMulMicrokernelTester()
472 .batch_size(batch_size)
473 .y_scale(y_scale)
474 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
475 }
476 }
477 }
478
479 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, qmin) {
480 TEST_REQUIRES_ARM_NEON;
481 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
482 VMulMicrokernelTester()
483 .batch_size(batch_size)
484 .qmin(128)
485 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
486 }
487 }
488
489 TEST(QU8_VMUL_MINMAX_RNDNU__NEON_LD128_X16, qmax) {
490 TEST_REQUIRES_ARM_NEON;
491 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
492 VMulMicrokernelTester()
493 .batch_size(batch_size)
494 .qmax(128)
495 .Test(xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
496 }
497 }
498#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64