Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2020 Google LLC |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 8 | // |
| 9 | // Auto-generated file. Do not edit! |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 10 | // Specification: test/f32-pavgpool-minmax.yaml |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 11 | // Generator: tools/generate-avgpool-test.py |
| 12 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 13 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 14 | #include <gtest/gtest.h> |
| 15 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 16 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 17 | #include <xnnpack/isa-checks.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 18 | |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 19 | #include <xnnpack/avgpool.h> |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 20 | #include <xnnpack/pavgpool.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 21 | #include "avgpool-microkernel-tester.h" |
| 22 | |
| 23 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 24 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 25 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 26 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 27 | AvgPoolMicrokernelTester() |
| 28 | .pooling_elements(17) |
| 29 | .pooling_tile(9, 8) |
| 30 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 31 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 32 | } |
| 33 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 34 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 35 | TEST_REQUIRES_ARM_NEON; |
| 36 | AvgPoolMicrokernelTester() |
| 37 | .pooling_elements(17) |
| 38 | .pooling_tile(9, 8) |
| 39 | .channels(4) |
| 40 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 41 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 42 | } |
| 43 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 44 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 45 | TEST_REQUIRES_ARM_NEON; |
| 46 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 47 | AvgPoolMicrokernelTester() |
| 48 | .pooling_elements(17) |
| 49 | .pooling_tile(9, 8) |
| 50 | .channels(4) |
| 51 | .input_offset(7) |
| 52 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 53 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 54 | } |
| 55 | } |
| 56 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 57 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 58 | TEST_REQUIRES_ARM_NEON; |
| 59 | AvgPoolMicrokernelTester() |
| 60 | .pooling_elements(17) |
| 61 | .pooling_tile(9, 8) |
| 62 | .channels(4) |
| 63 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 64 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 65 | } |
| 66 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 67 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 68 | TEST_REQUIRES_ARM_NEON; |
| 69 | AvgPoolMicrokernelTester() |
| 70 | .pooling_elements(17) |
| 71 | .pooling_tile(9, 8) |
| 72 | .channels(4) |
| 73 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 74 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 75 | } |
| 76 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 77 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 78 | TEST_REQUIRES_ARM_NEON; |
| 79 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 80 | AvgPoolMicrokernelTester() |
| 81 | .pooling_elements(pooling_elements) |
| 82 | .pooling_tile(9, 8) |
| 83 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 84 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 85 | } |
| 86 | } |
| 87 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 88 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 89 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 90 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 91 | AvgPoolMicrokernelTester() |
| 92 | .pooling_elements(pooling_elements) |
| 93 | .pooling_tile(9, 8) |
| 94 | .channels(4) |
| 95 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 96 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 97 | } |
| 98 | } |
| 99 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 100 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 101 | TEST_REQUIRES_ARM_NEON; |
| 102 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 103 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 104 | AvgPoolMicrokernelTester() |
| 105 | .pooling_elements(pooling_elements) |
| 106 | .pooling_tile(9, 8) |
| 107 | .channels(4) |
| 108 | .input_offset(7) |
| 109 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 110 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 111 | } |
| 112 | } |
| 113 | } |
| 114 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 115 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 116 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 117 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 118 | AvgPoolMicrokernelTester() |
| 119 | .pooling_elements(17) |
| 120 | .pooling_tile(9, 8) |
| 121 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 122 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 123 | } |
| 124 | } |
| 125 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 126 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 127 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 128 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 129 | AvgPoolMicrokernelTester() |
| 130 | .pooling_elements(17) |
| 131 | .pooling_tile(9, 8) |
| 132 | .channels(channels) |
| 133 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 134 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 135 | } |
| 136 | } |
| 137 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 138 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 139 | TEST_REQUIRES_ARM_NEON; |
| 140 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 141 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 142 | AvgPoolMicrokernelTester() |
| 143 | .pooling_elements(17) |
| 144 | .pooling_tile(9, 8) |
| 145 | .channels(channels) |
| 146 | .input_offset(23) |
| 147 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 148 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 149 | } |
| 150 | } |
| 151 | } |
| 152 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 153 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 154 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 155 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 156 | AvgPoolMicrokernelTester() |
| 157 | .pooling_elements(17) |
| 158 | .pooling_tile(9, 8) |
| 159 | .channels(channels) |
| 160 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 161 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 162 | } |
| 163 | } |
| 164 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 165 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_fulltile_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 166 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 167 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 168 | AvgPoolMicrokernelTester() |
| 169 | .pooling_elements(17) |
| 170 | .pooling_tile(9, 8) |
| 171 | .channels(channels) |
| 172 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 173 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 174 | } |
| 175 | } |
| 176 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 177 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_subtile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 178 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 179 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 180 | for (size_t channels = 8; channels < 32; channels += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 181 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 182 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 183 | .pooling_tile(9, 8) |
| 184 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 185 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 186 | } |
| 187 | } |
| 188 | } |
| 189 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 190 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 191 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 192 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 193 | for (size_t channels = 8; channels < 32; channels += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 194 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 195 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 196 | .pooling_tile(9, 8) |
| 197 | .channels(channels) |
| 198 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 199 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 200 | } |
| 201 | } |
| 202 | } |
| 203 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 204 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 205 | TEST_REQUIRES_ARM_NEON; |
| 206 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 207 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 208 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 209 | AvgPoolMicrokernelTester() |
| 210 | .pooling_elements(pooling_elements) |
| 211 | .pooling_tile(9, 8) |
| 212 | .channels(channels) |
| 213 | .input_offset(37) |
| 214 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 215 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 216 | } |
| 217 | } |
| 218 | } |
| 219 | } |
| 220 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 221 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 222 | TEST_REQUIRES_ARM_NEON; |
| 223 | for (size_t channels = 1; channels < 4; channels++) { |
| 224 | AvgPoolMicrokernelTester() |
| 225 | .pooling_elements(17) |
| 226 | .pooling_tile(9, 8) |
| 227 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 228 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 229 | } |
| 230 | } |
| 231 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 232 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 233 | TEST_REQUIRES_ARM_NEON; |
| 234 | for (size_t channels = 1; channels < 4; channels++) { |
| 235 | AvgPoolMicrokernelTester() |
| 236 | .pooling_elements(17) |
| 237 | .pooling_tile(9, 8) |
| 238 | .channels(channels) |
| 239 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 240 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 241 | } |
| 242 | } |
| 243 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 244 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile_with_zero_index) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 245 | TEST_REQUIRES_ARM_NEON; |
| 246 | for (size_t channels = 1; channels < 4; channels++) { |
| 247 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 248 | AvgPoolMicrokernelTester() |
| 249 | .pooling_elements(17) |
| 250 | .pooling_tile(9, 8) |
| 251 | .channels(channels) |
| 252 | .input_offset(5) |
| 253 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 254 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 255 | } |
| 256 | } |
| 257 | } |
| 258 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 259 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 260 | TEST_REQUIRES_ARM_NEON; |
| 261 | for (size_t channels = 1; channels < 4; channels++) { |
| 262 | AvgPoolMicrokernelTester() |
| 263 | .pooling_elements(17) |
| 264 | .pooling_tile(9, 8) |
| 265 | .channels(channels) |
| 266 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 267 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 268 | } |
| 269 | } |
| 270 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 271 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 272 | TEST_REQUIRES_ARM_NEON; |
| 273 | for (size_t channels = 1; channels < 4; channels++) { |
| 274 | AvgPoolMicrokernelTester() |
| 275 | .pooling_elements(17) |
| 276 | .pooling_tile(9, 8) |
| 277 | .channels(channels) |
| 278 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 279 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 280 | } |
| 281 | } |
| 282 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 283 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 284 | TEST_REQUIRES_ARM_NEON; |
| 285 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 286 | for (size_t channels = 1; channels < 4; channels++) { |
| 287 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 288 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 289 | .pooling_tile(9, 8) |
| 290 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 291 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 292 | } |
| 293 | } |
| 294 | } |
| 295 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 296 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 297 | TEST_REQUIRES_ARM_NEON; |
| 298 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 299 | for (size_t channels = 1; channels < 4; channels++) { |
| 300 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 301 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 302 | .pooling_tile(9, 8) |
| 303 | .channels(channels) |
| 304 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 305 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 306 | } |
| 307 | } |
| 308 | } |
| 309 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 310 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 311 | TEST_REQUIRES_ARM_NEON; |
| 312 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 313 | for (size_t channels = 1; channels < 4; channels++) { |
| 314 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 315 | AvgPoolMicrokernelTester() |
| 316 | .pooling_elements(pooling_elements) |
| 317 | .pooling_tile(9, 8) |
| 318 | .channels(channels) |
| 319 | .input_offset(5) |
| 320 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 321 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 322 | } |
| 323 | } |
| 324 | } |
| 325 | } |
| 326 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 327 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 328 | TEST_REQUIRES_ARM_NEON; |
| 329 | for (size_t channels = 5; channels < 8; channels++) { |
| 330 | AvgPoolMicrokernelTester() |
| 331 | .pooling_elements(17) |
| 332 | .pooling_tile(9, 8) |
| 333 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 334 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 335 | } |
| 336 | } |
| 337 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 338 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 339 | TEST_REQUIRES_ARM_NEON; |
| 340 | for (size_t channels = 5; channels < 8; channels++) { |
| 341 | AvgPoolMicrokernelTester() |
| 342 | .pooling_elements(17) |
| 343 | .pooling_tile(9, 8) |
| 344 | .channels(channels) |
| 345 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 346 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 347 | } |
| 348 | } |
| 349 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 350 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 351 | TEST_REQUIRES_ARM_NEON; |
| 352 | for (size_t channels = 5; channels < 8; channels++) { |
| 353 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 354 | AvgPoolMicrokernelTester() |
| 355 | .pooling_elements(17) |
| 356 | .pooling_tile(9, 8) |
| 357 | .channels(channels) |
| 358 | .input_offset(11) |
| 359 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 360 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 361 | } |
| 362 | } |
| 363 | } |
| 364 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 365 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 366 | TEST_REQUIRES_ARM_NEON; |
| 367 | for (size_t channels = 5; channels < 8; channels++) { |
| 368 | AvgPoolMicrokernelTester() |
| 369 | .pooling_elements(17) |
| 370 | .pooling_tile(9, 8) |
| 371 | .channels(channels) |
| 372 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 373 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 374 | } |
| 375 | } |
| 376 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 377 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 378 | TEST_REQUIRES_ARM_NEON; |
| 379 | for (size_t channels = 5; channels < 8; channels++) { |
| 380 | AvgPoolMicrokernelTester() |
| 381 | .pooling_elements(17) |
| 382 | .pooling_tile(9, 8) |
| 383 | .channels(channels) |
| 384 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 385 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 386 | } |
| 387 | } |
| 388 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 389 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 390 | TEST_REQUIRES_ARM_NEON; |
| 391 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 392 | for (size_t channels = 5; channels < 8; channels++) { |
| 393 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 394 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 395 | .pooling_tile(9, 8) |
| 396 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 397 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 398 | } |
| 399 | } |
| 400 | } |
| 401 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 402 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 403 | TEST_REQUIRES_ARM_NEON; |
| 404 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 405 | for (size_t channels = 5; channels < 8; channels++) { |
| 406 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 407 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 408 | .pooling_tile(9, 8) |
| 409 | .channels(channels) |
| 410 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 411 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 412 | } |
| 413 | } |
| 414 | } |
| 415 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 416 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 417 | TEST_REQUIRES_ARM_NEON; |
| 418 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 419 | for (size_t channels = 5; channels < 8; channels++) { |
| 420 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 421 | AvgPoolMicrokernelTester() |
| 422 | .pooling_elements(pooling_elements) |
| 423 | .pooling_tile(9, 8) |
| 424 | .channels(channels) |
| 425 | .input_offset(11) |
| 426 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 427 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 428 | } |
| 429 | } |
| 430 | } |
| 431 | } |
| 432 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 433 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 434 | TEST_REQUIRES_ARM_NEON; |
| 435 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 436 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 437 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 438 | .pooling_tile(9, 8) |
| 439 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 440 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 441 | } |
| 442 | } |
| 443 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 444 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 445 | TEST_REQUIRES_ARM_NEON; |
| 446 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 447 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 448 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 449 | .pooling_tile(9, 8) |
| 450 | .channels(4) |
| 451 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 452 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 453 | } |
| 454 | } |
| 455 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 456 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 457 | TEST_REQUIRES_ARM_NEON; |
| 458 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 459 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 460 | AvgPoolMicrokernelTester() |
| 461 | .pooling_elements(pooling_elements) |
| 462 | .pooling_tile(9, 8) |
| 463 | .channels(4) |
| 464 | .input_offset(7) |
| 465 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 466 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 467 | } |
| 468 | } |
| 469 | } |
| 470 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 471 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 472 | TEST_REQUIRES_ARM_NEON; |
| 473 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 474 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 475 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 476 | .pooling_tile(9, 8) |
| 477 | .channels(4) |
| 478 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 479 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 480 | } |
| 481 | } |
| 482 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 483 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_eq_4_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 484 | TEST_REQUIRES_ARM_NEON; |
| 485 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 486 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 487 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 488 | .pooling_tile(9, 8) |
| 489 | .channels(4) |
| 490 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 491 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 492 | } |
| 493 | } |
| 494 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 495 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 496 | TEST_REQUIRES_ARM_NEON; |
| 497 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 498 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 499 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 500 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 501 | .pooling_tile(9, 8) |
| 502 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 503 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 504 | } |
| 505 | } |
| 506 | } |
| 507 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 508 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 509 | TEST_REQUIRES_ARM_NEON; |
| 510 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 511 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 512 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 513 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 514 | .pooling_tile(9, 8) |
| 515 | .channels(channels) |
| 516 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 517 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 518 | } |
| 519 | } |
| 520 | } |
| 521 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 522 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 523 | TEST_REQUIRES_ARM_NEON; |
| 524 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 525 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 526 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 527 | AvgPoolMicrokernelTester() |
| 528 | .pooling_elements(pooling_elements) |
| 529 | .pooling_tile(9, 8) |
| 530 | .channels(channels) |
| 531 | .input_offset(37) |
| 532 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 533 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 534 | } |
| 535 | } |
| 536 | } |
| 537 | } |
| 538 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 539 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 540 | TEST_REQUIRES_ARM_NEON; |
| 541 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 542 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 543 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 544 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 545 | .pooling_tile(9, 8) |
| 546 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 547 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 548 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 549 | } |
| 550 | } |
| 551 | } |
| 552 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 553 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_div_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 554 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 555 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 556 | for (size_t channels = 8; channels < 32; channels += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 557 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 558 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 559 | .pooling_tile(9, 8) |
| 560 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 561 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 562 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 563 | } |
| 564 | } |
| 565 | } |
| 566 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 567 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 568 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 569 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 570 | for (size_t channels = 1; channels < 4; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 571 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 572 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 573 | .pooling_tile(9, 8) |
| 574 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 575 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 576 | } |
| 577 | } |
| 578 | } |
| 579 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 580 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 581 | TEST_REQUIRES_ARM_NEON; |
| 582 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 583 | for (size_t channels = 1; channels < 4; channels++) { |
| 584 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 585 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 586 | .pooling_tile(9, 8) |
| 587 | .channels(channels) |
| 588 | .input_offset(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 589 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 590 | } |
| 591 | } |
| 592 | } |
| 593 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 594 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 595 | TEST_REQUIRES_ARM_NEON; |
| 596 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 597 | for (size_t channels = 1; channels < 4; channels++) { |
| 598 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 599 | AvgPoolMicrokernelTester() |
| 600 | .pooling_elements(pooling_elements) |
| 601 | .pooling_tile(9, 8) |
| 602 | .channels(channels) |
| 603 | .input_offset(4) |
| 604 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 605 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 606 | } |
| 607 | } |
| 608 | } |
| 609 | } |
| 610 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 611 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 612 | TEST_REQUIRES_ARM_NEON; |
| 613 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 614 | for (size_t channels = 1; channels < 4; channels++) { |
| 615 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 616 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 617 | .pooling_tile(9, 8) |
| 618 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 619 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 620 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 621 | } |
| 622 | } |
| 623 | } |
| 624 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 625 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_lt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 626 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 627 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 628 | for (size_t channels = 1; channels < 4; channels++) { |
| 629 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 630 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 631 | .pooling_tile(9, 8) |
| 632 | .channels(channels) |
| 633 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 634 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 635 | } |
| 636 | } |
| 637 | } |
| 638 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 639 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 640 | TEST_REQUIRES_ARM_NEON; |
| 641 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 642 | for (size_t channels = 5; channels < 8; channels++) { |
| 643 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 644 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 645 | .pooling_tile(9, 8) |
| 646 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 647 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 648 | } |
| 649 | } |
| 650 | } |
| 651 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 652 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 653 | TEST_REQUIRES_ARM_NEON; |
| 654 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 655 | for (size_t channels = 5; channels < 8; channels++) { |
| 656 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 657 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 658 | .pooling_tile(9, 8) |
| 659 | .channels(channels) |
| 660 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 661 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 662 | } |
| 663 | } |
| 664 | } |
| 665 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 666 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 667 | TEST_REQUIRES_ARM_NEON; |
| 668 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 669 | for (size_t channels = 5; channels < 8; channels++) { |
| 670 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 671 | AvgPoolMicrokernelTester() |
| 672 | .pooling_elements(pooling_elements) |
| 673 | .pooling_tile(9, 8) |
| 674 | .channels(channels) |
| 675 | .input_offset(11) |
| 676 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 677 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 678 | } |
| 679 | } |
| 680 | } |
| 681 | } |
| 682 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 683 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 684 | TEST_REQUIRES_ARM_NEON; |
| 685 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 686 | for (size_t channels = 5; channels < 8; channels++) { |
| 687 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 688 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 689 | .pooling_tile(9, 8) |
| 690 | .channels(channels) |
| 691 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 692 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 693 | } |
| 694 | } |
| 695 | } |
| 696 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 697 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, channels_gt_4_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 698 | TEST_REQUIRES_ARM_NEON; |
| 699 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 700 | for (size_t channels = 5; channels < 8; channels++) { |
| 701 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 702 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 703 | .pooling_tile(9, 8) |
| 704 | .channels(channels) |
| 705 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 706 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 707 | } |
| 708 | } |
| 709 | } |
| 710 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 711 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 712 | TEST_REQUIRES_ARM_NEON; |
| 713 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 714 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 715 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 716 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 717 | .output_pixels(output_pixels) |
| 718 | .pooling_elements(pooling_elements) |
| 719 | .pooling_tile(9, 8) |
| 720 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 721 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 722 | } |
| 723 | } |
| 724 | } |
| 725 | } |
| 726 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 727 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 728 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 729 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 730 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 731 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 732 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 733 | .output_pixels(output_pixels) |
| 734 | .pooling_elements(pooling_elements) |
| 735 | .pooling_tile(9, 8) |
| 736 | .channels(channels) |
| 737 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 738 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 739 | } |
| 740 | } |
| 741 | } |
| 742 | } |
| 743 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 744 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 745 | TEST_REQUIRES_ARM_NEON; |
| 746 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 747 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 748 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 749 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 750 | AvgPoolMicrokernelTester() |
| 751 | .output_pixels(output_pixels) |
| 752 | .pooling_elements(pooling_elements) |
| 753 | .pooling_tile(9, 8) |
| 754 | .channels(channels) |
| 755 | .input_offset(23) |
| 756 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 757 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 758 | } |
| 759 | } |
| 760 | } |
| 761 | } |
| 762 | } |
| 763 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 764 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 765 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 766 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 767 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 768 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 769 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 770 | .output_pixels(output_pixels) |
| 771 | .pooling_elements(pooling_elements) |
| 772 | .pooling_tile(9, 8) |
| 773 | .channels(channels) |
| 774 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 775 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 776 | } |
| 777 | } |
| 778 | } |
| 779 | } |
| 780 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 781 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 782 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 783 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 784 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 785 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 786 | AvgPoolMicrokernelTester() |
| 787 | .output_pixels(output_pixels) |
| 788 | .pooling_elements(pooling_elements) |
| 789 | .pooling_tile(9, 8) |
| 790 | .channels(channels) |
| 791 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 792 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 793 | } |
| 794 | } |
| 795 | } |
| 796 | } |
| 797 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 798 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_output_stride) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 799 | TEST_REQUIRES_ARM_NEON; |
| 800 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 801 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 802 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 803 | AvgPoolMicrokernelTester() |
| 804 | .output_pixels(output_pixels) |
| 805 | .pooling_elements(pooling_elements) |
| 806 | .pooling_tile(9, 8) |
| 807 | .channels(channels) |
| 808 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 809 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 810 | } |
| 811 | } |
| 812 | } |
| 813 | } |
| 814 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 815 | TEST(F32_PAVGPOOL_MINMAX_9P8X__NEON_C4, few_output_pixels_with_step) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 816 | TEST_REQUIRES_ARM_NEON; |
| 817 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 818 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 819 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 820 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 821 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 822 | .output_pixels(output_pixels) |
| 823 | .pooling_elements(pooling_elements) |
| 824 | .pooling_tile(9, 8) |
| 825 | .step(step) |
| 826 | .channels(channels) |
| 827 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 828 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__neon_c4, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 829 | } |
| 830 | } |
| 831 | } |
| 832 | } |
| 833 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 834 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 835 | |
| 836 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 837 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 838 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 839 | TEST_REQUIRES_X86_SSE; |
| 840 | AvgPoolMicrokernelTester() |
| 841 | .pooling_elements(17) |
| 842 | .pooling_tile(9, 8) |
| 843 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 844 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 845 | } |
| 846 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 847 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 848 | TEST_REQUIRES_X86_SSE; |
| 849 | AvgPoolMicrokernelTester() |
| 850 | .pooling_elements(17) |
| 851 | .pooling_tile(9, 8) |
| 852 | .channels(4) |
| 853 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 854 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 855 | } |
| 856 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 857 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 858 | TEST_REQUIRES_X86_SSE; |
| 859 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 860 | AvgPoolMicrokernelTester() |
| 861 | .pooling_elements(17) |
| 862 | .pooling_tile(9, 8) |
| 863 | .channels(4) |
| 864 | .input_offset(7) |
| 865 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 866 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 867 | } |
| 868 | } |
| 869 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 870 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 871 | TEST_REQUIRES_X86_SSE; |
| 872 | AvgPoolMicrokernelTester() |
| 873 | .pooling_elements(17) |
| 874 | .pooling_tile(9, 8) |
| 875 | .channels(4) |
| 876 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 877 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 878 | } |
| 879 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 880 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 881 | TEST_REQUIRES_X86_SSE; |
| 882 | AvgPoolMicrokernelTester() |
| 883 | .pooling_elements(17) |
| 884 | .pooling_tile(9, 8) |
| 885 | .channels(4) |
| 886 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 887 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 888 | } |
| 889 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 890 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 891 | TEST_REQUIRES_X86_SSE; |
| 892 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 893 | AvgPoolMicrokernelTester() |
| 894 | .pooling_elements(pooling_elements) |
| 895 | .pooling_tile(9, 8) |
| 896 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 897 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 898 | } |
| 899 | } |
| 900 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 901 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 902 | TEST_REQUIRES_X86_SSE; |
| 903 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 904 | AvgPoolMicrokernelTester() |
| 905 | .pooling_elements(pooling_elements) |
| 906 | .pooling_tile(9, 8) |
| 907 | .channels(4) |
| 908 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 909 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 910 | } |
| 911 | } |
| 912 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 913 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 914 | TEST_REQUIRES_X86_SSE; |
| 915 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 916 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 917 | AvgPoolMicrokernelTester() |
| 918 | .pooling_elements(pooling_elements) |
| 919 | .pooling_tile(9, 8) |
| 920 | .channels(4) |
| 921 | .input_offset(7) |
| 922 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 923 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 924 | } |
| 925 | } |
| 926 | } |
| 927 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 928 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 929 | TEST_REQUIRES_X86_SSE; |
| 930 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 931 | AvgPoolMicrokernelTester() |
| 932 | .pooling_elements(17) |
| 933 | .pooling_tile(9, 8) |
| 934 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 935 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 936 | } |
| 937 | } |
| 938 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 939 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 940 | TEST_REQUIRES_X86_SSE; |
| 941 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 942 | AvgPoolMicrokernelTester() |
| 943 | .pooling_elements(17) |
| 944 | .pooling_tile(9, 8) |
| 945 | .channels(channels) |
| 946 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 947 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 948 | } |
| 949 | } |
| 950 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 951 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 952 | TEST_REQUIRES_X86_SSE; |
| 953 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 954 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 955 | AvgPoolMicrokernelTester() |
| 956 | .pooling_elements(17) |
| 957 | .pooling_tile(9, 8) |
| 958 | .channels(channels) |
| 959 | .input_offset(23) |
| 960 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 961 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 962 | } |
| 963 | } |
| 964 | } |
| 965 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 966 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 967 | TEST_REQUIRES_X86_SSE; |
| 968 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 969 | AvgPoolMicrokernelTester() |
| 970 | .pooling_elements(17) |
| 971 | .pooling_tile(9, 8) |
| 972 | .channels(channels) |
| 973 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 974 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 975 | } |
| 976 | } |
| 977 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 978 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 979 | TEST_REQUIRES_X86_SSE; |
| 980 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 981 | AvgPoolMicrokernelTester() |
| 982 | .pooling_elements(17) |
| 983 | .pooling_tile(9, 8) |
| 984 | .channels(channels) |
| 985 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 986 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 987 | } |
| 988 | } |
| 989 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 990 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 991 | TEST_REQUIRES_X86_SSE; |
| 992 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 993 | for (size_t channels = 8; channels < 32; channels += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 994 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 995 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 996 | .pooling_tile(9, 8) |
| 997 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 998 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 999 | } |
| 1000 | } |
| 1001 | } |
| 1002 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1003 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1004 | TEST_REQUIRES_X86_SSE; |
| 1005 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1006 | for (size_t channels = 8; channels < 32; channels += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1007 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1008 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1009 | .pooling_tile(9, 8) |
| 1010 | .channels(channels) |
| 1011 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1012 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1013 | } |
| 1014 | } |
| 1015 | } |
| 1016 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1017 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1018 | TEST_REQUIRES_X86_SSE; |
| 1019 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1020 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1021 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1022 | AvgPoolMicrokernelTester() |
| 1023 | .pooling_elements(pooling_elements) |
| 1024 | .pooling_tile(9, 8) |
| 1025 | .channels(channels) |
| 1026 | .input_offset(37) |
| 1027 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1028 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1029 | } |
| 1030 | } |
| 1031 | } |
| 1032 | } |
| 1033 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1034 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1035 | TEST_REQUIRES_X86_SSE; |
| 1036 | for (size_t channels = 1; channels < 4; channels++) { |
| 1037 | AvgPoolMicrokernelTester() |
| 1038 | .pooling_elements(17) |
| 1039 | .pooling_tile(9, 8) |
| 1040 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1041 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1042 | } |
| 1043 | } |
| 1044 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1045 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1046 | TEST_REQUIRES_X86_SSE; |
| 1047 | for (size_t channels = 1; channels < 4; channels++) { |
| 1048 | AvgPoolMicrokernelTester() |
| 1049 | .pooling_elements(17) |
| 1050 | .pooling_tile(9, 8) |
| 1051 | .channels(channels) |
| 1052 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1053 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1054 | } |
| 1055 | } |
| 1056 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1057 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_zero_index) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1058 | TEST_REQUIRES_X86_SSE; |
| 1059 | for (size_t channels = 1; channels < 4; channels++) { |
| 1060 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 1061 | AvgPoolMicrokernelTester() |
| 1062 | .pooling_elements(17) |
| 1063 | .pooling_tile(9, 8) |
| 1064 | .channels(channels) |
| 1065 | .input_offset(5) |
| 1066 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1067 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1068 | } |
| 1069 | } |
| 1070 | } |
| 1071 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1072 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1073 | TEST_REQUIRES_X86_SSE; |
| 1074 | for (size_t channels = 1; channels < 4; channels++) { |
| 1075 | AvgPoolMicrokernelTester() |
| 1076 | .pooling_elements(17) |
| 1077 | .pooling_tile(9, 8) |
| 1078 | .channels(channels) |
| 1079 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1080 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1081 | } |
| 1082 | } |
| 1083 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1084 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1085 | TEST_REQUIRES_X86_SSE; |
| 1086 | for (size_t channels = 1; channels < 4; channels++) { |
| 1087 | AvgPoolMicrokernelTester() |
| 1088 | .pooling_elements(17) |
| 1089 | .pooling_tile(9, 8) |
| 1090 | .channels(channels) |
| 1091 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1092 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1093 | } |
| 1094 | } |
| 1095 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1096 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1097 | TEST_REQUIRES_X86_SSE; |
| 1098 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1099 | for (size_t channels = 1; channels < 4; channels++) { |
| 1100 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1101 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1102 | .pooling_tile(9, 8) |
| 1103 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1104 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1105 | } |
| 1106 | } |
| 1107 | } |
| 1108 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1109 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1110 | TEST_REQUIRES_X86_SSE; |
| 1111 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1112 | for (size_t channels = 1; channels < 4; channels++) { |
| 1113 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1114 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1115 | .pooling_tile(9, 8) |
| 1116 | .channels(channels) |
| 1117 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1118 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1119 | } |
| 1120 | } |
| 1121 | } |
| 1122 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1123 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1124 | TEST_REQUIRES_X86_SSE; |
| 1125 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1126 | for (size_t channels = 1; channels < 4; channels++) { |
| 1127 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1128 | AvgPoolMicrokernelTester() |
| 1129 | .pooling_elements(pooling_elements) |
| 1130 | .pooling_tile(9, 8) |
| 1131 | .channels(channels) |
| 1132 | .input_offset(5) |
| 1133 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1134 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1135 | } |
| 1136 | } |
| 1137 | } |
| 1138 | } |
| 1139 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1140 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1141 | TEST_REQUIRES_X86_SSE; |
| 1142 | for (size_t channels = 5; channels < 8; channels++) { |
| 1143 | AvgPoolMicrokernelTester() |
| 1144 | .pooling_elements(17) |
| 1145 | .pooling_tile(9, 8) |
| 1146 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1147 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1148 | } |
| 1149 | } |
| 1150 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1151 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1152 | TEST_REQUIRES_X86_SSE; |
| 1153 | for (size_t channels = 5; channels < 8; channels++) { |
| 1154 | AvgPoolMicrokernelTester() |
| 1155 | .pooling_elements(17) |
| 1156 | .pooling_tile(9, 8) |
| 1157 | .channels(channels) |
| 1158 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1159 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1160 | } |
| 1161 | } |
| 1162 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1163 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1164 | TEST_REQUIRES_X86_SSE; |
| 1165 | for (size_t channels = 5; channels < 8; channels++) { |
| 1166 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 1167 | AvgPoolMicrokernelTester() |
| 1168 | .pooling_elements(17) |
| 1169 | .pooling_tile(9, 8) |
| 1170 | .channels(channels) |
| 1171 | .input_offset(11) |
| 1172 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1173 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1174 | } |
| 1175 | } |
| 1176 | } |
| 1177 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1178 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1179 | TEST_REQUIRES_X86_SSE; |
| 1180 | for (size_t channels = 5; channels < 8; channels++) { |
| 1181 | AvgPoolMicrokernelTester() |
| 1182 | .pooling_elements(17) |
| 1183 | .pooling_tile(9, 8) |
| 1184 | .channels(channels) |
| 1185 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1186 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1187 | } |
| 1188 | } |
| 1189 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1190 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1191 | TEST_REQUIRES_X86_SSE; |
| 1192 | for (size_t channels = 5; channels < 8; channels++) { |
| 1193 | AvgPoolMicrokernelTester() |
| 1194 | .pooling_elements(17) |
| 1195 | .pooling_tile(9, 8) |
| 1196 | .channels(channels) |
| 1197 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1198 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1199 | } |
| 1200 | } |
| 1201 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1202 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1203 | TEST_REQUIRES_X86_SSE; |
| 1204 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1205 | for (size_t channels = 5; channels < 8; channels++) { |
| 1206 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1207 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1208 | .pooling_tile(9, 8) |
| 1209 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1210 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1211 | } |
| 1212 | } |
| 1213 | } |
| 1214 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1215 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1216 | TEST_REQUIRES_X86_SSE; |
| 1217 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1218 | for (size_t channels = 5; channels < 8; channels++) { |
| 1219 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1220 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1221 | .pooling_tile(9, 8) |
| 1222 | .channels(channels) |
| 1223 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1224 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1225 | } |
| 1226 | } |
| 1227 | } |
| 1228 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1229 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1230 | TEST_REQUIRES_X86_SSE; |
| 1231 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1232 | for (size_t channels = 5; channels < 8; channels++) { |
| 1233 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1234 | AvgPoolMicrokernelTester() |
| 1235 | .pooling_elements(pooling_elements) |
| 1236 | .pooling_tile(9, 8) |
| 1237 | .channels(channels) |
| 1238 | .input_offset(11) |
| 1239 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1240 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1241 | } |
| 1242 | } |
| 1243 | } |
| 1244 | } |
| 1245 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1246 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1247 | TEST_REQUIRES_X86_SSE; |
| 1248 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1249 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1250 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1251 | .pooling_tile(9, 8) |
| 1252 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1253 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1254 | } |
| 1255 | } |
| 1256 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1257 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1258 | TEST_REQUIRES_X86_SSE; |
| 1259 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1260 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1261 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1262 | .pooling_tile(9, 8) |
| 1263 | .channels(4) |
| 1264 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1265 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1266 | } |
| 1267 | } |
| 1268 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1269 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1270 | TEST_REQUIRES_X86_SSE; |
| 1271 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1272 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1273 | AvgPoolMicrokernelTester() |
| 1274 | .pooling_elements(pooling_elements) |
| 1275 | .pooling_tile(9, 8) |
| 1276 | .channels(4) |
| 1277 | .input_offset(7) |
| 1278 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1279 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1280 | } |
| 1281 | } |
| 1282 | } |
| 1283 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1284 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1285 | TEST_REQUIRES_X86_SSE; |
| 1286 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1287 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1288 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1289 | .pooling_tile(9, 8) |
| 1290 | .channels(4) |
| 1291 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1292 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1293 | } |
| 1294 | } |
| 1295 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1296 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_eq_4_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1297 | TEST_REQUIRES_X86_SSE; |
| 1298 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1299 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1300 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1301 | .pooling_tile(9, 8) |
| 1302 | .channels(4) |
| 1303 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1304 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1305 | } |
| 1306 | } |
| 1307 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1308 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1309 | TEST_REQUIRES_X86_SSE; |
| 1310 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1311 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1312 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1313 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1314 | .pooling_tile(9, 8) |
| 1315 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1316 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1317 | } |
| 1318 | } |
| 1319 | } |
| 1320 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1321 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1322 | TEST_REQUIRES_X86_SSE; |
| 1323 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1324 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1325 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1326 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1327 | .pooling_tile(9, 8) |
| 1328 | .channels(channels) |
| 1329 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1330 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1331 | } |
| 1332 | } |
| 1333 | } |
| 1334 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1335 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1336 | TEST_REQUIRES_X86_SSE; |
| 1337 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1338 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1339 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1340 | AvgPoolMicrokernelTester() |
| 1341 | .pooling_elements(pooling_elements) |
| 1342 | .pooling_tile(9, 8) |
| 1343 | .channels(channels) |
| 1344 | .input_offset(37) |
| 1345 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1346 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1347 | } |
| 1348 | } |
| 1349 | } |
| 1350 | } |
| 1351 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1352 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1353 | TEST_REQUIRES_X86_SSE; |
| 1354 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1355 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1356 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1357 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1358 | .pooling_tile(9, 8) |
| 1359 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1360 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1361 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1362 | } |
| 1363 | } |
| 1364 | } |
| 1365 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1366 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_div_4_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1367 | TEST_REQUIRES_X86_SSE; |
| 1368 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1369 | for (size_t channels = 8; channels < 32; channels += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1370 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1371 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1372 | .pooling_tile(9, 8) |
| 1373 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1374 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1375 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1376 | } |
| 1377 | } |
| 1378 | } |
| 1379 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1380 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1381 | TEST_REQUIRES_X86_SSE; |
| 1382 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1383 | for (size_t channels = 1; channels < 4; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1384 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1385 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1386 | .pooling_tile(9, 8) |
| 1387 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1388 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1389 | } |
| 1390 | } |
| 1391 | } |
| 1392 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1393 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1394 | TEST_REQUIRES_X86_SSE; |
| 1395 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1396 | for (size_t channels = 1; channels < 4; channels++) { |
| 1397 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1398 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1399 | .pooling_tile(9, 8) |
| 1400 | .channels(channels) |
| 1401 | .input_offset(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1402 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1403 | } |
| 1404 | } |
| 1405 | } |
| 1406 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1407 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1408 | TEST_REQUIRES_X86_SSE; |
| 1409 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1410 | for (size_t channels = 1; channels < 4; channels++) { |
| 1411 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1412 | AvgPoolMicrokernelTester() |
| 1413 | .pooling_elements(pooling_elements) |
| 1414 | .pooling_tile(9, 8) |
| 1415 | .channels(channels) |
| 1416 | .input_offset(4) |
| 1417 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1418 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1419 | } |
| 1420 | } |
| 1421 | } |
| 1422 | } |
| 1423 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1424 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1425 | TEST_REQUIRES_X86_SSE; |
| 1426 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1427 | for (size_t channels = 1; channels < 4; channels++) { |
| 1428 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1429 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1430 | .pooling_tile(9, 8) |
| 1431 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1432 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1433 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1434 | } |
| 1435 | } |
| 1436 | } |
| 1437 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1438 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_lt_4_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1439 | TEST_REQUIRES_X86_SSE; |
| 1440 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1441 | for (size_t channels = 1; channels < 4; channels++) { |
| 1442 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1443 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1444 | .pooling_tile(9, 8) |
| 1445 | .channels(channels) |
| 1446 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1447 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1448 | } |
| 1449 | } |
| 1450 | } |
| 1451 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1452 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1453 | TEST_REQUIRES_X86_SSE; |
| 1454 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1455 | for (size_t channels = 5; channels < 8; channels++) { |
| 1456 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1457 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1458 | .pooling_tile(9, 8) |
| 1459 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1460 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1461 | } |
| 1462 | } |
| 1463 | } |
| 1464 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1465 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1466 | TEST_REQUIRES_X86_SSE; |
| 1467 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1468 | for (size_t channels = 5; channels < 8; channels++) { |
| 1469 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1470 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1471 | .pooling_tile(9, 8) |
| 1472 | .channels(channels) |
| 1473 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1474 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1475 | } |
| 1476 | } |
| 1477 | } |
| 1478 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1479 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1480 | TEST_REQUIRES_X86_SSE; |
| 1481 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1482 | for (size_t channels = 5; channels < 8; channels++) { |
| 1483 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1484 | AvgPoolMicrokernelTester() |
| 1485 | .pooling_elements(pooling_elements) |
| 1486 | .pooling_tile(9, 8) |
| 1487 | .channels(channels) |
| 1488 | .input_offset(11) |
| 1489 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1490 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1491 | } |
| 1492 | } |
| 1493 | } |
| 1494 | } |
| 1495 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1496 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1497 | TEST_REQUIRES_X86_SSE; |
| 1498 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1499 | for (size_t channels = 5; channels < 8; channels++) { |
| 1500 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1501 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1502 | .pooling_tile(9, 8) |
| 1503 | .channels(channels) |
| 1504 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1505 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1506 | } |
| 1507 | } |
| 1508 | } |
| 1509 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1510 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, channels_gt_4_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1511 | TEST_REQUIRES_X86_SSE; |
| 1512 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1513 | for (size_t channels = 5; channels < 8; channels++) { |
| 1514 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1515 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1516 | .pooling_tile(9, 8) |
| 1517 | .channels(channels) |
| 1518 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1519 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1520 | } |
| 1521 | } |
| 1522 | } |
| 1523 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1524 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1525 | TEST_REQUIRES_X86_SSE; |
| 1526 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1527 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 1528 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1529 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1530 | .output_pixels(output_pixels) |
| 1531 | .pooling_elements(pooling_elements) |
| 1532 | .pooling_tile(9, 8) |
| 1533 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1534 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1535 | } |
| 1536 | } |
| 1537 | } |
| 1538 | } |
| 1539 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1540 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1541 | TEST_REQUIRES_X86_SSE; |
| 1542 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1543 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 1544 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1545 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1546 | .output_pixels(output_pixels) |
| 1547 | .pooling_elements(pooling_elements) |
| 1548 | .pooling_tile(9, 8) |
| 1549 | .channels(channels) |
| 1550 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1551 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1552 | } |
| 1553 | } |
| 1554 | } |
| 1555 | } |
| 1556 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1557 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1558 | TEST_REQUIRES_X86_SSE; |
| 1559 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1560 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 1561 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1562 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1563 | AvgPoolMicrokernelTester() |
| 1564 | .output_pixels(output_pixels) |
| 1565 | .pooling_elements(pooling_elements) |
| 1566 | .pooling_tile(9, 8) |
| 1567 | .channels(channels) |
| 1568 | .input_offset(23) |
| 1569 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1570 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 1571 | } |
| 1572 | } |
| 1573 | } |
| 1574 | } |
| 1575 | } |
| 1576 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1577 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1578 | TEST_REQUIRES_X86_SSE; |
| 1579 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1580 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 1581 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1582 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1583 | .output_pixels(output_pixels) |
| 1584 | .pooling_elements(pooling_elements) |
| 1585 | .pooling_tile(9, 8) |
| 1586 | .channels(channels) |
| 1587 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1588 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1589 | } |
| 1590 | } |
| 1591 | } |
| 1592 | } |
| 1593 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1594 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1595 | TEST_REQUIRES_X86_SSE; |
| 1596 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1597 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 1598 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1599 | AvgPoolMicrokernelTester() |
| 1600 | .output_pixels(output_pixels) |
| 1601 | .pooling_elements(pooling_elements) |
| 1602 | .pooling_tile(9, 8) |
| 1603 | .channels(channels) |
| 1604 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1605 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1606 | } |
| 1607 | } |
| 1608 | } |
| 1609 | } |
| 1610 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1611 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_output_stride) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1612 | TEST_REQUIRES_X86_SSE; |
| 1613 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1614 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 1615 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1616 | AvgPoolMicrokernelTester() |
| 1617 | .output_pixels(output_pixels) |
| 1618 | .pooling_elements(pooling_elements) |
| 1619 | .pooling_tile(9, 8) |
| 1620 | .channels(channels) |
| 1621 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1622 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1623 | } |
| 1624 | } |
| 1625 | } |
| 1626 | } |
| 1627 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 1628 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SSE_C4, few_output_pixels_with_step) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1629 | TEST_REQUIRES_X86_SSE; |
| 1630 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1631 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 1632 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1633 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1634 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1635 | .output_pixels(output_pixels) |
| 1636 | .pooling_elements(pooling_elements) |
| 1637 | .pooling_tile(9, 8) |
| 1638 | .step(step) |
| 1639 | .channels(channels) |
| 1640 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1641 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__sse_c4, xnn_init_f32_minmax_sse_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1642 | } |
| 1643 | } |
| 1644 | } |
| 1645 | } |
| 1646 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1647 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1648 | |
| 1649 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 1650 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1651 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile) { |
| 1652 | AvgPoolMicrokernelTester() |
| 1653 | .pooling_elements(17) |
| 1654 | .pooling_tile(9, 8) |
| 1655 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1656 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1657 | } |
| 1658 | |
| 1659 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
| 1660 | AvgPoolMicrokernelTester() |
| 1661 | .pooling_elements(17) |
| 1662 | .pooling_tile(9, 8) |
| 1663 | .channels(4) |
| 1664 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1665 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1666 | } |
| 1667 | |
| 1668 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_zero) { |
| 1669 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 1670 | AvgPoolMicrokernelTester() |
| 1671 | .pooling_elements(17) |
| 1672 | .pooling_tile(9, 8) |
| 1673 | .channels(4) |
| 1674 | .input_offset(7) |
| 1675 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1676 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1677 | } |
| 1678 | } |
| 1679 | |
| 1680 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
| 1681 | AvgPoolMicrokernelTester() |
| 1682 | .pooling_elements(17) |
| 1683 | .pooling_tile(9, 8) |
| 1684 | .channels(4) |
| 1685 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1686 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1687 | } |
| 1688 | |
| 1689 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
| 1690 | AvgPoolMicrokernelTester() |
| 1691 | .pooling_elements(17) |
| 1692 | .pooling_tile(9, 8) |
| 1693 | .channels(4) |
| 1694 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1695 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1696 | } |
| 1697 | |
| 1698 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_subtile) { |
| 1699 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1700 | AvgPoolMicrokernelTester() |
| 1701 | .pooling_elements(pooling_elements) |
| 1702 | .pooling_tile(9, 8) |
| 1703 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1704 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1705 | } |
| 1706 | } |
| 1707 | |
| 1708 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
| 1709 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1710 | AvgPoolMicrokernelTester() |
| 1711 | .pooling_elements(pooling_elements) |
| 1712 | .pooling_tile(9, 8) |
| 1713 | .channels(4) |
| 1714 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1715 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1716 | } |
| 1717 | } |
| 1718 | |
| 1719 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_subtile_with_zero) { |
| 1720 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1721 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1722 | AvgPoolMicrokernelTester() |
| 1723 | .pooling_elements(pooling_elements) |
| 1724 | .pooling_tile(9, 8) |
| 1725 | .channels(4) |
| 1726 | .input_offset(7) |
| 1727 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1728 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1729 | } |
| 1730 | } |
| 1731 | } |
| 1732 | |
| 1733 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile) { |
| 1734 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1735 | AvgPoolMicrokernelTester() |
| 1736 | .pooling_elements(17) |
| 1737 | .pooling_tile(9, 8) |
| 1738 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1739 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1740 | } |
| 1741 | } |
| 1742 | |
| 1743 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
| 1744 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1745 | AvgPoolMicrokernelTester() |
| 1746 | .pooling_elements(17) |
| 1747 | .pooling_tile(9, 8) |
| 1748 | .channels(channels) |
| 1749 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1750 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1751 | } |
| 1752 | } |
| 1753 | |
| 1754 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_zero) { |
| 1755 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1756 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 1757 | AvgPoolMicrokernelTester() |
| 1758 | .pooling_elements(17) |
| 1759 | .pooling_tile(9, 8) |
| 1760 | .channels(channels) |
| 1761 | .input_offset(23) |
| 1762 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1763 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1764 | } |
| 1765 | } |
| 1766 | } |
| 1767 | |
| 1768 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_qmin) { |
| 1769 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1770 | AvgPoolMicrokernelTester() |
| 1771 | .pooling_elements(17) |
| 1772 | .pooling_tile(9, 8) |
| 1773 | .channels(channels) |
| 1774 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1775 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1776 | } |
| 1777 | } |
| 1778 | |
| 1779 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_qmax) { |
| 1780 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1781 | AvgPoolMicrokernelTester() |
| 1782 | .pooling_elements(17) |
| 1783 | .pooling_tile(9, 8) |
| 1784 | .channels(channels) |
| 1785 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1786 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1787 | } |
| 1788 | } |
| 1789 | |
| 1790 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_subtile) { |
| 1791 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1792 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1793 | AvgPoolMicrokernelTester() |
| 1794 | .pooling_elements(pooling_elements) |
| 1795 | .pooling_tile(9, 8) |
| 1796 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1797 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1798 | } |
| 1799 | } |
| 1800 | } |
| 1801 | |
| 1802 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_subtile_with_input_offset) { |
| 1803 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1804 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1805 | AvgPoolMicrokernelTester() |
| 1806 | .pooling_elements(pooling_elements) |
| 1807 | .pooling_tile(9, 8) |
| 1808 | .channels(channels) |
| 1809 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1810 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1811 | } |
| 1812 | } |
| 1813 | } |
| 1814 | |
| 1815 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_subtile_with_zero) { |
| 1816 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1817 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1818 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1819 | AvgPoolMicrokernelTester() |
| 1820 | .pooling_elements(pooling_elements) |
| 1821 | .pooling_tile(9, 8) |
| 1822 | .channels(channels) |
| 1823 | .input_offset(37) |
| 1824 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1825 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1826 | } |
| 1827 | } |
| 1828 | } |
| 1829 | } |
| 1830 | |
| 1831 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile) { |
| 1832 | for (size_t channels = 1; channels < 4; channels++) { |
| 1833 | AvgPoolMicrokernelTester() |
| 1834 | .pooling_elements(17) |
| 1835 | .pooling_tile(9, 8) |
| 1836 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1837 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1838 | } |
| 1839 | } |
| 1840 | |
| 1841 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
| 1842 | for (size_t channels = 1; channels < 4; channels++) { |
| 1843 | AvgPoolMicrokernelTester() |
| 1844 | .pooling_elements(17) |
| 1845 | .pooling_tile(9, 8) |
| 1846 | .channels(channels) |
| 1847 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1848 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1849 | } |
| 1850 | } |
| 1851 | |
| 1852 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_zero_index) { |
| 1853 | for (size_t channels = 1; channels < 4; channels++) { |
| 1854 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 1855 | AvgPoolMicrokernelTester() |
| 1856 | .pooling_elements(17) |
| 1857 | .pooling_tile(9, 8) |
| 1858 | .channels(channels) |
| 1859 | .input_offset(5) |
| 1860 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1861 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1862 | } |
| 1863 | } |
| 1864 | } |
| 1865 | |
| 1866 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
| 1867 | for (size_t channels = 1; channels < 4; channels++) { |
| 1868 | AvgPoolMicrokernelTester() |
| 1869 | .pooling_elements(17) |
| 1870 | .pooling_tile(9, 8) |
| 1871 | .channels(channels) |
| 1872 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1873 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1874 | } |
| 1875 | } |
| 1876 | |
| 1877 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
| 1878 | for (size_t channels = 1; channels < 4; channels++) { |
| 1879 | AvgPoolMicrokernelTester() |
| 1880 | .pooling_elements(17) |
| 1881 | .pooling_tile(9, 8) |
| 1882 | .channels(channels) |
| 1883 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1884 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1885 | } |
| 1886 | } |
| 1887 | |
| 1888 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_subtile) { |
| 1889 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1890 | for (size_t channels = 1; channels < 4; channels++) { |
| 1891 | AvgPoolMicrokernelTester() |
| 1892 | .pooling_elements(pooling_elements) |
| 1893 | .pooling_tile(9, 8) |
| 1894 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1895 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1896 | } |
| 1897 | } |
| 1898 | } |
| 1899 | |
| 1900 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
| 1901 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1902 | for (size_t channels = 1; channels < 4; channels++) { |
| 1903 | AvgPoolMicrokernelTester() |
| 1904 | .pooling_elements(pooling_elements) |
| 1905 | .pooling_tile(9, 8) |
| 1906 | .channels(channels) |
| 1907 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1908 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1909 | } |
| 1910 | } |
| 1911 | } |
| 1912 | |
| 1913 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_subtile_with_zero) { |
| 1914 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1915 | for (size_t channels = 1; channels < 4; channels++) { |
| 1916 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 1917 | AvgPoolMicrokernelTester() |
| 1918 | .pooling_elements(pooling_elements) |
| 1919 | .pooling_tile(9, 8) |
| 1920 | .channels(channels) |
| 1921 | .input_offset(5) |
| 1922 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1923 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1924 | } |
| 1925 | } |
| 1926 | } |
| 1927 | } |
| 1928 | |
| 1929 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile) { |
| 1930 | for (size_t channels = 5; channels < 8; channels++) { |
| 1931 | AvgPoolMicrokernelTester() |
| 1932 | .pooling_elements(17) |
| 1933 | .pooling_tile(9, 8) |
| 1934 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1935 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1936 | } |
| 1937 | } |
| 1938 | |
| 1939 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
| 1940 | for (size_t channels = 5; channels < 8; channels++) { |
| 1941 | AvgPoolMicrokernelTester() |
| 1942 | .pooling_elements(17) |
| 1943 | .pooling_tile(9, 8) |
| 1944 | .channels(channels) |
| 1945 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1946 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1947 | } |
| 1948 | } |
| 1949 | |
| 1950 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_zero) { |
| 1951 | for (size_t channels = 5; channels < 8; channels++) { |
| 1952 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 1953 | AvgPoolMicrokernelTester() |
| 1954 | .pooling_elements(17) |
| 1955 | .pooling_tile(9, 8) |
| 1956 | .channels(channels) |
| 1957 | .input_offset(11) |
| 1958 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1959 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1960 | } |
| 1961 | } |
| 1962 | } |
| 1963 | |
| 1964 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
| 1965 | for (size_t channels = 5; channels < 8; channels++) { |
| 1966 | AvgPoolMicrokernelTester() |
| 1967 | .pooling_elements(17) |
| 1968 | .pooling_tile(9, 8) |
| 1969 | .channels(channels) |
| 1970 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1971 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1972 | } |
| 1973 | } |
| 1974 | |
| 1975 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
| 1976 | for (size_t channels = 5; channels < 8; channels++) { |
| 1977 | AvgPoolMicrokernelTester() |
| 1978 | .pooling_elements(17) |
| 1979 | .pooling_tile(9, 8) |
| 1980 | .channels(channels) |
| 1981 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1982 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1983 | } |
| 1984 | } |
| 1985 | |
| 1986 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_subtile) { |
| 1987 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1988 | for (size_t channels = 5; channels < 8; channels++) { |
| 1989 | AvgPoolMicrokernelTester() |
| 1990 | .pooling_elements(pooling_elements) |
| 1991 | .pooling_tile(9, 8) |
| 1992 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 1993 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 1994 | } |
| 1995 | } |
| 1996 | } |
| 1997 | |
| 1998 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
| 1999 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2000 | for (size_t channels = 5; channels < 8; channels++) { |
| 2001 | AvgPoolMicrokernelTester() |
| 2002 | .pooling_elements(pooling_elements) |
| 2003 | .pooling_tile(9, 8) |
| 2004 | .channels(channels) |
| 2005 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2006 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2007 | } |
| 2008 | } |
| 2009 | } |
| 2010 | |
| 2011 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_subtile_with_zero) { |
| 2012 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2013 | for (size_t channels = 5; channels < 8; channels++) { |
| 2014 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2015 | AvgPoolMicrokernelTester() |
| 2016 | .pooling_elements(pooling_elements) |
| 2017 | .pooling_tile(9, 8) |
| 2018 | .channels(channels) |
| 2019 | .input_offset(11) |
| 2020 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2021 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2022 | } |
| 2023 | } |
| 2024 | } |
| 2025 | } |
| 2026 | |
| 2027 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass) { |
| 2028 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2029 | AvgPoolMicrokernelTester() |
| 2030 | .pooling_elements(pooling_elements) |
| 2031 | .pooling_tile(9, 8) |
| 2032 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2033 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2034 | } |
| 2035 | } |
| 2036 | |
| 2037 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_input_offset) { |
| 2038 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2039 | AvgPoolMicrokernelTester() |
| 2040 | .pooling_elements(pooling_elements) |
| 2041 | .pooling_tile(9, 8) |
| 2042 | .channels(4) |
| 2043 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2044 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2045 | } |
| 2046 | } |
| 2047 | |
| 2048 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_zero) { |
| 2049 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2050 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2051 | AvgPoolMicrokernelTester() |
| 2052 | .pooling_elements(pooling_elements) |
| 2053 | .pooling_tile(9, 8) |
| 2054 | .channels(4) |
| 2055 | .input_offset(7) |
| 2056 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2057 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2058 | } |
| 2059 | } |
| 2060 | } |
| 2061 | |
| 2062 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_qmin) { |
| 2063 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2064 | AvgPoolMicrokernelTester() |
| 2065 | .pooling_elements(pooling_elements) |
| 2066 | .pooling_tile(9, 8) |
| 2067 | .channels(4) |
| 2068 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2069 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2070 | } |
| 2071 | } |
| 2072 | |
| 2073 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_qmax) { |
| 2074 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2075 | AvgPoolMicrokernelTester() |
| 2076 | .pooling_elements(pooling_elements) |
| 2077 | .pooling_tile(9, 8) |
| 2078 | .channels(4) |
| 2079 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2080 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2081 | } |
| 2082 | } |
| 2083 | |
| 2084 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass) { |
| 2085 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2086 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2087 | AvgPoolMicrokernelTester() |
| 2088 | .pooling_elements(pooling_elements) |
| 2089 | .pooling_tile(9, 8) |
| 2090 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2091 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2092 | } |
| 2093 | } |
| 2094 | } |
| 2095 | |
| 2096 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_input_offset) { |
| 2097 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2098 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2099 | AvgPoolMicrokernelTester() |
| 2100 | .pooling_elements(pooling_elements) |
| 2101 | .pooling_tile(9, 8) |
| 2102 | .channels(channels) |
| 2103 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2104 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2105 | } |
| 2106 | } |
| 2107 | } |
| 2108 | |
| 2109 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_zero) { |
| 2110 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2111 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2112 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2113 | AvgPoolMicrokernelTester() |
| 2114 | .pooling_elements(pooling_elements) |
| 2115 | .pooling_tile(9, 8) |
| 2116 | .channels(channels) |
| 2117 | .input_offset(37) |
| 2118 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2119 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2120 | } |
| 2121 | } |
| 2122 | } |
| 2123 | } |
| 2124 | |
| 2125 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_qmin) { |
| 2126 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2127 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2128 | AvgPoolMicrokernelTester() |
| 2129 | .pooling_elements(pooling_elements) |
| 2130 | .pooling_tile(9, 8) |
| 2131 | .channels(channels) |
| 2132 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2133 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2134 | } |
| 2135 | } |
| 2136 | } |
| 2137 | |
| 2138 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_qmax) { |
| 2139 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2140 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2141 | AvgPoolMicrokernelTester() |
| 2142 | .pooling_elements(pooling_elements) |
| 2143 | .pooling_tile(9, 8) |
| 2144 | .channels(channels) |
| 2145 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2146 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2147 | } |
| 2148 | } |
| 2149 | } |
| 2150 | |
| 2151 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass) { |
| 2152 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2153 | for (size_t channels = 1; channels < 4; channels++) { |
| 2154 | AvgPoolMicrokernelTester() |
| 2155 | .pooling_elements(pooling_elements) |
| 2156 | .pooling_tile(9, 8) |
| 2157 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2158 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2159 | } |
| 2160 | } |
| 2161 | } |
| 2162 | |
| 2163 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_input_offset) { |
| 2164 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2165 | for (size_t channels = 1; channels < 4; channels++) { |
| 2166 | AvgPoolMicrokernelTester() |
| 2167 | .pooling_elements(pooling_elements) |
| 2168 | .pooling_tile(9, 8) |
| 2169 | .channels(channels) |
| 2170 | .input_offset(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2171 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2172 | } |
| 2173 | } |
| 2174 | } |
| 2175 | |
| 2176 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_zero) { |
| 2177 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2178 | for (size_t channels = 1; channels < 4; channels++) { |
| 2179 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2180 | AvgPoolMicrokernelTester() |
| 2181 | .pooling_elements(pooling_elements) |
| 2182 | .pooling_tile(9, 8) |
| 2183 | .channels(channels) |
| 2184 | .input_offset(4) |
| 2185 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2186 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2187 | } |
| 2188 | } |
| 2189 | } |
| 2190 | } |
| 2191 | |
| 2192 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_qmin) { |
| 2193 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2194 | for (size_t channels = 1; channels < 4; channels++) { |
| 2195 | AvgPoolMicrokernelTester() |
| 2196 | .pooling_elements(pooling_elements) |
| 2197 | .pooling_tile(9, 8) |
| 2198 | .channels(channels) |
| 2199 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2200 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2201 | } |
| 2202 | } |
| 2203 | } |
| 2204 | |
| 2205 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_qmax) { |
| 2206 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2207 | for (size_t channels = 1; channels < 4; channels++) { |
| 2208 | AvgPoolMicrokernelTester() |
| 2209 | .pooling_elements(pooling_elements) |
| 2210 | .pooling_tile(9, 8) |
| 2211 | .channels(channels) |
| 2212 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2213 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2214 | } |
| 2215 | } |
| 2216 | } |
| 2217 | |
| 2218 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass) { |
| 2219 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2220 | for (size_t channels = 5; channels < 8; channels++) { |
| 2221 | AvgPoolMicrokernelTester() |
| 2222 | .pooling_elements(pooling_elements) |
| 2223 | .pooling_tile(9, 8) |
| 2224 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2225 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2226 | } |
| 2227 | } |
| 2228 | } |
| 2229 | |
| 2230 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_input_offset) { |
| 2231 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2232 | for (size_t channels = 5; channels < 8; channels++) { |
| 2233 | AvgPoolMicrokernelTester() |
| 2234 | .pooling_elements(pooling_elements) |
| 2235 | .pooling_tile(9, 8) |
| 2236 | .channels(channels) |
| 2237 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2238 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2239 | } |
| 2240 | } |
| 2241 | } |
| 2242 | |
| 2243 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_zero) { |
| 2244 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2245 | for (size_t channels = 5; channels < 8; channels++) { |
| 2246 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2247 | AvgPoolMicrokernelTester() |
| 2248 | .pooling_elements(pooling_elements) |
| 2249 | .pooling_tile(9, 8) |
| 2250 | .channels(channels) |
| 2251 | .input_offset(11) |
| 2252 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2253 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2254 | } |
| 2255 | } |
| 2256 | } |
| 2257 | } |
| 2258 | |
| 2259 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_qmin) { |
| 2260 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2261 | for (size_t channels = 5; channels < 8; channels++) { |
| 2262 | AvgPoolMicrokernelTester() |
| 2263 | .pooling_elements(pooling_elements) |
| 2264 | .pooling_tile(9, 8) |
| 2265 | .channels(channels) |
| 2266 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2267 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2268 | } |
| 2269 | } |
| 2270 | } |
| 2271 | |
| 2272 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_qmax) { |
| 2273 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2274 | for (size_t channels = 5; channels < 8; channels++) { |
| 2275 | AvgPoolMicrokernelTester() |
| 2276 | .pooling_elements(pooling_elements) |
| 2277 | .pooling_tile(9, 8) |
| 2278 | .channels(channels) |
| 2279 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2280 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2281 | } |
| 2282 | } |
| 2283 | } |
| 2284 | |
| 2285 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels) { |
| 2286 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2287 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 2288 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2289 | AvgPoolMicrokernelTester() |
| 2290 | .output_pixels(output_pixels) |
| 2291 | .pooling_elements(pooling_elements) |
| 2292 | .pooling_tile(9, 8) |
| 2293 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2294 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2295 | } |
| 2296 | } |
| 2297 | } |
| 2298 | } |
| 2299 | |
| 2300 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_input_offset) { |
| 2301 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2302 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 2303 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2304 | AvgPoolMicrokernelTester() |
| 2305 | .output_pixels(output_pixels) |
| 2306 | .pooling_elements(pooling_elements) |
| 2307 | .pooling_tile(9, 8) |
| 2308 | .channels(channels) |
| 2309 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2310 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2311 | } |
| 2312 | } |
| 2313 | } |
| 2314 | } |
| 2315 | |
| 2316 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_zero) { |
| 2317 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2318 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 2319 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2320 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2321 | AvgPoolMicrokernelTester() |
| 2322 | .output_pixels(output_pixels) |
| 2323 | .pooling_elements(pooling_elements) |
| 2324 | .pooling_tile(9, 8) |
| 2325 | .channels(channels) |
| 2326 | .input_offset(23) |
| 2327 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2328 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2329 | } |
| 2330 | } |
| 2331 | } |
| 2332 | } |
| 2333 | } |
| 2334 | |
| 2335 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_qmin) { |
| 2336 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2337 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 2338 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2339 | AvgPoolMicrokernelTester() |
| 2340 | .output_pixels(output_pixels) |
| 2341 | .pooling_elements(pooling_elements) |
| 2342 | .pooling_tile(9, 8) |
| 2343 | .channels(channels) |
| 2344 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2345 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2346 | } |
| 2347 | } |
| 2348 | } |
| 2349 | } |
| 2350 | |
| 2351 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_qmax) { |
| 2352 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2353 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 2354 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2355 | AvgPoolMicrokernelTester() |
| 2356 | .output_pixels(output_pixels) |
| 2357 | .pooling_elements(pooling_elements) |
| 2358 | .pooling_tile(9, 8) |
| 2359 | .channels(channels) |
| 2360 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2361 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2362 | } |
| 2363 | } |
| 2364 | } |
| 2365 | } |
| 2366 | |
| 2367 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_output_stride) { |
| 2368 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2369 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 2370 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2371 | AvgPoolMicrokernelTester() |
| 2372 | .output_pixels(output_pixels) |
| 2373 | .pooling_elements(pooling_elements) |
| 2374 | .pooling_tile(9, 8) |
| 2375 | .channels(channels) |
| 2376 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2377 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2378 | } |
| 2379 | } |
| 2380 | } |
| 2381 | } |
| 2382 | |
| 2383 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_step) { |
| 2384 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2385 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 2386 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 2387 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 2388 | AvgPoolMicrokernelTester() |
| 2389 | .output_pixels(output_pixels) |
| 2390 | .pooling_elements(pooling_elements) |
| 2391 | .pooling_tile(9, 8) |
| 2392 | .step(step) |
| 2393 | .channels(channels) |
| 2394 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2395 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2396 | } |
| 2397 | } |
| 2398 | } |
| 2399 | } |
| 2400 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 2401 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2402 | |
| 2403 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 2404 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2405 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile) { |
| 2406 | AvgPoolMicrokernelTester() |
| 2407 | .pooling_elements(17) |
| 2408 | .pooling_tile(9, 8) |
| 2409 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2410 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2411 | } |
| 2412 | |
| 2413 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
| 2414 | AvgPoolMicrokernelTester() |
| 2415 | .pooling_elements(17) |
| 2416 | .pooling_tile(9, 8) |
| 2417 | .channels(4) |
| 2418 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2419 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2420 | } |
| 2421 | |
| 2422 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_zero) { |
| 2423 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 2424 | AvgPoolMicrokernelTester() |
| 2425 | .pooling_elements(17) |
| 2426 | .pooling_tile(9, 8) |
| 2427 | .channels(4) |
| 2428 | .input_offset(7) |
| 2429 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2430 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2431 | } |
| 2432 | } |
| 2433 | |
| 2434 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
| 2435 | AvgPoolMicrokernelTester() |
| 2436 | .pooling_elements(17) |
| 2437 | .pooling_tile(9, 8) |
| 2438 | .channels(4) |
| 2439 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2440 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2441 | } |
| 2442 | |
| 2443 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
| 2444 | AvgPoolMicrokernelTester() |
| 2445 | .pooling_elements(17) |
| 2446 | .pooling_tile(9, 8) |
| 2447 | .channels(4) |
| 2448 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2449 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2450 | } |
| 2451 | |
| 2452 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_subtile) { |
| 2453 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2454 | AvgPoolMicrokernelTester() |
| 2455 | .pooling_elements(pooling_elements) |
| 2456 | .pooling_tile(9, 8) |
| 2457 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2458 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2459 | } |
| 2460 | } |
| 2461 | |
| 2462 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
| 2463 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2464 | AvgPoolMicrokernelTester() |
| 2465 | .pooling_elements(pooling_elements) |
| 2466 | .pooling_tile(9, 8) |
| 2467 | .channels(4) |
| 2468 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2469 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2470 | } |
| 2471 | } |
| 2472 | |
| 2473 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_subtile_with_zero) { |
| 2474 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2475 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2476 | AvgPoolMicrokernelTester() |
| 2477 | .pooling_elements(pooling_elements) |
| 2478 | .pooling_tile(9, 8) |
| 2479 | .channels(4) |
| 2480 | .input_offset(7) |
| 2481 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2482 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2483 | } |
| 2484 | } |
| 2485 | } |
| 2486 | |
| 2487 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile) { |
| 2488 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2489 | AvgPoolMicrokernelTester() |
| 2490 | .pooling_elements(17) |
| 2491 | .pooling_tile(9, 8) |
| 2492 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2493 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2494 | } |
| 2495 | } |
| 2496 | |
| 2497 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
| 2498 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2499 | AvgPoolMicrokernelTester() |
| 2500 | .pooling_elements(17) |
| 2501 | .pooling_tile(9, 8) |
| 2502 | .channels(channels) |
| 2503 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2504 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2505 | } |
| 2506 | } |
| 2507 | |
| 2508 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_zero) { |
| 2509 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2510 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 2511 | AvgPoolMicrokernelTester() |
| 2512 | .pooling_elements(17) |
| 2513 | .pooling_tile(9, 8) |
| 2514 | .channels(channels) |
| 2515 | .input_offset(23) |
| 2516 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2517 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2518 | } |
| 2519 | } |
| 2520 | } |
| 2521 | |
| 2522 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_qmin) { |
| 2523 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2524 | AvgPoolMicrokernelTester() |
| 2525 | .pooling_elements(17) |
| 2526 | .pooling_tile(9, 8) |
| 2527 | .channels(channels) |
| 2528 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2529 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2530 | } |
| 2531 | } |
| 2532 | |
| 2533 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_qmax) { |
| 2534 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2535 | AvgPoolMicrokernelTester() |
| 2536 | .pooling_elements(17) |
| 2537 | .pooling_tile(9, 8) |
| 2538 | .channels(channels) |
| 2539 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2540 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2541 | } |
| 2542 | } |
| 2543 | |
| 2544 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_subtile) { |
| 2545 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2546 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2547 | AvgPoolMicrokernelTester() |
| 2548 | .pooling_elements(pooling_elements) |
| 2549 | .pooling_tile(9, 8) |
| 2550 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2551 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2552 | } |
| 2553 | } |
| 2554 | } |
| 2555 | |
| 2556 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_subtile_with_input_offset) { |
| 2557 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2558 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2559 | AvgPoolMicrokernelTester() |
| 2560 | .pooling_elements(pooling_elements) |
| 2561 | .pooling_tile(9, 8) |
| 2562 | .channels(channels) |
| 2563 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2564 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2565 | } |
| 2566 | } |
| 2567 | } |
| 2568 | |
| 2569 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_subtile_with_zero) { |
| 2570 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2571 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2572 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2573 | AvgPoolMicrokernelTester() |
| 2574 | .pooling_elements(pooling_elements) |
| 2575 | .pooling_tile(9, 8) |
| 2576 | .channels(channels) |
| 2577 | .input_offset(37) |
| 2578 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2579 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2580 | } |
| 2581 | } |
| 2582 | } |
| 2583 | } |
| 2584 | |
| 2585 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile) { |
| 2586 | for (size_t channels = 1; channels < 4; channels++) { |
| 2587 | AvgPoolMicrokernelTester() |
| 2588 | .pooling_elements(17) |
| 2589 | .pooling_tile(9, 8) |
| 2590 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2591 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2592 | } |
| 2593 | } |
| 2594 | |
| 2595 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
| 2596 | for (size_t channels = 1; channels < 4; channels++) { |
| 2597 | AvgPoolMicrokernelTester() |
| 2598 | .pooling_elements(17) |
| 2599 | .pooling_tile(9, 8) |
| 2600 | .channels(channels) |
| 2601 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2602 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2603 | } |
| 2604 | } |
| 2605 | |
| 2606 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_zero_index) { |
| 2607 | for (size_t channels = 1; channels < 4; channels++) { |
| 2608 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 2609 | AvgPoolMicrokernelTester() |
| 2610 | .pooling_elements(17) |
| 2611 | .pooling_tile(9, 8) |
| 2612 | .channels(channels) |
| 2613 | .input_offset(5) |
| 2614 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2615 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2616 | } |
| 2617 | } |
| 2618 | } |
| 2619 | |
| 2620 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
| 2621 | for (size_t channels = 1; channels < 4; channels++) { |
| 2622 | AvgPoolMicrokernelTester() |
| 2623 | .pooling_elements(17) |
| 2624 | .pooling_tile(9, 8) |
| 2625 | .channels(channels) |
| 2626 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2627 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2628 | } |
| 2629 | } |
| 2630 | |
| 2631 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
| 2632 | for (size_t channels = 1; channels < 4; channels++) { |
| 2633 | AvgPoolMicrokernelTester() |
| 2634 | .pooling_elements(17) |
| 2635 | .pooling_tile(9, 8) |
| 2636 | .channels(channels) |
| 2637 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2638 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2639 | } |
| 2640 | } |
| 2641 | |
| 2642 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_subtile) { |
| 2643 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2644 | for (size_t channels = 1; channels < 4; channels++) { |
| 2645 | AvgPoolMicrokernelTester() |
| 2646 | .pooling_elements(pooling_elements) |
| 2647 | .pooling_tile(9, 8) |
| 2648 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2649 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2650 | } |
| 2651 | } |
| 2652 | } |
| 2653 | |
| 2654 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
| 2655 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2656 | for (size_t channels = 1; channels < 4; channels++) { |
| 2657 | AvgPoolMicrokernelTester() |
| 2658 | .pooling_elements(pooling_elements) |
| 2659 | .pooling_tile(9, 8) |
| 2660 | .channels(channels) |
| 2661 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2662 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2663 | } |
| 2664 | } |
| 2665 | } |
| 2666 | |
| 2667 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_subtile_with_zero) { |
| 2668 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2669 | for (size_t channels = 1; channels < 4; channels++) { |
| 2670 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2671 | AvgPoolMicrokernelTester() |
| 2672 | .pooling_elements(pooling_elements) |
| 2673 | .pooling_tile(9, 8) |
| 2674 | .channels(channels) |
| 2675 | .input_offset(5) |
| 2676 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2677 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2678 | } |
| 2679 | } |
| 2680 | } |
| 2681 | } |
| 2682 | |
| 2683 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile) { |
| 2684 | for (size_t channels = 5; channels < 8; channels++) { |
| 2685 | AvgPoolMicrokernelTester() |
| 2686 | .pooling_elements(17) |
| 2687 | .pooling_tile(9, 8) |
| 2688 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2689 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2690 | } |
| 2691 | } |
| 2692 | |
| 2693 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
| 2694 | for (size_t channels = 5; channels < 8; channels++) { |
| 2695 | AvgPoolMicrokernelTester() |
| 2696 | .pooling_elements(17) |
| 2697 | .pooling_tile(9, 8) |
| 2698 | .channels(channels) |
| 2699 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2700 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2701 | } |
| 2702 | } |
| 2703 | |
| 2704 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_zero) { |
| 2705 | for (size_t channels = 5; channels < 8; channels++) { |
| 2706 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 2707 | AvgPoolMicrokernelTester() |
| 2708 | .pooling_elements(17) |
| 2709 | .pooling_tile(9, 8) |
| 2710 | .channels(channels) |
| 2711 | .input_offset(11) |
| 2712 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2713 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2714 | } |
| 2715 | } |
| 2716 | } |
| 2717 | |
| 2718 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
| 2719 | for (size_t channels = 5; channels < 8; channels++) { |
| 2720 | AvgPoolMicrokernelTester() |
| 2721 | .pooling_elements(17) |
| 2722 | .pooling_tile(9, 8) |
| 2723 | .channels(channels) |
| 2724 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2725 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2726 | } |
| 2727 | } |
| 2728 | |
| 2729 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
| 2730 | for (size_t channels = 5; channels < 8; channels++) { |
| 2731 | AvgPoolMicrokernelTester() |
| 2732 | .pooling_elements(17) |
| 2733 | .pooling_tile(9, 8) |
| 2734 | .channels(channels) |
| 2735 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2736 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2737 | } |
| 2738 | } |
| 2739 | |
| 2740 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_subtile) { |
| 2741 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2742 | for (size_t channels = 5; channels < 8; channels++) { |
| 2743 | AvgPoolMicrokernelTester() |
| 2744 | .pooling_elements(pooling_elements) |
| 2745 | .pooling_tile(9, 8) |
| 2746 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2747 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2748 | } |
| 2749 | } |
| 2750 | } |
| 2751 | |
| 2752 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
| 2753 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2754 | for (size_t channels = 5; channels < 8; channels++) { |
| 2755 | AvgPoolMicrokernelTester() |
| 2756 | .pooling_elements(pooling_elements) |
| 2757 | .pooling_tile(9, 8) |
| 2758 | .channels(channels) |
| 2759 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2760 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2761 | } |
| 2762 | } |
| 2763 | } |
| 2764 | |
| 2765 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_subtile_with_zero) { |
| 2766 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2767 | for (size_t channels = 5; channels < 8; channels++) { |
| 2768 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2769 | AvgPoolMicrokernelTester() |
| 2770 | .pooling_elements(pooling_elements) |
| 2771 | .pooling_tile(9, 8) |
| 2772 | .channels(channels) |
| 2773 | .input_offset(11) |
| 2774 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2775 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2776 | } |
| 2777 | } |
| 2778 | } |
| 2779 | } |
| 2780 | |
| 2781 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass) { |
| 2782 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2783 | AvgPoolMicrokernelTester() |
| 2784 | .pooling_elements(pooling_elements) |
| 2785 | .pooling_tile(9, 8) |
| 2786 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2787 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2788 | } |
| 2789 | } |
| 2790 | |
| 2791 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_input_offset) { |
| 2792 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2793 | AvgPoolMicrokernelTester() |
| 2794 | .pooling_elements(pooling_elements) |
| 2795 | .pooling_tile(9, 8) |
| 2796 | .channels(4) |
| 2797 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2798 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2799 | } |
| 2800 | } |
| 2801 | |
| 2802 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_zero) { |
| 2803 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2804 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2805 | AvgPoolMicrokernelTester() |
| 2806 | .pooling_elements(pooling_elements) |
| 2807 | .pooling_tile(9, 8) |
| 2808 | .channels(4) |
| 2809 | .input_offset(7) |
| 2810 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2811 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2812 | } |
| 2813 | } |
| 2814 | } |
| 2815 | |
| 2816 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_qmin) { |
| 2817 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2818 | AvgPoolMicrokernelTester() |
| 2819 | .pooling_elements(pooling_elements) |
| 2820 | .pooling_tile(9, 8) |
| 2821 | .channels(4) |
| 2822 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2823 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2824 | } |
| 2825 | } |
| 2826 | |
| 2827 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_qmax) { |
| 2828 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2829 | AvgPoolMicrokernelTester() |
| 2830 | .pooling_elements(pooling_elements) |
| 2831 | .pooling_tile(9, 8) |
| 2832 | .channels(4) |
| 2833 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2834 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2835 | } |
| 2836 | } |
| 2837 | |
| 2838 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass) { |
| 2839 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2840 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2841 | AvgPoolMicrokernelTester() |
| 2842 | .pooling_elements(pooling_elements) |
| 2843 | .pooling_tile(9, 8) |
| 2844 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2845 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2846 | } |
| 2847 | } |
| 2848 | } |
| 2849 | |
| 2850 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_input_offset) { |
| 2851 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2852 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2853 | AvgPoolMicrokernelTester() |
| 2854 | .pooling_elements(pooling_elements) |
| 2855 | .pooling_tile(9, 8) |
| 2856 | .channels(channels) |
| 2857 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2858 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2859 | } |
| 2860 | } |
| 2861 | } |
| 2862 | |
| 2863 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_zero) { |
| 2864 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2865 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2866 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2867 | AvgPoolMicrokernelTester() |
| 2868 | .pooling_elements(pooling_elements) |
| 2869 | .pooling_tile(9, 8) |
| 2870 | .channels(channels) |
| 2871 | .input_offset(37) |
| 2872 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2873 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2874 | } |
| 2875 | } |
| 2876 | } |
| 2877 | } |
| 2878 | |
| 2879 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_qmin) { |
| 2880 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2881 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2882 | AvgPoolMicrokernelTester() |
| 2883 | .pooling_elements(pooling_elements) |
| 2884 | .pooling_tile(9, 8) |
| 2885 | .channels(channels) |
| 2886 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2887 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2888 | } |
| 2889 | } |
| 2890 | } |
| 2891 | |
| 2892 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_qmax) { |
| 2893 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2894 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 2895 | AvgPoolMicrokernelTester() |
| 2896 | .pooling_elements(pooling_elements) |
| 2897 | .pooling_tile(9, 8) |
| 2898 | .channels(channels) |
| 2899 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2900 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2901 | } |
| 2902 | } |
| 2903 | } |
| 2904 | |
| 2905 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass) { |
| 2906 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2907 | for (size_t channels = 1; channels < 4; channels++) { |
| 2908 | AvgPoolMicrokernelTester() |
| 2909 | .pooling_elements(pooling_elements) |
| 2910 | .pooling_tile(9, 8) |
| 2911 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2912 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2913 | } |
| 2914 | } |
| 2915 | } |
| 2916 | |
| 2917 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_input_offset) { |
| 2918 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2919 | for (size_t channels = 1; channels < 4; channels++) { |
| 2920 | AvgPoolMicrokernelTester() |
| 2921 | .pooling_elements(pooling_elements) |
| 2922 | .pooling_tile(9, 8) |
| 2923 | .channels(channels) |
| 2924 | .input_offset(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2925 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2926 | } |
| 2927 | } |
| 2928 | } |
| 2929 | |
| 2930 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_zero) { |
| 2931 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2932 | for (size_t channels = 1; channels < 4; channels++) { |
| 2933 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 2934 | AvgPoolMicrokernelTester() |
| 2935 | .pooling_elements(pooling_elements) |
| 2936 | .pooling_tile(9, 8) |
| 2937 | .channels(channels) |
| 2938 | .input_offset(4) |
| 2939 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2940 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2941 | } |
| 2942 | } |
| 2943 | } |
| 2944 | } |
| 2945 | |
| 2946 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_qmin) { |
| 2947 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2948 | for (size_t channels = 1; channels < 4; channels++) { |
| 2949 | AvgPoolMicrokernelTester() |
| 2950 | .pooling_elements(pooling_elements) |
| 2951 | .pooling_tile(9, 8) |
| 2952 | .channels(channels) |
| 2953 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2954 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2955 | } |
| 2956 | } |
| 2957 | } |
| 2958 | |
| 2959 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_qmax) { |
| 2960 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2961 | for (size_t channels = 1; channels < 4; channels++) { |
| 2962 | AvgPoolMicrokernelTester() |
| 2963 | .pooling_elements(pooling_elements) |
| 2964 | .pooling_tile(9, 8) |
| 2965 | .channels(channels) |
| 2966 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2967 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2968 | } |
| 2969 | } |
| 2970 | } |
| 2971 | |
| 2972 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass) { |
| 2973 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2974 | for (size_t channels = 5; channels < 8; channels++) { |
| 2975 | AvgPoolMicrokernelTester() |
| 2976 | .pooling_elements(pooling_elements) |
| 2977 | .pooling_tile(9, 8) |
| 2978 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2979 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2980 | } |
| 2981 | } |
| 2982 | } |
| 2983 | |
| 2984 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_input_offset) { |
| 2985 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2986 | for (size_t channels = 5; channels < 8; channels++) { |
| 2987 | AvgPoolMicrokernelTester() |
| 2988 | .pooling_elements(pooling_elements) |
| 2989 | .pooling_tile(9, 8) |
| 2990 | .channels(channels) |
| 2991 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 2992 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 2993 | } |
| 2994 | } |
| 2995 | } |
| 2996 | |
| 2997 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_zero) { |
| 2998 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2999 | for (size_t channels = 5; channels < 8; channels++) { |
| 3000 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3001 | AvgPoolMicrokernelTester() |
| 3002 | .pooling_elements(pooling_elements) |
| 3003 | .pooling_tile(9, 8) |
| 3004 | .channels(channels) |
| 3005 | .input_offset(11) |
| 3006 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3007 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3008 | } |
| 3009 | } |
| 3010 | } |
| 3011 | } |
| 3012 | |
| 3013 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_qmin) { |
| 3014 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3015 | for (size_t channels = 5; channels < 8; channels++) { |
| 3016 | AvgPoolMicrokernelTester() |
| 3017 | .pooling_elements(pooling_elements) |
| 3018 | .pooling_tile(9, 8) |
| 3019 | .channels(channels) |
| 3020 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3021 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3022 | } |
| 3023 | } |
| 3024 | } |
| 3025 | |
| 3026 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_qmax) { |
| 3027 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3028 | for (size_t channels = 5; channels < 8; channels++) { |
| 3029 | AvgPoolMicrokernelTester() |
| 3030 | .pooling_elements(pooling_elements) |
| 3031 | .pooling_tile(9, 8) |
| 3032 | .channels(channels) |
| 3033 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3034 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3035 | } |
| 3036 | } |
| 3037 | } |
| 3038 | |
| 3039 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels) { |
| 3040 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3041 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3042 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3043 | AvgPoolMicrokernelTester() |
| 3044 | .output_pixels(output_pixels) |
| 3045 | .pooling_elements(pooling_elements) |
| 3046 | .pooling_tile(9, 8) |
| 3047 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3048 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3049 | } |
| 3050 | } |
| 3051 | } |
| 3052 | } |
| 3053 | |
| 3054 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_input_offset) { |
| 3055 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3056 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3057 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3058 | AvgPoolMicrokernelTester() |
| 3059 | .output_pixels(output_pixels) |
| 3060 | .pooling_elements(pooling_elements) |
| 3061 | .pooling_tile(9, 8) |
| 3062 | .channels(channels) |
| 3063 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3064 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3065 | } |
| 3066 | } |
| 3067 | } |
| 3068 | } |
| 3069 | |
| 3070 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_zero) { |
| 3071 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3072 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3073 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3074 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3075 | AvgPoolMicrokernelTester() |
| 3076 | .output_pixels(output_pixels) |
| 3077 | .pooling_elements(pooling_elements) |
| 3078 | .pooling_tile(9, 8) |
| 3079 | .channels(channels) |
| 3080 | .input_offset(23) |
| 3081 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3082 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3083 | } |
| 3084 | } |
| 3085 | } |
| 3086 | } |
| 3087 | } |
| 3088 | |
| 3089 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_qmin) { |
| 3090 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3091 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3092 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3093 | AvgPoolMicrokernelTester() |
| 3094 | .output_pixels(output_pixels) |
| 3095 | .pooling_elements(pooling_elements) |
| 3096 | .pooling_tile(9, 8) |
| 3097 | .channels(channels) |
| 3098 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3099 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3100 | } |
| 3101 | } |
| 3102 | } |
| 3103 | } |
| 3104 | |
| 3105 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_qmax) { |
| 3106 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3107 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3108 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3109 | AvgPoolMicrokernelTester() |
| 3110 | .output_pixels(output_pixels) |
| 3111 | .pooling_elements(pooling_elements) |
| 3112 | .pooling_tile(9, 8) |
| 3113 | .channels(channels) |
| 3114 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3115 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3116 | } |
| 3117 | } |
| 3118 | } |
| 3119 | } |
| 3120 | |
| 3121 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_output_stride) { |
| 3122 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3123 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3124 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3125 | AvgPoolMicrokernelTester() |
| 3126 | .output_pixels(output_pixels) |
| 3127 | .pooling_elements(pooling_elements) |
| 3128 | .pooling_tile(9, 8) |
| 3129 | .channels(channels) |
| 3130 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3131 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3132 | } |
| 3133 | } |
| 3134 | } |
| 3135 | } |
| 3136 | |
| 3137 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_step) { |
| 3138 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3139 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3140 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 3141 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 3142 | AvgPoolMicrokernelTester() |
| 3143 | .output_pixels(output_pixels) |
| 3144 | .pooling_elements(pooling_elements) |
| 3145 | .pooling_tile(9, 8) |
| 3146 | .step(step) |
| 3147 | .channels(channels) |
| 3148 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 3149 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3150 | } |
| 3151 | } |
| 3152 | } |
| 3153 | } |
| 3154 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 3155 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 3156 | |
| 3157 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 3158 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3159 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3160 | AvgPoolMicrokernelTester() |
| 3161 | .pooling_elements(17) |
| 3162 | .pooling_tile(9, 8) |
| 3163 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3164 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3165 | } |
| 3166 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3167 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3168 | AvgPoolMicrokernelTester() |
| 3169 | .pooling_elements(17) |
| 3170 | .pooling_tile(9, 8) |
| 3171 | .channels(1) |
| 3172 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3173 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3174 | } |
| 3175 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3176 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3177 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 3178 | AvgPoolMicrokernelTester() |
| 3179 | .pooling_elements(17) |
| 3180 | .pooling_tile(9, 8) |
| 3181 | .channels(1) |
| 3182 | .input_offset(3) |
| 3183 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3184 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3185 | } |
| 3186 | } |
| 3187 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3188 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3189 | AvgPoolMicrokernelTester() |
| 3190 | .pooling_elements(17) |
| 3191 | .pooling_tile(9, 8) |
| 3192 | .channels(1) |
| 3193 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3194 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3195 | } |
| 3196 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3197 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3198 | AvgPoolMicrokernelTester() |
| 3199 | .pooling_elements(17) |
| 3200 | .pooling_tile(9, 8) |
| 3201 | .channels(1) |
| 3202 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3203 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3204 | } |
| 3205 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3206 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3207 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3208 | AvgPoolMicrokernelTester() |
| 3209 | .pooling_elements(pooling_elements) |
| 3210 | .pooling_tile(9, 8) |
| 3211 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3212 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3213 | } |
| 3214 | } |
| 3215 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3216 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3217 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3218 | AvgPoolMicrokernelTester() |
| 3219 | .pooling_elements(pooling_elements) |
| 3220 | .pooling_tile(9, 8) |
| 3221 | .channels(1) |
| 3222 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3223 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3224 | } |
| 3225 | } |
| 3226 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3227 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3228 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3229 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3230 | AvgPoolMicrokernelTester() |
| 3231 | .pooling_elements(pooling_elements) |
| 3232 | .pooling_tile(9, 8) |
| 3233 | .channels(1) |
| 3234 | .input_offset(3) |
| 3235 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3236 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3237 | } |
| 3238 | } |
| 3239 | } |
| 3240 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3241 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3242 | for (size_t channels = 2; channels < 10; channels++) { |
| 3243 | AvgPoolMicrokernelTester() |
| 3244 | .pooling_elements(17) |
| 3245 | .pooling_tile(9, 8) |
| 3246 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3247 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3248 | } |
| 3249 | } |
| 3250 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3251 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3252 | for (size_t channels = 2; channels < 10; channels++) { |
| 3253 | AvgPoolMicrokernelTester() |
| 3254 | .pooling_elements(17) |
| 3255 | .pooling_tile(9, 8) |
| 3256 | .channels(channels) |
| 3257 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3258 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3259 | } |
| 3260 | } |
| 3261 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3262 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3263 | for (size_t channels = 2; channels < 10; channels++) { |
| 3264 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 3265 | AvgPoolMicrokernelTester() |
| 3266 | .pooling_elements(17) |
| 3267 | .pooling_tile(9, 8) |
| 3268 | .channels(channels) |
| 3269 | .input_offset(3) |
| 3270 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3271 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3272 | } |
| 3273 | } |
| 3274 | } |
| 3275 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3276 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3277 | for (size_t channels = 2; channels < 10; channels++) { |
| 3278 | AvgPoolMicrokernelTester() |
| 3279 | .pooling_elements(17) |
| 3280 | .pooling_tile(9, 8) |
| 3281 | .channels(channels) |
| 3282 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3283 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3284 | } |
| 3285 | } |
| 3286 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3287 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3288 | for (size_t channels = 2; channels < 10; channels++) { |
| 3289 | AvgPoolMicrokernelTester() |
| 3290 | .pooling_elements(17) |
| 3291 | .pooling_tile(9, 8) |
| 3292 | .channels(channels) |
| 3293 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3294 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3295 | } |
| 3296 | } |
| 3297 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3298 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3299 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3300 | for (size_t channels = 2; channels < 10; channels++) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3301 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3302 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3303 | .pooling_tile(9, 8) |
| 3304 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3305 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3306 | } |
| 3307 | } |
| 3308 | } |
| 3309 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3310 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3311 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3312 | for (size_t channels = 2; channels < 10; channels++) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3313 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3314 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3315 | .pooling_tile(9, 8) |
| 3316 | .channels(channels) |
| 3317 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3318 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3319 | } |
| 3320 | } |
| 3321 | } |
| 3322 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3323 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3324 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3325 | for (size_t channels = 2; channels < 10; channels++) { |
| 3326 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3327 | AvgPoolMicrokernelTester() |
| 3328 | .pooling_elements(pooling_elements) |
| 3329 | .pooling_tile(9, 8) |
| 3330 | .channels(channels) |
| 3331 | .input_offset(3) |
| 3332 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3333 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3334 | } |
| 3335 | } |
| 3336 | } |
| 3337 | } |
| 3338 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3339 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3340 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3341 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3342 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3343 | .pooling_tile(9, 8) |
| 3344 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3345 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3346 | } |
| 3347 | } |
| 3348 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3349 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3350 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3351 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3352 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3353 | .pooling_tile(9, 8) |
| 3354 | .channels(1) |
| 3355 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3356 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3357 | } |
| 3358 | } |
| 3359 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3360 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3361 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3362 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3363 | AvgPoolMicrokernelTester() |
| 3364 | .pooling_elements(pooling_elements) |
| 3365 | .pooling_tile(9, 8) |
| 3366 | .channels(1) |
| 3367 | .input_offset(3) |
| 3368 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3369 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3370 | } |
| 3371 | } |
| 3372 | } |
| 3373 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3374 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3375 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3376 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3377 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3378 | .pooling_tile(9, 8) |
| 3379 | .channels(1) |
| 3380 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3381 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3382 | } |
| 3383 | } |
| 3384 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3385 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3386 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3387 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3388 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3389 | .pooling_tile(9, 8) |
| 3390 | .channels(1) |
| 3391 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3392 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3393 | } |
| 3394 | } |
| 3395 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3396 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3397 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3398 | for (size_t channels = 2; channels < 10; channels++) { |
| 3399 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3400 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3401 | .pooling_tile(9, 8) |
| 3402 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3403 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3404 | } |
| 3405 | } |
| 3406 | } |
| 3407 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3408 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3409 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3410 | for (size_t channels = 2; channels < 10; channels++) { |
| 3411 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3412 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3413 | .pooling_tile(9, 8) |
| 3414 | .channels(channels) |
| 3415 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3416 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3417 | } |
| 3418 | } |
| 3419 | } |
| 3420 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3421 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3422 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3423 | for (size_t channels = 2; channels < 10; channels++) { |
| 3424 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3425 | AvgPoolMicrokernelTester() |
| 3426 | .pooling_elements(pooling_elements) |
| 3427 | .pooling_tile(9, 8) |
| 3428 | .channels(channels) |
| 3429 | .input_offset(3) |
| 3430 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3431 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3432 | } |
| 3433 | } |
| 3434 | } |
| 3435 | } |
| 3436 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3437 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3438 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3439 | for (size_t channels = 2; channels < 10; channels++) { |
| 3440 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3441 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3442 | .pooling_tile(9, 8) |
| 3443 | .channels(channels) |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3444 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3445 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3446 | } |
| 3447 | } |
| 3448 | } |
| 3449 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3450 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, channels_gt_1_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3451 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3452 | for (size_t channels = 2; channels < 10; channels++) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3453 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3454 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3455 | .pooling_tile(9, 8) |
| 3456 | .channels(channels) |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3457 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3458 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3459 | } |
| 3460 | } |
| 3461 | } |
| 3462 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3463 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3464 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3465 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3466 | for (size_t channels = 1; channels <= 5; channels += 1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3467 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3468 | .output_pixels(output_pixels) |
| 3469 | .pooling_elements(pooling_elements) |
| 3470 | .pooling_tile(9, 8) |
| 3471 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3472 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3473 | } |
| 3474 | } |
| 3475 | } |
| 3476 | } |
| 3477 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3478 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3479 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3480 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3481 | for (size_t channels = 1; channels <= 5; channels += 1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3482 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3483 | .output_pixels(output_pixels) |
| 3484 | .pooling_elements(pooling_elements) |
| 3485 | .pooling_tile(9, 8) |
| 3486 | .channels(channels) |
| 3487 | .input_offset(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3488 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3489 | } |
| 3490 | } |
| 3491 | } |
| 3492 | } |
| 3493 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3494 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3495 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3496 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3497 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 3498 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3499 | AvgPoolMicrokernelTester() |
| 3500 | .output_pixels(output_pixels) |
| 3501 | .pooling_elements(pooling_elements) |
| 3502 | .pooling_tile(9, 8) |
| 3503 | .channels(channels) |
| 3504 | .input_offset(7) |
| 3505 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3506 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3507 | } |
| 3508 | } |
| 3509 | } |
| 3510 | } |
| 3511 | } |
| 3512 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3513 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3514 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3515 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3516 | for (size_t channels = 1; channels <= 5; channels += 1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3517 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3518 | .output_pixels(output_pixels) |
| 3519 | .pooling_elements(pooling_elements) |
| 3520 | .pooling_tile(9, 8) |
| 3521 | .channels(channels) |
| 3522 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3523 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3524 | } |
| 3525 | } |
| 3526 | } |
| 3527 | } |
| 3528 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3529 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3530 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3531 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3532 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 3533 | AvgPoolMicrokernelTester() |
| 3534 | .output_pixels(output_pixels) |
| 3535 | .pooling_elements(pooling_elements) |
| 3536 | .pooling_tile(9, 8) |
| 3537 | .channels(channels) |
| 3538 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3539 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3540 | } |
| 3541 | } |
| 3542 | } |
| 3543 | } |
| 3544 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3545 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_output_stride) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3546 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3547 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3548 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 3549 | AvgPoolMicrokernelTester() |
| 3550 | .output_pixels(output_pixels) |
| 3551 | .pooling_elements(pooling_elements) |
| 3552 | .pooling_tile(9, 8) |
| 3553 | .channels(channels) |
| 3554 | .output_stride(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3555 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3556 | } |
| 3557 | } |
| 3558 | } |
| 3559 | } |
| 3560 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3561 | TEST(F32_PAVGPOOL_MINMAX_9P8X__WASM_C1, few_output_pixels_with_step) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3562 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3563 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3564 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 3565 | for (size_t step = 2; step <= pooling_elements; step++) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3566 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3567 | .output_pixels(output_pixels) |
| 3568 | .pooling_elements(pooling_elements) |
| 3569 | .pooling_tile(9, 8) |
| 3570 | .step(step) |
| 3571 | .channels(channels) |
| 3572 | .output_stride(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3573 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3574 | } |
| 3575 | } |
| 3576 | } |
| 3577 | } |
| 3578 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 3579 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 3580 | |
| 3581 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3582 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3583 | AvgPoolMicrokernelTester() |
| 3584 | .pooling_elements(17) |
| 3585 | .pooling_tile(9, 8) |
| 3586 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3587 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3588 | } |
| 3589 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3590 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3591 | AvgPoolMicrokernelTester() |
| 3592 | .pooling_elements(17) |
| 3593 | .pooling_tile(9, 8) |
| 3594 | .channels(1) |
| 3595 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3596 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3597 | } |
| 3598 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3599 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3600 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 3601 | AvgPoolMicrokernelTester() |
| 3602 | .pooling_elements(17) |
| 3603 | .pooling_tile(9, 8) |
| 3604 | .channels(1) |
| 3605 | .input_offset(3) |
| 3606 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3607 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3608 | } |
| 3609 | } |
| 3610 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3611 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3612 | AvgPoolMicrokernelTester() |
| 3613 | .pooling_elements(17) |
| 3614 | .pooling_tile(9, 8) |
| 3615 | .channels(1) |
| 3616 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3617 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3618 | } |
| 3619 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3620 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3621 | AvgPoolMicrokernelTester() |
| 3622 | .pooling_elements(17) |
| 3623 | .pooling_tile(9, 8) |
| 3624 | .channels(1) |
| 3625 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3626 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3627 | } |
| 3628 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3629 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3630 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3631 | AvgPoolMicrokernelTester() |
| 3632 | .pooling_elements(pooling_elements) |
| 3633 | .pooling_tile(9, 8) |
| 3634 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3635 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3636 | } |
| 3637 | } |
| 3638 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3639 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3640 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3641 | AvgPoolMicrokernelTester() |
| 3642 | .pooling_elements(pooling_elements) |
| 3643 | .pooling_tile(9, 8) |
| 3644 | .channels(1) |
| 3645 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3646 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3647 | } |
| 3648 | } |
| 3649 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3650 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3651 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3652 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3653 | AvgPoolMicrokernelTester() |
| 3654 | .pooling_elements(pooling_elements) |
| 3655 | .pooling_tile(9, 8) |
| 3656 | .channels(1) |
| 3657 | .input_offset(3) |
| 3658 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3659 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3660 | } |
| 3661 | } |
| 3662 | } |
| 3663 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3664 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3665 | for (size_t channels = 2; channels < 10; channels++) { |
| 3666 | AvgPoolMicrokernelTester() |
| 3667 | .pooling_elements(17) |
| 3668 | .pooling_tile(9, 8) |
| 3669 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3670 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3671 | } |
| 3672 | } |
| 3673 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3674 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3675 | for (size_t channels = 2; channels < 10; channels++) { |
| 3676 | AvgPoolMicrokernelTester() |
| 3677 | .pooling_elements(17) |
| 3678 | .pooling_tile(9, 8) |
| 3679 | .channels(channels) |
| 3680 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3681 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3682 | } |
| 3683 | } |
| 3684 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3685 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3686 | for (size_t channels = 2; channels < 10; channels++) { |
| 3687 | for (size_t zero_index = 0; zero_index < 17; zero_index++) { |
| 3688 | AvgPoolMicrokernelTester() |
| 3689 | .pooling_elements(17) |
| 3690 | .pooling_tile(9, 8) |
| 3691 | .channels(channels) |
| 3692 | .input_offset(3) |
| 3693 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3694 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3695 | } |
| 3696 | } |
| 3697 | } |
| 3698 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3699 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3700 | for (size_t channels = 2; channels < 10; channels++) { |
| 3701 | AvgPoolMicrokernelTester() |
| 3702 | .pooling_elements(17) |
| 3703 | .pooling_tile(9, 8) |
| 3704 | .channels(channels) |
| 3705 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3706 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3707 | } |
| 3708 | } |
| 3709 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3710 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3711 | for (size_t channels = 2; channels < 10; channels++) { |
| 3712 | AvgPoolMicrokernelTester() |
| 3713 | .pooling_elements(17) |
| 3714 | .pooling_tile(9, 8) |
| 3715 | .channels(channels) |
| 3716 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3717 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3718 | } |
| 3719 | } |
| 3720 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3721 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3722 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3723 | for (size_t channels = 2; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3724 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3725 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3726 | .pooling_tile(9, 8) |
| 3727 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3728 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3729 | } |
| 3730 | } |
| 3731 | } |
| 3732 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3733 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3734 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3735 | for (size_t channels = 2; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3736 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3737 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3738 | .pooling_tile(9, 8) |
| 3739 | .channels(channels) |
| 3740 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3741 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3742 | } |
| 3743 | } |
| 3744 | } |
| 3745 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3746 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3747 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 3748 | for (size_t channels = 2; channels < 10; channels++) { |
| 3749 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3750 | AvgPoolMicrokernelTester() |
| 3751 | .pooling_elements(pooling_elements) |
| 3752 | .pooling_tile(9, 8) |
| 3753 | .channels(channels) |
| 3754 | .input_offset(3) |
| 3755 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3756 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3757 | } |
| 3758 | } |
| 3759 | } |
| 3760 | } |
| 3761 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3762 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3763 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3764 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3765 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3766 | .pooling_tile(9, 8) |
| 3767 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3768 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3769 | } |
| 3770 | } |
| 3771 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3772 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3773 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3774 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3775 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3776 | .pooling_tile(9, 8) |
| 3777 | .channels(1) |
| 3778 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3779 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3780 | } |
| 3781 | } |
| 3782 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3783 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3784 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3785 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3786 | AvgPoolMicrokernelTester() |
| 3787 | .pooling_elements(pooling_elements) |
| 3788 | .pooling_tile(9, 8) |
| 3789 | .channels(1) |
| 3790 | .input_offset(3) |
| 3791 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3792 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3793 | } |
| 3794 | } |
| 3795 | } |
| 3796 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3797 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3798 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3799 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3800 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3801 | .pooling_tile(9, 8) |
| 3802 | .channels(1) |
| 3803 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3804 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3805 | } |
| 3806 | } |
| 3807 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3808 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3809 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3810 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3811 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3812 | .pooling_tile(9, 8) |
| 3813 | .channels(1) |
| 3814 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3815 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3816 | } |
| 3817 | } |
| 3818 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3819 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3820 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3821 | for (size_t channels = 2; channels < 10; channels++) { |
| 3822 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3823 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3824 | .pooling_tile(9, 8) |
| 3825 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3826 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3827 | } |
| 3828 | } |
| 3829 | } |
| 3830 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3831 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3832 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3833 | for (size_t channels = 2; channels < 10; channels++) { |
| 3834 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3835 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3836 | .pooling_tile(9, 8) |
| 3837 | .channels(channels) |
| 3838 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3839 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3840 | } |
| 3841 | } |
| 3842 | } |
| 3843 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3844 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3845 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3846 | for (size_t channels = 2; channels < 10; channels++) { |
| 3847 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3848 | AvgPoolMicrokernelTester() |
| 3849 | .pooling_elements(pooling_elements) |
| 3850 | .pooling_tile(9, 8) |
| 3851 | .channels(channels) |
| 3852 | .input_offset(3) |
| 3853 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3854 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3855 | } |
| 3856 | } |
| 3857 | } |
| 3858 | } |
| 3859 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3860 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3861 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3862 | for (size_t channels = 2; channels < 10; channels++) { |
| 3863 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3864 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3865 | .pooling_tile(9, 8) |
| 3866 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3867 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3868 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3869 | } |
| 3870 | } |
| 3871 | } |
| 3872 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3873 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3874 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 3875 | for (size_t channels = 2; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3876 | AvgPoolMicrokernelTester() |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3877 | .pooling_elements(pooling_elements) |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3878 | .pooling_tile(9, 8) |
| 3879 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3880 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3881 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3882 | } |
| 3883 | } |
| 3884 | } |
| 3885 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3886 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3887 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3888 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3889 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3890 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3891 | .output_pixels(output_pixels) |
| 3892 | .pooling_elements(pooling_elements) |
| 3893 | .pooling_tile(9, 8) |
| 3894 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3895 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3896 | } |
| 3897 | } |
| 3898 | } |
| 3899 | } |
| 3900 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3901 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3902 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3903 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3904 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3905 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3906 | .output_pixels(output_pixels) |
| 3907 | .pooling_elements(pooling_elements) |
| 3908 | .pooling_tile(9, 8) |
| 3909 | .channels(channels) |
| 3910 | .input_offset(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3911 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3912 | } |
| 3913 | } |
| 3914 | } |
| 3915 | } |
| 3916 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3917 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3918 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3919 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3920 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 3921 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 3922 | AvgPoolMicrokernelTester() |
| 3923 | .output_pixels(output_pixels) |
| 3924 | .pooling_elements(pooling_elements) |
| 3925 | .pooling_tile(9, 8) |
| 3926 | .channels(channels) |
| 3927 | .input_offset(7) |
| 3928 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3929 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 3930 | } |
| 3931 | } |
| 3932 | } |
| 3933 | } |
| 3934 | } |
| 3935 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3936 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3937 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3938 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3939 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3940 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3941 | .output_pixels(output_pixels) |
| 3942 | .pooling_elements(pooling_elements) |
| 3943 | .pooling_tile(9, 8) |
| 3944 | .channels(channels) |
| 3945 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3946 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3947 | } |
| 3948 | } |
| 3949 | } |
| 3950 | } |
| 3951 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3952 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3953 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3954 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3955 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 3956 | AvgPoolMicrokernelTester() |
| 3957 | .output_pixels(output_pixels) |
| 3958 | .pooling_elements(pooling_elements) |
| 3959 | .pooling_tile(9, 8) |
| 3960 | .channels(channels) |
| 3961 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3962 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3963 | } |
| 3964 | } |
| 3965 | } |
| 3966 | } |
| 3967 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3968 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_output_stride) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3969 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3970 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3971 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 3972 | AvgPoolMicrokernelTester() |
| 3973 | .output_pixels(output_pixels) |
| 3974 | .pooling_elements(pooling_elements) |
| 3975 | .pooling_tile(9, 8) |
| 3976 | .channels(channels) |
| 3977 | .output_stride(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3978 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3979 | } |
| 3980 | } |
| 3981 | } |
| 3982 | } |
| 3983 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 3984 | TEST(F32_PAVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_step) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3985 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 3986 | for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) { |
| 3987 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 3988 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3989 | AvgPoolMicrokernelTester() |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 3990 | .output_pixels(output_pixels) |
| 3991 | .pooling_elements(pooling_elements) |
| 3992 | .pooling_tile(9, 8) |
| 3993 | .step(step) |
| 3994 | .channels(channels) |
| 3995 | .output_stride(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 3996 | .Test(xnn_f32_pavgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 3997 | } |
| 3998 | } |
| 3999 | } |
| 4000 | } |
| 4001 | } |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4002 | |
| 4003 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4004 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_eq_4_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4005 | TEST_REQUIRES_ARM_NEON; |
| 4006 | AvgPoolMicrokernelTester() |
| 4007 | .pooling_elements(9) |
| 4008 | .pooling_tile(9) |
| 4009 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4010 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4011 | } |
| 4012 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4013 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4014 | TEST_REQUIRES_ARM_NEON; |
| 4015 | AvgPoolMicrokernelTester() |
| 4016 | .pooling_elements(9) |
| 4017 | .pooling_tile(9) |
| 4018 | .channels(4) |
| 4019 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4020 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4021 | } |
| 4022 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4023 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_eq_4_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4024 | TEST_REQUIRES_ARM_NEON; |
| 4025 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 4026 | AvgPoolMicrokernelTester() |
| 4027 | .pooling_elements(9) |
| 4028 | .pooling_tile(9) |
| 4029 | .channels(4) |
| 4030 | .input_offset(7) |
| 4031 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4032 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4033 | } |
| 4034 | } |
| 4035 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4036 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4037 | TEST_REQUIRES_ARM_NEON; |
| 4038 | AvgPoolMicrokernelTester() |
| 4039 | .pooling_elements(9) |
| 4040 | .pooling_tile(9) |
| 4041 | .channels(4) |
| 4042 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4043 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4044 | } |
| 4045 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4046 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4047 | TEST_REQUIRES_ARM_NEON; |
| 4048 | AvgPoolMicrokernelTester() |
| 4049 | .pooling_elements(9) |
| 4050 | .pooling_tile(9) |
| 4051 | .channels(4) |
| 4052 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4053 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4054 | } |
| 4055 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4056 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_eq_4_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4057 | TEST_REQUIRES_ARM_NEON; |
| 4058 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4059 | AvgPoolMicrokernelTester() |
| 4060 | .pooling_elements(pooling_elements) |
| 4061 | .pooling_tile(9) |
| 4062 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4063 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4064 | } |
| 4065 | } |
| 4066 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4067 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4068 | TEST_REQUIRES_ARM_NEON; |
| 4069 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4070 | AvgPoolMicrokernelTester() |
| 4071 | .pooling_elements(pooling_elements) |
| 4072 | .pooling_tile(9) |
| 4073 | .channels(4) |
| 4074 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4075 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4076 | } |
| 4077 | } |
| 4078 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4079 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_eq_4_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4080 | TEST_REQUIRES_ARM_NEON; |
| 4081 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4082 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4083 | AvgPoolMicrokernelTester() |
| 4084 | .pooling_elements(pooling_elements) |
| 4085 | .pooling_tile(9) |
| 4086 | .channels(4) |
| 4087 | .input_offset(7) |
| 4088 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4089 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4090 | } |
| 4091 | } |
| 4092 | } |
| 4093 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4094 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_div_4_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4095 | TEST_REQUIRES_ARM_NEON; |
| 4096 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4097 | AvgPoolMicrokernelTester() |
| 4098 | .pooling_elements(9) |
| 4099 | .pooling_tile(9) |
| 4100 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4101 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4102 | } |
| 4103 | } |
| 4104 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4105 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4106 | TEST_REQUIRES_ARM_NEON; |
| 4107 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4108 | AvgPoolMicrokernelTester() |
| 4109 | .pooling_elements(9) |
| 4110 | .pooling_tile(9) |
| 4111 | .channels(channels) |
| 4112 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4113 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4114 | } |
| 4115 | } |
| 4116 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4117 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_div_4_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4118 | TEST_REQUIRES_ARM_NEON; |
| 4119 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4120 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 4121 | AvgPoolMicrokernelTester() |
| 4122 | .pooling_elements(9) |
| 4123 | .pooling_tile(9) |
| 4124 | .channels(channels) |
| 4125 | .input_offset(37) |
| 4126 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4127 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4128 | } |
| 4129 | } |
| 4130 | } |
| 4131 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4132 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_div_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4133 | TEST_REQUIRES_ARM_NEON; |
| 4134 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4135 | AvgPoolMicrokernelTester() |
| 4136 | .pooling_elements(9) |
| 4137 | .pooling_tile(9) |
| 4138 | .channels(channels) |
| 4139 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4140 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4141 | } |
| 4142 | } |
| 4143 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4144 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_div_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4145 | TEST_REQUIRES_ARM_NEON; |
| 4146 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4147 | AvgPoolMicrokernelTester() |
| 4148 | .pooling_elements(9) |
| 4149 | .pooling_tile(9) |
| 4150 | .channels(channels) |
| 4151 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4152 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4153 | } |
| 4154 | } |
| 4155 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4156 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_div_4_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4157 | TEST_REQUIRES_ARM_NEON; |
| 4158 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4159 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4160 | AvgPoolMicrokernelTester() |
| 4161 | .pooling_elements(pooling_elements) |
| 4162 | .pooling_tile(9) |
| 4163 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4164 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4165 | } |
| 4166 | } |
| 4167 | } |
| 4168 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4169 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_div_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4170 | TEST_REQUIRES_ARM_NEON; |
| 4171 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4172 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4173 | AvgPoolMicrokernelTester() |
| 4174 | .pooling_elements(pooling_elements) |
| 4175 | .pooling_tile(9) |
| 4176 | .channels(channels) |
| 4177 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4178 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4179 | } |
| 4180 | } |
| 4181 | } |
| 4182 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4183 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_div_4_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4184 | TEST_REQUIRES_ARM_NEON; |
| 4185 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4186 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4187 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4188 | AvgPoolMicrokernelTester() |
| 4189 | .pooling_elements(pooling_elements) |
| 4190 | .pooling_tile(9) |
| 4191 | .channels(channels) |
| 4192 | .input_offset(37) |
| 4193 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4194 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4195 | } |
| 4196 | } |
| 4197 | } |
| 4198 | } |
| 4199 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4200 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_lt_4_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4201 | TEST_REQUIRES_ARM_NEON; |
| 4202 | for (size_t channels = 1; channels < 4; channels++) { |
| 4203 | AvgPoolMicrokernelTester() |
| 4204 | .pooling_elements(9) |
| 4205 | .pooling_tile(9) |
| 4206 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4207 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4208 | } |
| 4209 | } |
| 4210 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4211 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4212 | TEST_REQUIRES_ARM_NEON; |
| 4213 | for (size_t channels = 1; channels < 4; channels++) { |
| 4214 | AvgPoolMicrokernelTester() |
| 4215 | .pooling_elements(9) |
| 4216 | .pooling_tile(9) |
| 4217 | .channels(channels) |
| 4218 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4219 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4220 | } |
| 4221 | } |
| 4222 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4223 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_lt_4_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4224 | TEST_REQUIRES_ARM_NEON; |
| 4225 | for (size_t channels = 1; channels < 4; channels++) { |
| 4226 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 4227 | AvgPoolMicrokernelTester() |
| 4228 | .pooling_elements(9) |
| 4229 | .pooling_tile(9) |
| 4230 | .channels(channels) |
| 4231 | .input_offset(5) |
| 4232 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4233 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4234 | } |
| 4235 | } |
| 4236 | } |
| 4237 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4238 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4239 | TEST_REQUIRES_ARM_NEON; |
| 4240 | for (size_t channels = 1; channels < 4; channels++) { |
| 4241 | AvgPoolMicrokernelTester() |
| 4242 | .pooling_elements(9) |
| 4243 | .pooling_tile(9) |
| 4244 | .channels(channels) |
| 4245 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4246 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4247 | } |
| 4248 | } |
| 4249 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4250 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4251 | TEST_REQUIRES_ARM_NEON; |
| 4252 | for (size_t channels = 1; channels < 4; channels++) { |
| 4253 | AvgPoolMicrokernelTester() |
| 4254 | .pooling_elements(9) |
| 4255 | .pooling_tile(9) |
| 4256 | .channels(channels) |
| 4257 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4258 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4259 | } |
| 4260 | } |
| 4261 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4262 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_lt_4_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4263 | TEST_REQUIRES_ARM_NEON; |
| 4264 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4265 | for (size_t channels = 1; channels < 4; channels++) { |
| 4266 | AvgPoolMicrokernelTester() |
| 4267 | .pooling_elements(pooling_elements) |
| 4268 | .pooling_tile(9) |
| 4269 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4270 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4271 | } |
| 4272 | } |
| 4273 | } |
| 4274 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4275 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4276 | TEST_REQUIRES_ARM_NEON; |
| 4277 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4278 | for (size_t channels = 1; channels < 4; channels++) { |
| 4279 | AvgPoolMicrokernelTester() |
| 4280 | .pooling_elements(pooling_elements) |
| 4281 | .pooling_tile(9) |
| 4282 | .channels(channels) |
| 4283 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4284 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4285 | } |
| 4286 | } |
| 4287 | } |
| 4288 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4289 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_lt_4_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4290 | TEST_REQUIRES_ARM_NEON; |
| 4291 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4292 | for (size_t channels = 1; channels < 4; channels++) { |
| 4293 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4294 | AvgPoolMicrokernelTester() |
| 4295 | .pooling_elements(pooling_elements) |
| 4296 | .pooling_tile(9) |
| 4297 | .channels(channels) |
| 4298 | .input_offset(5) |
| 4299 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4300 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4301 | } |
| 4302 | } |
| 4303 | } |
| 4304 | } |
| 4305 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4306 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_gt_4_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4307 | TEST_REQUIRES_ARM_NEON; |
| 4308 | for (size_t channels = 5; channels < 8; channels++) { |
| 4309 | AvgPoolMicrokernelTester() |
| 4310 | .pooling_elements(9) |
| 4311 | .pooling_tile(9) |
| 4312 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4313 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4314 | } |
| 4315 | } |
| 4316 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4317 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4318 | TEST_REQUIRES_ARM_NEON; |
| 4319 | for (size_t channels = 5; channels < 8; channels++) { |
| 4320 | AvgPoolMicrokernelTester() |
| 4321 | .pooling_elements(9) |
| 4322 | .pooling_tile(9) |
| 4323 | .channels(channels) |
| 4324 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4325 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4326 | } |
| 4327 | } |
| 4328 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4329 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_gt_4_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4330 | TEST_REQUIRES_ARM_NEON; |
| 4331 | for (size_t channels = 5; channels < 8; channels++) { |
| 4332 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 4333 | AvgPoolMicrokernelTester() |
| 4334 | .pooling_elements(9) |
| 4335 | .pooling_tile(9) |
| 4336 | .channels(channels) |
| 4337 | .input_offset(11) |
| 4338 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4339 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4340 | } |
| 4341 | } |
| 4342 | } |
| 4343 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4344 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4345 | TEST_REQUIRES_ARM_NEON; |
| 4346 | for (size_t channels = 5; channels < 8; channels++) { |
| 4347 | AvgPoolMicrokernelTester() |
| 4348 | .pooling_elements(9) |
| 4349 | .pooling_tile(9) |
| 4350 | .channels(channels) |
| 4351 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4352 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4353 | } |
| 4354 | } |
| 4355 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4356 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4357 | TEST_REQUIRES_ARM_NEON; |
| 4358 | for (size_t channels = 5; channels < 8; channels++) { |
| 4359 | AvgPoolMicrokernelTester() |
| 4360 | .pooling_elements(9) |
| 4361 | .pooling_tile(9) |
| 4362 | .channels(channels) |
| 4363 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4364 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4365 | } |
| 4366 | } |
| 4367 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4368 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_gt_4_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4369 | TEST_REQUIRES_ARM_NEON; |
| 4370 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4371 | for (size_t channels = 5; channels < 8; channels++) { |
| 4372 | AvgPoolMicrokernelTester() |
| 4373 | .pooling_elements(pooling_elements) |
| 4374 | .pooling_tile(9) |
| 4375 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4376 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4377 | } |
| 4378 | } |
| 4379 | } |
| 4380 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4381 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4382 | TEST_REQUIRES_ARM_NEON; |
| 4383 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4384 | for (size_t channels = 5; channels < 8; channels++) { |
| 4385 | AvgPoolMicrokernelTester() |
| 4386 | .pooling_elements(pooling_elements) |
| 4387 | .pooling_tile(9) |
| 4388 | .channels(channels) |
| 4389 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4390 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4391 | } |
| 4392 | } |
| 4393 | } |
| 4394 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4395 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, channels_gt_4_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4396 | TEST_REQUIRES_ARM_NEON; |
| 4397 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4398 | for (size_t channels = 5; channels < 8; channels++) { |
| 4399 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4400 | AvgPoolMicrokernelTester() |
| 4401 | .pooling_elements(pooling_elements) |
| 4402 | .pooling_tile(9) |
| 4403 | .channels(channels) |
| 4404 | .input_offset(11) |
| 4405 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4406 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4407 | } |
| 4408 | } |
| 4409 | } |
| 4410 | } |
| 4411 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4412 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, few_output_pixels) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4413 | TEST_REQUIRES_ARM_NEON; |
| 4414 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4415 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4416 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4417 | AvgPoolMicrokernelTester() |
| 4418 | .output_pixels(output_pixels) |
| 4419 | .pooling_elements(pooling_elements) |
| 4420 | .pooling_tile(9, 0) |
| 4421 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4422 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4423 | } |
| 4424 | } |
| 4425 | } |
| 4426 | } |
| 4427 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4428 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, few_output_pixels_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4429 | TEST_REQUIRES_ARM_NEON; |
| 4430 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4431 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4432 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4433 | AvgPoolMicrokernelTester() |
| 4434 | .output_pixels(output_pixels) |
| 4435 | .pooling_elements(pooling_elements) |
| 4436 | .pooling_tile(9, 0) |
| 4437 | .channels(channels) |
| 4438 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4439 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4440 | } |
| 4441 | } |
| 4442 | } |
| 4443 | } |
| 4444 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4445 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, few_output_pixels_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4446 | TEST_REQUIRES_ARM_NEON; |
| 4447 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4448 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4449 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4450 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4451 | AvgPoolMicrokernelTester() |
| 4452 | .output_pixels(output_pixels) |
| 4453 | .pooling_elements(pooling_elements) |
| 4454 | .pooling_tile(9, 0) |
| 4455 | .channels(channels) |
| 4456 | .input_offset(23) |
| 4457 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4458 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4459 | } |
| 4460 | } |
| 4461 | } |
| 4462 | } |
| 4463 | } |
| 4464 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4465 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, few_output_pixels_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4466 | TEST_REQUIRES_ARM_NEON; |
| 4467 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4468 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4469 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4470 | AvgPoolMicrokernelTester() |
| 4471 | .output_pixels(output_pixels) |
| 4472 | .pooling_elements(pooling_elements) |
| 4473 | .pooling_tile(9, 0) |
| 4474 | .channels(channels) |
| 4475 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4476 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4477 | } |
| 4478 | } |
| 4479 | } |
| 4480 | } |
| 4481 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4482 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, few_output_pixels_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4483 | TEST_REQUIRES_ARM_NEON; |
| 4484 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4485 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4486 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4487 | AvgPoolMicrokernelTester() |
| 4488 | .output_pixels(output_pixels) |
| 4489 | .pooling_elements(pooling_elements) |
| 4490 | .pooling_tile(9, 0) |
| 4491 | .channels(channels) |
| 4492 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4493 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4494 | } |
| 4495 | } |
| 4496 | } |
| 4497 | } |
| 4498 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4499 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, few_output_pixels_with_output_stride) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4500 | TEST_REQUIRES_ARM_NEON; |
| 4501 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4502 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4503 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4504 | AvgPoolMicrokernelTester() |
| 4505 | .output_pixels(output_pixels) |
| 4506 | .pooling_elements(pooling_elements) |
| 4507 | .pooling_tile(9, 0) |
| 4508 | .channels(channels) |
| 4509 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4510 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4511 | } |
| 4512 | } |
| 4513 | } |
| 4514 | } |
| 4515 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4516 | TEST(F32_PAVGPOOL_MINMAX_9X__NEON_C4, few_output_pixels_with_step) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4517 | TEST_REQUIRES_ARM_NEON; |
| 4518 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4519 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4520 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4521 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 4522 | AvgPoolMicrokernelTester() |
| 4523 | .output_pixels(output_pixels) |
| 4524 | .pooling_elements(pooling_elements) |
| 4525 | .pooling_tile(9, 0) |
| 4526 | .step(step) |
| 4527 | .channels(channels) |
| 4528 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4529 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__neon_c4, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4530 | } |
| 4531 | } |
| 4532 | } |
| 4533 | } |
| 4534 | } |
| 4535 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 4536 | |
| 4537 | |
| 4538 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4539 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_eq_4_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4540 | TEST_REQUIRES_X86_SSE; |
| 4541 | AvgPoolMicrokernelTester() |
| 4542 | .pooling_elements(9) |
| 4543 | .pooling_tile(9) |
| 4544 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4545 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4546 | } |
| 4547 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4548 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4549 | TEST_REQUIRES_X86_SSE; |
| 4550 | AvgPoolMicrokernelTester() |
| 4551 | .pooling_elements(9) |
| 4552 | .pooling_tile(9) |
| 4553 | .channels(4) |
| 4554 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4555 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4556 | } |
| 4557 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4558 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_eq_4_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4559 | TEST_REQUIRES_X86_SSE; |
| 4560 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 4561 | AvgPoolMicrokernelTester() |
| 4562 | .pooling_elements(9) |
| 4563 | .pooling_tile(9) |
| 4564 | .channels(4) |
| 4565 | .input_offset(7) |
| 4566 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4567 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4568 | } |
| 4569 | } |
| 4570 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4571 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4572 | TEST_REQUIRES_X86_SSE; |
| 4573 | AvgPoolMicrokernelTester() |
| 4574 | .pooling_elements(9) |
| 4575 | .pooling_tile(9) |
| 4576 | .channels(4) |
| 4577 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4578 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4579 | } |
| 4580 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4581 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4582 | TEST_REQUIRES_X86_SSE; |
| 4583 | AvgPoolMicrokernelTester() |
| 4584 | .pooling_elements(9) |
| 4585 | .pooling_tile(9) |
| 4586 | .channels(4) |
| 4587 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4588 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4589 | } |
| 4590 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4591 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_eq_4_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4592 | TEST_REQUIRES_X86_SSE; |
| 4593 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4594 | AvgPoolMicrokernelTester() |
| 4595 | .pooling_elements(pooling_elements) |
| 4596 | .pooling_tile(9) |
| 4597 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4598 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4599 | } |
| 4600 | } |
| 4601 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4602 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4603 | TEST_REQUIRES_X86_SSE; |
| 4604 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4605 | AvgPoolMicrokernelTester() |
| 4606 | .pooling_elements(pooling_elements) |
| 4607 | .pooling_tile(9) |
| 4608 | .channels(4) |
| 4609 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4610 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4611 | } |
| 4612 | } |
| 4613 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4614 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_eq_4_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4615 | TEST_REQUIRES_X86_SSE; |
| 4616 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4617 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4618 | AvgPoolMicrokernelTester() |
| 4619 | .pooling_elements(pooling_elements) |
| 4620 | .pooling_tile(9) |
| 4621 | .channels(4) |
| 4622 | .input_offset(7) |
| 4623 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4624 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4625 | } |
| 4626 | } |
| 4627 | } |
| 4628 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4629 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_div_4_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4630 | TEST_REQUIRES_X86_SSE; |
| 4631 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4632 | AvgPoolMicrokernelTester() |
| 4633 | .pooling_elements(9) |
| 4634 | .pooling_tile(9) |
| 4635 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4636 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4637 | } |
| 4638 | } |
| 4639 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4640 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4641 | TEST_REQUIRES_X86_SSE; |
| 4642 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4643 | AvgPoolMicrokernelTester() |
| 4644 | .pooling_elements(9) |
| 4645 | .pooling_tile(9) |
| 4646 | .channels(channels) |
| 4647 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4648 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4649 | } |
| 4650 | } |
| 4651 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4652 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_div_4_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4653 | TEST_REQUIRES_X86_SSE; |
| 4654 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4655 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 4656 | AvgPoolMicrokernelTester() |
| 4657 | .pooling_elements(9) |
| 4658 | .pooling_tile(9) |
| 4659 | .channels(channels) |
| 4660 | .input_offset(37) |
| 4661 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4662 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4663 | } |
| 4664 | } |
| 4665 | } |
| 4666 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4667 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_div_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4668 | TEST_REQUIRES_X86_SSE; |
| 4669 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4670 | AvgPoolMicrokernelTester() |
| 4671 | .pooling_elements(9) |
| 4672 | .pooling_tile(9) |
| 4673 | .channels(channels) |
| 4674 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4675 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4676 | } |
| 4677 | } |
| 4678 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4679 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_div_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4680 | TEST_REQUIRES_X86_SSE; |
| 4681 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4682 | AvgPoolMicrokernelTester() |
| 4683 | .pooling_elements(9) |
| 4684 | .pooling_tile(9) |
| 4685 | .channels(channels) |
| 4686 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4687 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4688 | } |
| 4689 | } |
| 4690 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4691 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_div_4_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4692 | TEST_REQUIRES_X86_SSE; |
| 4693 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4694 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4695 | AvgPoolMicrokernelTester() |
| 4696 | .pooling_elements(pooling_elements) |
| 4697 | .pooling_tile(9) |
| 4698 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4699 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4700 | } |
| 4701 | } |
| 4702 | } |
| 4703 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4704 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_div_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4705 | TEST_REQUIRES_X86_SSE; |
| 4706 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4707 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4708 | AvgPoolMicrokernelTester() |
| 4709 | .pooling_elements(pooling_elements) |
| 4710 | .pooling_tile(9) |
| 4711 | .channels(channels) |
| 4712 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4713 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4714 | } |
| 4715 | } |
| 4716 | } |
| 4717 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4718 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_div_4_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4719 | TEST_REQUIRES_X86_SSE; |
| 4720 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4721 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 4722 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4723 | AvgPoolMicrokernelTester() |
| 4724 | .pooling_elements(pooling_elements) |
| 4725 | .pooling_tile(9) |
| 4726 | .channels(channels) |
| 4727 | .input_offset(37) |
| 4728 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4729 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4730 | } |
| 4731 | } |
| 4732 | } |
| 4733 | } |
| 4734 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4735 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_lt_4_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4736 | TEST_REQUIRES_X86_SSE; |
| 4737 | for (size_t channels = 1; channels < 4; channels++) { |
| 4738 | AvgPoolMicrokernelTester() |
| 4739 | .pooling_elements(9) |
| 4740 | .pooling_tile(9) |
| 4741 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4742 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4743 | } |
| 4744 | } |
| 4745 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4746 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4747 | TEST_REQUIRES_X86_SSE; |
| 4748 | for (size_t channels = 1; channels < 4; channels++) { |
| 4749 | AvgPoolMicrokernelTester() |
| 4750 | .pooling_elements(9) |
| 4751 | .pooling_tile(9) |
| 4752 | .channels(channels) |
| 4753 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4754 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4755 | } |
| 4756 | } |
| 4757 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4758 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_lt_4_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4759 | TEST_REQUIRES_X86_SSE; |
| 4760 | for (size_t channels = 1; channels < 4; channels++) { |
| 4761 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 4762 | AvgPoolMicrokernelTester() |
| 4763 | .pooling_elements(9) |
| 4764 | .pooling_tile(9) |
| 4765 | .channels(channels) |
| 4766 | .input_offset(5) |
| 4767 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4768 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4769 | } |
| 4770 | } |
| 4771 | } |
| 4772 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4773 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4774 | TEST_REQUIRES_X86_SSE; |
| 4775 | for (size_t channels = 1; channels < 4; channels++) { |
| 4776 | AvgPoolMicrokernelTester() |
| 4777 | .pooling_elements(9) |
| 4778 | .pooling_tile(9) |
| 4779 | .channels(channels) |
| 4780 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4781 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4782 | } |
| 4783 | } |
| 4784 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4785 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4786 | TEST_REQUIRES_X86_SSE; |
| 4787 | for (size_t channels = 1; channels < 4; channels++) { |
| 4788 | AvgPoolMicrokernelTester() |
| 4789 | .pooling_elements(9) |
| 4790 | .pooling_tile(9) |
| 4791 | .channels(channels) |
| 4792 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4793 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4794 | } |
| 4795 | } |
| 4796 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4797 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_lt_4_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4798 | TEST_REQUIRES_X86_SSE; |
| 4799 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4800 | for (size_t channels = 1; channels < 4; channels++) { |
| 4801 | AvgPoolMicrokernelTester() |
| 4802 | .pooling_elements(pooling_elements) |
| 4803 | .pooling_tile(9) |
| 4804 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4805 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4806 | } |
| 4807 | } |
| 4808 | } |
| 4809 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4810 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4811 | TEST_REQUIRES_X86_SSE; |
| 4812 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4813 | for (size_t channels = 1; channels < 4; channels++) { |
| 4814 | AvgPoolMicrokernelTester() |
| 4815 | .pooling_elements(pooling_elements) |
| 4816 | .pooling_tile(9) |
| 4817 | .channels(channels) |
| 4818 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4819 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4820 | } |
| 4821 | } |
| 4822 | } |
| 4823 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4824 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_lt_4_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4825 | TEST_REQUIRES_X86_SSE; |
| 4826 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4827 | for (size_t channels = 1; channels < 4; channels++) { |
| 4828 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4829 | AvgPoolMicrokernelTester() |
| 4830 | .pooling_elements(pooling_elements) |
| 4831 | .pooling_tile(9) |
| 4832 | .channels(channels) |
| 4833 | .input_offset(5) |
| 4834 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4835 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4836 | } |
| 4837 | } |
| 4838 | } |
| 4839 | } |
| 4840 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4841 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_gt_4_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4842 | TEST_REQUIRES_X86_SSE; |
| 4843 | for (size_t channels = 5; channels < 8; channels++) { |
| 4844 | AvgPoolMicrokernelTester() |
| 4845 | .pooling_elements(9) |
| 4846 | .pooling_tile(9) |
| 4847 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4848 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4849 | } |
| 4850 | } |
| 4851 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4852 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4853 | TEST_REQUIRES_X86_SSE; |
| 4854 | for (size_t channels = 5; channels < 8; channels++) { |
| 4855 | AvgPoolMicrokernelTester() |
| 4856 | .pooling_elements(9) |
| 4857 | .pooling_tile(9) |
| 4858 | .channels(channels) |
| 4859 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4860 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4861 | } |
| 4862 | } |
| 4863 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4864 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_gt_4_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4865 | TEST_REQUIRES_X86_SSE; |
| 4866 | for (size_t channels = 5; channels < 8; channels++) { |
| 4867 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 4868 | AvgPoolMicrokernelTester() |
| 4869 | .pooling_elements(9) |
| 4870 | .pooling_tile(9) |
| 4871 | .channels(channels) |
| 4872 | .input_offset(11) |
| 4873 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4874 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4875 | } |
| 4876 | } |
| 4877 | } |
| 4878 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4879 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4880 | TEST_REQUIRES_X86_SSE; |
| 4881 | for (size_t channels = 5; channels < 8; channels++) { |
| 4882 | AvgPoolMicrokernelTester() |
| 4883 | .pooling_elements(9) |
| 4884 | .pooling_tile(9) |
| 4885 | .channels(channels) |
| 4886 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4887 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4888 | } |
| 4889 | } |
| 4890 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4891 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4892 | TEST_REQUIRES_X86_SSE; |
| 4893 | for (size_t channels = 5; channels < 8; channels++) { |
| 4894 | AvgPoolMicrokernelTester() |
| 4895 | .pooling_elements(9) |
| 4896 | .pooling_tile(9) |
| 4897 | .channels(channels) |
| 4898 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4899 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4900 | } |
| 4901 | } |
| 4902 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4903 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_gt_4_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4904 | TEST_REQUIRES_X86_SSE; |
| 4905 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4906 | for (size_t channels = 5; channels < 8; channels++) { |
| 4907 | AvgPoolMicrokernelTester() |
| 4908 | .pooling_elements(pooling_elements) |
| 4909 | .pooling_tile(9) |
| 4910 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4911 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4912 | } |
| 4913 | } |
| 4914 | } |
| 4915 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4916 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4917 | TEST_REQUIRES_X86_SSE; |
| 4918 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4919 | for (size_t channels = 5; channels < 8; channels++) { |
| 4920 | AvgPoolMicrokernelTester() |
| 4921 | .pooling_elements(pooling_elements) |
| 4922 | .pooling_tile(9) |
| 4923 | .channels(channels) |
| 4924 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4925 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4926 | } |
| 4927 | } |
| 4928 | } |
| 4929 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4930 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, channels_gt_4_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4931 | TEST_REQUIRES_X86_SSE; |
| 4932 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 4933 | for (size_t channels = 5; channels < 8; channels++) { |
| 4934 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4935 | AvgPoolMicrokernelTester() |
| 4936 | .pooling_elements(pooling_elements) |
| 4937 | .pooling_tile(9) |
| 4938 | .channels(channels) |
| 4939 | .input_offset(11) |
| 4940 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4941 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4942 | } |
| 4943 | } |
| 4944 | } |
| 4945 | } |
| 4946 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4947 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, few_output_pixels) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4948 | TEST_REQUIRES_X86_SSE; |
| 4949 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4950 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4951 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4952 | AvgPoolMicrokernelTester() |
| 4953 | .output_pixels(output_pixels) |
| 4954 | .pooling_elements(pooling_elements) |
| 4955 | .pooling_tile(9, 0) |
| 4956 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4957 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4958 | } |
| 4959 | } |
| 4960 | } |
| 4961 | } |
| 4962 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4963 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, few_output_pixels_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4964 | TEST_REQUIRES_X86_SSE; |
| 4965 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4966 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4967 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4968 | AvgPoolMicrokernelTester() |
| 4969 | .output_pixels(output_pixels) |
| 4970 | .pooling_elements(pooling_elements) |
| 4971 | .pooling_tile(9, 0) |
| 4972 | .channels(channels) |
| 4973 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4974 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 4975 | } |
| 4976 | } |
| 4977 | } |
| 4978 | } |
| 4979 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 4980 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, few_output_pixels_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4981 | TEST_REQUIRES_X86_SSE; |
| 4982 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 4983 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 4984 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 4985 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 4986 | AvgPoolMicrokernelTester() |
| 4987 | .output_pixels(output_pixels) |
| 4988 | .pooling_elements(pooling_elements) |
| 4989 | .pooling_tile(9, 0) |
| 4990 | .channels(channels) |
| 4991 | .input_offset(23) |
| 4992 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 4993 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 4994 | } |
| 4995 | } |
| 4996 | } |
| 4997 | } |
| 4998 | } |
| 4999 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5000 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, few_output_pixels_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 5001 | TEST_REQUIRES_X86_SSE; |
| 5002 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5003 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5004 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5005 | AvgPoolMicrokernelTester() |
| 5006 | .output_pixels(output_pixels) |
| 5007 | .pooling_elements(pooling_elements) |
| 5008 | .pooling_tile(9, 0) |
| 5009 | .channels(channels) |
| 5010 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5011 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 5012 | } |
| 5013 | } |
| 5014 | } |
| 5015 | } |
| 5016 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5017 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, few_output_pixels_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 5018 | TEST_REQUIRES_X86_SSE; |
| 5019 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5020 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5021 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5022 | AvgPoolMicrokernelTester() |
| 5023 | .output_pixels(output_pixels) |
| 5024 | .pooling_elements(pooling_elements) |
| 5025 | .pooling_tile(9, 0) |
| 5026 | .channels(channels) |
| 5027 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5028 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 5029 | } |
| 5030 | } |
| 5031 | } |
| 5032 | } |
| 5033 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5034 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, few_output_pixels_with_output_stride) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 5035 | TEST_REQUIRES_X86_SSE; |
| 5036 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5037 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5038 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5039 | AvgPoolMicrokernelTester() |
| 5040 | .output_pixels(output_pixels) |
| 5041 | .pooling_elements(pooling_elements) |
| 5042 | .pooling_tile(9, 0) |
| 5043 | .channels(channels) |
| 5044 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5045 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 5046 | } |
| 5047 | } |
| 5048 | } |
| 5049 | } |
| 5050 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 5051 | TEST(F32_PAVGPOOL_MINMAX_9X__SSE_C4, few_output_pixels_with_step) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 5052 | TEST_REQUIRES_X86_SSE; |
| 5053 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5054 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5055 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5056 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 5057 | AvgPoolMicrokernelTester() |
| 5058 | .output_pixels(output_pixels) |
| 5059 | .pooling_elements(pooling_elements) |
| 5060 | .pooling_tile(9, 0) |
| 5061 | .step(step) |
| 5062 | .channels(channels) |
| 5063 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5064 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__sse_c4, xnn_init_f32_minmax_sse_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 5065 | } |
| 5066 | } |
| 5067 | } |
| 5068 | } |
| 5069 | } |
| 5070 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5071 | |
| 5072 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 5073 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5074 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile) { |
| 5075 | AvgPoolMicrokernelTester() |
| 5076 | .pooling_elements(9) |
| 5077 | .pooling_tile(9) |
| 5078 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5079 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5080 | } |
| 5081 | |
| 5082 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
| 5083 | AvgPoolMicrokernelTester() |
| 5084 | .pooling_elements(9) |
| 5085 | .pooling_tile(9) |
| 5086 | .channels(4) |
| 5087 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5088 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5089 | } |
| 5090 | |
| 5091 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_zero) { |
| 5092 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 5093 | AvgPoolMicrokernelTester() |
| 5094 | .pooling_elements(9) |
| 5095 | .pooling_tile(9) |
| 5096 | .channels(4) |
| 5097 | .input_offset(7) |
| 5098 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5099 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5100 | } |
| 5101 | } |
| 5102 | |
| 5103 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
| 5104 | AvgPoolMicrokernelTester() |
| 5105 | .pooling_elements(9) |
| 5106 | .pooling_tile(9) |
| 5107 | .channels(4) |
| 5108 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5109 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5110 | } |
| 5111 | |
| 5112 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
| 5113 | AvgPoolMicrokernelTester() |
| 5114 | .pooling_elements(9) |
| 5115 | .pooling_tile(9) |
| 5116 | .channels(4) |
| 5117 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5118 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5119 | } |
| 5120 | |
| 5121 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_eq_4_unipass_subtile) { |
| 5122 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5123 | AvgPoolMicrokernelTester() |
| 5124 | .pooling_elements(pooling_elements) |
| 5125 | .pooling_tile(9) |
| 5126 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5127 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5128 | } |
| 5129 | } |
| 5130 | |
| 5131 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
| 5132 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5133 | AvgPoolMicrokernelTester() |
| 5134 | .pooling_elements(pooling_elements) |
| 5135 | .pooling_tile(9) |
| 5136 | .channels(4) |
| 5137 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5138 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5139 | } |
| 5140 | } |
| 5141 | |
| 5142 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_eq_4_unipass_subtile_with_zero) { |
| 5143 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5144 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5145 | AvgPoolMicrokernelTester() |
| 5146 | .pooling_elements(pooling_elements) |
| 5147 | .pooling_tile(9) |
| 5148 | .channels(4) |
| 5149 | .input_offset(7) |
| 5150 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5151 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5152 | } |
| 5153 | } |
| 5154 | } |
| 5155 | |
| 5156 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile) { |
| 5157 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5158 | AvgPoolMicrokernelTester() |
| 5159 | .pooling_elements(9) |
| 5160 | .pooling_tile(9) |
| 5161 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5162 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5163 | } |
| 5164 | } |
| 5165 | |
| 5166 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
| 5167 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5168 | AvgPoolMicrokernelTester() |
| 5169 | .pooling_elements(9) |
| 5170 | .pooling_tile(9) |
| 5171 | .channels(channels) |
| 5172 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5173 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5174 | } |
| 5175 | } |
| 5176 | |
| 5177 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_zero) { |
| 5178 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5179 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 5180 | AvgPoolMicrokernelTester() |
| 5181 | .pooling_elements(9) |
| 5182 | .pooling_tile(9) |
| 5183 | .channels(channels) |
| 5184 | .input_offset(37) |
| 5185 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5186 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5187 | } |
| 5188 | } |
| 5189 | } |
| 5190 | |
| 5191 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_qmin) { |
| 5192 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5193 | AvgPoolMicrokernelTester() |
| 5194 | .pooling_elements(9) |
| 5195 | .pooling_tile(9) |
| 5196 | .channels(channels) |
| 5197 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5198 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5199 | } |
| 5200 | } |
| 5201 | |
| 5202 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_qmax) { |
| 5203 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5204 | AvgPoolMicrokernelTester() |
| 5205 | .pooling_elements(9) |
| 5206 | .pooling_tile(9) |
| 5207 | .channels(channels) |
| 5208 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5209 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5210 | } |
| 5211 | } |
| 5212 | |
| 5213 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_div_4_unipass_subtile) { |
| 5214 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5215 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5216 | AvgPoolMicrokernelTester() |
| 5217 | .pooling_elements(pooling_elements) |
| 5218 | .pooling_tile(9) |
| 5219 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5220 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5221 | } |
| 5222 | } |
| 5223 | } |
| 5224 | |
| 5225 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_div_4_unipass_subtile_with_input_offset) { |
| 5226 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5227 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5228 | AvgPoolMicrokernelTester() |
| 5229 | .pooling_elements(pooling_elements) |
| 5230 | .pooling_tile(9) |
| 5231 | .channels(channels) |
| 5232 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5233 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5234 | } |
| 5235 | } |
| 5236 | } |
| 5237 | |
| 5238 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_div_4_unipass_subtile_with_zero) { |
| 5239 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5240 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5241 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5242 | AvgPoolMicrokernelTester() |
| 5243 | .pooling_elements(pooling_elements) |
| 5244 | .pooling_tile(9) |
| 5245 | .channels(channels) |
| 5246 | .input_offset(37) |
| 5247 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5248 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5249 | } |
| 5250 | } |
| 5251 | } |
| 5252 | } |
| 5253 | |
| 5254 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile) { |
| 5255 | for (size_t channels = 1; channels < 4; channels++) { |
| 5256 | AvgPoolMicrokernelTester() |
| 5257 | .pooling_elements(9) |
| 5258 | .pooling_tile(9) |
| 5259 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5260 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5261 | } |
| 5262 | } |
| 5263 | |
| 5264 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
| 5265 | for (size_t channels = 1; channels < 4; channels++) { |
| 5266 | AvgPoolMicrokernelTester() |
| 5267 | .pooling_elements(9) |
| 5268 | .pooling_tile(9) |
| 5269 | .channels(channels) |
| 5270 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5271 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5272 | } |
| 5273 | } |
| 5274 | |
| 5275 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_zero) { |
| 5276 | for (size_t channels = 1; channels < 4; channels++) { |
| 5277 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 5278 | AvgPoolMicrokernelTester() |
| 5279 | .pooling_elements(9) |
| 5280 | .pooling_tile(9) |
| 5281 | .channels(channels) |
| 5282 | .input_offset(5) |
| 5283 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5284 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5285 | } |
| 5286 | } |
| 5287 | } |
| 5288 | |
| 5289 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
| 5290 | for (size_t channels = 1; channels < 4; channels++) { |
| 5291 | AvgPoolMicrokernelTester() |
| 5292 | .pooling_elements(9) |
| 5293 | .pooling_tile(9) |
| 5294 | .channels(channels) |
| 5295 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5296 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5297 | } |
| 5298 | } |
| 5299 | |
| 5300 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
| 5301 | for (size_t channels = 1; channels < 4; channels++) { |
| 5302 | AvgPoolMicrokernelTester() |
| 5303 | .pooling_elements(9) |
| 5304 | .pooling_tile(9) |
| 5305 | .channels(channels) |
| 5306 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5307 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5308 | } |
| 5309 | } |
| 5310 | |
| 5311 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_lt_4_unipass_subtile) { |
| 5312 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5313 | for (size_t channels = 1; channels < 4; channels++) { |
| 5314 | AvgPoolMicrokernelTester() |
| 5315 | .pooling_elements(pooling_elements) |
| 5316 | .pooling_tile(9) |
| 5317 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5318 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5319 | } |
| 5320 | } |
| 5321 | } |
| 5322 | |
| 5323 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
| 5324 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5325 | for (size_t channels = 1; channels < 4; channels++) { |
| 5326 | AvgPoolMicrokernelTester() |
| 5327 | .pooling_elements(pooling_elements) |
| 5328 | .pooling_tile(9) |
| 5329 | .channels(channels) |
| 5330 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5331 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5332 | } |
| 5333 | } |
| 5334 | } |
| 5335 | |
| 5336 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_lt_4_unipass_subtile_with_zero) { |
| 5337 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5338 | for (size_t channels = 1; channels < 4; channels++) { |
| 5339 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5340 | AvgPoolMicrokernelTester() |
| 5341 | .pooling_elements(pooling_elements) |
| 5342 | .pooling_tile(9) |
| 5343 | .channels(channels) |
| 5344 | .input_offset(5) |
| 5345 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5346 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5347 | } |
| 5348 | } |
| 5349 | } |
| 5350 | } |
| 5351 | |
| 5352 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile) { |
| 5353 | for (size_t channels = 5; channels < 8; channels++) { |
| 5354 | AvgPoolMicrokernelTester() |
| 5355 | .pooling_elements(9) |
| 5356 | .pooling_tile(9) |
| 5357 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5358 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5359 | } |
| 5360 | } |
| 5361 | |
| 5362 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
| 5363 | for (size_t channels = 5; channels < 8; channels++) { |
| 5364 | AvgPoolMicrokernelTester() |
| 5365 | .pooling_elements(9) |
| 5366 | .pooling_tile(9) |
| 5367 | .channels(channels) |
| 5368 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5369 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5370 | } |
| 5371 | } |
| 5372 | |
| 5373 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_zero) { |
| 5374 | for (size_t channels = 5; channels < 8; channels++) { |
| 5375 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 5376 | AvgPoolMicrokernelTester() |
| 5377 | .pooling_elements(9) |
| 5378 | .pooling_tile(9) |
| 5379 | .channels(channels) |
| 5380 | .input_offset(11) |
| 5381 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5382 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5383 | } |
| 5384 | } |
| 5385 | } |
| 5386 | |
| 5387 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
| 5388 | for (size_t channels = 5; channels < 8; channels++) { |
| 5389 | AvgPoolMicrokernelTester() |
| 5390 | .pooling_elements(9) |
| 5391 | .pooling_tile(9) |
| 5392 | .channels(channels) |
| 5393 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5394 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5395 | } |
| 5396 | } |
| 5397 | |
| 5398 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
| 5399 | for (size_t channels = 5; channels < 8; channels++) { |
| 5400 | AvgPoolMicrokernelTester() |
| 5401 | .pooling_elements(9) |
| 5402 | .pooling_tile(9) |
| 5403 | .channels(channels) |
| 5404 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5405 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5406 | } |
| 5407 | } |
| 5408 | |
| 5409 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_gt_4_unipass_subtile) { |
| 5410 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5411 | for (size_t channels = 5; channels < 8; channels++) { |
| 5412 | AvgPoolMicrokernelTester() |
| 5413 | .pooling_elements(pooling_elements) |
| 5414 | .pooling_tile(9) |
| 5415 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5416 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5417 | } |
| 5418 | } |
| 5419 | } |
| 5420 | |
| 5421 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
| 5422 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5423 | for (size_t channels = 5; channels < 8; channels++) { |
| 5424 | AvgPoolMicrokernelTester() |
| 5425 | .pooling_elements(pooling_elements) |
| 5426 | .pooling_tile(9) |
| 5427 | .channels(channels) |
| 5428 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5429 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5430 | } |
| 5431 | } |
| 5432 | } |
| 5433 | |
| 5434 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, channels_gt_4_unipass_subtile_with_zero) { |
| 5435 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5436 | for (size_t channels = 5; channels < 8; channels++) { |
| 5437 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5438 | AvgPoolMicrokernelTester() |
| 5439 | .pooling_elements(pooling_elements) |
| 5440 | .pooling_tile(9) |
| 5441 | .channels(channels) |
| 5442 | .input_offset(11) |
| 5443 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5444 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5445 | } |
| 5446 | } |
| 5447 | } |
| 5448 | } |
| 5449 | |
| 5450 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, few_output_pixels) { |
| 5451 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5452 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5453 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5454 | AvgPoolMicrokernelTester() |
| 5455 | .output_pixels(output_pixels) |
| 5456 | .pooling_elements(pooling_elements) |
| 5457 | .pooling_tile(9, 0) |
| 5458 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5459 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5460 | } |
| 5461 | } |
| 5462 | } |
| 5463 | } |
| 5464 | |
| 5465 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, few_output_pixels_with_input_offset) { |
| 5466 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5467 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5468 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5469 | AvgPoolMicrokernelTester() |
| 5470 | .output_pixels(output_pixels) |
| 5471 | .pooling_elements(pooling_elements) |
| 5472 | .pooling_tile(9, 0) |
| 5473 | .channels(channels) |
| 5474 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5475 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5476 | } |
| 5477 | } |
| 5478 | } |
| 5479 | } |
| 5480 | |
| 5481 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, few_output_pixels_with_zero) { |
| 5482 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5483 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5484 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5485 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5486 | AvgPoolMicrokernelTester() |
| 5487 | .output_pixels(output_pixels) |
| 5488 | .pooling_elements(pooling_elements) |
| 5489 | .pooling_tile(9, 0) |
| 5490 | .channels(channels) |
| 5491 | .input_offset(23) |
| 5492 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5493 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5494 | } |
| 5495 | } |
| 5496 | } |
| 5497 | } |
| 5498 | } |
| 5499 | |
| 5500 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, few_output_pixels_with_qmin) { |
| 5501 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5502 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5503 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5504 | AvgPoolMicrokernelTester() |
| 5505 | .output_pixels(output_pixels) |
| 5506 | .pooling_elements(pooling_elements) |
| 5507 | .pooling_tile(9, 0) |
| 5508 | .channels(channels) |
| 5509 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5510 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5511 | } |
| 5512 | } |
| 5513 | } |
| 5514 | } |
| 5515 | |
| 5516 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, few_output_pixels_with_qmax) { |
| 5517 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5518 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5519 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5520 | AvgPoolMicrokernelTester() |
| 5521 | .output_pixels(output_pixels) |
| 5522 | .pooling_elements(pooling_elements) |
| 5523 | .pooling_tile(9, 0) |
| 5524 | .channels(channels) |
| 5525 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5526 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5527 | } |
| 5528 | } |
| 5529 | } |
| 5530 | } |
| 5531 | |
| 5532 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, few_output_pixels_with_output_stride) { |
| 5533 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5534 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5535 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5536 | AvgPoolMicrokernelTester() |
| 5537 | .output_pixels(output_pixels) |
| 5538 | .pooling_elements(pooling_elements) |
| 5539 | .pooling_tile(9, 0) |
| 5540 | .channels(channels) |
| 5541 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5542 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5543 | } |
| 5544 | } |
| 5545 | } |
| 5546 | } |
| 5547 | |
| 5548 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_ARM_C4, few_output_pixels_with_step) { |
| 5549 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5550 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5551 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5552 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 5553 | AvgPoolMicrokernelTester() |
| 5554 | .output_pixels(output_pixels) |
| 5555 | .pooling_elements(pooling_elements) |
| 5556 | .pooling_tile(9, 0) |
| 5557 | .step(step) |
| 5558 | .channels(channels) |
| 5559 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5560 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_arm_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5561 | } |
| 5562 | } |
| 5563 | } |
| 5564 | } |
| 5565 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 5566 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5567 | |
| 5568 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 5569 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5570 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile) { |
| 5571 | AvgPoolMicrokernelTester() |
| 5572 | .pooling_elements(9) |
| 5573 | .pooling_tile(9) |
| 5574 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5575 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5576 | } |
| 5577 | |
| 5578 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
| 5579 | AvgPoolMicrokernelTester() |
| 5580 | .pooling_elements(9) |
| 5581 | .pooling_tile(9) |
| 5582 | .channels(4) |
| 5583 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5584 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5585 | } |
| 5586 | |
| 5587 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_zero) { |
| 5588 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 5589 | AvgPoolMicrokernelTester() |
| 5590 | .pooling_elements(9) |
| 5591 | .pooling_tile(9) |
| 5592 | .channels(4) |
| 5593 | .input_offset(7) |
| 5594 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5595 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5596 | } |
| 5597 | } |
| 5598 | |
| 5599 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
| 5600 | AvgPoolMicrokernelTester() |
| 5601 | .pooling_elements(9) |
| 5602 | .pooling_tile(9) |
| 5603 | .channels(4) |
| 5604 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5605 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5606 | } |
| 5607 | |
| 5608 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
| 5609 | AvgPoolMicrokernelTester() |
| 5610 | .pooling_elements(9) |
| 5611 | .pooling_tile(9) |
| 5612 | .channels(4) |
| 5613 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5614 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5615 | } |
| 5616 | |
| 5617 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_eq_4_unipass_subtile) { |
| 5618 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5619 | AvgPoolMicrokernelTester() |
| 5620 | .pooling_elements(pooling_elements) |
| 5621 | .pooling_tile(9) |
| 5622 | .channels(4) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5623 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5624 | } |
| 5625 | } |
| 5626 | |
| 5627 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
| 5628 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5629 | AvgPoolMicrokernelTester() |
| 5630 | .pooling_elements(pooling_elements) |
| 5631 | .pooling_tile(9) |
| 5632 | .channels(4) |
| 5633 | .input_offset(7) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5634 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5635 | } |
| 5636 | } |
| 5637 | |
| 5638 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_eq_4_unipass_subtile_with_zero) { |
| 5639 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5640 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5641 | AvgPoolMicrokernelTester() |
| 5642 | .pooling_elements(pooling_elements) |
| 5643 | .pooling_tile(9) |
| 5644 | .channels(4) |
| 5645 | .input_offset(7) |
| 5646 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5647 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5648 | } |
| 5649 | } |
| 5650 | } |
| 5651 | |
| 5652 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile) { |
| 5653 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5654 | AvgPoolMicrokernelTester() |
| 5655 | .pooling_elements(9) |
| 5656 | .pooling_tile(9) |
| 5657 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5658 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5659 | } |
| 5660 | } |
| 5661 | |
| 5662 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
| 5663 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5664 | AvgPoolMicrokernelTester() |
| 5665 | .pooling_elements(9) |
| 5666 | .pooling_tile(9) |
| 5667 | .channels(channels) |
| 5668 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5669 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5670 | } |
| 5671 | } |
| 5672 | |
| 5673 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_zero) { |
| 5674 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5675 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 5676 | AvgPoolMicrokernelTester() |
| 5677 | .pooling_elements(9) |
| 5678 | .pooling_tile(9) |
| 5679 | .channels(channels) |
| 5680 | .input_offset(37) |
| 5681 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5682 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5683 | } |
| 5684 | } |
| 5685 | } |
| 5686 | |
| 5687 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_qmin) { |
| 5688 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5689 | AvgPoolMicrokernelTester() |
| 5690 | .pooling_elements(9) |
| 5691 | .pooling_tile(9) |
| 5692 | .channels(channels) |
| 5693 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5694 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5695 | } |
| 5696 | } |
| 5697 | |
| 5698 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_qmax) { |
| 5699 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5700 | AvgPoolMicrokernelTester() |
| 5701 | .pooling_elements(9) |
| 5702 | .pooling_tile(9) |
| 5703 | .channels(channels) |
| 5704 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5705 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5706 | } |
| 5707 | } |
| 5708 | |
| 5709 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_div_4_unipass_subtile) { |
| 5710 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5711 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5712 | AvgPoolMicrokernelTester() |
| 5713 | .pooling_elements(pooling_elements) |
| 5714 | .pooling_tile(9) |
| 5715 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5716 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5717 | } |
| 5718 | } |
| 5719 | } |
| 5720 | |
| 5721 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_div_4_unipass_subtile_with_input_offset) { |
| 5722 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5723 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5724 | AvgPoolMicrokernelTester() |
| 5725 | .pooling_elements(pooling_elements) |
| 5726 | .pooling_tile(9) |
| 5727 | .channels(channels) |
| 5728 | .input_offset(37) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5729 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5730 | } |
| 5731 | } |
| 5732 | } |
| 5733 | |
| 5734 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_div_4_unipass_subtile_with_zero) { |
| 5735 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5736 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 5737 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5738 | AvgPoolMicrokernelTester() |
| 5739 | .pooling_elements(pooling_elements) |
| 5740 | .pooling_tile(9) |
| 5741 | .channels(channels) |
| 5742 | .input_offset(37) |
| 5743 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5744 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5745 | } |
| 5746 | } |
| 5747 | } |
| 5748 | } |
| 5749 | |
| 5750 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile) { |
| 5751 | for (size_t channels = 1; channels < 4; channels++) { |
| 5752 | AvgPoolMicrokernelTester() |
| 5753 | .pooling_elements(9) |
| 5754 | .pooling_tile(9) |
| 5755 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5756 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5757 | } |
| 5758 | } |
| 5759 | |
| 5760 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
| 5761 | for (size_t channels = 1; channels < 4; channels++) { |
| 5762 | AvgPoolMicrokernelTester() |
| 5763 | .pooling_elements(9) |
| 5764 | .pooling_tile(9) |
| 5765 | .channels(channels) |
| 5766 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5767 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5768 | } |
| 5769 | } |
| 5770 | |
| 5771 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_zero) { |
| 5772 | for (size_t channels = 1; channels < 4; channels++) { |
| 5773 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 5774 | AvgPoolMicrokernelTester() |
| 5775 | .pooling_elements(9) |
| 5776 | .pooling_tile(9) |
| 5777 | .channels(channels) |
| 5778 | .input_offset(5) |
| 5779 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5780 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5781 | } |
| 5782 | } |
| 5783 | } |
| 5784 | |
| 5785 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
| 5786 | for (size_t channels = 1; channels < 4; channels++) { |
| 5787 | AvgPoolMicrokernelTester() |
| 5788 | .pooling_elements(9) |
| 5789 | .pooling_tile(9) |
| 5790 | .channels(channels) |
| 5791 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5792 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5793 | } |
| 5794 | } |
| 5795 | |
| 5796 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
| 5797 | for (size_t channels = 1; channels < 4; channels++) { |
| 5798 | AvgPoolMicrokernelTester() |
| 5799 | .pooling_elements(9) |
| 5800 | .pooling_tile(9) |
| 5801 | .channels(channels) |
| 5802 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5803 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5804 | } |
| 5805 | } |
| 5806 | |
| 5807 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_lt_4_unipass_subtile) { |
| 5808 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5809 | for (size_t channels = 1; channels < 4; channels++) { |
| 5810 | AvgPoolMicrokernelTester() |
| 5811 | .pooling_elements(pooling_elements) |
| 5812 | .pooling_tile(9) |
| 5813 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5814 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5815 | } |
| 5816 | } |
| 5817 | } |
| 5818 | |
| 5819 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
| 5820 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5821 | for (size_t channels = 1; channels < 4; channels++) { |
| 5822 | AvgPoolMicrokernelTester() |
| 5823 | .pooling_elements(pooling_elements) |
| 5824 | .pooling_tile(9) |
| 5825 | .channels(channels) |
| 5826 | .input_offset(5) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5827 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5828 | } |
| 5829 | } |
| 5830 | } |
| 5831 | |
| 5832 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_lt_4_unipass_subtile_with_zero) { |
| 5833 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5834 | for (size_t channels = 1; channels < 4; channels++) { |
| 5835 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5836 | AvgPoolMicrokernelTester() |
| 5837 | .pooling_elements(pooling_elements) |
| 5838 | .pooling_tile(9) |
| 5839 | .channels(channels) |
| 5840 | .input_offset(5) |
| 5841 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5842 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5843 | } |
| 5844 | } |
| 5845 | } |
| 5846 | } |
| 5847 | |
| 5848 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile) { |
| 5849 | for (size_t channels = 5; channels < 8; channels++) { |
| 5850 | AvgPoolMicrokernelTester() |
| 5851 | .pooling_elements(9) |
| 5852 | .pooling_tile(9) |
| 5853 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5854 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5855 | } |
| 5856 | } |
| 5857 | |
| 5858 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
| 5859 | for (size_t channels = 5; channels < 8; channels++) { |
| 5860 | AvgPoolMicrokernelTester() |
| 5861 | .pooling_elements(9) |
| 5862 | .pooling_tile(9) |
| 5863 | .channels(channels) |
| 5864 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5865 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5866 | } |
| 5867 | } |
| 5868 | |
| 5869 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_zero) { |
| 5870 | for (size_t channels = 5; channels < 8; channels++) { |
| 5871 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 5872 | AvgPoolMicrokernelTester() |
| 5873 | .pooling_elements(9) |
| 5874 | .pooling_tile(9) |
| 5875 | .channels(channels) |
| 5876 | .input_offset(11) |
| 5877 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5878 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5879 | } |
| 5880 | } |
| 5881 | } |
| 5882 | |
| 5883 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
| 5884 | for (size_t channels = 5; channels < 8; channels++) { |
| 5885 | AvgPoolMicrokernelTester() |
| 5886 | .pooling_elements(9) |
| 5887 | .pooling_tile(9) |
| 5888 | .channels(channels) |
| 5889 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5890 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5891 | } |
| 5892 | } |
| 5893 | |
| 5894 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
| 5895 | for (size_t channels = 5; channels < 8; channels++) { |
| 5896 | AvgPoolMicrokernelTester() |
| 5897 | .pooling_elements(9) |
| 5898 | .pooling_tile(9) |
| 5899 | .channels(channels) |
| 5900 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5901 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5902 | } |
| 5903 | } |
| 5904 | |
| 5905 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_gt_4_unipass_subtile) { |
| 5906 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5907 | for (size_t channels = 5; channels < 8; channels++) { |
| 5908 | AvgPoolMicrokernelTester() |
| 5909 | .pooling_elements(pooling_elements) |
| 5910 | .pooling_tile(9) |
| 5911 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5912 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5913 | } |
| 5914 | } |
| 5915 | } |
| 5916 | |
| 5917 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
| 5918 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5919 | for (size_t channels = 5; channels < 8; channels++) { |
| 5920 | AvgPoolMicrokernelTester() |
| 5921 | .pooling_elements(pooling_elements) |
| 5922 | .pooling_tile(9) |
| 5923 | .channels(channels) |
| 5924 | .input_offset(11) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5925 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5926 | } |
| 5927 | } |
| 5928 | } |
| 5929 | |
| 5930 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, channels_gt_4_unipass_subtile_with_zero) { |
| 5931 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 5932 | for (size_t channels = 5; channels < 8; channels++) { |
| 5933 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5934 | AvgPoolMicrokernelTester() |
| 5935 | .pooling_elements(pooling_elements) |
| 5936 | .pooling_tile(9) |
| 5937 | .channels(channels) |
| 5938 | .input_offset(11) |
| 5939 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5940 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5941 | } |
| 5942 | } |
| 5943 | } |
| 5944 | } |
| 5945 | |
| 5946 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, few_output_pixels) { |
| 5947 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5948 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5949 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5950 | AvgPoolMicrokernelTester() |
| 5951 | .output_pixels(output_pixels) |
| 5952 | .pooling_elements(pooling_elements) |
| 5953 | .pooling_tile(9, 0) |
| 5954 | .channels(channels) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5955 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5956 | } |
| 5957 | } |
| 5958 | } |
| 5959 | } |
| 5960 | |
| 5961 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, few_output_pixels_with_input_offset) { |
| 5962 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5963 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5964 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5965 | AvgPoolMicrokernelTester() |
| 5966 | .output_pixels(output_pixels) |
| 5967 | .pooling_elements(pooling_elements) |
| 5968 | .pooling_tile(9, 0) |
| 5969 | .channels(channels) |
| 5970 | .input_offset(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5971 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5972 | } |
| 5973 | } |
| 5974 | } |
| 5975 | } |
| 5976 | |
| 5977 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, few_output_pixels_with_zero) { |
| 5978 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5979 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5980 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 5981 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 5982 | AvgPoolMicrokernelTester() |
| 5983 | .output_pixels(output_pixels) |
| 5984 | .pooling_elements(pooling_elements) |
| 5985 | .pooling_tile(9, 0) |
| 5986 | .channels(channels) |
| 5987 | .input_offset(23) |
| 5988 | .zero_index(zero_index) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 5989 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 5990 | } |
| 5991 | } |
| 5992 | } |
| 5993 | } |
| 5994 | } |
| 5995 | |
| 5996 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, few_output_pixels_with_qmin) { |
| 5997 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 5998 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 5999 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 6000 | AvgPoolMicrokernelTester() |
| 6001 | .output_pixels(output_pixels) |
| 6002 | .pooling_elements(pooling_elements) |
| 6003 | .pooling_tile(9, 0) |
| 6004 | .channels(channels) |
| 6005 | .qmin(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 6006 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 6007 | } |
| 6008 | } |
| 6009 | } |
| 6010 | } |
| 6011 | |
| 6012 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, few_output_pixels_with_qmax) { |
| 6013 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6014 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6015 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 6016 | AvgPoolMicrokernelTester() |
| 6017 | .output_pixels(output_pixels) |
| 6018 | .pooling_elements(pooling_elements) |
| 6019 | .pooling_tile(9, 0) |
| 6020 | .channels(channels) |
| 6021 | .qmax(128) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 6022 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 6023 | } |
| 6024 | } |
| 6025 | } |
| 6026 | } |
| 6027 | |
| 6028 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, few_output_pixels_with_output_stride) { |
| 6029 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6030 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6031 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 6032 | AvgPoolMicrokernelTester() |
| 6033 | .output_pixels(output_pixels) |
| 6034 | .pooling_elements(pooling_elements) |
| 6035 | .pooling_tile(9, 0) |
| 6036 | .channels(channels) |
| 6037 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 6038 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 6039 | } |
| 6040 | } |
| 6041 | } |
| 6042 | } |
| 6043 | |
| 6044 | TEST(F32_PAVGPOOL_MINMAX_9X__WASMSIMD_X86_C4, few_output_pixels_with_step) { |
| 6045 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6046 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6047 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 6048 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 6049 | AvgPoolMicrokernelTester() |
| 6050 | .output_pixels(output_pixels) |
| 6051 | .pooling_elements(pooling_elements) |
| 6052 | .pooling_tile(9, 0) |
| 6053 | .step(step) |
| 6054 | .channels(channels) |
| 6055 | .output_stride(23) |
Marat Dukhan | ef5560d | 2022-01-09 20:51:54 -0800 | [diff] [blame] | 6056 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasmsimd_x86_c4, xnn_init_f32_minmax_wasmsimd_params); |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 6057 | } |
| 6058 | } |
| 6059 | } |
| 6060 | } |
| 6061 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 6062 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 1483c53 | 2020-07-16 18:08:19 -0700 | [diff] [blame] | 6063 | |
| 6064 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 6065 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6066 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_eq_1_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6067 | AvgPoolMicrokernelTester() |
| 6068 | .pooling_elements(9) |
| 6069 | .pooling_tile(9) |
| 6070 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6071 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6072 | } |
| 6073 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6074 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_eq_1_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6075 | AvgPoolMicrokernelTester() |
| 6076 | .pooling_elements(9) |
| 6077 | .pooling_tile(9) |
| 6078 | .channels(1) |
| 6079 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6080 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6081 | } |
| 6082 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6083 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_eq_1_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6084 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 6085 | AvgPoolMicrokernelTester() |
| 6086 | .pooling_elements(9) |
| 6087 | .pooling_tile(9) |
| 6088 | .channels(1) |
| 6089 | .input_offset(3) |
| 6090 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6091 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6092 | } |
| 6093 | } |
| 6094 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6095 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_eq_1_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6096 | AvgPoolMicrokernelTester() |
| 6097 | .pooling_elements(9) |
| 6098 | .pooling_tile(9) |
| 6099 | .channels(1) |
| 6100 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6101 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6102 | } |
| 6103 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6104 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_eq_1_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6105 | AvgPoolMicrokernelTester() |
| 6106 | .pooling_elements(9) |
| 6107 | .pooling_tile(9) |
| 6108 | .channels(1) |
| 6109 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6110 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6111 | } |
| 6112 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6113 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_eq_1_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6114 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6115 | AvgPoolMicrokernelTester() |
| 6116 | .pooling_elements(pooling_elements) |
| 6117 | .pooling_tile(9) |
| 6118 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6119 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6120 | } |
| 6121 | } |
| 6122 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6123 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_eq_1_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6124 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6125 | AvgPoolMicrokernelTester() |
| 6126 | .pooling_elements(pooling_elements) |
| 6127 | .pooling_tile(9) |
| 6128 | .channels(1) |
| 6129 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6130 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6131 | } |
| 6132 | } |
| 6133 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6134 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_eq_1_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6135 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6136 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 6137 | AvgPoolMicrokernelTester() |
| 6138 | .pooling_elements(pooling_elements) |
| 6139 | .pooling_tile(9) |
| 6140 | .channels(1) |
| 6141 | .input_offset(3) |
| 6142 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6143 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6144 | } |
| 6145 | } |
| 6146 | } |
| 6147 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6148 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_gt_1_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6149 | for (size_t channels = 2; channels < 10; channels++) { |
| 6150 | AvgPoolMicrokernelTester() |
| 6151 | .pooling_elements(9) |
| 6152 | .pooling_tile(9) |
| 6153 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6154 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6155 | } |
| 6156 | } |
| 6157 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6158 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_gt_1_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6159 | for (size_t channels = 2; channels < 10; channels++) { |
| 6160 | AvgPoolMicrokernelTester() |
| 6161 | .pooling_elements(9) |
| 6162 | .pooling_tile(9) |
| 6163 | .channels(channels) |
| 6164 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6165 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6166 | } |
| 6167 | } |
| 6168 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6169 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_gt_1_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6170 | for (size_t channels = 2; channels < 10; channels++) { |
| 6171 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 6172 | AvgPoolMicrokernelTester() |
| 6173 | .pooling_elements(9) |
| 6174 | .pooling_tile(9) |
| 6175 | .channels(channels) |
| 6176 | .input_offset(3) |
| 6177 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6178 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6179 | } |
| 6180 | } |
| 6181 | } |
| 6182 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6183 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_gt_1_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6184 | for (size_t channels = 2; channels < 10; channels++) { |
| 6185 | AvgPoolMicrokernelTester() |
| 6186 | .pooling_elements(9) |
| 6187 | .pooling_tile(9) |
| 6188 | .channels(channels) |
| 6189 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6190 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6191 | } |
| 6192 | } |
| 6193 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6194 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_gt_1_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6195 | for (size_t channels = 2; channels < 10; channels++) { |
| 6196 | AvgPoolMicrokernelTester() |
| 6197 | .pooling_elements(9) |
| 6198 | .pooling_tile(9) |
| 6199 | .channels(channels) |
| 6200 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6201 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6202 | } |
| 6203 | } |
| 6204 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6205 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_gt_1_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6206 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6207 | for (size_t channels = 2; channels < 10; channels++) { |
| 6208 | AvgPoolMicrokernelTester() |
| 6209 | .pooling_elements(pooling_elements) |
| 6210 | .pooling_tile(9) |
| 6211 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6212 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6213 | } |
| 6214 | } |
| 6215 | } |
| 6216 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6217 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_gt_1_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6218 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6219 | for (size_t channels = 2; channels < 10; channels++) { |
| 6220 | AvgPoolMicrokernelTester() |
| 6221 | .pooling_elements(pooling_elements) |
| 6222 | .pooling_tile(9) |
| 6223 | .channels(channels) |
| 6224 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6225 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6226 | } |
| 6227 | } |
| 6228 | } |
| 6229 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6230 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, channels_gt_1_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6231 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6232 | for (size_t channels = 2; channels < 10; channels++) { |
| 6233 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 6234 | AvgPoolMicrokernelTester() |
| 6235 | .pooling_elements(pooling_elements) |
| 6236 | .pooling_tile(9) |
| 6237 | .channels(channels) |
| 6238 | .input_offset(3) |
| 6239 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6240 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6241 | } |
| 6242 | } |
| 6243 | } |
| 6244 | } |
| 6245 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6246 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, few_output_pixels) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6247 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6248 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6249 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6250 | AvgPoolMicrokernelTester() |
| 6251 | .output_pixels(output_pixels) |
| 6252 | .pooling_elements(pooling_elements) |
| 6253 | .pooling_tile(9, 0) |
| 6254 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6255 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6256 | } |
| 6257 | } |
| 6258 | } |
| 6259 | } |
| 6260 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6261 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, few_output_pixels_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6262 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6263 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6264 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6265 | AvgPoolMicrokernelTester() |
| 6266 | .output_pixels(output_pixels) |
| 6267 | .pooling_elements(pooling_elements) |
| 6268 | .pooling_tile(9, 0) |
| 6269 | .channels(channels) |
| 6270 | .input_offset(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6271 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6272 | } |
| 6273 | } |
| 6274 | } |
| 6275 | } |
| 6276 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6277 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, few_output_pixels_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6278 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6279 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6280 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6281 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 6282 | AvgPoolMicrokernelTester() |
| 6283 | .output_pixels(output_pixels) |
| 6284 | .pooling_elements(pooling_elements) |
| 6285 | .pooling_tile(9, 0) |
| 6286 | .channels(channels) |
| 6287 | .input_offset(7) |
| 6288 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6289 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6290 | } |
| 6291 | } |
| 6292 | } |
| 6293 | } |
| 6294 | } |
| 6295 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6296 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, few_output_pixels_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6297 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6298 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6299 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6300 | AvgPoolMicrokernelTester() |
| 6301 | .output_pixels(output_pixels) |
| 6302 | .pooling_elements(pooling_elements) |
| 6303 | .pooling_tile(9, 0) |
| 6304 | .channels(channels) |
| 6305 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6306 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6307 | } |
| 6308 | } |
| 6309 | } |
| 6310 | } |
| 6311 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6312 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, few_output_pixels_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6313 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6314 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6315 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6316 | AvgPoolMicrokernelTester() |
| 6317 | .output_pixels(output_pixels) |
| 6318 | .pooling_elements(pooling_elements) |
| 6319 | .pooling_tile(9, 0) |
| 6320 | .channels(channels) |
| 6321 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6322 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6323 | } |
| 6324 | } |
| 6325 | } |
| 6326 | } |
| 6327 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6328 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, few_output_pixels_with_output_stride) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6329 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6330 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6331 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6332 | AvgPoolMicrokernelTester() |
| 6333 | .output_pixels(output_pixels) |
| 6334 | .pooling_elements(pooling_elements) |
| 6335 | .pooling_tile(9, 0) |
| 6336 | .channels(channels) |
| 6337 | .output_stride(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6338 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6339 | } |
| 6340 | } |
| 6341 | } |
| 6342 | } |
| 6343 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6344 | TEST(F32_PAVGPOOL_MINMAX_9X__WASM_C1, few_output_pixels_with_step) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6345 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6346 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6347 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6348 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 6349 | AvgPoolMicrokernelTester() |
| 6350 | .output_pixels(output_pixels) |
| 6351 | .pooling_elements(pooling_elements) |
| 6352 | .pooling_tile(9, 0) |
| 6353 | .step(step) |
| 6354 | .channels(channels) |
| 6355 | .output_stride(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6356 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__wasm_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6357 | } |
| 6358 | } |
| 6359 | } |
| 6360 | } |
| 6361 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 6362 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6363 | |
| 6364 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6365 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6366 | AvgPoolMicrokernelTester() |
| 6367 | .pooling_elements(9) |
| 6368 | .pooling_tile(9) |
| 6369 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6370 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6371 | } |
| 6372 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6373 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6374 | AvgPoolMicrokernelTester() |
| 6375 | .pooling_elements(9) |
| 6376 | .pooling_tile(9) |
| 6377 | .channels(1) |
| 6378 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6379 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6380 | } |
| 6381 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6382 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6383 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 6384 | AvgPoolMicrokernelTester() |
| 6385 | .pooling_elements(9) |
| 6386 | .pooling_tile(9) |
| 6387 | .channels(1) |
| 6388 | .input_offset(3) |
| 6389 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6390 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6391 | } |
| 6392 | } |
| 6393 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6394 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6395 | AvgPoolMicrokernelTester() |
| 6396 | .pooling_elements(9) |
| 6397 | .pooling_tile(9) |
| 6398 | .channels(1) |
| 6399 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6400 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6401 | } |
| 6402 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6403 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6404 | AvgPoolMicrokernelTester() |
| 6405 | .pooling_elements(9) |
| 6406 | .pooling_tile(9) |
| 6407 | .channels(1) |
| 6408 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6409 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6410 | } |
| 6411 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6412 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6413 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6414 | AvgPoolMicrokernelTester() |
| 6415 | .pooling_elements(pooling_elements) |
| 6416 | .pooling_tile(9) |
| 6417 | .channels(1) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6418 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6419 | } |
| 6420 | } |
| 6421 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6422 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6423 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6424 | AvgPoolMicrokernelTester() |
| 6425 | .pooling_elements(pooling_elements) |
| 6426 | .pooling_tile(9) |
| 6427 | .channels(1) |
| 6428 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6429 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6430 | } |
| 6431 | } |
| 6432 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6433 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6434 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6435 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 6436 | AvgPoolMicrokernelTester() |
| 6437 | .pooling_elements(pooling_elements) |
| 6438 | .pooling_tile(9) |
| 6439 | .channels(1) |
| 6440 | .input_offset(3) |
| 6441 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6442 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6443 | } |
| 6444 | } |
| 6445 | } |
| 6446 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6447 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6448 | for (size_t channels = 2; channels < 10; channels++) { |
| 6449 | AvgPoolMicrokernelTester() |
| 6450 | .pooling_elements(9) |
| 6451 | .pooling_tile(9) |
| 6452 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6453 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6454 | } |
| 6455 | } |
| 6456 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6457 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6458 | for (size_t channels = 2; channels < 10; channels++) { |
| 6459 | AvgPoolMicrokernelTester() |
| 6460 | .pooling_elements(9) |
| 6461 | .pooling_tile(9) |
| 6462 | .channels(channels) |
| 6463 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6464 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6465 | } |
| 6466 | } |
| 6467 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6468 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6469 | for (size_t channels = 2; channels < 10; channels++) { |
| 6470 | for (size_t zero_index = 0; zero_index < 9; zero_index++) { |
| 6471 | AvgPoolMicrokernelTester() |
| 6472 | .pooling_elements(9) |
| 6473 | .pooling_tile(9) |
| 6474 | .channels(channels) |
| 6475 | .input_offset(3) |
| 6476 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6477 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6478 | } |
| 6479 | } |
| 6480 | } |
| 6481 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6482 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6483 | for (size_t channels = 2; channels < 10; channels++) { |
| 6484 | AvgPoolMicrokernelTester() |
| 6485 | .pooling_elements(9) |
| 6486 | .pooling_tile(9) |
| 6487 | .channels(channels) |
| 6488 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6489 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6490 | } |
| 6491 | } |
| 6492 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6493 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6494 | for (size_t channels = 2; channels < 10; channels++) { |
| 6495 | AvgPoolMicrokernelTester() |
| 6496 | .pooling_elements(9) |
| 6497 | .pooling_tile(9) |
| 6498 | .channels(channels) |
| 6499 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6500 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6501 | } |
| 6502 | } |
| 6503 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6504 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_subtile) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6505 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6506 | for (size_t channels = 2; channels < 10; channels++) { |
| 6507 | AvgPoolMicrokernelTester() |
| 6508 | .pooling_elements(pooling_elements) |
| 6509 | .pooling_tile(9) |
| 6510 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6511 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6512 | } |
| 6513 | } |
| 6514 | } |
| 6515 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6516 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_subtile_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6517 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6518 | for (size_t channels = 2; channels < 10; channels++) { |
| 6519 | AvgPoolMicrokernelTester() |
| 6520 | .pooling_elements(pooling_elements) |
| 6521 | .pooling_tile(9) |
| 6522 | .channels(channels) |
| 6523 | .input_offset(3) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6524 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6525 | } |
| 6526 | } |
| 6527 | } |
| 6528 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6529 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_subtile_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6530 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 6531 | for (size_t channels = 2; channels < 10; channels++) { |
| 6532 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 6533 | AvgPoolMicrokernelTester() |
| 6534 | .pooling_elements(pooling_elements) |
| 6535 | .pooling_tile(9) |
| 6536 | .channels(channels) |
| 6537 | .input_offset(3) |
| 6538 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6539 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6540 | } |
| 6541 | } |
| 6542 | } |
| 6543 | } |
| 6544 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6545 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6546 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6547 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6548 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6549 | AvgPoolMicrokernelTester() |
| 6550 | .output_pixels(output_pixels) |
| 6551 | .pooling_elements(pooling_elements) |
| 6552 | .pooling_tile(9, 0) |
| 6553 | .channels(channels) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6554 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6555 | } |
| 6556 | } |
| 6557 | } |
| 6558 | } |
| 6559 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6560 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_input_offset) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6561 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6562 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6563 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6564 | AvgPoolMicrokernelTester() |
| 6565 | .output_pixels(output_pixels) |
| 6566 | .pooling_elements(pooling_elements) |
| 6567 | .pooling_tile(9, 0) |
| 6568 | .channels(channels) |
| 6569 | .input_offset(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6570 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6571 | } |
| 6572 | } |
| 6573 | } |
| 6574 | } |
| 6575 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6576 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_zero) { |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6577 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6578 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6579 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6580 | for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) { |
| 6581 | AvgPoolMicrokernelTester() |
| 6582 | .output_pixels(output_pixels) |
| 6583 | .pooling_elements(pooling_elements) |
| 6584 | .pooling_tile(9, 0) |
| 6585 | .channels(channels) |
| 6586 | .input_offset(7) |
| 6587 | .zero_index(zero_index) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6588 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | ee1f63e | 2020-02-27 15:43:52 -0800 | [diff] [blame] | 6589 | } |
| 6590 | } |
| 6591 | } |
| 6592 | } |
| 6593 | } |
| 6594 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6595 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_qmin) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6596 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6597 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6598 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6599 | AvgPoolMicrokernelTester() |
| 6600 | .output_pixels(output_pixels) |
| 6601 | .pooling_elements(pooling_elements) |
| 6602 | .pooling_tile(9, 0) |
| 6603 | .channels(channels) |
| 6604 | .qmin(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6605 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6606 | } |
| 6607 | } |
| 6608 | } |
| 6609 | } |
| 6610 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6611 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_qmax) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6612 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6613 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6614 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6615 | AvgPoolMicrokernelTester() |
| 6616 | .output_pixels(output_pixels) |
| 6617 | .pooling_elements(pooling_elements) |
| 6618 | .pooling_tile(9, 0) |
| 6619 | .channels(channels) |
| 6620 | .qmax(128) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6621 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6622 | } |
| 6623 | } |
| 6624 | } |
| 6625 | } |
| 6626 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6627 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_output_stride) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6628 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6629 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6630 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6631 | AvgPoolMicrokernelTester() |
| 6632 | .output_pixels(output_pixels) |
| 6633 | .pooling_elements(pooling_elements) |
| 6634 | .pooling_tile(9, 0) |
| 6635 | .channels(channels) |
| 6636 | .output_stride(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6637 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6638 | } |
| 6639 | } |
| 6640 | } |
| 6641 | } |
| 6642 | |
Marat Dukhan | 9993660 | 2020-04-11 16:47:01 -0700 | [diff] [blame] | 6643 | TEST(F32_PAVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_step) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6644 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 6645 | for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) { |
| 6646 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 6647 | for (size_t step = 2; step <= pooling_elements; step++) { |
| 6648 | AvgPoolMicrokernelTester() |
| 6649 | .output_pixels(output_pixels) |
| 6650 | .pooling_elements(pooling_elements) |
| 6651 | .pooling_tile(9, 0) |
| 6652 | .step(step) |
| 6653 | .channels(channels) |
| 6654 | .output_stride(7) |
Marat Dukhan | 4a6dca9 | 2022-01-07 17:22:24 -0800 | [diff] [blame] | 6655 | .Test(xnn_f32_pavgpool_minmax_ukernel_9x__scalar_c1, xnn_init_f32_minmax_scalar_params); |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 6656 | } |
| 6657 | } |
| 6658 | } |
| 6659 | } |
| 6660 | } |