blob: 4e4a56a3c6b69e141e3491e7bbd078ae885739cb [file] [log] [blame]
XNNPACK Teamb455b122019-09-27 18:10:33 -07001// Copyright 2019 Google LLC
2//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
Marat Dukhan662faa02019-12-09 22:48:16 -08005//
6// Auto-generated file. Do not edit!
Marat Dukhan6674d692021-05-05 22:27:00 -07007// Specification: test/f32-vhswish.yaml
Marat Dukhan949b6e72021-05-13 11:21:06 -07008// Generator: tools/generate-vunary-test.py
Marat Dukhan662faa02019-12-09 22:48:16 -08009
XNNPACK Teamb455b122019-09-27 18:10:33 -070010
XNNPACK Teamb455b122019-09-27 18:10:33 -070011#include <gtest/gtest.h>
12
Marat Dukhan1dadbf72019-10-01 10:46:20 -070013#include <xnnpack/common.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070014#include <xnnpack/isa-checks.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070015
Marat Dukhana91559a2021-05-05 23:58:21 -070016#include <xnnpack/vunary.h>
Marat Dukhan949b6e72021-05-13 11:21:06 -070017#include "vunary-microkernel-tester.h"
XNNPACK Teamb455b122019-09-27 18:10:33 -070018
19
Marat Dukhan1dadbf72019-10-01 10:46:20 -070020#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Marat Dukhan6674d692021-05-05 22:27:00 -070021 TEST(F32_VHSWISH__NEON_X4, batch_eq_4) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070022 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -070023 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080024 .batch_size(4)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080025 .Test(xnn_f32_vhswish_ukernel__neon_x4, xnn_init_f32_hswish_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070026 }
27
Marat Dukhan6674d692021-05-05 22:27:00 -070028 TEST(F32_VHSWISH__NEON_X4, batch_div_4) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070029 TEST_REQUIRES_ARM_NEON;
Marat Dukhan662faa02019-12-09 22:48:16 -080030 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070031 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080032 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080033 .Test(xnn_f32_vhswish_ukernel__neon_x4, xnn_init_f32_hswish_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070034 }
35 }
36
Marat Dukhan6674d692021-05-05 22:27:00 -070037 TEST(F32_VHSWISH__NEON_X4, batch_lt_4) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070038 TEST_REQUIRES_ARM_NEON;
Marat Dukhan662faa02019-12-09 22:48:16 -080039 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070040 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080041 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080042 .Test(xnn_f32_vhswish_ukernel__neon_x4, xnn_init_f32_hswish_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070043 }
44 }
45
Marat Dukhan6674d692021-05-05 22:27:00 -070046 TEST(F32_VHSWISH__NEON_X4, batch_gt_4) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070047 TEST_REQUIRES_ARM_NEON;
Marat Dukhan662faa02019-12-09 22:48:16 -080048 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070049 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080050 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080051 .Test(xnn_f32_vhswish_ukernel__neon_x4, xnn_init_f32_hswish_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070052 }
53 }
54
Marat Dukhan6674d692021-05-05 22:27:00 -070055 TEST(F32_VHSWISH__NEON_X4, inplace) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070056 TEST_REQUIRES_ARM_NEON;
Marat Dukhan662faa02019-12-09 22:48:16 -080057 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070058 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080059 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -070060 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080061 .Test(xnn_f32_vhswish_ukernel__neon_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -080062 }
63 }
64#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
65
66
67#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Marat Dukhan6674d692021-05-05 22:27:00 -070068 TEST(F32_VHSWISH__NEON_X8, batch_eq_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -080069 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -070070 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080071 .batch_size(8)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080072 .Test(xnn_f32_vhswish_ukernel__neon_x8, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -080073 }
74
Marat Dukhan6674d692021-05-05 22:27:00 -070075 TEST(F32_VHSWISH__NEON_X8, batch_div_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -080076 TEST_REQUIRES_ARM_NEON;
77 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070078 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080079 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080080 .Test(xnn_f32_vhswish_ukernel__neon_x8, xnn_init_f32_hswish_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070081 }
82 }
83
Marat Dukhan6674d692021-05-05 22:27:00 -070084 TEST(F32_VHSWISH__NEON_X8, batch_lt_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -080085 TEST_REQUIRES_ARM_NEON;
86 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070087 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080088 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080089 .Test(xnn_f32_vhswish_ukernel__neon_x8, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -080090 }
91 }
92
Marat Dukhan6674d692021-05-05 22:27:00 -070093 TEST(F32_VHSWISH__NEON_X8, batch_gt_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -080094 TEST_REQUIRES_ARM_NEON;
95 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -070096 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -080097 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080098 .Test(xnn_f32_vhswish_ukernel__neon_x8, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -080099 }
100 }
101
Marat Dukhan6674d692021-05-05 22:27:00 -0700102 TEST(F32_VHSWISH__NEON_X8, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800103 TEST_REQUIRES_ARM_NEON;
104 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700105 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800106 .batch_size(batch_size)
107 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800108 .Test(xnn_f32_vhswish_ukernel__neon_x8, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800109 }
110 }
111#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
112
113
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700114#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Marat Dukhan6674d692021-05-05 22:27:00 -0700115 TEST(F32_VHSWISH__NEON_X16, batch_eq_16) {
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700116 TEST_REQUIRES_ARM_NEON;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700117 VUnaryMicrokernelTester()
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700118 .batch_size(16)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800119 .Test(xnn_f32_vhswish_ukernel__neon_x16, xnn_init_f32_hswish_scalar_params);
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700120 }
121
Marat Dukhan6674d692021-05-05 22:27:00 -0700122 TEST(F32_VHSWISH__NEON_X16, batch_div_16) {
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700123 TEST_REQUIRES_ARM_NEON;
124 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700125 VUnaryMicrokernelTester()
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700126 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800127 .Test(xnn_f32_vhswish_ukernel__neon_x16, xnn_init_f32_hswish_scalar_params);
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700128 }
129 }
130
Marat Dukhan6674d692021-05-05 22:27:00 -0700131 TEST(F32_VHSWISH__NEON_X16, batch_lt_16) {
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700132 TEST_REQUIRES_ARM_NEON;
133 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700134 VUnaryMicrokernelTester()
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700135 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800136 .Test(xnn_f32_vhswish_ukernel__neon_x16, xnn_init_f32_hswish_scalar_params);
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700137 }
138 }
139
Marat Dukhan6674d692021-05-05 22:27:00 -0700140 TEST(F32_VHSWISH__NEON_X16, batch_gt_16) {
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700141 TEST_REQUIRES_ARM_NEON;
142 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700143 VUnaryMicrokernelTester()
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700144 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800145 .Test(xnn_f32_vhswish_ukernel__neon_x16, xnn_init_f32_hswish_scalar_params);
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700146 }
147 }
148
Marat Dukhan6674d692021-05-05 22:27:00 -0700149 TEST(F32_VHSWISH__NEON_X16, inplace) {
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700150 TEST_REQUIRES_ARM_NEON;
151 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700152 VUnaryMicrokernelTester()
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700153 .batch_size(batch_size)
154 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800155 .Test(xnn_f32_vhswish_ukernel__neon_x16, xnn_init_f32_hswish_scalar_params);
Marat Dukhan55dde5b2020-07-10 22:48:54 -0700156 }
157 }
158#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
159
160
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700161#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -0700162 TEST(F32_VHSWISH__SSE_X4, batch_eq_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800163 TEST_REQUIRES_X86_SSE;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700164 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800165 .batch_size(4)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800166 .Test(xnn_f32_vhswish_ukernel__sse_x4, xnn_init_f32_hswish_sse_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700167 }
168
Marat Dukhan6674d692021-05-05 22:27:00 -0700169 TEST(F32_VHSWISH__SSE_X4, batch_div_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800170 TEST_REQUIRES_X86_SSE;
171 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700172 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800173 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800174 .Test(xnn_f32_vhswish_ukernel__sse_x4, xnn_init_f32_hswish_sse_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700175 }
176 }
177
Marat Dukhan6674d692021-05-05 22:27:00 -0700178 TEST(F32_VHSWISH__SSE_X4, batch_lt_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800179 TEST_REQUIRES_X86_SSE;
180 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700181 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800182 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800183 .Test(xnn_f32_vhswish_ukernel__sse_x4, xnn_init_f32_hswish_sse_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700184 }
185 }
186
Marat Dukhan6674d692021-05-05 22:27:00 -0700187 TEST(F32_VHSWISH__SSE_X4, batch_gt_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800188 TEST_REQUIRES_X86_SSE;
189 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700190 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800191 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800192 .Test(xnn_f32_vhswish_ukernel__sse_x4, xnn_init_f32_hswish_sse_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700193 }
194 }
195
Marat Dukhan6674d692021-05-05 22:27:00 -0700196 TEST(F32_VHSWISH__SSE_X4, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800197 TEST_REQUIRES_X86_SSE;
198 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700199 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800200 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700201 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800202 .Test(xnn_f32_vhswish_ukernel__sse_x4, xnn_init_f32_hswish_sse_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700203 }
204 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700205#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700206
207
Marat Dukhan662faa02019-12-09 22:48:16 -0800208#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -0700209 TEST(F32_VHSWISH__SSE_X8, batch_eq_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800210 TEST_REQUIRES_X86_SSE;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700211 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800212 .batch_size(8)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800213 .Test(xnn_f32_vhswish_ukernel__sse_x8, xnn_init_f32_hswish_sse_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800214 }
215
Marat Dukhan6674d692021-05-05 22:27:00 -0700216 TEST(F32_VHSWISH__SSE_X8, batch_div_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800217 TEST_REQUIRES_X86_SSE;
218 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700219 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800220 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800221 .Test(xnn_f32_vhswish_ukernel__sse_x8, xnn_init_f32_hswish_sse_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800222 }
223 }
224
Marat Dukhan6674d692021-05-05 22:27:00 -0700225 TEST(F32_VHSWISH__SSE_X8, batch_lt_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800226 TEST_REQUIRES_X86_SSE;
227 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700228 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800229 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800230 .Test(xnn_f32_vhswish_ukernel__sse_x8, xnn_init_f32_hswish_sse_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800231 }
232 }
233
Marat Dukhan6674d692021-05-05 22:27:00 -0700234 TEST(F32_VHSWISH__SSE_X8, batch_gt_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800235 TEST_REQUIRES_X86_SSE;
236 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700237 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800238 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800239 .Test(xnn_f32_vhswish_ukernel__sse_x8, xnn_init_f32_hswish_sse_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800240 }
241 }
242
Marat Dukhan6674d692021-05-05 22:27:00 -0700243 TEST(F32_VHSWISH__SSE_X8, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800244 TEST_REQUIRES_X86_SSE;
245 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700246 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800247 .batch_size(batch_size)
248 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800249 .Test(xnn_f32_vhswish_ukernel__sse_x8, xnn_init_f32_hswish_sse_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800250 }
251 }
252#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
253
254
255#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -0700256 TEST(F32_VHSWISH__AVX_X8, batch_eq_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800257 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700258 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800259 .batch_size(8)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800260 .Test(xnn_f32_vhswish_ukernel__avx_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800261 }
262
Marat Dukhan6674d692021-05-05 22:27:00 -0700263 TEST(F32_VHSWISH__AVX_X8, batch_div_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800264 TEST_REQUIRES_X86_AVX;
265 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700266 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800267 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800268 .Test(xnn_f32_vhswish_ukernel__avx_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800269 }
270 }
271
Marat Dukhan6674d692021-05-05 22:27:00 -0700272 TEST(F32_VHSWISH__AVX_X8, batch_lt_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800273 TEST_REQUIRES_X86_AVX;
274 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700275 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800276 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800277 .Test(xnn_f32_vhswish_ukernel__avx_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800278 }
279 }
280
Marat Dukhan6674d692021-05-05 22:27:00 -0700281 TEST(F32_VHSWISH__AVX_X8, batch_gt_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800282 TEST_REQUIRES_X86_AVX;
283 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700284 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800285 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800286 .Test(xnn_f32_vhswish_ukernel__avx_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800287 }
288 }
289
Marat Dukhan6674d692021-05-05 22:27:00 -0700290 TEST(F32_VHSWISH__AVX_X8, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800291 TEST_REQUIRES_X86_AVX;
292 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700293 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800294 .batch_size(batch_size)
295 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800296 .Test(xnn_f32_vhswish_ukernel__avx_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800297 }
298 }
299#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
300
301
302#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -0700303 TEST(F32_VHSWISH__AVX_X16, batch_eq_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800304 TEST_REQUIRES_X86_AVX;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700305 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800306 .batch_size(16)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800307 .Test(xnn_f32_vhswish_ukernel__avx_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800308 }
309
Marat Dukhan6674d692021-05-05 22:27:00 -0700310 TEST(F32_VHSWISH__AVX_X16, batch_div_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800311 TEST_REQUIRES_X86_AVX;
312 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700313 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800314 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800315 .Test(xnn_f32_vhswish_ukernel__avx_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800316 }
317 }
318
Marat Dukhan6674d692021-05-05 22:27:00 -0700319 TEST(F32_VHSWISH__AVX_X16, batch_lt_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800320 TEST_REQUIRES_X86_AVX;
321 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700322 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800323 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800324 .Test(xnn_f32_vhswish_ukernel__avx_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800325 }
326 }
327
Marat Dukhan6674d692021-05-05 22:27:00 -0700328 TEST(F32_VHSWISH__AVX_X16, batch_gt_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800329 TEST_REQUIRES_X86_AVX;
330 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700331 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800332 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800333 .Test(xnn_f32_vhswish_ukernel__avx_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800334 }
335 }
336
Marat Dukhan6674d692021-05-05 22:27:00 -0700337 TEST(F32_VHSWISH__AVX_X16, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800338 TEST_REQUIRES_X86_AVX;
339 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700340 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800341 .batch_size(batch_size)
342 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800343 .Test(xnn_f32_vhswish_ukernel__avx_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800344 }
345 }
346#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
347
348
349#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -0700350 TEST(F32_VHSWISH__FMA3_X8, batch_eq_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800351 TEST_REQUIRES_X86_FMA3;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700352 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800353 .batch_size(8)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800354 .Test(xnn_f32_vhswish_ukernel__fma3_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800355 }
356
Marat Dukhan6674d692021-05-05 22:27:00 -0700357 TEST(F32_VHSWISH__FMA3_X8, batch_div_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800358 TEST_REQUIRES_X86_FMA3;
359 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700360 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800361 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800362 .Test(xnn_f32_vhswish_ukernel__fma3_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800363 }
364 }
365
Marat Dukhan6674d692021-05-05 22:27:00 -0700366 TEST(F32_VHSWISH__FMA3_X8, batch_lt_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800367 TEST_REQUIRES_X86_FMA3;
368 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700369 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800370 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800371 .Test(xnn_f32_vhswish_ukernel__fma3_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800372 }
373 }
374
Marat Dukhan6674d692021-05-05 22:27:00 -0700375 TEST(F32_VHSWISH__FMA3_X8, batch_gt_8) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800376 TEST_REQUIRES_X86_FMA3;
377 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700378 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800379 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800380 .Test(xnn_f32_vhswish_ukernel__fma3_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800381 }
382 }
383
Marat Dukhan6674d692021-05-05 22:27:00 -0700384 TEST(F32_VHSWISH__FMA3_X8, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800385 TEST_REQUIRES_X86_FMA3;
386 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700387 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800388 .batch_size(batch_size)
389 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800390 .Test(xnn_f32_vhswish_ukernel__fma3_x8, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800391 }
392 }
393#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
394
395
396#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -0700397 TEST(F32_VHSWISH__FMA3_X16, batch_eq_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800398 TEST_REQUIRES_X86_FMA3;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700399 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800400 .batch_size(16)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800401 .Test(xnn_f32_vhswish_ukernel__fma3_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800402 }
403
Marat Dukhan6674d692021-05-05 22:27:00 -0700404 TEST(F32_VHSWISH__FMA3_X16, batch_div_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800405 TEST_REQUIRES_X86_FMA3;
406 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700407 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800408 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800409 .Test(xnn_f32_vhswish_ukernel__fma3_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800410 }
411 }
412
Marat Dukhan6674d692021-05-05 22:27:00 -0700413 TEST(F32_VHSWISH__FMA3_X16, batch_lt_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800414 TEST_REQUIRES_X86_FMA3;
415 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700416 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800417 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800418 .Test(xnn_f32_vhswish_ukernel__fma3_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800419 }
420 }
421
Marat Dukhan6674d692021-05-05 22:27:00 -0700422 TEST(F32_VHSWISH__FMA3_X16, batch_gt_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800423 TEST_REQUIRES_X86_FMA3;
424 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700425 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800426 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800427 .Test(xnn_f32_vhswish_ukernel__fma3_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800428 }
429 }
430
Marat Dukhan6674d692021-05-05 22:27:00 -0700431 TEST(F32_VHSWISH__FMA3_X16, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800432 TEST_REQUIRES_X86_FMA3;
433 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700434 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800435 .batch_size(batch_size)
436 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800437 .Test(xnn_f32_vhswish_ukernel__fma3_x16, xnn_init_f32_hswish_avx_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800438 }
439 }
440#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
441
442
443#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -0700444 TEST(F32_VHSWISH__AVX512F_X16, batch_eq_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800445 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700446 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800447 .batch_size(16)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800448 .Test(xnn_f32_vhswish_ukernel__avx512f_x16, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800449 }
450
Marat Dukhan6674d692021-05-05 22:27:00 -0700451 TEST(F32_VHSWISH__AVX512F_X16, batch_div_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800452 TEST_REQUIRES_X86_AVX512F;
453 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700454 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800455 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800456 .Test(xnn_f32_vhswish_ukernel__avx512f_x16, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800457 }
458 }
459
Marat Dukhan6674d692021-05-05 22:27:00 -0700460 TEST(F32_VHSWISH__AVX512F_X16, batch_lt_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800461 TEST_REQUIRES_X86_AVX512F;
462 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700463 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800464 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800465 .Test(xnn_f32_vhswish_ukernel__avx512f_x16, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800466 }
467 }
468
Marat Dukhan6674d692021-05-05 22:27:00 -0700469 TEST(F32_VHSWISH__AVX512F_X16, batch_gt_16) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800470 TEST_REQUIRES_X86_AVX512F;
471 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700472 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800473 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800474 .Test(xnn_f32_vhswish_ukernel__avx512f_x16, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800475 }
476 }
477
Marat Dukhan6674d692021-05-05 22:27:00 -0700478 TEST(F32_VHSWISH__AVX512F_X16, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800479 TEST_REQUIRES_X86_AVX512F;
480 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700481 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800482 .batch_size(batch_size)
483 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800484 .Test(xnn_f32_vhswish_ukernel__avx512f_x16, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800485 }
486 }
487#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
488
489
490#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -0700491 TEST(F32_VHSWISH__AVX512F_X32, batch_eq_32) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800492 TEST_REQUIRES_X86_AVX512F;
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700493 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800494 .batch_size(32)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800495 .Test(xnn_f32_vhswish_ukernel__avx512f_x32, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800496 }
497
Marat Dukhan6674d692021-05-05 22:27:00 -0700498 TEST(F32_VHSWISH__AVX512F_X32, batch_div_32) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800499 TEST_REQUIRES_X86_AVX512F;
500 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700501 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800502 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800503 .Test(xnn_f32_vhswish_ukernel__avx512f_x32, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800504 }
505 }
506
Marat Dukhan6674d692021-05-05 22:27:00 -0700507 TEST(F32_VHSWISH__AVX512F_X32, batch_lt_32) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800508 TEST_REQUIRES_X86_AVX512F;
509 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700510 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800511 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800512 .Test(xnn_f32_vhswish_ukernel__avx512f_x32, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800513 }
514 }
515
Marat Dukhan6674d692021-05-05 22:27:00 -0700516 TEST(F32_VHSWISH__AVX512F_X32, batch_gt_32) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800517 TEST_REQUIRES_X86_AVX512F;
518 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700519 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800520 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800521 .Test(xnn_f32_vhswish_ukernel__avx512f_x32, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800522 }
523 }
524
Marat Dukhan6674d692021-05-05 22:27:00 -0700525 TEST(F32_VHSWISH__AVX512F_X32, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800526 TEST_REQUIRES_X86_AVX512F;
527 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700528 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800529 .batch_size(batch_size)
530 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800531 .Test(xnn_f32_vhswish_ukernel__avx512f_x32, xnn_init_f32_hswish_avx512_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800532 }
533 }
534#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
535
536
Marat Dukhan4c617792021-12-21 15:47:58 -0800537#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -0700538 TEST(F32_VHSWISH__WASMSIMD_X4, batch_eq_4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700539 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700540 .batch_size(4)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800541 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x4, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700542 }
543
Marat Dukhan6674d692021-05-05 22:27:00 -0700544 TEST(F32_VHSWISH__WASMSIMD_X4, batch_div_4) {
Marat Dukhan9baec802020-06-25 21:34:35 -0700545 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700546 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700547 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800548 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x4, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700549 }
550 }
551
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 TEST(F32_VHSWISH__WASMSIMD_X4, batch_lt_4) {
Marat Dukhan9baec802020-06-25 21:34:35 -0700553 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700554 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700555 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800556 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x4, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700557 }
558 }
559
Marat Dukhan6674d692021-05-05 22:27:00 -0700560 TEST(F32_VHSWISH__WASMSIMD_X4, batch_gt_4) {
Marat Dukhan9baec802020-06-25 21:34:35 -0700561 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700562 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700563 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800564 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x4, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700565 }
566 }
567
Marat Dukhan6674d692021-05-05 22:27:00 -0700568 TEST(F32_VHSWISH__WASMSIMD_X4, inplace) {
Marat Dukhan9baec802020-06-25 21:34:35 -0700569 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700570 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700571 .batch_size(batch_size)
572 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800573 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x4, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700574 }
575 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800576#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan9baec802020-06-25 21:34:35 -0700577
578
Marat Dukhan4c617792021-12-21 15:47:58 -0800579#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -0700580 TEST(F32_VHSWISH__WASMSIMD_X8, batch_eq_8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700581 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700582 .batch_size(8)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800583 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x8, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700584 }
585
Marat Dukhan6674d692021-05-05 22:27:00 -0700586 TEST(F32_VHSWISH__WASMSIMD_X8, batch_div_8) {
Marat Dukhan9baec802020-06-25 21:34:35 -0700587 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700588 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700589 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800590 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x8, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700591 }
592 }
593
Marat Dukhan6674d692021-05-05 22:27:00 -0700594 TEST(F32_VHSWISH__WASMSIMD_X8, batch_lt_8) {
Marat Dukhan9baec802020-06-25 21:34:35 -0700595 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700596 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700597 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800598 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x8, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700599 }
600 }
601
Marat Dukhan6674d692021-05-05 22:27:00 -0700602 TEST(F32_VHSWISH__WASMSIMD_X8, batch_gt_8) {
Marat Dukhan9baec802020-06-25 21:34:35 -0700603 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700604 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700605 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800606 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x8, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700607 }
608 }
609
Marat Dukhan6674d692021-05-05 22:27:00 -0700610 TEST(F32_VHSWISH__WASMSIMD_X8, inplace) {
Marat Dukhan9baec802020-06-25 21:34:35 -0700611 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700612 VUnaryMicrokernelTester()
Marat Dukhan9baec802020-06-25 21:34:35 -0700613 .batch_size(batch_size)
614 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800615 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x8, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhan9baec802020-06-25 21:34:35 -0700616 }
617 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800618#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan9baec802020-06-25 21:34:35 -0700619
620
Marat Dukhan4c617792021-12-21 15:47:58 -0800621#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -0700622 TEST(F32_VHSWISH__WASMSIMD_X16, batch_eq_16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700623 VUnaryMicrokernelTester()
Marat Dukhanc303fe62020-06-26 10:09:25 -0700624 .batch_size(16)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800625 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x16, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhanc303fe62020-06-26 10:09:25 -0700626 }
627
Marat Dukhan6674d692021-05-05 22:27:00 -0700628 TEST(F32_VHSWISH__WASMSIMD_X16, batch_div_16) {
Marat Dukhanc303fe62020-06-26 10:09:25 -0700629 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700630 VUnaryMicrokernelTester()
Marat Dukhanc303fe62020-06-26 10:09:25 -0700631 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800632 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x16, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhanc303fe62020-06-26 10:09:25 -0700633 }
634 }
635
Marat Dukhan6674d692021-05-05 22:27:00 -0700636 TEST(F32_VHSWISH__WASMSIMD_X16, batch_lt_16) {
Marat Dukhanc303fe62020-06-26 10:09:25 -0700637 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700638 VUnaryMicrokernelTester()
Marat Dukhanc303fe62020-06-26 10:09:25 -0700639 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800640 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x16, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhanc303fe62020-06-26 10:09:25 -0700641 }
642 }
643
Marat Dukhan6674d692021-05-05 22:27:00 -0700644 TEST(F32_VHSWISH__WASMSIMD_X16, batch_gt_16) {
Marat Dukhanc303fe62020-06-26 10:09:25 -0700645 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700646 VUnaryMicrokernelTester()
Marat Dukhanc303fe62020-06-26 10:09:25 -0700647 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800648 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x16, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhanc303fe62020-06-26 10:09:25 -0700649 }
650 }
651
Marat Dukhan6674d692021-05-05 22:27:00 -0700652 TEST(F32_VHSWISH__WASMSIMD_X16, inplace) {
Marat Dukhanc303fe62020-06-26 10:09:25 -0700653 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700654 VUnaryMicrokernelTester()
Marat Dukhanc303fe62020-06-26 10:09:25 -0700655 .batch_size(batch_size)
656 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800657 .Test(xnn_f32_vhswish_ukernel__wasmsimd_x16, xnn_init_f32_hswish_wasmsimd_params);
Marat Dukhanc303fe62020-06-26 10:09:25 -0700658 }
659 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800660#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanc303fe62020-06-26 10:09:25 -0700661
662
Marat Dukhan4c617792021-12-21 15:47:58 -0800663#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -0700664 TEST(F32_VHSWISH__WASM_X1, batch_eq_1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700665 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800666 .batch_size(1)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800667 .Test(xnn_f32_vhswish_ukernel__wasm_x1, xnn_init_f32_hswish_scalar_params);
Marat Dukhan436ebe62019-12-04 15:10:12 -0800668 }
669
Marat Dukhan6674d692021-05-05 22:27:00 -0700670 TEST(F32_VHSWISH__WASM_X1, batch_gt_1) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800671 for (size_t batch_size = 2; batch_size < 10; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700672 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800673 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800674 .Test(xnn_f32_vhswish_ukernel__wasm_x1, xnn_init_f32_hswish_scalar_params);
Marat Dukhan436ebe62019-12-04 15:10:12 -0800675 }
676 }
677
Marat Dukhan6674d692021-05-05 22:27:00 -0700678 TEST(F32_VHSWISH__WASM_X1, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800679 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700680 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800681 .batch_size(batch_size)
Marat Dukhan436ebe62019-12-04 15:10:12 -0800682 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800683 .Test(xnn_f32_vhswish_ukernel__wasm_x1, xnn_init_f32_hswish_scalar_params);
Marat Dukhan436ebe62019-12-04 15:10:12 -0800684 }
685 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800686#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan436ebe62019-12-04 15:10:12 -0800687
688
Marat Dukhan4c617792021-12-21 15:47:58 -0800689#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -0700690 TEST(F32_VHSWISH__WASM_X2, batch_eq_2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700691 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800692 .batch_size(2)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800693 .Test(xnn_f32_vhswish_ukernel__wasm_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800694 }
695
Marat Dukhan6674d692021-05-05 22:27:00 -0700696 TEST(F32_VHSWISH__WASM_X2, batch_div_2) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800697 for (size_t batch_size = 4; batch_size < 20; batch_size += 2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700698 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800699 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800700 .Test(xnn_f32_vhswish_ukernel__wasm_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800701 }
702 }
703
Marat Dukhan6674d692021-05-05 22:27:00 -0700704 TEST(F32_VHSWISH__WASM_X2, batch_lt_2) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800705 for (size_t batch_size = 1; batch_size < 2; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700706 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800707 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800708 .Test(xnn_f32_vhswish_ukernel__wasm_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800709 }
710 }
711
Marat Dukhan6674d692021-05-05 22:27:00 -0700712 TEST(F32_VHSWISH__WASM_X2, batch_gt_2) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800713 for (size_t batch_size = 3; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700714 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800715 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800716 .Test(xnn_f32_vhswish_ukernel__wasm_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800717 }
718 }
719
Marat Dukhan6674d692021-05-05 22:27:00 -0700720 TEST(F32_VHSWISH__WASM_X2, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800721 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700722 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800723 .batch_size(batch_size)
724 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800725 .Test(xnn_f32_vhswish_ukernel__wasm_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800726 }
727 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800728#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan662faa02019-12-09 22:48:16 -0800729
730
Marat Dukhan4c617792021-12-21 15:47:58 -0800731#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan6674d692021-05-05 22:27:00 -0700732 TEST(F32_VHSWISH__WASM_X4, batch_eq_4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700733 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800734 .batch_size(4)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800735 .Test(xnn_f32_vhswish_ukernel__wasm_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800736 }
737
Marat Dukhan6674d692021-05-05 22:27:00 -0700738 TEST(F32_VHSWISH__WASM_X4, batch_div_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800739 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700740 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800741 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800742 .Test(xnn_f32_vhswish_ukernel__wasm_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800743 }
744 }
745
Marat Dukhan6674d692021-05-05 22:27:00 -0700746 TEST(F32_VHSWISH__WASM_X4, batch_lt_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800747 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700748 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800749 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800750 .Test(xnn_f32_vhswish_ukernel__wasm_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800751 }
752 }
753
Marat Dukhan6674d692021-05-05 22:27:00 -0700754 TEST(F32_VHSWISH__WASM_X4, batch_gt_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800755 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700756 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800757 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800758 .Test(xnn_f32_vhswish_ukernel__wasm_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800759 }
760 }
761
Marat Dukhan6674d692021-05-05 22:27:00 -0700762 TEST(F32_VHSWISH__WASM_X4, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800763 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700764 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800765 .batch_size(batch_size)
766 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800767 .Test(xnn_f32_vhswish_ukernel__wasm_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800768 }
769 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800770#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan662faa02019-12-09 22:48:16 -0800771
772
Marat Dukhan6674d692021-05-05 22:27:00 -0700773TEST(F32_VHSWISH__SCALAR_X1, batch_eq_1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700774 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800775 .batch_size(1)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800776 .Test(xnn_f32_vhswish_ukernel__scalar_x1, xnn_init_f32_hswish_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700777}
778
Marat Dukhan6674d692021-05-05 22:27:00 -0700779TEST(F32_VHSWISH__SCALAR_X1, batch_gt_1) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800780 for (size_t batch_size = 2; batch_size < 10; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700781 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800782 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800783 .Test(xnn_f32_vhswish_ukernel__scalar_x1, xnn_init_f32_hswish_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700784 }
785}
786
Marat Dukhan6674d692021-05-05 22:27:00 -0700787TEST(F32_VHSWISH__SCALAR_X1, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800788 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700789 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800790 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700791 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800792 .Test(xnn_f32_vhswish_ukernel__scalar_x1, xnn_init_f32_hswish_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700793 }
794}
Marat Dukhan662faa02019-12-09 22:48:16 -0800795
Marat Dukhan949b6e72021-05-13 11:21:06 -0700796
Marat Dukhan6674d692021-05-05 22:27:00 -0700797TEST(F32_VHSWISH__SCALAR_X2, batch_eq_2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700798 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800799 .batch_size(2)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800800 .Test(xnn_f32_vhswish_ukernel__scalar_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800801}
802
Marat Dukhan6674d692021-05-05 22:27:00 -0700803TEST(F32_VHSWISH__SCALAR_X2, batch_div_2) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800804 for (size_t batch_size = 4; batch_size < 20; batch_size += 2) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700805 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800806 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800807 .Test(xnn_f32_vhswish_ukernel__scalar_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800808 }
809}
810
Marat Dukhan6674d692021-05-05 22:27:00 -0700811TEST(F32_VHSWISH__SCALAR_X2, batch_lt_2) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800812 for (size_t batch_size = 1; batch_size < 2; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700813 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800814 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800815 .Test(xnn_f32_vhswish_ukernel__scalar_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800816 }
817}
818
Marat Dukhan6674d692021-05-05 22:27:00 -0700819TEST(F32_VHSWISH__SCALAR_X2, batch_gt_2) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800820 for (size_t batch_size = 3; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700821 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800822 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800823 .Test(xnn_f32_vhswish_ukernel__scalar_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800824 }
825}
826
Marat Dukhan6674d692021-05-05 22:27:00 -0700827TEST(F32_VHSWISH__SCALAR_X2, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800828 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700829 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800830 .batch_size(batch_size)
831 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800832 .Test(xnn_f32_vhswish_ukernel__scalar_x2, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800833 }
834}
835
Marat Dukhan949b6e72021-05-13 11:21:06 -0700836
Marat Dukhan6674d692021-05-05 22:27:00 -0700837TEST(F32_VHSWISH__SCALAR_X4, batch_eq_4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700838 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800839 .batch_size(4)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800840 .Test(xnn_f32_vhswish_ukernel__scalar_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800841}
842
Marat Dukhan6674d692021-05-05 22:27:00 -0700843TEST(F32_VHSWISH__SCALAR_X4, batch_div_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800844 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700845 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800846 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800847 .Test(xnn_f32_vhswish_ukernel__scalar_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800848 }
849}
850
Marat Dukhan6674d692021-05-05 22:27:00 -0700851TEST(F32_VHSWISH__SCALAR_X4, batch_lt_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800852 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700853 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800854 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800855 .Test(xnn_f32_vhswish_ukernel__scalar_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800856 }
857}
858
Marat Dukhan6674d692021-05-05 22:27:00 -0700859TEST(F32_VHSWISH__SCALAR_X4, batch_gt_4) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800860 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700861 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800862 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800863 .Test(xnn_f32_vhswish_ukernel__scalar_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800864 }
865}
866
Marat Dukhan6674d692021-05-05 22:27:00 -0700867TEST(F32_VHSWISH__SCALAR_X4, inplace) {
Marat Dukhan662faa02019-12-09 22:48:16 -0800868 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhan87ed45c2021-05-13 12:25:22 -0700869 VUnaryMicrokernelTester()
Marat Dukhan662faa02019-12-09 22:48:16 -0800870 .batch_size(batch_size)
871 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800872 .Test(xnn_f32_vhswish_ukernel__scalar_x4, xnn_init_f32_hswish_scalar_params);
Marat Dukhan662faa02019-12-09 22:48:16 -0800873 }
Marat Dukhan949b6e72021-05-13 11:21:06 -0700874}