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XNNPACK Teamb455b122019-09-27 18:10:33 -07001// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004// Copyright 2020 Google LLC
XNNPACK Teamb455b122019-09-27 18:10:33 -07005//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
Marat Dukhan6ee435a2020-02-26 22:33:38 -08008//
9// Auto-generated file. Do not edit!
Marat Dukhan08b7a972020-07-14 18:17:29 -070010// Specification: test/qu8-avgpool-minmax.yaml
Marat Dukhan6ee435a2020-02-26 22:33:38 -080011// Generator: tools/generate-avgpool-test.py
12
XNNPACK Teamb455b122019-09-27 18:10:33 -070013
XNNPACK Teamb455b122019-09-27 18:10:33 -070014#include <gtest/gtest.h>
15
Marat Dukhan1dadbf72019-10-01 10:46:20 -070016#include <xnnpack/common.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070017#include <xnnpack/isa-checks.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070018
Marat Dukhan1dadbf72019-10-01 10:46:20 -070019#include <xnnpack/avgpool.h>
Marat Dukhan6ee435a2020-02-26 22:33:38 -080020#include <xnnpack/pavgpool.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070021#include "avgpool-microkernel-tester.h"
22
23
Marat Dukhan1dadbf72019-10-01 10:46:20 -070024#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Marat Dukhan08b7a972020-07-14 18:17:29 -070025 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070026 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -080027 AvgPoolMicrokernelTester()
28 .pooling_elements(17)
29 .pooling_tile(9, 8)
30 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -080031 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -080032 }
33
Marat Dukhan08b7a972020-07-14 18:17:29 -070034 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -080035 TEST_REQUIRES_ARM_NEON;
36 AvgPoolMicrokernelTester()
37 .pooling_elements(17)
38 .pooling_tile(9, 8)
39 .channels(8)
40 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -080041 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -080042 }
43
Marat Dukhan08b7a972020-07-14 18:17:29 -070044 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -080045 TEST_REQUIRES_ARM_NEON;
46 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
47 AvgPoolMicrokernelTester()
48 .pooling_elements(17)
49 .pooling_tile(9, 8)
50 .channels(8)
51 .input_offset(11)
52 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -080053 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -080054 }
55 }
56
Marat Dukhan08b7a972020-07-14 18:17:29 -070057 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -080058 TEST_REQUIRES_ARM_NEON;
59 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
60 AvgPoolMicrokernelTester()
61 .pooling_elements(17)
62 .pooling_tile(9, 8)
63 .channels(8)
64 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -080065 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070066 }
67 }
68
Marat Dukhan08b7a972020-07-14 18:17:29 -070069 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070070 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -080071 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
72 AvgPoolMicrokernelTester()
73 .pooling_elements(17)
74 .pooling_tile(9, 8)
75 .channels(8)
76 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -080077 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070078 }
79 }
80
Marat Dukhan08b7a972020-07-14 18:17:29 -070081 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070082 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -080083 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
84 AvgPoolMicrokernelTester()
85 .pooling_elements(17)
86 .pooling_tile(9, 8)
87 .channels(8)
88 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -080089 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070090 }
91 }
92
Marat Dukhan08b7a972020-07-14 18:17:29 -070093 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070094 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -080095 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
96 AvgPoolMicrokernelTester()
97 .pooling_elements(17)
98 .pooling_tile(9, 8)
99 .channels(8)
100 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800101 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700102 }
103 }
104
Marat Dukhan08b7a972020-07-14 18:17:29 -0700105 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700106 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800107 AvgPoolMicrokernelTester()
108 .pooling_elements(17)
109 .pooling_tile(9, 8)
110 .channels(8)
111 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800112 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800113 }
114
Marat Dukhan08b7a972020-07-14 18:17:29 -0700115 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800116 TEST_REQUIRES_ARM_NEON;
117 AvgPoolMicrokernelTester()
118 .pooling_elements(17)
119 .pooling_tile(9, 8)
120 .channels(8)
121 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800122 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800123 }
124
Marat Dukhan08b7a972020-07-14 18:17:29 -0700125 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800126 TEST_REQUIRES_ARM_NEON;
127 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
128 AvgPoolMicrokernelTester()
129 .pooling_elements(pooling_elements)
130 .pooling_tile(9, 8)
131 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800132 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700133 }
134 }
135
Marat Dukhan08b7a972020-07-14 18:17:29 -0700136 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_subtile_with_input_offset) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700137 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800138 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
139 AvgPoolMicrokernelTester()
140 .pooling_elements(pooling_elements)
141 .pooling_tile(9, 8)
142 .channels(8)
143 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800144 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700145 }
146 }
147
Marat Dukhan08b7a972020-07-14 18:17:29 -0700148 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800149 TEST_REQUIRES_ARM_NEON;
150 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
151 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
152 AvgPoolMicrokernelTester()
153 .pooling_elements(pooling_elements)
154 .pooling_tile(9, 8)
155 .channels(8)
156 .input_offset(11)
157 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800158 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800159 }
160 }
161 }
162
Marat Dukhan08b7a972020-07-14 18:17:29 -0700163 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700164 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800165 for (size_t channels = 16; channels < 64; channels += 8) {
166 AvgPoolMicrokernelTester()
167 .pooling_elements(17)
168 .pooling_tile(9, 8)
169 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800170 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700171 }
172 }
173
Marat Dukhan08b7a972020-07-14 18:17:29 -0700174 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile_with_input_offset) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700175 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800176 for (size_t channels = 16; channels < 64; channels += 8) {
177 AvgPoolMicrokernelTester()
178 .pooling_elements(17)
179 .pooling_tile(9, 8)
180 .channels(channels)
181 .input_offset(41)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800182 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700183 }
184 }
185
Marat Dukhan08b7a972020-07-14 18:17:29 -0700186 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800187 TEST_REQUIRES_ARM_NEON;
188 for (size_t channels = 16; channels < 64; channels += 8) {
189 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
190 AvgPoolMicrokernelTester()
191 .pooling_elements(17)
192 .pooling_tile(9, 8)
193 .channels(channels)
194 .input_offset(41)
195 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800196 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800197 }
198 }
199 }
200
Marat Dukhan08b7a972020-07-14 18:17:29 -0700201 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700202 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800203 for (size_t channels = 16; channels < 64; channels += 8) {
204 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700205 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800206 .pooling_elements(17)
207 .pooling_tile(9, 8)
208 .channels(channels)
209 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800210 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700211 }
212 }
213 }
214
Marat Dukhan08b7a972020-07-14 18:17:29 -0700215 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700216 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800217 for (size_t channels = 16; channels < 64; channels += 8) {
218 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700219 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800220 .pooling_elements(17)
221 .pooling_tile(9, 8)
222 .channels(channels)
223 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800224 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800225 }
226 }
227 }
228
Marat Dukhan08b7a972020-07-14 18:17:29 -0700229 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800230 TEST_REQUIRES_ARM_NEON;
231 for (size_t channels = 16; channels < 64; channels += 8) {
232 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
233 AvgPoolMicrokernelTester()
234 .pooling_elements(17)
235 .pooling_tile(9, 8)
236 .channels(channels)
237 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800238 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800239 }
240 }
241 }
242
Marat Dukhan08b7a972020-07-14 18:17:29 -0700243 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800244 TEST_REQUIRES_ARM_NEON;
245 for (size_t channels = 16; channels < 64; channels += 8) {
246 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
247 AvgPoolMicrokernelTester()
248 .pooling_elements(17)
249 .pooling_tile(9, 8)
250 .channels(channels)
251 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800252 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800253 }
254 }
255 }
256
Marat Dukhan08b7a972020-07-14 18:17:29 -0700257 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800258 TEST_REQUIRES_ARM_NEON;
259 for (size_t channels = 16; channels < 64; channels += 8) {
260 AvgPoolMicrokernelTester()
261 .pooling_elements(17)
262 .pooling_tile(9, 8)
263 .channels(channels)
264 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800265 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800266 }
267 }
268
Marat Dukhan08b7a972020-07-14 18:17:29 -0700269 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800270 TEST_REQUIRES_ARM_NEON;
271 for (size_t channels = 16; channels < 64; channels += 8) {
272 AvgPoolMicrokernelTester()
273 .pooling_elements(17)
274 .pooling_tile(9, 8)
275 .channels(channels)
276 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800277 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800278 }
279 }
280
Marat Dukhan08b7a972020-07-14 18:17:29 -0700281 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800282 TEST_REQUIRES_ARM_NEON;
283 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
284 for (size_t channels = 16; channels < 64; channels += 8) {
285 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800286 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800287 .pooling_tile(9, 8)
288 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800289 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800290 }
291 }
292 }
293
Marat Dukhan08b7a972020-07-14 18:17:29 -0700294 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800295 TEST_REQUIRES_ARM_NEON;
296 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
297 for (size_t channels = 16; channels < 64; channels += 8) {
298 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800299 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800300 .pooling_tile(9, 8)
301 .channels(channels)
302 .input_offset(67)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800303 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800304 }
305 }
306 }
307
Marat Dukhan08b7a972020-07-14 18:17:29 -0700308 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800309 TEST_REQUIRES_ARM_NEON;
310 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
311 for (size_t channels = 16; channels < 64; channels += 8) {
312 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
313 AvgPoolMicrokernelTester()
314 .pooling_elements(pooling_elements)
315 .pooling_tile(9, 8)
316 .channels(channels)
317 .input_offset(67)
318 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800319 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800320 }
321 }
322 }
323 }
324
Marat Dukhan08b7a972020-07-14 18:17:29 -0700325 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800326 TEST_REQUIRES_ARM_NEON;
327 for (size_t channels = 1; channels < 8; channels++) {
328 AvgPoolMicrokernelTester()
329 .pooling_elements(17)
330 .pooling_tile(9, 8)
331 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800332 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800333 }
334 }
335
Marat Dukhan08b7a972020-07-14 18:17:29 -0700336 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800337 TEST_REQUIRES_ARM_NEON;
338 for (size_t channels = 1; channels < 8; channels++) {
339 AvgPoolMicrokernelTester()
340 .pooling_elements(17)
341 .pooling_tile(9, 8)
342 .channels(channels)
343 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800344 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800345 }
346 }
347
Marat Dukhan08b7a972020-07-14 18:17:29 -0700348 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile_with_zero_index) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800349 TEST_REQUIRES_ARM_NEON;
350 for (size_t channels = 1; channels < 8; channels++) {
351 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
352 AvgPoolMicrokernelTester()
353 .pooling_elements(17)
354 .pooling_tile(9, 8)
355 .channels(channels)
356 .input_offset(11)
357 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800358 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800359 }
360 }
361 }
362
Marat Dukhan08b7a972020-07-14 18:17:29 -0700363 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800364 TEST_REQUIRES_ARM_NEON;
365 for (size_t channels = 1; channels < 8; channels++) {
366 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
367 AvgPoolMicrokernelTester()
368 .pooling_elements(17)
369 .pooling_tile(9, 8)
370 .channels(channels)
371 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800372 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800373 }
374 }
375 }
376
Marat Dukhan08b7a972020-07-14 18:17:29 -0700377 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800378 TEST_REQUIRES_ARM_NEON;
379 for (size_t channels = 1; channels < 8; channels++) {
380 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
381 AvgPoolMicrokernelTester()
382 .pooling_elements(17)
383 .pooling_tile(9, 8)
384 .channels(channels)
385 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800386 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800387 }
388 }
389 }
390
Marat Dukhan08b7a972020-07-14 18:17:29 -0700391 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800392 TEST_REQUIRES_ARM_NEON;
393 for (size_t channels = 1; channels < 8; channels++) {
394 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
395 AvgPoolMicrokernelTester()
396 .pooling_elements(17)
397 .pooling_tile(9, 8)
398 .channels(channels)
399 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800400 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800401 }
402 }
403 }
404
Marat Dukhan08b7a972020-07-14 18:17:29 -0700405 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800406 TEST_REQUIRES_ARM_NEON;
407 for (size_t channels = 1; channels < 8; channels++) {
408 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
409 AvgPoolMicrokernelTester()
410 .pooling_elements(17)
411 .pooling_tile(9, 8)
412 .channels(channels)
413 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800414 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800415 }
416 }
417 }
418
Marat Dukhan08b7a972020-07-14 18:17:29 -0700419 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800420 TEST_REQUIRES_ARM_NEON;
421 for (size_t channels = 1; channels < 8; channels++) {
422 AvgPoolMicrokernelTester()
423 .pooling_elements(17)
424 .pooling_tile(9, 8)
425 .channels(channels)
426 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800427 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800428 }
429 }
430
Marat Dukhan08b7a972020-07-14 18:17:29 -0700431 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800432 TEST_REQUIRES_ARM_NEON;
433 for (size_t channels = 1; channels < 8; channels++) {
434 AvgPoolMicrokernelTester()
435 .pooling_elements(17)
436 .pooling_tile(9, 8)
437 .channels(channels)
438 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800439 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800440 }
441 }
442
Marat Dukhan08b7a972020-07-14 18:17:29 -0700443 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800444 TEST_REQUIRES_ARM_NEON;
445 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
446 for (size_t channels = 1; channels < 8; channels++) {
447 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800448 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800449 .pooling_tile(9, 8)
450 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800451 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800452 }
453 }
454 }
455
Marat Dukhan08b7a972020-07-14 18:17:29 -0700456 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800457 TEST_REQUIRES_ARM_NEON;
458 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
459 for (size_t channels = 1; channels < 8; channels++) {
460 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800461 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800462 .pooling_tile(9, 8)
463 .channels(channels)
464 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800465 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800466 }
467 }
468 }
469
Marat Dukhan08b7a972020-07-14 18:17:29 -0700470 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800471 TEST_REQUIRES_ARM_NEON;
472 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
473 for (size_t channels = 1; channels < 8; channels++) {
474 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
475 AvgPoolMicrokernelTester()
476 .pooling_elements(pooling_elements)
477 .pooling_tile(9, 8)
478 .channels(channels)
479 .input_offset(11)
480 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800481 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800482 }
483 }
484 }
485 }
486
Marat Dukhan08b7a972020-07-14 18:17:29 -0700487 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800488 TEST_REQUIRES_ARM_NEON;
489 for (size_t channels = 9; channels < 16; channels++) {
490 AvgPoolMicrokernelTester()
491 .pooling_elements(17)
492 .pooling_tile(9, 8)
493 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800494 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800495 }
496 }
497
Marat Dukhan08b7a972020-07-14 18:17:29 -0700498 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800499 TEST_REQUIRES_ARM_NEON;
500 for (size_t channels = 9; channels < 16; channels++) {
501 AvgPoolMicrokernelTester()
502 .pooling_elements(17)
503 .pooling_tile(9, 8)
504 .channels(channels)
505 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800506 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800507 }
508 }
509
Marat Dukhan08b7a972020-07-14 18:17:29 -0700510 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800511 TEST_REQUIRES_ARM_NEON;
512 for (size_t channels = 9; channels < 16; channels++) {
513 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
514 AvgPoolMicrokernelTester()
515 .pooling_elements(17)
516 .pooling_tile(9, 8)
517 .channels(channels)
518 .input_offset(17)
519 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800520 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800521 }
522 }
523 }
524
Marat Dukhan08b7a972020-07-14 18:17:29 -0700525 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800526 TEST_REQUIRES_ARM_NEON;
527 for (size_t channels = 9; channels < 16; channels++) {
528 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
529 AvgPoolMicrokernelTester()
530 .pooling_elements(17)
531 .pooling_tile(9, 8)
532 .channels(channels)
533 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800534 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800535 }
536 }
537 }
538
Marat Dukhan08b7a972020-07-14 18:17:29 -0700539 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800540 TEST_REQUIRES_ARM_NEON;
541 for (size_t channels = 9; channels < 16; channels++) {
542 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
543 AvgPoolMicrokernelTester()
544 .pooling_elements(17)
545 .pooling_tile(9, 8)
546 .channels(channels)
547 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800548 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800549 }
550 }
551 }
552
Marat Dukhan08b7a972020-07-14 18:17:29 -0700553 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800554 TEST_REQUIRES_ARM_NEON;
555 for (size_t channels = 9; channels < 16; channels++) {
556 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
557 AvgPoolMicrokernelTester()
558 .pooling_elements(17)
559 .pooling_tile(9, 8)
560 .channels(channels)
561 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800562 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800563 }
564 }
565 }
566
Marat Dukhan08b7a972020-07-14 18:17:29 -0700567 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800568 TEST_REQUIRES_ARM_NEON;
569 for (size_t channels = 9; channels < 16; channels++) {
570 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
571 AvgPoolMicrokernelTester()
572 .pooling_elements(17)
573 .pooling_tile(9, 8)
574 .channels(channels)
575 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800576 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800577 }
578 }
579 }
580
Marat Dukhan08b7a972020-07-14 18:17:29 -0700581 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800582 TEST_REQUIRES_ARM_NEON;
583 for (size_t channels = 9; channels < 16; channels++) {
584 AvgPoolMicrokernelTester()
585 .pooling_elements(17)
586 .pooling_tile(9, 8)
587 .channels(channels)
588 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800589 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800590 }
591 }
592
Marat Dukhan08b7a972020-07-14 18:17:29 -0700593 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800594 TEST_REQUIRES_ARM_NEON;
595 for (size_t channels = 9; channels < 16; channels++) {
596 AvgPoolMicrokernelTester()
597 .pooling_elements(17)
598 .pooling_tile(9, 8)
599 .channels(channels)
600 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800601 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800602 }
603 }
604
Marat Dukhan08b7a972020-07-14 18:17:29 -0700605 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800606 TEST_REQUIRES_ARM_NEON;
607 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
608 for (size_t channels = 9; channels < 16; channels++) {
609 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800610 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800611 .pooling_tile(9, 8)
612 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800613 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800614 }
615 }
616 }
617
Marat Dukhan08b7a972020-07-14 18:17:29 -0700618 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800619 TEST_REQUIRES_ARM_NEON;
620 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
621 for (size_t channels = 9; channels < 16; channels++) {
622 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800623 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800624 .pooling_tile(9, 8)
625 .channels(channels)
626 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800627 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800628 }
629 }
630 }
631
Marat Dukhan08b7a972020-07-14 18:17:29 -0700632 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800633 TEST_REQUIRES_ARM_NEON;
634 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
635 for (size_t channels = 9; channels < 16; channels++) {
636 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
637 AvgPoolMicrokernelTester()
638 .pooling_elements(pooling_elements)
639 .pooling_tile(9, 8)
640 .channels(channels)
641 .input_offset(17)
642 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800643 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800644 }
645 }
646 }
647 }
648
Marat Dukhan08b7a972020-07-14 18:17:29 -0700649 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800650 TEST_REQUIRES_ARM_NEON;
651 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
652 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800653 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800654 .pooling_tile(9, 8)
655 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800656 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800657 }
658 }
659
Marat Dukhan08b7a972020-07-14 18:17:29 -0700660 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800661 TEST_REQUIRES_ARM_NEON;
662 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
663 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800664 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800665 .pooling_tile(9, 8)
666 .channels(8)
667 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800668 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800669 }
670 }
671
Marat Dukhan08b7a972020-07-14 18:17:29 -0700672 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800673 TEST_REQUIRES_ARM_NEON;
674 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
675 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
676 AvgPoolMicrokernelTester()
677 .pooling_elements(pooling_elements)
678 .pooling_tile(9, 8)
679 .channels(8)
680 .input_offset(11)
681 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800682 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800683 }
684 }
685 }
686
Marat Dukhan08b7a972020-07-14 18:17:29 -0700687 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800688 TEST_REQUIRES_ARM_NEON;
689 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
690 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
691 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800692 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800693 .pooling_tile(9, 8)
694 .channels(8)
695 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800696 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800697 }
698 }
699 }
700
Marat Dukhan08b7a972020-07-14 18:17:29 -0700701 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800702 TEST_REQUIRES_ARM_NEON;
703 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
704 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
705 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800706 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800707 .pooling_tile(9, 8)
708 .channels(8)
709 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800710 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800711 }
712 }
713 }
714
Marat Dukhan08b7a972020-07-14 18:17:29 -0700715 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800716 TEST_REQUIRES_ARM_NEON;
717 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
718 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
719 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800720 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800721 .pooling_tile(9, 8)
722 .channels(8)
723 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800724 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800725 }
726 }
727 }
728
Marat Dukhan08b7a972020-07-14 18:17:29 -0700729 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800730 TEST_REQUIRES_ARM_NEON;
731 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
732 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
733 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800734 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800735 .pooling_tile(9, 8)
736 .channels(8)
737 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800738 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800739 }
740 }
741 }
742
Marat Dukhan08b7a972020-07-14 18:17:29 -0700743 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800744 TEST_REQUIRES_ARM_NEON;
745 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
746 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800747 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800748 .pooling_tile(9, 8)
749 .channels(8)
750 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800751 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800752 }
753 }
754
Marat Dukhan08b7a972020-07-14 18:17:29 -0700755 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_eq_8_multipass_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800756 TEST_REQUIRES_ARM_NEON;
757 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
758 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800759 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800760 .pooling_tile(9, 8)
761 .channels(8)
762 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800763 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800764 }
765 }
766
Marat Dukhan08b7a972020-07-14 18:17:29 -0700767 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800768 TEST_REQUIRES_ARM_NEON;
769 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
770 for (size_t channels = 16; channels < 64; channels += 8) {
771 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800772 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800773 .pooling_tile(9, 8)
774 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800775 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800776 }
777 }
778 }
779
Marat Dukhan08b7a972020-07-14 18:17:29 -0700780 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800781 TEST_REQUIRES_ARM_NEON;
782 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
783 for (size_t channels = 16; channels < 64; channels += 8) {
784 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800785 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800786 .pooling_tile(9, 8)
787 .channels(channels)
788 .input_offset(67)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800789 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800790 }
791 }
792 }
793
Marat Dukhan08b7a972020-07-14 18:17:29 -0700794 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800795 TEST_REQUIRES_ARM_NEON;
796 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
797 for (size_t channels = 16; channels < 64; channels += 8) {
798 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
799 AvgPoolMicrokernelTester()
800 .pooling_elements(pooling_elements)
801 .pooling_tile(9, 8)
802 .channels(channels)
803 .input_offset(67)
804 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800805 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800806 }
807 }
808 }
809 }
810
Marat Dukhan08b7a972020-07-14 18:17:29 -0700811 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800812 TEST_REQUIRES_ARM_NEON;
813 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
814 for (size_t channels = 16; channels < 64; channels += 8) {
815 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
816 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800817 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800818 .pooling_tile(9, 8)
819 .channels(channels)
820 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800821 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800822 }
823 }
824 }
825 }
826
Marat Dukhan08b7a972020-07-14 18:17:29 -0700827 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800828 TEST_REQUIRES_ARM_NEON;
829 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
830 for (size_t channels = 16; channels < 64; channels += 8) {
831 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
832 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800833 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800834 .pooling_tile(9, 8)
835 .channels(channels)
836 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800837 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800838 }
839 }
840 }
841 }
842
Marat Dukhan08b7a972020-07-14 18:17:29 -0700843 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800844 TEST_REQUIRES_ARM_NEON;
845 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
846 for (size_t channels = 16; channels < 64; channels += 8) {
847 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
848 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800849 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800850 .pooling_tile(9, 8)
851 .channels(channels)
852 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800853 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800854 }
855 }
856 }
857 }
858
Marat Dukhan08b7a972020-07-14 18:17:29 -0700859 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800860 TEST_REQUIRES_ARM_NEON;
861 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
862 for (size_t channels = 16; channels < 64; channels += 8) {
863 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
864 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800865 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800866 .pooling_tile(9, 8)
867 .channels(channels)
868 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800869 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800870 }
871 }
872 }
873 }
874
Marat Dukhan08b7a972020-07-14 18:17:29 -0700875 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800876 TEST_REQUIRES_ARM_NEON;
877 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
878 for (size_t channels = 16; channels < 64; channels += 8) {
879 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800880 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800881 .pooling_tile(9, 8)
882 .channels(channels)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700883 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800884 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700885 }
886 }
887 }
888
Marat Dukhan08b7a972020-07-14 18:17:29 -0700889 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_div_8_multipass_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700890 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800891 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
892 for (size_t channels = 16; channels < 64; channels += 8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700893 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800894 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800895 .pooling_tile(9, 8)
896 .channels(channels)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700897 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800898 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700899 }
900 }
901 }
902
Marat Dukhan08b7a972020-07-14 18:17:29 -0700903 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700904 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800905 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
906 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700907 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800908 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800909 .pooling_tile(9, 8)
910 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800911 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800912 }
913 }
914 }
915
Marat Dukhan08b7a972020-07-14 18:17:29 -0700916 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800917 TEST_REQUIRES_ARM_NEON;
918 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
919 for (size_t channels = 1; channels < 8; channels++) {
920 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800921 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800922 .pooling_tile(9, 8)
923 .channels(channels)
924 .input_offset(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800925 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800926 }
927 }
928 }
929
Marat Dukhan08b7a972020-07-14 18:17:29 -0700930 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800931 TEST_REQUIRES_ARM_NEON;
932 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
933 for (size_t channels = 1; channels < 8; channels++) {
934 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
935 AvgPoolMicrokernelTester()
936 .pooling_elements(pooling_elements)
937 .pooling_tile(9, 8)
938 .channels(channels)
939 .input_offset(8)
940 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800941 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800942 }
943 }
944 }
945 }
946
Marat Dukhan08b7a972020-07-14 18:17:29 -0700947 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800948 TEST_REQUIRES_ARM_NEON;
949 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
950 for (size_t channels = 1; channels < 8; channels++) {
951 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
952 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800953 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800954 .pooling_tile(9, 8)
955 .channels(channels)
956 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800957 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800958 }
959 }
960 }
961 }
962
Marat Dukhan08b7a972020-07-14 18:17:29 -0700963 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800964 TEST_REQUIRES_ARM_NEON;
965 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
966 for (size_t channels = 1; channels < 8; channels++) {
967 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
968 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800969 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800970 .pooling_tile(9, 8)
971 .channels(channels)
972 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800973 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800974 }
975 }
976 }
977 }
978
Marat Dukhan08b7a972020-07-14 18:17:29 -0700979 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800980 TEST_REQUIRES_ARM_NEON;
981 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
982 for (size_t channels = 1; channels < 8; channels++) {
983 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
984 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -0800985 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800986 .pooling_tile(9, 8)
987 .channels(channels)
988 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -0800989 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800990 }
991 }
992 }
993 }
994
Marat Dukhan08b7a972020-07-14 18:17:29 -0700995 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -0800996 TEST_REQUIRES_ARM_NEON;
997 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
998 for (size_t channels = 1; channels < 8; channels++) {
999 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1000 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001001 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001002 .pooling_tile(9, 8)
1003 .channels(channels)
1004 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001005 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001006 }
1007 }
1008 }
1009 }
1010
Marat Dukhan08b7a972020-07-14 18:17:29 -07001011 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001012 TEST_REQUIRES_ARM_NEON;
1013 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1014 for (size_t channels = 1; channels < 8; channels++) {
1015 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001016 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001017 .pooling_tile(9, 8)
1018 .channels(channels)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001019 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001020 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001021 }
1022 }
1023 }
1024
Marat Dukhan08b7a972020-07-14 18:17:29 -07001025 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_lt_8_multipass_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001026 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001027 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1028 for (size_t channels = 1; channels < 8; channels++) {
1029 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001030 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001031 .pooling_tile(9, 8)
1032 .channels(channels)
1033 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001034 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001035 }
1036 }
1037 }
1038
Marat Dukhan08b7a972020-07-14 18:17:29 -07001039 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001040 TEST_REQUIRES_ARM_NEON;
1041 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1042 for (size_t channels = 9; channels < 16; channels++) {
1043 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001044 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001045 .pooling_tile(9, 8)
1046 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001047 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001048 }
1049 }
1050 }
1051
Marat Dukhan08b7a972020-07-14 18:17:29 -07001052 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001053 TEST_REQUIRES_ARM_NEON;
1054 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1055 for (size_t channels = 9; channels < 16; channels++) {
1056 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001057 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001058 .pooling_tile(9, 8)
1059 .channels(channels)
1060 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001061 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001062 }
1063 }
1064 }
1065
Marat Dukhan08b7a972020-07-14 18:17:29 -07001066 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001067 TEST_REQUIRES_ARM_NEON;
1068 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1069 for (size_t channels = 9; channels < 16; channels++) {
1070 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
1071 AvgPoolMicrokernelTester()
1072 .pooling_elements(pooling_elements)
1073 .pooling_tile(9, 8)
1074 .channels(channels)
1075 .input_offset(17)
1076 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001077 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001078 }
1079 }
1080 }
1081 }
1082
Marat Dukhan08b7a972020-07-14 18:17:29 -07001083 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001084 TEST_REQUIRES_ARM_NEON;
1085 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1086 for (size_t channels = 9; channels < 16; channels++) {
1087 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001088 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001089 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001090 .pooling_tile(9, 8)
1091 .channels(channels)
1092 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001093 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001094 }
1095 }
1096 }
1097 }
1098
Marat Dukhan08b7a972020-07-14 18:17:29 -07001099 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001100 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001101 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1102 for (size_t channels = 9; channels < 16; channels++) {
1103 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001104 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001105 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001106 .pooling_tile(9, 8)
1107 .channels(channels)
1108 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001109 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001110 }
1111 }
1112 }
1113 }
1114
Marat Dukhan08b7a972020-07-14 18:17:29 -07001115 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001116 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001117 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1118 for (size_t channels = 9; channels < 16; channels++) {
1119 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001120 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001121 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001122 .pooling_tile(9, 8)
1123 .channels(channels)
1124 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001125 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001126 }
1127 }
1128 }
1129 }
1130
Marat Dukhan08b7a972020-07-14 18:17:29 -07001131 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001132 TEST_REQUIRES_ARM_NEON;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001133 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1134 for (size_t channels = 9; channels < 16; channels++) {
1135 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1136 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001137 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001138 .pooling_tile(9, 8)
1139 .channels(channels)
1140 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001141 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001142 }
1143 }
1144 }
1145 }
1146
Marat Dukhan08b7a972020-07-14 18:17:29 -07001147 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001148 TEST_REQUIRES_ARM_NEON;
1149 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1150 for (size_t channels = 9; channels < 16; channels++) {
1151 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001152 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001153 .pooling_tile(9, 8)
1154 .channels(channels)
1155 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001156 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001157 }
1158 }
1159 }
1160
Marat Dukhan08b7a972020-07-14 18:17:29 -07001161 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, channels_gt_8_multipass_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001162 TEST_REQUIRES_ARM_NEON;
1163 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
1164 for (size_t channels = 9; channels < 16; channels++) {
1165 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001166 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001167 .pooling_tile(9, 8)
1168 .channels(channels)
1169 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001170 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001171 }
1172 }
1173 }
1174
Marat Dukhan08b7a972020-07-14 18:17:29 -07001175 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001176 TEST_REQUIRES_ARM_NEON;
1177 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1178 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1179 for (size_t channels = 1; channels <= 40; channels += 7) {
1180 AvgPoolMicrokernelTester()
1181 .output_pixels(output_pixels)
1182 .pooling_elements(pooling_elements)
1183 .pooling_tile(9, 8)
1184 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001185 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001186 }
1187 }
1188 }
1189 }
1190
Marat Dukhan08b7a972020-07-14 18:17:29 -07001191 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001192 TEST_REQUIRES_ARM_NEON;
1193 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1194 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1195 for (size_t channels = 1; channels <= 40; channels += 7) {
1196 AvgPoolMicrokernelTester()
1197 .output_pixels(output_pixels)
1198 .pooling_elements(pooling_elements)
1199 .pooling_tile(9, 8)
1200 .channels(channels)
1201 .input_offset(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001202 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001203 }
1204 }
1205 }
1206 }
1207
Marat Dukhan08b7a972020-07-14 18:17:29 -07001208 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001209 TEST_REQUIRES_ARM_NEON;
1210 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1211 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1212 for (size_t channels = 1; channels <= 40; channels += 7) {
1213 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
1214 AvgPoolMicrokernelTester()
1215 .output_pixels(output_pixels)
1216 .pooling_elements(pooling_elements)
1217 .pooling_tile(9, 8)
1218 .channels(channels)
1219 .input_offset(43)
1220 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001221 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001222 }
1223 }
1224 }
1225 }
1226 }
1227
Marat Dukhan08b7a972020-07-14 18:17:29 -07001228 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001229 TEST_REQUIRES_ARM_NEON;
1230 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1231 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1232 for (size_t channels = 1; channels <= 40; channels += 7) {
1233 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001234 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001235 .output_pixels(output_pixels)
1236 .pooling_elements(pooling_elements)
1237 .pooling_tile(9, 8)
1238 .channels(channels)
1239 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001240 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001241 }
1242 }
1243 }
1244 }
1245 }
1246
Marat Dukhan08b7a972020-07-14 18:17:29 -07001247 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001248 TEST_REQUIRES_ARM_NEON;
1249 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1250 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1251 for (size_t channels = 1; channels <= 40; channels += 7) {
1252 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1253 AvgPoolMicrokernelTester()
1254 .output_pixels(output_pixels)
1255 .pooling_elements(pooling_elements)
1256 .pooling_tile(9, 8)
1257 .channels(channels)
1258 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001259 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001260 }
1261 }
1262 }
1263 }
1264 }
1265
Marat Dukhan08b7a972020-07-14 18:17:29 -07001266 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001267 TEST_REQUIRES_ARM_NEON;
1268 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1269 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1270 for (size_t channels = 1; channels <= 40; channels += 7) {
1271 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
1272 AvgPoolMicrokernelTester()
1273 .output_pixels(output_pixels)
1274 .pooling_elements(pooling_elements)
1275 .pooling_tile(9, 8)
1276 .channels(channels)
1277 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001278 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001279 }
1280 }
1281 }
1282 }
1283 }
1284
Marat Dukhan08b7a972020-07-14 18:17:29 -07001285 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001286 TEST_REQUIRES_ARM_NEON;
1287 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1288 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1289 for (size_t channels = 1; channels <= 40; channels += 7) {
1290 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1291 AvgPoolMicrokernelTester()
1292 .output_pixels(output_pixels)
1293 .pooling_elements(pooling_elements)
1294 .pooling_tile(9, 8)
1295 .channels(channels)
1296 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001297 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001298 }
1299 }
1300 }
1301 }
1302 }
1303
Marat Dukhan08b7a972020-07-14 18:17:29 -07001304 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001305 TEST_REQUIRES_ARM_NEON;
1306 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1307 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1308 for (size_t channels = 1; channels <= 40; channels += 7) {
1309 AvgPoolMicrokernelTester()
1310 .output_pixels(output_pixels)
1311 .pooling_elements(pooling_elements)
1312 .pooling_tile(9, 8)
1313 .channels(channels)
1314 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001315 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001316 }
1317 }
1318 }
1319 }
1320
Marat Dukhan08b7a972020-07-14 18:17:29 -07001321 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001322 TEST_REQUIRES_ARM_NEON;
1323 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1324 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1325 for (size_t channels = 1; channels <= 40; channels += 7) {
1326 AvgPoolMicrokernelTester()
1327 .output_pixels(output_pixels)
1328 .pooling_elements(pooling_elements)
1329 .pooling_tile(9, 8)
1330 .channels(channels)
1331 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001332 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001333 }
1334 }
1335 }
1336 }
1337
Marat Dukhan08b7a972020-07-14 18:17:29 -07001338 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_output_stride) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001339 TEST_REQUIRES_ARM_NEON;
1340 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1341 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1342 for (size_t channels = 1; channels <= 40; channels += 7) {
1343 AvgPoolMicrokernelTester()
1344 .output_pixels(output_pixels)
1345 .pooling_elements(pooling_elements)
1346 .pooling_tile(9, 8)
1347 .channels(channels)
1348 .output_stride(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001349 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001350 }
1351 }
1352 }
1353 }
1354
Marat Dukhan08b7a972020-07-14 18:17:29 -07001355 TEST(QU8_AVGPOOL_MINMAX_9P8X__NEON_C8, few_output_pixels_with_step) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001356 TEST_REQUIRES_ARM_NEON;
1357 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
1358 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
1359 for (size_t channels = 1; channels <= 40; channels += 7) {
1360 for (size_t step = 2; step <= pooling_elements; step++) {
1361 AvgPoolMicrokernelTester()
1362 .output_pixels(output_pixels)
1363 .pooling_elements(pooling_elements)
1364 .pooling_tile(9, 8)
1365 .step(step)
1366 .channels(channels)
1367 .output_stride(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001368 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001369 }
1370 }
1371 }
1372 }
1373 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -07001374#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
XNNPACK Teamb455b122019-09-27 18:10:33 -07001375
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001376
Marat Dukhan1dadbf72019-10-01 10:46:20 -07001377#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan08b7a972020-07-14 18:17:29 -07001378 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001379 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001380 AvgPoolMicrokernelTester()
1381 .pooling_elements(17)
1382 .pooling_tile(9, 8)
1383 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001384 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001385 }
1386
Marat Dukhan08b7a972020-07-14 18:17:29 -07001387 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001388 TEST_REQUIRES_X86_SSE2;
1389 AvgPoolMicrokernelTester()
1390 .pooling_elements(17)
1391 .pooling_tile(9, 8)
1392 .channels(8)
1393 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001394 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001395 }
1396
Marat Dukhan08b7a972020-07-14 18:17:29 -07001397 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001398 TEST_REQUIRES_X86_SSE2;
1399 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
1400 AvgPoolMicrokernelTester()
1401 .pooling_elements(17)
1402 .pooling_tile(9, 8)
1403 .channels(8)
1404 .input_offset(11)
1405 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001406 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001407 }
1408 }
1409
Marat Dukhan08b7a972020-07-14 18:17:29 -07001410 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001411 TEST_REQUIRES_X86_SSE2;
1412 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
1413 AvgPoolMicrokernelTester()
1414 .pooling_elements(17)
1415 .pooling_tile(9, 8)
1416 .channels(8)
1417 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001418 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001419 }
1420 }
1421
Marat Dukhan08b7a972020-07-14 18:17:29 -07001422 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001423 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001424 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1425 AvgPoolMicrokernelTester()
1426 .pooling_elements(17)
1427 .pooling_tile(9, 8)
1428 .channels(8)
1429 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001430 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001431 }
1432 }
1433
Marat Dukhan08b7a972020-07-14 18:17:29 -07001434 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001435 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001436 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
1437 AvgPoolMicrokernelTester()
1438 .pooling_elements(17)
1439 .pooling_tile(9, 8)
1440 .channels(8)
1441 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001442 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001443 }
1444 }
1445
Marat Dukhan08b7a972020-07-14 18:17:29 -07001446 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001447 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001448 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1449 AvgPoolMicrokernelTester()
1450 .pooling_elements(17)
1451 .pooling_tile(9, 8)
1452 .channels(8)
1453 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001454 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001455 }
1456 }
1457
Marat Dukhan08b7a972020-07-14 18:17:29 -07001458 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001459 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001460 AvgPoolMicrokernelTester()
1461 .pooling_elements(17)
1462 .pooling_tile(9, 8)
1463 .channels(8)
1464 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001465 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001466 }
1467
Marat Dukhan08b7a972020-07-14 18:17:29 -07001468 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001469 TEST_REQUIRES_X86_SSE2;
1470 AvgPoolMicrokernelTester()
1471 .pooling_elements(17)
1472 .pooling_tile(9, 8)
1473 .channels(8)
1474 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001475 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001476 }
1477
Marat Dukhan08b7a972020-07-14 18:17:29 -07001478 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001479 TEST_REQUIRES_X86_SSE2;
1480 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1481 AvgPoolMicrokernelTester()
1482 .pooling_elements(pooling_elements)
1483 .pooling_tile(9, 8)
1484 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001485 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001486 }
1487 }
1488
Marat Dukhan08b7a972020-07-14 18:17:29 -07001489 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_subtile_with_input_offset) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001490 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001491 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1492 AvgPoolMicrokernelTester()
1493 .pooling_elements(pooling_elements)
1494 .pooling_tile(9, 8)
1495 .channels(8)
1496 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001497 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001498 }
1499 }
1500
Marat Dukhan08b7a972020-07-14 18:17:29 -07001501 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001502 TEST_REQUIRES_X86_SSE2;
1503 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1504 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
1505 AvgPoolMicrokernelTester()
1506 .pooling_elements(pooling_elements)
1507 .pooling_tile(9, 8)
1508 .channels(8)
1509 .input_offset(11)
1510 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001511 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001512 }
1513 }
1514 }
1515
Marat Dukhan08b7a972020-07-14 18:17:29 -07001516 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001517 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001518 for (size_t channels = 16; channels < 64; channels += 8) {
1519 AvgPoolMicrokernelTester()
1520 .pooling_elements(17)
1521 .pooling_tile(9, 8)
1522 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001523 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001524 }
1525 }
1526
Marat Dukhan08b7a972020-07-14 18:17:29 -07001527 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile_with_input_offset) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001528 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001529 for (size_t channels = 16; channels < 64; channels += 8) {
1530 AvgPoolMicrokernelTester()
1531 .pooling_elements(17)
1532 .pooling_tile(9, 8)
1533 .channels(channels)
1534 .input_offset(41)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001535 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001536 }
1537 }
1538
Marat Dukhan08b7a972020-07-14 18:17:29 -07001539 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001540 TEST_REQUIRES_X86_SSE2;
1541 for (size_t channels = 16; channels < 64; channels += 8) {
1542 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
1543 AvgPoolMicrokernelTester()
1544 .pooling_elements(17)
1545 .pooling_tile(9, 8)
1546 .channels(channels)
1547 .input_offset(41)
1548 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001549 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001550 }
1551 }
1552 }
1553
Marat Dukhan08b7a972020-07-14 18:17:29 -07001554 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001555 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001556 for (size_t channels = 16; channels < 64; channels += 8) {
1557 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001558 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001559 .pooling_elements(17)
1560 .pooling_tile(9, 8)
1561 .channels(channels)
1562 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001563 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001564 }
1565 }
1566 }
1567
Marat Dukhan08b7a972020-07-14 18:17:29 -07001568 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001569 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001570 for (size_t channels = 16; channels < 64; channels += 8) {
1571 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001572 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001573 .pooling_elements(17)
1574 .pooling_tile(9, 8)
1575 .channels(channels)
1576 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001577 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001578 }
1579 }
1580 }
1581
Marat Dukhan08b7a972020-07-14 18:17:29 -07001582 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001583 TEST_REQUIRES_X86_SSE2;
1584 for (size_t channels = 16; channels < 64; channels += 8) {
1585 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
1586 AvgPoolMicrokernelTester()
1587 .pooling_elements(17)
1588 .pooling_tile(9, 8)
1589 .channels(channels)
1590 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001591 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001592 }
1593 }
1594 }
1595
Marat Dukhan08b7a972020-07-14 18:17:29 -07001596 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001597 TEST_REQUIRES_X86_SSE2;
1598 for (size_t channels = 16; channels < 64; channels += 8) {
1599 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1600 AvgPoolMicrokernelTester()
1601 .pooling_elements(17)
1602 .pooling_tile(9, 8)
1603 .channels(channels)
1604 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001605 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001606 }
1607 }
1608 }
1609
Marat Dukhan08b7a972020-07-14 18:17:29 -07001610 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001611 TEST_REQUIRES_X86_SSE2;
1612 for (size_t channels = 16; channels < 64; channels += 8) {
1613 AvgPoolMicrokernelTester()
1614 .pooling_elements(17)
1615 .pooling_tile(9, 8)
1616 .channels(channels)
1617 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001618 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001619 }
1620 }
1621
Marat Dukhan08b7a972020-07-14 18:17:29 -07001622 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001623 TEST_REQUIRES_X86_SSE2;
1624 for (size_t channels = 16; channels < 64; channels += 8) {
1625 AvgPoolMicrokernelTester()
1626 .pooling_elements(17)
1627 .pooling_tile(9, 8)
1628 .channels(channels)
1629 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001630 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001631 }
1632 }
1633
Marat Dukhan08b7a972020-07-14 18:17:29 -07001634 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001635 TEST_REQUIRES_X86_SSE2;
1636 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1637 for (size_t channels = 16; channels < 64; channels += 8) {
1638 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001639 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001640 .pooling_tile(9, 8)
1641 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001642 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001643 }
1644 }
1645 }
1646
Marat Dukhan08b7a972020-07-14 18:17:29 -07001647 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001648 TEST_REQUIRES_X86_SSE2;
1649 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1650 for (size_t channels = 16; channels < 64; channels += 8) {
1651 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001652 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001653 .pooling_tile(9, 8)
1654 .channels(channels)
1655 .input_offset(67)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001656 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001657 }
1658 }
1659 }
1660
Marat Dukhan08b7a972020-07-14 18:17:29 -07001661 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001662 TEST_REQUIRES_X86_SSE2;
1663 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1664 for (size_t channels = 16; channels < 64; channels += 8) {
1665 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
1666 AvgPoolMicrokernelTester()
1667 .pooling_elements(pooling_elements)
1668 .pooling_tile(9, 8)
1669 .channels(channels)
1670 .input_offset(67)
1671 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001672 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001673 }
1674 }
1675 }
1676 }
1677
Marat Dukhan08b7a972020-07-14 18:17:29 -07001678 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001679 TEST_REQUIRES_X86_SSE2;
1680 for (size_t channels = 1; channels < 8; channels++) {
1681 AvgPoolMicrokernelTester()
1682 .pooling_elements(17)
1683 .pooling_tile(9, 8)
1684 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001685 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001686 }
1687 }
1688
Marat Dukhan08b7a972020-07-14 18:17:29 -07001689 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001690 TEST_REQUIRES_X86_SSE2;
1691 for (size_t channels = 1; channels < 8; channels++) {
1692 AvgPoolMicrokernelTester()
1693 .pooling_elements(17)
1694 .pooling_tile(9, 8)
1695 .channels(channels)
1696 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001697 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001698 }
1699 }
1700
Marat Dukhan08b7a972020-07-14 18:17:29 -07001701 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile_with_zero_index) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001702 TEST_REQUIRES_X86_SSE2;
1703 for (size_t channels = 1; channels < 8; channels++) {
1704 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
1705 AvgPoolMicrokernelTester()
1706 .pooling_elements(17)
1707 .pooling_tile(9, 8)
1708 .channels(channels)
1709 .input_offset(11)
1710 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001711 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001712 }
1713 }
1714 }
1715
Marat Dukhan08b7a972020-07-14 18:17:29 -07001716 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001717 TEST_REQUIRES_X86_SSE2;
1718 for (size_t channels = 1; channels < 8; channels++) {
1719 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
1720 AvgPoolMicrokernelTester()
1721 .pooling_elements(17)
1722 .pooling_tile(9, 8)
1723 .channels(channels)
1724 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001725 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001726 }
1727 }
1728 }
1729
Marat Dukhan08b7a972020-07-14 18:17:29 -07001730 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001731 TEST_REQUIRES_X86_SSE2;
1732 for (size_t channels = 1; channels < 8; channels++) {
1733 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1734 AvgPoolMicrokernelTester()
1735 .pooling_elements(17)
1736 .pooling_tile(9, 8)
1737 .channels(channels)
1738 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001739 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001740 }
1741 }
1742 }
1743
Marat Dukhan08b7a972020-07-14 18:17:29 -07001744 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001745 TEST_REQUIRES_X86_SSE2;
1746 for (size_t channels = 1; channels < 8; channels++) {
1747 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
1748 AvgPoolMicrokernelTester()
1749 .pooling_elements(17)
1750 .pooling_tile(9, 8)
1751 .channels(channels)
1752 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001753 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001754 }
1755 }
1756 }
1757
Marat Dukhan08b7a972020-07-14 18:17:29 -07001758 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001759 TEST_REQUIRES_X86_SSE2;
1760 for (size_t channels = 1; channels < 8; channels++) {
1761 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1762 AvgPoolMicrokernelTester()
1763 .pooling_elements(17)
1764 .pooling_tile(9, 8)
1765 .channels(channels)
1766 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001767 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001768 }
1769 }
1770 }
1771
Marat Dukhan08b7a972020-07-14 18:17:29 -07001772 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001773 TEST_REQUIRES_X86_SSE2;
1774 for (size_t channels = 1; channels < 8; channels++) {
1775 AvgPoolMicrokernelTester()
1776 .pooling_elements(17)
1777 .pooling_tile(9, 8)
1778 .channels(channels)
1779 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001780 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001781 }
1782 }
1783
Marat Dukhan08b7a972020-07-14 18:17:29 -07001784 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001785 TEST_REQUIRES_X86_SSE2;
1786 for (size_t channels = 1; channels < 8; channels++) {
1787 AvgPoolMicrokernelTester()
1788 .pooling_elements(17)
1789 .pooling_tile(9, 8)
1790 .channels(channels)
1791 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001792 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001793 }
1794 }
1795
Marat Dukhan08b7a972020-07-14 18:17:29 -07001796 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001797 TEST_REQUIRES_X86_SSE2;
1798 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1799 for (size_t channels = 1; channels < 8; channels++) {
1800 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001801 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001802 .pooling_tile(9, 8)
1803 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001804 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001805 }
1806 }
1807 }
1808
Marat Dukhan08b7a972020-07-14 18:17:29 -07001809 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001810 TEST_REQUIRES_X86_SSE2;
1811 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1812 for (size_t channels = 1; channels < 8; channels++) {
1813 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001814 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001815 .pooling_tile(9, 8)
1816 .channels(channels)
1817 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001818 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001819 }
1820 }
1821 }
1822
Marat Dukhan08b7a972020-07-14 18:17:29 -07001823 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001824 TEST_REQUIRES_X86_SSE2;
1825 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1826 for (size_t channels = 1; channels < 8; channels++) {
1827 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
1828 AvgPoolMicrokernelTester()
1829 .pooling_elements(pooling_elements)
1830 .pooling_tile(9, 8)
1831 .channels(channels)
1832 .input_offset(11)
1833 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001834 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001835 }
1836 }
1837 }
1838 }
1839
Marat Dukhan08b7a972020-07-14 18:17:29 -07001840 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001841 TEST_REQUIRES_X86_SSE2;
1842 for (size_t channels = 9; channels < 16; channels++) {
1843 AvgPoolMicrokernelTester()
1844 .pooling_elements(17)
1845 .pooling_tile(9, 8)
1846 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001847 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001848 }
1849 }
1850
Marat Dukhan08b7a972020-07-14 18:17:29 -07001851 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001852 TEST_REQUIRES_X86_SSE2;
1853 for (size_t channels = 9; channels < 16; channels++) {
1854 AvgPoolMicrokernelTester()
1855 .pooling_elements(17)
1856 .pooling_tile(9, 8)
1857 .channels(channels)
1858 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001859 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001860 }
1861 }
1862
Marat Dukhan08b7a972020-07-14 18:17:29 -07001863 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001864 TEST_REQUIRES_X86_SSE2;
1865 for (size_t channels = 9; channels < 16; channels++) {
1866 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
1867 AvgPoolMicrokernelTester()
1868 .pooling_elements(17)
1869 .pooling_tile(9, 8)
1870 .channels(channels)
1871 .input_offset(17)
1872 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001873 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001874 }
1875 }
1876 }
1877
Marat Dukhan08b7a972020-07-14 18:17:29 -07001878 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001879 TEST_REQUIRES_X86_SSE2;
1880 for (size_t channels = 9; channels < 16; channels++) {
1881 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
1882 AvgPoolMicrokernelTester()
1883 .pooling_elements(17)
1884 .pooling_tile(9, 8)
1885 .channels(channels)
1886 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001887 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001888 }
1889 }
1890 }
1891
Marat Dukhan08b7a972020-07-14 18:17:29 -07001892 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001893 TEST_REQUIRES_X86_SSE2;
1894 for (size_t channels = 9; channels < 16; channels++) {
1895 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1896 AvgPoolMicrokernelTester()
1897 .pooling_elements(17)
1898 .pooling_tile(9, 8)
1899 .channels(channels)
1900 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001901 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001902 }
1903 }
1904 }
1905
Marat Dukhan08b7a972020-07-14 18:17:29 -07001906 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001907 TEST_REQUIRES_X86_SSE2;
1908 for (size_t channels = 9; channels < 16; channels++) {
1909 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
1910 AvgPoolMicrokernelTester()
1911 .pooling_elements(17)
1912 .pooling_tile(9, 8)
1913 .channels(channels)
1914 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001915 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001916 }
1917 }
1918 }
1919
Marat Dukhan08b7a972020-07-14 18:17:29 -07001920 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001921 TEST_REQUIRES_X86_SSE2;
1922 for (size_t channels = 9; channels < 16; channels++) {
1923 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
1924 AvgPoolMicrokernelTester()
1925 .pooling_elements(17)
1926 .pooling_tile(9, 8)
1927 .channels(channels)
1928 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001929 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001930 }
1931 }
1932 }
1933
Marat Dukhan08b7a972020-07-14 18:17:29 -07001934 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001935 TEST_REQUIRES_X86_SSE2;
1936 for (size_t channels = 9; channels < 16; channels++) {
1937 AvgPoolMicrokernelTester()
1938 .pooling_elements(17)
1939 .pooling_tile(9, 8)
1940 .channels(channels)
1941 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001942 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001943 }
1944 }
1945
Marat Dukhan08b7a972020-07-14 18:17:29 -07001946 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001947 TEST_REQUIRES_X86_SSE2;
1948 for (size_t channels = 9; channels < 16; channels++) {
1949 AvgPoolMicrokernelTester()
1950 .pooling_elements(17)
1951 .pooling_tile(9, 8)
1952 .channels(channels)
1953 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001954 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001955 }
1956 }
1957
Marat Dukhan08b7a972020-07-14 18:17:29 -07001958 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001959 TEST_REQUIRES_X86_SSE2;
1960 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1961 for (size_t channels = 9; channels < 16; channels++) {
1962 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001963 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001964 .pooling_tile(9, 8)
1965 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001966 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001967 }
1968 }
1969 }
1970
Marat Dukhan08b7a972020-07-14 18:17:29 -07001971 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001972 TEST_REQUIRES_X86_SSE2;
1973 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1974 for (size_t channels = 9; channels < 16; channels++) {
1975 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001976 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001977 .pooling_tile(9, 8)
1978 .channels(channels)
1979 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001980 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08001981 }
1982 }
1983 }
1984
Marat Dukhan08b7a972020-07-14 18:17:29 -07001985 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001986 TEST_REQUIRES_X86_SSE2;
1987 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
1988 for (size_t channels = 9; channels < 16; channels++) {
1989 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
1990 AvgPoolMicrokernelTester()
1991 .pooling_elements(pooling_elements)
1992 .pooling_tile(9, 8)
1993 .channels(channels)
1994 .input_offset(17)
1995 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08001996 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08001997 }
1998 }
1999 }
2000 }
2001
Marat Dukhan08b7a972020-07-14 18:17:29 -07002002 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002003 TEST_REQUIRES_X86_SSE2;
2004 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2005 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002006 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002007 .pooling_tile(9, 8)
2008 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002009 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002010 }
2011 }
2012
Marat Dukhan08b7a972020-07-14 18:17:29 -07002013 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002014 TEST_REQUIRES_X86_SSE2;
2015 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2016 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002017 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002018 .pooling_tile(9, 8)
2019 .channels(8)
2020 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002021 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002022 }
2023 }
2024
Marat Dukhan08b7a972020-07-14 18:17:29 -07002025 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002026 TEST_REQUIRES_X86_SSE2;
2027 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2028 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
2029 AvgPoolMicrokernelTester()
2030 .pooling_elements(pooling_elements)
2031 .pooling_tile(9, 8)
2032 .channels(8)
2033 .input_offset(11)
2034 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002035 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002036 }
2037 }
2038 }
2039
Marat Dukhan08b7a972020-07-14 18:17:29 -07002040 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002041 TEST_REQUIRES_X86_SSE2;
2042 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2043 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2044 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002045 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002046 .pooling_tile(9, 8)
2047 .channels(8)
2048 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002049 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002050 }
2051 }
2052 }
2053
Marat Dukhan08b7a972020-07-14 18:17:29 -07002054 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002055 TEST_REQUIRES_X86_SSE2;
2056 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2057 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2058 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002059 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002060 .pooling_tile(9, 8)
2061 .channels(8)
2062 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002063 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002064 }
2065 }
2066 }
2067
Marat Dukhan08b7a972020-07-14 18:17:29 -07002068 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002069 TEST_REQUIRES_X86_SSE2;
2070 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2071 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2072 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002073 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002074 .pooling_tile(9, 8)
2075 .channels(8)
2076 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002077 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002078 }
2079 }
2080 }
2081
Marat Dukhan08b7a972020-07-14 18:17:29 -07002082 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002083 TEST_REQUIRES_X86_SSE2;
2084 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2085 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2086 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002087 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002088 .pooling_tile(9, 8)
2089 .channels(8)
2090 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002091 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002092 }
2093 }
2094 }
2095
Marat Dukhan08b7a972020-07-14 18:17:29 -07002096 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002097 TEST_REQUIRES_X86_SSE2;
2098 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2099 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002100 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002101 .pooling_tile(9, 8)
2102 .channels(8)
2103 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002104 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002105 }
2106 }
2107
Marat Dukhan08b7a972020-07-14 18:17:29 -07002108 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_eq_8_multipass_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002109 TEST_REQUIRES_X86_SSE2;
2110 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2111 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002112 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002113 .pooling_tile(9, 8)
2114 .channels(8)
2115 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002116 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002117 }
2118 }
2119
Marat Dukhan08b7a972020-07-14 18:17:29 -07002120 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002121 TEST_REQUIRES_X86_SSE2;
2122 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2123 for (size_t channels = 16; channels < 64; channels += 8) {
2124 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002125 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002126 .pooling_tile(9, 8)
2127 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002128 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002129 }
2130 }
2131 }
2132
Marat Dukhan08b7a972020-07-14 18:17:29 -07002133 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002134 TEST_REQUIRES_X86_SSE2;
2135 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2136 for (size_t channels = 16; channels < 64; channels += 8) {
2137 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002138 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002139 .pooling_tile(9, 8)
2140 .channels(channels)
2141 .input_offset(67)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002142 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002143 }
2144 }
2145 }
2146
Marat Dukhan08b7a972020-07-14 18:17:29 -07002147 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002148 TEST_REQUIRES_X86_SSE2;
2149 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2150 for (size_t channels = 16; channels < 64; channels += 8) {
2151 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
2152 AvgPoolMicrokernelTester()
2153 .pooling_elements(pooling_elements)
2154 .pooling_tile(9, 8)
2155 .channels(channels)
2156 .input_offset(67)
2157 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002158 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002159 }
2160 }
2161 }
2162 }
2163
Marat Dukhan08b7a972020-07-14 18:17:29 -07002164 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002165 TEST_REQUIRES_X86_SSE2;
2166 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2167 for (size_t channels = 16; channels < 64; channels += 8) {
2168 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2169 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002170 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002171 .pooling_tile(9, 8)
2172 .channels(channels)
2173 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002174 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002175 }
2176 }
2177 }
2178 }
2179
Marat Dukhan08b7a972020-07-14 18:17:29 -07002180 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002181 TEST_REQUIRES_X86_SSE2;
2182 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2183 for (size_t channels = 16; channels < 64; channels += 8) {
2184 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2185 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002186 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002187 .pooling_tile(9, 8)
2188 .channels(channels)
2189 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002190 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002191 }
2192 }
2193 }
2194 }
2195
Marat Dukhan08b7a972020-07-14 18:17:29 -07002196 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002197 TEST_REQUIRES_X86_SSE2;
2198 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2199 for (size_t channels = 16; channels < 64; channels += 8) {
2200 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2201 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002202 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002203 .pooling_tile(9, 8)
2204 .channels(channels)
2205 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002206 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002207 }
2208 }
2209 }
2210 }
2211
Marat Dukhan08b7a972020-07-14 18:17:29 -07002212 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002213 TEST_REQUIRES_X86_SSE2;
2214 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2215 for (size_t channels = 16; channels < 64; channels += 8) {
2216 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2217 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002218 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002219 .pooling_tile(9, 8)
2220 .channels(channels)
2221 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002222 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002223 }
2224 }
2225 }
2226 }
2227
Marat Dukhan08b7a972020-07-14 18:17:29 -07002228 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002229 TEST_REQUIRES_X86_SSE2;
2230 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2231 for (size_t channels = 16; channels < 64; channels += 8) {
2232 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002233 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002234 .pooling_tile(9, 8)
2235 .channels(channels)
XNNPACK Teamb455b122019-09-27 18:10:33 -07002236 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002237 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002238 }
2239 }
2240 }
2241
Marat Dukhan08b7a972020-07-14 18:17:29 -07002242 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_div_8_multipass_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002243 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002244 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2245 for (size_t channels = 16; channels < 64; channels += 8) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002246 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002247 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002248 .pooling_tile(9, 8)
2249 .channels(channels)
XNNPACK Teamb455b122019-09-27 18:10:33 -07002250 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002251 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002252 }
2253 }
2254 }
2255
Marat Dukhan08b7a972020-07-14 18:17:29 -07002256 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002257 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002258 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2259 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002260 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002261 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002262 .pooling_tile(9, 8)
2263 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002264 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002265 }
2266 }
2267 }
2268
Marat Dukhan08b7a972020-07-14 18:17:29 -07002269 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002270 TEST_REQUIRES_X86_SSE2;
2271 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2272 for (size_t channels = 1; channels < 8; channels++) {
2273 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002274 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002275 .pooling_tile(9, 8)
2276 .channels(channels)
2277 .input_offset(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002278 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002279 }
2280 }
2281 }
2282
Marat Dukhan08b7a972020-07-14 18:17:29 -07002283 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002284 TEST_REQUIRES_X86_SSE2;
2285 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2286 for (size_t channels = 1; channels < 8; channels++) {
2287 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
2288 AvgPoolMicrokernelTester()
2289 .pooling_elements(pooling_elements)
2290 .pooling_tile(9, 8)
2291 .channels(channels)
2292 .input_offset(8)
2293 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002294 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002295 }
2296 }
2297 }
2298 }
2299
Marat Dukhan08b7a972020-07-14 18:17:29 -07002300 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002301 TEST_REQUIRES_X86_SSE2;
2302 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2303 for (size_t channels = 1; channels < 8; channels++) {
2304 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2305 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002306 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002307 .pooling_tile(9, 8)
2308 .channels(channels)
2309 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002310 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002311 }
2312 }
2313 }
2314 }
2315
Marat Dukhan08b7a972020-07-14 18:17:29 -07002316 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002317 TEST_REQUIRES_X86_SSE2;
2318 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2319 for (size_t channels = 1; channels < 8; channels++) {
2320 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2321 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002322 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002323 .pooling_tile(9, 8)
2324 .channels(channels)
2325 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002326 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002327 }
2328 }
2329 }
2330 }
2331
Marat Dukhan08b7a972020-07-14 18:17:29 -07002332 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002333 TEST_REQUIRES_X86_SSE2;
2334 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2335 for (size_t channels = 1; channels < 8; channels++) {
2336 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2337 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002338 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002339 .pooling_tile(9, 8)
2340 .channels(channels)
2341 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002342 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002343 }
2344 }
2345 }
2346 }
2347
Marat Dukhan08b7a972020-07-14 18:17:29 -07002348 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002349 TEST_REQUIRES_X86_SSE2;
2350 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2351 for (size_t channels = 1; channels < 8; channels++) {
2352 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2353 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002354 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002355 .pooling_tile(9, 8)
2356 .channels(channels)
2357 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002358 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002359 }
2360 }
2361 }
2362 }
2363
Marat Dukhan08b7a972020-07-14 18:17:29 -07002364 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002365 TEST_REQUIRES_X86_SSE2;
2366 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2367 for (size_t channels = 1; channels < 8; channels++) {
2368 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002369 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002370 .pooling_tile(9, 8)
2371 .channels(channels)
XNNPACK Teamb455b122019-09-27 18:10:33 -07002372 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002373 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002374 }
2375 }
2376 }
2377
Marat Dukhan08b7a972020-07-14 18:17:29 -07002378 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_lt_8_multipass_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002379 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002380 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2381 for (size_t channels = 1; channels < 8; channels++) {
2382 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002383 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002384 .pooling_tile(9, 8)
2385 .channels(channels)
2386 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002387 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002388 }
2389 }
2390 }
2391
Marat Dukhan08b7a972020-07-14 18:17:29 -07002392 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002393 TEST_REQUIRES_X86_SSE2;
2394 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2395 for (size_t channels = 9; channels < 16; channels++) {
2396 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002397 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002398 .pooling_tile(9, 8)
2399 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002400 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002401 }
2402 }
2403 }
2404
Marat Dukhan08b7a972020-07-14 18:17:29 -07002405 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002406 TEST_REQUIRES_X86_SSE2;
2407 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2408 for (size_t channels = 9; channels < 16; channels++) {
2409 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002410 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002411 .pooling_tile(9, 8)
2412 .channels(channels)
2413 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002414 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002415 }
2416 }
2417 }
2418
Marat Dukhan08b7a972020-07-14 18:17:29 -07002419 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002420 TEST_REQUIRES_X86_SSE2;
2421 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2422 for (size_t channels = 9; channels < 16; channels++) {
2423 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
2424 AvgPoolMicrokernelTester()
2425 .pooling_elements(pooling_elements)
2426 .pooling_tile(9, 8)
2427 .channels(channels)
2428 .input_offset(17)
2429 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002430 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002431 }
2432 }
2433 }
2434 }
2435
Marat Dukhan08b7a972020-07-14 18:17:29 -07002436 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002437 TEST_REQUIRES_X86_SSE2;
2438 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2439 for (size_t channels = 9; channels < 16; channels++) {
2440 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002441 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002442 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002443 .pooling_tile(9, 8)
2444 .channels(channels)
2445 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002446 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002447 }
2448 }
2449 }
2450 }
2451
Marat Dukhan08b7a972020-07-14 18:17:29 -07002452 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002453 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002454 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2455 for (size_t channels = 9; channels < 16; channels++) {
2456 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002457 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002458 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002459 .pooling_tile(9, 8)
2460 .channels(channels)
2461 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002462 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002463 }
2464 }
2465 }
2466 }
2467
Marat Dukhan08b7a972020-07-14 18:17:29 -07002468 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002469 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002470 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2471 for (size_t channels = 9; channels < 16; channels++) {
2472 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002473 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002474 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002475 .pooling_tile(9, 8)
2476 .channels(channels)
2477 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002478 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002479 }
2480 }
2481 }
2482 }
2483
Marat Dukhan08b7a972020-07-14 18:17:29 -07002484 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002485 TEST_REQUIRES_X86_SSE2;
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002486 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2487 for (size_t channels = 9; channels < 16; channels++) {
2488 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2489 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002490 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002491 .pooling_tile(9, 8)
2492 .channels(channels)
2493 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002494 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002495 }
2496 }
2497 }
2498 }
2499
Marat Dukhan08b7a972020-07-14 18:17:29 -07002500 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002501 TEST_REQUIRES_X86_SSE2;
2502 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2503 for (size_t channels = 9; channels < 16; channels++) {
2504 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002505 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002506 .pooling_tile(9, 8)
2507 .channels(channels)
2508 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002509 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002510 }
2511 }
2512 }
2513
Marat Dukhan08b7a972020-07-14 18:17:29 -07002514 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, channels_gt_8_multipass_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002515 TEST_REQUIRES_X86_SSE2;
2516 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
2517 for (size_t channels = 9; channels < 16; channels++) {
2518 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002519 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002520 .pooling_tile(9, 8)
2521 .channels(channels)
2522 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002523 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002524 }
2525 }
2526 }
2527
Marat Dukhan08b7a972020-07-14 18:17:29 -07002528 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002529 TEST_REQUIRES_X86_SSE2;
2530 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2531 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2532 for (size_t channels = 1; channels <= 40; channels += 7) {
2533 AvgPoolMicrokernelTester()
2534 .output_pixels(output_pixels)
2535 .pooling_elements(pooling_elements)
2536 .pooling_tile(9, 8)
2537 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002538 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002539 }
2540 }
2541 }
2542 }
2543
Marat Dukhan08b7a972020-07-14 18:17:29 -07002544 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002545 TEST_REQUIRES_X86_SSE2;
2546 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2547 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2548 for (size_t channels = 1; channels <= 40; channels += 7) {
2549 AvgPoolMicrokernelTester()
2550 .output_pixels(output_pixels)
2551 .pooling_elements(pooling_elements)
2552 .pooling_tile(9, 8)
2553 .channels(channels)
2554 .input_offset(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002555 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002556 }
2557 }
2558 }
2559 }
2560
Marat Dukhan08b7a972020-07-14 18:17:29 -07002561 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002562 TEST_REQUIRES_X86_SSE2;
2563 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2564 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2565 for (size_t channels = 1; channels <= 40; channels += 7) {
2566 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
2567 AvgPoolMicrokernelTester()
2568 .output_pixels(output_pixels)
2569 .pooling_elements(pooling_elements)
2570 .pooling_tile(9, 8)
2571 .channels(channels)
2572 .input_offset(43)
2573 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002574 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002575 }
2576 }
2577 }
2578 }
2579 }
2580
Marat Dukhan08b7a972020-07-14 18:17:29 -07002581 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002582 TEST_REQUIRES_X86_SSE2;
2583 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2584 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2585 for (size_t channels = 1; channels <= 40; channels += 7) {
2586 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002587 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002588 .output_pixels(output_pixels)
2589 .pooling_elements(pooling_elements)
2590 .pooling_tile(9, 8)
2591 .channels(channels)
2592 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002593 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002594 }
2595 }
2596 }
2597 }
2598 }
2599
Marat Dukhan08b7a972020-07-14 18:17:29 -07002600 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002601 TEST_REQUIRES_X86_SSE2;
2602 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2603 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2604 for (size_t channels = 1; channels <= 40; channels += 7) {
2605 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2606 AvgPoolMicrokernelTester()
2607 .output_pixels(output_pixels)
2608 .pooling_elements(pooling_elements)
2609 .pooling_tile(9, 8)
2610 .channels(channels)
2611 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002612 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002613 }
2614 }
2615 }
2616 }
2617 }
2618
Marat Dukhan08b7a972020-07-14 18:17:29 -07002619 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002620 TEST_REQUIRES_X86_SSE2;
2621 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2622 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2623 for (size_t channels = 1; channels <= 40; channels += 7) {
2624 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2625 AvgPoolMicrokernelTester()
2626 .output_pixels(output_pixels)
2627 .pooling_elements(pooling_elements)
2628 .pooling_tile(9, 8)
2629 .channels(channels)
2630 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002631 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002632 }
2633 }
2634 }
2635 }
2636 }
2637
Marat Dukhan08b7a972020-07-14 18:17:29 -07002638 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002639 TEST_REQUIRES_X86_SSE2;
2640 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2641 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2642 for (size_t channels = 1; channels <= 40; channels += 7) {
2643 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2644 AvgPoolMicrokernelTester()
2645 .output_pixels(output_pixels)
2646 .pooling_elements(pooling_elements)
2647 .pooling_tile(9, 8)
2648 .channels(channels)
2649 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002650 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002651 }
2652 }
2653 }
2654 }
2655 }
2656
Marat Dukhan08b7a972020-07-14 18:17:29 -07002657 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002658 TEST_REQUIRES_X86_SSE2;
2659 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2660 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2661 for (size_t channels = 1; channels <= 40; channels += 7) {
2662 AvgPoolMicrokernelTester()
2663 .output_pixels(output_pixels)
2664 .pooling_elements(pooling_elements)
2665 .pooling_tile(9, 8)
2666 .channels(channels)
2667 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002668 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002669 }
2670 }
2671 }
2672 }
2673
Marat Dukhan08b7a972020-07-14 18:17:29 -07002674 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002675 TEST_REQUIRES_X86_SSE2;
2676 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2677 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2678 for (size_t channels = 1; channels <= 40; channels += 7) {
2679 AvgPoolMicrokernelTester()
2680 .output_pixels(output_pixels)
2681 .pooling_elements(pooling_elements)
2682 .pooling_tile(9, 8)
2683 .channels(channels)
2684 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002685 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002686 }
2687 }
2688 }
2689 }
2690
Marat Dukhan08b7a972020-07-14 18:17:29 -07002691 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_output_stride) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002692 TEST_REQUIRES_X86_SSE2;
2693 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2694 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2695 for (size_t channels = 1; channels <= 40; channels += 7) {
2696 AvgPoolMicrokernelTester()
2697 .output_pixels(output_pixels)
2698 .pooling_elements(pooling_elements)
2699 .pooling_tile(9, 8)
2700 .channels(channels)
2701 .output_stride(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002702 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002703 }
2704 }
2705 }
2706 }
2707
Marat Dukhan08b7a972020-07-14 18:17:29 -07002708 TEST(QU8_AVGPOOL_MINMAX_9P8X__SSE2_C8, few_output_pixels_with_step) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002709 TEST_REQUIRES_X86_SSE2;
2710 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
2711 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
2712 for (size_t channels = 1; channels <= 40; channels += 7) {
2713 for (size_t step = 2; step <= pooling_elements; step++) {
2714 AvgPoolMicrokernelTester()
2715 .output_pixels(output_pixels)
2716 .pooling_elements(pooling_elements)
2717 .pooling_tile(9, 8)
2718 .step(step)
2719 .channels(channels)
2720 .output_stride(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08002721 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002722 }
2723 }
2724 }
2725 }
2726 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -07002727#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
XNNPACK Teamb455b122019-09-27 18:10:33 -07002728
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002729
Marat Dukhan08b7a972020-07-14 18:17:29 -07002730TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002731 AvgPoolMicrokernelTester()
2732 .pooling_elements(17)
2733 .pooling_tile(9, 8)
2734 .channels(1)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002735 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002736}
2737
Marat Dukhan08b7a972020-07-14 18:17:29 -07002738TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002739 AvgPoolMicrokernelTester()
2740 .pooling_elements(17)
2741 .pooling_tile(9, 8)
2742 .channels(1)
2743 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002744 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002745}
2746
Marat Dukhan08b7a972020-07-14 18:17:29 -07002747TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002748 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
2749 AvgPoolMicrokernelTester()
2750 .pooling_elements(17)
2751 .pooling_tile(9, 8)
2752 .channels(1)
2753 .input_offset(3)
2754 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002755 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002756 }
2757}
2758
Marat Dukhan08b7a972020-07-14 18:17:29 -07002759TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002760 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2761 AvgPoolMicrokernelTester()
2762 .pooling_elements(17)
2763 .pooling_tile(9, 8)
2764 .channels(1)
2765 .input_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002766 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002767 }
2768}
2769
Marat Dukhan08b7a972020-07-14 18:17:29 -07002770TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002771 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2772 AvgPoolMicrokernelTester()
2773 .pooling_elements(17)
2774 .pooling_tile(9, 8)
2775 .channels(1)
2776 .input_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002777 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002778 }
2779}
2780
Marat Dukhan08b7a972020-07-14 18:17:29 -07002781TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002782 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2783 AvgPoolMicrokernelTester()
2784 .pooling_elements(17)
2785 .pooling_tile(9, 8)
2786 .channels(1)
2787 .output_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002788 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002789 }
2790}
2791
Marat Dukhan08b7a972020-07-14 18:17:29 -07002792TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002793 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2794 AvgPoolMicrokernelTester()
2795 .pooling_elements(17)
2796 .pooling_tile(9, 8)
2797 .channels(1)
2798 .output_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002799 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002800 }
2801}
2802
Marat Dukhan08b7a972020-07-14 18:17:29 -07002803TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002804 AvgPoolMicrokernelTester()
2805 .pooling_elements(17)
2806 .pooling_tile(9, 8)
2807 .channels(1)
2808 .qmin(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002809 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002810}
2811
Marat Dukhan08b7a972020-07-14 18:17:29 -07002812TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002813 AvgPoolMicrokernelTester()
2814 .pooling_elements(17)
2815 .pooling_tile(9, 8)
2816 .channels(1)
2817 .qmax(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002818 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002819}
2820
Marat Dukhan08b7a972020-07-14 18:17:29 -07002821TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002822 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
2823 AvgPoolMicrokernelTester()
2824 .pooling_elements(pooling_elements)
2825 .pooling_tile(9, 8)
2826 .channels(1)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002827 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002828 }
2829}
2830
Marat Dukhan08b7a972020-07-14 18:17:29 -07002831TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002832 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
2833 AvgPoolMicrokernelTester()
2834 .pooling_elements(pooling_elements)
2835 .pooling_tile(9, 8)
2836 .channels(1)
2837 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002838 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002839 }
2840}
2841
Marat Dukhan08b7a972020-07-14 18:17:29 -07002842TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002843 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
2844 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
2845 AvgPoolMicrokernelTester()
2846 .pooling_elements(pooling_elements)
2847 .pooling_tile(9, 8)
2848 .channels(1)
2849 .input_offset(3)
2850 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002851 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002852 }
2853 }
2854}
2855
Marat Dukhan08b7a972020-07-14 18:17:29 -07002856TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002857 for (size_t channels = 2; channels < 10; channels++) {
2858 AvgPoolMicrokernelTester()
2859 .pooling_elements(17)
2860 .pooling_tile(9, 8)
2861 .channels(channels)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002862 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002863 }
2864}
2865
Marat Dukhan08b7a972020-07-14 18:17:29 -07002866TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002867 for (size_t channels = 2; channels < 10; channels++) {
2868 AvgPoolMicrokernelTester()
2869 .pooling_elements(17)
2870 .pooling_tile(9, 8)
2871 .channels(channels)
2872 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002873 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002874 }
2875}
2876
Marat Dukhan08b7a972020-07-14 18:17:29 -07002877TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002878 for (size_t channels = 2; channels < 10; channels++) {
2879 for (size_t zero_index = 0; zero_index < 17; zero_index++) {
2880 AvgPoolMicrokernelTester()
2881 .pooling_elements(17)
2882 .pooling_tile(9, 8)
2883 .channels(channels)
2884 .input_offset(3)
2885 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002886 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002887 }
2888 }
2889}
2890
Marat Dukhan08b7a972020-07-14 18:17:29 -07002891TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002892 for (size_t channels = 2; channels < 10; channels++) {
2893 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002894 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002895 .pooling_elements(17)
2896 .pooling_tile(9, 8)
2897 .channels(channels)
2898 .input_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002899 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07002900 }
2901 }
2902}
2903
Marat Dukhan08b7a972020-07-14 18:17:29 -07002904TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002905 for (size_t channels = 2; channels < 10; channels++) {
2906 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07002907 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002908 .pooling_elements(17)
2909 .pooling_tile(9, 8)
2910 .channels(channels)
2911 .input_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002912 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002913 }
2914 }
2915}
2916
Marat Dukhan08b7a972020-07-14 18:17:29 -07002917TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002918 for (size_t channels = 2; channels < 10; channels++) {
2919 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
2920 AvgPoolMicrokernelTester()
2921 .pooling_elements(17)
2922 .pooling_tile(9, 8)
2923 .channels(channels)
2924 .output_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002925 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002926 }
2927 }
2928}
2929
Marat Dukhan08b7a972020-07-14 18:17:29 -07002930TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002931 for (size_t channels = 2; channels < 10; channels++) {
2932 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
2933 AvgPoolMicrokernelTester()
2934 .pooling_elements(17)
2935 .pooling_tile(9, 8)
2936 .channels(channels)
2937 .output_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002938 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002939 }
2940 }
2941}
2942
Marat Dukhan08b7a972020-07-14 18:17:29 -07002943TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002944 for (size_t channels = 2; channels < 10; channels++) {
2945 AvgPoolMicrokernelTester()
2946 .pooling_elements(17)
2947 .pooling_tile(9, 8)
2948 .channels(channels)
2949 .qmin(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002950 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002951 }
2952}
2953
Marat Dukhan08b7a972020-07-14 18:17:29 -07002954TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002955 for (size_t channels = 2; channels < 10; channels++) {
2956 AvgPoolMicrokernelTester()
2957 .pooling_elements(17)
2958 .pooling_tile(9, 8)
2959 .channels(channels)
2960 .qmax(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002961 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002962 }
2963}
2964
Marat Dukhan08b7a972020-07-14 18:17:29 -07002965TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002966 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
2967 for (size_t channels = 2; channels < 10; channels++) {
2968 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002969 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002970 .pooling_tile(9, 8)
2971 .channels(channels)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002972 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002973 }
2974 }
2975}
2976
Marat Dukhan08b7a972020-07-14 18:17:29 -07002977TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002978 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
2979 for (size_t channels = 2; channels < 10; channels++) {
2980 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002981 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002982 .pooling_tile(9, 8)
2983 .channels(channels)
2984 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08002985 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08002986 }
2987 }
2988}
2989
Marat Dukhan08b7a972020-07-14 18:17:29 -07002990TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08002991 for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
2992 for (size_t channels = 2; channels < 10; channels++) {
2993 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
2994 AvgPoolMicrokernelTester()
2995 .pooling_elements(pooling_elements)
2996 .pooling_tile(9, 8)
2997 .channels(channels)
2998 .input_offset(3)
2999 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003000 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003001 }
3002 }
3003 }
3004}
3005
Marat Dukhan08b7a972020-07-14 18:17:29 -07003006TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003007 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3008 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003009 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003010 .pooling_tile(9, 8)
3011 .channels(1)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003012 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003013 }
3014}
3015
Marat Dukhan08b7a972020-07-14 18:17:29 -07003016TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003017 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3018 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003019 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003020 .pooling_tile(9, 8)
3021 .channels(1)
3022 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003023 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003024 }
3025}
3026
Marat Dukhan08b7a972020-07-14 18:17:29 -07003027TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003028 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3029 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
3030 AvgPoolMicrokernelTester()
3031 .pooling_elements(pooling_elements)
3032 .pooling_tile(9, 8)
3033 .channels(1)
3034 .input_offset(3)
3035 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003036 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003037 }
3038 }
3039}
3040
Marat Dukhan08b7a972020-07-14 18:17:29 -07003041TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003042 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3043 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3044 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003045 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003046 .pooling_tile(9, 8)
3047 .channels(1)
3048 .input_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003049 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003050 }
3051 }
3052}
3053
Marat Dukhan08b7a972020-07-14 18:17:29 -07003054TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003055 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3056 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3057 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003058 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003059 .pooling_tile(9, 8)
3060 .channels(1)
3061 .input_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003062 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003063 }
3064 }
3065}
3066
Marat Dukhan08b7a972020-07-14 18:17:29 -07003067TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003068 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3069 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3070 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003071 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003072 .pooling_tile(9, 8)
3073 .channels(1)
3074 .output_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003075 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003076 }
3077 }
3078}
3079
Marat Dukhan08b7a972020-07-14 18:17:29 -07003080TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003081 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3082 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3083 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003084 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003085 .pooling_tile(9, 8)
3086 .channels(1)
3087 .output_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003088 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003089 }
3090 }
3091}
3092
Marat Dukhan08b7a972020-07-14 18:17:29 -07003093TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003094 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3095 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003096 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003097 .pooling_tile(9, 8)
3098 .channels(1)
3099 .qmin(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003100 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003101 }
3102}
3103
Marat Dukhan08b7a972020-07-14 18:17:29 -07003104TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_eq_1_multipass_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003105 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3106 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003107 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003108 .pooling_tile(9, 8)
3109 .channels(1)
3110 .qmax(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003111 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003112 }
3113}
3114
Marat Dukhan08b7a972020-07-14 18:17:29 -07003115TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003116 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3117 for (size_t channels = 2; channels < 10; channels++) {
3118 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003119 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003120 .pooling_tile(9, 8)
3121 .channels(channels)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003122 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003123 }
3124 }
3125}
3126
Marat Dukhan08b7a972020-07-14 18:17:29 -07003127TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003128 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3129 for (size_t channels = 2; channels < 10; channels++) {
3130 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003131 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003132 .pooling_tile(9, 8)
3133 .channels(channels)
3134 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003135 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003136 }
3137 }
3138}
3139
Marat Dukhan08b7a972020-07-14 18:17:29 -07003140TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003141 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3142 for (size_t channels = 2; channels < 10; channels++) {
3143 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
3144 AvgPoolMicrokernelTester()
3145 .pooling_elements(pooling_elements)
3146 .pooling_tile(9, 8)
3147 .channels(channels)
3148 .input_offset(3)
3149 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003150 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003151 }
3152 }
3153 }
3154}
3155
Marat Dukhan08b7a972020-07-14 18:17:29 -07003156TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003157 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3158 for (size_t channels = 2; channels < 10; channels++) {
3159 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3160 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003161 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003162 .pooling_tile(9, 8)
3163 .channels(channels)
3164 .input_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003165 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003166 }
3167 }
3168 }
3169}
3170
Marat Dukhan08b7a972020-07-14 18:17:29 -07003171TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003172 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3173 for (size_t channels = 2; channels < 10; channels++) {
3174 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3175 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003176 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003177 .pooling_tile(9, 8)
3178 .channels(channels)
3179 .input_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003180 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003181 }
3182 }
3183 }
3184}
3185
Marat Dukhan08b7a972020-07-14 18:17:29 -07003186TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003187 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3188 for (size_t channels = 2; channels < 10; channels++) {
3189 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3190 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003191 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003192 .pooling_tile(9, 8)
3193 .channels(channels)
3194 .output_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003195 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003196 }
3197 }
3198 }
3199}
3200
Marat Dukhan08b7a972020-07-14 18:17:29 -07003201TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003202 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3203 for (size_t channels = 2; channels < 10; channels++) {
3204 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3205 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003206 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003207 .pooling_tile(9, 8)
3208 .channels(channels)
3209 .output_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003210 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003211 }
3212 }
3213 }
3214}
3215
Marat Dukhan08b7a972020-07-14 18:17:29 -07003216TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003217 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3218 for (size_t channels = 2; channels < 10; channels++) {
3219 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003220 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003221 .pooling_tile(9, 8)
3222 .channels(channels)
XNNPACK Teamb455b122019-09-27 18:10:33 -07003223 .qmin(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003224 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07003225 }
3226 }
3227}
3228
Marat Dukhan08b7a972020-07-14 18:17:29 -07003229TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, channels_gt_1_multipass_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003230 for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
3231 for (size_t channels = 2; channels < 10; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07003232 AvgPoolMicrokernelTester()
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003233 .pooling_elements(pooling_elements)
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003234 .pooling_tile(9, 8)
3235 .channels(channels)
XNNPACK Teamb455b122019-09-27 18:10:33 -07003236 .qmax(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003237 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07003238 }
3239 }
3240}
3241
Marat Dukhan08b7a972020-07-14 18:17:29 -07003242TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003243 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3244 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3245 for (size_t channels = 1; channels <= 5; channels += 1) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07003246 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003247 .output_pixels(output_pixels)
3248 .pooling_elements(pooling_elements)
3249 .pooling_tile(9, 8)
3250 .channels(channels)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003251 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07003252 }
3253 }
3254 }
3255}
3256
Marat Dukhan08b7a972020-07-14 18:17:29 -07003257TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003258 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3259 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3260 for (size_t channels = 1; channels <= 5; channels += 1) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07003261 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003262 .output_pixels(output_pixels)
3263 .pooling_elements(pooling_elements)
3264 .pooling_tile(9, 8)
3265 .channels(channels)
3266 .input_offset(7)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003267 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07003268 }
3269 }
3270 }
3271}
3272
Marat Dukhan08b7a972020-07-14 18:17:29 -07003273TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003274 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3275 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3276 for (size_t channels = 1; channels <= 5; channels += 1) {
3277 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
3278 AvgPoolMicrokernelTester()
3279 .output_pixels(output_pixels)
3280 .pooling_elements(pooling_elements)
3281 .pooling_tile(9, 8)
3282 .channels(channels)
3283 .input_offset(7)
3284 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003285 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003286 }
3287 }
3288 }
3289 }
3290}
3291
Marat Dukhan08b7a972020-07-14 18:17:29 -07003292TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003293 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3294 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3295 for (size_t channels = 1; channels <= 5; channels += 1) {
3296 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07003297 AvgPoolMicrokernelTester()
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003298 .output_pixels(output_pixels)
3299 .pooling_elements(pooling_elements)
3300 .pooling_tile(9, 8)
3301 .channels(channels)
3302 .input_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003303 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -07003304 }
3305 }
3306 }
3307 }
3308}
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003309
Marat Dukhan08b7a972020-07-14 18:17:29 -07003310TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003311 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3312 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3313 for (size_t channels = 1; channels <= 5; channels += 1) {
3314 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3315 AvgPoolMicrokernelTester()
3316 .output_pixels(output_pixels)
3317 .pooling_elements(pooling_elements)
3318 .pooling_tile(9, 8)
3319 .channels(channels)
3320 .input_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003321 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003322 }
3323 }
3324 }
3325 }
3326}
3327
Marat Dukhan08b7a972020-07-14 18:17:29 -07003328TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003329 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3330 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3331 for (size_t channels = 1; channels <= 5; channels += 1) {
3332 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3333 AvgPoolMicrokernelTester()
3334 .output_pixels(output_pixels)
3335 .pooling_elements(pooling_elements)
3336 .pooling_tile(9, 8)
3337 .channels(channels)
3338 .output_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003339 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003340 }
3341 }
3342 }
3343 }
3344}
3345
Marat Dukhan08b7a972020-07-14 18:17:29 -07003346TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003347 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3348 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3349 for (size_t channels = 1; channels <= 5; channels += 1) {
3350 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3351 AvgPoolMicrokernelTester()
3352 .output_pixels(output_pixels)
3353 .pooling_elements(pooling_elements)
3354 .pooling_tile(9, 8)
3355 .channels(channels)
3356 .output_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003357 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003358 }
3359 }
3360 }
3361 }
3362}
3363
Marat Dukhan08b7a972020-07-14 18:17:29 -07003364TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003365 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3366 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3367 for (size_t channels = 1; channels <= 5; channels += 1) {
3368 AvgPoolMicrokernelTester()
3369 .output_pixels(output_pixels)
3370 .pooling_elements(pooling_elements)
3371 .pooling_tile(9, 8)
3372 .channels(channels)
3373 .qmin(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003374 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003375 }
3376 }
3377 }
3378}
3379
Marat Dukhan08b7a972020-07-14 18:17:29 -07003380TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003381 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3382 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3383 for (size_t channels = 1; channels <= 5; channels += 1) {
3384 AvgPoolMicrokernelTester()
3385 .output_pixels(output_pixels)
3386 .pooling_elements(pooling_elements)
3387 .pooling_tile(9, 8)
3388 .channels(channels)
3389 .qmax(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003390 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003391 }
3392 }
3393 }
3394}
3395
Marat Dukhan08b7a972020-07-14 18:17:29 -07003396TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_output_stride) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003397 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3398 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3399 for (size_t channels = 1; channels <= 5; channels += 1) {
3400 AvgPoolMicrokernelTester()
3401 .output_pixels(output_pixels)
3402 .pooling_elements(pooling_elements)
3403 .pooling_tile(9, 8)
3404 .channels(channels)
3405 .output_stride(7)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003406 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003407 }
3408 }
3409 }
3410}
3411
Marat Dukhan08b7a972020-07-14 18:17:29 -07003412TEST(QU8_AVGPOOL_MINMAX_9P8X__SCALAR_C1, few_output_pixels_with_step) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003413 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
3414 for (size_t pooling_elements : std::vector<size_t>{{10, 16, 18}}) {
3415 for (size_t channels = 1; channels <= 5; channels += 1) {
3416 for (size_t step = 2; step <= pooling_elements; step++) {
3417 AvgPoolMicrokernelTester()
3418 .output_pixels(output_pixels)
3419 .pooling_elements(pooling_elements)
3420 .pooling_tile(9, 8)
3421 .step(step)
3422 .channels(channels)
3423 .output_stride(7)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08003424 .Test(xnn_qu8_avgpool_minmax_ukernel_9p8x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003425 }
3426 }
3427 }
3428 }
3429}
3430
3431#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Marat Dukhan08b7a972020-07-14 18:17:29 -07003432 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003433 TEST_REQUIRES_ARM_NEON;
3434 AvgPoolMicrokernelTester()
3435 .pooling_elements(9)
3436 .pooling_tile(9)
3437 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003438 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003439 }
3440
Marat Dukhan08b7a972020-07-14 18:17:29 -07003441 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003442 TEST_REQUIRES_ARM_NEON;
3443 AvgPoolMicrokernelTester()
3444 .pooling_elements(9)
3445 .pooling_tile(9)
3446 .channels(8)
3447 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003448 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003449 }
3450
Marat Dukhan08b7a972020-07-14 18:17:29 -07003451 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003452 TEST_REQUIRES_ARM_NEON;
3453 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
3454 AvgPoolMicrokernelTester()
3455 .pooling_elements(9)
3456 .pooling_tile(9)
3457 .channels(8)
3458 .input_offset(11)
3459 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003460 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003461 }
3462 }
3463
Marat Dukhan08b7a972020-07-14 18:17:29 -07003464 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003465 TEST_REQUIRES_ARM_NEON;
3466 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3467 AvgPoolMicrokernelTester()
3468 .pooling_elements(9)
3469 .pooling_tile(9)
3470 .channels(8)
3471 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003472 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003473 }
3474 }
3475
Marat Dukhan08b7a972020-07-14 18:17:29 -07003476 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003477 TEST_REQUIRES_ARM_NEON;
3478 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3479 AvgPoolMicrokernelTester()
3480 .pooling_elements(9)
3481 .pooling_tile(9)
3482 .channels(8)
3483 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003484 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003485 }
3486 }
3487
Marat Dukhan08b7a972020-07-14 18:17:29 -07003488 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003489 TEST_REQUIRES_ARM_NEON;
3490 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3491 AvgPoolMicrokernelTester()
3492 .pooling_elements(9)
3493 .pooling_tile(9)
3494 .channels(8)
3495 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003496 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003497 }
3498 }
3499
Marat Dukhan08b7a972020-07-14 18:17:29 -07003500 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003501 TEST_REQUIRES_ARM_NEON;
3502 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3503 AvgPoolMicrokernelTester()
3504 .pooling_elements(9)
3505 .pooling_tile(9)
3506 .channels(8)
3507 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003508 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003509 }
3510 }
3511
Marat Dukhan08b7a972020-07-14 18:17:29 -07003512 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003513 TEST_REQUIRES_ARM_NEON;
3514 AvgPoolMicrokernelTester()
3515 .pooling_elements(9)
3516 .pooling_tile(9)
3517 .channels(8)
3518 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003519 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003520 }
3521
Marat Dukhan08b7a972020-07-14 18:17:29 -07003522 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003523 TEST_REQUIRES_ARM_NEON;
3524 AvgPoolMicrokernelTester()
3525 .pooling_elements(9)
3526 .pooling_tile(9)
3527 .channels(8)
3528 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003529 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003530 }
3531
Marat Dukhan08b7a972020-07-14 18:17:29 -07003532 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003533 TEST_REQUIRES_ARM_NEON;
3534 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3535 AvgPoolMicrokernelTester()
3536 .pooling_elements(pooling_elements)
3537 .pooling_tile(9)
3538 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003539 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003540 }
3541 }
3542
Marat Dukhan08b7a972020-07-14 18:17:29 -07003543 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003544 TEST_REQUIRES_ARM_NEON;
3545 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3546 AvgPoolMicrokernelTester()
3547 .pooling_elements(pooling_elements)
3548 .pooling_tile(9)
3549 .channels(8)
3550 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003551 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003552 }
3553 }
3554
Marat Dukhan08b7a972020-07-14 18:17:29 -07003555 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_eq_8_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003556 TEST_REQUIRES_ARM_NEON;
3557 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3558 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
3559 AvgPoolMicrokernelTester()
3560 .pooling_elements(pooling_elements)
3561 .pooling_tile(9)
3562 .channels(8)
3563 .input_offset(11)
3564 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003565 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003566 }
3567 }
3568 }
3569
Marat Dukhan08b7a972020-07-14 18:17:29 -07003570 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003571 TEST_REQUIRES_ARM_NEON;
3572 for (size_t channels = 16; channels < 64; channels += 8) {
3573 AvgPoolMicrokernelTester()
3574 .pooling_elements(9)
3575 .pooling_tile(9)
3576 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003577 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003578 }
3579 }
3580
Marat Dukhan08b7a972020-07-14 18:17:29 -07003581 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003582 TEST_REQUIRES_ARM_NEON;
3583 for (size_t channels = 16; channels < 64; channels += 8) {
3584 AvgPoolMicrokernelTester()
3585 .pooling_elements(9)
3586 .pooling_tile(9)
3587 .channels(channels)
3588 .input_offset(67)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003589 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003590 }
3591 }
3592
Marat Dukhan08b7a972020-07-14 18:17:29 -07003593 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003594 TEST_REQUIRES_ARM_NEON;
3595 for (size_t channels = 16; channels < 64; channels += 8) {
3596 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
3597 AvgPoolMicrokernelTester()
3598 .pooling_elements(9)
3599 .pooling_tile(9)
3600 .channels(channels)
3601 .input_offset(67)
3602 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003603 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003604 }
3605 }
3606 }
3607
Marat Dukhan08b7a972020-07-14 18:17:29 -07003608 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003609 TEST_REQUIRES_ARM_NEON;
3610 for (size_t channels = 16; channels < 64; channels += 8) {
3611 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3612 AvgPoolMicrokernelTester()
3613 .pooling_elements(9)
3614 .pooling_tile(9)
3615 .channels(channels)
3616 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003617 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003618 }
3619 }
3620 }
3621
Marat Dukhan08b7a972020-07-14 18:17:29 -07003622 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003623 TEST_REQUIRES_ARM_NEON;
3624 for (size_t channels = 16; channels < 64; channels += 8) {
3625 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3626 AvgPoolMicrokernelTester()
3627 .pooling_elements(9)
3628 .pooling_tile(9)
3629 .channels(channels)
3630 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003631 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003632 }
3633 }
3634 }
3635
Marat Dukhan08b7a972020-07-14 18:17:29 -07003636 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003637 TEST_REQUIRES_ARM_NEON;
3638 for (size_t channels = 16; channels < 64; channels += 8) {
3639 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3640 AvgPoolMicrokernelTester()
3641 .pooling_elements(9)
3642 .pooling_tile(9)
3643 .channels(channels)
3644 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003645 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003646 }
3647 }
3648 }
3649
Marat Dukhan08b7a972020-07-14 18:17:29 -07003650 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003651 TEST_REQUIRES_ARM_NEON;
3652 for (size_t channels = 16; channels < 64; channels += 8) {
3653 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3654 AvgPoolMicrokernelTester()
3655 .pooling_elements(9)
3656 .pooling_tile(9)
3657 .channels(channels)
3658 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003659 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003660 }
3661 }
3662 }
3663
Marat Dukhan08b7a972020-07-14 18:17:29 -07003664 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003665 TEST_REQUIRES_ARM_NEON;
3666 for (size_t channels = 16; channels < 64; channels += 8) {
3667 AvgPoolMicrokernelTester()
3668 .pooling_elements(9)
3669 .pooling_tile(9)
3670 .channels(channels)
3671 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003672 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003673 }
3674 }
3675
Marat Dukhan08b7a972020-07-14 18:17:29 -07003676 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003677 TEST_REQUIRES_ARM_NEON;
3678 for (size_t channels = 16; channels < 64; channels += 8) {
3679 AvgPoolMicrokernelTester()
3680 .pooling_elements(9)
3681 .pooling_tile(9)
3682 .channels(channels)
3683 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003684 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003685 }
3686 }
3687
Marat Dukhan08b7a972020-07-14 18:17:29 -07003688 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003689 TEST_REQUIRES_ARM_NEON;
3690 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3691 for (size_t channels = 16; channels < 64; channels += 8) {
3692 AvgPoolMicrokernelTester()
3693 .pooling_elements(pooling_elements)
3694 .pooling_tile(9)
3695 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003696 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003697 }
3698 }
3699 }
3700
Marat Dukhan08b7a972020-07-14 18:17:29 -07003701 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003702 TEST_REQUIRES_ARM_NEON;
3703 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3704 for (size_t channels = 16; channels < 64; channels += 8) {
3705 AvgPoolMicrokernelTester()
3706 .pooling_elements(pooling_elements)
3707 .pooling_tile(9)
3708 .channels(channels)
3709 .input_offset(67)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003710 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003711 }
3712 }
3713 }
3714
Marat Dukhan08b7a972020-07-14 18:17:29 -07003715 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_div_8_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003716 TEST_REQUIRES_ARM_NEON;
3717 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3718 for (size_t channels = 16; channels < 64; channels += 8) {
3719 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
3720 AvgPoolMicrokernelTester()
3721 .pooling_elements(pooling_elements)
3722 .pooling_tile(9)
3723 .channels(channels)
3724 .input_offset(67)
3725 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003726 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003727 }
3728 }
3729 }
3730 }
3731
Marat Dukhan08b7a972020-07-14 18:17:29 -07003732 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003733 TEST_REQUIRES_ARM_NEON;
3734 for (size_t channels = 1; channels < 8; channels++) {
3735 AvgPoolMicrokernelTester()
3736 .pooling_elements(9)
3737 .pooling_tile(9)
3738 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003739 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003740 }
3741 }
3742
Marat Dukhan08b7a972020-07-14 18:17:29 -07003743 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003744 TEST_REQUIRES_ARM_NEON;
3745 for (size_t channels = 1; channels < 8; channels++) {
3746 AvgPoolMicrokernelTester()
3747 .pooling_elements(9)
3748 .pooling_tile(9)
3749 .channels(channels)
3750 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003751 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003752 }
3753 }
3754
Marat Dukhan08b7a972020-07-14 18:17:29 -07003755 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003756 TEST_REQUIRES_ARM_NEON;
3757 for (size_t channels = 1; channels < 8; channels++) {
3758 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
3759 AvgPoolMicrokernelTester()
3760 .pooling_elements(9)
3761 .pooling_tile(9)
3762 .channels(channels)
3763 .input_offset(11)
3764 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003765 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003766 }
3767 }
3768 }
3769
Marat Dukhan08b7a972020-07-14 18:17:29 -07003770 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003771 TEST_REQUIRES_ARM_NEON;
3772 for (size_t channels = 1; channels < 8; channels++) {
3773 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3774 AvgPoolMicrokernelTester()
3775 .pooling_elements(9)
3776 .pooling_tile(9)
3777 .channels(channels)
3778 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003779 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003780 }
3781 }
3782 }
3783
Marat Dukhan08b7a972020-07-14 18:17:29 -07003784 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003785 TEST_REQUIRES_ARM_NEON;
3786 for (size_t channels = 1; channels < 8; channels++) {
3787 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3788 AvgPoolMicrokernelTester()
3789 .pooling_elements(9)
3790 .pooling_tile(9)
3791 .channels(channels)
3792 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003793 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003794 }
3795 }
3796 }
3797
Marat Dukhan08b7a972020-07-14 18:17:29 -07003798 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003799 TEST_REQUIRES_ARM_NEON;
3800 for (size_t channels = 1; channels < 8; channels++) {
3801 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3802 AvgPoolMicrokernelTester()
3803 .pooling_elements(9)
3804 .pooling_tile(9)
3805 .channels(channels)
3806 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003807 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003808 }
3809 }
3810 }
3811
Marat Dukhan08b7a972020-07-14 18:17:29 -07003812 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003813 TEST_REQUIRES_ARM_NEON;
3814 for (size_t channels = 1; channels < 8; channels++) {
3815 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3816 AvgPoolMicrokernelTester()
3817 .pooling_elements(9)
3818 .pooling_tile(9)
3819 .channels(channels)
3820 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003821 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003822 }
3823 }
3824 }
3825
Marat Dukhan08b7a972020-07-14 18:17:29 -07003826 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003827 TEST_REQUIRES_ARM_NEON;
3828 for (size_t channels = 1; channels < 8; channels++) {
3829 AvgPoolMicrokernelTester()
3830 .pooling_elements(9)
3831 .pooling_tile(9)
3832 .channels(channels)
3833 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003834 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003835 }
3836 }
3837
Marat Dukhan08b7a972020-07-14 18:17:29 -07003838 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003839 TEST_REQUIRES_ARM_NEON;
3840 for (size_t channels = 1; channels < 8; channels++) {
3841 AvgPoolMicrokernelTester()
3842 .pooling_elements(9)
3843 .pooling_tile(9)
3844 .channels(channels)
3845 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003846 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003847 }
3848 }
3849
Marat Dukhan08b7a972020-07-14 18:17:29 -07003850 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003851 TEST_REQUIRES_ARM_NEON;
3852 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3853 for (size_t channels = 1; channels < 8; channels++) {
3854 AvgPoolMicrokernelTester()
3855 .pooling_elements(pooling_elements)
3856 .pooling_tile(9)
3857 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003858 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003859 }
3860 }
3861 }
3862
Marat Dukhan08b7a972020-07-14 18:17:29 -07003863 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003864 TEST_REQUIRES_ARM_NEON;
3865 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3866 for (size_t channels = 1; channels < 8; channels++) {
3867 AvgPoolMicrokernelTester()
3868 .pooling_elements(pooling_elements)
3869 .pooling_tile(9)
3870 .channels(channels)
3871 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003872 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003873 }
3874 }
3875 }
3876
Marat Dukhan08b7a972020-07-14 18:17:29 -07003877 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_lt_8_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003878 TEST_REQUIRES_ARM_NEON;
3879 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
3880 for (size_t channels = 1; channels < 8; channels++) {
3881 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
3882 AvgPoolMicrokernelTester()
3883 .pooling_elements(pooling_elements)
3884 .pooling_tile(9)
3885 .channels(channels)
3886 .input_offset(11)
3887 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003888 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003889 }
3890 }
3891 }
3892 }
3893
Marat Dukhan08b7a972020-07-14 18:17:29 -07003894 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003895 TEST_REQUIRES_ARM_NEON;
3896 for (size_t channels = 9; channels < 16; channels++) {
3897 AvgPoolMicrokernelTester()
3898 .pooling_elements(9)
3899 .pooling_tile(9)
3900 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003901 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003902 }
3903 }
3904
Marat Dukhan08b7a972020-07-14 18:17:29 -07003905 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003906 TEST_REQUIRES_ARM_NEON;
3907 for (size_t channels = 9; channels < 16; channels++) {
3908 AvgPoolMicrokernelTester()
3909 .pooling_elements(9)
3910 .pooling_tile(9)
3911 .channels(channels)
3912 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003913 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003914 }
3915 }
3916
Marat Dukhan08b7a972020-07-14 18:17:29 -07003917 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003918 TEST_REQUIRES_ARM_NEON;
3919 for (size_t channels = 9; channels < 16; channels++) {
3920 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
3921 AvgPoolMicrokernelTester()
3922 .pooling_elements(9)
3923 .pooling_tile(9)
3924 .channels(channels)
3925 .input_offset(17)
3926 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003927 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08003928 }
3929 }
3930 }
3931
Marat Dukhan08b7a972020-07-14 18:17:29 -07003932 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003933 TEST_REQUIRES_ARM_NEON;
3934 for (size_t channels = 9; channels < 16; channels++) {
3935 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3936 AvgPoolMicrokernelTester()
3937 .pooling_elements(9)
3938 .pooling_tile(9)
3939 .channels(channels)
3940 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003941 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003942 }
3943 }
3944 }
3945
Marat Dukhan08b7a972020-07-14 18:17:29 -07003946 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003947 TEST_REQUIRES_ARM_NEON;
3948 for (size_t channels = 9; channels < 16; channels++) {
3949 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3950 AvgPoolMicrokernelTester()
3951 .pooling_elements(9)
3952 .pooling_tile(9)
3953 .channels(channels)
3954 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003955 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003956 }
3957 }
3958 }
3959
Marat Dukhan08b7a972020-07-14 18:17:29 -07003960 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003961 TEST_REQUIRES_ARM_NEON;
3962 for (size_t channels = 9; channels < 16; channels++) {
3963 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
3964 AvgPoolMicrokernelTester()
3965 .pooling_elements(9)
3966 .pooling_tile(9)
3967 .channels(channels)
3968 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003969 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003970 }
3971 }
3972 }
3973
Marat Dukhan08b7a972020-07-14 18:17:29 -07003974 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003975 TEST_REQUIRES_ARM_NEON;
3976 for (size_t channels = 9; channels < 16; channels++) {
3977 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
3978 AvgPoolMicrokernelTester()
3979 .pooling_elements(9)
3980 .pooling_tile(9)
3981 .channels(channels)
3982 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003983 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003984 }
3985 }
3986 }
3987
Marat Dukhan08b7a972020-07-14 18:17:29 -07003988 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003989 TEST_REQUIRES_ARM_NEON;
3990 for (size_t channels = 9; channels < 16; channels++) {
3991 AvgPoolMicrokernelTester()
3992 .pooling_elements(9)
3993 .pooling_tile(9)
3994 .channels(channels)
3995 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08003996 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08003997 }
3998 }
3999
Marat Dukhan08b7a972020-07-14 18:17:29 -07004000 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004001 TEST_REQUIRES_ARM_NEON;
4002 for (size_t channels = 9; channels < 16; channels++) {
4003 AvgPoolMicrokernelTester()
4004 .pooling_elements(9)
4005 .pooling_tile(9)
4006 .channels(channels)
4007 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004008 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004009 }
4010 }
4011
Marat Dukhan08b7a972020-07-14 18:17:29 -07004012 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004013 TEST_REQUIRES_ARM_NEON;
4014 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4015 for (size_t channels = 9; channels < 16; channels++) {
4016 AvgPoolMicrokernelTester()
4017 .pooling_elements(pooling_elements)
4018 .pooling_tile(9)
4019 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004020 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004021 }
4022 }
4023 }
4024
Marat Dukhan08b7a972020-07-14 18:17:29 -07004025 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004026 TEST_REQUIRES_ARM_NEON;
4027 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4028 for (size_t channels = 9; channels < 16; channels++) {
4029 AvgPoolMicrokernelTester()
4030 .pooling_elements(pooling_elements)
4031 .pooling_tile(9)
4032 .channels(channels)
4033 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004034 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004035 }
4036 }
4037 }
4038
Marat Dukhan08b7a972020-07-14 18:17:29 -07004039 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, channels_gt_8_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004040 TEST_REQUIRES_ARM_NEON;
4041 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4042 for (size_t channels = 9; channels < 16; channels++) {
4043 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
4044 AvgPoolMicrokernelTester()
4045 .pooling_elements(pooling_elements)
4046 .pooling_tile(9)
4047 .channels(channels)
4048 .input_offset(17)
4049 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004050 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004051 }
4052 }
4053 }
4054 }
4055
Marat Dukhan08b7a972020-07-14 18:17:29 -07004056 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004057 TEST_REQUIRES_ARM_NEON;
4058 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4059 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4060 for (size_t channels = 1; channels <= 40; channels += 7) {
4061 AvgPoolMicrokernelTester()
4062 .output_pixels(output_pixels)
4063 .pooling_elements(pooling_elements)
4064 .pooling_tile(9, 0)
4065 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004066 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004067 }
4068 }
4069 }
4070 }
4071
Marat Dukhan08b7a972020-07-14 18:17:29 -07004072 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004073 TEST_REQUIRES_ARM_NEON;
4074 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4075 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4076 for (size_t channels = 1; channels <= 40; channels += 7) {
4077 AvgPoolMicrokernelTester()
4078 .output_pixels(output_pixels)
4079 .pooling_elements(pooling_elements)
4080 .pooling_tile(9, 0)
4081 .channels(channels)
4082 .input_offset(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004083 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004084 }
4085 }
4086 }
4087 }
4088
Marat Dukhan08b7a972020-07-14 18:17:29 -07004089 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004090 TEST_REQUIRES_ARM_NEON;
4091 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4092 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4093 for (size_t channels = 1; channels <= 40; channels += 7) {
4094 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
4095 AvgPoolMicrokernelTester()
4096 .output_pixels(output_pixels)
4097 .pooling_elements(pooling_elements)
4098 .pooling_tile(9, 0)
4099 .channels(channels)
4100 .input_offset(43)
4101 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004102 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004103 }
4104 }
4105 }
4106 }
4107 }
4108
Marat Dukhan08b7a972020-07-14 18:17:29 -07004109 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004110 TEST_REQUIRES_ARM_NEON;
4111 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4112 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4113 for (size_t channels = 1; channels <= 40; channels += 7) {
4114 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4115 AvgPoolMicrokernelTester()
4116 .output_pixels(output_pixels)
4117 .pooling_elements(pooling_elements)
4118 .pooling_tile(9)
4119 .channels(channels)
4120 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004121 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004122 }
4123 }
4124 }
4125 }
4126 }
4127
Marat Dukhan08b7a972020-07-14 18:17:29 -07004128 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004129 TEST_REQUIRES_ARM_NEON;
4130 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4131 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4132 for (size_t channels = 1; channels <= 40; channels += 7) {
4133 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4134 AvgPoolMicrokernelTester()
4135 .output_pixels(output_pixels)
4136 .pooling_elements(pooling_elements)
4137 .pooling_tile(9)
4138 .channels(channels)
4139 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004140 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004141 }
4142 }
4143 }
4144 }
4145 }
4146
Marat Dukhan08b7a972020-07-14 18:17:29 -07004147 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004148 TEST_REQUIRES_ARM_NEON;
4149 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4150 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4151 for (size_t channels = 1; channels <= 40; channels += 7) {
4152 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4153 AvgPoolMicrokernelTester()
4154 .output_pixels(output_pixels)
4155 .pooling_elements(pooling_elements)
4156 .pooling_tile(9)
4157 .channels(channels)
4158 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004159 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004160 }
4161 }
4162 }
4163 }
4164 }
4165
Marat Dukhan08b7a972020-07-14 18:17:29 -07004166 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004167 TEST_REQUIRES_ARM_NEON;
4168 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4169 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4170 for (size_t channels = 1; channels <= 40; channels += 7) {
4171 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4172 AvgPoolMicrokernelTester()
4173 .output_pixels(output_pixels)
4174 .pooling_elements(pooling_elements)
4175 .pooling_tile(9)
4176 .channels(channels)
4177 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004178 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004179 }
4180 }
4181 }
4182 }
4183 }
4184
Marat Dukhan08b7a972020-07-14 18:17:29 -07004185 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004186 TEST_REQUIRES_ARM_NEON;
4187 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4188 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4189 for (size_t channels = 1; channels <= 40; channels += 7) {
4190 AvgPoolMicrokernelTester()
4191 .output_pixels(output_pixels)
4192 .pooling_elements(pooling_elements)
4193 .pooling_tile(9, 0)
4194 .channels(channels)
4195 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004196 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004197 }
4198 }
4199 }
4200 }
4201
Marat Dukhan08b7a972020-07-14 18:17:29 -07004202 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004203 TEST_REQUIRES_ARM_NEON;
4204 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4205 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4206 for (size_t channels = 1; channels <= 40; channels += 7) {
4207 AvgPoolMicrokernelTester()
4208 .output_pixels(output_pixels)
4209 .pooling_elements(pooling_elements)
4210 .pooling_tile(9, 0)
4211 .channels(channels)
4212 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004213 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004214 }
4215 }
4216 }
4217 }
4218
Marat Dukhan08b7a972020-07-14 18:17:29 -07004219 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_output_stride) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004220 TEST_REQUIRES_ARM_NEON;
4221 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4222 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4223 for (size_t channels = 1; channels <= 40; channels += 7) {
4224 AvgPoolMicrokernelTester()
4225 .output_pixels(output_pixels)
4226 .pooling_elements(pooling_elements)
4227 .pooling_tile(9, 0)
4228 .channels(channels)
4229 .output_stride(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004230 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004231 }
4232 }
4233 }
4234 }
4235
Marat Dukhan08b7a972020-07-14 18:17:29 -07004236 TEST(QU8_AVGPOOL_MINMAX_9X__NEON_C8, few_output_pixels_with_step) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004237 TEST_REQUIRES_ARM_NEON;
4238 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4239 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4240 for (size_t channels = 1; channels <= 40; channels += 7) {
4241 for (size_t step = 2; step <= pooling_elements; step++) {
4242 AvgPoolMicrokernelTester()
4243 .output_pixels(output_pixels)
4244 .pooling_elements(pooling_elements)
4245 .pooling_tile(9, 0)
4246 .step(step)
4247 .channels(channels)
4248 .output_stride(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004249 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__neon_c8, xnn_init_qu8_avgpool_minmax_neon_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004250 }
4251 }
4252 }
4253 }
4254 }
4255#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4256
4257
4258#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan08b7a972020-07-14 18:17:29 -07004259 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004260 TEST_REQUIRES_X86_SSE2;
4261 AvgPoolMicrokernelTester()
4262 .pooling_elements(9)
4263 .pooling_tile(9)
4264 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004265 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004266 }
4267
Marat Dukhan08b7a972020-07-14 18:17:29 -07004268 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004269 TEST_REQUIRES_X86_SSE2;
4270 AvgPoolMicrokernelTester()
4271 .pooling_elements(9)
4272 .pooling_tile(9)
4273 .channels(8)
4274 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004275 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004276 }
4277
Marat Dukhan08b7a972020-07-14 18:17:29 -07004278 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004279 TEST_REQUIRES_X86_SSE2;
4280 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
4281 AvgPoolMicrokernelTester()
4282 .pooling_elements(9)
4283 .pooling_tile(9)
4284 .channels(8)
4285 .input_offset(11)
4286 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004287 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004288 }
4289 }
4290
Marat Dukhan08b7a972020-07-14 18:17:29 -07004291 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004292 TEST_REQUIRES_X86_SSE2;
4293 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4294 AvgPoolMicrokernelTester()
4295 .pooling_elements(9)
4296 .pooling_tile(9)
4297 .channels(8)
4298 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004299 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004300 }
4301 }
4302
Marat Dukhan08b7a972020-07-14 18:17:29 -07004303 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004304 TEST_REQUIRES_X86_SSE2;
4305 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4306 AvgPoolMicrokernelTester()
4307 .pooling_elements(9)
4308 .pooling_tile(9)
4309 .channels(8)
4310 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004311 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004312 }
4313 }
4314
Marat Dukhan08b7a972020-07-14 18:17:29 -07004315 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004316 TEST_REQUIRES_X86_SSE2;
4317 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4318 AvgPoolMicrokernelTester()
4319 .pooling_elements(9)
4320 .pooling_tile(9)
4321 .channels(8)
4322 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004323 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004324 }
4325 }
4326
Marat Dukhan08b7a972020-07-14 18:17:29 -07004327 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004328 TEST_REQUIRES_X86_SSE2;
4329 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4330 AvgPoolMicrokernelTester()
4331 .pooling_elements(9)
4332 .pooling_tile(9)
4333 .channels(8)
4334 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004335 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004336 }
4337 }
4338
Marat Dukhan08b7a972020-07-14 18:17:29 -07004339 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004340 TEST_REQUIRES_X86_SSE2;
4341 AvgPoolMicrokernelTester()
4342 .pooling_elements(9)
4343 .pooling_tile(9)
4344 .channels(8)
4345 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004346 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004347 }
4348
Marat Dukhan08b7a972020-07-14 18:17:29 -07004349 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004350 TEST_REQUIRES_X86_SSE2;
4351 AvgPoolMicrokernelTester()
4352 .pooling_elements(9)
4353 .pooling_tile(9)
4354 .channels(8)
4355 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004356 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004357 }
4358
Marat Dukhan08b7a972020-07-14 18:17:29 -07004359 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004360 TEST_REQUIRES_X86_SSE2;
4361 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4362 AvgPoolMicrokernelTester()
4363 .pooling_elements(pooling_elements)
4364 .pooling_tile(9)
4365 .channels(8)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004366 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004367 }
4368 }
4369
Marat Dukhan08b7a972020-07-14 18:17:29 -07004370 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004371 TEST_REQUIRES_X86_SSE2;
4372 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4373 AvgPoolMicrokernelTester()
4374 .pooling_elements(pooling_elements)
4375 .pooling_tile(9)
4376 .channels(8)
4377 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004378 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004379 }
4380 }
4381
Marat Dukhan08b7a972020-07-14 18:17:29 -07004382 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_eq_8_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004383 TEST_REQUIRES_X86_SSE2;
4384 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4385 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
4386 AvgPoolMicrokernelTester()
4387 .pooling_elements(pooling_elements)
4388 .pooling_tile(9)
4389 .channels(8)
4390 .input_offset(11)
4391 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004392 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004393 }
4394 }
4395 }
4396
Marat Dukhan08b7a972020-07-14 18:17:29 -07004397 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004398 TEST_REQUIRES_X86_SSE2;
4399 for (size_t channels = 16; channels < 64; channels += 8) {
4400 AvgPoolMicrokernelTester()
4401 .pooling_elements(9)
4402 .pooling_tile(9)
4403 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004404 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004405 }
4406 }
4407
Marat Dukhan08b7a972020-07-14 18:17:29 -07004408 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004409 TEST_REQUIRES_X86_SSE2;
4410 for (size_t channels = 16; channels < 64; channels += 8) {
4411 AvgPoolMicrokernelTester()
4412 .pooling_elements(9)
4413 .pooling_tile(9)
4414 .channels(channels)
4415 .input_offset(67)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004416 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004417 }
4418 }
4419
Marat Dukhan08b7a972020-07-14 18:17:29 -07004420 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004421 TEST_REQUIRES_X86_SSE2;
4422 for (size_t channels = 16; channels < 64; channels += 8) {
4423 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
4424 AvgPoolMicrokernelTester()
4425 .pooling_elements(9)
4426 .pooling_tile(9)
4427 .channels(channels)
4428 .input_offset(67)
4429 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004430 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004431 }
4432 }
4433 }
4434
Marat Dukhan08b7a972020-07-14 18:17:29 -07004435 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004436 TEST_REQUIRES_X86_SSE2;
4437 for (size_t channels = 16; channels < 64; channels += 8) {
4438 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4439 AvgPoolMicrokernelTester()
4440 .pooling_elements(9)
4441 .pooling_tile(9)
4442 .channels(channels)
4443 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004444 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004445 }
4446 }
4447 }
4448
Marat Dukhan08b7a972020-07-14 18:17:29 -07004449 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004450 TEST_REQUIRES_X86_SSE2;
4451 for (size_t channels = 16; channels < 64; channels += 8) {
4452 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4453 AvgPoolMicrokernelTester()
4454 .pooling_elements(9)
4455 .pooling_tile(9)
4456 .channels(channels)
4457 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004458 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004459 }
4460 }
4461 }
4462
Marat Dukhan08b7a972020-07-14 18:17:29 -07004463 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004464 TEST_REQUIRES_X86_SSE2;
4465 for (size_t channels = 16; channels < 64; channels += 8) {
4466 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4467 AvgPoolMicrokernelTester()
4468 .pooling_elements(9)
4469 .pooling_tile(9)
4470 .channels(channels)
4471 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004472 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004473 }
4474 }
4475 }
4476
Marat Dukhan08b7a972020-07-14 18:17:29 -07004477 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004478 TEST_REQUIRES_X86_SSE2;
4479 for (size_t channels = 16; channels < 64; channels += 8) {
4480 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4481 AvgPoolMicrokernelTester()
4482 .pooling_elements(9)
4483 .pooling_tile(9)
4484 .channels(channels)
4485 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004486 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004487 }
4488 }
4489 }
4490
Marat Dukhan08b7a972020-07-14 18:17:29 -07004491 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004492 TEST_REQUIRES_X86_SSE2;
4493 for (size_t channels = 16; channels < 64; channels += 8) {
4494 AvgPoolMicrokernelTester()
4495 .pooling_elements(9)
4496 .pooling_tile(9)
4497 .channels(channels)
4498 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004499 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004500 }
4501 }
4502
Marat Dukhan08b7a972020-07-14 18:17:29 -07004503 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004504 TEST_REQUIRES_X86_SSE2;
4505 for (size_t channels = 16; channels < 64; channels += 8) {
4506 AvgPoolMicrokernelTester()
4507 .pooling_elements(9)
4508 .pooling_tile(9)
4509 .channels(channels)
4510 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004511 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004512 }
4513 }
4514
Marat Dukhan08b7a972020-07-14 18:17:29 -07004515 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004516 TEST_REQUIRES_X86_SSE2;
4517 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4518 for (size_t channels = 16; channels < 64; channels += 8) {
4519 AvgPoolMicrokernelTester()
4520 .pooling_elements(pooling_elements)
4521 .pooling_tile(9)
4522 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004523 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004524 }
4525 }
4526 }
4527
Marat Dukhan08b7a972020-07-14 18:17:29 -07004528 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004529 TEST_REQUIRES_X86_SSE2;
4530 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4531 for (size_t channels = 16; channels < 64; channels += 8) {
4532 AvgPoolMicrokernelTester()
4533 .pooling_elements(pooling_elements)
4534 .pooling_tile(9)
4535 .channels(channels)
4536 .input_offset(67)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004537 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004538 }
4539 }
4540 }
4541
Marat Dukhan08b7a972020-07-14 18:17:29 -07004542 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_div_8_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004543 TEST_REQUIRES_X86_SSE2;
4544 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4545 for (size_t channels = 16; channels < 64; channels += 8) {
4546 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
4547 AvgPoolMicrokernelTester()
4548 .pooling_elements(pooling_elements)
4549 .pooling_tile(9)
4550 .channels(channels)
4551 .input_offset(67)
4552 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004553 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004554 }
4555 }
4556 }
4557 }
4558
Marat Dukhan08b7a972020-07-14 18:17:29 -07004559 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004560 TEST_REQUIRES_X86_SSE2;
4561 for (size_t channels = 1; channels < 8; channels++) {
4562 AvgPoolMicrokernelTester()
4563 .pooling_elements(9)
4564 .pooling_tile(9)
4565 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004566 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004567 }
4568 }
4569
Marat Dukhan08b7a972020-07-14 18:17:29 -07004570 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004571 TEST_REQUIRES_X86_SSE2;
4572 for (size_t channels = 1; channels < 8; channels++) {
4573 AvgPoolMicrokernelTester()
4574 .pooling_elements(9)
4575 .pooling_tile(9)
4576 .channels(channels)
4577 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004578 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004579 }
4580 }
4581
Marat Dukhan08b7a972020-07-14 18:17:29 -07004582 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004583 TEST_REQUIRES_X86_SSE2;
4584 for (size_t channels = 1; channels < 8; channels++) {
4585 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
4586 AvgPoolMicrokernelTester()
4587 .pooling_elements(9)
4588 .pooling_tile(9)
4589 .channels(channels)
4590 .input_offset(11)
4591 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004592 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004593 }
4594 }
4595 }
4596
Marat Dukhan08b7a972020-07-14 18:17:29 -07004597 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004598 TEST_REQUIRES_X86_SSE2;
4599 for (size_t channels = 1; channels < 8; channels++) {
4600 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4601 AvgPoolMicrokernelTester()
4602 .pooling_elements(9)
4603 .pooling_tile(9)
4604 .channels(channels)
4605 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004606 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004607 }
4608 }
4609 }
4610
Marat Dukhan08b7a972020-07-14 18:17:29 -07004611 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004612 TEST_REQUIRES_X86_SSE2;
4613 for (size_t channels = 1; channels < 8; channels++) {
4614 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4615 AvgPoolMicrokernelTester()
4616 .pooling_elements(9)
4617 .pooling_tile(9)
4618 .channels(channels)
4619 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004620 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004621 }
4622 }
4623 }
4624
Marat Dukhan08b7a972020-07-14 18:17:29 -07004625 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004626 TEST_REQUIRES_X86_SSE2;
4627 for (size_t channels = 1; channels < 8; channels++) {
4628 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4629 AvgPoolMicrokernelTester()
4630 .pooling_elements(9)
4631 .pooling_tile(9)
4632 .channels(channels)
4633 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004634 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004635 }
4636 }
4637 }
4638
Marat Dukhan08b7a972020-07-14 18:17:29 -07004639 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004640 TEST_REQUIRES_X86_SSE2;
4641 for (size_t channels = 1; channels < 8; channels++) {
4642 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4643 AvgPoolMicrokernelTester()
4644 .pooling_elements(9)
4645 .pooling_tile(9)
4646 .channels(channels)
4647 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004648 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004649 }
4650 }
4651 }
4652
Marat Dukhan08b7a972020-07-14 18:17:29 -07004653 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004654 TEST_REQUIRES_X86_SSE2;
4655 for (size_t channels = 1; channels < 8; channels++) {
4656 AvgPoolMicrokernelTester()
4657 .pooling_elements(9)
4658 .pooling_tile(9)
4659 .channels(channels)
4660 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004661 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004662 }
4663 }
4664
Marat Dukhan08b7a972020-07-14 18:17:29 -07004665 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004666 TEST_REQUIRES_X86_SSE2;
4667 for (size_t channels = 1; channels < 8; channels++) {
4668 AvgPoolMicrokernelTester()
4669 .pooling_elements(9)
4670 .pooling_tile(9)
4671 .channels(channels)
4672 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004673 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004674 }
4675 }
4676
Marat Dukhan08b7a972020-07-14 18:17:29 -07004677 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004678 TEST_REQUIRES_X86_SSE2;
4679 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4680 for (size_t channels = 1; channels < 8; channels++) {
4681 AvgPoolMicrokernelTester()
4682 .pooling_elements(pooling_elements)
4683 .pooling_tile(9)
4684 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004685 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004686 }
4687 }
4688 }
4689
Marat Dukhan08b7a972020-07-14 18:17:29 -07004690 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004691 TEST_REQUIRES_X86_SSE2;
4692 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4693 for (size_t channels = 1; channels < 8; channels++) {
4694 AvgPoolMicrokernelTester()
4695 .pooling_elements(pooling_elements)
4696 .pooling_tile(9)
4697 .channels(channels)
4698 .input_offset(11)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004699 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004700 }
4701 }
4702 }
4703
Marat Dukhan08b7a972020-07-14 18:17:29 -07004704 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_lt_8_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004705 TEST_REQUIRES_X86_SSE2;
4706 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4707 for (size_t channels = 1; channels < 8; channels++) {
4708 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
4709 AvgPoolMicrokernelTester()
4710 .pooling_elements(pooling_elements)
4711 .pooling_tile(9)
4712 .channels(channels)
4713 .input_offset(11)
4714 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004715 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004716 }
4717 }
4718 }
4719 }
4720
Marat Dukhan08b7a972020-07-14 18:17:29 -07004721 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004722 TEST_REQUIRES_X86_SSE2;
4723 for (size_t channels = 9; channels < 16; channels++) {
4724 AvgPoolMicrokernelTester()
4725 .pooling_elements(9)
4726 .pooling_tile(9)
4727 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004728 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004729 }
4730 }
4731
Marat Dukhan08b7a972020-07-14 18:17:29 -07004732 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004733 TEST_REQUIRES_X86_SSE2;
4734 for (size_t channels = 9; channels < 16; channels++) {
4735 AvgPoolMicrokernelTester()
4736 .pooling_elements(9)
4737 .pooling_tile(9)
4738 .channels(channels)
4739 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004740 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004741 }
4742 }
4743
Marat Dukhan08b7a972020-07-14 18:17:29 -07004744 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004745 TEST_REQUIRES_X86_SSE2;
4746 for (size_t channels = 9; channels < 16; channels++) {
4747 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
4748 AvgPoolMicrokernelTester()
4749 .pooling_elements(9)
4750 .pooling_tile(9)
4751 .channels(channels)
4752 .input_offset(17)
4753 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004754 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004755 }
4756 }
4757 }
4758
Marat Dukhan08b7a972020-07-14 18:17:29 -07004759 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004760 TEST_REQUIRES_X86_SSE2;
4761 for (size_t channels = 9; channels < 16; channels++) {
4762 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4763 AvgPoolMicrokernelTester()
4764 .pooling_elements(9)
4765 .pooling_tile(9)
4766 .channels(channels)
4767 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004768 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004769 }
4770 }
4771 }
4772
Marat Dukhan08b7a972020-07-14 18:17:29 -07004773 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004774 TEST_REQUIRES_X86_SSE2;
4775 for (size_t channels = 9; channels < 16; channels++) {
4776 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4777 AvgPoolMicrokernelTester()
4778 .pooling_elements(9)
4779 .pooling_tile(9)
4780 .channels(channels)
4781 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004782 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004783 }
4784 }
4785 }
4786
Marat Dukhan08b7a972020-07-14 18:17:29 -07004787 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004788 TEST_REQUIRES_X86_SSE2;
4789 for (size_t channels = 9; channels < 16; channels++) {
4790 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4791 AvgPoolMicrokernelTester()
4792 .pooling_elements(9)
4793 .pooling_tile(9)
4794 .channels(channels)
4795 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004796 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004797 }
4798 }
4799 }
4800
Marat Dukhan08b7a972020-07-14 18:17:29 -07004801 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004802 TEST_REQUIRES_X86_SSE2;
4803 for (size_t channels = 9; channels < 16; channels++) {
4804 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4805 AvgPoolMicrokernelTester()
4806 .pooling_elements(9)
4807 .pooling_tile(9)
4808 .channels(channels)
4809 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004810 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004811 }
4812 }
4813 }
4814
Marat Dukhan08b7a972020-07-14 18:17:29 -07004815 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004816 TEST_REQUIRES_X86_SSE2;
4817 for (size_t channels = 9; channels < 16; channels++) {
4818 AvgPoolMicrokernelTester()
4819 .pooling_elements(9)
4820 .pooling_tile(9)
4821 .channels(channels)
4822 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004823 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004824 }
4825 }
4826
Marat Dukhan08b7a972020-07-14 18:17:29 -07004827 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004828 TEST_REQUIRES_X86_SSE2;
4829 for (size_t channels = 9; channels < 16; channels++) {
4830 AvgPoolMicrokernelTester()
4831 .pooling_elements(9)
4832 .pooling_tile(9)
4833 .channels(channels)
4834 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004835 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004836 }
4837 }
4838
Marat Dukhan08b7a972020-07-14 18:17:29 -07004839 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004840 TEST_REQUIRES_X86_SSE2;
4841 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4842 for (size_t channels = 9; channels < 16; channels++) {
4843 AvgPoolMicrokernelTester()
4844 .pooling_elements(pooling_elements)
4845 .pooling_tile(9)
4846 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004847 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004848 }
4849 }
4850 }
4851
Marat Dukhan08b7a972020-07-14 18:17:29 -07004852 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004853 TEST_REQUIRES_X86_SSE2;
4854 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4855 for (size_t channels = 9; channels < 16; channels++) {
4856 AvgPoolMicrokernelTester()
4857 .pooling_elements(pooling_elements)
4858 .pooling_tile(9)
4859 .channels(channels)
4860 .input_offset(17)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004861 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004862 }
4863 }
4864 }
4865
Marat Dukhan08b7a972020-07-14 18:17:29 -07004866 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, channels_gt_8_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004867 TEST_REQUIRES_X86_SSE2;
4868 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
4869 for (size_t channels = 9; channels < 16; channels++) {
4870 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
4871 AvgPoolMicrokernelTester()
4872 .pooling_elements(pooling_elements)
4873 .pooling_tile(9)
4874 .channels(channels)
4875 .input_offset(17)
4876 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004877 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004878 }
4879 }
4880 }
4881 }
4882
Marat Dukhan08b7a972020-07-14 18:17:29 -07004883 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004884 TEST_REQUIRES_X86_SSE2;
4885 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4886 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4887 for (size_t channels = 1; channels <= 40; channels += 7) {
4888 AvgPoolMicrokernelTester()
4889 .output_pixels(output_pixels)
4890 .pooling_elements(pooling_elements)
4891 .pooling_tile(9, 0)
4892 .channels(channels)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004893 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004894 }
4895 }
4896 }
4897 }
4898
Marat Dukhan08b7a972020-07-14 18:17:29 -07004899 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004900 TEST_REQUIRES_X86_SSE2;
4901 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4902 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4903 for (size_t channels = 1; channels <= 40; channels += 7) {
4904 AvgPoolMicrokernelTester()
4905 .output_pixels(output_pixels)
4906 .pooling_elements(pooling_elements)
4907 .pooling_tile(9, 0)
4908 .channels(channels)
4909 .input_offset(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004910 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004911 }
4912 }
4913 }
4914 }
4915
Marat Dukhan08b7a972020-07-14 18:17:29 -07004916 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004917 TEST_REQUIRES_X86_SSE2;
4918 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4919 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4920 for (size_t channels = 1; channels <= 40; channels += 7) {
4921 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
4922 AvgPoolMicrokernelTester()
4923 .output_pixels(output_pixels)
4924 .pooling_elements(pooling_elements)
4925 .pooling_tile(9, 0)
4926 .channels(channels)
4927 .input_offset(43)
4928 .zero_index(zero_index)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004929 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08004930 }
4931 }
4932 }
4933 }
4934 }
4935
Marat Dukhan08b7a972020-07-14 18:17:29 -07004936 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004937 TEST_REQUIRES_X86_SSE2;
4938 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4939 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4940 for (size_t channels = 1; channels <= 40; channels += 7) {
4941 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4942 AvgPoolMicrokernelTester()
4943 .output_pixels(output_pixels)
4944 .pooling_elements(pooling_elements)
4945 .pooling_tile(9)
4946 .channels(channels)
4947 .input_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004948 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004949 }
4950 }
4951 }
4952 }
4953 }
4954
Marat Dukhan08b7a972020-07-14 18:17:29 -07004955 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004956 TEST_REQUIRES_X86_SSE2;
4957 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4958 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4959 for (size_t channels = 1; channels <= 40; channels += 7) {
4960 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4961 AvgPoolMicrokernelTester()
4962 .output_pixels(output_pixels)
4963 .pooling_elements(pooling_elements)
4964 .pooling_tile(9)
4965 .channels(channels)
4966 .input_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004967 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004968 }
4969 }
4970 }
4971 }
4972 }
4973
Marat Dukhan08b7a972020-07-14 18:17:29 -07004974 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004975 TEST_REQUIRES_X86_SSE2;
4976 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4977 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4978 for (size_t channels = 1; channels <= 40; channels += 7) {
4979 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
4980 AvgPoolMicrokernelTester()
4981 .output_pixels(output_pixels)
4982 .pooling_elements(pooling_elements)
4983 .pooling_tile(9)
4984 .channels(channels)
4985 .output_scale(scale)
Marat Dukhan3c949a32022-01-09 20:12:33 -08004986 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004987 }
4988 }
4989 }
4990 }
4991 }
4992
Marat Dukhan08b7a972020-07-14 18:17:29 -07004993 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08004994 TEST_REQUIRES_X86_SSE2;
4995 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
4996 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
4997 for (size_t channels = 1; channels <= 40; channels += 7) {
4998 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
4999 AvgPoolMicrokernelTester()
5000 .output_pixels(output_pixels)
5001 .pooling_elements(pooling_elements)
5002 .pooling_tile(9)
5003 .channels(channels)
5004 .output_zero_point(zero_point)
Marat Dukhan3c949a32022-01-09 20:12:33 -08005005 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005006 }
5007 }
5008 }
5009 }
5010 }
5011
Marat Dukhan08b7a972020-07-14 18:17:29 -07005012 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005013 TEST_REQUIRES_X86_SSE2;
5014 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5015 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5016 for (size_t channels = 1; channels <= 40; channels += 7) {
5017 AvgPoolMicrokernelTester()
5018 .output_pixels(output_pixels)
5019 .pooling_elements(pooling_elements)
5020 .pooling_tile(9, 0)
5021 .channels(channels)
5022 .qmin(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08005023 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005024 }
5025 }
5026 }
5027 }
5028
Marat Dukhan08b7a972020-07-14 18:17:29 -07005029 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005030 TEST_REQUIRES_X86_SSE2;
5031 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5032 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5033 for (size_t channels = 1; channels <= 40; channels += 7) {
5034 AvgPoolMicrokernelTester()
5035 .output_pixels(output_pixels)
5036 .pooling_elements(pooling_elements)
5037 .pooling_tile(9, 0)
5038 .channels(channels)
5039 .qmax(128)
Marat Dukhan3c949a32022-01-09 20:12:33 -08005040 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005041 }
5042 }
5043 }
5044 }
5045
Marat Dukhan08b7a972020-07-14 18:17:29 -07005046 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_output_stride) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005047 TEST_REQUIRES_X86_SSE2;
5048 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5049 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5050 for (size_t channels = 1; channels <= 40; channels += 7) {
5051 AvgPoolMicrokernelTester()
5052 .output_pixels(output_pixels)
5053 .pooling_elements(pooling_elements)
5054 .pooling_tile(9, 0)
5055 .channels(channels)
5056 .output_stride(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08005057 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005058 }
5059 }
5060 }
5061 }
5062
Marat Dukhan08b7a972020-07-14 18:17:29 -07005063 TEST(QU8_AVGPOOL_MINMAX_9X__SSE2_C8, few_output_pixels_with_step) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005064 TEST_REQUIRES_X86_SSE2;
5065 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5066 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5067 for (size_t channels = 1; channels <= 40; channels += 7) {
5068 for (size_t step = 2; step <= pooling_elements; step++) {
5069 AvgPoolMicrokernelTester()
5070 .output_pixels(output_pixels)
5071 .pooling_elements(pooling_elements)
5072 .pooling_tile(9, 0)
5073 .step(step)
5074 .channels(channels)
5075 .output_stride(43)
Marat Dukhan3c949a32022-01-09 20:12:33 -08005076 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__sse2_c8, xnn_init_qu8_avgpool_minmax_sse2_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005077 }
5078 }
5079 }
5080 }
5081 }
5082#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
5083
5084
Marat Dukhan08b7a972020-07-14 18:17:29 -07005085TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005086 AvgPoolMicrokernelTester()
5087 .pooling_elements(9)
5088 .pooling_tile(9)
5089 .channels(1)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005090 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005091}
5092
Marat Dukhan08b7a972020-07-14 18:17:29 -07005093TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005094 AvgPoolMicrokernelTester()
5095 .pooling_elements(9)
5096 .pooling_tile(9)
5097 .channels(1)
5098 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005099 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005100}
5101
Marat Dukhan08b7a972020-07-14 18:17:29 -07005102TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005103 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
5104 AvgPoolMicrokernelTester()
5105 .pooling_elements(9)
5106 .pooling_tile(9)
5107 .channels(1)
5108 .input_offset(3)
5109 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005110 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005111 }
5112}
5113
Marat Dukhan08b7a972020-07-14 18:17:29 -07005114TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005115 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
5116 AvgPoolMicrokernelTester()
5117 .pooling_elements(9)
5118 .pooling_tile(9)
5119 .channels(1)
5120 .input_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005121 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005122 }
5123}
5124
Marat Dukhan08b7a972020-07-14 18:17:29 -07005125TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005126 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
5127 AvgPoolMicrokernelTester()
5128 .pooling_elements(9)
5129 .pooling_tile(9)
5130 .channels(1)
5131 .input_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005132 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005133 }
5134}
5135
Marat Dukhan08b7a972020-07-14 18:17:29 -07005136TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005137 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
5138 AvgPoolMicrokernelTester()
5139 .pooling_elements(9)
5140 .pooling_tile(9)
5141 .channels(1)
5142 .output_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005143 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005144 }
5145}
5146
Marat Dukhan08b7a972020-07-14 18:17:29 -07005147TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005148 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
5149 AvgPoolMicrokernelTester()
5150 .pooling_elements(9)
5151 .pooling_tile(9)
5152 .channels(1)
5153 .output_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005154 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005155 }
5156}
5157
Marat Dukhan08b7a972020-07-14 18:17:29 -07005158TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005159 AvgPoolMicrokernelTester()
5160 .pooling_elements(9)
5161 .pooling_tile(9)
5162 .channels(1)
5163 .qmin(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005164 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005165}
5166
Marat Dukhan08b7a972020-07-14 18:17:29 -07005167TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005168 AvgPoolMicrokernelTester()
5169 .pooling_elements(9)
5170 .pooling_tile(9)
5171 .channels(1)
5172 .qmax(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005173 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005174}
5175
Marat Dukhan08b7a972020-07-14 18:17:29 -07005176TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005177 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
5178 AvgPoolMicrokernelTester()
5179 .pooling_elements(pooling_elements)
5180 .pooling_tile(9)
5181 .channels(1)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005182 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005183 }
5184}
5185
Marat Dukhan08b7a972020-07-14 18:17:29 -07005186TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005187 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
5188 AvgPoolMicrokernelTester()
5189 .pooling_elements(pooling_elements)
5190 .pooling_tile(9)
5191 .channels(1)
5192 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005193 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005194 }
5195}
5196
Marat Dukhan08b7a972020-07-14 18:17:29 -07005197TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_eq_1_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005198 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
5199 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
5200 AvgPoolMicrokernelTester()
5201 .pooling_elements(pooling_elements)
5202 .pooling_tile(9)
5203 .channels(1)
5204 .input_offset(3)
5205 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005206 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005207 }
5208 }
5209}
5210
Marat Dukhan08b7a972020-07-14 18:17:29 -07005211TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005212 for (size_t channels = 2; channels < 10; channels++) {
5213 AvgPoolMicrokernelTester()
5214 .pooling_elements(9)
5215 .pooling_tile(9)
5216 .channels(channels)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005217 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005218 }
5219}
5220
Marat Dukhan08b7a972020-07-14 18:17:29 -07005221TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005222 for (size_t channels = 2; channels < 10; channels++) {
5223 AvgPoolMicrokernelTester()
5224 .pooling_elements(9)
5225 .pooling_tile(9)
5226 .channels(channels)
5227 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005228 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005229 }
5230}
5231
Marat Dukhan08b7a972020-07-14 18:17:29 -07005232TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005233 for (size_t channels = 2; channels < 10; channels++) {
5234 for (size_t zero_index = 0; zero_index < 9; zero_index++) {
5235 AvgPoolMicrokernelTester()
5236 .pooling_elements(9)
5237 .pooling_tile(9)
5238 .channels(channels)
5239 .input_offset(3)
5240 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005241 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005242 }
5243 }
5244}
5245
Marat Dukhan08b7a972020-07-14 18:17:29 -07005246TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005247 for (size_t channels = 2; channels < 10; channels++) {
5248 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
5249 AvgPoolMicrokernelTester()
5250 .pooling_elements(9)
5251 .pooling_tile(9)
5252 .channels(channels)
5253 .input_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005254 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005255 }
5256 }
5257}
5258
Marat Dukhan08b7a972020-07-14 18:17:29 -07005259TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005260 for (size_t channels = 2; channels < 10; channels++) {
5261 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
5262 AvgPoolMicrokernelTester()
5263 .pooling_elements(9)
5264 .pooling_tile(9)
5265 .channels(channels)
5266 .input_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005267 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005268 }
5269 }
5270}
5271
Marat Dukhan08b7a972020-07-14 18:17:29 -07005272TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005273 for (size_t channels = 2; channels < 10; channels++) {
5274 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
5275 AvgPoolMicrokernelTester()
5276 .pooling_elements(9)
5277 .pooling_tile(9)
5278 .channels(channels)
5279 .output_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005280 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005281 }
5282 }
5283}
5284
Marat Dukhan08b7a972020-07-14 18:17:29 -07005285TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005286 for (size_t channels = 2; channels < 10; channels++) {
5287 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
5288 AvgPoolMicrokernelTester()
5289 .pooling_elements(9)
5290 .pooling_tile(9)
5291 .channels(channels)
5292 .output_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005293 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005294 }
5295 }
5296}
5297
Marat Dukhan08b7a972020-07-14 18:17:29 -07005298TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005299 for (size_t channels = 2; channels < 10; channels++) {
5300 AvgPoolMicrokernelTester()
5301 .pooling_elements(9)
5302 .pooling_tile(9)
5303 .channels(channels)
5304 .qmin(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005305 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005306 }
5307}
5308
Marat Dukhan08b7a972020-07-14 18:17:29 -07005309TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005310 for (size_t channels = 2; channels < 10; channels++) {
5311 AvgPoolMicrokernelTester()
5312 .pooling_elements(9)
5313 .pooling_tile(9)
5314 .channels(channels)
5315 .qmax(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005316 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005317 }
5318}
5319
Marat Dukhan08b7a972020-07-14 18:17:29 -07005320TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_subtile) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005321 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
5322 for (size_t channels = 2; channels < 10; channels++) {
5323 AvgPoolMicrokernelTester()
5324 .pooling_elements(pooling_elements)
5325 .pooling_tile(9)
5326 .channels(channels)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005327 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005328 }
5329 }
5330}
5331
Marat Dukhan08b7a972020-07-14 18:17:29 -07005332TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_subtile_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005333 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
5334 for (size_t channels = 2; channels < 10; channels++) {
5335 AvgPoolMicrokernelTester()
5336 .pooling_elements(pooling_elements)
5337 .pooling_tile(9)
5338 .channels(channels)
5339 .input_offset(3)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005340 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005341 }
5342 }
5343}
5344
Marat Dukhan08b7a972020-07-14 18:17:29 -07005345TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, channels_gt_1_unipass_subtile_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005346 for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
5347 for (size_t channels = 2; channels < 10; channels++) {
5348 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
5349 AvgPoolMicrokernelTester()
5350 .pooling_elements(pooling_elements)
5351 .pooling_tile(9)
5352 .channels(channels)
5353 .input_offset(3)
5354 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005355 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005356 }
5357 }
5358 }
5359}
5360
Marat Dukhan08b7a972020-07-14 18:17:29 -07005361TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005362 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5363 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5364 for (size_t channels = 1; channels <= 5; channels += 1) {
5365 AvgPoolMicrokernelTester()
5366 .output_pixels(output_pixels)
5367 .pooling_elements(pooling_elements)
5368 .pooling_tile(9, 0)
5369 .channels(channels)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005370 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005371 }
5372 }
5373 }
5374}
5375
Marat Dukhan08b7a972020-07-14 18:17:29 -07005376TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_input_offset) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005377 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5378 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5379 for (size_t channels = 1; channels <= 5; channels += 1) {
5380 AvgPoolMicrokernelTester()
5381 .output_pixels(output_pixels)
5382 .pooling_elements(pooling_elements)
5383 .pooling_tile(9, 0)
5384 .channels(channels)
5385 .input_offset(7)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005386 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005387 }
5388 }
5389 }
5390}
5391
Marat Dukhan08b7a972020-07-14 18:17:29 -07005392TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_zero) {
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005393 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5394 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5395 for (size_t channels = 1; channels <= 5; channels += 1) {
5396 for (size_t zero_index = 0; zero_index < pooling_elements; zero_index++) {
5397 AvgPoolMicrokernelTester()
5398 .output_pixels(output_pixels)
5399 .pooling_elements(pooling_elements)
5400 .pooling_tile(9, 0)
5401 .channels(channels)
5402 .input_offset(7)
5403 .zero_index(zero_index)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005404 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhanee1f63e2020-02-27 15:43:52 -08005405 }
5406 }
5407 }
5408 }
5409}
5410
Marat Dukhan08b7a972020-07-14 18:17:29 -07005411TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_input_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005412 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5413 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5414 for (size_t channels = 1; channels <= 5; channels += 1) {
5415 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
5416 AvgPoolMicrokernelTester()
5417 .output_pixels(output_pixels)
5418 .pooling_elements(pooling_elements)
5419 .pooling_tile(9)
5420 .channels(channels)
5421 .input_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005422 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005423 }
5424 }
5425 }
5426 }
5427}
5428
Marat Dukhan08b7a972020-07-14 18:17:29 -07005429TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_input_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005430 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5431 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5432 for (size_t channels = 1; channels <= 5; channels += 1) {
5433 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
5434 AvgPoolMicrokernelTester()
5435 .output_pixels(output_pixels)
5436 .pooling_elements(pooling_elements)
5437 .pooling_tile(9)
5438 .channels(channels)
5439 .input_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005440 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005441 }
5442 }
5443 }
5444 }
5445}
5446
Marat Dukhan08b7a972020-07-14 18:17:29 -07005447TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_output_scale) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005448 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5449 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5450 for (size_t channels = 1; channels <= 5; channels += 1) {
5451 for (float scale = 0.01f; scale < 100.0f; scale *= 3.14159265f) {
5452 AvgPoolMicrokernelTester()
5453 .output_pixels(output_pixels)
5454 .pooling_elements(pooling_elements)
5455 .pooling_tile(9)
5456 .channels(channels)
5457 .output_scale(scale)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005458 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005459 }
5460 }
5461 }
5462 }
5463}
5464
Marat Dukhan08b7a972020-07-14 18:17:29 -07005465TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_output_zero_point) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005466 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5467 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5468 for (size_t channels = 1; channels <= 5; channels += 1) {
5469 for (int32_t zero_point = 0; zero_point <= 255; zero_point += 51) {
5470 AvgPoolMicrokernelTester()
5471 .output_pixels(output_pixels)
5472 .pooling_elements(pooling_elements)
5473 .pooling_tile(9)
5474 .channels(channels)
5475 .output_zero_point(zero_point)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005476 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005477 }
5478 }
5479 }
5480 }
5481}
5482
Marat Dukhan08b7a972020-07-14 18:17:29 -07005483TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_qmin) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005484 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5485 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5486 for (size_t channels = 1; channels <= 5; channels += 1) {
5487 AvgPoolMicrokernelTester()
5488 .output_pixels(output_pixels)
5489 .pooling_elements(pooling_elements)
5490 .pooling_tile(9, 0)
5491 .channels(channels)
5492 .qmin(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005493 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005494 }
5495 }
5496 }
5497}
5498
Marat Dukhan08b7a972020-07-14 18:17:29 -07005499TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_qmax) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005500 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5501 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5502 for (size_t channels = 1; channels <= 5; channels += 1) {
5503 AvgPoolMicrokernelTester()
5504 .output_pixels(output_pixels)
5505 .pooling_elements(pooling_elements)
5506 .pooling_tile(9, 0)
5507 .channels(channels)
5508 .qmax(128)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005509 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005510 }
5511 }
5512 }
5513}
5514
Marat Dukhan08b7a972020-07-14 18:17:29 -07005515TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_output_stride) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005516 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5517 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5518 for (size_t channels = 1; channels <= 5; channels += 1) {
5519 AvgPoolMicrokernelTester()
5520 .output_pixels(output_pixels)
5521 .pooling_elements(pooling_elements)
5522 .pooling_tile(9, 0)
5523 .channels(channels)
5524 .output_stride(7)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005525 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005526 }
5527 }
5528 }
5529}
5530
Marat Dukhan08b7a972020-07-14 18:17:29 -07005531TEST(QU8_AVGPOOL_MINMAX_9X__SCALAR_C1, few_output_pixels_with_step) {
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005532 for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
5533 for (size_t pooling_elements : std::vector<size_t>{{2, 8, 9}}) {
5534 for (size_t channels = 1; channels <= 5; channels += 1) {
5535 for (size_t step = 2; step <= pooling_elements; step++) {
5536 AvgPoolMicrokernelTester()
5537 .output_pixels(output_pixels)
5538 .pooling_elements(pooling_elements)
5539 .pooling_tile(9, 0)
5540 .step(step)
5541 .channels(channels)
5542 .output_stride(7)
Marat Dukhan4a6dca92022-01-07 17:22:24 -08005543 .Test(xnn_qu8_avgpool_minmax_ukernel_9x__scalar_c1, xnn_init_qu8_avgpool_minmax_scalar_params);
Marat Dukhan6ee435a2020-02-26 22:33:38 -08005544 }
5545 }
5546 }
5547 }
5548}