Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| 5 | // |
| 6 | // Auto-generated file. Do not edit! |
| 7 | // Specification: test/qu8-vmulc-minmax-rndnu.yaml |
| 8 | // Generator: tools/generate-vbinary-test.py |
| 9 | |
| 10 | |
| 11 | #include <gtest/gtest.h> |
| 12 | |
| 13 | #include <xnnpack/common.h> |
| 14 | #include <xnnpack/isa-checks.h> |
| 15 | |
| 16 | #include <xnnpack/params-init.h> |
| 17 | #include <xnnpack/vmul.h> |
| 18 | #include "vmulc-microkernel-tester.h" |
| 19 | |
| 20 | |
| 21 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 22 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, batch_eq_8) { |
| 23 | TEST_REQUIRES_ARM_NEON; |
| 24 | VMulCMicrokernelTester() |
| 25 | .batch_size(8) |
| 26 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 27 | } |
| 28 | |
| 29 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, batch_div_8) { |
| 30 | TEST_REQUIRES_ARM_NEON; |
| 31 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
| 32 | VMulCMicrokernelTester() |
| 33 | .batch_size(batch_size) |
| 34 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 35 | } |
| 36 | } |
| 37 | |
| 38 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, batch_lt_8) { |
| 39 | TEST_REQUIRES_ARM_NEON; |
| 40 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
| 41 | VMulCMicrokernelTester() |
| 42 | .batch_size(batch_size) |
| 43 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 44 | } |
| 45 | } |
| 46 | |
| 47 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, batch_gt_8) { |
| 48 | TEST_REQUIRES_ARM_NEON; |
| 49 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
| 50 | VMulCMicrokernelTester() |
| 51 | .batch_size(batch_size) |
| 52 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, inplace) { |
| 57 | TEST_REQUIRES_ARM_NEON; |
| 58 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 59 | VMulCMicrokernelTester() |
| 60 | .batch_size(batch_size) |
| 61 | .inplace(true) |
| 62 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 63 | } |
| 64 | } |
| 65 | |
| 66 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, a_zero_point) { |
| 67 | TEST_REQUIRES_ARM_NEON; |
| 68 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 69 | for (int32_t a_zero_point = -128; a_zero_point <= 127; a_zero_point += 51) { |
| 70 | VMulCMicrokernelTester() |
| 71 | .batch_size(batch_size) |
| 72 | .a_zero_point(a_zero_point) |
| 73 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 74 | } |
| 75 | } |
| 76 | } |
| 77 | |
| 78 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, b_zero_point) { |
| 79 | TEST_REQUIRES_ARM_NEON; |
| 80 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 81 | for (int32_t b_zero_point = -128; b_zero_point <= 127; b_zero_point += 51) { |
| 82 | VMulCMicrokernelTester() |
| 83 | .batch_size(batch_size) |
| 84 | .b_zero_point(b_zero_point) |
| 85 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 86 | } |
| 87 | } |
| 88 | } |
| 89 | |
| 90 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, y_zero_point) { |
| 91 | TEST_REQUIRES_ARM_NEON; |
| 92 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 93 | for (int32_t y_zero_point = -128; y_zero_point <= 127; y_zero_point += 51) { |
| 94 | VMulCMicrokernelTester() |
| 95 | .batch_size(batch_size) |
| 96 | .y_zero_point(y_zero_point) |
| 97 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 98 | } |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, a_scale) { |
| 103 | TEST_REQUIRES_ARM_NEON; |
| 104 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 105 | for (float a_scale = 0.1f; a_scale <= 10.0f; a_scale *= 3.14f) { |
| 106 | VMulCMicrokernelTester() |
| 107 | .batch_size(batch_size) |
| 108 | .a_scale(a_scale) |
| 109 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 110 | } |
| 111 | } |
| 112 | } |
| 113 | |
| 114 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, b_scale) { |
| 115 | TEST_REQUIRES_ARM_NEON; |
| 116 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 117 | for (float b_scale = 0.1f; b_scale <= 10.0f; b_scale *= 3.14f) { |
| 118 | VMulCMicrokernelTester() |
| 119 | .batch_size(batch_size) |
| 120 | .b_scale(b_scale) |
| 121 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 122 | } |
| 123 | } |
| 124 | } |
| 125 | |
| 126 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, y_scale) { |
| 127 | TEST_REQUIRES_ARM_NEON; |
| 128 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 129 | for (float y_scale = 0.1f; y_scale <= 10.0f; y_scale *= 3.14f) { |
| 130 | VMulCMicrokernelTester() |
| 131 | .batch_size(batch_size) |
| 132 | .y_scale(y_scale) |
| 133 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 134 | } |
| 135 | } |
| 136 | } |
| 137 | |
| 138 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, qmin) { |
| 139 | TEST_REQUIRES_ARM_NEON; |
| 140 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 141 | VMulCMicrokernelTester() |
| 142 | .batch_size(batch_size) |
| 143 | .qmin(128) |
| 144 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 145 | } |
| 146 | } |
| 147 | |
| 148 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X8, qmax) { |
| 149 | TEST_REQUIRES_ARM_NEON; |
| 150 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 151 | VMulCMicrokernelTester() |
| 152 | .batch_size(batch_size) |
| 153 | .qmax(128) |
| 154 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x8, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 155 | } |
| 156 | } |
| 157 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 158 | |
| 159 | |
| 160 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 161 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, batch_eq_16) { |
| 162 | TEST_REQUIRES_ARM_NEON; |
| 163 | VMulCMicrokernelTester() |
| 164 | .batch_size(16) |
| 165 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 166 | } |
| 167 | |
| 168 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, batch_div_16) { |
| 169 | TEST_REQUIRES_ARM_NEON; |
| 170 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
| 171 | VMulCMicrokernelTester() |
| 172 | .batch_size(batch_size) |
| 173 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 174 | } |
| 175 | } |
| 176 | |
| 177 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, batch_lt_16) { |
| 178 | TEST_REQUIRES_ARM_NEON; |
| 179 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
| 180 | VMulCMicrokernelTester() |
| 181 | .batch_size(batch_size) |
| 182 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 183 | } |
| 184 | } |
| 185 | |
| 186 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, batch_gt_16) { |
| 187 | TEST_REQUIRES_ARM_NEON; |
| 188 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
| 189 | VMulCMicrokernelTester() |
| 190 | .batch_size(batch_size) |
| 191 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 192 | } |
| 193 | } |
| 194 | |
| 195 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, inplace) { |
| 196 | TEST_REQUIRES_ARM_NEON; |
| 197 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 198 | VMulCMicrokernelTester() |
| 199 | .batch_size(batch_size) |
| 200 | .inplace(true) |
| 201 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 202 | } |
| 203 | } |
| 204 | |
| 205 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, a_zero_point) { |
| 206 | TEST_REQUIRES_ARM_NEON; |
| 207 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 208 | for (int32_t a_zero_point = -128; a_zero_point <= 127; a_zero_point += 51) { |
| 209 | VMulCMicrokernelTester() |
| 210 | .batch_size(batch_size) |
| 211 | .a_zero_point(a_zero_point) |
| 212 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 213 | } |
| 214 | } |
| 215 | } |
| 216 | |
| 217 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, b_zero_point) { |
| 218 | TEST_REQUIRES_ARM_NEON; |
| 219 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 220 | for (int32_t b_zero_point = -128; b_zero_point <= 127; b_zero_point += 51) { |
| 221 | VMulCMicrokernelTester() |
| 222 | .batch_size(batch_size) |
| 223 | .b_zero_point(b_zero_point) |
| 224 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 225 | } |
| 226 | } |
| 227 | } |
| 228 | |
| 229 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, y_zero_point) { |
| 230 | TEST_REQUIRES_ARM_NEON; |
| 231 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 232 | for (int32_t y_zero_point = -128; y_zero_point <= 127; y_zero_point += 51) { |
| 233 | VMulCMicrokernelTester() |
| 234 | .batch_size(batch_size) |
| 235 | .y_zero_point(y_zero_point) |
| 236 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 237 | } |
| 238 | } |
| 239 | } |
| 240 | |
| 241 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, a_scale) { |
| 242 | TEST_REQUIRES_ARM_NEON; |
| 243 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 244 | for (float a_scale = 0.1f; a_scale <= 10.0f; a_scale *= 3.14f) { |
| 245 | VMulCMicrokernelTester() |
| 246 | .batch_size(batch_size) |
| 247 | .a_scale(a_scale) |
| 248 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 249 | } |
| 250 | } |
| 251 | } |
| 252 | |
| 253 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, b_scale) { |
| 254 | TEST_REQUIRES_ARM_NEON; |
| 255 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 256 | for (float b_scale = 0.1f; b_scale <= 10.0f; b_scale *= 3.14f) { |
| 257 | VMulCMicrokernelTester() |
| 258 | .batch_size(batch_size) |
| 259 | .b_scale(b_scale) |
| 260 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 261 | } |
| 262 | } |
| 263 | } |
| 264 | |
| 265 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, y_scale) { |
| 266 | TEST_REQUIRES_ARM_NEON; |
| 267 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 268 | for (float y_scale = 0.1f; y_scale <= 10.0f; y_scale *= 3.14f) { |
| 269 | VMulCMicrokernelTester() |
| 270 | .batch_size(batch_size) |
| 271 | .y_scale(y_scale) |
| 272 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 273 | } |
| 274 | } |
| 275 | } |
| 276 | |
| 277 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, qmin) { |
| 278 | TEST_REQUIRES_ARM_NEON; |
| 279 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 280 | VMulCMicrokernelTester() |
| 281 | .batch_size(batch_size) |
| 282 | .qmin(128) |
| 283 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 284 | } |
| 285 | } |
| 286 | |
| 287 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD64_X16, qmax) { |
| 288 | TEST_REQUIRES_ARM_NEON; |
| 289 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 290 | VMulCMicrokernelTester() |
| 291 | .batch_size(batch_size) |
| 292 | .qmax(128) |
| 293 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld64_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 294 | } |
| 295 | } |
| 296 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 297 | |
| 298 | |
| 299 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 300 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, batch_eq_16) { |
| 301 | TEST_REQUIRES_ARM_NEON; |
| 302 | VMulCMicrokernelTester() |
| 303 | .batch_size(16) |
| 304 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 305 | } |
| 306 | |
| 307 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, batch_div_16) { |
| 308 | TEST_REQUIRES_ARM_NEON; |
| 309 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
| 310 | VMulCMicrokernelTester() |
| 311 | .batch_size(batch_size) |
| 312 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 313 | } |
| 314 | } |
| 315 | |
| 316 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, batch_lt_16) { |
| 317 | TEST_REQUIRES_ARM_NEON; |
| 318 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
| 319 | VMulCMicrokernelTester() |
| 320 | .batch_size(batch_size) |
| 321 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 322 | } |
| 323 | } |
| 324 | |
| 325 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, batch_gt_16) { |
| 326 | TEST_REQUIRES_ARM_NEON; |
| 327 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
| 328 | VMulCMicrokernelTester() |
| 329 | .batch_size(batch_size) |
| 330 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 331 | } |
| 332 | } |
| 333 | |
| 334 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, inplace) { |
| 335 | TEST_REQUIRES_ARM_NEON; |
| 336 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 337 | VMulCMicrokernelTester() |
| 338 | .batch_size(batch_size) |
| 339 | .inplace(true) |
| 340 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 341 | } |
| 342 | } |
| 343 | |
| 344 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, a_zero_point) { |
| 345 | TEST_REQUIRES_ARM_NEON; |
| 346 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 347 | for (int32_t a_zero_point = -128; a_zero_point <= 127; a_zero_point += 51) { |
| 348 | VMulCMicrokernelTester() |
| 349 | .batch_size(batch_size) |
| 350 | .a_zero_point(a_zero_point) |
| 351 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 352 | } |
| 353 | } |
| 354 | } |
| 355 | |
| 356 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, b_zero_point) { |
| 357 | TEST_REQUIRES_ARM_NEON; |
| 358 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 359 | for (int32_t b_zero_point = -128; b_zero_point <= 127; b_zero_point += 51) { |
| 360 | VMulCMicrokernelTester() |
| 361 | .batch_size(batch_size) |
| 362 | .b_zero_point(b_zero_point) |
| 363 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 364 | } |
| 365 | } |
| 366 | } |
| 367 | |
| 368 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, y_zero_point) { |
| 369 | TEST_REQUIRES_ARM_NEON; |
| 370 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 371 | for (int32_t y_zero_point = -128; y_zero_point <= 127; y_zero_point += 51) { |
| 372 | VMulCMicrokernelTester() |
| 373 | .batch_size(batch_size) |
| 374 | .y_zero_point(y_zero_point) |
| 375 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 376 | } |
| 377 | } |
| 378 | } |
| 379 | |
| 380 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, a_scale) { |
| 381 | TEST_REQUIRES_ARM_NEON; |
| 382 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 383 | for (float a_scale = 0.1f; a_scale <= 10.0f; a_scale *= 3.14f) { |
| 384 | VMulCMicrokernelTester() |
| 385 | .batch_size(batch_size) |
| 386 | .a_scale(a_scale) |
| 387 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 388 | } |
| 389 | } |
| 390 | } |
| 391 | |
| 392 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, b_scale) { |
| 393 | TEST_REQUIRES_ARM_NEON; |
| 394 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 395 | for (float b_scale = 0.1f; b_scale <= 10.0f; b_scale *= 3.14f) { |
| 396 | VMulCMicrokernelTester() |
| 397 | .batch_size(batch_size) |
| 398 | .b_scale(b_scale) |
| 399 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 400 | } |
| 401 | } |
| 402 | } |
| 403 | |
| 404 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, y_scale) { |
| 405 | TEST_REQUIRES_ARM_NEON; |
| 406 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 407 | for (float y_scale = 0.1f; y_scale <= 10.0f; y_scale *= 3.14f) { |
| 408 | VMulCMicrokernelTester() |
| 409 | .batch_size(batch_size) |
| 410 | .y_scale(y_scale) |
| 411 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 412 | } |
| 413 | } |
| 414 | } |
| 415 | |
| 416 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, qmin) { |
| 417 | TEST_REQUIRES_ARM_NEON; |
| 418 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 419 | VMulCMicrokernelTester() |
| 420 | .batch_size(batch_size) |
| 421 | .qmin(128) |
| 422 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 423 | } |
| 424 | } |
| 425 | |
| 426 | TEST(QU8_VMULC_MINMAX_RNDNU__NEON_LD128_X16, qmax) { |
| 427 | TEST_REQUIRES_ARM_NEON; |
| 428 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 429 | VMulCMicrokernelTester() |
| 430 | .batch_size(batch_size) |
| 431 | .qmax(128) |
| 432 | .Test(xnn_qu8_vmulc_minmax_rndnu_ukernel__neon_ld128_x16, xnn_init_qu8_mul_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu); |
| 433 | } |
| 434 | } |
| 435 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |