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XNNPACK Teamb455b122019-09-27 18:10:33 -07001// Copyright 2019 Google LLC
2//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
5
6#include <algorithm>
7#include <cfloat>
8#include <cmath>
9#include <functional>
10#include <random>
11#include <vector>
12
13#include <cpuinfo.h>
14
15#include <benchmark/benchmark.h>
16#include "bench/dwconv.h"
17#include "bench/utils.h"
18#include <xnnpack/AlignedAllocator.h>
Marat Dukhan1dadbf72019-10-01 10:46:20 -070019#include <xnnpack/common.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070020#include <xnnpack/dwconv.h>
21#include <xnnpack/indirection.h>
22#include <xnnpack/operator.h>
23#include <xnnpack/pack.h>
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -070024#include <xnnpack/params-init.h>
Frank Barcharde0601b52019-10-25 17:43:34 -070025#include <xnnpack/params.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070026
27
28static void DWConvBenchmark(benchmark::State& state,
29 xnn_f32_dwconv_up_ukernel_function dwconv,
Marat Dukhanc8466f52019-11-25 18:01:10 -080030 uint32_t cr, uint32_t kr,
31 benchmark::utils::IsaCheckFunction isa_check = nullptr)
XNNPACK Teamb455b122019-09-27 18:10:33 -070032{
33 if (!cpuinfo_initialize()) {
34 state.SkipWithError("cpuinfo initialization failed");
35 return;
36 }
Marat Dukhanc8466f52019-11-25 18:01:10 -080037 if (isa_check && !isa_check(state)) {
38 return;
39 }
XNNPACK Teamb455b122019-09-27 18:10:33 -070040
41 const size_t input_height = state.range(0);
42 const size_t input_width = state.range(1);
43 const size_t kernel_height = state.range(2);
44 const size_t kernel_width = state.range(3);
45 const size_t padding_height = state.range(4);
46 const size_t padding_width = state.range(5);
47 const size_t subsampling = state.range(6);
48 const size_t dilation = state.range(7);
49 const size_t channels = state.range(8);
50
51 const size_t kernel_size = kernel_height * kernel_width;
52 if (kernel_size != kr) {
53 state.SkipWithError("kernel size mismatch");
54 return;
55 }
56
57 std::random_device random_device;
58 auto rng = std::mt19937(random_device());
59 auto f32rng = std::bind(std::uniform_real_distribution<float>(0.0f, 1.0f), rng);
60
61 const size_t effective_kernel_height = (kernel_height - 1) * dilation + 1;
62 const size_t effective_kernel_width = (kernel_width - 1) * dilation + 1;
63 const size_t padding_left = padding_width / 2;
64 const size_t padding_top = padding_height / 2;
65 const size_t output_height = (input_height + padding_height - effective_kernel_height) / subsampling + 1;
66 const size_t output_width = (input_width + padding_width - effective_kernel_width) / subsampling + 1;
67 const size_t output_size = output_height * output_width;
68 const size_t step_width = dilation == 1 ? subsampling : kernel_width;
Marat Dukhan03ff2942019-12-05 09:32:26 -080069 const size_t step_height = kernel_size + (output_width - 1) * step_width * kernel_height;
XNNPACK Teamb455b122019-09-27 18:10:33 -070070
Marat Dukhan42323232019-10-23 02:09:02 -070071 const size_t c_stride = benchmark::utils::RoundUp<size_t>(channels, cr);
XNNPACK Teamb455b122019-09-27 18:10:33 -070072
Marat Dukhanad74a7b2019-12-05 06:18:39 -080073 std::vector<float> a(channels * input_height * input_width + XNN_EXTRA_BYTES / sizeof(float));
XNNPACK Teamb455b122019-09-27 18:10:33 -070074 std::generate(a.begin(), a.end(), std::ref(f32rng));
75 std::vector<float> k(channels * kernel_height * kernel_width);
76 std::generate(k.begin(), k.end(), std::ref(f32rng));
77 std::vector<float> b(channels);
78 std::generate(b.begin(), b.end(), std::ref(f32rng));
79
Marat Dukhanad74a7b2019-12-05 06:18:39 -080080 std::vector<float> z(channels + XNN_EXTRA_BYTES / sizeof(float));
XNNPACK Teamb455b122019-09-27 18:10:33 -070081
82 const size_t w_elements = (kernel_size + 1) * c_stride;
83 const size_t i_elements = output_height * step_height;
84 const size_t c_elements = output_size * channels;
85 const size_t num_buffers = 1 +
Marat Dukhan42323232019-10-23 02:09:02 -070086 benchmark::utils::DivideRoundUp<size_t>(benchmark::utils::GetMaxCacheSize(),
XNNPACK Teamb455b122019-09-27 18:10:33 -070087 sizeof(float) * (w_elements + c_elements) + sizeof(void*) * i_elements);
88
89 std::vector<float, AlignedAllocator<float, 32>> w(w_elements * num_buffers);
90 std::fill(w.begin(), w.end(), 0.0f);
91 xnn_pack_f32_dwconv_ghw_w(kernel_height, kernel_width, channels, cr,
92 k.data(), b.data(), w.data());
93 for (size_t n = 1; n < num_buffers; n++) {
94 std::copy(w.cbegin(), w.cbegin() + w_elements, w.begin() + n * w_elements);
95 }
96
97 std::vector<const float*> i(i_elements * num_buffers);
98 xnn_operator convolution_op = { };
99 convolution_op.indirection_buffer = reinterpret_cast<const void**>(i.data());
100 convolution_op.input = a.data();
101 convolution_op.input_pixel_stride = channels;
102 convolution_op.zero_buffer = z.data();
103 convolution_op.batch_size = 1;
104 convolution_op.input_height = input_height;
105 convolution_op.input_width = input_width;
106 convolution_op.output_height = output_height;
107 convolution_op.output_width = output_width;
108 convolution_op.kernel_height = kernel_height;
109 convolution_op.kernel_width = kernel_width;
110 convolution_op.stride_height = subsampling;
111 convolution_op.stride_width = subsampling;
112 convolution_op.dilation_height = dilation;
113 convolution_op.dilation_width = dilation;
114 convolution_op.padding_top = padding_top;
115 convolution_op.padding_left = padding_left;
116
117 xnn_indirection_init_dwconv2d(&convolution_op, 0, step_height, step_width, 2 /* log2(sizeof(float)) */);
118 for (size_t n = 1; n < num_buffers; n++) {
119 std::copy(i.cbegin(), i.cbegin() + i_elements, i.begin() + n * i_elements);
120 }
121
122 std::vector<float> c(c_elements * num_buffers);
123 std::fill(c.begin(), c.end(), std::nanf(""));
124
125 xnn_f32_output_params output_params =
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700126 xnn_init_f32_output_params(-std::numeric_limits<float>::infinity(), +std::numeric_limits<float>::infinity());
XNNPACK Teamb455b122019-09-27 18:10:33 -0700127
128 size_t buffer_index = 0;
129 for (auto _ : state) {
130 state.PauseTiming();
Marat Dukhan42323232019-10-23 02:09:02 -0700131 benchmark::utils::PrefetchToL1(a.data(), a.size() * sizeof(float));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700132 buffer_index = (buffer_index + 1) % num_buffers;
133 state.ResumeTiming();
134
135 for (uint32_t y = 0; y < output_height; y++) {
136 dwconv(channels, output_width,
137 i.data() + buffer_index * i_elements + step_height * y,
138 w.data() + buffer_index * w_elements,
139 c.data() + buffer_index * c_elements + y * output_width * channels,
140 kernel_height * step_width * sizeof(void*), 0,
141 &output_params);
142 }
143 }
144
145 state.counters["Freq"] = benchmark::utils::GetCurrentCpuFrequency();
146 state.counters["FLOPS"] = benchmark::Counter(
147 uint64_t(state.iterations()) * 2 * output_size * channels * kernel_size,
148 benchmark::Counter::kIsRate);
149
150 state.counters["BYTES"] = benchmark::Counter(
151 uint64_t(state.iterations()) * (output_size + input_height * input_width + kernel_size + 1 /* bias */) * channels * sizeof(float),
152 benchmark::Counter::kIsRate);
153}
154
Frank Barchard7e955972019-10-11 10:34:25 -0700155#if XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
XNNPACK Teamb455b122019-09-27 18:10:33 -0700156 static void f32_dwconv_4x9__aarch64_neonfma(benchmark::State& state, const char* net) {
157 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x9__neon, 4, 9);
158 }
159
160 static void f32_dwconv_4x9__aarch64_neonfma_cortex_a55(benchmark::State& state, const char* net) {
161 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x9__neonfma, 4, 9);
162 }
163
164 BENCHMARK_DWCONV(f32_dwconv_4x9__aarch64_neonfma)
165 BENCHMARK_DWCONV(f32_dwconv_4x9__aarch64_neonfma_cortex_a55)
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700166#endif // XNN_ARCH_ARM64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700167
168
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700169#if XNN_ARCH_ARM || XNN_ARCH_ARM64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700170 static void f32_dwconv_4x9__neon(benchmark::State& state, const char* net) {
Marat Dukhanc8466f52019-11-25 18:01:10 -0800171 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x9__neon, 4, 9,
172 benchmark::utils::CheckNEON);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700173 }
174
175 static void f32_dwconv_4x9__neonfma(benchmark::State& state, const char* net) {
Marat Dukhanc8466f52019-11-25 18:01:10 -0800176 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x9__neonfma, 4, 9,
177 benchmark::utils::CheckNEONFMA);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700178 }
179
180 static void f32_dwconv_8x9__neonfma(benchmark::State& state, const char* net) {
Marat Dukhanc8466f52019-11-25 18:01:10 -0800181 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up8x9__neonfma, 8, 9,
182 benchmark::utils::CheckNEONFMA);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700183 }
184
185 BENCHMARK_DWCONV(f32_dwconv_4x9__neon)
186 BENCHMARK_DWCONV(f32_dwconv_4x9__neonfma)
187 BENCHMARK_DWCONV(f32_dwconv_8x9__neonfma)
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700188#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700189
190
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700191#if XNN_ARCH_X86 || XNN_ARCH_X86_64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700192 static void f32_dwconv_4x4__sse(benchmark::State& state, const char* net) {
193 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x4__sse, 4, 4);
194 }
195
196 static void f32_dwconv_4x9__sse(benchmark::State& state, const char* net) {
197 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x9__sse, 4, 9);
198 }
199
200 static void f32_dwconv_4x25__sse(benchmark::State& state, const char* net) {
201 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x25__sse, 4, 25);
202 }
203
204 BENCHMARK_DWCONV(f32_dwconv_4x4__sse)
205 BENCHMARK_DWCONV(f32_dwconv_4x9__sse)
206 BENCHMARK_DWCONV(f32_dwconv_4x25__sse)
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700207#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700208
209
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700210#if !XNN_ARCH_WASM && !XNN_ARCH_ASMJS
XNNPACK Teamb455b122019-09-27 18:10:33 -0700211 static void f32_dwconv_4x4__psimd(benchmark::State& state, const char* net) {
212 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x4__psimd, 4, 4);
213 }
214
215 static void f32_dwconv_4x9__psimd(benchmark::State& state, const char* net) {
216 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x9__psimd, 4, 9);
217 }
218
219 static void f32_dwconv_4x25__psimd(benchmark::State& state, const char* net) {
220 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up4x25__psimd, 4, 25);
221 }
222
223 BENCHMARK_DWCONV(f32_dwconv_4x4__psimd)
224 BENCHMARK_DWCONV(f32_dwconv_4x9__psimd)
225 BENCHMARK_DWCONV(f32_dwconv_4x25__psimd)
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700226#endif // !XNN_ARCH_WASM && !XNN_ARCH_ASMJS
XNNPACK Teamb455b122019-09-27 18:10:33 -0700227
228
229static void f32_dwconv_1x4__scalar(benchmark::State& state, const char* net) {
230 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up1x4__scalar, 1, 4);
231}
232
233static void f32_dwconv_1x9__scalar(benchmark::State& state, const char* net) {
234 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up1x9__scalar, 1, 9);
235}
236
237static void f32_dwconv_1x25__scalar(benchmark::State& state, const char* net) {
238 DWConvBenchmark(state, xnn_f32_dwconv_ukernel_up1x25__scalar, 1, 25);
239}
240
241BENCHMARK_DWCONV(f32_dwconv_1x4__scalar)
242BENCHMARK_DWCONV(f32_dwconv_1x9__scalar)
243BENCHMARK_DWCONV(f32_dwconv_1x25__scalar)
244
245#ifndef XNNPACK_BENCHMARK_NO_MAIN
246BENCHMARK_MAIN();
247#endif