Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1 | // Copyright 2020 Google LLC |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 5 | // |
| 6 | // Auto-generated file. Do not edit! |
| 7 | // Specification: test/f32-clamp.yaml |
| 8 | // Generator: tools/generate-clamp-test.py |
| 9 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 10 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 11 | #include <gtest/gtest.h> |
| 12 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 13 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 14 | #include <xnnpack/isa-checks.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 15 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 16 | #include <xnnpack/clamp.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 17 | #include "clamp-microkernel-tester.h" |
| 18 | |
| 19 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 20 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 21 | TEST(F32_CLAMP__NEON_X4, batch_eq_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 22 | TEST_REQUIRES_ARM_NEON; |
| 23 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 24 | .batch_size(4) |
| 25 | .Test(xnn_f32_clamp_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 26 | } |
| 27 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 28 | TEST(F32_CLAMP__NEON_X4, batch_div_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 29 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 30 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 31 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 32 | .batch_size(batch_size) |
| 33 | .Test(xnn_f32_clamp_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 34 | } |
| 35 | } |
| 36 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 37 | TEST(F32_CLAMP__NEON_X4, batch_lt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 38 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 39 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 40 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 41 | .batch_size(batch_size) |
| 42 | .Test(xnn_f32_clamp_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 43 | } |
| 44 | } |
| 45 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 46 | TEST(F32_CLAMP__NEON_X4, batch_gt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 47 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 48 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 49 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 50 | .batch_size(batch_size) |
| 51 | .Test(xnn_f32_clamp_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 52 | } |
| 53 | } |
| 54 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 55 | TEST(F32_CLAMP__NEON_X4, inplace) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 56 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 57 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 58 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 59 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 60 | .inplace(true) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 61 | .Test(xnn_f32_clamp_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 62 | } |
| 63 | } |
| 64 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 65 | TEST(F32_CLAMP__NEON_X4, qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 66 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 67 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 68 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 69 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 70 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 71 | .qmin(qmin) |
| 72 | .qmax(255) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 73 | .Test(xnn_f32_clamp_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 74 | } |
| 75 | } |
| 76 | } |
| 77 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 78 | TEST(F32_CLAMP__NEON_X4, qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 79 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 80 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 81 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 82 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 83 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 84 | .qmin(0) |
| 85 | .qmax(qmax) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 86 | .Test(xnn_f32_clamp_ukernel__neon_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 87 | } |
| 88 | } |
| 89 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 90 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 91 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 92 | |
| 93 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 94 | TEST(F32_CLAMP__NEON_X8, batch_eq_8) { |
| 95 | TEST_REQUIRES_ARM_NEON; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 96 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 97 | .batch_size(8) |
| 98 | .Test(xnn_f32_clamp_ukernel__neon_x8); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 99 | } |
| 100 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 101 | TEST(F32_CLAMP__NEON_X8, batch_div_8) { |
| 102 | TEST_REQUIRES_ARM_NEON; |
| 103 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 104 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 105 | .batch_size(batch_size) |
| 106 | .Test(xnn_f32_clamp_ukernel__neon_x8); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 107 | } |
| 108 | } |
| 109 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 110 | TEST(F32_CLAMP__NEON_X8, batch_lt_8) { |
| 111 | TEST_REQUIRES_ARM_NEON; |
| 112 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 113 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 114 | .batch_size(batch_size) |
| 115 | .Test(xnn_f32_clamp_ukernel__neon_x8); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 116 | } |
| 117 | } |
| 118 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 119 | TEST(F32_CLAMP__NEON_X8, batch_gt_8) { |
| 120 | TEST_REQUIRES_ARM_NEON; |
| 121 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 122 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 123 | .batch_size(batch_size) |
| 124 | .Test(xnn_f32_clamp_ukernel__neon_x8); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 125 | } |
| 126 | } |
| 127 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 128 | TEST(F32_CLAMP__NEON_X8, inplace) { |
| 129 | TEST_REQUIRES_ARM_NEON; |
| 130 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 131 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 132 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 133 | .inplace(true) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 134 | .Test(xnn_f32_clamp_ukernel__neon_x8); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 135 | } |
| 136 | } |
| 137 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 138 | TEST(F32_CLAMP__NEON_X8, qmin) { |
| 139 | TEST_REQUIRES_ARM_NEON; |
| 140 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 141 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 142 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 143 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 144 | .qmin(qmin) |
| 145 | .qmax(255) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 146 | .Test(xnn_f32_clamp_ukernel__neon_x8); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 147 | } |
| 148 | } |
| 149 | } |
| 150 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 151 | TEST(F32_CLAMP__NEON_X8, qmax) { |
| 152 | TEST_REQUIRES_ARM_NEON; |
| 153 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 154 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 155 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 156 | .batch_size(batch_size) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 157 | .qmin(0) |
| 158 | .qmax(qmax) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 159 | .Test(xnn_f32_clamp_ukernel__neon_x8); |
| 160 | } |
| 161 | } |
| 162 | } |
| 163 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 164 | |
| 165 | |
| 166 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 167 | TEST(F32_CLAMP__SSE_X4, batch_eq_4) { |
| 168 | TEST_REQUIRES_X86_SSE; |
| 169 | ClampMicrokernelTester() |
| 170 | .batch_size(4) |
| 171 | .Test(xnn_f32_clamp_ukernel__sse_x4); |
| 172 | } |
| 173 | |
| 174 | TEST(F32_CLAMP__SSE_X4, batch_div_4) { |
| 175 | TEST_REQUIRES_X86_SSE; |
| 176 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
| 177 | ClampMicrokernelTester() |
| 178 | .batch_size(batch_size) |
| 179 | .Test(xnn_f32_clamp_ukernel__sse_x4); |
| 180 | } |
| 181 | } |
| 182 | |
| 183 | TEST(F32_CLAMP__SSE_X4, batch_lt_4) { |
| 184 | TEST_REQUIRES_X86_SSE; |
| 185 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
| 186 | ClampMicrokernelTester() |
| 187 | .batch_size(batch_size) |
| 188 | .Test(xnn_f32_clamp_ukernel__sse_x4); |
| 189 | } |
| 190 | } |
| 191 | |
| 192 | TEST(F32_CLAMP__SSE_X4, batch_gt_4) { |
| 193 | TEST_REQUIRES_X86_SSE; |
| 194 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
| 195 | ClampMicrokernelTester() |
| 196 | .batch_size(batch_size) |
| 197 | .Test(xnn_f32_clamp_ukernel__sse_x4); |
| 198 | } |
| 199 | } |
| 200 | |
| 201 | TEST(F32_CLAMP__SSE_X4, inplace) { |
| 202 | TEST_REQUIRES_X86_SSE; |
| 203 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 204 | ClampMicrokernelTester() |
| 205 | .batch_size(batch_size) |
| 206 | .inplace(true) |
| 207 | .Test(xnn_f32_clamp_ukernel__sse_x4); |
| 208 | } |
| 209 | } |
| 210 | |
| 211 | TEST(F32_CLAMP__SSE_X4, qmin) { |
| 212 | TEST_REQUIRES_X86_SSE; |
| 213 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 214 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 215 | ClampMicrokernelTester() |
| 216 | .batch_size(batch_size) |
| 217 | .qmin(qmin) |
| 218 | .qmax(255) |
| 219 | .Test(xnn_f32_clamp_ukernel__sse_x4); |
| 220 | } |
| 221 | } |
| 222 | } |
| 223 | |
| 224 | TEST(F32_CLAMP__SSE_X4, qmax) { |
| 225 | TEST_REQUIRES_X86_SSE; |
| 226 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 227 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 228 | ClampMicrokernelTester() |
| 229 | .batch_size(batch_size) |
| 230 | .qmin(0) |
| 231 | .qmax(qmax) |
| 232 | .Test(xnn_f32_clamp_ukernel__sse_x4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 233 | } |
| 234 | } |
| 235 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 236 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 237 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 238 | |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 239 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 240 | TEST(F32_CLAMP__SSE_X8, batch_eq_8) { |
| 241 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 242 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 243 | .batch_size(8) |
| 244 | .Test(xnn_f32_clamp_ukernel__sse_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 245 | } |
| 246 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 247 | TEST(F32_CLAMP__SSE_X8, batch_div_8) { |
| 248 | TEST_REQUIRES_X86_SSE; |
| 249 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 250 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 251 | .batch_size(batch_size) |
| 252 | .Test(xnn_f32_clamp_ukernel__sse_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 253 | } |
| 254 | } |
| 255 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 256 | TEST(F32_CLAMP__SSE_X8, batch_lt_8) { |
| 257 | TEST_REQUIRES_X86_SSE; |
| 258 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 259 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 260 | .batch_size(batch_size) |
| 261 | .Test(xnn_f32_clamp_ukernel__sse_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 262 | } |
| 263 | } |
| 264 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 265 | TEST(F32_CLAMP__SSE_X8, batch_gt_8) { |
| 266 | TEST_REQUIRES_X86_SSE; |
| 267 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 268 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 269 | .batch_size(batch_size) |
| 270 | .Test(xnn_f32_clamp_ukernel__sse_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 271 | } |
| 272 | } |
| 273 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 274 | TEST(F32_CLAMP__SSE_X8, inplace) { |
| 275 | TEST_REQUIRES_X86_SSE; |
| 276 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 277 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 278 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 279 | .inplace(true) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 280 | .Test(xnn_f32_clamp_ukernel__sse_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 281 | } |
| 282 | } |
| 283 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 284 | TEST(F32_CLAMP__SSE_X8, qmin) { |
| 285 | TEST_REQUIRES_X86_SSE; |
| 286 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 287 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 288 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 289 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 290 | .qmin(qmin) |
| 291 | .qmax(255) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 292 | .Test(xnn_f32_clamp_ukernel__sse_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 293 | } |
| 294 | } |
| 295 | } |
| 296 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 297 | TEST(F32_CLAMP__SSE_X8, qmax) { |
| 298 | TEST_REQUIRES_X86_SSE; |
| 299 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 300 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 301 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 302 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 303 | .qmin(0) |
| 304 | .qmax(qmax) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 305 | .Test(xnn_f32_clamp_ukernel__sse_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 306 | } |
| 307 | } |
| 308 | } |
| 309 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 310 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 311 | |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 312 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 313 | TEST(F32_CLAMP__AVX_X8, batch_eq_8) { |
| 314 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 315 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 316 | .batch_size(8) |
| 317 | .Test(xnn_f32_clamp_ukernel__avx_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 318 | } |
| 319 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 320 | TEST(F32_CLAMP__AVX_X8, batch_div_8) { |
| 321 | TEST_REQUIRES_X86_AVX; |
| 322 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 323 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 324 | .batch_size(batch_size) |
| 325 | .Test(xnn_f32_clamp_ukernel__avx_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 326 | } |
| 327 | } |
| 328 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 329 | TEST(F32_CLAMP__AVX_X8, batch_lt_8) { |
| 330 | TEST_REQUIRES_X86_AVX; |
| 331 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 332 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 333 | .batch_size(batch_size) |
| 334 | .Test(xnn_f32_clamp_ukernel__avx_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 335 | } |
| 336 | } |
| 337 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 338 | TEST(F32_CLAMP__AVX_X8, batch_gt_8) { |
| 339 | TEST_REQUIRES_X86_AVX; |
| 340 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 341 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 342 | .batch_size(batch_size) |
| 343 | .Test(xnn_f32_clamp_ukernel__avx_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 344 | } |
| 345 | } |
| 346 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 347 | TEST(F32_CLAMP__AVX_X8, inplace) { |
| 348 | TEST_REQUIRES_X86_AVX; |
| 349 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 350 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 351 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 352 | .inplace(true) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 353 | .Test(xnn_f32_clamp_ukernel__avx_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 354 | } |
| 355 | } |
| 356 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 357 | TEST(F32_CLAMP__AVX_X8, qmin) { |
| 358 | TEST_REQUIRES_X86_AVX; |
| 359 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 360 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 361 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 362 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 363 | .qmin(qmin) |
| 364 | .qmax(255) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 365 | .Test(xnn_f32_clamp_ukernel__avx_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 366 | } |
| 367 | } |
| 368 | } |
| 369 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 370 | TEST(F32_CLAMP__AVX_X8, qmax) { |
| 371 | TEST_REQUIRES_X86_AVX; |
| 372 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 373 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 374 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 375 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 376 | .qmin(0) |
| 377 | .qmax(qmax) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 378 | .Test(xnn_f32_clamp_ukernel__avx_x8); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 379 | } |
| 380 | } |
| 381 | } |
| 382 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 383 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 384 | |
| 385 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 386 | TEST(F32_CLAMP__AVX_X16, batch_eq_16) { |
| 387 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 388 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 389 | .batch_size(16) |
| 390 | .Test(xnn_f32_clamp_ukernel__avx_x16); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 391 | } |
| 392 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 393 | TEST(F32_CLAMP__AVX_X16, batch_div_16) { |
| 394 | TEST_REQUIRES_X86_AVX; |
| 395 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 396 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 397 | .batch_size(batch_size) |
| 398 | .Test(xnn_f32_clamp_ukernel__avx_x16); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 399 | } |
| 400 | } |
| 401 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 402 | TEST(F32_CLAMP__AVX_X16, batch_lt_16) { |
| 403 | TEST_REQUIRES_X86_AVX; |
| 404 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 405 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 406 | .batch_size(batch_size) |
| 407 | .Test(xnn_f32_clamp_ukernel__avx_x16); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 408 | } |
| 409 | } |
| 410 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 411 | TEST(F32_CLAMP__AVX_X16, batch_gt_16) { |
| 412 | TEST_REQUIRES_X86_AVX; |
| 413 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 414 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 415 | .batch_size(batch_size) |
| 416 | .Test(xnn_f32_clamp_ukernel__avx_x16); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 417 | } |
| 418 | } |
| 419 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 420 | TEST(F32_CLAMP__AVX_X16, inplace) { |
| 421 | TEST_REQUIRES_X86_AVX; |
| 422 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 423 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 424 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 425 | .inplace(true) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 426 | .Test(xnn_f32_clamp_ukernel__avx_x16); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 427 | } |
| 428 | } |
| 429 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 430 | TEST(F32_CLAMP__AVX_X16, qmin) { |
| 431 | TEST_REQUIRES_X86_AVX; |
| 432 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 433 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 434 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 435 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 436 | .qmin(qmin) |
| 437 | .qmax(255) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 438 | .Test(xnn_f32_clamp_ukernel__avx_x16); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 439 | } |
| 440 | } |
| 441 | } |
| 442 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 443 | TEST(F32_CLAMP__AVX_X16, qmax) { |
| 444 | TEST_REQUIRES_X86_AVX; |
| 445 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 446 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 447 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 448 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 449 | .qmin(0) |
| 450 | .qmax(qmax) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 451 | .Test(xnn_f32_clamp_ukernel__avx_x16); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 452 | } |
| 453 | } |
| 454 | } |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 455 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 456 | |
| 457 | |
| 458 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 459 | TEST(F32_CLAMP__AVX512F_X16, batch_eq_16) { |
| 460 | TEST_REQUIRES_X86_AVX512F; |
| 461 | ClampMicrokernelTester() |
| 462 | .batch_size(16) |
| 463 | .Test(xnn_f32_clamp_ukernel__avx512f_x16); |
| 464 | } |
| 465 | |
| 466 | TEST(F32_CLAMP__AVX512F_X16, batch_div_16) { |
| 467 | TEST_REQUIRES_X86_AVX512F; |
| 468 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
| 469 | ClampMicrokernelTester() |
| 470 | .batch_size(batch_size) |
| 471 | .Test(xnn_f32_clamp_ukernel__avx512f_x16); |
| 472 | } |
| 473 | } |
| 474 | |
| 475 | TEST(F32_CLAMP__AVX512F_X16, batch_lt_16) { |
| 476 | TEST_REQUIRES_X86_AVX512F; |
| 477 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
| 478 | ClampMicrokernelTester() |
| 479 | .batch_size(batch_size) |
| 480 | .Test(xnn_f32_clamp_ukernel__avx512f_x16); |
| 481 | } |
| 482 | } |
| 483 | |
| 484 | TEST(F32_CLAMP__AVX512F_X16, batch_gt_16) { |
| 485 | TEST_REQUIRES_X86_AVX512F; |
| 486 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
| 487 | ClampMicrokernelTester() |
| 488 | .batch_size(batch_size) |
| 489 | .Test(xnn_f32_clamp_ukernel__avx512f_x16); |
| 490 | } |
| 491 | } |
| 492 | |
| 493 | TEST(F32_CLAMP__AVX512F_X16, inplace) { |
| 494 | TEST_REQUIRES_X86_AVX512F; |
| 495 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 496 | ClampMicrokernelTester() |
| 497 | .batch_size(batch_size) |
| 498 | .inplace(true) |
| 499 | .Test(xnn_f32_clamp_ukernel__avx512f_x16); |
| 500 | } |
| 501 | } |
| 502 | |
| 503 | TEST(F32_CLAMP__AVX512F_X16, qmin) { |
| 504 | TEST_REQUIRES_X86_AVX512F; |
| 505 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 506 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 507 | ClampMicrokernelTester() |
| 508 | .batch_size(batch_size) |
| 509 | .qmin(qmin) |
| 510 | .qmax(255) |
| 511 | .Test(xnn_f32_clamp_ukernel__avx512f_x16); |
| 512 | } |
| 513 | } |
| 514 | } |
| 515 | |
| 516 | TEST(F32_CLAMP__AVX512F_X16, qmax) { |
| 517 | TEST_REQUIRES_X86_AVX512F; |
| 518 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
| 519 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 520 | ClampMicrokernelTester() |
| 521 | .batch_size(batch_size) |
| 522 | .qmin(0) |
| 523 | .qmax(qmax) |
| 524 | .Test(xnn_f32_clamp_ukernel__avx512f_x16); |
| 525 | } |
| 526 | } |
| 527 | } |
| 528 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 529 | |
| 530 | |
| 531 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 532 | TEST(F32_CLAMP__AVX512F_X32, batch_eq_32) { |
| 533 | TEST_REQUIRES_X86_AVX512F; |
| 534 | ClampMicrokernelTester() |
| 535 | .batch_size(32) |
| 536 | .Test(xnn_f32_clamp_ukernel__avx512f_x32); |
| 537 | } |
| 538 | |
| 539 | TEST(F32_CLAMP__AVX512F_X32, batch_div_32) { |
| 540 | TEST_REQUIRES_X86_AVX512F; |
| 541 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
| 542 | ClampMicrokernelTester() |
| 543 | .batch_size(batch_size) |
| 544 | .Test(xnn_f32_clamp_ukernel__avx512f_x32); |
| 545 | } |
| 546 | } |
| 547 | |
| 548 | TEST(F32_CLAMP__AVX512F_X32, batch_lt_32) { |
| 549 | TEST_REQUIRES_X86_AVX512F; |
| 550 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
| 551 | ClampMicrokernelTester() |
| 552 | .batch_size(batch_size) |
| 553 | .Test(xnn_f32_clamp_ukernel__avx512f_x32); |
| 554 | } |
| 555 | } |
| 556 | |
| 557 | TEST(F32_CLAMP__AVX512F_X32, batch_gt_32) { |
| 558 | TEST_REQUIRES_X86_AVX512F; |
| 559 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
| 560 | ClampMicrokernelTester() |
| 561 | .batch_size(batch_size) |
| 562 | .Test(xnn_f32_clamp_ukernel__avx512f_x32); |
| 563 | } |
| 564 | } |
| 565 | |
| 566 | TEST(F32_CLAMP__AVX512F_X32, inplace) { |
| 567 | TEST_REQUIRES_X86_AVX512F; |
| 568 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
| 569 | ClampMicrokernelTester() |
| 570 | .batch_size(batch_size) |
| 571 | .inplace(true) |
| 572 | .Test(xnn_f32_clamp_ukernel__avx512f_x32); |
| 573 | } |
| 574 | } |
| 575 | |
| 576 | TEST(F32_CLAMP__AVX512F_X32, qmin) { |
| 577 | TEST_REQUIRES_X86_AVX512F; |
| 578 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
| 579 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 580 | ClampMicrokernelTester() |
| 581 | .batch_size(batch_size) |
| 582 | .qmin(qmin) |
| 583 | .qmax(255) |
| 584 | .Test(xnn_f32_clamp_ukernel__avx512f_x32); |
| 585 | } |
| 586 | } |
| 587 | } |
| 588 | |
| 589 | TEST(F32_CLAMP__AVX512F_X32, qmax) { |
| 590 | TEST_REQUIRES_X86_AVX512F; |
| 591 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
| 592 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 593 | ClampMicrokernelTester() |
| 594 | .batch_size(batch_size) |
| 595 | .qmin(0) |
| 596 | .qmax(qmax) |
| 597 | .Test(xnn_f32_clamp_ukernel__avx512f_x32); |
| 598 | } |
| 599 | } |
| 600 | } |
| 601 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 602 | |
| 603 | |
Marat Dukhan | 3fa52c8 | 2020-07-08 12:54:33 -0700 | [diff] [blame] | 604 | #if XNN_ARCH_WASMSIMD |
| 605 | TEST(F32_CLAMP__WASMSIMD_ARM_X4, batch_eq_4) { |
| 606 | ClampMicrokernelTester() |
| 607 | .batch_size(4) |
| 608 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x4); |
| 609 | } |
| 610 | |
| 611 | TEST(F32_CLAMP__WASMSIMD_ARM_X4, batch_div_4) { |
| 612 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
| 613 | ClampMicrokernelTester() |
| 614 | .batch_size(batch_size) |
| 615 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x4); |
| 616 | } |
| 617 | } |
| 618 | |
| 619 | TEST(F32_CLAMP__WASMSIMD_ARM_X4, batch_lt_4) { |
| 620 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
| 621 | ClampMicrokernelTester() |
| 622 | .batch_size(batch_size) |
| 623 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x4); |
| 624 | } |
| 625 | } |
| 626 | |
| 627 | TEST(F32_CLAMP__WASMSIMD_ARM_X4, batch_gt_4) { |
| 628 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
| 629 | ClampMicrokernelTester() |
| 630 | .batch_size(batch_size) |
| 631 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x4); |
| 632 | } |
| 633 | } |
| 634 | |
| 635 | TEST(F32_CLAMP__WASMSIMD_ARM_X4, inplace) { |
| 636 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 637 | ClampMicrokernelTester() |
| 638 | .batch_size(batch_size) |
| 639 | .inplace(true) |
| 640 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x4); |
| 641 | } |
| 642 | } |
| 643 | |
| 644 | TEST(F32_CLAMP__WASMSIMD_ARM_X4, qmin) { |
| 645 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 646 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 647 | ClampMicrokernelTester() |
| 648 | .batch_size(batch_size) |
| 649 | .qmin(qmin) |
| 650 | .qmax(255) |
| 651 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x4); |
| 652 | } |
| 653 | } |
| 654 | } |
| 655 | |
| 656 | TEST(F32_CLAMP__WASMSIMD_ARM_X4, qmax) { |
| 657 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 658 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 659 | ClampMicrokernelTester() |
| 660 | .batch_size(batch_size) |
| 661 | .qmin(0) |
| 662 | .qmax(qmax) |
| 663 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x4); |
| 664 | } |
| 665 | } |
| 666 | } |
| 667 | #endif // XNN_ARCH_WASMSIMD |
| 668 | |
| 669 | |
| 670 | #if XNN_ARCH_WASMSIMD |
| 671 | TEST(F32_CLAMP__WASMSIMD_ARM_X8, batch_eq_8) { |
| 672 | ClampMicrokernelTester() |
| 673 | .batch_size(8) |
| 674 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x8); |
| 675 | } |
| 676 | |
| 677 | TEST(F32_CLAMP__WASMSIMD_ARM_X8, batch_div_8) { |
| 678 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
| 679 | ClampMicrokernelTester() |
| 680 | .batch_size(batch_size) |
| 681 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x8); |
| 682 | } |
| 683 | } |
| 684 | |
| 685 | TEST(F32_CLAMP__WASMSIMD_ARM_X8, batch_lt_8) { |
| 686 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
| 687 | ClampMicrokernelTester() |
| 688 | .batch_size(batch_size) |
| 689 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x8); |
| 690 | } |
| 691 | } |
| 692 | |
| 693 | TEST(F32_CLAMP__WASMSIMD_ARM_X8, batch_gt_8) { |
| 694 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
| 695 | ClampMicrokernelTester() |
| 696 | .batch_size(batch_size) |
| 697 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x8); |
| 698 | } |
| 699 | } |
| 700 | |
| 701 | TEST(F32_CLAMP__WASMSIMD_ARM_X8, inplace) { |
| 702 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 703 | ClampMicrokernelTester() |
| 704 | .batch_size(batch_size) |
| 705 | .inplace(true) |
| 706 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x8); |
| 707 | } |
| 708 | } |
| 709 | |
| 710 | TEST(F32_CLAMP__WASMSIMD_ARM_X8, qmin) { |
| 711 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 712 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 713 | ClampMicrokernelTester() |
| 714 | .batch_size(batch_size) |
| 715 | .qmin(qmin) |
| 716 | .qmax(255) |
| 717 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x8); |
| 718 | } |
| 719 | } |
| 720 | } |
| 721 | |
| 722 | TEST(F32_CLAMP__WASMSIMD_ARM_X8, qmax) { |
| 723 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 724 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 725 | ClampMicrokernelTester() |
| 726 | .batch_size(batch_size) |
| 727 | .qmin(0) |
| 728 | .qmax(qmax) |
| 729 | .Test(xnn_f32_clamp_ukernel__wasmsimd_arm_x8); |
| 730 | } |
| 731 | } |
| 732 | } |
| 733 | #endif // XNN_ARCH_WASMSIMD |
| 734 | |
| 735 | |
| 736 | #if XNN_ARCH_WASMSIMD |
| 737 | TEST(F32_CLAMP__WASMSIMD_X86_X4, batch_eq_4) { |
| 738 | ClampMicrokernelTester() |
| 739 | .batch_size(4) |
| 740 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x4); |
| 741 | } |
| 742 | |
| 743 | TEST(F32_CLAMP__WASMSIMD_X86_X4, batch_div_4) { |
| 744 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
| 745 | ClampMicrokernelTester() |
| 746 | .batch_size(batch_size) |
| 747 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x4); |
| 748 | } |
| 749 | } |
| 750 | |
| 751 | TEST(F32_CLAMP__WASMSIMD_X86_X4, batch_lt_4) { |
| 752 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
| 753 | ClampMicrokernelTester() |
| 754 | .batch_size(batch_size) |
| 755 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x4); |
| 756 | } |
| 757 | } |
| 758 | |
| 759 | TEST(F32_CLAMP__WASMSIMD_X86_X4, batch_gt_4) { |
| 760 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
| 761 | ClampMicrokernelTester() |
| 762 | .batch_size(batch_size) |
| 763 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x4); |
| 764 | } |
| 765 | } |
| 766 | |
| 767 | TEST(F32_CLAMP__WASMSIMD_X86_X4, inplace) { |
| 768 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 769 | ClampMicrokernelTester() |
| 770 | .batch_size(batch_size) |
| 771 | .inplace(true) |
| 772 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x4); |
| 773 | } |
| 774 | } |
| 775 | |
| 776 | TEST(F32_CLAMP__WASMSIMD_X86_X4, qmin) { |
| 777 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 778 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 779 | ClampMicrokernelTester() |
| 780 | .batch_size(batch_size) |
| 781 | .qmin(qmin) |
| 782 | .qmax(255) |
| 783 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x4); |
| 784 | } |
| 785 | } |
| 786 | } |
| 787 | |
| 788 | TEST(F32_CLAMP__WASMSIMD_X86_X4, qmax) { |
| 789 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 790 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 791 | ClampMicrokernelTester() |
| 792 | .batch_size(batch_size) |
| 793 | .qmin(0) |
| 794 | .qmax(qmax) |
| 795 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x4); |
| 796 | } |
| 797 | } |
| 798 | } |
| 799 | #endif // XNN_ARCH_WASMSIMD |
| 800 | |
| 801 | |
| 802 | #if XNN_ARCH_WASMSIMD |
| 803 | TEST(F32_CLAMP__WASMSIMD_X86_X8, batch_eq_8) { |
| 804 | ClampMicrokernelTester() |
| 805 | .batch_size(8) |
| 806 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x8); |
| 807 | } |
| 808 | |
| 809 | TEST(F32_CLAMP__WASMSIMD_X86_X8, batch_div_8) { |
| 810 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
| 811 | ClampMicrokernelTester() |
| 812 | .batch_size(batch_size) |
| 813 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x8); |
| 814 | } |
| 815 | } |
| 816 | |
| 817 | TEST(F32_CLAMP__WASMSIMD_X86_X8, batch_lt_8) { |
| 818 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
| 819 | ClampMicrokernelTester() |
| 820 | .batch_size(batch_size) |
| 821 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x8); |
| 822 | } |
| 823 | } |
| 824 | |
| 825 | TEST(F32_CLAMP__WASMSIMD_X86_X8, batch_gt_8) { |
| 826 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
| 827 | ClampMicrokernelTester() |
| 828 | .batch_size(batch_size) |
| 829 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x8); |
| 830 | } |
| 831 | } |
| 832 | |
| 833 | TEST(F32_CLAMP__WASMSIMD_X86_X8, inplace) { |
| 834 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 835 | ClampMicrokernelTester() |
| 836 | .batch_size(batch_size) |
| 837 | .inplace(true) |
| 838 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x8); |
| 839 | } |
| 840 | } |
| 841 | |
| 842 | TEST(F32_CLAMP__WASMSIMD_X86_X8, qmin) { |
| 843 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 844 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 845 | ClampMicrokernelTester() |
| 846 | .batch_size(batch_size) |
| 847 | .qmin(qmin) |
| 848 | .qmax(255) |
| 849 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x8); |
| 850 | } |
| 851 | } |
| 852 | } |
| 853 | |
| 854 | TEST(F32_CLAMP__WASMSIMD_X86_X8, qmax) { |
| 855 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
| 856 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 857 | ClampMicrokernelTester() |
| 858 | .batch_size(batch_size) |
| 859 | .qmin(0) |
| 860 | .qmax(qmax) |
| 861 | .Test(xnn_f32_clamp_ukernel__wasmsimd_x86_x8); |
| 862 | } |
| 863 | } |
| 864 | } |
| 865 | #endif // XNN_ARCH_WASMSIMD |
| 866 | |
| 867 | |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 868 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 869 | TEST(F32_CLAMP__WASM_X1, batch_eq_1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 870 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 871 | .batch_size(1) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 872 | .Test(xnn_f32_clamp_ukernel__wasm_x1); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 873 | } |
| 874 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 875 | TEST(F32_CLAMP__WASM_X1, batch_gt_1) { |
| 876 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 877 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 878 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 879 | .Test(xnn_f32_clamp_ukernel__wasm_x1); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 880 | } |
| 881 | } |
| 882 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 883 | TEST(F32_CLAMP__WASM_X1, inplace) { |
| 884 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 885 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 886 | .batch_size(batch_size) |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 887 | .inplace(true) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 888 | .Test(xnn_f32_clamp_ukernel__wasm_x1); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 889 | } |
| 890 | } |
| 891 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 892 | TEST(F32_CLAMP__WASM_X1, qmin) { |
| 893 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 894 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 895 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 896 | .batch_size(batch_size) |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 897 | .qmin(qmin) |
| 898 | .qmax(255) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 899 | .Test(xnn_f32_clamp_ukernel__wasm_x1); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 900 | } |
| 901 | } |
| 902 | } |
| 903 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 904 | TEST(F32_CLAMP__WASM_X1, qmax) { |
| 905 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 906 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 907 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 908 | .batch_size(batch_size) |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 909 | .qmin(0) |
| 910 | .qmax(qmax) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 911 | .Test(xnn_f32_clamp_ukernel__wasm_x1); |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 912 | } |
| 913 | } |
| 914 | } |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 915 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 916 | |
| 917 | |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 918 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 919 | TEST(F32_CLAMP__WASM_X2, batch_eq_2) { |
| 920 | ClampMicrokernelTester() |
| 921 | .batch_size(2) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 922 | .Test(xnn_f32_clamp_ukernel__wasm_x2); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 923 | } |
| 924 | |
| 925 | TEST(F32_CLAMP__WASM_X2, batch_div_2) { |
| 926 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
| 927 | ClampMicrokernelTester() |
| 928 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 929 | .Test(xnn_f32_clamp_ukernel__wasm_x2); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 930 | } |
| 931 | } |
| 932 | |
| 933 | TEST(F32_CLAMP__WASM_X2, batch_lt_2) { |
| 934 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
| 935 | ClampMicrokernelTester() |
| 936 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 937 | .Test(xnn_f32_clamp_ukernel__wasm_x2); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 938 | } |
| 939 | } |
| 940 | |
| 941 | TEST(F32_CLAMP__WASM_X2, batch_gt_2) { |
| 942 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
| 943 | ClampMicrokernelTester() |
| 944 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 945 | .Test(xnn_f32_clamp_ukernel__wasm_x2); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 946 | } |
| 947 | } |
| 948 | |
| 949 | TEST(F32_CLAMP__WASM_X2, inplace) { |
| 950 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
| 951 | ClampMicrokernelTester() |
| 952 | .batch_size(batch_size) |
| 953 | .inplace(true) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 954 | .Test(xnn_f32_clamp_ukernel__wasm_x2); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 955 | } |
| 956 | } |
| 957 | |
| 958 | TEST(F32_CLAMP__WASM_X2, qmin) { |
| 959 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
| 960 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 961 | ClampMicrokernelTester() |
| 962 | .batch_size(batch_size) |
| 963 | .qmin(qmin) |
| 964 | .qmax(255) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 965 | .Test(xnn_f32_clamp_ukernel__wasm_x2); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 966 | } |
| 967 | } |
| 968 | } |
| 969 | |
| 970 | TEST(F32_CLAMP__WASM_X2, qmax) { |
| 971 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
| 972 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 973 | ClampMicrokernelTester() |
| 974 | .batch_size(batch_size) |
| 975 | .qmin(0) |
| 976 | .qmax(qmax) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 977 | .Test(xnn_f32_clamp_ukernel__wasm_x2); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 978 | } |
| 979 | } |
| 980 | } |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 981 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 982 | |
| 983 | |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 984 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 985 | TEST(F32_CLAMP__WASM_X4, batch_eq_4) { |
| 986 | ClampMicrokernelTester() |
| 987 | .batch_size(4) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 988 | .Test(xnn_f32_clamp_ukernel__wasm_x4); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 989 | } |
| 990 | |
| 991 | TEST(F32_CLAMP__WASM_X4, batch_div_4) { |
| 992 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
| 993 | ClampMicrokernelTester() |
| 994 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 995 | .Test(xnn_f32_clamp_ukernel__wasm_x4); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 996 | } |
| 997 | } |
| 998 | |
| 999 | TEST(F32_CLAMP__WASM_X4, batch_lt_4) { |
| 1000 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
| 1001 | ClampMicrokernelTester() |
| 1002 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 1003 | .Test(xnn_f32_clamp_ukernel__wasm_x4); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1004 | } |
| 1005 | } |
| 1006 | |
| 1007 | TEST(F32_CLAMP__WASM_X4, batch_gt_4) { |
| 1008 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
| 1009 | ClampMicrokernelTester() |
| 1010 | .batch_size(batch_size) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 1011 | .Test(xnn_f32_clamp_ukernel__wasm_x4); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1012 | } |
| 1013 | } |
| 1014 | |
| 1015 | TEST(F32_CLAMP__WASM_X4, inplace) { |
| 1016 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 1017 | ClampMicrokernelTester() |
| 1018 | .batch_size(batch_size) |
| 1019 | .inplace(true) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 1020 | .Test(xnn_f32_clamp_ukernel__wasm_x4); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1021 | } |
| 1022 | } |
| 1023 | |
| 1024 | TEST(F32_CLAMP__WASM_X4, qmin) { |
| 1025 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 1026 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 1027 | ClampMicrokernelTester() |
| 1028 | .batch_size(batch_size) |
| 1029 | .qmin(qmin) |
| 1030 | .qmax(255) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 1031 | .Test(xnn_f32_clamp_ukernel__wasm_x4); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1032 | } |
| 1033 | } |
| 1034 | } |
| 1035 | |
| 1036 | TEST(F32_CLAMP__WASM_X4, qmax) { |
| 1037 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 1038 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 1039 | ClampMicrokernelTester() |
| 1040 | .batch_size(batch_size) |
| 1041 | .qmin(0) |
| 1042 | .qmax(qmax) |
Marat Dukhan | 47387d6 | 2020-06-29 12:53:20 -0700 | [diff] [blame] | 1043 | .Test(xnn_f32_clamp_ukernel__wasm_x4); |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1044 | } |
| 1045 | } |
| 1046 | } |
Marat Dukhan | fb5b20a | 2020-06-26 13:14:50 -0700 | [diff] [blame] | 1047 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1048 | |
| 1049 | |
| 1050 | TEST(F32_CLAMP__SCALAR_X1, batch_eq_1) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1051 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1052 | .batch_size(1) |
| 1053 | .Test(xnn_f32_clamp_ukernel__scalar_x1, ClampMicrokernelTester::Variant::Scalar); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1054 | } |
| 1055 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1056 | TEST(F32_CLAMP__SCALAR_X1, batch_gt_1) { |
| 1057 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1058 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1059 | .batch_size(batch_size) |
| 1060 | .Test(xnn_f32_clamp_ukernel__scalar_x1, ClampMicrokernelTester::Variant::Scalar); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1061 | } |
| 1062 | } |
| 1063 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1064 | TEST(F32_CLAMP__SCALAR_X1, inplace) { |
| 1065 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1066 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1067 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1068 | .inplace(true) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1069 | .Test(xnn_f32_clamp_ukernel__scalar_x1, ClampMicrokernelTester::Variant::Scalar); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1070 | } |
| 1071 | } |
| 1072 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1073 | TEST(F32_CLAMP__SCALAR_X1, qmin) { |
| 1074 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1075 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 1076 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1077 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1078 | .qmin(qmin) |
| 1079 | .qmax(255) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1080 | .Test(xnn_f32_clamp_ukernel__scalar_x1, ClampMicrokernelTester::Variant::Scalar); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1081 | } |
| 1082 | } |
| 1083 | } |
| 1084 | |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1085 | TEST(F32_CLAMP__SCALAR_X1, qmax) { |
| 1086 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1087 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 1088 | ClampMicrokernelTester() |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1089 | .batch_size(batch_size) |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1090 | .qmin(0) |
| 1091 | .qmax(qmax) |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1092 | .Test(xnn_f32_clamp_ukernel__scalar_x1, ClampMicrokernelTester::Variant::Scalar); |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 1093 | } |
| 1094 | } |
| 1095 | } |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1096 | |
| 1097 | TEST(F32_CLAMP__SCALAR_X2, batch_eq_2) { |
| 1098 | ClampMicrokernelTester() |
| 1099 | .batch_size(2) |
| 1100 | .Test(xnn_f32_clamp_ukernel__scalar_x2, ClampMicrokernelTester::Variant::Scalar); |
| 1101 | } |
| 1102 | |
| 1103 | TEST(F32_CLAMP__SCALAR_X2, batch_div_2) { |
| 1104 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
| 1105 | ClampMicrokernelTester() |
| 1106 | .batch_size(batch_size) |
| 1107 | .Test(xnn_f32_clamp_ukernel__scalar_x2, ClampMicrokernelTester::Variant::Scalar); |
| 1108 | } |
| 1109 | } |
| 1110 | |
| 1111 | TEST(F32_CLAMP__SCALAR_X2, batch_lt_2) { |
| 1112 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
| 1113 | ClampMicrokernelTester() |
| 1114 | .batch_size(batch_size) |
| 1115 | .Test(xnn_f32_clamp_ukernel__scalar_x2, ClampMicrokernelTester::Variant::Scalar); |
| 1116 | } |
| 1117 | } |
| 1118 | |
| 1119 | TEST(F32_CLAMP__SCALAR_X2, batch_gt_2) { |
| 1120 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
| 1121 | ClampMicrokernelTester() |
| 1122 | .batch_size(batch_size) |
| 1123 | .Test(xnn_f32_clamp_ukernel__scalar_x2, ClampMicrokernelTester::Variant::Scalar); |
| 1124 | } |
| 1125 | } |
| 1126 | |
| 1127 | TEST(F32_CLAMP__SCALAR_X2, inplace) { |
| 1128 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
| 1129 | ClampMicrokernelTester() |
| 1130 | .batch_size(batch_size) |
| 1131 | .inplace(true) |
| 1132 | .Test(xnn_f32_clamp_ukernel__scalar_x2, ClampMicrokernelTester::Variant::Scalar); |
| 1133 | } |
| 1134 | } |
| 1135 | |
| 1136 | TEST(F32_CLAMP__SCALAR_X2, qmin) { |
| 1137 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
| 1138 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 1139 | ClampMicrokernelTester() |
| 1140 | .batch_size(batch_size) |
| 1141 | .qmin(qmin) |
| 1142 | .qmax(255) |
| 1143 | .Test(xnn_f32_clamp_ukernel__scalar_x2, ClampMicrokernelTester::Variant::Scalar); |
| 1144 | } |
| 1145 | } |
| 1146 | } |
| 1147 | |
| 1148 | TEST(F32_CLAMP__SCALAR_X2, qmax) { |
| 1149 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
| 1150 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 1151 | ClampMicrokernelTester() |
| 1152 | .batch_size(batch_size) |
| 1153 | .qmin(0) |
| 1154 | .qmax(qmax) |
| 1155 | .Test(xnn_f32_clamp_ukernel__scalar_x2, ClampMicrokernelTester::Variant::Scalar); |
| 1156 | } |
| 1157 | } |
| 1158 | } |
| 1159 | |
| 1160 | TEST(F32_CLAMP__SCALAR_X4, batch_eq_4) { |
| 1161 | ClampMicrokernelTester() |
| 1162 | .batch_size(4) |
| 1163 | .Test(xnn_f32_clamp_ukernel__scalar_x4, ClampMicrokernelTester::Variant::Scalar); |
| 1164 | } |
| 1165 | |
| 1166 | TEST(F32_CLAMP__SCALAR_X4, batch_div_4) { |
| 1167 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
| 1168 | ClampMicrokernelTester() |
| 1169 | .batch_size(batch_size) |
| 1170 | .Test(xnn_f32_clamp_ukernel__scalar_x4, ClampMicrokernelTester::Variant::Scalar); |
| 1171 | } |
| 1172 | } |
| 1173 | |
| 1174 | TEST(F32_CLAMP__SCALAR_X4, batch_lt_4) { |
| 1175 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
| 1176 | ClampMicrokernelTester() |
| 1177 | .batch_size(batch_size) |
| 1178 | .Test(xnn_f32_clamp_ukernel__scalar_x4, ClampMicrokernelTester::Variant::Scalar); |
| 1179 | } |
| 1180 | } |
| 1181 | |
| 1182 | TEST(F32_CLAMP__SCALAR_X4, batch_gt_4) { |
| 1183 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
| 1184 | ClampMicrokernelTester() |
| 1185 | .batch_size(batch_size) |
| 1186 | .Test(xnn_f32_clamp_ukernel__scalar_x4, ClampMicrokernelTester::Variant::Scalar); |
| 1187 | } |
| 1188 | } |
| 1189 | |
| 1190 | TEST(F32_CLAMP__SCALAR_X4, inplace) { |
| 1191 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 1192 | ClampMicrokernelTester() |
| 1193 | .batch_size(batch_size) |
| 1194 | .inplace(true) |
| 1195 | .Test(xnn_f32_clamp_ukernel__scalar_x4, ClampMicrokernelTester::Variant::Scalar); |
| 1196 | } |
| 1197 | } |
| 1198 | |
| 1199 | TEST(F32_CLAMP__SCALAR_X4, qmin) { |
| 1200 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 1201 | for (uint8_t qmin = 1; qmin < 255; qmin++) { |
| 1202 | ClampMicrokernelTester() |
| 1203 | .batch_size(batch_size) |
| 1204 | .qmin(qmin) |
| 1205 | .qmax(255) |
| 1206 | .Test(xnn_f32_clamp_ukernel__scalar_x4, ClampMicrokernelTester::Variant::Scalar); |
| 1207 | } |
| 1208 | } |
| 1209 | } |
| 1210 | |
| 1211 | TEST(F32_CLAMP__SCALAR_X4, qmax) { |
| 1212 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
| 1213 | for (uint8_t qmax = 1; qmax < 255; qmax++) { |
| 1214 | ClampMicrokernelTester() |
| 1215 | .batch_size(batch_size) |
| 1216 | .qmin(0) |
| 1217 | .qmax(qmax) |
| 1218 | .Test(xnn_f32_clamp_ukernel__scalar_x4, ClampMicrokernelTester::Variant::Scalar); |
| 1219 | } |
| 1220 | } |
| 1221 | } |