blob: 000458e7847d8c8a2cf04905dfb694b43140f327 [file] [log] [blame]
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001// Copyright 2019 Google LLC
2//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
5//
6// Auto-generated file. Do not edit!
7// Specification: test/f32-vrsubc-minmax.yaml
8// Generator: tools/generate-vbinary-test.py
9
10
11#include <gtest/gtest.h>
12
13#include <xnnpack/common.h>
14#include <xnnpack/isa-checks.h>
15
16#include <xnnpack/vbinary.h>
17#include "vbinaryc-microkernel-tester.h"
18
19
20#if XNN_ARCH_ARM || XNN_ARCH_ARM64
21 TEST(F32_VRSUBC_MINMAX__NEON_X4, batch_eq_4) {
22 TEST_REQUIRES_ARM_NEON;
23 VBinOpCMicrokernelTester()
24 .batch_size(4)
25 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x4, VBinOpCMicrokernelTester::OpType::RSubC);
26 }
27
28 TEST(F32_VRSUBC_MINMAX__NEON_X4, batch_div_4) {
29 TEST_REQUIRES_ARM_NEON;
30 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
31 VBinOpCMicrokernelTester()
32 .batch_size(batch_size)
33 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x4, VBinOpCMicrokernelTester::OpType::RSubC);
34 }
35 }
36
37 TEST(F32_VRSUBC_MINMAX__NEON_X4, batch_lt_4) {
38 TEST_REQUIRES_ARM_NEON;
39 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
40 VBinOpCMicrokernelTester()
41 .batch_size(batch_size)
42 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x4, VBinOpCMicrokernelTester::OpType::RSubC);
43 }
44 }
45
46 TEST(F32_VRSUBC_MINMAX__NEON_X4, batch_gt_4) {
47 TEST_REQUIRES_ARM_NEON;
48 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
49 VBinOpCMicrokernelTester()
50 .batch_size(batch_size)
51 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x4, VBinOpCMicrokernelTester::OpType::RSubC);
52 }
53 }
54
55 TEST(F32_VRSUBC_MINMAX__NEON_X4, inplace) {
56 TEST_REQUIRES_ARM_NEON;
57 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
58 VBinOpCMicrokernelTester()
59 .batch_size(batch_size)
60 .inplace(true)
61 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x4, VBinOpCMicrokernelTester::OpType::RSubC);
62 }
63 }
64
65 TEST(F32_VRSUBC_MINMAX__NEON_X4, qmin) {
66 TEST_REQUIRES_ARM_NEON;
67 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
68 VBinOpCMicrokernelTester()
69 .batch_size(batch_size)
70 .qmin(128)
71 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x4, VBinOpCMicrokernelTester::OpType::RSubC);
72 }
73 }
74
75 TEST(F32_VRSUBC_MINMAX__NEON_X4, qmax) {
76 TEST_REQUIRES_ARM_NEON;
77 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
78 VBinOpCMicrokernelTester()
79 .batch_size(batch_size)
80 .qmax(128)
81 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x4, VBinOpCMicrokernelTester::OpType::RSubC);
82 }
83 }
84#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
85
86
87#if XNN_ARCH_ARM || XNN_ARCH_ARM64
88 TEST(F32_VRSUBC_MINMAX__NEON_X8, batch_eq_8) {
89 TEST_REQUIRES_ARM_NEON;
90 VBinOpCMicrokernelTester()
91 .batch_size(8)
92 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x8, VBinOpCMicrokernelTester::OpType::RSubC);
93 }
94
95 TEST(F32_VRSUBC_MINMAX__NEON_X8, batch_div_8) {
96 TEST_REQUIRES_ARM_NEON;
97 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
98 VBinOpCMicrokernelTester()
99 .batch_size(batch_size)
100 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x8, VBinOpCMicrokernelTester::OpType::RSubC);
101 }
102 }
103
104 TEST(F32_VRSUBC_MINMAX__NEON_X8, batch_lt_8) {
105 TEST_REQUIRES_ARM_NEON;
106 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
107 VBinOpCMicrokernelTester()
108 .batch_size(batch_size)
109 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x8, VBinOpCMicrokernelTester::OpType::RSubC);
110 }
111 }
112
113 TEST(F32_VRSUBC_MINMAX__NEON_X8, batch_gt_8) {
114 TEST_REQUIRES_ARM_NEON;
115 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
116 VBinOpCMicrokernelTester()
117 .batch_size(batch_size)
118 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x8, VBinOpCMicrokernelTester::OpType::RSubC);
119 }
120 }
121
122 TEST(F32_VRSUBC_MINMAX__NEON_X8, inplace) {
123 TEST_REQUIRES_ARM_NEON;
124 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
125 VBinOpCMicrokernelTester()
126 .batch_size(batch_size)
127 .inplace(true)
128 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x8, VBinOpCMicrokernelTester::OpType::RSubC);
129 }
130 }
131
132 TEST(F32_VRSUBC_MINMAX__NEON_X8, qmin) {
133 TEST_REQUIRES_ARM_NEON;
134 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
135 VBinOpCMicrokernelTester()
136 .batch_size(batch_size)
137 .qmin(128)
138 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x8, VBinOpCMicrokernelTester::OpType::RSubC);
139 }
140 }
141
142 TEST(F32_VRSUBC_MINMAX__NEON_X8, qmax) {
143 TEST_REQUIRES_ARM_NEON;
144 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
145 VBinOpCMicrokernelTester()
146 .batch_size(batch_size)
147 .qmax(128)
148 .Test(xnn_f32_vrsubc_minmax_ukernel__neon_x8, VBinOpCMicrokernelTester::OpType::RSubC);
149 }
150 }
151#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
152
153
154#if XNN_ARCH_X86 || XNN_ARCH_X86_64
155 TEST(F32_VRSUBC_MINMAX__SSE_X4, batch_eq_4) {
156 TEST_REQUIRES_X86_SSE;
157 VBinOpCMicrokernelTester()
158 .batch_size(4)
159 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x4, VBinOpCMicrokernelTester::OpType::RSubC);
160 }
161
162 TEST(F32_VRSUBC_MINMAX__SSE_X4, batch_div_4) {
163 TEST_REQUIRES_X86_SSE;
164 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
165 VBinOpCMicrokernelTester()
166 .batch_size(batch_size)
167 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x4, VBinOpCMicrokernelTester::OpType::RSubC);
168 }
169 }
170
171 TEST(F32_VRSUBC_MINMAX__SSE_X4, batch_lt_4) {
172 TEST_REQUIRES_X86_SSE;
173 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
174 VBinOpCMicrokernelTester()
175 .batch_size(batch_size)
176 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x4, VBinOpCMicrokernelTester::OpType::RSubC);
177 }
178 }
179
180 TEST(F32_VRSUBC_MINMAX__SSE_X4, batch_gt_4) {
181 TEST_REQUIRES_X86_SSE;
182 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
183 VBinOpCMicrokernelTester()
184 .batch_size(batch_size)
185 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x4, VBinOpCMicrokernelTester::OpType::RSubC);
186 }
187 }
188
189 TEST(F32_VRSUBC_MINMAX__SSE_X4, inplace) {
190 TEST_REQUIRES_X86_SSE;
191 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
192 VBinOpCMicrokernelTester()
193 .batch_size(batch_size)
194 .inplace(true)
195 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x4, VBinOpCMicrokernelTester::OpType::RSubC);
196 }
197 }
198
199 TEST(F32_VRSUBC_MINMAX__SSE_X4, qmin) {
200 TEST_REQUIRES_X86_SSE;
201 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
202 VBinOpCMicrokernelTester()
203 .batch_size(batch_size)
204 .qmin(128)
205 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x4, VBinOpCMicrokernelTester::OpType::RSubC);
206 }
207 }
208
209 TEST(F32_VRSUBC_MINMAX__SSE_X4, qmax) {
210 TEST_REQUIRES_X86_SSE;
211 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
212 VBinOpCMicrokernelTester()
213 .batch_size(batch_size)
214 .qmax(128)
215 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x4, VBinOpCMicrokernelTester::OpType::RSubC);
216 }
217 }
218#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
219
220
221#if XNN_ARCH_X86 || XNN_ARCH_X86_64
222 TEST(F32_VRSUBC_MINMAX__SSE_X8, batch_eq_8) {
223 TEST_REQUIRES_X86_SSE;
224 VBinOpCMicrokernelTester()
225 .batch_size(8)
226 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x8, VBinOpCMicrokernelTester::OpType::RSubC);
227 }
228
229 TEST(F32_VRSUBC_MINMAX__SSE_X8, batch_div_8) {
230 TEST_REQUIRES_X86_SSE;
231 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
232 VBinOpCMicrokernelTester()
233 .batch_size(batch_size)
234 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x8, VBinOpCMicrokernelTester::OpType::RSubC);
235 }
236 }
237
238 TEST(F32_VRSUBC_MINMAX__SSE_X8, batch_lt_8) {
239 TEST_REQUIRES_X86_SSE;
240 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
241 VBinOpCMicrokernelTester()
242 .batch_size(batch_size)
243 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x8, VBinOpCMicrokernelTester::OpType::RSubC);
244 }
245 }
246
247 TEST(F32_VRSUBC_MINMAX__SSE_X8, batch_gt_8) {
248 TEST_REQUIRES_X86_SSE;
249 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
250 VBinOpCMicrokernelTester()
251 .batch_size(batch_size)
252 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x8, VBinOpCMicrokernelTester::OpType::RSubC);
253 }
254 }
255
256 TEST(F32_VRSUBC_MINMAX__SSE_X8, inplace) {
257 TEST_REQUIRES_X86_SSE;
258 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
259 VBinOpCMicrokernelTester()
260 .batch_size(batch_size)
261 .inplace(true)
262 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x8, VBinOpCMicrokernelTester::OpType::RSubC);
263 }
264 }
265
266 TEST(F32_VRSUBC_MINMAX__SSE_X8, qmin) {
267 TEST_REQUIRES_X86_SSE;
268 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
269 VBinOpCMicrokernelTester()
270 .batch_size(batch_size)
271 .qmin(128)
272 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x8, VBinOpCMicrokernelTester::OpType::RSubC);
273 }
274 }
275
276 TEST(F32_VRSUBC_MINMAX__SSE_X8, qmax) {
277 TEST_REQUIRES_X86_SSE;
278 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
279 VBinOpCMicrokernelTester()
280 .batch_size(batch_size)
281 .qmax(128)
282 .Test(xnn_f32_vrsubc_minmax_ukernel__sse_x8, VBinOpCMicrokernelTester::OpType::RSubC);
283 }
284 }
285#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
286
287
288#if XNN_ARCH_X86 || XNN_ARCH_X86_64
289 TEST(F32_VRSUBC_MINMAX__AVX_X8, batch_eq_8) {
290 TEST_REQUIRES_X86_AVX;
291 VBinOpCMicrokernelTester()
292 .batch_size(8)
293 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x8, VBinOpCMicrokernelTester::OpType::RSubC);
294 }
295
296 TEST(F32_VRSUBC_MINMAX__AVX_X8, batch_div_8) {
297 TEST_REQUIRES_X86_AVX;
298 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
299 VBinOpCMicrokernelTester()
300 .batch_size(batch_size)
301 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x8, VBinOpCMicrokernelTester::OpType::RSubC);
302 }
303 }
304
305 TEST(F32_VRSUBC_MINMAX__AVX_X8, batch_lt_8) {
306 TEST_REQUIRES_X86_AVX;
307 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
308 VBinOpCMicrokernelTester()
309 .batch_size(batch_size)
310 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x8, VBinOpCMicrokernelTester::OpType::RSubC);
311 }
312 }
313
314 TEST(F32_VRSUBC_MINMAX__AVX_X8, batch_gt_8) {
315 TEST_REQUIRES_X86_AVX;
316 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
317 VBinOpCMicrokernelTester()
318 .batch_size(batch_size)
319 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x8, VBinOpCMicrokernelTester::OpType::RSubC);
320 }
321 }
322
323 TEST(F32_VRSUBC_MINMAX__AVX_X8, inplace) {
324 TEST_REQUIRES_X86_AVX;
325 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
326 VBinOpCMicrokernelTester()
327 .batch_size(batch_size)
328 .inplace(true)
329 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x8, VBinOpCMicrokernelTester::OpType::RSubC);
330 }
331 }
332
333 TEST(F32_VRSUBC_MINMAX__AVX_X8, qmin) {
334 TEST_REQUIRES_X86_AVX;
335 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
336 VBinOpCMicrokernelTester()
337 .batch_size(batch_size)
338 .qmin(128)
339 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x8, VBinOpCMicrokernelTester::OpType::RSubC);
340 }
341 }
342
343 TEST(F32_VRSUBC_MINMAX__AVX_X8, qmax) {
344 TEST_REQUIRES_X86_AVX;
345 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
346 VBinOpCMicrokernelTester()
347 .batch_size(batch_size)
348 .qmax(128)
349 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x8, VBinOpCMicrokernelTester::OpType::RSubC);
350 }
351 }
352#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
353
354
355#if XNN_ARCH_X86 || XNN_ARCH_X86_64
356 TEST(F32_VRSUBC_MINMAX__AVX_X16, batch_eq_16) {
357 TEST_REQUIRES_X86_AVX;
358 VBinOpCMicrokernelTester()
359 .batch_size(16)
360 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x16, VBinOpCMicrokernelTester::OpType::RSubC);
361 }
362
363 TEST(F32_VRSUBC_MINMAX__AVX_X16, batch_div_16) {
364 TEST_REQUIRES_X86_AVX;
365 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
366 VBinOpCMicrokernelTester()
367 .batch_size(batch_size)
368 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x16, VBinOpCMicrokernelTester::OpType::RSubC);
369 }
370 }
371
372 TEST(F32_VRSUBC_MINMAX__AVX_X16, batch_lt_16) {
373 TEST_REQUIRES_X86_AVX;
374 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
375 VBinOpCMicrokernelTester()
376 .batch_size(batch_size)
377 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x16, VBinOpCMicrokernelTester::OpType::RSubC);
378 }
379 }
380
381 TEST(F32_VRSUBC_MINMAX__AVX_X16, batch_gt_16) {
382 TEST_REQUIRES_X86_AVX;
383 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
384 VBinOpCMicrokernelTester()
385 .batch_size(batch_size)
386 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x16, VBinOpCMicrokernelTester::OpType::RSubC);
387 }
388 }
389
390 TEST(F32_VRSUBC_MINMAX__AVX_X16, inplace) {
391 TEST_REQUIRES_X86_AVX;
392 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
393 VBinOpCMicrokernelTester()
394 .batch_size(batch_size)
395 .inplace(true)
396 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x16, VBinOpCMicrokernelTester::OpType::RSubC);
397 }
398 }
399
400 TEST(F32_VRSUBC_MINMAX__AVX_X16, qmin) {
401 TEST_REQUIRES_X86_AVX;
402 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
403 VBinOpCMicrokernelTester()
404 .batch_size(batch_size)
405 .qmin(128)
406 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x16, VBinOpCMicrokernelTester::OpType::RSubC);
407 }
408 }
409
410 TEST(F32_VRSUBC_MINMAX__AVX_X16, qmax) {
411 TEST_REQUIRES_X86_AVX;
412 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
413 VBinOpCMicrokernelTester()
414 .batch_size(batch_size)
415 .qmax(128)
416 .Test(xnn_f32_vrsubc_minmax_ukernel__avx_x16, VBinOpCMicrokernelTester::OpType::RSubC);
417 }
418 }
419#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
420
421
422#if XNN_ARCH_X86 || XNN_ARCH_X86_64
423 TEST(F32_VRSUBC_MINMAX__AVX512F_X16, batch_eq_16) {
424 TEST_REQUIRES_X86_AVX512F;
425 VBinOpCMicrokernelTester()
426 .batch_size(16)
427 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x16, VBinOpCMicrokernelTester::OpType::RSubC);
428 }
429
430 TEST(F32_VRSUBC_MINMAX__AVX512F_X16, batch_div_16) {
431 TEST_REQUIRES_X86_AVX512F;
432 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
433 VBinOpCMicrokernelTester()
434 .batch_size(batch_size)
435 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x16, VBinOpCMicrokernelTester::OpType::RSubC);
436 }
437 }
438
439 TEST(F32_VRSUBC_MINMAX__AVX512F_X16, batch_lt_16) {
440 TEST_REQUIRES_X86_AVX512F;
441 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
442 VBinOpCMicrokernelTester()
443 .batch_size(batch_size)
444 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x16, VBinOpCMicrokernelTester::OpType::RSubC);
445 }
446 }
447
448 TEST(F32_VRSUBC_MINMAX__AVX512F_X16, batch_gt_16) {
449 TEST_REQUIRES_X86_AVX512F;
450 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
451 VBinOpCMicrokernelTester()
452 .batch_size(batch_size)
453 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x16, VBinOpCMicrokernelTester::OpType::RSubC);
454 }
455 }
456
457 TEST(F32_VRSUBC_MINMAX__AVX512F_X16, inplace) {
458 TEST_REQUIRES_X86_AVX512F;
459 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
460 VBinOpCMicrokernelTester()
461 .batch_size(batch_size)
462 .inplace(true)
463 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x16, VBinOpCMicrokernelTester::OpType::RSubC);
464 }
465 }
466
467 TEST(F32_VRSUBC_MINMAX__AVX512F_X16, qmin) {
468 TEST_REQUIRES_X86_AVX512F;
469 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
470 VBinOpCMicrokernelTester()
471 .batch_size(batch_size)
472 .qmin(128)
473 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x16, VBinOpCMicrokernelTester::OpType::RSubC);
474 }
475 }
476
477 TEST(F32_VRSUBC_MINMAX__AVX512F_X16, qmax) {
478 TEST_REQUIRES_X86_AVX512F;
479 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
480 VBinOpCMicrokernelTester()
481 .batch_size(batch_size)
482 .qmax(128)
483 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x16, VBinOpCMicrokernelTester::OpType::RSubC);
484 }
485 }
486#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
487
488
489#if XNN_ARCH_X86 || XNN_ARCH_X86_64
490 TEST(F32_VRSUBC_MINMAX__AVX512F_X32, batch_eq_32) {
491 TEST_REQUIRES_X86_AVX512F;
492 VBinOpCMicrokernelTester()
493 .batch_size(32)
494 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x32, VBinOpCMicrokernelTester::OpType::RSubC);
495 }
496
497 TEST(F32_VRSUBC_MINMAX__AVX512F_X32, batch_div_32) {
498 TEST_REQUIRES_X86_AVX512F;
499 for (size_t batch_size = 64; batch_size < 320; batch_size += 32) {
500 VBinOpCMicrokernelTester()
501 .batch_size(batch_size)
502 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x32, VBinOpCMicrokernelTester::OpType::RSubC);
503 }
504 }
505
506 TEST(F32_VRSUBC_MINMAX__AVX512F_X32, batch_lt_32) {
507 TEST_REQUIRES_X86_AVX512F;
508 for (size_t batch_size = 1; batch_size < 32; batch_size++) {
509 VBinOpCMicrokernelTester()
510 .batch_size(batch_size)
511 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x32, VBinOpCMicrokernelTester::OpType::RSubC);
512 }
513 }
514
515 TEST(F32_VRSUBC_MINMAX__AVX512F_X32, batch_gt_32) {
516 TEST_REQUIRES_X86_AVX512F;
517 for (size_t batch_size = 33; batch_size < 64; batch_size++) {
518 VBinOpCMicrokernelTester()
519 .batch_size(batch_size)
520 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x32, VBinOpCMicrokernelTester::OpType::RSubC);
521 }
522 }
523
524 TEST(F32_VRSUBC_MINMAX__AVX512F_X32, inplace) {
525 TEST_REQUIRES_X86_AVX512F;
526 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
527 VBinOpCMicrokernelTester()
528 .batch_size(batch_size)
529 .inplace(true)
530 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x32, VBinOpCMicrokernelTester::OpType::RSubC);
531 }
532 }
533
534 TEST(F32_VRSUBC_MINMAX__AVX512F_X32, qmin) {
535 TEST_REQUIRES_X86_AVX512F;
536 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
537 VBinOpCMicrokernelTester()
538 .batch_size(batch_size)
539 .qmin(128)
540 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x32, VBinOpCMicrokernelTester::OpType::RSubC);
541 }
542 }
543
544 TEST(F32_VRSUBC_MINMAX__AVX512F_X32, qmax) {
545 TEST_REQUIRES_X86_AVX512F;
546 for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) {
547 VBinOpCMicrokernelTester()
548 .batch_size(batch_size)
549 .qmax(128)
550 .Test(xnn_f32_vrsubc_minmax_ukernel__avx512f_x32, VBinOpCMicrokernelTester::OpType::RSubC);
551 }
552 }
553#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
554
555
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700556#if XNN_ARCH_WASMSIMD
557 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X4, batch_eq_4) {
558 VBinOpCMicrokernelTester()
559 .batch_size(4)
Marat Dukhan47387d62020-06-29 12:53:20 -0700560 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700561 }
562
563 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X4, batch_div_4) {
564 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
565 VBinOpCMicrokernelTester()
566 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700567 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700568 }
569 }
570
571 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X4, batch_lt_4) {
572 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
573 VBinOpCMicrokernelTester()
574 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700575 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700576 }
577 }
578
579 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X4, batch_gt_4) {
580 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
581 VBinOpCMicrokernelTester()
582 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700583 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700584 }
585 }
586
587 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X4, inplace) {
588 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
589 VBinOpCMicrokernelTester()
590 .batch_size(batch_size)
591 .inplace(true)
Marat Dukhan47387d62020-06-29 12:53:20 -0700592 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700593 }
594 }
595
596 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X4, qmin) {
597 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
598 VBinOpCMicrokernelTester()
599 .batch_size(batch_size)
600 .qmin(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700601 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700602 }
603 }
604
605 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X4, qmax) {
606 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
607 VBinOpCMicrokernelTester()
608 .batch_size(batch_size)
609 .qmax(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700610 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700611 }
612 }
613#endif // XNN_ARCH_WASMSIMD
614
615
616#if XNN_ARCH_WASMSIMD
617 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X8, batch_eq_8) {
618 VBinOpCMicrokernelTester()
619 .batch_size(8)
Marat Dukhan47387d62020-06-29 12:53:20 -0700620 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700621 }
622
623 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X8, batch_div_8) {
624 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
625 VBinOpCMicrokernelTester()
626 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700627 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700628 }
629 }
630
631 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X8, batch_lt_8) {
632 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
633 VBinOpCMicrokernelTester()
634 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700635 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700636 }
637 }
638
639 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X8, batch_gt_8) {
640 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
641 VBinOpCMicrokernelTester()
642 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700643 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700644 }
645 }
646
647 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X8, inplace) {
648 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
649 VBinOpCMicrokernelTester()
650 .batch_size(batch_size)
651 .inplace(true)
Marat Dukhan47387d62020-06-29 12:53:20 -0700652 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700653 }
654 }
655
656 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X8, qmin) {
657 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
658 VBinOpCMicrokernelTester()
659 .batch_size(batch_size)
660 .qmin(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700661 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700662 }
663 }
664
665 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X8, qmax) {
666 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
667 VBinOpCMicrokernelTester()
668 .batch_size(batch_size)
669 .qmax(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700670 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700671 }
672 }
673#endif // XNN_ARCH_WASMSIMD
674
675
676#if XNN_ARCH_WASMSIMD
Frank Barchard9c7308f2020-08-31 17:03:01 -0700677 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X16, batch_eq_16) {
678 VBinOpCMicrokernelTester()
679 .batch_size(16)
680 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x16, VBinOpCMicrokernelTester::OpType::RSubC);
681 }
682
683 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X16, batch_div_16) {
684 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
685 VBinOpCMicrokernelTester()
686 .batch_size(batch_size)
687 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x16, VBinOpCMicrokernelTester::OpType::RSubC);
688 }
689 }
690
691 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X16, batch_lt_16) {
692 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
693 VBinOpCMicrokernelTester()
694 .batch_size(batch_size)
695 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x16, VBinOpCMicrokernelTester::OpType::RSubC);
696 }
697 }
698
699 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X16, batch_gt_16) {
700 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
701 VBinOpCMicrokernelTester()
702 .batch_size(batch_size)
703 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x16, VBinOpCMicrokernelTester::OpType::RSubC);
704 }
705 }
706
707 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X16, inplace) {
708 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
709 VBinOpCMicrokernelTester()
710 .batch_size(batch_size)
711 .inplace(true)
712 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x16, VBinOpCMicrokernelTester::OpType::RSubC);
713 }
714 }
715
716 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X16, qmin) {
717 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
718 VBinOpCMicrokernelTester()
719 .batch_size(batch_size)
720 .qmin(128)
721 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x16, VBinOpCMicrokernelTester::OpType::RSubC);
722 }
723 }
724
725 TEST(F32_VRSUBC_MINMAX__WASMSIMD_ARM_X16, qmax) {
726 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
727 VBinOpCMicrokernelTester()
728 .batch_size(batch_size)
729 .qmax(128)
730 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_arm_x16, VBinOpCMicrokernelTester::OpType::RSubC);
731 }
732 }
733#endif // XNN_ARCH_WASMSIMD
734
735
736#if XNN_ARCH_WASMSIMD
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700737 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X4, batch_eq_4) {
738 VBinOpCMicrokernelTester()
739 .batch_size(4)
Marat Dukhan47387d62020-06-29 12:53:20 -0700740 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700741 }
742
743 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X4, batch_div_4) {
744 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
745 VBinOpCMicrokernelTester()
746 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700747 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700748 }
749 }
750
751 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X4, batch_lt_4) {
752 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
753 VBinOpCMicrokernelTester()
754 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700755 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700756 }
757 }
758
759 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X4, batch_gt_4) {
760 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
761 VBinOpCMicrokernelTester()
762 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700763 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700764 }
765 }
766
767 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X4, inplace) {
768 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
769 VBinOpCMicrokernelTester()
770 .batch_size(batch_size)
771 .inplace(true)
Marat Dukhan47387d62020-06-29 12:53:20 -0700772 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700773 }
774 }
775
776 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X4, qmin) {
777 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
778 VBinOpCMicrokernelTester()
779 .batch_size(batch_size)
780 .qmin(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700781 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700782 }
783 }
784
785 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X4, qmax) {
786 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
787 VBinOpCMicrokernelTester()
788 .batch_size(batch_size)
789 .qmax(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700790 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700791 }
792 }
793#endif // XNN_ARCH_WASMSIMD
794
795
796#if XNN_ARCH_WASMSIMD
797 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X8, batch_eq_8) {
798 VBinOpCMicrokernelTester()
799 .batch_size(8)
Marat Dukhan47387d62020-06-29 12:53:20 -0700800 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700801 }
802
803 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X8, batch_div_8) {
804 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
805 VBinOpCMicrokernelTester()
806 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700807 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700808 }
809 }
810
811 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X8, batch_lt_8) {
812 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
813 VBinOpCMicrokernelTester()
814 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700815 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700816 }
817 }
818
819 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X8, batch_gt_8) {
820 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
821 VBinOpCMicrokernelTester()
822 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700823 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700824 }
825 }
826
827 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X8, inplace) {
828 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
829 VBinOpCMicrokernelTester()
830 .batch_size(batch_size)
831 .inplace(true)
Marat Dukhan47387d62020-06-29 12:53:20 -0700832 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700833 }
834 }
835
836 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X8, qmin) {
837 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
838 VBinOpCMicrokernelTester()
839 .batch_size(batch_size)
840 .qmin(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700841 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700842 }
843 }
844
845 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X8, qmax) {
846 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
847 VBinOpCMicrokernelTester()
848 .batch_size(batch_size)
849 .qmax(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700850 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x8, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700851 }
852 }
853#endif // XNN_ARCH_WASMSIMD
854
855
Frank Barchard9c7308f2020-08-31 17:03:01 -0700856#if XNN_ARCH_WASMSIMD
857 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X16, batch_eq_16) {
858 VBinOpCMicrokernelTester()
859 .batch_size(16)
860 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x16, VBinOpCMicrokernelTester::OpType::RSubC);
861 }
862
863 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X16, batch_div_16) {
864 for (size_t batch_size = 32; batch_size < 160; batch_size += 16) {
865 VBinOpCMicrokernelTester()
866 .batch_size(batch_size)
867 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x16, VBinOpCMicrokernelTester::OpType::RSubC);
868 }
869 }
870
871 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X16, batch_lt_16) {
872 for (size_t batch_size = 1; batch_size < 16; batch_size++) {
873 VBinOpCMicrokernelTester()
874 .batch_size(batch_size)
875 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x16, VBinOpCMicrokernelTester::OpType::RSubC);
876 }
877 }
878
879 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X16, batch_gt_16) {
880 for (size_t batch_size = 17; batch_size < 32; batch_size++) {
881 VBinOpCMicrokernelTester()
882 .batch_size(batch_size)
883 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x16, VBinOpCMicrokernelTester::OpType::RSubC);
884 }
885 }
886
887 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X16, inplace) {
888 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
889 VBinOpCMicrokernelTester()
890 .batch_size(batch_size)
891 .inplace(true)
892 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x16, VBinOpCMicrokernelTester::OpType::RSubC);
893 }
894 }
895
896 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X16, qmin) {
897 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
898 VBinOpCMicrokernelTester()
899 .batch_size(batch_size)
900 .qmin(128)
901 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x16, VBinOpCMicrokernelTester::OpType::RSubC);
902 }
903 }
904
905 TEST(F32_VRSUBC_MINMAX__WASMSIMD_X86_X16, qmax) {
906 for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) {
907 VBinOpCMicrokernelTester()
908 .batch_size(batch_size)
909 .qmax(128)
910 .Test(xnn_f32_vrsubc_minmax_ukernel__wasmsimd_x86_x16, VBinOpCMicrokernelTester::OpType::RSubC);
911 }
912 }
913#endif // XNN_ARCH_WASMSIMD
914
915
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700916#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700917 TEST(F32_VRSUBC_MINMAX__WASM_X1, batch_eq_1) {
918 VBinOpCMicrokernelTester()
919 .batch_size(1)
Marat Dukhan47387d62020-06-29 12:53:20 -0700920 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x1, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700921 }
922
923 TEST(F32_VRSUBC_MINMAX__WASM_X1, batch_gt_1) {
924 for (size_t batch_size = 2; batch_size < 10; batch_size++) {
925 VBinOpCMicrokernelTester()
926 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700927 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x1, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700928 }
929 }
930
931 TEST(F32_VRSUBC_MINMAX__WASM_X1, inplace) {
932 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
933 VBinOpCMicrokernelTester()
934 .batch_size(batch_size)
935 .inplace(true)
Marat Dukhan47387d62020-06-29 12:53:20 -0700936 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x1, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700937 }
938 }
939
940 TEST(F32_VRSUBC_MINMAX__WASM_X1, qmin) {
941 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
942 VBinOpCMicrokernelTester()
943 .batch_size(batch_size)
944 .qmin(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700945 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x1, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700946 }
947 }
948
949 TEST(F32_VRSUBC_MINMAX__WASM_X1, qmax) {
950 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
951 VBinOpCMicrokernelTester()
952 .batch_size(batch_size)
953 .qmax(128)
Marat Dukhan47387d62020-06-29 12:53:20 -0700954 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x1, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700955 }
956 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700957#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700958
959
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700960#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700961 TEST(F32_VRSUBC_MINMAX__WASM_X2, batch_eq_2) {
962 VBinOpCMicrokernelTester()
963 .batch_size(2)
Marat Dukhan47387d62020-06-29 12:53:20 -0700964 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x2, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700965 }
966
967 TEST(F32_VRSUBC_MINMAX__WASM_X2, batch_div_2) {
968 for (size_t batch_size = 4; batch_size < 20; batch_size += 2) {
969 VBinOpCMicrokernelTester()
970 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700971 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x2, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700972 }
973 }
974
975 TEST(F32_VRSUBC_MINMAX__WASM_X2, batch_lt_2) {
976 for (size_t batch_size = 1; batch_size < 2; batch_size++) {
977 VBinOpCMicrokernelTester()
978 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700979 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x2, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700980 }
981 }
982
983 TEST(F32_VRSUBC_MINMAX__WASM_X2, batch_gt_2) {
984 for (size_t batch_size = 3; batch_size < 4; batch_size++) {
985 VBinOpCMicrokernelTester()
986 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -0700987 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x2, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700988 }
989 }
990
991 TEST(F32_VRSUBC_MINMAX__WASM_X2, inplace) {
992 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
993 VBinOpCMicrokernelTester()
994 .batch_size(batch_size)
995 .inplace(true)
Marat Dukhan47387d62020-06-29 12:53:20 -0700996 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x2, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700997 }
998 }
999
1000 TEST(F32_VRSUBC_MINMAX__WASM_X2, qmin) {
1001 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
1002 VBinOpCMicrokernelTester()
1003 .batch_size(batch_size)
1004 .qmin(128)
Marat Dukhan47387d62020-06-29 12:53:20 -07001005 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x2, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001006 }
1007 }
1008
1009 TEST(F32_VRSUBC_MINMAX__WASM_X2, qmax) {
1010 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
1011 VBinOpCMicrokernelTester()
1012 .batch_size(batch_size)
1013 .qmax(128)
Marat Dukhan47387d62020-06-29 12:53:20 -07001014 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x2, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001015 }
1016 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -07001017#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001018
1019
Marat Dukhanfb5b20a2020-06-26 13:14:50 -07001020#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001021 TEST(F32_VRSUBC_MINMAX__WASM_X4, batch_eq_4) {
1022 VBinOpCMicrokernelTester()
1023 .batch_size(4)
Marat Dukhan47387d62020-06-29 12:53:20 -07001024 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001025 }
1026
1027 TEST(F32_VRSUBC_MINMAX__WASM_X4, batch_div_4) {
1028 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
1029 VBinOpCMicrokernelTester()
1030 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -07001031 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001032 }
1033 }
1034
1035 TEST(F32_VRSUBC_MINMAX__WASM_X4, batch_lt_4) {
1036 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
1037 VBinOpCMicrokernelTester()
1038 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -07001039 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001040 }
1041 }
1042
1043 TEST(F32_VRSUBC_MINMAX__WASM_X4, batch_gt_4) {
1044 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
1045 VBinOpCMicrokernelTester()
1046 .batch_size(batch_size)
Marat Dukhan47387d62020-06-29 12:53:20 -07001047 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001048 }
1049 }
1050
1051 TEST(F32_VRSUBC_MINMAX__WASM_X4, inplace) {
1052 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
1053 VBinOpCMicrokernelTester()
1054 .batch_size(batch_size)
1055 .inplace(true)
Marat Dukhan47387d62020-06-29 12:53:20 -07001056 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001057 }
1058 }
1059
1060 TEST(F32_VRSUBC_MINMAX__WASM_X4, qmin) {
1061 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
1062 VBinOpCMicrokernelTester()
1063 .batch_size(batch_size)
1064 .qmin(128)
Marat Dukhan47387d62020-06-29 12:53:20 -07001065 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001066 }
1067 }
1068
1069 TEST(F32_VRSUBC_MINMAX__WASM_X4, qmax) {
1070 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
1071 VBinOpCMicrokernelTester()
1072 .batch_size(batch_size)
1073 .qmax(128)
Marat Dukhan47387d62020-06-29 12:53:20 -07001074 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x4, VBinOpCMicrokernelTester::OpType::RSubC);
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001075 }
1076 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -07001077#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001078
1079
Frank Barchard9c7308f2020-08-31 17:03:01 -07001080#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
1081 TEST(F32_VRSUBC_MINMAX__WASM_X8, batch_eq_8) {
1082 VBinOpCMicrokernelTester()
1083 .batch_size(8)
1084 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
1085 }
1086
1087 TEST(F32_VRSUBC_MINMAX__WASM_X8, batch_div_8) {
1088 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
1089 VBinOpCMicrokernelTester()
1090 .batch_size(batch_size)
1091 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
1092 }
1093 }
1094
1095 TEST(F32_VRSUBC_MINMAX__WASM_X8, batch_lt_8) {
1096 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
1097 VBinOpCMicrokernelTester()
1098 .batch_size(batch_size)
1099 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
1100 }
1101 }
1102
1103 TEST(F32_VRSUBC_MINMAX__WASM_X8, batch_gt_8) {
1104 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
1105 VBinOpCMicrokernelTester()
1106 .batch_size(batch_size)
1107 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
1108 }
1109 }
1110
1111 TEST(F32_VRSUBC_MINMAX__WASM_X8, inplace) {
1112 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
1113 VBinOpCMicrokernelTester()
1114 .batch_size(batch_size)
1115 .inplace(true)
1116 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
1117 }
1118 }
1119
1120 TEST(F32_VRSUBC_MINMAX__WASM_X8, qmin) {
1121 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
1122 VBinOpCMicrokernelTester()
1123 .batch_size(batch_size)
1124 .qmin(128)
1125 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
1126 }
1127 }
1128
1129 TEST(F32_VRSUBC_MINMAX__WASM_X8, qmax) {
1130 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
1131 VBinOpCMicrokernelTester()
1132 .batch_size(batch_size)
1133 .qmax(128)
1134 .Test(xnn_f32_vrsubc_minmax_ukernel__wasm_x8, VBinOpCMicrokernelTester::OpType::RSubC);
1135 }
1136 }
1137#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
1138
1139
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001140TEST(F32_VRSUBC_MINMAX__SCALAR_X1, batch_eq_1) {
1141 VBinOpCMicrokernelTester()
1142 .batch_size(1)
1143 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x1, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1144}
1145
1146TEST(F32_VRSUBC_MINMAX__SCALAR_X1, batch_gt_1) {
1147 for (size_t batch_size = 2; batch_size < 10; batch_size++) {
1148 VBinOpCMicrokernelTester()
1149 .batch_size(batch_size)
1150 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x1, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1151 }
1152}
1153
1154TEST(F32_VRSUBC_MINMAX__SCALAR_X1, inplace) {
1155 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
1156 VBinOpCMicrokernelTester()
1157 .batch_size(batch_size)
1158 .inplace(true)
1159 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x1, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1160 }
1161}
1162
1163TEST(F32_VRSUBC_MINMAX__SCALAR_X1, qmin) {
1164 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
1165 VBinOpCMicrokernelTester()
1166 .batch_size(batch_size)
1167 .qmin(128)
1168 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x1, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1169 }
1170}
1171
1172TEST(F32_VRSUBC_MINMAX__SCALAR_X1, qmax) {
1173 for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) {
1174 VBinOpCMicrokernelTester()
1175 .batch_size(batch_size)
1176 .qmax(128)
1177 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x1, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1178 }
1179}
1180
1181TEST(F32_VRSUBC_MINMAX__SCALAR_X2, batch_eq_2) {
1182 VBinOpCMicrokernelTester()
1183 .batch_size(2)
1184 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x2, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1185}
1186
1187TEST(F32_VRSUBC_MINMAX__SCALAR_X2, batch_div_2) {
1188 for (size_t batch_size = 4; batch_size < 20; batch_size += 2) {
1189 VBinOpCMicrokernelTester()
1190 .batch_size(batch_size)
1191 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x2, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1192 }
1193}
1194
1195TEST(F32_VRSUBC_MINMAX__SCALAR_X2, batch_lt_2) {
1196 for (size_t batch_size = 1; batch_size < 2; batch_size++) {
1197 VBinOpCMicrokernelTester()
1198 .batch_size(batch_size)
1199 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x2, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1200 }
1201}
1202
1203TEST(F32_VRSUBC_MINMAX__SCALAR_X2, batch_gt_2) {
1204 for (size_t batch_size = 3; batch_size < 4; batch_size++) {
1205 VBinOpCMicrokernelTester()
1206 .batch_size(batch_size)
1207 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x2, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1208 }
1209}
1210
1211TEST(F32_VRSUBC_MINMAX__SCALAR_X2, inplace) {
1212 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
1213 VBinOpCMicrokernelTester()
1214 .batch_size(batch_size)
1215 .inplace(true)
1216 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x2, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1217 }
1218}
1219
1220TEST(F32_VRSUBC_MINMAX__SCALAR_X2, qmin) {
1221 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
1222 VBinOpCMicrokernelTester()
1223 .batch_size(batch_size)
1224 .qmin(128)
1225 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x2, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1226 }
1227}
1228
1229TEST(F32_VRSUBC_MINMAX__SCALAR_X2, qmax) {
1230 for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) {
1231 VBinOpCMicrokernelTester()
1232 .batch_size(batch_size)
1233 .qmax(128)
1234 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x2, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1235 }
1236}
1237
1238TEST(F32_VRSUBC_MINMAX__SCALAR_X4, batch_eq_4) {
1239 VBinOpCMicrokernelTester()
1240 .batch_size(4)
1241 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x4, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1242}
1243
1244TEST(F32_VRSUBC_MINMAX__SCALAR_X4, batch_div_4) {
1245 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
1246 VBinOpCMicrokernelTester()
1247 .batch_size(batch_size)
1248 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x4, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1249 }
1250}
1251
1252TEST(F32_VRSUBC_MINMAX__SCALAR_X4, batch_lt_4) {
1253 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
1254 VBinOpCMicrokernelTester()
1255 .batch_size(batch_size)
1256 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x4, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1257 }
1258}
1259
1260TEST(F32_VRSUBC_MINMAX__SCALAR_X4, batch_gt_4) {
1261 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
1262 VBinOpCMicrokernelTester()
1263 .batch_size(batch_size)
1264 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x4, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1265 }
1266}
1267
1268TEST(F32_VRSUBC_MINMAX__SCALAR_X4, inplace) {
1269 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
1270 VBinOpCMicrokernelTester()
1271 .batch_size(batch_size)
1272 .inplace(true)
1273 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x4, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1274 }
1275}
1276
1277TEST(F32_VRSUBC_MINMAX__SCALAR_X4, qmin) {
1278 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
1279 VBinOpCMicrokernelTester()
1280 .batch_size(batch_size)
1281 .qmin(128)
1282 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x4, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1283 }
1284}
1285
1286TEST(F32_VRSUBC_MINMAX__SCALAR_X4, qmax) {
1287 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
1288 VBinOpCMicrokernelTester()
1289 .batch_size(batch_size)
1290 .qmax(128)
1291 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x4, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1292 }
Frank Barchard9c7308f2020-08-31 17:03:01 -07001293}
1294
1295TEST(F32_VRSUBC_MINMAX__SCALAR_X8, batch_eq_8) {
1296 VBinOpCMicrokernelTester()
1297 .batch_size(8)
1298 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x8, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1299}
1300
1301TEST(F32_VRSUBC_MINMAX__SCALAR_X8, batch_div_8) {
1302 for (size_t batch_size = 16; batch_size < 80; batch_size += 8) {
1303 VBinOpCMicrokernelTester()
1304 .batch_size(batch_size)
1305 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x8, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1306 }
1307}
1308
1309TEST(F32_VRSUBC_MINMAX__SCALAR_X8, batch_lt_8) {
1310 for (size_t batch_size = 1; batch_size < 8; batch_size++) {
1311 VBinOpCMicrokernelTester()
1312 .batch_size(batch_size)
1313 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x8, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1314 }
1315}
1316
1317TEST(F32_VRSUBC_MINMAX__SCALAR_X8, batch_gt_8) {
1318 for (size_t batch_size = 9; batch_size < 16; batch_size++) {
1319 VBinOpCMicrokernelTester()
1320 .batch_size(batch_size)
1321 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x8, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1322 }
1323}
1324
1325TEST(F32_VRSUBC_MINMAX__SCALAR_X8, inplace) {
1326 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
1327 VBinOpCMicrokernelTester()
1328 .batch_size(batch_size)
1329 .inplace(true)
1330 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x8, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1331 }
1332}
1333
1334TEST(F32_VRSUBC_MINMAX__SCALAR_X8, qmin) {
1335 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
1336 VBinOpCMicrokernelTester()
1337 .batch_size(batch_size)
1338 .qmin(128)
1339 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x8, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1340 }
1341}
1342
1343TEST(F32_VRSUBC_MINMAX__SCALAR_X8, qmax) {
1344 for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) {
1345 VBinOpCMicrokernelTester()
1346 .batch_size(batch_size)
1347 .qmax(128)
1348 .Test(xnn_f32_vrsubc_minmax_ukernel__scalar_x8, VBinOpCMicrokernelTester::OpType::RSubC, VBinOpCMicrokernelTester::Variant::Scalar);
1349 }
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001350}