blob: 9b1eb2443be832db9a6545986d08e41053c445c8 [file] [log] [blame]
XNNPACK Teamb455b122019-09-27 18:10:33 -07001// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
4// Copyright 2019 Google LLC
5//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
8
XNNPACK Teamb455b122019-09-27 18:10:33 -07009#include <gtest/gtest.h>
10
Marat Dukhan1dadbf72019-10-01 10:46:20 -070011#include <xnnpack/common.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070012#include <xnnpack/isa-checks.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070013
Marat Dukhan1dadbf72019-10-01 10:46:20 -070014#include <xnnpack/gavgpool.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070015#include "gavgpool-microkernel-tester.h"
16
17
Marat Dukhan1dadbf72019-10-01 10:46:20 -070018#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Marat Dukhan08b7a972020-07-14 18:17:29 -070019 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070020 TEST_REQUIRES_ARM_NEON;
21 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -070022 .rows(7)
23 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -070024 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -070025 }
26
Marat Dukhan08b7a972020-07-14 18:17:29 -070027 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070028 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -070029 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070030 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -070031 .rows(rows)
32 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -070033 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -070034 }
35 }
36
Marat Dukhan08b7a972020-07-14 18:17:29 -070037 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070038 TEST_REQUIRES_ARM_NEON;
39 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -070040 .rows(7)
41 .channels(8)
42 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -070043 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -070044 }
45
Marat Dukhan08b7a972020-07-14 18:17:29 -070046 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070047 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -070048 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070049 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -070050 .rows(7)
51 .channels(8)
52 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -070053 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -070054 }
55 }
56
Marat Dukhan08b7a972020-07-14 18:17:29 -070057 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070058 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -070059 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070060 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -070061 .rows(7)
62 .channels(8)
63 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -070064 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -070065 }
66 }
67
Marat Dukhan08b7a972020-07-14 18:17:29 -070068 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070069 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -070070 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070071 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -070072 .rows(7)
73 .channels(8)
74 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -070075 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -070076 }
77 }
78
Marat Dukhan08b7a972020-07-14 18:17:29 -070079 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070080 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -070081 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070082 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -070083 .rows(7)
84 .channels(8)
85 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -070086 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -070087 }
88 }
89
Marat Dukhan08b7a972020-07-14 18:17:29 -070090 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070091 TEST_REQUIRES_ARM_NEON;
92 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -070093 .rows(7)
94 .channels(8)
95 .input_zero_point(128)
96 .output_zero_point(128)
97 .input_scale(1.0f)
98 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -070099 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700100 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700101 }
102
Marat Dukhan08b7a972020-07-14 18:17:29 -0700103 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_eq_8_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700104 TEST_REQUIRES_ARM_NEON;
105 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700106 .rows(7)
107 .channels(8)
108 .input_zero_point(128)
109 .output_zero_point(128)
110 .input_scale(1.0f)
111 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700112 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700113 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700114 }
115
Marat Dukhan08b7a972020-07-14 18:17:29 -0700116 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_div_8_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700117 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700118 for (size_t channels = 8; channels < 128; channels += 24) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700119 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700120 .rows(7)
121 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700122 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700123 }
124 }
125
Marat Dukhan08b7a972020-07-14 18:17:29 -0700126 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_div_8_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700127 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700128 for (size_t channels = 8; channels < 128; channels += 24) {
129 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700130 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700131 .rows(rows)
132 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700133 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700134 }
135 }
136 }
137
Marat Dukhan08b7a972020-07-14 18:17:29 -0700138 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_lt_8_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700139 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700140 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700141 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700142 .rows(7)
143 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700144 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700145 }
146 }
147
Marat Dukhan08b7a972020-07-14 18:17:29 -0700148 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_lt_8_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700149 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700150 for (size_t channels = 1; channels < 8; channels++) {
151 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700152 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700153 .rows(rows)
154 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700155 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700156 }
157 }
158 }
159
Marat Dukhan08b7a972020-07-14 18:17:29 -0700160 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_lt_8_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700161 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700162 for (size_t channels = 1; channels < 8; channels++) {
163 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700164 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700165 .rows(7)
166 .channels(channels)
167 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700168 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700169 }
170 }
171 }
172
Marat Dukhan08b7a972020-07-14 18:17:29 -0700173 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_lt_8_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700174 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700175 for (size_t channels = 1; channels < 8; channels++) {
176 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700177 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700178 .rows(7)
179 .channels(channels)
180 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700181 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700182 }
183 }
184 }
185
Marat Dukhan08b7a972020-07-14 18:17:29 -0700186 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_lt_8_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700187 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700188 for (size_t channels = 1; channels < 8; channels++) {
189 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700190 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700191 .rows(7)
192 .channels(channels)
193 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700194 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700195 }
196 }
197 }
198
Marat Dukhan08b7a972020-07-14 18:17:29 -0700199 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_lt_8_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700200 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700201 for (size_t channels = 1; channels < 8; channels++) {
202 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700203 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700204 .rows(7)
205 .channels(channels)
206 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700207 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700208 }
209 }
210 }
211
Marat Dukhan08b7a972020-07-14 18:17:29 -0700212 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_lt_8_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700213 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700214 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700215 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700216 .rows(7)
217 .channels(channels)
218 .input_zero_point(128)
219 .output_zero_point(128)
220 .input_scale(1.0f)
221 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700222 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700223 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700224 }
225 }
226
Marat Dukhan08b7a972020-07-14 18:17:29 -0700227 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_lt_8_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700228 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700229 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700230 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700231 .rows(7)
232 .channels(channels)
233 .input_zero_point(128)
234 .output_zero_point(128)
235 .input_scale(1.0f)
236 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700237 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700238 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700239 }
240 }
241
Marat Dukhan08b7a972020-07-14 18:17:29 -0700242 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_gt_8_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700243 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700244 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700245 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700246 .rows(7)
247 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700248 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700249 }
250 }
251
Marat Dukhan08b7a972020-07-14 18:17:29 -0700252 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_gt_8_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700253 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700254 for (size_t channels = 9; channels < 16; channels++) {
255 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700256 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700257 .rows(rows)
258 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700259 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700260 }
261 }
262 }
263
Marat Dukhan08b7a972020-07-14 18:17:29 -0700264 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_gt_8_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700265 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700266 for (size_t channels = 9; channels < 16; channels++) {
267 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700268 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700269 .rows(7)
270 .channels(channels)
271 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700272 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700273 }
274 }
275 }
276
Marat Dukhan08b7a972020-07-14 18:17:29 -0700277 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_gt_8_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700278 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700279 for (size_t channels = 9; channels < 16; channels++) {
280 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700281 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700282 .rows(7)
283 .channels(channels)
284 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700285 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700286 }
287 }
288 }
289
Marat Dukhan08b7a972020-07-14 18:17:29 -0700290 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_gt_8_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700291 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700292 for (size_t channels = 9; channels < 16; channels++) {
293 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700294 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700295 .rows(7)
296 .channels(channels)
297 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700298 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700299 }
300 }
301 }
302
Marat Dukhan08b7a972020-07-14 18:17:29 -0700303 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_gt_8_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700304 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700305 for (size_t channels = 9; channels < 16; channels++) {
306 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700307 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700308 .rows(7)
309 .channels(channels)
310 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700311 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700312 }
313 }
314 }
315
Marat Dukhan08b7a972020-07-14 18:17:29 -0700316 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_gt_8_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700317 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700318 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700319 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700320 .rows(7)
321 .channels(channels)
322 .input_zero_point(128)
323 .output_zero_point(128)
324 .input_scale(1.0f)
325 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700326 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700327 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700328 }
329 }
330
Marat Dukhan08b7a972020-07-14 18:17:29 -0700331 TEST(QU8_GAVGPOOL_MINMAX_7X__NEON_C8, channels_gt_8_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700332 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700333 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700334 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700335 .rows(7)
336 .channels(channels)
337 .input_zero_point(128)
338 .output_zero_point(128)
339 .input_scale(1.0f)
340 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700341 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700342 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700343 }
344 }
345
Marat Dukhan08b7a972020-07-14 18:17:29 -0700346 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700347 TEST_REQUIRES_ARM_NEON;
348 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700349 .rows(14)
350 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700351 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700352 }
353
Marat Dukhan08b7a972020-07-14 18:17:29 -0700354 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700355 TEST_REQUIRES_ARM_NEON;
356 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700357 .rows(14)
358 .channels(8)
359 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700360 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700361 }
362
Marat Dukhan08b7a972020-07-14 18:17:29 -0700363 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700364 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700365 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700366 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700367 .rows(14)
368 .channels(8)
369 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700370 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700371 }
372 }
373
Marat Dukhan08b7a972020-07-14 18:17:29 -0700374 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700375 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700376 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700377 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700378 .rows(14)
379 .channels(8)
380 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700381 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700382 }
383 }
384
Marat Dukhan08b7a972020-07-14 18:17:29 -0700385 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700386 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700387 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700388 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700389 .rows(14)
390 .channels(8)
391 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700392 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700393 }
394 }
395
Marat Dukhan08b7a972020-07-14 18:17:29 -0700396 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700397 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700398 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700399 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700400 .rows(14)
401 .channels(8)
402 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700403 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700404 }
405 }
406
Marat Dukhan08b7a972020-07-14 18:17:29 -0700407 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700408 TEST_REQUIRES_ARM_NEON;
409 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700410 .rows(14)
411 .channels(8)
412 .input_zero_point(128)
413 .output_zero_point(128)
414 .input_scale(1.0f)
415 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700416 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700417 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700418 }
419
Marat Dukhan08b7a972020-07-14 18:17:29 -0700420 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700421 TEST_REQUIRES_ARM_NEON;
422 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700423 .rows(14)
424 .channels(8)
425 .input_zero_point(128)
426 .output_zero_point(128)
427 .input_scale(1.0f)
428 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700429 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700430 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700431 }
432
Marat Dukhan08b7a972020-07-14 18:17:29 -0700433 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700434 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700435 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700436 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700437 .rows(7 + rows)
438 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700439 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700440 }
441 }
442
Marat Dukhan08b7a972020-07-14 18:17:29 -0700443 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_2pass_subtile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700444 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700445 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700446 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700447 .rows(7 + rows)
448 .channels(8)
449 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700450 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700451 }
452 }
453
Marat Dukhan08b7a972020-07-14 18:17:29 -0700454 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_multipass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700455 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700456 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700457 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700458 .rows(rows)
459 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700460 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -0700461 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700462 }
463
Marat Dukhan08b7a972020-07-14 18:17:29 -0700464 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_eq_8_multipass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700465 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700466 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700467 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700468 .rows(rows)
469 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700470 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -0700471 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700472 }
473
Marat Dukhan08b7a972020-07-14 18:17:29 -0700474 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_div_8_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700475 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700476 for (size_t channels = 8; channels < 128; channels += 24) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700477 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700478 .rows(14)
479 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700480 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700481 }
482 }
483
Marat Dukhan08b7a972020-07-14 18:17:29 -0700484 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_div_8_2pass_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700485 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700486 for (size_t channels = 8; channels < 128; channels += 24) {
487 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700488 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700489 .rows(7 + rows)
490 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700491 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700492 }
493 }
494 }
495
Marat Dukhan08b7a972020-07-14 18:17:29 -0700496 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_div_8_multipass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700497 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700498 for (size_t channels = 8; channels < 128; channels += 24) {
499 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700500 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700501 .rows(rows)
502 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700503 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -0700504 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700505 }
506 }
507
Marat Dukhan08b7a972020-07-14 18:17:29 -0700508 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_div_8_multipass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700509 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700510 for (size_t channels = 8; channels < 128; channels += 24) {
511 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700512 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700513 .rows(rows)
514 .channels(channels)
515 .input_stride(131)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700516 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -0700517 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700518 }
519 }
520
Marat Dukhan08b7a972020-07-14 18:17:29 -0700521 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700522 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700523 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700524 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700525 .rows(14)
526 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700527 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700528 }
529 }
530
Marat Dukhan08b7a972020-07-14 18:17:29 -0700531 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700532 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700533 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
534 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700535 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700536 .rows(14)
537 .channels(channels)
538 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700539 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700540 }
541 }
542 }
543
Marat Dukhan08b7a972020-07-14 18:17:29 -0700544 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700545 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700546 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
547 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700548 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700549 .rows(14)
550 .channels(channels)
551 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700552 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700553 }
554 }
555 }
556
Marat Dukhan08b7a972020-07-14 18:17:29 -0700557 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700558 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700559 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
560 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700561 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700562 .rows(14)
563 .channels(channels)
564 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700565 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700566 }
567 }
568 }
569
Marat Dukhan08b7a972020-07-14 18:17:29 -0700570 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700571 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700572 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
573 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700574 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700575 .rows(14)
576 .channels(channels)
577 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700578 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700579 }
580 }
581 }
582
Marat Dukhan08b7a972020-07-14 18:17:29 -0700583 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700584 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700585 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700586 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700587 .rows(14)
588 .channels(channels)
589 .input_zero_point(128)
590 .output_zero_point(128)
591 .input_scale(1.0f)
592 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700593 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700594 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700595 }
596 }
597
Marat Dukhan08b7a972020-07-14 18:17:29 -0700598 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700599 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700600 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700601 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700602 .rows(14)
603 .channels(channels)
604 .input_zero_point(128)
605 .output_zero_point(128)
606 .input_scale(1.0f)
607 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700608 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700609 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700610 }
611 }
612
Marat Dukhan08b7a972020-07-14 18:17:29 -0700613 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_2pass_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700614 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700615 for (size_t channels = 1; channels < 8; channels++) {
616 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700617 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700618 .rows(7 + rows)
619 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700620 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700621 }
622 }
623 }
624
Marat Dukhan08b7a972020-07-14 18:17:29 -0700625 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_multipass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700626 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700627 for (size_t channels = 1; channels < 8; channels++) {
628 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700629 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700630 .rows(rows)
631 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700632 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -0700633 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700634 }
635 }
636
Marat Dukhan08b7a972020-07-14 18:17:29 -0700637 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_lt_8_multipass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700638 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700639 for (size_t channels = 1; channels < 8; channels++) {
640 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700641 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700642 .rows(rows)
643 .channels(channels)
644 .input_stride(23)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700645 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -0700646 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700647 }
648 }
649
Marat Dukhan08b7a972020-07-14 18:17:29 -0700650 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700651 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700652 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700653 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700654 .rows(14)
655 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700656 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700657 }
658 }
659
Marat Dukhan08b7a972020-07-14 18:17:29 -0700660 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700661 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700662 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
663 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700664 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700665 .rows(14)
666 .channels(channels)
667 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700668 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700669 }
670 }
671 }
672
Marat Dukhan08b7a972020-07-14 18:17:29 -0700673 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700674 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700675 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
676 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700677 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700678 .rows(14)
679 .channels(channels)
680 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700681 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700682 }
683 }
684 }
685
Marat Dukhan08b7a972020-07-14 18:17:29 -0700686 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700687 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700688 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
689 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700690 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700691 .rows(14)
692 .channels(channels)
693 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700694 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700695 }
696 }
697 }
698
Marat Dukhan08b7a972020-07-14 18:17:29 -0700699 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700700 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700701 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
702 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700703 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700704 .rows(14)
705 .channels(channels)
706 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700707 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700708 }
709 }
710 }
711
Marat Dukhan08b7a972020-07-14 18:17:29 -0700712 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700713 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700714 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700715 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700716 .rows(14)
717 .channels(channels)
718 .input_zero_point(128)
719 .output_zero_point(128)
720 .input_scale(1.0f)
721 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700722 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700723 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700724 }
725 }
726
Marat Dukhan08b7a972020-07-14 18:17:29 -0700727 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700728 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700729 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700730 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700731 .rows(14)
732 .channels(channels)
733 .input_zero_point(128)
734 .output_zero_point(128)
735 .input_scale(1.0f)
736 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700737 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700738 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700739 }
740 }
741
Marat Dukhan08b7a972020-07-14 18:17:29 -0700742 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_2pass_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700743 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700744 for (size_t channels = 9; channels < 16; channels++) {
745 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700746 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700747 .rows(7 + rows)
748 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700749 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700750 }
751 }
752 }
753
Marat Dukhan08b7a972020-07-14 18:17:29 -0700754 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_multipass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700755 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700756 for (size_t channels = 9; channels < 16; channels++) {
757 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700758 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700759 .rows(rows)
760 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700761 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -0700762 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700763 }
764 }
765
Marat Dukhan08b7a972020-07-14 18:17:29 -0700766 TEST(QU8_GAVGPOOL_MINMAX_7P7X__NEON_C8, channels_gt_8_multipass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700767 TEST_REQUIRES_ARM_NEON;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700768 for (size_t channels = 9; channels < 16; channels++) {
769 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700770 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700771 .rows(rows)
772 .channels(channels)
773 .input_stride(23)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700774 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__neon_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -0700775 }
XNNPACK Teamb455b122019-09-27 18:10:33 -0700776 }
777 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700778#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700779
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700780#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan08b7a972020-07-14 18:17:29 -0700781 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700782 TEST_REQUIRES_X86_SSE2;
783 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700784 .rows(7)
785 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700786 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700787 }
788
Marat Dukhan08b7a972020-07-14 18:17:29 -0700789 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700790 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700791 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700792 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700793 .rows(rows)
794 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700795 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700796 }
797 }
798
Marat Dukhan08b7a972020-07-14 18:17:29 -0700799 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700800 TEST_REQUIRES_X86_SSE2;
801 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700802 .rows(7)
803 .channels(8)
804 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700805 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700806 }
807
Marat Dukhan08b7a972020-07-14 18:17:29 -0700808 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700809 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700810 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700811 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700812 .rows(7)
813 .channels(8)
814 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700815 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700816 }
817 }
818
Marat Dukhan08b7a972020-07-14 18:17:29 -0700819 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700820 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700821 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700822 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700823 .rows(7)
824 .channels(8)
825 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700826 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700827 }
828 }
829
Marat Dukhan08b7a972020-07-14 18:17:29 -0700830 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700831 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700832 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700833 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700834 .rows(7)
835 .channels(8)
836 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700837 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700838 }
839 }
840
Marat Dukhan08b7a972020-07-14 18:17:29 -0700841 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700842 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700843 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700844 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700845 .rows(7)
846 .channels(8)
847 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700848 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700849 }
850 }
851
Marat Dukhan08b7a972020-07-14 18:17:29 -0700852 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700853 TEST_REQUIRES_X86_SSE2;
854 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700855 .rows(7)
856 .channels(8)
857 .input_zero_point(128)
858 .output_zero_point(128)
859 .input_scale(1.0f)
860 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700861 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700862 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700863 }
864
Marat Dukhan08b7a972020-07-14 18:17:29 -0700865 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_eq_8_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700866 TEST_REQUIRES_X86_SSE2;
867 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700868 .rows(7)
869 .channels(8)
870 .input_zero_point(128)
871 .output_zero_point(128)
872 .input_scale(1.0f)
873 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700874 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700875 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700876 }
877
Marat Dukhan08b7a972020-07-14 18:17:29 -0700878 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_div_8_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700879 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700880 for (size_t channels = 8; channels < 128; channels += 24) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700881 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700882 .rows(7)
883 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700884 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700885 }
886 }
887
Marat Dukhan08b7a972020-07-14 18:17:29 -0700888 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_div_8_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700889 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700890 for (size_t channels = 8; channels < 128; channels += 24) {
891 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700892 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700893 .rows(rows)
894 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700895 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700896 }
897 }
898 }
899
Marat Dukhan08b7a972020-07-14 18:17:29 -0700900 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_lt_8_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700901 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700902 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700903 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700904 .rows(7)
905 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700906 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700907 }
908 }
909
Marat Dukhan08b7a972020-07-14 18:17:29 -0700910 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_lt_8_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700911 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700912 for (size_t channels = 1; channels < 8; channels++) {
913 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700914 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700915 .rows(rows)
916 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700917 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700918 }
919 }
920 }
921
Marat Dukhan08b7a972020-07-14 18:17:29 -0700922 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_lt_8_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700923 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700924 for (size_t channels = 1; channels < 8; channels++) {
925 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700926 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700927 .rows(7)
928 .channels(channels)
929 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700930 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700931 }
932 }
933 }
934
Marat Dukhan08b7a972020-07-14 18:17:29 -0700935 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_lt_8_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700936 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700937 for (size_t channels = 1; channels < 8; channels++) {
938 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700939 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700940 .rows(7)
941 .channels(channels)
942 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700943 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700944 }
945 }
946 }
947
Marat Dukhan08b7a972020-07-14 18:17:29 -0700948 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_lt_8_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700949 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700950 for (size_t channels = 1; channels < 8; channels++) {
951 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700952 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700953 .rows(7)
954 .channels(channels)
955 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700956 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700957 }
958 }
959 }
960
Marat Dukhan08b7a972020-07-14 18:17:29 -0700961 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_lt_8_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700962 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700963 for (size_t channels = 1; channels < 8; channels++) {
964 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700965 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700966 .rows(7)
967 .channels(channels)
968 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700969 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700970 }
971 }
972 }
973
Marat Dukhan08b7a972020-07-14 18:17:29 -0700974 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_lt_8_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700975 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700976 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700977 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700978 .rows(7)
979 .channels(channels)
980 .input_zero_point(128)
981 .output_zero_point(128)
982 .input_scale(1.0f)
983 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700984 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700985 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700986 }
987 }
988
Marat Dukhan08b7a972020-07-14 18:17:29 -0700989 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_lt_8_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700990 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700991 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700992 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -0700993 .rows(7)
994 .channels(channels)
995 .input_zero_point(128)
996 .output_zero_point(128)
997 .input_scale(1.0f)
998 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700999 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001000 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001001 }
1002 }
1003
Marat Dukhan08b7a972020-07-14 18:17:29 -07001004 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_gt_8_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001005 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001006 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001007 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001008 .rows(7)
1009 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001010 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001011 }
1012 }
1013
Marat Dukhan08b7a972020-07-14 18:17:29 -07001014 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_gt_8_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001015 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001016 for (size_t channels = 9; channels < 16; channels++) {
1017 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001018 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001019 .rows(rows)
1020 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001021 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001022 }
1023 }
1024 }
1025
Marat Dukhan08b7a972020-07-14 18:17:29 -07001026 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_gt_8_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001027 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001028 for (size_t channels = 9; channels < 16; channels++) {
1029 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001030 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001031 .rows(7)
1032 .channels(channels)
1033 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001034 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001035 }
1036 }
1037 }
1038
Marat Dukhan08b7a972020-07-14 18:17:29 -07001039 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_gt_8_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001040 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001041 for (size_t channels = 9; channels < 16; channels++) {
1042 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001043 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001044 .rows(7)
1045 .channels(channels)
1046 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001047 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001048 }
1049 }
1050 }
1051
Marat Dukhan08b7a972020-07-14 18:17:29 -07001052 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_gt_8_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001053 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001054 for (size_t channels = 9; channels < 16; channels++) {
1055 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001056 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001057 .rows(7)
1058 .channels(channels)
1059 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001060 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001061 }
1062 }
1063 }
1064
Marat Dukhan08b7a972020-07-14 18:17:29 -07001065 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_gt_8_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001066 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001067 for (size_t channels = 9; channels < 16; channels++) {
1068 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001069 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001070 .rows(7)
1071 .channels(channels)
1072 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001073 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001074 }
1075 }
1076 }
1077
Marat Dukhan08b7a972020-07-14 18:17:29 -07001078 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_gt_8_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001079 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001080 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001081 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001082 .rows(7)
1083 .channels(channels)
1084 .input_zero_point(128)
1085 .output_zero_point(128)
1086 .input_scale(1.0f)
1087 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001088 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001089 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001090 }
1091 }
1092
Marat Dukhan08b7a972020-07-14 18:17:29 -07001093 TEST(QU8_GAVGPOOL_MINMAX_7X__SSE2_C8, channels_gt_8_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001094 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001095 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001096 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001097 .rows(7)
1098 .channels(channels)
1099 .input_zero_point(128)
1100 .output_zero_point(128)
1101 .input_scale(1.0f)
1102 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001103 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001104 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001105 }
1106 }
1107
Marat Dukhan08b7a972020-07-14 18:17:29 -07001108 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001109 TEST_REQUIRES_X86_SSE2;
1110 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001111 .rows(14)
1112 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001113 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001114 }
1115
Marat Dukhan08b7a972020-07-14 18:17:29 -07001116 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001117 TEST_REQUIRES_X86_SSE2;
1118 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001119 .rows(14)
1120 .channels(8)
1121 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001122 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001123 }
1124
Marat Dukhan08b7a972020-07-14 18:17:29 -07001125 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001126 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001127 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001128 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001129 .rows(14)
1130 .channels(8)
1131 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001132 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001133 }
1134 }
1135
Marat Dukhan08b7a972020-07-14 18:17:29 -07001136 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001137 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001138 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001139 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001140 .rows(14)
1141 .channels(8)
1142 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001143 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001144 }
1145 }
1146
Marat Dukhan08b7a972020-07-14 18:17:29 -07001147 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001148 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001149 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001150 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001151 .rows(14)
1152 .channels(8)
1153 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001154 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001155 }
1156 }
1157
Marat Dukhan08b7a972020-07-14 18:17:29 -07001158 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001159 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001160 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001161 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001162 .rows(14)
1163 .channels(8)
1164 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001165 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001166 }
1167 }
1168
Marat Dukhan08b7a972020-07-14 18:17:29 -07001169 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001170 TEST_REQUIRES_X86_SSE2;
1171 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001172 .rows(14)
1173 .channels(8)
1174 .input_zero_point(128)
1175 .output_zero_point(128)
1176 .input_scale(1.0f)
1177 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001178 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001179 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001180 }
1181
Marat Dukhan08b7a972020-07-14 18:17:29 -07001182 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001183 TEST_REQUIRES_X86_SSE2;
1184 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001185 .rows(14)
1186 .channels(8)
1187 .input_zero_point(128)
1188 .output_zero_point(128)
1189 .input_scale(1.0f)
1190 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001191 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001192 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001193 }
1194
Marat Dukhan08b7a972020-07-14 18:17:29 -07001195 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001196 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001197 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001198 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001199 .rows(7 + rows)
1200 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001201 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001202 }
1203 }
1204
Marat Dukhan08b7a972020-07-14 18:17:29 -07001205 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_2pass_subtile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001206 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001207 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001208 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001209 .rows(7 + rows)
1210 .channels(8)
1211 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001212 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001213 }
1214 }
1215
Marat Dukhan08b7a972020-07-14 18:17:29 -07001216 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_multipass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001217 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001218 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001219 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001220 .rows(rows)
1221 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001222 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -07001223 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001224 }
1225
Marat Dukhan08b7a972020-07-14 18:17:29 -07001226 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_eq_8_multipass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001227 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001228 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001229 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001230 .rows(rows)
1231 .channels(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001232 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -07001233 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001234 }
1235
Marat Dukhan08b7a972020-07-14 18:17:29 -07001236 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_div_8_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001237 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001238 for (size_t channels = 8; channels < 128; channels += 24) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001239 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001240 .rows(14)
1241 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001242 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001243 }
1244 }
1245
Marat Dukhan08b7a972020-07-14 18:17:29 -07001246 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_div_8_2pass_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001247 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001248 for (size_t channels = 8; channels < 128; channels += 24) {
1249 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001250 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001251 .rows(7 + rows)
1252 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001253 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001254 }
1255 }
1256 }
1257
Marat Dukhan08b7a972020-07-14 18:17:29 -07001258 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_div_8_multipass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001259 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001260 for (size_t channels = 8; channels < 128; channels += 24) {
1261 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001262 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001263 .rows(rows)
1264 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001265 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -07001266 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001267 }
1268 }
1269
Marat Dukhan08b7a972020-07-14 18:17:29 -07001270 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_div_8_multipass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001271 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001272 for (size_t channels = 8; channels < 128; channels += 24) {
1273 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001274 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001275 .rows(rows)
1276 .channels(channels)
1277 .input_stride(131)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001278 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -07001279 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001280 }
1281 }
1282
Marat Dukhan08b7a972020-07-14 18:17:29 -07001283 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001284 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001285 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001286 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001287 .rows(14)
1288 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001289 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001290 }
1291 }
1292
Marat Dukhan08b7a972020-07-14 18:17:29 -07001293 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001294 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001295 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
1296 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001297 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001298 .rows(14)
1299 .channels(channels)
1300 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001301 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001302 }
1303 }
1304 }
1305
Marat Dukhan08b7a972020-07-14 18:17:29 -07001306 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001307 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001308 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
1309 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001310 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001311 .rows(14)
1312 .channels(channels)
1313 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001314 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001315 }
1316 }
1317 }
1318
Marat Dukhan08b7a972020-07-14 18:17:29 -07001319 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001320 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001321 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
1322 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001323 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001324 .rows(14)
1325 .channels(channels)
1326 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001327 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001328 }
1329 }
1330 }
1331
Marat Dukhan08b7a972020-07-14 18:17:29 -07001332 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001333 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001334 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
1335 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001336 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001337 .rows(14)
1338 .channels(channels)
1339 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001340 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001341 }
1342 }
1343 }
1344
Marat Dukhan08b7a972020-07-14 18:17:29 -07001345 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001346 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001347 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001348 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001349 .rows(14)
1350 .channels(channels)
1351 .input_zero_point(128)
1352 .output_zero_point(128)
1353 .input_scale(1.0f)
1354 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001355 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001356 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001357 }
1358 }
1359
Marat Dukhan08b7a972020-07-14 18:17:29 -07001360 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_2pass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001361 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001362 for (size_t channels = 1; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001363 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001364 .rows(14)
1365 .channels(channels)
1366 .input_zero_point(128)
1367 .output_zero_point(128)
1368 .input_scale(1.0f)
1369 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001370 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001371 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001372 }
1373 }
1374
Marat Dukhan08b7a972020-07-14 18:17:29 -07001375 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_2pass_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001376 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001377 for (size_t channels = 1; channels < 8; channels++) {
1378 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001379 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001380 .rows(7 + rows)
1381 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001382 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001383 }
1384 }
1385 }
1386
Marat Dukhan08b7a972020-07-14 18:17:29 -07001387 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_multipass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001388 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001389 for (size_t channels = 1; channels < 8; channels++) {
1390 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001391 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001392 .rows(rows)
1393 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001394 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -07001395 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001396 }
1397 }
1398
Marat Dukhan08b7a972020-07-14 18:17:29 -07001399 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_lt_8_multipass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001400 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001401 for (size_t channels = 1; channels < 8; channels++) {
1402 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001403 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001404 .rows(rows)
1405 .channels(channels)
1406 .input_stride(23)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001407 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -07001408 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001409 }
1410 }
1411
Marat Dukhan08b7a972020-07-14 18:17:29 -07001412 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001413 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001414 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001415 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001416 .rows(14)
1417 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001418 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001419 }
1420 }
1421
Marat Dukhan08b7a972020-07-14 18:17:29 -07001422 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile_with_input_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001423 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001424 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
1425 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001426 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001427 .rows(14)
1428 .channels(channels)
1429 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001430 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001431 }
1432 }
1433 }
1434
Marat Dukhan08b7a972020-07-14 18:17:29 -07001435 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile_with_input_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001436 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001437 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
1438 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001439 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001440 .rows(14)
1441 .channels(channels)
1442 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001443 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001444 }
1445 }
1446 }
1447
Marat Dukhan08b7a972020-07-14 18:17:29 -07001448 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile_with_output_scale) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001449 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001450 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
1451 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001452 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001453 .rows(14)
1454 .channels(channels)
1455 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001456 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001457 }
1458 }
1459 }
1460
Marat Dukhan08b7a972020-07-14 18:17:29 -07001461 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile_with_output_zero_point) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001462 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001463 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
1464 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001465 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001466 .rows(14)
1467 .channels(channels)
1468 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001469 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001470 }
1471 }
1472 }
1473
Marat Dukhan08b7a972020-07-14 18:17:29 -07001474 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001475 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001476 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001477 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001478 .rows(14)
1479 .channels(channels)
1480 .input_zero_point(128)
1481 .output_zero_point(128)
1482 .input_scale(1.0f)
1483 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001484 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001485 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001486 }
1487 }
1488
Marat Dukhan08b7a972020-07-14 18:17:29 -07001489 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_2pass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001490 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001491 for (size_t channels = 9; channels < 16; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001492 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001493 .rows(14)
1494 .channels(channels)
1495 .input_zero_point(128)
1496 .output_zero_point(128)
1497 .input_scale(1.0f)
1498 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001499 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001500 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001501 }
1502 }
1503
Marat Dukhan08b7a972020-07-14 18:17:29 -07001504 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_2pass_subtile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001505 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001506 for (size_t channels = 9; channels < 16; channels++) {
1507 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001508 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001509 .rows(7 + rows)
1510 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001511 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001512 }
1513 }
1514 }
1515
Marat Dukhan08b7a972020-07-14 18:17:29 -07001516 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_multipass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001517 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001518 for (size_t channels = 9; channels < 16; channels++) {
1519 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001520 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001521 .rows(rows)
1522 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001523 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -07001524 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001525 }
1526 }
1527
Marat Dukhan08b7a972020-07-14 18:17:29 -07001528 TEST(QU8_GAVGPOOL_MINMAX_7P7X__SSE2_C8, channels_gt_8_multipass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001529 TEST_REQUIRES_X86_SSE2;
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001530 for (size_t channels = 9; channels < 16; channels++) {
1531 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001532 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001533 .rows(rows)
1534 .channels(channels)
1535 .input_stride(23)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001536 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__sse2_c8);
Marat Dukhane0df8312019-10-22 18:16:56 -07001537 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001538 }
1539 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -07001540#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
XNNPACK Teamb455b122019-09-27 18:10:33 -07001541
Marat Dukhan08b7a972020-07-14 18:17:29 -07001542TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001543 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001544 .rows(7)
1545 .channels(1)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001546 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001547}
1548
Marat Dukhan08b7a972020-07-14 18:17:29 -07001549TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_subtile) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001550 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001551 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001552 .rows(rows)
1553 .channels(1)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001554 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001555 }
1556}
1557
Marat Dukhan08b7a972020-07-14 18:17:29 -07001558TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001559 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001560 .rows(7)
1561 .channels(1)
1562 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001563 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001564}
1565
Marat Dukhan08b7a972020-07-14 18:17:29 -07001566TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_fulltile_with_input_scale) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001567 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001568 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001569 .rows(7)
1570 .channels(1)
1571 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001572 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001573 }
1574}
1575
Marat Dukhan08b7a972020-07-14 18:17:29 -07001576TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_fulltile_with_input_zero_point) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001577 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001578 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001579 .rows(7)
1580 .channels(1)
1581 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001582 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001583 }
1584}
1585
Marat Dukhan08b7a972020-07-14 18:17:29 -07001586TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_fulltile_with_output_scale) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001587 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001588 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001589 .rows(7)
1590 .channels(1)
1591 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001592 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001593 }
1594}
1595
Marat Dukhan08b7a972020-07-14 18:17:29 -07001596TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_fulltile_with_output_zero_point) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001597 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001598 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001599 .rows(7)
1600 .channels(1)
1601 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001602 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001603 }
1604}
1605
Marat Dukhan08b7a972020-07-14 18:17:29 -07001606TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001607 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001608 .rows(7)
1609 .channels(1)
1610 .input_zero_point(128)
1611 .output_zero_point(128)
1612 .input_scale(1.0f)
1613 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001614 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001615 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001616}
1617
Marat Dukhan08b7a972020-07-14 18:17:29 -07001618TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_eq_1_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001619 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001620 .rows(7)
1621 .channels(1)
1622 .input_zero_point(128)
1623 .output_zero_point(128)
1624 .input_scale(1.0f)
1625 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001626 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001627 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001628}
1629
Marat Dukhan08b7a972020-07-14 18:17:29 -07001630TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_gt_1_fulltile) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001631 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001632 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001633 .rows(7)
1634 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001635 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001636 }
1637}
1638
Marat Dukhan08b7a972020-07-14 18:17:29 -07001639TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_gt_1_subtile) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001640 for (size_t channels = 2; channels < 8; channels++) {
1641 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001642 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001643 .rows(rows)
1644 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001645 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001646 }
1647 }
1648}
1649
Marat Dukhan08b7a972020-07-14 18:17:29 -07001650TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_gt_1_fulltile_with_input_scale) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001651 for (size_t channels = 2; channels < 8; channels++) {
1652 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001653 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001654 .rows(7)
1655 .channels(channels)
1656 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001657 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001658 }
1659 }
1660}
1661
Marat Dukhan08b7a972020-07-14 18:17:29 -07001662TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_gt_1_fulltile_with_input_zero_point) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001663 for (size_t channels = 2; channels < 8; channels++) {
1664 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001665 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001666 .rows(7)
1667 .channels(channels)
1668 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001669 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001670 }
1671 }
1672}
1673
Marat Dukhan08b7a972020-07-14 18:17:29 -07001674TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_gt_1_fulltile_with_output_scale) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001675 for (size_t channels = 2; channels < 8; channels++) {
1676 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001677 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001678 .rows(7)
1679 .channels(channels)
1680 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001681 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001682 }
1683 }
1684}
1685
Marat Dukhan08b7a972020-07-14 18:17:29 -07001686TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_gt_1_fulltile_with_output_zero_point) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001687 for (size_t channels = 2; channels < 8; channels++) {
1688 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001689 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001690 .rows(7)
1691 .channels(channels)
1692 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001693 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001694 }
1695 }
1696}
1697
Marat Dukhan08b7a972020-07-14 18:17:29 -07001698TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_gt_1_fulltile_with_qmax) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001699 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001700 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001701 .rows(7)
1702 .channels(channels)
1703 .input_zero_point(128)
1704 .output_zero_point(128)
1705 .input_scale(1.0f)
1706 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001707 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001708 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001709 }
1710}
1711
Marat Dukhan08b7a972020-07-14 18:17:29 -07001712TEST(QU8_GAVGPOOL_MINMAX_7X__SCALAR_C1, channels_gt_1_fulltile_with_qmin) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001713 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001714 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001715 .rows(7)
1716 .channels(channels)
1717 .input_zero_point(128)
1718 .output_zero_point(128)
1719 .input_scale(1.0f)
1720 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001721 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001722 .Test(xnn_qu8_gavgpool_minmax_ukernel_7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001723 }
1724}
1725
Marat Dukhan08b7a972020-07-14 18:17:29 -07001726TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_fulltile) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001727 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001728 .rows(14)
1729 .channels(1)
1730 .channel_tile(8)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001731 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001732}
1733
Marat Dukhan08b7a972020-07-14 18:17:29 -07001734TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_fulltile_with_input_stride) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001735 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001736 .rows(14)
1737 .channels(1)
1738 .channel_tile(8)
1739 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001740 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001741}
1742
Marat Dukhan08b7a972020-07-14 18:17:29 -07001743TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_fulltile_with_input_scale) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001744 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001745 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001746 .rows(14)
1747 .channels(1)
1748 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001749 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001750 }
1751}
1752
Marat Dukhan08b7a972020-07-14 18:17:29 -07001753TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_fulltile_with_input_zero_point) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001754 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001755 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001756 .rows(14)
1757 .channels(1)
1758 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001759 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001760 }
1761}
1762
Marat Dukhan08b7a972020-07-14 18:17:29 -07001763TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_fulltile_with_output_scale) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001764 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001765 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001766 .rows(14)
1767 .channels(1)
1768 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001769 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001770 }
1771}
1772
Marat Dukhan08b7a972020-07-14 18:17:29 -07001773TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_fulltile_with_output_zero_point) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001774 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001775 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001776 .rows(14)
1777 .channels(1)
1778 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001779 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001780 }
1781}
1782
Marat Dukhan08b7a972020-07-14 18:17:29 -07001783TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_fulltile_with_qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001784 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001785 .rows(14)
1786 .channels(1)
1787 .channel_tile(8)
1788 .input_zero_point(128)
1789 .output_zero_point(128)
1790 .input_scale(1.0f)
1791 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001792 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001793 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001794}
1795
Marat Dukhan08b7a972020-07-14 18:17:29 -07001796TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_fulltile_with_qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001797 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001798 .rows(14)
1799 .channels(1)
1800 .channel_tile(8)
1801 .input_zero_point(128)
1802 .output_zero_point(128)
1803 .input_scale(1.0f)
1804 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001805 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001806 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001807}
1808
Marat Dukhan08b7a972020-07-14 18:17:29 -07001809TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_subtile) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001810 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001811 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001812 .rows(7 + rows)
1813 .channels(1)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001814 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001815 }
1816}
1817
Marat Dukhan08b7a972020-07-14 18:17:29 -07001818TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_2pass_subtile_with_input_stride) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001819 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001820 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001821 .rows(7 + rows)
1822 .channels(1)
1823 .input_stride(11)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001824 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001825 }
1826}
1827
Marat Dukhan08b7a972020-07-14 18:17:29 -07001828TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_multipass_fulltile) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001829 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001830 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001831 .rows(rows)
1832 .channels(1)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001833 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
Marat Dukhane0df8312019-10-22 18:16:56 -07001834 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001835}
1836
Marat Dukhan08b7a972020-07-14 18:17:29 -07001837TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_eq_1_multipass_fulltile_with_input_stride) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001838 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001839 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001840 .rows(rows)
1841 .channels(1)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001842 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
Marat Dukhane0df8312019-10-22 18:16:56 -07001843 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001844}
1845
Marat Dukhan08b7a972020-07-14 18:17:29 -07001846TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_2pass_fulltile) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001847 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001848 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001849 .rows(14)
1850 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001851 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001852 }
1853}
1854
Marat Dukhan08b7a972020-07-14 18:17:29 -07001855TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_2pass_fulltile_with_input_scale) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001856 for (float input_scale = 0.01f; input_scale < 100.0f; input_scale *= 3.14159265f) {
1857 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001858 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001859 .rows(14)
1860 .channels(channels)
1861 .input_scale(input_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001862 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001863 }
1864 }
1865}
1866
Marat Dukhan08b7a972020-07-14 18:17:29 -07001867TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_2pass_fulltile_with_input_zero_point) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001868 for (int32_t input_zero_point = 0; input_zero_point <= 255; input_zero_point += 51) {
1869 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001870 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001871 .rows(14)
1872 .channels(channels)
1873 .input_zero_point(input_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001874 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001875 }
1876 }
1877}
1878
Marat Dukhan08b7a972020-07-14 18:17:29 -07001879TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_2pass_fulltile_with_output_scale) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001880 for (float output_scale = 0.01f; output_scale < 100.0f; output_scale *= 3.14159265f) {
1881 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001882 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001883 .rows(14)
1884 .channels(channels)
1885 .output_scale(output_scale)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001886 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001887 }
1888 }
1889}
1890
Marat Dukhan08b7a972020-07-14 18:17:29 -07001891TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_2pass_fulltile_with_output_zero_point) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001892 for (int32_t output_zero_point = 0; output_zero_point <= 255; output_zero_point += 51) {
1893 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001894 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001895 .rows(14)
1896 .channels(channels)
1897 .output_zero_point(output_zero_point)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001898 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001899 }
1900 }
1901}
1902
Marat Dukhan08b7a972020-07-14 18:17:29 -07001903TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_2pass_fulltile_with_qmax) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001904 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001905 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001906 .rows(14)
1907 .channels(channels)
1908 .input_zero_point(128)
1909 .output_zero_point(128)
1910 .input_scale(1.0f)
1911 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001912 .qmax(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001913 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001914 }
1915}
1916
Marat Dukhan08b7a972020-07-14 18:17:29 -07001917TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_2pass_fulltile_with_qmin) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001918 for (size_t channels = 2; channels < 8; channels++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001919 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001920 .rows(14)
1921 .channels(channels)
1922 .input_zero_point(128)
1923 .output_zero_point(128)
1924 .input_scale(1.0f)
1925 .output_scale(1.0f)
XNNPACK Teamb455b122019-09-27 18:10:33 -07001926 .qmin(128)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001927 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001928 }
1929}
1930
Marat Dukhan08b7a972020-07-14 18:17:29 -07001931TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_2pass_subtile) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001932 for (size_t channels = 2; channels < 8; channels++) {
1933 for (size_t rows = 1; rows < 7; rows++) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001934 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001935 .rows(7 + rows)
1936 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001937 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
XNNPACK Teamb455b122019-09-27 18:10:33 -07001938 }
1939 }
1940}
1941
Marat Dukhan08b7a972020-07-14 18:17:29 -07001942TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_multipass_fulltile) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001943 for (size_t channels = 2; channels < 8; channels++) {
1944 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001945 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001946 .rows(rows)
1947 .channels(channels)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001948 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
Marat Dukhane0df8312019-10-22 18:16:56 -07001949 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001950 }
1951}
1952
Marat Dukhan08b7a972020-07-14 18:17:29 -07001953TEST(QU8_GAVGPOOL_MINMAX_7P7X__SCALAR_C1, channels_gt_1_multipass_fulltile_with_input_stride) {
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001954 for (size_t channels = 2; channels < 8; channels++) {
1955 for (size_t rows = 14; rows <= 35; rows += 7) {
XNNPACK Teamb455b122019-09-27 18:10:33 -07001956 GAvgPoolMicrokernelTester()
Marat Dukhana63a6fc2020-03-10 06:12:48 -07001957 .rows(rows)
1958 .channels(channels)
1959 .input_stride(23)
Marat Dukhan08b7a972020-07-14 18:17:29 -07001960 .Test(xnn_qu8_gavgpool_minmax_ukernel_7p7x__scalar_c1, GAvgPoolMicrokernelTester::Variant::Scalar);
Marat Dukhane0df8312019-10-22 18:16:56 -07001961 }
XNNPACK Teamb455b122019-09-27 18:10:33 -07001962 }
1963}