XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| 5 | |
| 6 | #include <gtest/gtest.h> |
| 7 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 8 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9 | #include <xnnpack/isa-checks.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 10 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 11 | #include <xnnpack/pad.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 12 | #include "pad-microkernel-tester.h" |
| 13 | |
| 14 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 15 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 16 | TEST(X32_PAD__NEON, fulltile_copy_channels_eq_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 17 | TEST_REQUIRES_ARM_NEON; |
| 18 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 19 | .rows(1) |
| 20 | .input_channels(4) |
| 21 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 22 | } |
| 23 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 24 | TEST(X32_PAD__NEON, fulltile_copy_channels_div_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 25 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 26 | for (size_t channels = 8; channels < 32; channels += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 27 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 28 | .rows(1) |
| 29 | .input_channels(channels) |
| 30 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 31 | } |
| 32 | } |
| 33 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 34 | TEST(X32_PAD__NEON, fulltile_copy_channels_lt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 35 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 36 | for (size_t channels = 1; channels < 4; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 37 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 38 | .rows(1) |
| 39 | .input_channels(channels) |
| 40 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 41 | } |
| 42 | } |
| 43 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 44 | TEST(X32_PAD__NEON, fulltile_copy_channels_gt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 45 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 46 | for (size_t channels = 5; channels < 8; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 47 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 48 | .rows(1) |
| 49 | .input_channels(4) |
| 50 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 51 | } |
| 52 | } |
| 53 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 54 | TEST(X32_PAD__NEON, fulltile_pre_padding_eq_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 55 | TEST_REQUIRES_ARM_NEON; |
| 56 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 57 | .rows(1) |
| 58 | .input_channels(1) |
| 59 | .pre_padding(4) |
| 60 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 61 | } |
| 62 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 63 | TEST(X32_PAD__NEON, fulltile_pre_padding_div_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 64 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 65 | for (size_t pre_padding = 8; pre_padding < 32; pre_padding += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 66 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 67 | .rows(1) |
| 68 | .input_channels(1) |
| 69 | .pre_padding(pre_padding) |
| 70 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 71 | } |
| 72 | } |
| 73 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 74 | TEST(X32_PAD__NEON, fulltile_pre_padding_lt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 75 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 76 | for (size_t pre_padding = 1; pre_padding < 4; pre_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 77 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 78 | .rows(1) |
| 79 | .input_channels(1) |
| 80 | .pre_padding(pre_padding) |
| 81 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 82 | } |
| 83 | } |
| 84 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 85 | TEST(X32_PAD__NEON, fulltile_pre_padding_gt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 86 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 87 | for (size_t pre_padding = 5; pre_padding < 8; pre_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 88 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 89 | .rows(1) |
| 90 | .input_channels(1) |
| 91 | .pre_padding(pre_padding) |
| 92 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 93 | } |
| 94 | } |
| 95 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 96 | TEST(X32_PAD__NEON, fulltile_post_padding_eq_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 97 | TEST_REQUIRES_ARM_NEON; |
| 98 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 99 | .rows(1) |
| 100 | .input_channels(1) |
| 101 | .post_padding(4) |
| 102 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 103 | } |
| 104 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 105 | TEST(X32_PAD__NEON, fulltile_post_padding_div_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 106 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 107 | for (size_t post_padding = 8; post_padding < 32; post_padding += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 108 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 109 | .rows(1) |
| 110 | .input_channels(1) |
| 111 | .post_padding(post_padding) |
| 112 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 113 | } |
| 114 | } |
| 115 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 116 | TEST(X32_PAD__NEON, fulltile_post_padding_lt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 117 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 118 | for (size_t post_padding = 1; post_padding < 4; post_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 119 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 120 | .rows(1) |
| 121 | .input_channels(1) |
| 122 | .post_padding(post_padding) |
| 123 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 124 | } |
| 125 | } |
| 126 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 127 | TEST(X32_PAD__NEON, fulltile_post_padding_gt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 128 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 129 | for (size_t post_padding = 5; post_padding < 8; post_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 130 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 131 | .rows(1) |
| 132 | .input_channels(1) |
| 133 | .pre_padding(post_padding) |
| 134 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 135 | } |
| 136 | } |
| 137 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 138 | TEST(X32_PAD__NEON, multitile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 139 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 140 | for (size_t rows = 2; rows <= 5; rows++) { |
| 141 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 142 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 143 | .rows(rows) |
| 144 | .input_channels(channels) |
| 145 | .pre_padding(channels) |
| 146 | .post_padding(channels) |
| 147 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 148 | } |
| 149 | } |
| 150 | } |
| 151 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 152 | TEST(X32_PAD__NEON, multitile_with_input_stride) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 153 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 154 | for (size_t rows = 2; rows <= 5; rows++) { |
| 155 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 156 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 157 | .rows(rows) |
| 158 | .input_channels(channels) |
| 159 | .pre_padding(channels) |
| 160 | .post_padding(channels) |
| 161 | .input_stride(2 * channels + 1) |
| 162 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 163 | } |
| 164 | } |
| 165 | } |
| 166 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 167 | TEST(X32_PAD__NEON, multitile_with_output_stride) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 168 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 169 | for (size_t rows = 2; rows <= 5; rows++) { |
| 170 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 171 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 172 | .rows(rows) |
| 173 | .input_channels(2 * channels) |
| 174 | .pre_padding(channels) |
| 175 | .post_padding(channels) |
| 176 | .output_stride(5 * channels + 3) |
| 177 | .Test(xnn_x32_pad_ukernel__neon); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 178 | } |
| 179 | } |
| 180 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 181 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 182 | |
| 183 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 184 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 185 | TEST(X32_PAD__SSE, fulltile_copy_channels_eq_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 186 | TEST_REQUIRES_X86_SSE2; |
| 187 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 188 | .rows(1) |
| 189 | .input_channels(4) |
| 190 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 191 | } |
| 192 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 193 | TEST(X32_PAD__SSE, fulltile_copy_channels_div_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 194 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 195 | for (size_t channels = 8; channels < 32; channels += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 196 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 197 | .rows(1) |
| 198 | .input_channels(channels) |
| 199 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 200 | } |
| 201 | } |
| 202 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 203 | TEST(X32_PAD__SSE, fulltile_copy_channels_lt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 204 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 205 | for (size_t channels = 1; channels < 4; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 206 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 207 | .rows(1) |
| 208 | .input_channels(channels) |
| 209 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 210 | } |
| 211 | } |
| 212 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 213 | TEST(X32_PAD__SSE, fulltile_copy_channels_gt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 214 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 215 | for (size_t channels = 5; channels < 8; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 216 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 217 | .rows(1) |
| 218 | .input_channels(4) |
| 219 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 220 | } |
| 221 | } |
| 222 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 223 | TEST(X32_PAD__SSE, fulltile_pre_padding_eq_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 224 | TEST_REQUIRES_X86_SSE2; |
| 225 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 226 | .rows(1) |
| 227 | .input_channels(1) |
| 228 | .pre_padding(4) |
| 229 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 230 | } |
| 231 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 232 | TEST(X32_PAD__SSE, fulltile_pre_padding_div_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 233 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 234 | for (size_t pre_padding = 8; pre_padding < 32; pre_padding += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 235 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 236 | .rows(1) |
| 237 | .input_channels(1) |
| 238 | .pre_padding(pre_padding) |
| 239 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 240 | } |
| 241 | } |
| 242 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 243 | TEST(X32_PAD__SSE, fulltile_pre_padding_lt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 244 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 245 | for (size_t pre_padding = 1; pre_padding < 4; pre_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 246 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 247 | .rows(1) |
| 248 | .input_channels(1) |
| 249 | .pre_padding(pre_padding) |
| 250 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 251 | } |
| 252 | } |
| 253 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 254 | TEST(X32_PAD__SSE, fulltile_pre_padding_gt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 255 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 256 | for (size_t pre_padding = 5; pre_padding < 8; pre_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 257 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 258 | .rows(1) |
| 259 | .input_channels(1) |
| 260 | .pre_padding(pre_padding) |
| 261 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 262 | } |
| 263 | } |
| 264 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 265 | TEST(X32_PAD__SSE, fulltile_post_padding_eq_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 266 | TEST_REQUIRES_X86_SSE2; |
| 267 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 268 | .rows(1) |
| 269 | .input_channels(1) |
| 270 | .post_padding(4) |
| 271 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 272 | } |
| 273 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 274 | TEST(X32_PAD__SSE, fulltile_post_padding_div_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 275 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 276 | for (size_t post_padding = 8; post_padding < 32; post_padding += 4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 277 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 278 | .rows(1) |
| 279 | .input_channels(1) |
| 280 | .post_padding(post_padding) |
| 281 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 282 | } |
| 283 | } |
| 284 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 285 | TEST(X32_PAD__SSE, fulltile_post_padding_lt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 286 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 287 | for (size_t post_padding = 1; post_padding < 4; post_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 288 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 289 | .rows(1) |
| 290 | .input_channels(1) |
| 291 | .post_padding(post_padding) |
| 292 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 293 | } |
| 294 | } |
| 295 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 296 | TEST(X32_PAD__SSE, fulltile_post_padding_gt_4) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 297 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 298 | for (size_t post_padding = 5; post_padding < 8; post_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 299 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 300 | .rows(1) |
| 301 | .input_channels(1) |
| 302 | .pre_padding(post_padding) |
| 303 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 304 | } |
| 305 | } |
| 306 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 307 | TEST(X32_PAD__SSE, multitile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 308 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 309 | for (size_t rows = 2; rows <= 5; rows++) { |
| 310 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 311 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 312 | .rows(rows) |
| 313 | .input_channels(channels) |
| 314 | .pre_padding(channels) |
| 315 | .post_padding(channels) |
| 316 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 317 | } |
| 318 | } |
| 319 | } |
| 320 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 321 | TEST(X32_PAD__SSE, multitile_with_input_stride) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 322 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 323 | for (size_t rows = 2; rows <= 5; rows++) { |
| 324 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 325 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 326 | .rows(rows) |
| 327 | .input_channels(channels) |
| 328 | .pre_padding(channels) |
| 329 | .post_padding(channels) |
| 330 | .input_stride(2 * channels + 1) |
| 331 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 332 | } |
| 333 | } |
| 334 | } |
| 335 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 336 | TEST(X32_PAD__SSE, multitile_with_output_stride) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 337 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 338 | for (size_t rows = 2; rows <= 5; rows++) { |
| 339 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 340 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 341 | .rows(rows) |
| 342 | .input_channels(2 * channels) |
| 343 | .pre_padding(channels) |
| 344 | .post_padding(channels) |
| 345 | .output_stride(5 * channels + 3) |
| 346 | .Test(xnn_x32_pad_ukernel__sse); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 347 | } |
| 348 | } |
| 349 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 350 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 351 | |
| 352 | |
Marat Dukhan | 9306ae0 | 2020-07-16 15:51:13 -0700 | [diff] [blame] | 353 | #if XNN_ARCH_WASMSIMD |
| 354 | TEST(X32_PAD__WASMSIMD, fulltile_copy_channels_eq_4) { |
| 355 | PadMicrokernelTester() |
| 356 | .rows(1) |
| 357 | .input_channels(4) |
| 358 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 359 | } |
| 360 | |
| 361 | TEST(X32_PAD__WASMSIMD, fulltile_copy_channels_div_4) { |
| 362 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 363 | PadMicrokernelTester() |
| 364 | .rows(1) |
| 365 | .input_channels(channels) |
| 366 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 367 | } |
| 368 | } |
| 369 | |
| 370 | TEST(X32_PAD__WASMSIMD, fulltile_copy_channels_lt_4) { |
| 371 | for (size_t channels = 1; channels < 4; channels++) { |
| 372 | PadMicrokernelTester() |
| 373 | .rows(1) |
| 374 | .input_channels(channels) |
| 375 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 376 | } |
| 377 | } |
| 378 | |
| 379 | TEST(X32_PAD__WASMSIMD, fulltile_copy_channels_gt_4) { |
| 380 | for (size_t channels = 5; channels < 8; channels++) { |
| 381 | PadMicrokernelTester() |
| 382 | .rows(1) |
| 383 | .input_channels(4) |
| 384 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 385 | } |
| 386 | } |
| 387 | |
| 388 | TEST(X32_PAD__WASMSIMD, fulltile_pre_padding_eq_4) { |
| 389 | PadMicrokernelTester() |
| 390 | .rows(1) |
| 391 | .input_channels(1) |
| 392 | .pre_padding(4) |
| 393 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 394 | } |
| 395 | |
| 396 | TEST(X32_PAD__WASMSIMD, fulltile_pre_padding_div_4) { |
| 397 | for (size_t pre_padding = 8; pre_padding < 32; pre_padding += 4) { |
| 398 | PadMicrokernelTester() |
| 399 | .rows(1) |
| 400 | .input_channels(1) |
| 401 | .pre_padding(pre_padding) |
| 402 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 403 | } |
| 404 | } |
| 405 | |
| 406 | TEST(X32_PAD__WASMSIMD, fulltile_pre_padding_lt_4) { |
| 407 | for (size_t pre_padding = 1; pre_padding < 4; pre_padding++) { |
| 408 | PadMicrokernelTester() |
| 409 | .rows(1) |
| 410 | .input_channels(1) |
| 411 | .pre_padding(pre_padding) |
| 412 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 413 | } |
| 414 | } |
| 415 | |
| 416 | TEST(X32_PAD__WASMSIMD, fulltile_pre_padding_gt_4) { |
| 417 | for (size_t pre_padding = 5; pre_padding < 8; pre_padding++) { |
| 418 | PadMicrokernelTester() |
| 419 | .rows(1) |
| 420 | .input_channels(1) |
| 421 | .pre_padding(pre_padding) |
| 422 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 423 | } |
| 424 | } |
| 425 | |
| 426 | TEST(X32_PAD__WASMSIMD, fulltile_post_padding_eq_4) { |
| 427 | PadMicrokernelTester() |
| 428 | .rows(1) |
| 429 | .input_channels(1) |
| 430 | .post_padding(4) |
| 431 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 432 | } |
| 433 | |
| 434 | TEST(X32_PAD__WASMSIMD, fulltile_post_padding_div_4) { |
| 435 | for (size_t post_padding = 8; post_padding < 32; post_padding += 4) { |
| 436 | PadMicrokernelTester() |
| 437 | .rows(1) |
| 438 | .input_channels(1) |
| 439 | .post_padding(post_padding) |
| 440 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | TEST(X32_PAD__WASMSIMD, fulltile_post_padding_lt_4) { |
| 445 | for (size_t post_padding = 1; post_padding < 4; post_padding++) { |
| 446 | PadMicrokernelTester() |
| 447 | .rows(1) |
| 448 | .input_channels(1) |
| 449 | .post_padding(post_padding) |
| 450 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 451 | } |
| 452 | } |
| 453 | |
| 454 | TEST(X32_PAD__WASMSIMD, fulltile_post_padding_gt_4) { |
| 455 | for (size_t post_padding = 5; post_padding < 8; post_padding++) { |
| 456 | PadMicrokernelTester() |
| 457 | .rows(1) |
| 458 | .input_channels(1) |
| 459 | .pre_padding(post_padding) |
| 460 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 461 | } |
| 462 | } |
| 463 | |
| 464 | TEST(X32_PAD__WASMSIMD, multitile) { |
| 465 | for (size_t rows = 2; rows <= 5; rows++) { |
| 466 | for (size_t channels = 1; channels < 10; channels++) { |
| 467 | PadMicrokernelTester() |
| 468 | .rows(rows) |
| 469 | .input_channels(channels) |
| 470 | .pre_padding(channels) |
| 471 | .post_padding(channels) |
| 472 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 473 | } |
| 474 | } |
| 475 | } |
| 476 | |
| 477 | TEST(X32_PAD__WASMSIMD, multitile_with_input_stride) { |
| 478 | for (size_t rows = 2; rows <= 5; rows++) { |
| 479 | for (size_t channels = 1; channels < 10; channels++) { |
| 480 | PadMicrokernelTester() |
| 481 | .rows(rows) |
| 482 | .input_channels(channels) |
| 483 | .pre_padding(channels) |
| 484 | .post_padding(channels) |
| 485 | .input_stride(2 * channels + 1) |
| 486 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 487 | } |
| 488 | } |
| 489 | } |
| 490 | |
| 491 | TEST(X32_PAD__WASMSIMD, multitile_with_output_stride) { |
| 492 | for (size_t rows = 2; rows <= 5; rows++) { |
| 493 | for (size_t channels = 1; channels < 10; channels++) { |
| 494 | PadMicrokernelTester() |
| 495 | .rows(rows) |
| 496 | .input_channels(2 * channels) |
| 497 | .pre_padding(channels) |
| 498 | .post_padding(channels) |
| 499 | .output_stride(5 * channels + 3) |
| 500 | .Test(xnn_x32_pad_ukernel__wasmsimd); |
| 501 | } |
| 502 | } |
| 503 | } |
| 504 | #endif // XNN_ARCH_WASMSIMD |
| 505 | |
| 506 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 507 | TEST(X32_PAD__SCALAR_INT, fulltile_copy_channels_eq_1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 508 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 509 | .rows(1) |
| 510 | .input_channels(1) |
| 511 | .Test(xnn_x32_pad_ukernel__scalar_int); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 512 | } |
| 513 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 514 | TEST(X32_PAD__SCALAR_INT, fulltile_copy_channels_gt_1) { |
| 515 | for (size_t channels = 2; channels < 8; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 516 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 517 | .rows(1) |
| 518 | .input_channels(channels) |
| 519 | .Test(xnn_x32_pad_ukernel__scalar_int); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 520 | } |
| 521 | } |
| 522 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 523 | TEST(X32_PAD__SCALAR_INT, fulltile_pre_padding_eq_1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 524 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 525 | .rows(1) |
| 526 | .input_channels(1) |
| 527 | .pre_padding(1) |
| 528 | .Test(xnn_x32_pad_ukernel__scalar_int); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 529 | } |
| 530 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 531 | TEST(X32_PAD__SCALAR_INT, fulltile_pre_padding_gt_1) { |
| 532 | for (size_t pre_padding = 2; pre_padding < 8; pre_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 533 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 534 | .rows(1) |
| 535 | .input_channels(1) |
| 536 | .pre_padding(pre_padding) |
| 537 | .Test(xnn_x32_pad_ukernel__scalar_int); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 538 | } |
| 539 | } |
| 540 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 541 | TEST(X32_PAD__SCALAR_INT, fulltile_post_padding_eq_1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 542 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 543 | .rows(1) |
| 544 | .input_channels(1) |
| 545 | .post_padding(1) |
| 546 | .Test(xnn_x32_pad_ukernel__scalar_int); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 547 | } |
| 548 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 549 | TEST(X32_PAD__SCALAR_INT, fulltile_post_padding_gt_1) { |
| 550 | for (size_t post_padding = 1; post_padding < 8; post_padding++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 551 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 552 | .rows(1) |
| 553 | .input_channels(1) |
| 554 | .pre_padding(post_padding) |
| 555 | .Test(xnn_x32_pad_ukernel__scalar_int); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 556 | } |
| 557 | } |
| 558 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 559 | TEST(X32_PAD__SCALAR_INT, multitile) { |
| 560 | for (size_t rows = 2; rows <= 5; rows++) { |
| 561 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 562 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 563 | .rows(rows) |
| 564 | .input_channels(channels) |
| 565 | .pre_padding(channels) |
| 566 | .post_padding(channels) |
| 567 | .Test(xnn_x32_pad_ukernel__scalar_int); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 568 | } |
| 569 | } |
| 570 | } |
| 571 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 572 | TEST(X32_PAD__SCALAR_INT, multitile_with_input_stride) { |
| 573 | for (size_t rows = 2; rows <= 5; rows++) { |
| 574 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 575 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 576 | .rows(rows) |
| 577 | .input_channels(channels) |
| 578 | .pre_padding(channels) |
| 579 | .post_padding(channels) |
| 580 | .input_stride(2 * channels + 1) |
| 581 | .Test(xnn_x32_pad_ukernel__scalar_int); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 582 | } |
| 583 | } |
| 584 | } |
| 585 | |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 586 | TEST(X32_PAD__SCALAR_INT, multitile_with_output_stride) { |
| 587 | for (size_t rows = 2; rows <= 5; rows++) { |
| 588 | for (size_t channels = 1; channels < 10; channels++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 589 | PadMicrokernelTester() |
Marat Dukhan | 63523d4 | 2020-05-22 17:07:33 -0700 | [diff] [blame] | 590 | .rows(rows) |
| 591 | .input_channels(2 * channels) |
| 592 | .pre_padding(channels) |
| 593 | .post_padding(channels) |
| 594 | .output_stride(5 * channels + 3) |
| 595 | .Test(xnn_x32_pad_ukernel__scalar_int); |
| 596 | } |
| 597 | } |
| 598 | } |
| 599 | |
| 600 | |
| 601 | TEST(X32_PAD__SCALAR_FLOAT, fulltile_copy_channels_eq_1) { |
| 602 | PadMicrokernelTester() |
| 603 | .rows(1) |
| 604 | .input_channels(1) |
| 605 | .Test(xnn_x32_pad_ukernel__scalar_float); |
| 606 | } |
| 607 | |
| 608 | TEST(X32_PAD__SCALAR_FLOAT, fulltile_copy_channels_gt_1) { |
| 609 | for (size_t channels = 2; channels < 8; channels++) { |
| 610 | PadMicrokernelTester() |
| 611 | .rows(1) |
| 612 | .input_channels(channels) |
| 613 | .Test(xnn_x32_pad_ukernel__scalar_float); |
| 614 | } |
| 615 | } |
| 616 | |
| 617 | TEST(X32_PAD__SCALAR_FLOAT, fulltile_pre_padding_eq_1) { |
| 618 | PadMicrokernelTester() |
| 619 | .rows(1) |
| 620 | .input_channels(1) |
| 621 | .pre_padding(1) |
| 622 | .Test(xnn_x32_pad_ukernel__scalar_float); |
| 623 | } |
| 624 | |
| 625 | TEST(X32_PAD__SCALAR_FLOAT, fulltile_pre_padding_gt_1) { |
| 626 | for (size_t pre_padding = 2; pre_padding < 8; pre_padding++) { |
| 627 | PadMicrokernelTester() |
| 628 | .rows(1) |
| 629 | .input_channels(1) |
| 630 | .pre_padding(pre_padding) |
| 631 | .Test(xnn_x32_pad_ukernel__scalar_float); |
| 632 | } |
| 633 | } |
| 634 | |
| 635 | TEST(X32_PAD__SCALAR_FLOAT, fulltile_post_padding_eq_1) { |
| 636 | PadMicrokernelTester() |
| 637 | .rows(1) |
| 638 | .input_channels(1) |
| 639 | .post_padding(1) |
| 640 | .Test(xnn_x32_pad_ukernel__scalar_float); |
| 641 | } |
| 642 | |
| 643 | TEST(X32_PAD__SCALAR_FLOAT, fulltile_post_padding_gt_1) { |
| 644 | for (size_t post_padding = 1; post_padding < 8; post_padding++) { |
| 645 | PadMicrokernelTester() |
| 646 | .rows(1) |
| 647 | .input_channels(1) |
| 648 | .pre_padding(post_padding) |
| 649 | .Test(xnn_x32_pad_ukernel__scalar_float); |
| 650 | } |
| 651 | } |
| 652 | |
| 653 | TEST(X32_PAD__SCALAR_FLOAT, multitile) { |
| 654 | for (size_t rows = 2; rows <= 5; rows++) { |
| 655 | for (size_t channels = 1; channels < 10; channels++) { |
| 656 | PadMicrokernelTester() |
| 657 | .rows(rows) |
| 658 | .input_channels(channels) |
| 659 | .pre_padding(channels) |
| 660 | .post_padding(channels) |
| 661 | .Test(xnn_x32_pad_ukernel__scalar_float); |
| 662 | } |
| 663 | } |
| 664 | } |
| 665 | |
| 666 | TEST(X32_PAD__SCALAR_FLOAT, multitile_with_input_stride) { |
| 667 | for (size_t rows = 2; rows <= 5; rows++) { |
| 668 | for (size_t channels = 1; channels < 10; channels++) { |
| 669 | PadMicrokernelTester() |
| 670 | .rows(rows) |
| 671 | .input_channels(channels) |
| 672 | .pre_padding(channels) |
| 673 | .post_padding(channels) |
| 674 | .input_stride(2 * channels + 1) |
| 675 | .Test(xnn_x32_pad_ukernel__scalar_float); |
| 676 | } |
| 677 | } |
| 678 | } |
| 679 | |
| 680 | TEST(X32_PAD__SCALAR_FLOAT, multitile_with_output_stride) { |
| 681 | for (size_t rows = 2; rows <= 5; rows++) { |
| 682 | for (size_t channels = 1; channels < 10; channels++) { |
| 683 | PadMicrokernelTester() |
| 684 | .rows(rows) |
| 685 | .input_channels(2 * channels) |
| 686 | .pre_padding(channels) |
| 687 | .post_padding(channels) |
| 688 | .output_stride(5 * channels + 3) |
| 689 | .Test(xnn_x32_pad_ukernel__scalar_float); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 690 | } |
| 691 | } |
| 692 | } |