blob: 218909795dd863f7d8d6cdbcf132253ecfdd374b [file] [log] [blame]
XNNPACK Teamb455b122019-09-27 18:10:33 -07001// Copyright 2019 Google LLC
2//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
5
6#include <gtest/gtest.h>
7
8#include "argmax-pooling-operator-tester.h"
9
10#include <xnnpack/params.h>
11
12
13static uint32_t FindMaxSinglePassPoolingSize(const argmaxpool_parameters* ukernel) {
14 uint32_t mr = 0;
15 while (ukernel->qr == 0) {
16 mr = std::max<uint32_t>(mr, ukernel->mr);
17 ukernel++;
18 }
19 return mr;
20}
21
22static argmaxpool_parameters FindMultiPassMicroKernel(const argmaxpool_parameters* ukernel) {
23 while (ukernel->qr == 0) {
24 ukernel++;
25 }
26 return *ukernel;
27}
28
Marat Dukhanefc47b82019-11-18 09:25:38 -080029TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_small_1xM_pool) {
Marat Dukhan04f03be2019-11-19 12:36:47 -080030 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -070031 for (size_t channels = 1; channels <= 100; channels += 15) {
32 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
33 ArgmaxPoolingOperatorTester()
34 .batch_size(1)
35 .input_height(2)
36 .input_width(pool_size + 2)
37 .pooling_height(1)
38 .pooling_width(pool_size)
39 .channels(channels)
40 .TestF32();
41 }
42 }
43}
44
Marat Dukhanefc47b82019-11-18 09:25:38 -080045TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_small_1xM_pool_with_padding) {
Marat Dukhan04f03be2019-11-19 12:36:47 -080046 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -070047 for (size_t channels = 1; channels <= 100; channels += 15) {
48 for (size_t pool_size = 3; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
49 for (size_t padding_left = 0; padding_left <= 1; padding_left++) {
50 for (size_t padding_right = 0; padding_right <= 1; padding_right++) {
51 ArgmaxPoolingOperatorTester()
52 .batch_size(1)
53 .input_height(2)
54 .input_width(pool_size + 2)
55 .padding_left(padding_left)
56 .padding_right(padding_right)
57 .pooling_height(1)
58 .pooling_width(pool_size)
59 .channels(channels)
60 .TestF32();
61 }
62 }
63 }
64 }
65}
66
Marat Dukhanefc47b82019-11-18 09:25:38 -080067TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_small_Mx1_pool) {
Marat Dukhan04f03be2019-11-19 12:36:47 -080068 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -070069 for (size_t channels = 1; channels <= 100; channels += 15) {
70 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
71 ArgmaxPoolingOperatorTester()
72 .batch_size(1)
73 .input_height(pool_size + 1)
74 .input_width(3)
75 .pooling_height(pool_size)
76 .pooling_width(1)
77 .channels(channels)
78 .TestF32();
79 }
80 }
81}
82
Marat Dukhanefc47b82019-11-18 09:25:38 -080083TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_small_Mx1_pool_with_padding) {
Marat Dukhan04f03be2019-11-19 12:36:47 -080084 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -070085 for (size_t channels = 1; channels <= 100; channels += 15) {
86 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
87 for (size_t padding_top = 0; padding_top <= 1; padding_top++) {
88 for (size_t padding_bottom = 0; padding_bottom <= 1; padding_bottom++) {
89 ArgmaxPoolingOperatorTester()
90 .batch_size(1)
91 .input_height(pool_size + 1)
92 .input_width(3)
93 .padding_top(padding_top)
94 .padding_bottom(padding_bottom)
95 .pooling_height(pool_size)
96 .pooling_width(1)
97 .channels(channels)
98 .TestF32();
99 }
100 }
101 }
102 }
103}
104
Marat Dukhanefc47b82019-11-18 09:25:38 -0800105TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_small_pool_with_input_stride) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800106 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700107 for (size_t channels = 1; channels <= 100; channels += 15) {
108 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
109 ArgmaxPoolingOperatorTester()
110 .batch_size(1)
111 .input_height(pool_size + 1)
112 .input_width(3)
113 .pooling_height(pool_size)
114 .pooling_width(1)
115 .channels(channels)
116 .input_pixel_stride(5 * channels)
117 .TestF32();
118 ArgmaxPoolingOperatorTester()
119 .batch_size(1)
120 .input_height(2)
121 .input_width(pool_size + 2)
122 .pooling_height(1)
123 .pooling_width(pool_size)
124 .channels(channels)
125 .input_pixel_stride(5 * channels)
126 .TestF32();
127 }
128 }
129}
130
Marat Dukhanefc47b82019-11-18 09:25:38 -0800131TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_small_pool_with_output_stride) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800132 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700133 for (size_t channels = 1; channels <= 100; channels += 15) {
134 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
135 ArgmaxPoolingOperatorTester()
136 .batch_size(1)
137 .input_height(pool_size + 1)
138 .input_width(3)
139 .pooling_height(pool_size)
140 .pooling_width(1)
141 .channels(channels)
142 .output_pixel_stride(5 * channels)
143 .TestF32();
144 ArgmaxPoolingOperatorTester()
145 .batch_size(1)
146 .input_height(2)
147 .input_width(pool_size + 2)
148 .pooling_height(1)
149 .pooling_width(pool_size)
150 .channels(channels)
151 .output_pixel_stride(5 * channels)
152 .TestF32();
153 }
154 }
155}
156
Marat Dukhanefc47b82019-11-18 09:25:38 -0800157TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_small_pool_with_qmin) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800158 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700159 for (size_t channels = 1; channels <= 100; channels += 15) {
160 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
161 ArgmaxPoolingOperatorTester()
162 .batch_size(1)
163 .input_height(pool_size + 1)
164 .input_width(3)
165 .pooling_height(pool_size)
166 .pooling_width(1)
167 .channels(channels)
168 .qmin(192)
169 .TestF32();
170 ArgmaxPoolingOperatorTester()
171 .batch_size(1)
172 .input_height(2)
173 .input_width(pool_size + 2)
174 .pooling_height(1)
175 .pooling_width(pool_size)
176 .channels(channels)
177 .qmin(192)
178 .TestF32();
179 }
180 }
181}
182
Marat Dukhanefc47b82019-11-18 09:25:38 -0800183TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_small_pool_with_qmax) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800184 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700185 for (size_t channels = 1; channels <= 100; channels += 15) {
186 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
187 ArgmaxPoolingOperatorTester()
188 .batch_size(1)
189 .input_height(pool_size + 1)
190 .input_width(3)
191 .pooling_height(pool_size)
192 .pooling_width(1)
193 .channels(channels)
194 .qmax(192)
195 .TestF32();
196 ArgmaxPoolingOperatorTester()
197 .batch_size(1)
198 .input_height(2)
199 .input_width(pool_size + 2)
200 .pooling_height(1)
201 .pooling_width(pool_size)
202 .channels(channels)
203 .qmax(192)
204 .TestF32();
205 }
206 }
207}
208
Marat Dukhanefc47b82019-11-18 09:25:38 -0800209TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_large_1xM_pool) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800210 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700211 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
212 for (size_t channels = 1; channels <= 100; channels += 15) {
213 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
214 ArgmaxPoolingOperatorTester()
215 .batch_size(1)
216 .input_height(2)
217 .input_width(pool_size + 2)
218 .pooling_height(1)
219 .pooling_width(pool_size)
220 .channels(channels)
221 .TestF32();
222 }
223 }
224}
225
Marat Dukhanefc47b82019-11-18 09:25:38 -0800226TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_large_1xM_pool_with_padding) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800227 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700228 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
229 for (size_t channels = 1; channels <= 100; channels += 15) {
230 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
231 for (size_t padding_left = 0; padding_left <= 1; padding_left++) {
232 for (size_t padding_right = 0; padding_right <= 1; padding_right++) {
233 ArgmaxPoolingOperatorTester()
234 .batch_size(1)
235 .input_height(2)
236 .input_width(pool_size + 2)
237 .padding_left(padding_left)
238 .padding_right(padding_right)
239 .pooling_height(1)
240 .pooling_width(pool_size)
241 .channels(channels)
242 .TestF32();
243 }
244 }
245 }
246 }
247}
248
Marat Dukhanefc47b82019-11-18 09:25:38 -0800249TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_large_Mx1_pool) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800250 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700251 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
252 for (size_t channels = 1; channels <= 100; channels += 15) {
253 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
254 ArgmaxPoolingOperatorTester()
255 .batch_size(1)
256 .input_height(pool_size + 1)
257 .input_width(3)
258 .pooling_height(pool_size)
259 .pooling_width(1)
260 .channels(channels)
261 .TestF32();
262 }
263 }
264}
265
Marat Dukhanefc47b82019-11-18 09:25:38 -0800266TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_large_Mx1_pool_with_padding) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800267 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700268 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
269 for (size_t channels = 1; channels <= 100; channels += 15) {
270 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
271 for (size_t padding_top = 0; padding_top <= 1; padding_top++) {
272 for (size_t padding_bottom = 0; padding_bottom <= 1; padding_bottom++) {
273 ArgmaxPoolingOperatorTester()
274 .batch_size(1)
275 .input_height(pool_size + 1)
276 .input_width(3)
277 .padding_top(padding_top)
278 .padding_bottom(padding_bottom)
279 .pooling_height(pool_size)
280 .pooling_width(1)
281 .channels(channels)
282 .TestF32();
283 }
284 }
285 }
286 }
287}
288
Marat Dukhanefc47b82019-11-18 09:25:38 -0800289TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_large_pool_with_input_stride) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800290 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700291 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
292 for (size_t channels = 1; channels <= 100; channels += 15) {
293 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
294 ArgmaxPoolingOperatorTester()
295 .batch_size(1)
296 .input_height(pool_size + 1)
297 .input_width(3)
298 .pooling_height(pool_size)
299 .pooling_width(1)
300 .channels(channels)
301 .input_pixel_stride(5 * channels)
302 .TestF32();
303 ArgmaxPoolingOperatorTester()
304 .batch_size(1)
305 .input_height(2)
306 .input_width(pool_size + 2)
307 .pooling_height(1)
308 .pooling_width(pool_size)
309 .channels(channels)
310 .input_pixel_stride(5 * channels)
311 .TestF32();
312 }
313 }
314}
315
Marat Dukhanefc47b82019-11-18 09:25:38 -0800316TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_large_pool_with_output_stride) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800317 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700318 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
319 for (size_t channels = 1; channels <= 100; channels += 15) {
320 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
321 ArgmaxPoolingOperatorTester()
322 .batch_size(1)
323 .input_height(pool_size + 1)
324 .input_width(3)
325 .pooling_height(pool_size)
326 .pooling_width(1)
327 .channels(channels)
328 .output_pixel_stride(5 * channels)
329 .TestF32();
330 ArgmaxPoolingOperatorTester()
331 .batch_size(1)
332 .input_height(2)
333 .input_width(pool_size + 2)
334 .pooling_height(1)
335 .pooling_width(pool_size)
336 .channels(channels)
337 .output_pixel_stride(5 * channels)
338 .TestF32();
339 }
340 }
341}
342
Marat Dukhanefc47b82019-11-18 09:25:38 -0800343TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_large_pool_with_qmin) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800344 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700345 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
346 for (size_t channels = 1; channels <= 100; channels += 15) {
347 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
348 ArgmaxPoolingOperatorTester()
349 .batch_size(1)
350 .input_height(pool_size + 1)
351 .input_width(3)
352 .pooling_height(pool_size)
353 .pooling_width(1)
354 .channels(channels)
355 .qmin(192)
356 .TestF32();
357 ArgmaxPoolingOperatorTester()
358 .batch_size(1)
359 .input_height(2)
360 .input_width(pool_size + 2)
361 .pooling_height(1)
362 .pooling_width(pool_size)
363 .channels(channels)
364 .qmin(192)
365 .TestF32();
366 }
367 }
368}
369
Marat Dukhanefc47b82019-11-18 09:25:38 -0800370TEST(ARGMAX_POOLING_NHWC_F32, unit_batch_large_pool_with_qmax) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800371 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700372 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
373 for (size_t channels = 1; channels <= 100; channels += 15) {
374 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
375 ArgmaxPoolingOperatorTester()
376 .batch_size(1)
377 .input_height(pool_size + 1)
378 .input_width(3)
379 .pooling_height(pool_size)
380 .pooling_width(1)
381 .channels(channels)
382 .qmax(192)
383 .TestF32();
384 ArgmaxPoolingOperatorTester()
385 .batch_size(1)
386 .input_height(2)
387 .input_width(pool_size + 2)
388 .pooling_height(1)
389 .pooling_width(pool_size)
390 .channels(channels)
391 .qmax(192)
392 .TestF32();
393 }
394 }
395}
396
Marat Dukhanefc47b82019-11-18 09:25:38 -0800397TEST(ARGMAX_POOLING_NHWC_F32, small_batch_small_pool) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800398 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700399 for (size_t channels = 1; channels <= 100; channels += 15) {
400 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
401 ArgmaxPoolingOperatorTester()
402 .batch_size(3)
403 .input_height(pool_size + 1)
404 .input_width(3)
405 .pooling_height(pool_size)
406 .pooling_width(1)
407 .channels(channels)
408 .TestF32();
409 ArgmaxPoolingOperatorTester()
410 .batch_size(3)
411 .input_height(2)
412 .input_width(pool_size + 2)
413 .pooling_height(1)
414 .pooling_width(pool_size)
415 .channels(channels)
416 .TestF32();
417 }
418 }
419}
420
Marat Dukhanefc47b82019-11-18 09:25:38 -0800421TEST(ARGMAX_POOLING_NHWC_F32, small_batch_small_pool_with_input_stride) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800422 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700423 for (size_t channels = 1; channels <= 100; channels += 15) {
424 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
425 ArgmaxPoolingOperatorTester()
426 .batch_size(3)
427 .input_height(pool_size + 1)
428 .input_width(3)
429 .pooling_height(pool_size)
430 .pooling_width(1)
431 .channels(channels)
432 .input_pixel_stride(5 * channels)
433 .TestF32();
434 ArgmaxPoolingOperatorTester()
435 .batch_size(3)
436 .input_height(2)
437 .input_width(pool_size + 2)
438 .pooling_height(1)
439 .pooling_width(pool_size)
440 .channels(channels)
441 .input_pixel_stride(5 * channels)
442 .TestF32();
443 }
444 }
445}
446
Marat Dukhanefc47b82019-11-18 09:25:38 -0800447TEST(ARGMAX_POOLING_NHWC_F32, small_batch_small_pool_with_output_stride) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800448 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700449 for (size_t channels = 1; channels <= 100; channels += 15) {
450 for (size_t pool_size = 2; pool_size <= FindMaxSinglePassPoolingSize(xnn_params.f32.argmaxpool); pool_size++) {
451 ArgmaxPoolingOperatorTester()
452 .batch_size(3)
453 .input_height(pool_size + 1)
454 .input_width(3)
455 .pooling_height(pool_size)
456 .pooling_width(1)
457 .channels(channels)
458 .output_pixel_stride(5 * channels)
459 .TestF32();
460 ArgmaxPoolingOperatorTester()
461 .batch_size(3)
462 .input_height(2)
463 .input_width(pool_size + 2)
464 .pooling_height(1)
465 .pooling_width(pool_size)
466 .channels(channels)
467 .output_pixel_stride(5 * channels)
468 .TestF32();
469 }
470 }
471}
472
Marat Dukhanefc47b82019-11-18 09:25:38 -0800473TEST(ARGMAX_POOLING_NHWC_F32, small_batch_large_pool) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800474 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700475 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
476 for (size_t channels = 1; channels <= 100; channels += 15) {
477 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
478 ArgmaxPoolingOperatorTester()
479 .batch_size(3)
480 .input_height(pool_size + 1)
481 .input_width(3)
482 .pooling_height(pool_size)
483 .pooling_width(1)
484 .channels(channels)
485 .TestF32();
486 ArgmaxPoolingOperatorTester()
487 .batch_size(3)
488 .input_height(2)
489 .input_width(pool_size + 2)
490 .pooling_height(1)
491 .pooling_width(pool_size)
492 .channels(channels)
493 .TestF32();
494 }
495 }
496}
497
Marat Dukhanefc47b82019-11-18 09:25:38 -0800498TEST(ARGMAX_POOLING_NHWC_F32, small_batch_large_pool_with_input_stride) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800499 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700500 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
501 for (size_t channels = 1; channels <= 100; channels += 15) {
502 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
503 ArgmaxPoolingOperatorTester()
504 .batch_size(3)
505 .input_height(pool_size + 1)
506 .input_width(3)
507 .pooling_height(pool_size)
508 .pooling_width(1)
509 .channels(channels)
510 .input_pixel_stride(5 * channels)
511 .TestF32();
512 ArgmaxPoolingOperatorTester()
513 .batch_size(3)
514 .input_height(2)
515 .input_width(pool_size + 2)
516 .pooling_height(1)
517 .pooling_width(pool_size)
518 .channels(channels)
519 .input_pixel_stride(5 * channels)
520 .TestF32();
521 }
522 }
523}
524
Marat Dukhanefc47b82019-11-18 09:25:38 -0800525TEST(ARGMAX_POOLING_NHWC_F32, small_batch_large_pool_with_output_stride) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800526 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700527 const auto multipass = FindMultiPassMicroKernel(xnn_params.f32.argmaxpool);
528 for (size_t channels = 1; channels <= 100; channels += 15) {
529 for (size_t pool_size = multipass.mr + 1; pool_size <= multipass.mr + multipass.qr; pool_size++) {
530 ArgmaxPoolingOperatorTester()
531 .batch_size(3)
532 .input_height(pool_size + 1)
533 .input_width(3)
534 .pooling_height(pool_size)
535 .pooling_width(1)
536 .channels(channels)
537 .output_pixel_stride(5 * channels)
538 .TestF32();
539 ArgmaxPoolingOperatorTester()
540 .batch_size(3)
541 .input_height(2)
542 .input_width(pool_size + 2)
543 .pooling_height(1)
544 .pooling_width(pool_size)
545 .channels(channels)
546 .output_pixel_stride(5 * channels)
547 .TestF32();
548 }
549 }
550}
551
Marat Dukhanefc47b82019-11-18 09:25:38 -0800552TEST(ARGMAX_POOLING_NHWC_F32, setup_increasing_batch) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800553 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700554 ArgmaxPoolingOperatorTester()
555 .batch_size(3)
556 .next_batch_size(5)
557 .input_height(8)
558 .input_width(8)
559 .pooling_height(5)
560 .pooling_width(3)
561 .channels(24)
562 .TestSetupF32();
563}
564
Marat Dukhanefc47b82019-11-18 09:25:38 -0800565TEST(ARGMAX_POOLING_NHWC_F32, setup_decreasing_batch) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800566 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700567 ArgmaxPoolingOperatorTester()
568 .batch_size(5)
569 .next_batch_size(3)
570 .input_height(8)
571 .input_width(8)
572 .pooling_height(5)
573 .pooling_width(3)
574 .channels(24)
575 .TestSetupF32();
576}
577
Marat Dukhanefc47b82019-11-18 09:25:38 -0800578TEST(ARGMAX_POOLING_NHWC_F32, setup_changing_height) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800579 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700580 ArgmaxPoolingOperatorTester()
581 .batch_size(3)
582 .input_height(8)
583 .input_width(8)
584 .next_input_height(9)
585 .pooling_height(5)
586 .pooling_width(3)
587 .channels(24)
588 .TestSetupF32();
589 ArgmaxPoolingOperatorTester()
590 .batch_size(3)
591 .input_height(8)
592 .input_width(8)
593 .next_input_height(7)
594 .pooling_height(5)
595 .pooling_width(3)
596 .channels(24)
597 .TestSetupF32();
598}
599
Marat Dukhanefc47b82019-11-18 09:25:38 -0800600TEST(ARGMAX_POOLING_NHWC_F32, setup_changing_width) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800601 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700602 ArgmaxPoolingOperatorTester()
603 .batch_size(3)
604 .input_height(8)
605 .input_width(8)
606 .next_input_width(9)
607 .pooling_height(5)
608 .pooling_width(3)
609 .channels(24)
610 .TestSetupF32();
611 ArgmaxPoolingOperatorTester()
612 .batch_size(3)
613 .input_height(8)
614 .input_width(8)
615 .next_input_width(7)
616 .pooling_height(5)
617 .pooling_width(3)
618 .channels(24)
619 .TestSetupF32();
620}
621
Marat Dukhanefc47b82019-11-18 09:25:38 -0800622TEST(ARGMAX_POOLING_NHWC_F32, setup_swap_height_and_width) {
Marat Dukhan04f03be2019-11-19 12:36:47 -0800623 ASSERT_EQ(xnn_status_success, xnn_initialize(nullptr /* allocator */));
XNNPACK Teamb455b122019-09-27 18:10:33 -0700624 ArgmaxPoolingOperatorTester()
625 .batch_size(3)
626 .input_height(9)
627 .input_width(8)
628 .next_input_height(8)
629 .next_input_width(9)
630 .pooling_height(5)
631 .pooling_width(3)
632 .channels(24)
633 .TestSetupF32();
634}