XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| 5 | |
| 6 | #include <gtest/gtest.h> |
| 7 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 8 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9 | #include <xnnpack/isa-checks.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 10 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 11 | #include <xnnpack/pad.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 12 | #include "pad-microkernel-tester.h" |
| 13 | |
| 14 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 15 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 16 | TEST(X32_PAD_X2__NEON, fulltile_copy_n_eq_4) { |
| 17 | TEST_REQUIRES_ARM_NEON; |
| 18 | PadMicrokernelTester() |
| 19 | .m(2) |
| 20 | .n(4) |
| 21 | .Test(xnn_x32_pad_x2__neon); |
| 22 | } |
| 23 | |
| 24 | TEST(X32_PAD_X2__NEON, fulltile_copy_n_div_4) { |
| 25 | TEST_REQUIRES_ARM_NEON; |
| 26 | for (size_t n = 8; n < 32; n += 4) { |
| 27 | PadMicrokernelTester() |
| 28 | .m(2) |
| 29 | .n(n) |
| 30 | .Test(xnn_x32_pad_x2__neon); |
| 31 | } |
| 32 | } |
| 33 | |
| 34 | TEST(X32_PAD_X2__NEON, fulltile_copy_n_lt_4) { |
| 35 | TEST_REQUIRES_ARM_NEON; |
| 36 | for (size_t n = 1; n < 4; n++) { |
| 37 | PadMicrokernelTester() |
| 38 | .m(2) |
| 39 | .n(n) |
| 40 | .Test(xnn_x32_pad_x2__neon); |
| 41 | } |
| 42 | } |
| 43 | |
| 44 | TEST(X32_PAD_X2__NEON, fulltile_copy_n_gt_4) { |
| 45 | TEST_REQUIRES_ARM_NEON; |
| 46 | for (size_t n = 5; n < 8; n++) { |
| 47 | PadMicrokernelTester() |
| 48 | .m(2) |
| 49 | .n(4) |
| 50 | .Test(xnn_x32_pad_x2__neon); |
| 51 | } |
| 52 | } |
| 53 | |
| 54 | TEST(X32_PAD_X2__NEON, subtile_copy) { |
| 55 | TEST_REQUIRES_ARM_NEON; |
| 56 | for (size_t m = 1; m < 2; m++) { |
| 57 | for (size_t n = 1; n < 10; n++) { |
| 58 | PadMicrokernelTester() |
| 59 | .m(m) |
| 60 | .n(n) |
| 61 | .Test(xnn_x32_pad_x2__neon); |
| 62 | } |
| 63 | } |
| 64 | } |
| 65 | |
| 66 | TEST(X32_PAD_X2__NEON, fulltile_lpad_l_eq_4) { |
| 67 | TEST_REQUIRES_ARM_NEON; |
| 68 | PadMicrokernelTester() |
| 69 | .m(2) |
| 70 | .n(1) |
| 71 | .l(4) |
| 72 | .Test(xnn_x32_pad_x2__neon); |
| 73 | } |
| 74 | |
| 75 | TEST(X32_PAD_X2__NEON, fulltile_lpad_l_div_4) { |
| 76 | TEST_REQUIRES_ARM_NEON; |
| 77 | for (size_t l = 8; l < 32; l += 4) { |
| 78 | PadMicrokernelTester() |
| 79 | .m(2) |
| 80 | .n(1) |
| 81 | .l(l) |
| 82 | .Test(xnn_x32_pad_x2__neon); |
| 83 | } |
| 84 | } |
| 85 | |
| 86 | TEST(X32_PAD_X2__NEON, fulltile_lpad_l_lt_4) { |
| 87 | TEST_REQUIRES_ARM_NEON; |
| 88 | for (size_t l = 1; l < 4; l++) { |
| 89 | PadMicrokernelTester() |
| 90 | .m(2) |
| 91 | .n(1) |
| 92 | .l(l) |
| 93 | .Test(xnn_x32_pad_x2__neon); |
| 94 | } |
| 95 | } |
| 96 | |
| 97 | TEST(X32_PAD_X2__NEON, fulltile_lpad_l_gt_4) { |
| 98 | TEST_REQUIRES_ARM_NEON; |
| 99 | for (size_t l = 5; l < 8; l++) { |
| 100 | PadMicrokernelTester() |
| 101 | .m(2) |
| 102 | .n(1) |
| 103 | .l(l) |
| 104 | .Test(xnn_x32_pad_x2__neon); |
| 105 | } |
| 106 | } |
| 107 | |
| 108 | TEST(X32_PAD_X2__NEON, subtile_lpad) { |
| 109 | TEST_REQUIRES_ARM_NEON; |
| 110 | for (size_t m = 1; m < 2; m++) { |
| 111 | for (size_t l = 1; l < 10; l++) { |
| 112 | PadMicrokernelTester() |
| 113 | .m(m) |
| 114 | .n(1) |
| 115 | .l(l) |
| 116 | .Test(xnn_x32_pad_x2__neon); |
| 117 | } |
| 118 | } |
| 119 | } |
| 120 | |
| 121 | TEST(X32_PAD_X2__NEON, fulltile_rpad_r_eq_4) { |
| 122 | TEST_REQUIRES_ARM_NEON; |
| 123 | PadMicrokernelTester() |
| 124 | .m(2) |
| 125 | .n(1) |
| 126 | .r(4) |
| 127 | .Test(xnn_x32_pad_x2__neon); |
| 128 | } |
| 129 | |
| 130 | TEST(X32_PAD_X2__NEON, fulltile_rpad_r_div_4) { |
| 131 | TEST_REQUIRES_ARM_NEON; |
| 132 | for (size_t r = 8; r < 32; r += 4) { |
| 133 | PadMicrokernelTester() |
| 134 | .m(2) |
| 135 | .n(1) |
| 136 | .r(r) |
| 137 | .Test(xnn_x32_pad_x2__neon); |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | TEST(X32_PAD_X2__NEON, fulltile_rpad_r_lt_4) { |
| 142 | TEST_REQUIRES_ARM_NEON; |
| 143 | for (size_t r = 1; r < 4; r++) { |
| 144 | PadMicrokernelTester() |
| 145 | .m(2) |
| 146 | .n(1) |
| 147 | .r(r) |
| 148 | .Test(xnn_x32_pad_x2__neon); |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | TEST(X32_PAD_X2__NEON, fulltile_rpad_r_gt_4) { |
| 153 | TEST_REQUIRES_ARM_NEON; |
| 154 | for (size_t r = 5; r < 8; r++) { |
| 155 | PadMicrokernelTester() |
| 156 | .m(2) |
| 157 | .n(1) |
| 158 | .l(r) |
| 159 | .Test(xnn_x32_pad_x2__neon); |
| 160 | } |
| 161 | } |
| 162 | |
| 163 | TEST(X32_PAD_X2__NEON, subtile_rpad) { |
| 164 | TEST_REQUIRES_ARM_NEON; |
| 165 | for (size_t m = 1; m < 2; m++) { |
| 166 | for (size_t r = 1; r < 10; r++) { |
| 167 | PadMicrokernelTester() |
| 168 | .m(m) |
| 169 | .n(1) |
| 170 | .r(r) |
| 171 | .Test(xnn_x32_pad_x2__neon); |
| 172 | } |
| 173 | } |
| 174 | } |
| 175 | |
| 176 | TEST(X32_PAD_X2__NEON, x_stride) { |
| 177 | TEST_REQUIRES_ARM_NEON; |
| 178 | for (size_t m = 1; m <= 2; m++) { |
| 179 | for (size_t k = 1; k < 10; k++) { |
| 180 | PadMicrokernelTester() |
| 181 | .m(m) |
| 182 | .n(k) |
| 183 | .l(k) |
| 184 | .r(k) |
| 185 | .x_stride(2 * k + 1) |
| 186 | .Test(xnn_x32_pad_x2__neon); |
| 187 | } |
| 188 | } |
| 189 | } |
| 190 | |
| 191 | TEST(X32_PAD_X2__NEON, y_stride) { |
| 192 | TEST_REQUIRES_ARM_NEON; |
| 193 | for (size_t m = 1; m <= 2; m++) { |
| 194 | for (size_t k = 1; k < 10; k++) { |
| 195 | PadMicrokernelTester() |
| 196 | .m(m) |
| 197 | .n(2 * k) |
| 198 | .l(k) |
| 199 | .r(k) |
| 200 | .y_stride(5 * k + 3) |
| 201 | .Test(xnn_x32_pad_x2__neon); |
| 202 | } |
| 203 | } |
| 204 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 205 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 206 | |
| 207 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 208 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 209 | TEST(X32_PAD_X2__SSE2, fulltile_copy_n_eq_4) { |
| 210 | TEST_REQUIRES_X86_SSE2; |
| 211 | PadMicrokernelTester() |
| 212 | .m(2) |
| 213 | .n(4) |
| 214 | .Test(xnn_x32_pad_x2__sse2); |
| 215 | } |
| 216 | |
| 217 | TEST(X32_PAD_X2__SSE2, fulltile_copy_n_div_4) { |
| 218 | TEST_REQUIRES_X86_SSE2; |
| 219 | for (size_t n = 8; n < 32; n += 4) { |
| 220 | PadMicrokernelTester() |
| 221 | .m(2) |
| 222 | .n(n) |
| 223 | .Test(xnn_x32_pad_x2__sse2); |
| 224 | } |
| 225 | } |
| 226 | |
| 227 | TEST(X32_PAD_X2__SSE2, fulltile_copy_n_lt_4) { |
| 228 | TEST_REQUIRES_X86_SSE2; |
| 229 | for (size_t n = 1; n < 4; n++) { |
| 230 | PadMicrokernelTester() |
| 231 | .m(2) |
| 232 | .n(n) |
| 233 | .Test(xnn_x32_pad_x2__sse2); |
| 234 | } |
| 235 | } |
| 236 | |
| 237 | TEST(X32_PAD_X2__SSE2, fulltile_copy_n_gt_4) { |
| 238 | TEST_REQUIRES_X86_SSE2; |
| 239 | for (size_t n = 5; n < 8; n++) { |
| 240 | PadMicrokernelTester() |
| 241 | .m(2) |
| 242 | .n(4) |
| 243 | .Test(xnn_x32_pad_x2__sse2); |
| 244 | } |
| 245 | } |
| 246 | |
| 247 | TEST(X32_PAD_X2__SSE2, subtile_copy) { |
| 248 | TEST_REQUIRES_X86_SSE2; |
| 249 | for (size_t m = 1; m < 2; m++) { |
| 250 | for (size_t n = 1; n < 10; n++) { |
| 251 | PadMicrokernelTester() |
| 252 | .m(m) |
| 253 | .n(n) |
| 254 | .Test(xnn_x32_pad_x2__sse2); |
| 255 | } |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | TEST(X32_PAD_X2__SSE2, fulltile_lpad_l_eq_4) { |
| 260 | TEST_REQUIRES_X86_SSE2; |
| 261 | PadMicrokernelTester() |
| 262 | .m(2) |
| 263 | .n(1) |
| 264 | .l(4) |
| 265 | .Test(xnn_x32_pad_x2__sse2); |
| 266 | } |
| 267 | |
| 268 | TEST(X32_PAD_X2__SSE2, fulltile_lpad_l_div_4) { |
| 269 | TEST_REQUIRES_X86_SSE2; |
| 270 | for (size_t l = 8; l < 32; l += 4) { |
| 271 | PadMicrokernelTester() |
| 272 | .m(2) |
| 273 | .n(1) |
| 274 | .l(l) |
| 275 | .Test(xnn_x32_pad_x2__sse2); |
| 276 | } |
| 277 | } |
| 278 | |
| 279 | TEST(X32_PAD_X2__SSE2, fulltile_lpad_l_lt_4) { |
| 280 | TEST_REQUIRES_X86_SSE2; |
| 281 | for (size_t l = 1; l < 4; l++) { |
| 282 | PadMicrokernelTester() |
| 283 | .m(2) |
| 284 | .n(1) |
| 285 | .l(l) |
| 286 | .Test(xnn_x32_pad_x2__sse2); |
| 287 | } |
| 288 | } |
| 289 | |
| 290 | TEST(X32_PAD_X2__SSE2, fulltile_lpad_l_gt_4) { |
| 291 | TEST_REQUIRES_X86_SSE2; |
| 292 | for (size_t l = 5; l < 8; l++) { |
| 293 | PadMicrokernelTester() |
| 294 | .m(2) |
| 295 | .n(1) |
| 296 | .l(l) |
| 297 | .Test(xnn_x32_pad_x2__sse2); |
| 298 | } |
| 299 | } |
| 300 | |
| 301 | TEST(X32_PAD_X2__SSE2, subtile_lpad) { |
| 302 | TEST_REQUIRES_X86_SSE2; |
| 303 | for (size_t m = 1; m < 2; m++) { |
| 304 | for (size_t l = 1; l < 10; l++) { |
| 305 | PadMicrokernelTester() |
| 306 | .m(m) |
| 307 | .n(1) |
| 308 | .l(l) |
| 309 | .Test(xnn_x32_pad_x2__sse2); |
| 310 | } |
| 311 | } |
| 312 | } |
| 313 | |
| 314 | TEST(X32_PAD_X2__SSE2, fulltile_rpad_r_eq_4) { |
| 315 | TEST_REQUIRES_X86_SSE2; |
| 316 | PadMicrokernelTester() |
| 317 | .m(2) |
| 318 | .n(1) |
| 319 | .r(4) |
| 320 | .Test(xnn_x32_pad_x2__sse2); |
| 321 | } |
| 322 | |
| 323 | TEST(X32_PAD_X2__SSE2, fulltile_rpad_r_div_4) { |
| 324 | TEST_REQUIRES_X86_SSE2; |
| 325 | for (size_t r = 8; r < 32; r += 4) { |
| 326 | PadMicrokernelTester() |
| 327 | .m(2) |
| 328 | .n(1) |
| 329 | .r(r) |
| 330 | .Test(xnn_x32_pad_x2__sse2); |
| 331 | } |
| 332 | } |
| 333 | |
| 334 | TEST(X32_PAD_X2__SSE2, fulltile_rpad_r_lt_4) { |
| 335 | TEST_REQUIRES_X86_SSE2; |
| 336 | for (size_t r = 1; r < 4; r++) { |
| 337 | PadMicrokernelTester() |
| 338 | .m(2) |
| 339 | .n(1) |
| 340 | .r(r) |
| 341 | .Test(xnn_x32_pad_x2__sse2); |
| 342 | } |
| 343 | } |
| 344 | |
| 345 | TEST(X32_PAD_X2__SSE2, fulltile_rpad_r_gt_4) { |
| 346 | TEST_REQUIRES_X86_SSE2; |
| 347 | for (size_t r = 5; r < 8; r++) { |
| 348 | PadMicrokernelTester() |
| 349 | .m(2) |
| 350 | .n(1) |
| 351 | .l(r) |
| 352 | .Test(xnn_x32_pad_x2__sse2); |
| 353 | } |
| 354 | } |
| 355 | |
| 356 | TEST(X32_PAD_X2__SSE2, subtile_rpad) { |
| 357 | TEST_REQUIRES_X86_SSE2; |
| 358 | for (size_t m = 1; m < 2; m++) { |
| 359 | for (size_t r = 1; r < 10; r++) { |
| 360 | PadMicrokernelTester() |
| 361 | .m(m) |
| 362 | .n(1) |
| 363 | .r(r) |
| 364 | .Test(xnn_x32_pad_x2__sse2); |
| 365 | } |
| 366 | } |
| 367 | } |
| 368 | |
| 369 | TEST(X32_PAD_X2__SSE2, x_stride) { |
| 370 | TEST_REQUIRES_X86_SSE2; |
| 371 | for (size_t m = 1; m <= 2; m++) { |
| 372 | for (size_t k = 1; k < 10; k++) { |
| 373 | PadMicrokernelTester() |
| 374 | .m(m) |
| 375 | .n(k) |
| 376 | .l(k) |
| 377 | .r(k) |
| 378 | .x_stride(2 * k + 1) |
| 379 | .Test(xnn_x32_pad_x2__sse2); |
| 380 | } |
| 381 | } |
| 382 | } |
| 383 | |
| 384 | TEST(X32_PAD_X2__SSE2, y_stride) { |
| 385 | TEST_REQUIRES_X86_SSE2; |
| 386 | for (size_t m = 1; m <= 2; m++) { |
| 387 | for (size_t k = 1; k < 10; k++) { |
| 388 | PadMicrokernelTester() |
| 389 | .m(m) |
| 390 | .n(2 * k) |
| 391 | .l(k) |
| 392 | .r(k) |
| 393 | .y_stride(5 * k + 3) |
| 394 | .Test(xnn_x32_pad_x2__sse2); |
| 395 | } |
| 396 | } |
| 397 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 398 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 399 | |
| 400 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 401 | #if !XNN_ARCH_WASM && !XNN_ARCH_ASMJS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 402 | TEST(X32_PAD_X2__PSIMD, fulltile_copy_n_eq_4) { |
| 403 | TEST_REQUIRES_PSIMD; |
| 404 | PadMicrokernelTester() |
| 405 | .m(2) |
| 406 | .n(4) |
| 407 | .Test(xnn_x32_pad_x2__psimd); |
| 408 | } |
| 409 | |
| 410 | TEST(X32_PAD_X2__PSIMD, fulltile_copy_n_div_4) { |
| 411 | TEST_REQUIRES_PSIMD; |
| 412 | for (size_t n = 8; n < 32; n += 4) { |
| 413 | PadMicrokernelTester() |
| 414 | .m(2) |
| 415 | .n(n) |
| 416 | .Test(xnn_x32_pad_x2__psimd); |
| 417 | } |
| 418 | } |
| 419 | |
| 420 | TEST(X32_PAD_X2__PSIMD, fulltile_copy_n_lt_4) { |
| 421 | TEST_REQUIRES_PSIMD; |
| 422 | for (size_t n = 1; n < 4; n++) { |
| 423 | PadMicrokernelTester() |
| 424 | .m(2) |
| 425 | .n(n) |
| 426 | .Test(xnn_x32_pad_x2__psimd); |
| 427 | } |
| 428 | } |
| 429 | |
| 430 | TEST(X32_PAD_X2__PSIMD, fulltile_copy_n_gt_4) { |
| 431 | TEST_REQUIRES_PSIMD; |
| 432 | for (size_t n = 5; n < 8; n++) { |
| 433 | PadMicrokernelTester() |
| 434 | .m(2) |
| 435 | .n(4) |
| 436 | .Test(xnn_x32_pad_x2__psimd); |
| 437 | } |
| 438 | } |
| 439 | |
| 440 | TEST(X32_PAD_X2__PSIMD, subtile_copy) { |
| 441 | TEST_REQUIRES_PSIMD; |
| 442 | for (size_t m = 1; m < 2; m++) { |
| 443 | for (size_t n = 1; n < 10; n++) { |
| 444 | PadMicrokernelTester() |
| 445 | .m(m) |
| 446 | .n(n) |
| 447 | .Test(xnn_x32_pad_x2__psimd); |
| 448 | } |
| 449 | } |
| 450 | } |
| 451 | |
| 452 | TEST(X32_PAD_X2__PSIMD, fulltile_lpad_l_eq_4) { |
| 453 | TEST_REQUIRES_PSIMD; |
| 454 | PadMicrokernelTester() |
| 455 | .m(2) |
| 456 | .n(1) |
| 457 | .l(4) |
| 458 | .Test(xnn_x32_pad_x2__psimd); |
| 459 | } |
| 460 | |
| 461 | TEST(X32_PAD_X2__PSIMD, fulltile_lpad_l_div_4) { |
| 462 | TEST_REQUIRES_PSIMD; |
| 463 | for (size_t l = 8; l < 32; l += 4) { |
| 464 | PadMicrokernelTester() |
| 465 | .m(2) |
| 466 | .n(1) |
| 467 | .l(l) |
| 468 | .Test(xnn_x32_pad_x2__psimd); |
| 469 | } |
| 470 | } |
| 471 | |
| 472 | TEST(X32_PAD_X2__PSIMD, fulltile_lpad_l_lt_4) { |
| 473 | TEST_REQUIRES_PSIMD; |
| 474 | for (size_t l = 1; l < 4; l++) { |
| 475 | PadMicrokernelTester() |
| 476 | .m(2) |
| 477 | .n(1) |
| 478 | .l(l) |
| 479 | .Test(xnn_x32_pad_x2__psimd); |
| 480 | } |
| 481 | } |
| 482 | |
| 483 | TEST(X32_PAD_X2__PSIMD, fulltile_lpad_l_gt_4) { |
| 484 | TEST_REQUIRES_PSIMD; |
| 485 | for (size_t l = 5; l < 8; l++) { |
| 486 | PadMicrokernelTester() |
| 487 | .m(2) |
| 488 | .n(1) |
| 489 | .l(l) |
| 490 | .Test(xnn_x32_pad_x2__psimd); |
| 491 | } |
| 492 | } |
| 493 | |
| 494 | TEST(X32_PAD_X2__PSIMD, subtile_lpad) { |
| 495 | TEST_REQUIRES_PSIMD; |
| 496 | for (size_t m = 1; m < 2; m++) { |
| 497 | for (size_t l = 1; l < 10; l++) { |
| 498 | PadMicrokernelTester() |
| 499 | .m(m) |
| 500 | .n(1) |
| 501 | .l(l) |
| 502 | .Test(xnn_x32_pad_x2__psimd); |
| 503 | } |
| 504 | } |
| 505 | } |
| 506 | |
| 507 | TEST(X32_PAD_X2__PSIMD, fulltile_rpad_r_eq_4) { |
| 508 | TEST_REQUIRES_PSIMD; |
| 509 | PadMicrokernelTester() |
| 510 | .m(2) |
| 511 | .n(1) |
| 512 | .r(4) |
| 513 | .Test(xnn_x32_pad_x2__psimd); |
| 514 | } |
| 515 | |
| 516 | TEST(X32_PAD_X2__PSIMD, fulltile_rpad_r_div_4) { |
| 517 | TEST_REQUIRES_PSIMD; |
| 518 | for (size_t r = 8; r < 32; r += 4) { |
| 519 | PadMicrokernelTester() |
| 520 | .m(2) |
| 521 | .n(1) |
| 522 | .r(r) |
| 523 | .Test(xnn_x32_pad_x2__psimd); |
| 524 | } |
| 525 | } |
| 526 | |
| 527 | TEST(X32_PAD_X2__PSIMD, fulltile_rpad_r_lt_4) { |
| 528 | TEST_REQUIRES_PSIMD; |
| 529 | for (size_t r = 1; r < 4; r++) { |
| 530 | PadMicrokernelTester() |
| 531 | .m(2) |
| 532 | .n(1) |
| 533 | .r(r) |
| 534 | .Test(xnn_x32_pad_x2__psimd); |
| 535 | } |
| 536 | } |
| 537 | |
| 538 | TEST(X32_PAD_X2__PSIMD, fulltile_rpad_r_gt_4) { |
| 539 | TEST_REQUIRES_PSIMD; |
| 540 | for (size_t r = 5; r < 8; r++) { |
| 541 | PadMicrokernelTester() |
| 542 | .m(2) |
| 543 | .n(1) |
| 544 | .l(r) |
| 545 | .Test(xnn_x32_pad_x2__psimd); |
| 546 | } |
| 547 | } |
| 548 | |
| 549 | TEST(X32_PAD_X2__PSIMD, subtile_rpad) { |
| 550 | TEST_REQUIRES_PSIMD; |
| 551 | for (size_t m = 1; m < 2; m++) { |
| 552 | for (size_t r = 1; r < 10; r++) { |
| 553 | PadMicrokernelTester() |
| 554 | .m(m) |
| 555 | .n(1) |
| 556 | .r(r) |
| 557 | .Test(xnn_x32_pad_x2__psimd); |
| 558 | } |
| 559 | } |
| 560 | } |
| 561 | |
| 562 | TEST(X32_PAD_X2__PSIMD, x_stride) { |
| 563 | TEST_REQUIRES_PSIMD; |
| 564 | for (size_t m = 1; m <= 2; m++) { |
| 565 | for (size_t k = 1; k < 10; k++) { |
| 566 | PadMicrokernelTester() |
| 567 | .m(m) |
| 568 | .n(k) |
| 569 | .l(k) |
| 570 | .r(k) |
| 571 | .x_stride(2 * k + 1) |
| 572 | .Test(xnn_x32_pad_x2__psimd); |
| 573 | } |
| 574 | } |
| 575 | } |
| 576 | |
| 577 | TEST(X32_PAD_X2__PSIMD, y_stride) { |
| 578 | TEST_REQUIRES_PSIMD; |
| 579 | for (size_t m = 1; m <= 2; m++) { |
| 580 | for (size_t k = 1; k < 10; k++) { |
| 581 | PadMicrokernelTester() |
| 582 | .m(m) |
| 583 | .n(2 * k) |
| 584 | .l(k) |
| 585 | .r(k) |
| 586 | .y_stride(5 * k + 3) |
| 587 | .Test(xnn_x32_pad_x2__psimd); |
| 588 | } |
| 589 | } |
| 590 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 591 | #endif // !XNN_ARCH_WASM && !XNN_ARCH_ASMJS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 592 | |
| 593 | |
| 594 | TEST(X32_PAD_X2__SCALAR, fulltile_copy_n_eq_1) { |
| 595 | PadMicrokernelTester() |
| 596 | .m(2) |
| 597 | .n(1) |
| 598 | .Test(xnn_x32_pad_x2__scalar); |
| 599 | } |
| 600 | |
| 601 | TEST(X32_PAD_X2__SCALAR, fulltile_copy_n_gt_1) { |
| 602 | for (size_t n = 2; n < 8; n++) { |
| 603 | PadMicrokernelTester() |
| 604 | .m(2) |
| 605 | .n(n) |
| 606 | .Test(xnn_x32_pad_x2__scalar); |
| 607 | } |
| 608 | } |
| 609 | |
| 610 | TEST(X32_PAD_X2__SCALAR, subtile_copy) { |
| 611 | for (size_t m = 1; m < 2; m++) { |
| 612 | for (size_t n = 1; n < 5; n++) { |
| 613 | PadMicrokernelTester() |
| 614 | .m(m) |
| 615 | .n(n) |
| 616 | .Test(xnn_x32_pad_x2__scalar); |
| 617 | } |
| 618 | } |
| 619 | } |
| 620 | |
| 621 | TEST(X32_PAD_X2__SCALAR, fulltile_lpad_l_eq_1) { |
| 622 | PadMicrokernelTester() |
| 623 | .m(2) |
| 624 | .n(1) |
| 625 | .l(1) |
| 626 | .Test(xnn_x32_pad_x2__scalar); |
| 627 | } |
| 628 | |
| 629 | TEST(X32_PAD_X2__SCALAR, fulltile_lpad_l_gt_1) { |
| 630 | for (size_t l = 2; l < 8; l++) { |
| 631 | PadMicrokernelTester() |
| 632 | .m(2) |
| 633 | .n(1) |
| 634 | .l(l) |
| 635 | .Test(xnn_x32_pad_x2__scalar); |
| 636 | } |
| 637 | } |
| 638 | |
| 639 | TEST(X32_PAD_X2__SCALAR, subtile_lpad) { |
| 640 | for (size_t m = 1; m < 2; m++) { |
| 641 | for (size_t l = 1; l < 5; l++) { |
| 642 | PadMicrokernelTester() |
| 643 | .m(m) |
| 644 | .n(1) |
| 645 | .l(l) |
| 646 | .Test(xnn_x32_pad_x2__scalar); |
| 647 | } |
| 648 | } |
| 649 | } |
| 650 | |
| 651 | TEST(X32_PAD_X2__SCALAR, fulltile_rpad_r_eq_1) { |
| 652 | PadMicrokernelTester() |
| 653 | .m(2) |
| 654 | .n(1) |
| 655 | .r(1) |
| 656 | .Test(xnn_x32_pad_x2__scalar); |
| 657 | } |
| 658 | |
| 659 | TEST(X32_PAD_X2__SCALAR, fulltile_rpad_r_gt_1) { |
| 660 | for (size_t r = 1; r < 8; r++) { |
| 661 | PadMicrokernelTester() |
| 662 | .m(2) |
| 663 | .n(1) |
| 664 | .l(r) |
| 665 | .Test(xnn_x32_pad_x2__scalar); |
| 666 | } |
| 667 | } |
| 668 | |
| 669 | TEST(X32_PAD_X2__SCALAR, subtile_rpad) { |
| 670 | for (size_t m = 1; m < 2; m++) { |
| 671 | for (size_t r = 1; r < 5; r++) { |
| 672 | PadMicrokernelTester() |
| 673 | .m(m) |
| 674 | .n(1) |
| 675 | .r(r) |
| 676 | .Test(xnn_x32_pad_x2__scalar); |
| 677 | } |
| 678 | } |
| 679 | } |
| 680 | |
| 681 | TEST(X32_PAD_X2__SCALAR, x_stride) { |
| 682 | for (size_t m = 1; m <= 2; m++) { |
| 683 | for (size_t k = 1; k < 5; k++) { |
| 684 | PadMicrokernelTester() |
| 685 | .m(m) |
| 686 | .n(k) |
| 687 | .l(k) |
| 688 | .r(k) |
| 689 | .x_stride(2 * k + 1) |
| 690 | .Test(xnn_x32_pad_x2__scalar); |
| 691 | } |
| 692 | } |
| 693 | } |
| 694 | |
| 695 | TEST(X32_PAD_X2__SCALAR, y_stride) { |
| 696 | for (size_t m = 1; m <= 2; m++) { |
| 697 | for (size_t k = 1; k < 5; k++) { |
| 698 | PadMicrokernelTester() |
| 699 | .m(m) |
| 700 | .n(2 * k) |
| 701 | .l(k) |
| 702 | .r(k) |
| 703 | .y_stride(5 * k + 3) |
| 704 | .Test(xnn_x32_pad_x2__scalar); |
| 705 | } |
| 706 | } |
| 707 | } |