Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 8 | // |
| 9 | // Auto-generated file. Do not edit! |
| 10 | // Specification: test/f32-maxpool.yaml |
| 11 | // Generator: tools/generate-maxpool-test.py |
| 12 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 13 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 14 | #include <gtest/gtest.h> |
| 15 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 16 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 17 | #include <xnnpack/isa-checks.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 18 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 19 | #include <xnnpack/maxpool.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 20 | #include "maxpool-microkernel-tester.h" |
| 21 | |
| 22 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 23 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 24 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_unipass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 25 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 26 | MaxPoolMicrokernelTester() |
| 27 | .pooling_elements(9) |
| 28 | .pooling_tile(9, 8) |
| 29 | .channels(4) |
| 30 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 31 | } |
| 32 | |
| 33 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
| 34 | TEST_REQUIRES_X86_SSE; |
| 35 | MaxPoolMicrokernelTester() |
| 36 | .pooling_elements(9) |
| 37 | .pooling_tile(9, 8) |
| 38 | .channels(4) |
| 39 | .input_offset(7) |
| 40 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 41 | } |
| 42 | |
| 43 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
| 44 | TEST_REQUIRES_X86_SSE; |
| 45 | MaxPoolMicrokernelTester() |
| 46 | .pooling_elements(9) |
| 47 | .pooling_tile(9, 8) |
| 48 | .channels(4) |
| 49 | .qmin(192) |
| 50 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 51 | } |
| 52 | |
| 53 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
| 54 | TEST_REQUIRES_X86_SSE; |
| 55 | MaxPoolMicrokernelTester() |
| 56 | .pooling_elements(9) |
| 57 | .pooling_tile(9, 8) |
| 58 | .channels(4) |
| 59 | .qmax(192) |
| 60 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 61 | } |
| 62 | |
| 63 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_unipass_subtile) { |
| 64 | TEST_REQUIRES_X86_SSE; |
| 65 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 66 | MaxPoolMicrokernelTester() |
| 67 | .pooling_elements(pooling_elements) |
| 68 | .pooling_tile(9, 8) |
| 69 | .channels(4) |
| 70 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 71 | } |
| 72 | } |
| 73 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 74 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 75 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 76 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 77 | MaxPoolMicrokernelTester() |
| 78 | .pooling_elements(pooling_elements) |
| 79 | .pooling_tile(9, 8) |
| 80 | .channels(4) |
| 81 | .input_offset(7) |
| 82 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 83 | } |
| 84 | } |
| 85 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 86 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_unipass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 87 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 88 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 89 | MaxPoolMicrokernelTester() |
| 90 | .pooling_elements(9) |
| 91 | .pooling_tile(9, 8) |
| 92 | .channels(channels) |
| 93 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 94 | } |
| 95 | } |
| 96 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 97 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 98 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 99 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 100 | MaxPoolMicrokernelTester() |
| 101 | .pooling_elements(9) |
| 102 | .pooling_tile(9, 8) |
| 103 | .channels(channels) |
| 104 | .input_offset(37) |
| 105 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 106 | } |
| 107 | } |
| 108 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 109 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_unipass_fulltile_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 110 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 111 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 112 | MaxPoolMicrokernelTester() |
| 113 | .pooling_elements(9) |
| 114 | .pooling_tile(9, 8) |
| 115 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 116 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 117 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 118 | } |
| 119 | } |
| 120 | |
| 121 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_unipass_fulltile_with_qmax) { |
| 122 | TEST_REQUIRES_X86_SSE; |
| 123 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 124 | MaxPoolMicrokernelTester() |
| 125 | .pooling_elements(9) |
| 126 | .pooling_tile(9, 8) |
| 127 | .channels(channels) |
| 128 | .qmax(192) |
| 129 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 130 | } |
| 131 | } |
| 132 | |
| 133 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_unipass_subtile) { |
| 134 | TEST_REQUIRES_X86_SSE; |
| 135 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 136 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 137 | MaxPoolMicrokernelTester() |
| 138 | .pooling_elements(pooling_elements) |
| 139 | .pooling_tile(9, 8) |
| 140 | .channels(channels) |
| 141 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 142 | } |
| 143 | } |
| 144 | } |
| 145 | |
| 146 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_unipass_subtile_with_input_offset) { |
| 147 | TEST_REQUIRES_X86_SSE; |
| 148 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 149 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 150 | MaxPoolMicrokernelTester() |
| 151 | .pooling_elements(pooling_elements) |
| 152 | .pooling_tile(9, 8) |
| 153 | .channels(channels) |
| 154 | .input_offset(37) |
| 155 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 156 | } |
| 157 | } |
| 158 | } |
| 159 | |
| 160 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_unipass_fulltile) { |
| 161 | TEST_REQUIRES_X86_SSE; |
| 162 | for (size_t channels = 1; channels < 4; channels++) { |
| 163 | MaxPoolMicrokernelTester() |
| 164 | .pooling_elements(9) |
| 165 | .pooling_tile(9, 8) |
| 166 | .channels(channels) |
| 167 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 168 | } |
| 169 | } |
| 170 | |
| 171 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
| 172 | TEST_REQUIRES_X86_SSE; |
| 173 | for (size_t channels = 1; channels < 4; channels++) { |
| 174 | MaxPoolMicrokernelTester() |
| 175 | .pooling_elements(9) |
| 176 | .pooling_tile(9, 8) |
| 177 | .channels(channels) |
| 178 | .input_offset(5) |
| 179 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 180 | } |
| 181 | } |
| 182 | |
| 183 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
| 184 | TEST_REQUIRES_X86_SSE; |
| 185 | for (size_t channels = 1; channels < 4; channels++) { |
| 186 | MaxPoolMicrokernelTester() |
| 187 | .pooling_elements(9) |
| 188 | .pooling_tile(9, 8) |
| 189 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 190 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 191 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 192 | } |
| 193 | } |
| 194 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 195 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 196 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 197 | for (size_t channels = 1; channels < 4; channels++) { |
| 198 | MaxPoolMicrokernelTester() |
| 199 | .pooling_elements(9) |
| 200 | .pooling_tile(9, 8) |
| 201 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 202 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 203 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 204 | } |
| 205 | } |
| 206 | |
| 207 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_unipass_subtile) { |
| 208 | TEST_REQUIRES_X86_SSE; |
| 209 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 210 | for (size_t channels = 1; channels < 4; channels++) { |
| 211 | MaxPoolMicrokernelTester() |
| 212 | .pooling_elements(pooling_elements) |
| 213 | .pooling_tile(9, 8) |
| 214 | .channels(channels) |
| 215 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 216 | } |
| 217 | } |
| 218 | } |
| 219 | |
| 220 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
| 221 | TEST_REQUIRES_X86_SSE; |
| 222 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 223 | for (size_t channels = 1; channels < 4; channels++) { |
| 224 | MaxPoolMicrokernelTester() |
| 225 | .pooling_elements(pooling_elements) |
| 226 | .pooling_tile(9, 8) |
| 227 | .channels(channels) |
| 228 | .input_offset(5) |
| 229 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 230 | } |
| 231 | } |
| 232 | } |
| 233 | |
| 234 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_unipass_fulltile) { |
| 235 | TEST_REQUIRES_X86_SSE; |
| 236 | for (size_t channels = 5; channels < 8; channels++) { |
| 237 | MaxPoolMicrokernelTester() |
| 238 | .pooling_elements(9) |
| 239 | .pooling_tile(9, 8) |
| 240 | .channels(channels) |
| 241 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 242 | } |
| 243 | } |
| 244 | |
| 245 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
| 246 | TEST_REQUIRES_X86_SSE; |
| 247 | for (size_t channels = 5; channels < 8; channels++) { |
| 248 | MaxPoolMicrokernelTester() |
| 249 | .pooling_elements(9) |
| 250 | .pooling_tile(9, 8) |
| 251 | .channels(channels) |
| 252 | .input_offset(11) |
| 253 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 254 | } |
| 255 | } |
| 256 | |
| 257 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
| 258 | TEST_REQUIRES_X86_SSE; |
| 259 | for (size_t channels = 5; channels < 8; channels++) { |
| 260 | MaxPoolMicrokernelTester() |
| 261 | .pooling_elements(9) |
| 262 | .pooling_tile(9, 8) |
| 263 | .channels(channels) |
| 264 | .qmin(192) |
| 265 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 266 | } |
| 267 | } |
| 268 | |
| 269 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
| 270 | TEST_REQUIRES_X86_SSE; |
| 271 | for (size_t channels = 5; channels < 8; channels++) { |
| 272 | MaxPoolMicrokernelTester() |
| 273 | .pooling_elements(9) |
| 274 | .pooling_tile(9, 8) |
| 275 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 276 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 277 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 278 | } |
| 279 | } |
| 280 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 281 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_unipass_subtile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 282 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 283 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 284 | for (size_t channels = 5; channels < 8; channels++) { |
| 285 | MaxPoolMicrokernelTester() |
| 286 | .pooling_elements(pooling_elements) |
| 287 | .pooling_tile(9, 8) |
| 288 | .channels(channels) |
| 289 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 290 | } |
| 291 | } |
| 292 | } |
| 293 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 294 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 295 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 296 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 297 | for (size_t channels = 5; channels < 8; channels++) { |
| 298 | MaxPoolMicrokernelTester() |
| 299 | .pooling_elements(pooling_elements) |
| 300 | .pooling_tile(9, 8) |
| 301 | .channels(channels) |
| 302 | .input_offset(11) |
| 303 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 304 | } |
| 305 | } |
| 306 | } |
| 307 | |
| 308 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_twopass_fulltile) { |
| 309 | TEST_REQUIRES_X86_SSE; |
| 310 | MaxPoolMicrokernelTester() |
| 311 | .pooling_elements(17) |
| 312 | .pooling_tile(9, 8) |
| 313 | .channels(4) |
| 314 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 315 | } |
| 316 | |
| 317 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
| 318 | TEST_REQUIRES_X86_SSE; |
| 319 | MaxPoolMicrokernelTester() |
| 320 | .pooling_elements(17) |
| 321 | .pooling_tile(9, 8) |
| 322 | .channels(4) |
| 323 | .input_offset(7) |
| 324 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 325 | } |
| 326 | |
| 327 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
| 328 | TEST_REQUIRES_X86_SSE; |
| 329 | MaxPoolMicrokernelTester() |
| 330 | .pooling_elements(17) |
| 331 | .pooling_tile(9, 8) |
| 332 | .channels(4) |
| 333 | .qmin(192) |
| 334 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 335 | } |
| 336 | |
| 337 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
| 338 | TEST_REQUIRES_X86_SSE; |
| 339 | MaxPoolMicrokernelTester() |
| 340 | .pooling_elements(17) |
| 341 | .pooling_tile(9, 8) |
| 342 | .channels(4) |
| 343 | .qmax(192) |
| 344 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 345 | } |
| 346 | |
| 347 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_twopass_subtile) { |
| 348 | TEST_REQUIRES_X86_SSE; |
| 349 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 350 | MaxPoolMicrokernelTester() |
| 351 | .pooling_elements(pooling_elements) |
| 352 | .pooling_tile(9, 8) |
| 353 | .channels(4) |
| 354 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 355 | } |
| 356 | } |
| 357 | |
| 358 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
| 359 | TEST_REQUIRES_X86_SSE; |
| 360 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 361 | MaxPoolMicrokernelTester() |
| 362 | .pooling_elements(pooling_elements) |
| 363 | .pooling_tile(9, 8) |
| 364 | .channels(4) |
| 365 | .input_offset(7) |
| 366 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 367 | } |
| 368 | } |
| 369 | |
| 370 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_twopass_fulltile) { |
| 371 | TEST_REQUIRES_X86_SSE; |
| 372 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 373 | MaxPoolMicrokernelTester() |
| 374 | .pooling_elements(17) |
| 375 | .pooling_tile(9, 8) |
| 376 | .channels(channels) |
| 377 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 378 | } |
| 379 | } |
| 380 | |
| 381 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
| 382 | TEST_REQUIRES_X86_SSE; |
| 383 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 384 | MaxPoolMicrokernelTester() |
| 385 | .pooling_elements(17) |
| 386 | .pooling_tile(9, 8) |
| 387 | .channels(channels) |
| 388 | .input_offset(23) |
| 389 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 390 | } |
| 391 | } |
| 392 | |
| 393 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_qmin) { |
| 394 | TEST_REQUIRES_X86_SSE; |
| 395 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 396 | MaxPoolMicrokernelTester() |
| 397 | .pooling_elements(17) |
| 398 | .pooling_tile(9, 8) |
| 399 | .channels(channels) |
| 400 | .qmin(192) |
| 401 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 402 | } |
| 403 | } |
| 404 | |
| 405 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_twopass_fulltile_with_qmax) { |
| 406 | TEST_REQUIRES_X86_SSE; |
| 407 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 408 | MaxPoolMicrokernelTester() |
| 409 | .pooling_elements(17) |
| 410 | .pooling_tile(9, 8) |
| 411 | .channels(channels) |
| 412 | .qmax(192) |
| 413 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 414 | } |
| 415 | } |
| 416 | |
| 417 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_twopass_subtile) { |
| 418 | TEST_REQUIRES_X86_SSE; |
| 419 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 420 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 421 | MaxPoolMicrokernelTester() |
| 422 | .pooling_elements(17) |
| 423 | .pooling_tile(9, 8) |
| 424 | .channels(channels) |
| 425 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 426 | } |
| 427 | } |
| 428 | } |
| 429 | |
| 430 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_twopass_subtile_with_input_offset) { |
| 431 | TEST_REQUIRES_X86_SSE; |
| 432 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 433 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 434 | MaxPoolMicrokernelTester() |
| 435 | .pooling_elements(17) |
| 436 | .pooling_tile(9, 8) |
| 437 | .channels(channels) |
| 438 | .input_offset(37) |
| 439 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 440 | } |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_twopass_fulltile) { |
| 445 | TEST_REQUIRES_X86_SSE; |
| 446 | for (size_t channels = 1; channels < 4; channels++) { |
| 447 | MaxPoolMicrokernelTester() |
| 448 | .pooling_elements(17) |
| 449 | .pooling_tile(9, 8) |
| 450 | .channels(channels) |
| 451 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 452 | } |
| 453 | } |
| 454 | |
| 455 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
| 456 | TEST_REQUIRES_X86_SSE; |
| 457 | for (size_t channels = 1; channels < 4; channels++) { |
| 458 | MaxPoolMicrokernelTester() |
| 459 | .pooling_elements(17) |
| 460 | .pooling_tile(9, 8) |
| 461 | .channels(channels) |
| 462 | .input_offset(5) |
| 463 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 464 | } |
| 465 | } |
| 466 | |
| 467 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
| 468 | TEST_REQUIRES_X86_SSE; |
| 469 | for (size_t channels = 1; channels < 4; channels++) { |
| 470 | MaxPoolMicrokernelTester() |
| 471 | .pooling_elements(17) |
| 472 | .pooling_tile(9, 8) |
| 473 | .channels(channels) |
| 474 | .qmin(192) |
| 475 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 476 | } |
| 477 | } |
| 478 | |
| 479 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
| 480 | TEST_REQUIRES_X86_SSE; |
| 481 | for (size_t channels = 1; channels < 4; channels++) { |
| 482 | MaxPoolMicrokernelTester() |
| 483 | .pooling_elements(17) |
| 484 | .pooling_tile(9, 8) |
| 485 | .channels(channels) |
| 486 | .qmax(192) |
| 487 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 488 | } |
| 489 | } |
| 490 | |
| 491 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_twopass_subtile) { |
| 492 | TEST_REQUIRES_X86_SSE; |
| 493 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 494 | for (size_t channels = 1; channels < 4; channels++) { |
| 495 | MaxPoolMicrokernelTester() |
| 496 | .pooling_elements(17) |
| 497 | .pooling_tile(9, 8) |
| 498 | .channels(channels) |
| 499 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 500 | } |
| 501 | } |
| 502 | } |
| 503 | |
| 504 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
| 505 | TEST_REQUIRES_X86_SSE; |
| 506 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 507 | for (size_t channels = 1; channels < 4; channels++) { |
| 508 | MaxPoolMicrokernelTester() |
| 509 | .pooling_elements(17) |
| 510 | .pooling_tile(9, 8) |
| 511 | .channels(channels) |
| 512 | .input_offset(5) |
| 513 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 514 | } |
| 515 | } |
| 516 | } |
| 517 | |
| 518 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_twopass_fulltile) { |
| 519 | TEST_REQUIRES_X86_SSE; |
| 520 | for (size_t channels = 5; channels < 8; channels++) { |
| 521 | MaxPoolMicrokernelTester() |
| 522 | .pooling_elements(17) |
| 523 | .pooling_tile(9, 8) |
| 524 | .channels(channels) |
| 525 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 526 | } |
| 527 | } |
| 528 | |
| 529 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
| 530 | TEST_REQUIRES_X86_SSE; |
| 531 | for (size_t channels = 5; channels < 8; channels++) { |
| 532 | MaxPoolMicrokernelTester() |
| 533 | .pooling_elements(17) |
| 534 | .pooling_tile(9, 8) |
| 535 | .channels(channels) |
| 536 | .input_offset(11) |
| 537 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 538 | } |
| 539 | } |
| 540 | |
| 541 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
| 542 | TEST_REQUIRES_X86_SSE; |
| 543 | for (size_t channels = 5; channels < 8; channels++) { |
| 544 | MaxPoolMicrokernelTester() |
| 545 | .pooling_elements(17) |
| 546 | .pooling_tile(9, 8) |
| 547 | .channels(channels) |
| 548 | .qmin(192) |
| 549 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 550 | } |
| 551 | } |
| 552 | |
| 553 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
| 554 | TEST_REQUIRES_X86_SSE; |
| 555 | for (size_t channels = 5; channels < 8; channels++) { |
| 556 | MaxPoolMicrokernelTester() |
| 557 | .pooling_elements(17) |
| 558 | .pooling_tile(9, 8) |
| 559 | .channels(channels) |
| 560 | .qmax(192) |
| 561 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 562 | } |
| 563 | } |
| 564 | |
| 565 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_twopass_subtile) { |
| 566 | TEST_REQUIRES_X86_SSE; |
| 567 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 568 | for (size_t channels = 5; channels < 8; channels++) { |
| 569 | MaxPoolMicrokernelTester() |
| 570 | .pooling_elements(17) |
| 571 | .pooling_tile(9, 8) |
| 572 | .channels(channels) |
| 573 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 574 | } |
| 575 | } |
| 576 | } |
| 577 | |
| 578 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
| 579 | TEST_REQUIRES_X86_SSE; |
| 580 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 581 | for (size_t channels = 5; channels < 8; channels++) { |
| 582 | MaxPoolMicrokernelTester() |
| 583 | .pooling_elements(17) |
| 584 | .pooling_tile(9, 8) |
| 585 | .channels(channels) |
| 586 | .input_offset(11) |
| 587 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 588 | } |
| 589 | } |
| 590 | } |
| 591 | |
| 592 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_multipass) { |
| 593 | TEST_REQUIRES_X86_SSE; |
| 594 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 595 | MaxPoolMicrokernelTester() |
| 596 | .pooling_elements(17) |
| 597 | .pooling_tile(9, 8) |
| 598 | .channels(4) |
| 599 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 600 | } |
| 601 | } |
| 602 | |
| 603 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_multipass_with_input_offset) { |
| 604 | TEST_REQUIRES_X86_SSE; |
| 605 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 606 | MaxPoolMicrokernelTester() |
| 607 | .pooling_elements(17) |
| 608 | .pooling_tile(9, 8) |
| 609 | .channels(4) |
| 610 | .input_offset(7) |
| 611 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 612 | } |
| 613 | } |
| 614 | |
| 615 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_multipass_with_qmin) { |
| 616 | TEST_REQUIRES_X86_SSE; |
| 617 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 618 | MaxPoolMicrokernelTester() |
| 619 | .pooling_elements(17) |
| 620 | .pooling_tile(9, 8) |
| 621 | .channels(4) |
| 622 | .qmin(192) |
| 623 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 624 | } |
| 625 | } |
| 626 | |
| 627 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_eq_4_multipass_with_qmax) { |
| 628 | TEST_REQUIRES_X86_SSE; |
| 629 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 630 | MaxPoolMicrokernelTester() |
| 631 | .pooling_elements(17) |
| 632 | .pooling_tile(9, 8) |
| 633 | .channels(4) |
| 634 | .qmax(192) |
| 635 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 636 | } |
| 637 | } |
| 638 | |
| 639 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_multipass) { |
| 640 | TEST_REQUIRES_X86_SSE; |
| 641 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 642 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 643 | MaxPoolMicrokernelTester() |
| 644 | .pooling_elements(17) |
| 645 | .pooling_tile(9, 8) |
| 646 | .channels(channels) |
| 647 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 648 | } |
| 649 | } |
| 650 | } |
| 651 | |
| 652 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_multipass_with_input_offset) { |
| 653 | TEST_REQUIRES_X86_SSE; |
| 654 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 655 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 656 | MaxPoolMicrokernelTester() |
| 657 | .pooling_elements(17) |
| 658 | .pooling_tile(9, 8) |
| 659 | .channels(channels) |
| 660 | .input_offset(37) |
| 661 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 662 | } |
| 663 | } |
| 664 | } |
| 665 | |
| 666 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_multipass_with_qmin) { |
| 667 | TEST_REQUIRES_X86_SSE; |
| 668 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 669 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 670 | MaxPoolMicrokernelTester() |
| 671 | .pooling_elements(17) |
| 672 | .pooling_tile(9, 8) |
| 673 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 674 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 675 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 676 | } |
| 677 | } |
| 678 | } |
| 679 | |
| 680 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_div_4_multipass_with_qmax) { |
| 681 | TEST_REQUIRES_X86_SSE; |
| 682 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 683 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 684 | MaxPoolMicrokernelTester() |
| 685 | .pooling_elements(17) |
| 686 | .pooling_tile(9, 8) |
| 687 | .channels(channels) |
| 688 | .qmax(192) |
| 689 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 690 | } |
| 691 | } |
| 692 | } |
| 693 | |
| 694 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_multipass) { |
| 695 | TEST_REQUIRES_X86_SSE; |
| 696 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 697 | for (size_t channels = 1; channels < 4; channels++) { |
| 698 | MaxPoolMicrokernelTester() |
| 699 | .pooling_elements(17) |
| 700 | .pooling_tile(9, 8) |
| 701 | .channels(channels) |
| 702 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 703 | } |
| 704 | } |
| 705 | } |
| 706 | |
| 707 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_multipass_with_input_offset) { |
| 708 | TEST_REQUIRES_X86_SSE; |
| 709 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 710 | for (size_t channels = 1; channels < 4; channels++) { |
| 711 | MaxPoolMicrokernelTester() |
| 712 | .pooling_elements(17) |
| 713 | .pooling_tile(9, 8) |
| 714 | .channels(channels) |
| 715 | .input_offset(4) |
| 716 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 717 | } |
| 718 | } |
| 719 | } |
| 720 | |
| 721 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_multipass_with_qmin) { |
| 722 | TEST_REQUIRES_X86_SSE; |
| 723 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 724 | for (size_t channels = 1; channels < 4; channels++) { |
| 725 | MaxPoolMicrokernelTester() |
| 726 | .pooling_elements(17) |
| 727 | .pooling_tile(9, 8) |
| 728 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 729 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 730 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 731 | } |
| 732 | } |
| 733 | } |
| 734 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 735 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_lt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 736 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 737 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 738 | for (size_t channels = 1; channels < 4; channels++) { |
| 739 | MaxPoolMicrokernelTester() |
| 740 | .pooling_elements(17) |
| 741 | .pooling_tile(9, 8) |
| 742 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 743 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 744 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 745 | } |
| 746 | } |
| 747 | } |
| 748 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 749 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_multipass) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 750 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 751 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 752 | for (size_t channels = 5; channels < 8; channels++) { |
| 753 | MaxPoolMicrokernelTester() |
| 754 | .pooling_elements(17) |
| 755 | .pooling_tile(9, 8) |
| 756 | .channels(channels) |
| 757 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 758 | } |
| 759 | } |
| 760 | } |
| 761 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 762 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_multipass_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 763 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 764 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 765 | for (size_t channels = 5; channels < 8; channels++) { |
| 766 | MaxPoolMicrokernelTester() |
| 767 | .pooling_elements(17) |
| 768 | .pooling_tile(9, 8) |
| 769 | .channels(channels) |
| 770 | .input_offset(11) |
| 771 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 772 | } |
| 773 | } |
| 774 | } |
| 775 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 776 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_multipass_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 777 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 778 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 779 | for (size_t channels = 5; channels < 8; channels++) { |
| 780 | MaxPoolMicrokernelTester() |
| 781 | .pooling_elements(17) |
| 782 | .pooling_tile(9, 8) |
| 783 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 784 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 785 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 786 | } |
| 787 | } |
| 788 | } |
| 789 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 790 | TEST(F32_MAXPOOL_9P8X__SSE_C4, channels_gt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 791 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 792 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 793 | for (size_t channels = 5; channels < 8; channels++) { |
| 794 | MaxPoolMicrokernelTester() |
| 795 | .pooling_elements(17) |
| 796 | .pooling_tile(9, 8) |
| 797 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 798 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 799 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 800 | } |
| 801 | } |
| 802 | } |
| 803 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 804 | TEST(F32_MAXPOOL_9P8X__SSE_C4, few_output_pixels) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 805 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 806 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 807 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 808 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 809 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 810 | .output_pixels(output_pixels) |
| 811 | .pooling_elements(pooling_elements) |
| 812 | .pooling_tile(9, 8) |
| 813 | .channels(channels) |
| 814 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 815 | } |
| 816 | } |
| 817 | } |
| 818 | } |
| 819 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 820 | TEST(F32_MAXPOOL_9P8X__SSE_C4, few_output_pixels_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 821 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 822 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 823 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 824 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 825 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 826 | .output_pixels(output_pixels) |
| 827 | .pooling_elements(pooling_elements) |
| 828 | .pooling_tile(9, 8) |
| 829 | .channels(channels) |
| 830 | .input_offset(23) |
| 831 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 832 | } |
| 833 | } |
| 834 | } |
| 835 | } |
| 836 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 837 | TEST(F32_MAXPOOL_9P8X__SSE_C4, few_output_pixels_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 838 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 839 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 840 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 841 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 842 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 843 | .output_pixels(output_pixels) |
| 844 | .pooling_elements(pooling_elements) |
| 845 | .pooling_tile(9, 8) |
| 846 | .channels(channels) |
| 847 | .qmin(192) |
| 848 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 849 | } |
| 850 | } |
| 851 | } |
| 852 | } |
| 853 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 854 | TEST(F32_MAXPOOL_9P8X__SSE_C4, few_output_pixels_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 855 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 856 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 857 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 858 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 859 | MaxPoolMicrokernelTester() |
| 860 | .output_pixels(output_pixels) |
| 861 | .pooling_elements(pooling_elements) |
| 862 | .pooling_tile(9, 8) |
| 863 | .channels(channels) |
| 864 | .qmax(192) |
| 865 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 866 | } |
| 867 | } |
| 868 | } |
| 869 | } |
| 870 | |
| 871 | TEST(F32_MAXPOOL_9P8X__SSE_C4, few_output_pixels_with_output_stride) { |
| 872 | TEST_REQUIRES_X86_SSE; |
| 873 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 874 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 875 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 876 | MaxPoolMicrokernelTester() |
| 877 | .output_pixels(output_pixels) |
| 878 | .pooling_elements(pooling_elements) |
| 879 | .pooling_tile(9, 8) |
| 880 | .channels(channels) |
| 881 | .output_stride(23) |
| 882 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
| 883 | } |
| 884 | } |
| 885 | } |
| 886 | } |
| 887 | |
| 888 | TEST(F32_MAXPOOL_9P8X__SSE_C4, few_output_pixels_with_step) { |
| 889 | TEST_REQUIRES_X86_SSE; |
| 890 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 891 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 892 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 893 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 894 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 895 | .output_pixels(output_pixels) |
| 896 | .pooling_elements(pooling_elements) |
| 897 | .pooling_tile(9, 8) |
| 898 | .step(step) |
| 899 | .channels(channels) |
| 900 | .output_stride(23) |
| 901 | .Test(xnn_f32_maxpool_ukernel_9p8x__sse_c4); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 902 | } |
| 903 | } |
| 904 | } |
| 905 | } |
| 906 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 907 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 908 | |
| 909 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 910 | #if !XNN_ARCH_ASMJS && !XNN_ARCH_WASM |
| 911 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_unipass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 912 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 913 | MaxPoolMicrokernelTester() |
| 914 | .pooling_elements(9) |
| 915 | .pooling_tile(9, 8) |
| 916 | .channels(4) |
| 917 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 918 | } |
| 919 | |
| 920 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_unipass_fulltile_with_input_offset) { |
| 921 | TEST_REQUIRES_PSIMD; |
| 922 | MaxPoolMicrokernelTester() |
| 923 | .pooling_elements(9) |
| 924 | .pooling_tile(9, 8) |
| 925 | .channels(4) |
| 926 | .input_offset(7) |
| 927 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 928 | } |
| 929 | |
| 930 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_unipass_fulltile_with_qmin) { |
| 931 | TEST_REQUIRES_PSIMD; |
| 932 | MaxPoolMicrokernelTester() |
| 933 | .pooling_elements(9) |
| 934 | .pooling_tile(9, 8) |
| 935 | .channels(4) |
| 936 | .qmin(192) |
| 937 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 938 | } |
| 939 | |
| 940 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_unipass_fulltile_with_qmax) { |
| 941 | TEST_REQUIRES_PSIMD; |
| 942 | MaxPoolMicrokernelTester() |
| 943 | .pooling_elements(9) |
| 944 | .pooling_tile(9, 8) |
| 945 | .channels(4) |
| 946 | .qmax(192) |
| 947 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 948 | } |
| 949 | |
| 950 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_unipass_subtile) { |
| 951 | TEST_REQUIRES_PSIMD; |
| 952 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 953 | MaxPoolMicrokernelTester() |
| 954 | .pooling_elements(pooling_elements) |
| 955 | .pooling_tile(9, 8) |
| 956 | .channels(4) |
| 957 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 958 | } |
| 959 | } |
| 960 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 961 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_unipass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 962 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 963 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 964 | MaxPoolMicrokernelTester() |
| 965 | .pooling_elements(pooling_elements) |
| 966 | .pooling_tile(9, 8) |
| 967 | .channels(4) |
| 968 | .input_offset(7) |
| 969 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 970 | } |
| 971 | } |
| 972 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 973 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_unipass_fulltile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 974 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 975 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 976 | MaxPoolMicrokernelTester() |
| 977 | .pooling_elements(9) |
| 978 | .pooling_tile(9, 8) |
| 979 | .channels(channels) |
| 980 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 981 | } |
| 982 | } |
| 983 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 984 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_unipass_fulltile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 985 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 986 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 987 | MaxPoolMicrokernelTester() |
| 988 | .pooling_elements(9) |
| 989 | .pooling_tile(9, 8) |
| 990 | .channels(channels) |
| 991 | .input_offset(37) |
| 992 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 993 | } |
| 994 | } |
| 995 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 996 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_unipass_fulltile_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 997 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 998 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 999 | MaxPoolMicrokernelTester() |
| 1000 | .pooling_elements(9) |
| 1001 | .pooling_tile(9, 8) |
| 1002 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1003 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1004 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1005 | } |
| 1006 | } |
| 1007 | |
| 1008 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_unipass_fulltile_with_qmax) { |
| 1009 | TEST_REQUIRES_PSIMD; |
| 1010 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1011 | MaxPoolMicrokernelTester() |
| 1012 | .pooling_elements(9) |
| 1013 | .pooling_tile(9, 8) |
| 1014 | .channels(channels) |
| 1015 | .qmax(192) |
| 1016 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1017 | } |
| 1018 | } |
| 1019 | |
| 1020 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_unipass_subtile) { |
| 1021 | TEST_REQUIRES_PSIMD; |
| 1022 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1023 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1024 | MaxPoolMicrokernelTester() |
| 1025 | .pooling_elements(pooling_elements) |
| 1026 | .pooling_tile(9, 8) |
| 1027 | .channels(channels) |
| 1028 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1029 | } |
| 1030 | } |
| 1031 | } |
| 1032 | |
| 1033 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_unipass_subtile_with_input_offset) { |
| 1034 | TEST_REQUIRES_PSIMD; |
| 1035 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1036 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1037 | MaxPoolMicrokernelTester() |
| 1038 | .pooling_elements(pooling_elements) |
| 1039 | .pooling_tile(9, 8) |
| 1040 | .channels(channels) |
| 1041 | .input_offset(37) |
| 1042 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1043 | } |
| 1044 | } |
| 1045 | } |
| 1046 | |
| 1047 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_unipass_fulltile) { |
| 1048 | TEST_REQUIRES_PSIMD; |
| 1049 | for (size_t channels = 1; channels < 4; channels++) { |
| 1050 | MaxPoolMicrokernelTester() |
| 1051 | .pooling_elements(9) |
| 1052 | .pooling_tile(9, 8) |
| 1053 | .channels(channels) |
| 1054 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1055 | } |
| 1056 | } |
| 1057 | |
| 1058 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_unipass_fulltile_with_input_offset) { |
| 1059 | TEST_REQUIRES_PSIMD; |
| 1060 | for (size_t channels = 1; channels < 4; channels++) { |
| 1061 | MaxPoolMicrokernelTester() |
| 1062 | .pooling_elements(9) |
| 1063 | .pooling_tile(9, 8) |
| 1064 | .channels(channels) |
| 1065 | .input_offset(5) |
| 1066 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1067 | } |
| 1068 | } |
| 1069 | |
| 1070 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_unipass_fulltile_with_qmin) { |
| 1071 | TEST_REQUIRES_PSIMD; |
| 1072 | for (size_t channels = 1; channels < 4; channels++) { |
| 1073 | MaxPoolMicrokernelTester() |
| 1074 | .pooling_elements(9) |
| 1075 | .pooling_tile(9, 8) |
| 1076 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1077 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1078 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1079 | } |
| 1080 | } |
| 1081 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1082 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_unipass_fulltile_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1083 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1084 | for (size_t channels = 1; channels < 4; channels++) { |
| 1085 | MaxPoolMicrokernelTester() |
| 1086 | .pooling_elements(9) |
| 1087 | .pooling_tile(9, 8) |
| 1088 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1089 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1090 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1091 | } |
| 1092 | } |
| 1093 | |
| 1094 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_unipass_subtile) { |
| 1095 | TEST_REQUIRES_PSIMD; |
| 1096 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1097 | for (size_t channels = 1; channels < 4; channels++) { |
| 1098 | MaxPoolMicrokernelTester() |
| 1099 | .pooling_elements(pooling_elements) |
| 1100 | .pooling_tile(9, 8) |
| 1101 | .channels(channels) |
| 1102 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1103 | } |
| 1104 | } |
| 1105 | } |
| 1106 | |
| 1107 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_unipass_subtile_with_input_offset) { |
| 1108 | TEST_REQUIRES_PSIMD; |
| 1109 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1110 | for (size_t channels = 1; channels < 4; channels++) { |
| 1111 | MaxPoolMicrokernelTester() |
| 1112 | .pooling_elements(pooling_elements) |
| 1113 | .pooling_tile(9, 8) |
| 1114 | .channels(channels) |
| 1115 | .input_offset(5) |
| 1116 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1117 | } |
| 1118 | } |
| 1119 | } |
| 1120 | |
| 1121 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_unipass_fulltile) { |
| 1122 | TEST_REQUIRES_PSIMD; |
| 1123 | for (size_t channels = 5; channels < 8; channels++) { |
| 1124 | MaxPoolMicrokernelTester() |
| 1125 | .pooling_elements(9) |
| 1126 | .pooling_tile(9, 8) |
| 1127 | .channels(channels) |
| 1128 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1129 | } |
| 1130 | } |
| 1131 | |
| 1132 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_unipass_fulltile_with_input_offset) { |
| 1133 | TEST_REQUIRES_PSIMD; |
| 1134 | for (size_t channels = 5; channels < 8; channels++) { |
| 1135 | MaxPoolMicrokernelTester() |
| 1136 | .pooling_elements(9) |
| 1137 | .pooling_tile(9, 8) |
| 1138 | .channels(channels) |
| 1139 | .input_offset(11) |
| 1140 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1141 | } |
| 1142 | } |
| 1143 | |
| 1144 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_unipass_fulltile_with_qmin) { |
| 1145 | TEST_REQUIRES_PSIMD; |
| 1146 | for (size_t channels = 5; channels < 8; channels++) { |
| 1147 | MaxPoolMicrokernelTester() |
| 1148 | .pooling_elements(9) |
| 1149 | .pooling_tile(9, 8) |
| 1150 | .channels(channels) |
| 1151 | .qmin(192) |
| 1152 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1153 | } |
| 1154 | } |
| 1155 | |
| 1156 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_unipass_fulltile_with_qmax) { |
| 1157 | TEST_REQUIRES_PSIMD; |
| 1158 | for (size_t channels = 5; channels < 8; channels++) { |
| 1159 | MaxPoolMicrokernelTester() |
| 1160 | .pooling_elements(9) |
| 1161 | .pooling_tile(9, 8) |
| 1162 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1163 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1164 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1165 | } |
| 1166 | } |
| 1167 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1168 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_unipass_subtile) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1169 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1170 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1171 | for (size_t channels = 5; channels < 8; channels++) { |
| 1172 | MaxPoolMicrokernelTester() |
| 1173 | .pooling_elements(pooling_elements) |
| 1174 | .pooling_tile(9, 8) |
| 1175 | .channels(channels) |
| 1176 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1177 | } |
| 1178 | } |
| 1179 | } |
| 1180 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1181 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_unipass_subtile_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1182 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1183 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1184 | for (size_t channels = 5; channels < 8; channels++) { |
| 1185 | MaxPoolMicrokernelTester() |
| 1186 | .pooling_elements(pooling_elements) |
| 1187 | .pooling_tile(9, 8) |
| 1188 | .channels(channels) |
| 1189 | .input_offset(11) |
| 1190 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1191 | } |
| 1192 | } |
| 1193 | } |
| 1194 | |
| 1195 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_twopass_fulltile) { |
| 1196 | TEST_REQUIRES_PSIMD; |
| 1197 | MaxPoolMicrokernelTester() |
| 1198 | .pooling_elements(17) |
| 1199 | .pooling_tile(9, 8) |
| 1200 | .channels(4) |
| 1201 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1202 | } |
| 1203 | |
| 1204 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_twopass_fulltile_with_input_offset) { |
| 1205 | TEST_REQUIRES_PSIMD; |
| 1206 | MaxPoolMicrokernelTester() |
| 1207 | .pooling_elements(17) |
| 1208 | .pooling_tile(9, 8) |
| 1209 | .channels(4) |
| 1210 | .input_offset(7) |
| 1211 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1212 | } |
| 1213 | |
| 1214 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_twopass_fulltile_with_qmin) { |
| 1215 | TEST_REQUIRES_PSIMD; |
| 1216 | MaxPoolMicrokernelTester() |
| 1217 | .pooling_elements(17) |
| 1218 | .pooling_tile(9, 8) |
| 1219 | .channels(4) |
| 1220 | .qmin(192) |
| 1221 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1222 | } |
| 1223 | |
| 1224 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_twopass_fulltile_with_qmax) { |
| 1225 | TEST_REQUIRES_PSIMD; |
| 1226 | MaxPoolMicrokernelTester() |
| 1227 | .pooling_elements(17) |
| 1228 | .pooling_tile(9, 8) |
| 1229 | .channels(4) |
| 1230 | .qmax(192) |
| 1231 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1232 | } |
| 1233 | |
| 1234 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_twopass_subtile) { |
| 1235 | TEST_REQUIRES_PSIMD; |
| 1236 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1237 | MaxPoolMicrokernelTester() |
| 1238 | .pooling_elements(pooling_elements) |
| 1239 | .pooling_tile(9, 8) |
| 1240 | .channels(4) |
| 1241 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1242 | } |
| 1243 | } |
| 1244 | |
| 1245 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_twopass_subtile_with_input_offset) { |
| 1246 | TEST_REQUIRES_PSIMD; |
| 1247 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1248 | MaxPoolMicrokernelTester() |
| 1249 | .pooling_elements(pooling_elements) |
| 1250 | .pooling_tile(9, 8) |
| 1251 | .channels(4) |
| 1252 | .input_offset(7) |
| 1253 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1254 | } |
| 1255 | } |
| 1256 | |
| 1257 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_twopass_fulltile) { |
| 1258 | TEST_REQUIRES_PSIMD; |
| 1259 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1260 | MaxPoolMicrokernelTester() |
| 1261 | .pooling_elements(17) |
| 1262 | .pooling_tile(9, 8) |
| 1263 | .channels(channels) |
| 1264 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1265 | } |
| 1266 | } |
| 1267 | |
| 1268 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_twopass_fulltile_with_input_offset) { |
| 1269 | TEST_REQUIRES_PSIMD; |
| 1270 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1271 | MaxPoolMicrokernelTester() |
| 1272 | .pooling_elements(17) |
| 1273 | .pooling_tile(9, 8) |
| 1274 | .channels(channels) |
| 1275 | .input_offset(23) |
| 1276 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1277 | } |
| 1278 | } |
| 1279 | |
| 1280 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_twopass_fulltile_with_qmin) { |
| 1281 | TEST_REQUIRES_PSIMD; |
| 1282 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1283 | MaxPoolMicrokernelTester() |
| 1284 | .pooling_elements(17) |
| 1285 | .pooling_tile(9, 8) |
| 1286 | .channels(channels) |
| 1287 | .qmin(192) |
| 1288 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1289 | } |
| 1290 | } |
| 1291 | |
| 1292 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_twopass_fulltile_with_qmax) { |
| 1293 | TEST_REQUIRES_PSIMD; |
| 1294 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1295 | MaxPoolMicrokernelTester() |
| 1296 | .pooling_elements(17) |
| 1297 | .pooling_tile(9, 8) |
| 1298 | .channels(channels) |
| 1299 | .qmax(192) |
| 1300 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1301 | } |
| 1302 | } |
| 1303 | |
| 1304 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_twopass_subtile) { |
| 1305 | TEST_REQUIRES_PSIMD; |
| 1306 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1307 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1308 | MaxPoolMicrokernelTester() |
| 1309 | .pooling_elements(17) |
| 1310 | .pooling_tile(9, 8) |
| 1311 | .channels(channels) |
| 1312 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1313 | } |
| 1314 | } |
| 1315 | } |
| 1316 | |
| 1317 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_twopass_subtile_with_input_offset) { |
| 1318 | TEST_REQUIRES_PSIMD; |
| 1319 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1320 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1321 | MaxPoolMicrokernelTester() |
| 1322 | .pooling_elements(17) |
| 1323 | .pooling_tile(9, 8) |
| 1324 | .channels(channels) |
| 1325 | .input_offset(37) |
| 1326 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1327 | } |
| 1328 | } |
| 1329 | } |
| 1330 | |
| 1331 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_twopass_fulltile) { |
| 1332 | TEST_REQUIRES_PSIMD; |
| 1333 | for (size_t channels = 1; channels < 4; channels++) { |
| 1334 | MaxPoolMicrokernelTester() |
| 1335 | .pooling_elements(17) |
| 1336 | .pooling_tile(9, 8) |
| 1337 | .channels(channels) |
| 1338 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1339 | } |
| 1340 | } |
| 1341 | |
| 1342 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_twopass_fulltile_with_input_offset) { |
| 1343 | TEST_REQUIRES_PSIMD; |
| 1344 | for (size_t channels = 1; channels < 4; channels++) { |
| 1345 | MaxPoolMicrokernelTester() |
| 1346 | .pooling_elements(17) |
| 1347 | .pooling_tile(9, 8) |
| 1348 | .channels(channels) |
| 1349 | .input_offset(5) |
| 1350 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1351 | } |
| 1352 | } |
| 1353 | |
| 1354 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_twopass_fulltile_with_qmin) { |
| 1355 | TEST_REQUIRES_PSIMD; |
| 1356 | for (size_t channels = 1; channels < 4; channels++) { |
| 1357 | MaxPoolMicrokernelTester() |
| 1358 | .pooling_elements(17) |
| 1359 | .pooling_tile(9, 8) |
| 1360 | .channels(channels) |
| 1361 | .qmin(192) |
| 1362 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1363 | } |
| 1364 | } |
| 1365 | |
| 1366 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_twopass_fulltile_with_qmax) { |
| 1367 | TEST_REQUIRES_PSIMD; |
| 1368 | for (size_t channels = 1; channels < 4; channels++) { |
| 1369 | MaxPoolMicrokernelTester() |
| 1370 | .pooling_elements(17) |
| 1371 | .pooling_tile(9, 8) |
| 1372 | .channels(channels) |
| 1373 | .qmax(192) |
| 1374 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1375 | } |
| 1376 | } |
| 1377 | |
| 1378 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_twopass_subtile) { |
| 1379 | TEST_REQUIRES_PSIMD; |
| 1380 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1381 | for (size_t channels = 1; channels < 4; channels++) { |
| 1382 | MaxPoolMicrokernelTester() |
| 1383 | .pooling_elements(17) |
| 1384 | .pooling_tile(9, 8) |
| 1385 | .channels(channels) |
| 1386 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1387 | } |
| 1388 | } |
| 1389 | } |
| 1390 | |
| 1391 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_twopass_subtile_with_input_offset) { |
| 1392 | TEST_REQUIRES_PSIMD; |
| 1393 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1394 | for (size_t channels = 1; channels < 4; channels++) { |
| 1395 | MaxPoolMicrokernelTester() |
| 1396 | .pooling_elements(17) |
| 1397 | .pooling_tile(9, 8) |
| 1398 | .channels(channels) |
| 1399 | .input_offset(5) |
| 1400 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1401 | } |
| 1402 | } |
| 1403 | } |
| 1404 | |
| 1405 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_twopass_fulltile) { |
| 1406 | TEST_REQUIRES_PSIMD; |
| 1407 | for (size_t channels = 5; channels < 8; channels++) { |
| 1408 | MaxPoolMicrokernelTester() |
| 1409 | .pooling_elements(17) |
| 1410 | .pooling_tile(9, 8) |
| 1411 | .channels(channels) |
| 1412 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1413 | } |
| 1414 | } |
| 1415 | |
| 1416 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_twopass_fulltile_with_input_offset) { |
| 1417 | TEST_REQUIRES_PSIMD; |
| 1418 | for (size_t channels = 5; channels < 8; channels++) { |
| 1419 | MaxPoolMicrokernelTester() |
| 1420 | .pooling_elements(17) |
| 1421 | .pooling_tile(9, 8) |
| 1422 | .channels(channels) |
| 1423 | .input_offset(11) |
| 1424 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1425 | } |
| 1426 | } |
| 1427 | |
| 1428 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_twopass_fulltile_with_qmin) { |
| 1429 | TEST_REQUIRES_PSIMD; |
| 1430 | for (size_t channels = 5; channels < 8; channels++) { |
| 1431 | MaxPoolMicrokernelTester() |
| 1432 | .pooling_elements(17) |
| 1433 | .pooling_tile(9, 8) |
| 1434 | .channels(channels) |
| 1435 | .qmin(192) |
| 1436 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1437 | } |
| 1438 | } |
| 1439 | |
| 1440 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_twopass_fulltile_with_qmax) { |
| 1441 | TEST_REQUIRES_PSIMD; |
| 1442 | for (size_t channels = 5; channels < 8; channels++) { |
| 1443 | MaxPoolMicrokernelTester() |
| 1444 | .pooling_elements(17) |
| 1445 | .pooling_tile(9, 8) |
| 1446 | .channels(channels) |
| 1447 | .qmax(192) |
| 1448 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1449 | } |
| 1450 | } |
| 1451 | |
| 1452 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_twopass_subtile) { |
| 1453 | TEST_REQUIRES_PSIMD; |
| 1454 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1455 | for (size_t channels = 5; channels < 8; channels++) { |
| 1456 | MaxPoolMicrokernelTester() |
| 1457 | .pooling_elements(17) |
| 1458 | .pooling_tile(9, 8) |
| 1459 | .channels(channels) |
| 1460 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1461 | } |
| 1462 | } |
| 1463 | } |
| 1464 | |
| 1465 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_twopass_subtile_with_input_offset) { |
| 1466 | TEST_REQUIRES_PSIMD; |
| 1467 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1468 | for (size_t channels = 5; channels < 8; channels++) { |
| 1469 | MaxPoolMicrokernelTester() |
| 1470 | .pooling_elements(17) |
| 1471 | .pooling_tile(9, 8) |
| 1472 | .channels(channels) |
| 1473 | .input_offset(11) |
| 1474 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1475 | } |
| 1476 | } |
| 1477 | } |
| 1478 | |
| 1479 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_multipass) { |
| 1480 | TEST_REQUIRES_PSIMD; |
| 1481 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1482 | MaxPoolMicrokernelTester() |
| 1483 | .pooling_elements(17) |
| 1484 | .pooling_tile(9, 8) |
| 1485 | .channels(4) |
| 1486 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1487 | } |
| 1488 | } |
| 1489 | |
| 1490 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_multipass_with_input_offset) { |
| 1491 | TEST_REQUIRES_PSIMD; |
| 1492 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1493 | MaxPoolMicrokernelTester() |
| 1494 | .pooling_elements(17) |
| 1495 | .pooling_tile(9, 8) |
| 1496 | .channels(4) |
| 1497 | .input_offset(7) |
| 1498 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1499 | } |
| 1500 | } |
| 1501 | |
| 1502 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_multipass_with_qmin) { |
| 1503 | TEST_REQUIRES_PSIMD; |
| 1504 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1505 | MaxPoolMicrokernelTester() |
| 1506 | .pooling_elements(17) |
| 1507 | .pooling_tile(9, 8) |
| 1508 | .channels(4) |
| 1509 | .qmin(192) |
| 1510 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1511 | } |
| 1512 | } |
| 1513 | |
| 1514 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_eq_4_multipass_with_qmax) { |
| 1515 | TEST_REQUIRES_PSIMD; |
| 1516 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1517 | MaxPoolMicrokernelTester() |
| 1518 | .pooling_elements(17) |
| 1519 | .pooling_tile(9, 8) |
| 1520 | .channels(4) |
| 1521 | .qmax(192) |
| 1522 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1523 | } |
| 1524 | } |
| 1525 | |
| 1526 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_multipass) { |
| 1527 | TEST_REQUIRES_PSIMD; |
| 1528 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1529 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1530 | MaxPoolMicrokernelTester() |
| 1531 | .pooling_elements(17) |
| 1532 | .pooling_tile(9, 8) |
| 1533 | .channels(channels) |
| 1534 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1535 | } |
| 1536 | } |
| 1537 | } |
| 1538 | |
| 1539 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_multipass_with_input_offset) { |
| 1540 | TEST_REQUIRES_PSIMD; |
| 1541 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1542 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1543 | MaxPoolMicrokernelTester() |
| 1544 | .pooling_elements(17) |
| 1545 | .pooling_tile(9, 8) |
| 1546 | .channels(channels) |
| 1547 | .input_offset(37) |
| 1548 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1549 | } |
| 1550 | } |
| 1551 | } |
| 1552 | |
| 1553 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_multipass_with_qmin) { |
| 1554 | TEST_REQUIRES_PSIMD; |
| 1555 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1556 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1557 | MaxPoolMicrokernelTester() |
| 1558 | .pooling_elements(17) |
| 1559 | .pooling_tile(9, 8) |
| 1560 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1561 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1562 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1563 | } |
| 1564 | } |
| 1565 | } |
| 1566 | |
| 1567 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_div_4_multipass_with_qmax) { |
| 1568 | TEST_REQUIRES_PSIMD; |
| 1569 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1570 | for (size_t channels = 8; channels < 32; channels += 4) { |
| 1571 | MaxPoolMicrokernelTester() |
| 1572 | .pooling_elements(17) |
| 1573 | .pooling_tile(9, 8) |
| 1574 | .channels(channels) |
| 1575 | .qmax(192) |
| 1576 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1577 | } |
| 1578 | } |
| 1579 | } |
| 1580 | |
| 1581 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_multipass) { |
| 1582 | TEST_REQUIRES_PSIMD; |
| 1583 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1584 | for (size_t channels = 1; channels < 4; channels++) { |
| 1585 | MaxPoolMicrokernelTester() |
| 1586 | .pooling_elements(17) |
| 1587 | .pooling_tile(9, 8) |
| 1588 | .channels(channels) |
| 1589 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1590 | } |
| 1591 | } |
| 1592 | } |
| 1593 | |
| 1594 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_multipass_with_input_offset) { |
| 1595 | TEST_REQUIRES_PSIMD; |
| 1596 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1597 | for (size_t channels = 1; channels < 4; channels++) { |
| 1598 | MaxPoolMicrokernelTester() |
| 1599 | .pooling_elements(17) |
| 1600 | .pooling_tile(9, 8) |
| 1601 | .channels(channels) |
| 1602 | .input_offset(4) |
| 1603 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1604 | } |
| 1605 | } |
| 1606 | } |
| 1607 | |
| 1608 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_multipass_with_qmin) { |
| 1609 | TEST_REQUIRES_PSIMD; |
| 1610 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1611 | for (size_t channels = 1; channels < 4; channels++) { |
| 1612 | MaxPoolMicrokernelTester() |
| 1613 | .pooling_elements(17) |
| 1614 | .pooling_tile(9, 8) |
| 1615 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1616 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1617 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1618 | } |
| 1619 | } |
| 1620 | } |
| 1621 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1622 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_lt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1623 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1624 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1625 | for (size_t channels = 1; channels < 4; channels++) { |
| 1626 | MaxPoolMicrokernelTester() |
| 1627 | .pooling_elements(17) |
| 1628 | .pooling_tile(9, 8) |
| 1629 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1630 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1631 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1632 | } |
| 1633 | } |
| 1634 | } |
| 1635 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1636 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_multipass) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1637 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1638 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1639 | for (size_t channels = 5; channels < 8; channels++) { |
| 1640 | MaxPoolMicrokernelTester() |
| 1641 | .pooling_elements(17) |
| 1642 | .pooling_tile(9, 8) |
| 1643 | .channels(channels) |
| 1644 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1645 | } |
| 1646 | } |
| 1647 | } |
| 1648 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1649 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_multipass_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1650 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1651 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1652 | for (size_t channels = 5; channels < 8; channels++) { |
| 1653 | MaxPoolMicrokernelTester() |
| 1654 | .pooling_elements(17) |
| 1655 | .pooling_tile(9, 8) |
| 1656 | .channels(channels) |
| 1657 | .input_offset(11) |
| 1658 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1659 | } |
| 1660 | } |
| 1661 | } |
| 1662 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1663 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_multipass_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1664 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1665 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1666 | for (size_t channels = 5; channels < 8; channels++) { |
| 1667 | MaxPoolMicrokernelTester() |
| 1668 | .pooling_elements(17) |
| 1669 | .pooling_tile(9, 8) |
| 1670 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1671 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1672 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1673 | } |
| 1674 | } |
| 1675 | } |
| 1676 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1677 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, channels_gt_4_multipass_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1678 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1679 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 1680 | for (size_t channels = 5; channels < 8; channels++) { |
| 1681 | MaxPoolMicrokernelTester() |
| 1682 | .pooling_elements(17) |
| 1683 | .pooling_tile(9, 8) |
| 1684 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1685 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1686 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1687 | } |
| 1688 | } |
| 1689 | } |
| 1690 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1691 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, few_output_pixels) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1692 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1693 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1694 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1695 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1696 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1697 | .output_pixels(output_pixels) |
| 1698 | .pooling_elements(pooling_elements) |
| 1699 | .pooling_tile(9, 8) |
| 1700 | .channels(channels) |
| 1701 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1702 | } |
| 1703 | } |
| 1704 | } |
| 1705 | } |
| 1706 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1707 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, few_output_pixels_with_input_offset) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1708 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1709 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1710 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1711 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1712 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1713 | .output_pixels(output_pixels) |
| 1714 | .pooling_elements(pooling_elements) |
| 1715 | .pooling_tile(9, 8) |
| 1716 | .channels(channels) |
| 1717 | .input_offset(23) |
| 1718 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1719 | } |
| 1720 | } |
| 1721 | } |
| 1722 | } |
| 1723 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1724 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, few_output_pixels_with_qmin) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1725 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1726 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1727 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1728 | for (size_t channels = 1; channels <= 20; channels += 3) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1729 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1730 | .output_pixels(output_pixels) |
| 1731 | .pooling_elements(pooling_elements) |
| 1732 | .pooling_tile(9, 8) |
| 1733 | .channels(channels) |
| 1734 | .qmin(192) |
| 1735 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1736 | } |
| 1737 | } |
| 1738 | } |
| 1739 | } |
| 1740 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1741 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, few_output_pixels_with_qmax) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1742 | TEST_REQUIRES_PSIMD; |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1743 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1744 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1745 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1746 | MaxPoolMicrokernelTester() |
| 1747 | .output_pixels(output_pixels) |
| 1748 | .pooling_elements(pooling_elements) |
| 1749 | .pooling_tile(9, 8) |
| 1750 | .channels(channels) |
| 1751 | .qmax(192) |
| 1752 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1753 | } |
| 1754 | } |
| 1755 | } |
| 1756 | } |
| 1757 | |
| 1758 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, few_output_pixels_with_output_stride) { |
| 1759 | TEST_REQUIRES_PSIMD; |
| 1760 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1761 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1762 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1763 | MaxPoolMicrokernelTester() |
| 1764 | .output_pixels(output_pixels) |
| 1765 | .pooling_elements(pooling_elements) |
| 1766 | .pooling_tile(9, 8) |
| 1767 | .channels(channels) |
| 1768 | .output_stride(23) |
| 1769 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1770 | } |
| 1771 | } |
| 1772 | } |
| 1773 | } |
| 1774 | |
| 1775 | TEST(F32_MAXPOOL_9P8X__PSIMD_C4, few_output_pixels_with_step) { |
| 1776 | TEST_REQUIRES_PSIMD; |
| 1777 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 1778 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 1779 | for (size_t channels = 1; channels <= 20; channels += 3) { |
| 1780 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1781 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1782 | .output_pixels(output_pixels) |
| 1783 | .pooling_elements(pooling_elements) |
| 1784 | .pooling_tile(9, 8) |
| 1785 | .step(step) |
| 1786 | .channels(channels) |
| 1787 | .output_stride(23) |
| 1788 | .Test(xnn_f32_maxpool_ukernel_9p8x__psimd_c4, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1789 | } |
| 1790 | } |
| 1791 | } |
| 1792 | } |
| 1793 | } |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1794 | #endif // !XNN_ARCH_ASMJS && !XNN_ARCH_WASM |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1795 | |
| 1796 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1797 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_unipass_fulltile) { |
| 1798 | MaxPoolMicrokernelTester() |
| 1799 | .pooling_elements(9) |
| 1800 | .pooling_tile(9, 8) |
| 1801 | .channels(1) |
| 1802 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1803 | } |
| 1804 | |
| 1805 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_input_offset) { |
| 1806 | MaxPoolMicrokernelTester() |
| 1807 | .pooling_elements(9) |
| 1808 | .pooling_tile(9, 8) |
| 1809 | .channels(1) |
| 1810 | .input_offset(3) |
| 1811 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1812 | } |
| 1813 | |
| 1814 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_qmin) { |
| 1815 | MaxPoolMicrokernelTester() |
| 1816 | .pooling_elements(9) |
| 1817 | .pooling_tile(9, 8) |
| 1818 | .channels(1) |
| 1819 | .qmin(192) |
| 1820 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1821 | } |
| 1822 | |
| 1823 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_unipass_fulltile_with_qmax) { |
| 1824 | MaxPoolMicrokernelTester() |
| 1825 | .pooling_elements(9) |
| 1826 | .pooling_tile(9, 8) |
| 1827 | .channels(1) |
| 1828 | .qmax(192) |
| 1829 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1830 | } |
| 1831 | |
| 1832 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_unipass_subtile) { |
| 1833 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1834 | MaxPoolMicrokernelTester() |
| 1835 | .pooling_elements(pooling_elements) |
| 1836 | .pooling_tile(9, 8) |
| 1837 | .channels(1) |
| 1838 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1839 | } |
| 1840 | } |
| 1841 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1842 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_unipass_subtile_with_input_offset) { |
| 1843 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1844 | MaxPoolMicrokernelTester() |
| 1845 | .pooling_elements(pooling_elements) |
| 1846 | .pooling_tile(9, 8) |
| 1847 | .channels(1) |
| 1848 | .input_offset(3) |
| 1849 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1850 | } |
| 1851 | } |
| 1852 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1853 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_unipass_fulltile) { |
| 1854 | for (size_t channels = 2; channels < 10; channels++) { |
| 1855 | MaxPoolMicrokernelTester() |
| 1856 | .pooling_elements(9) |
| 1857 | .pooling_tile(9, 8) |
| 1858 | .channels(channels) |
| 1859 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1860 | } |
| 1861 | } |
| 1862 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1863 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_input_offset) { |
| 1864 | for (size_t channels = 2; channels < 10; channels++) { |
| 1865 | MaxPoolMicrokernelTester() |
| 1866 | .pooling_elements(9) |
| 1867 | .pooling_tile(9, 8) |
| 1868 | .channels(channels) |
| 1869 | .input_offset(3) |
| 1870 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1871 | } |
| 1872 | } |
| 1873 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1874 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_qmin) { |
| 1875 | for (size_t channels = 2; channels < 10; channels++) { |
| 1876 | MaxPoolMicrokernelTester() |
| 1877 | .pooling_elements(9) |
| 1878 | .pooling_tile(9, 8) |
| 1879 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1880 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1881 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1882 | } |
| 1883 | } |
| 1884 | |
| 1885 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_unipass_fulltile_with_qmax) { |
| 1886 | for (size_t channels = 2; channels < 10; channels++) { |
| 1887 | MaxPoolMicrokernelTester() |
| 1888 | .pooling_elements(9) |
| 1889 | .pooling_tile(9, 8) |
| 1890 | .channels(channels) |
| 1891 | .qmax(192) |
| 1892 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1893 | } |
| 1894 | } |
| 1895 | |
| 1896 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_unipass_subtile) { |
| 1897 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1898 | for (size_t channels = 2; channels < 10; channels++) { |
| 1899 | MaxPoolMicrokernelTester() |
| 1900 | .pooling_elements(pooling_elements) |
| 1901 | .pooling_tile(9, 8) |
| 1902 | .channels(channels) |
| 1903 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1904 | } |
| 1905 | } |
| 1906 | } |
| 1907 | |
| 1908 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_unipass_subtile_with_input_offset) { |
| 1909 | for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) { |
| 1910 | for (size_t channels = 2; channels < 10; channels++) { |
| 1911 | MaxPoolMicrokernelTester() |
| 1912 | .pooling_elements(pooling_elements) |
| 1913 | .pooling_tile(9, 8) |
| 1914 | .channels(channels) |
| 1915 | .input_offset(3) |
| 1916 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1917 | } |
| 1918 | } |
| 1919 | } |
| 1920 | |
| 1921 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile) { |
| 1922 | MaxPoolMicrokernelTester() |
| 1923 | .pooling_elements(17) |
| 1924 | .pooling_tile(9, 8) |
| 1925 | .channels(1) |
| 1926 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1927 | } |
| 1928 | |
| 1929 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_input_offset) { |
| 1930 | MaxPoolMicrokernelTester() |
| 1931 | .pooling_elements(17) |
| 1932 | .pooling_tile(9, 8) |
| 1933 | .channels(1) |
| 1934 | .input_offset(3) |
| 1935 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1936 | } |
| 1937 | |
| 1938 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_qmin) { |
| 1939 | MaxPoolMicrokernelTester() |
| 1940 | .pooling_elements(17) |
| 1941 | .pooling_tile(9, 8) |
| 1942 | .channels(1) |
| 1943 | .qmin(192) |
| 1944 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1945 | } |
| 1946 | |
| 1947 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_twopass_fulltile_with_qmax) { |
| 1948 | MaxPoolMicrokernelTester() |
| 1949 | .pooling_elements(17) |
| 1950 | .pooling_tile(9, 8) |
| 1951 | .channels(1) |
| 1952 | .qmax(192) |
| 1953 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1954 | } |
| 1955 | |
| 1956 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile) { |
| 1957 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1958 | MaxPoolMicrokernelTester() |
| 1959 | .pooling_elements(pooling_elements) |
| 1960 | .pooling_tile(9, 8) |
| 1961 | .channels(1) |
| 1962 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1963 | } |
| 1964 | } |
| 1965 | |
| 1966 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_twopass_subtile_with_input_offset) { |
| 1967 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 1968 | MaxPoolMicrokernelTester() |
| 1969 | .pooling_elements(pooling_elements) |
| 1970 | .pooling_tile(9, 8) |
| 1971 | .channels(1) |
| 1972 | .input_offset(3) |
| 1973 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1974 | } |
| 1975 | } |
| 1976 | |
| 1977 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile) { |
| 1978 | for (size_t channels = 2; channels < 10; channels++) { |
| 1979 | MaxPoolMicrokernelTester() |
| 1980 | .pooling_elements(17) |
| 1981 | .pooling_tile(9, 8) |
| 1982 | .channels(channels) |
| 1983 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1984 | } |
| 1985 | } |
| 1986 | |
| 1987 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_input_offset) { |
| 1988 | for (size_t channels = 2; channels < 10; channels++) { |
| 1989 | MaxPoolMicrokernelTester() |
| 1990 | .pooling_elements(17) |
| 1991 | .pooling_tile(9, 8) |
| 1992 | .channels(channels) |
| 1993 | .input_offset(3) |
| 1994 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 1995 | } |
| 1996 | } |
| 1997 | |
| 1998 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_qmin) { |
| 1999 | for (size_t channels = 2; channels < 10; channels++) { |
| 2000 | MaxPoolMicrokernelTester() |
| 2001 | .pooling_elements(17) |
| 2002 | .pooling_tile(9, 8) |
| 2003 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2004 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2005 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2006 | } |
| 2007 | } |
| 2008 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2009 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_twopass_fulltile_with_qmax) { |
| 2010 | for (size_t channels = 2; channels < 10; channels++) { |
| 2011 | MaxPoolMicrokernelTester() |
| 2012 | .pooling_elements(17) |
| 2013 | .pooling_tile(9, 8) |
| 2014 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2015 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2016 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2017 | } |
| 2018 | } |
| 2019 | |
| 2020 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile) { |
| 2021 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2022 | for (size_t channels = 2; channels < 10; channels++) { |
| 2023 | MaxPoolMicrokernelTester() |
| 2024 | .pooling_elements(17) |
| 2025 | .pooling_tile(9, 8) |
| 2026 | .channels(channels) |
| 2027 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2028 | } |
| 2029 | } |
| 2030 | } |
| 2031 | |
| 2032 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_twopass_subtile_with_input_offset) { |
| 2033 | for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) { |
| 2034 | for (size_t channels = 2; channels < 10; channels++) { |
| 2035 | MaxPoolMicrokernelTester() |
| 2036 | .pooling_elements(17) |
| 2037 | .pooling_tile(9, 8) |
| 2038 | .channels(channels) |
| 2039 | .input_offset(3) |
| 2040 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2041 | } |
| 2042 | } |
| 2043 | } |
| 2044 | |
| 2045 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_multipass) { |
| 2046 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2047 | MaxPoolMicrokernelTester() |
| 2048 | .pooling_elements(17) |
| 2049 | .pooling_tile(9, 8) |
| 2050 | .channels(1) |
| 2051 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2052 | } |
| 2053 | } |
| 2054 | |
| 2055 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_multipass_with_input_offset) { |
| 2056 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2057 | MaxPoolMicrokernelTester() |
| 2058 | .pooling_elements(17) |
| 2059 | .pooling_tile(9, 8) |
| 2060 | .channels(1) |
| 2061 | .input_offset(3) |
| 2062 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2063 | } |
| 2064 | } |
| 2065 | |
| 2066 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_multipass_with_qmin) { |
| 2067 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2068 | MaxPoolMicrokernelTester() |
| 2069 | .pooling_elements(17) |
| 2070 | .pooling_tile(9, 8) |
| 2071 | .channels(1) |
| 2072 | .qmin(192) |
| 2073 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2074 | } |
| 2075 | } |
| 2076 | |
| 2077 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_eq_1_multipass_with_qmax) { |
| 2078 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2079 | MaxPoolMicrokernelTester() |
| 2080 | .pooling_elements(17) |
| 2081 | .pooling_tile(9, 8) |
| 2082 | .channels(1) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2083 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2084 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2085 | } |
| 2086 | } |
| 2087 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2088 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_multipass) { |
| 2089 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2090 | for (size_t channels = 2; channels < 10; channels++) { |
| 2091 | MaxPoolMicrokernelTester() |
| 2092 | .pooling_elements(17) |
| 2093 | .pooling_tile(9, 8) |
| 2094 | .channels(channels) |
| 2095 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2096 | } |
| 2097 | } |
| 2098 | } |
| 2099 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2100 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_multipass_with_input_offset) { |
| 2101 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2102 | for (size_t channels = 2; channels < 10; channels++) { |
| 2103 | MaxPoolMicrokernelTester() |
| 2104 | .pooling_elements(17) |
| 2105 | .pooling_tile(9, 8) |
| 2106 | .channels(channels) |
| 2107 | .input_offset(3) |
| 2108 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2109 | } |
| 2110 | } |
| 2111 | } |
| 2112 | |
| 2113 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_multipass_with_qmin) { |
| 2114 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2115 | for (size_t channels = 2; channels < 10; channels++) { |
| 2116 | MaxPoolMicrokernelTester() |
| 2117 | .pooling_elements(17) |
| 2118 | .pooling_tile(9, 8) |
| 2119 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2120 | .qmin(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2121 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2122 | } |
| 2123 | } |
| 2124 | } |
| 2125 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2126 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, channels_gt_1_multipass_with_qmax) { |
| 2127 | for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) { |
| 2128 | for (size_t channels = 2; channels < 10; channels++) { |
| 2129 | MaxPoolMicrokernelTester() |
| 2130 | .pooling_elements(17) |
| 2131 | .pooling_tile(9, 8) |
| 2132 | .channels(channels) |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2133 | .qmax(192) |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2134 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2135 | } |
| 2136 | } |
| 2137 | } |
| 2138 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2139 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, few_output_pixels) { |
| 2140 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2141 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2142 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2143 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2144 | .output_pixels(output_pixels) |
| 2145 | .pooling_elements(pooling_elements) |
| 2146 | .pooling_tile(9, 8) |
| 2147 | .channels(channels) |
| 2148 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2149 | } |
| 2150 | } |
| 2151 | } |
| 2152 | } |
| 2153 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2154 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, few_output_pixels_with_input_offset) { |
| 2155 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2156 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2157 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2158 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2159 | .output_pixels(output_pixels) |
| 2160 | .pooling_elements(pooling_elements) |
| 2161 | .pooling_tile(9, 8) |
| 2162 | .channels(channels) |
| 2163 | .input_offset(7) |
| 2164 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2165 | } |
| 2166 | } |
| 2167 | } |
| 2168 | } |
| 2169 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2170 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, few_output_pixels_with_qmin) { |
| 2171 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2172 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2173 | for (size_t channels = 1; channels <= 5; channels += 1) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2174 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2175 | .output_pixels(output_pixels) |
| 2176 | .pooling_elements(pooling_elements) |
| 2177 | .pooling_tile(9, 8) |
| 2178 | .channels(channels) |
| 2179 | .qmin(192) |
| 2180 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2181 | } |
| 2182 | } |
| 2183 | } |
| 2184 | } |
| 2185 | |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2186 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, few_output_pixels_with_qmax) { |
| 2187 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2188 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2189 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 2190 | MaxPoolMicrokernelTester() |
| 2191 | .output_pixels(output_pixels) |
| 2192 | .pooling_elements(pooling_elements) |
| 2193 | .pooling_tile(9, 8) |
| 2194 | .channels(channels) |
| 2195 | .qmax(192) |
| 2196 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2197 | } |
| 2198 | } |
| 2199 | } |
| 2200 | } |
| 2201 | |
| 2202 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, few_output_pixels_with_output_stride) { |
| 2203 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2204 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2205 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 2206 | MaxPoolMicrokernelTester() |
| 2207 | .output_pixels(output_pixels) |
| 2208 | .pooling_elements(pooling_elements) |
| 2209 | .pooling_tile(9, 8) |
| 2210 | .channels(channels) |
| 2211 | .output_stride(7) |
| 2212 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
| 2213 | } |
| 2214 | } |
| 2215 | } |
| 2216 | } |
| 2217 | |
| 2218 | TEST(F32_MAXPOOL_9P8X__SCALAR_C1, few_output_pixels_with_step) { |
| 2219 | for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) { |
| 2220 | for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) { |
| 2221 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 2222 | for (size_t step = 2; step <= pooling_elements; step++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2223 | MaxPoolMicrokernelTester() |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2224 | .output_pixels(output_pixels) |
| 2225 | .pooling_elements(pooling_elements) |
| 2226 | .pooling_tile(9, 8) |
| 2227 | .step(step) |
| 2228 | .channels(channels) |
| 2229 | .output_stride(7) |
| 2230 | .Test(xnn_f32_maxpool_ukernel_9p8x__scalar_c1, MaxPoolMicrokernelTester::Variant::Scalar); |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2231 | } |
| 2232 | } |
| 2233 | } |
| 2234 | } |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 2235 | } |