blob: 9ca99f2f003d74bc4daea73d7491647ae3a49950 [file] [log] [blame]
Marat Dukhan85755042022-01-13 01:46:05 -08001// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
4// Copyright 2020 Google LLC
5//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
8//
9// Auto-generated file. Do not edit!
10// Specification: test/qu8-gavgpool-minmax-rndnu.yaml
11// Generator: tools/generate-gavgpool-test.py
12
13
14#include <gtest/gtest.h>
15
16#include <xnnpack/common.h>
17#include <xnnpack/isa-checks.h>
18
19#include <xnnpack/gavgpool.h>
20#include "gavgpool-microkernel-tester.h"
21
22
23#if XNN_ARCH_ARM || XNN_ARCH_ARM64
24 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_eq_8_2pass_fulltile) {
25 TEST_REQUIRES_ARM_NEON;
26 GAvgPoolMicrokernelTester()
27 .rows(14)
28 .channels(8)
29 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
30 }
31
32 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_input_stride) {
33 TEST_REQUIRES_ARM_NEON;
34 GAvgPoolMicrokernelTester()
35 .rows(14)
36 .channels(8)
37 .input_stride(11)
38 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
39 }
40
41 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_qmax) {
42 TEST_REQUIRES_ARM_NEON;
43 GAvgPoolMicrokernelTester()
44 .rows(14)
45 .channels(8)
46 .qmax(128)
47 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
48 }
49
50 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_eq_8_2pass_fulltile_with_qmin) {
51 TEST_REQUIRES_ARM_NEON;
52 GAvgPoolMicrokernelTester()
53 .rows(14)
54 .channels(8)
55 .qmin(128)
56 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
57 }
58
59 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_eq_8_2pass_subtile) {
60 TEST_REQUIRES_ARM_NEON;
61 for (size_t rows = 8; rows < 14; rows++) {
62 GAvgPoolMicrokernelTester()
63 .rows(rows)
64 .channels(8)
65 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
66 }
67 }
68
69 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_eq_8_2pass_subtile_with_input_stride) {
70 TEST_REQUIRES_ARM_NEON;
71 for (size_t rows = 8; rows < 14; rows++) {
72 GAvgPoolMicrokernelTester()
73 .rows(rows)
74 .channels(8)
75 .input_stride(11)
76 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
77 }
78 }
79
80 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_eq_8_multipass_fulltile) {
81 TEST_REQUIRES_ARM_NEON;
82 for (size_t rows = 14; rows <= 35; rows += 7) {
83 GAvgPoolMicrokernelTester()
84 .rows(rows)
85 .channels(8)
86 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
87 }
88 }
89
90 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_eq_8_multipass_fulltile_with_input_stride) {
91 TEST_REQUIRES_ARM_NEON;
92 for (size_t rows = 14; rows <= 35; rows += 7) {
93 GAvgPoolMicrokernelTester()
94 .rows(rows)
95 .channels(8)
96 .input_stride(11)
97 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
98 }
99 }
100
101 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_div_8_2pass_fulltile) {
102 TEST_REQUIRES_ARM_NEON;
103 for (size_t channels = 16; channels < 64; channels += 8) {
104 GAvgPoolMicrokernelTester()
105 .rows(14)
106 .channels(channels)
107 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
108 }
109 }
110
111 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_div_8_2pass_subtile) {
112 TEST_REQUIRES_ARM_NEON;
113 for (size_t channels = 16; channels < 64; channels += 8) {
114 for (size_t rows = 8; rows < 14; rows++) {
115 GAvgPoolMicrokernelTester()
116 .rows(rows)
117 .channels(channels)
118 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
119 }
120 }
121 }
122
123 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_div_8_multipass_fulltile) {
124 TEST_REQUIRES_ARM_NEON;
125 for (size_t channels = 16; channels < 64; channels += 8) {
126 for (size_t rows = 14; rows <= 35; rows += 7) {
127 GAvgPoolMicrokernelTester()
128 .rows(rows)
129 .channels(channels)
130 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
131 }
132 }
133 }
134
135 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_div_8_multipass_fulltile_with_input_stride) {
136 TEST_REQUIRES_ARM_NEON;
137 for (size_t channels = 16; channels < 64; channels += 8) {
138 for (size_t rows = 14; rows <= 35; rows += 7) {
139 GAvgPoolMicrokernelTester()
140 .rows(rows)
141 .channels(channels)
142 .input_stride(131)
143 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
144 }
145 }
146 }
147
148 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_lt_8_2pass_fulltile) {
149 TEST_REQUIRES_ARM_NEON;
150 for (size_t channels = 1; channels < 8; channels++) {
151 GAvgPoolMicrokernelTester()
152 .rows(14)
153 .channels(channels)
154 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
155 }
156 }
157
158 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_qmax) {
159 TEST_REQUIRES_ARM_NEON;
160 for (size_t channels = 1; channels < 8; channels++) {
161 GAvgPoolMicrokernelTester()
162 .rows(14)
163 .channels(channels)
164 .qmax(128)
165 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
166 }
167 }
168
169 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_lt_8_2pass_fulltile_with_qmin) {
170 TEST_REQUIRES_ARM_NEON;
171 for (size_t channels = 1; channels < 8; channels++) {
172 GAvgPoolMicrokernelTester()
173 .rows(14)
174 .channels(channels)
175 .qmin(128)
176 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
177 }
178 }
179
180 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_lt_8_2pass_subtile) {
181 TEST_REQUIRES_ARM_NEON;
182 for (size_t channels = 1; channels < 8; channels++) {
183 for (size_t rows = 8; rows < 14; rows++) {
184 GAvgPoolMicrokernelTester()
185 .rows(rows)
186 .channels(channels)
187 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
188 }
189 }
190 }
191
192 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_lt_8_multipass_fulltile) {
193 TEST_REQUIRES_ARM_NEON;
194 for (size_t channels = 1; channels < 8; channels++) {
195 for (size_t rows = 14; rows <= 35; rows += 7) {
196 GAvgPoolMicrokernelTester()
197 .rows(rows)
198 .channels(channels)
199 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
200 }
201 }
202 }
203
204 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_lt_8_multipass_fulltile_with_input_stride) {
205 TEST_REQUIRES_ARM_NEON;
206 for (size_t channels = 1; channels < 8; channels++) {
207 for (size_t rows = 14; rows <= 35; rows += 7) {
208 GAvgPoolMicrokernelTester()
209 .rows(rows)
210 .channels(channels)
211 .input_stride(11)
212 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
213 }
214 }
215 }
216
217 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_gt_8_2pass_fulltile) {
218 TEST_REQUIRES_ARM_NEON;
219 for (size_t channels = 9; channels < 16; channels++) {
220 GAvgPoolMicrokernelTester()
221 .rows(14)
222 .channels(channels)
223 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
224 }
225 }
226
227 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_qmax) {
228 TEST_REQUIRES_ARM_NEON;
229 for (size_t channels = 9; channels < 16; channels++) {
230 GAvgPoolMicrokernelTester()
231 .rows(14)
232 .channels(channels)
233 .qmax(128)
234 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
235 }
236 }
237
238 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_gt_8_2pass_fulltile_with_qmin) {
239 TEST_REQUIRES_ARM_NEON;
240 for (size_t channels = 9; channels < 16; channels++) {
241 GAvgPoolMicrokernelTester()
242 .rows(14)
243 .channels(channels)
244 .qmin(128)
245 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
246 }
247 }
248
249 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_gt_8_2pass_subtile) {
250 TEST_REQUIRES_ARM_NEON;
251 for (size_t channels = 9; channels < 16; channels++) {
252 for (size_t rows = 8; rows < 14; rows++) {
253 GAvgPoolMicrokernelTester()
254 .rows(rows)
255 .channels(channels)
256 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
257 }
258 }
259 }
260
261 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_gt_8_multipass_fulltile) {
262 TEST_REQUIRES_ARM_NEON;
263 for (size_t channels = 9; channels < 16; channels++) {
264 for (size_t rows = 14; rows < 35; rows += 14) {
265 GAvgPoolMicrokernelTester()
266 .rows(rows)
267 .channels(channels)
268 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
269 }
270 }
271 }
272
273 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C8, channels_gt_8_multipass_fulltile_with_input_stride) {
274 TEST_REQUIRES_ARM_NEON;
275 for (size_t channels = 9; channels < 16; channels++) {
276 for (size_t rows = 14; rows < 35; rows += 14) {
277 GAvgPoolMicrokernelTester()
278 .rows(rows)
279 .channels(channels)
280 .input_stride(29)
281 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
282 }
283 }
284 }
285#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
286
287
288#if XNN_ARCH_ARM || XNN_ARCH_ARM64
289 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_eq_16_2pass_fulltile) {
290 TEST_REQUIRES_ARM_NEON;
291 GAvgPoolMicrokernelTester()
292 .rows(14)
293 .channels(16)
294 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
295 }
296
297 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_eq_16_2pass_fulltile_with_input_stride) {
298 TEST_REQUIRES_ARM_NEON;
299 GAvgPoolMicrokernelTester()
300 .rows(14)
301 .channels(16)
302 .input_stride(19)
303 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
304 }
305
306 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_eq_16_2pass_fulltile_with_qmax) {
307 TEST_REQUIRES_ARM_NEON;
308 GAvgPoolMicrokernelTester()
309 .rows(14)
310 .channels(16)
311 .qmax(128)
312 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
313 }
314
315 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_eq_16_2pass_fulltile_with_qmin) {
316 TEST_REQUIRES_ARM_NEON;
317 GAvgPoolMicrokernelTester()
318 .rows(14)
319 .channels(16)
320 .qmin(128)
321 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
322 }
323
324 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_eq_16_2pass_subtile) {
325 TEST_REQUIRES_ARM_NEON;
326 for (size_t rows = 8; rows < 14; rows++) {
327 GAvgPoolMicrokernelTester()
328 .rows(rows)
329 .channels(16)
330 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
331 }
332 }
333
334 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_eq_16_2pass_subtile_with_input_stride) {
335 TEST_REQUIRES_ARM_NEON;
336 for (size_t rows = 8; rows < 14; rows++) {
337 GAvgPoolMicrokernelTester()
338 .rows(rows)
339 .channels(16)
340 .input_stride(19)
341 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
342 }
343 }
344
345 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_eq_16_multipass_fulltile) {
346 TEST_REQUIRES_ARM_NEON;
347 for (size_t rows = 14; rows <= 35; rows += 7) {
348 GAvgPoolMicrokernelTester()
349 .rows(rows)
350 .channels(16)
351 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
352 }
353 }
354
355 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_eq_16_multipass_fulltile_with_input_stride) {
356 TEST_REQUIRES_ARM_NEON;
357 for (size_t rows = 14; rows <= 35; rows += 7) {
358 GAvgPoolMicrokernelTester()
359 .rows(rows)
360 .channels(16)
361 .input_stride(19)
362 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
363 }
364 }
365
366 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_div_16_2pass_fulltile) {
367 TEST_REQUIRES_ARM_NEON;
368 for (size_t channels = 32; channels < 128; channels += 16) {
369 GAvgPoolMicrokernelTester()
370 .rows(14)
371 .channels(channels)
372 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
373 }
374 }
375
376 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_div_16_2pass_subtile) {
377 TEST_REQUIRES_ARM_NEON;
378 for (size_t channels = 32; channels < 128; channels += 16) {
379 for (size_t rows = 8; rows < 14; rows++) {
380 GAvgPoolMicrokernelTester()
381 .rows(rows)
382 .channels(channels)
383 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
384 }
385 }
386 }
387
388 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_div_16_multipass_fulltile) {
389 TEST_REQUIRES_ARM_NEON;
390 for (size_t channels = 32; channels < 128; channels += 16) {
391 for (size_t rows = 14; rows <= 35; rows += 7) {
392 GAvgPoolMicrokernelTester()
393 .rows(rows)
394 .channels(channels)
395 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
396 }
397 }
398 }
399
400 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_div_16_multipass_fulltile_with_input_stride) {
401 TEST_REQUIRES_ARM_NEON;
402 for (size_t channels = 32; channels < 128; channels += 16) {
403 for (size_t rows = 14; rows <= 35; rows += 7) {
404 GAvgPoolMicrokernelTester()
405 .rows(rows)
406 .channels(channels)
407 .input_stride(263)
408 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
409 }
410 }
411 }
412
413 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_lt_16_2pass_fulltile) {
414 TEST_REQUIRES_ARM_NEON;
415 for (size_t channels = 1; channels < 16; channels++) {
416 GAvgPoolMicrokernelTester()
417 .rows(14)
418 .channels(channels)
419 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
420 }
421 }
422
423 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_lt_16_2pass_fulltile_with_qmax) {
424 TEST_REQUIRES_ARM_NEON;
425 for (size_t channels = 1; channels < 16; channels++) {
426 GAvgPoolMicrokernelTester()
427 .rows(14)
428 .channels(channels)
429 .qmax(128)
430 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
431 }
432 }
433
434 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_lt_16_2pass_fulltile_with_qmin) {
435 TEST_REQUIRES_ARM_NEON;
436 for (size_t channels = 1; channels < 16; channels++) {
437 GAvgPoolMicrokernelTester()
438 .rows(14)
439 .channels(channels)
440 .qmin(128)
441 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
442 }
443 }
444
445 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_lt_16_2pass_subtile) {
446 TEST_REQUIRES_ARM_NEON;
447 for (size_t channels = 1; channels < 16; channels++) {
448 for (size_t rows = 8; rows < 14; rows++) {
449 GAvgPoolMicrokernelTester()
450 .rows(rows)
451 .channels(channels)
452 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
453 }
454 }
455 }
456
457 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_lt_16_multipass_fulltile) {
458 TEST_REQUIRES_ARM_NEON;
459 for (size_t channels = 1; channels < 16; channels++) {
460 for (size_t rows = 14; rows <= 35; rows += 7) {
461 GAvgPoolMicrokernelTester()
462 .rows(rows)
463 .channels(channels)
464 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
465 }
466 }
467 }
468
469 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_lt_16_multipass_fulltile_with_input_stride) {
470 TEST_REQUIRES_ARM_NEON;
471 for (size_t channels = 1; channels < 16; channels++) {
472 for (size_t rows = 14; rows <= 35; rows += 7) {
473 GAvgPoolMicrokernelTester()
474 .rows(rows)
475 .channels(channels)
476 .input_stride(19)
477 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
478 }
479 }
480 }
481
482 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_gt_16_2pass_fulltile) {
483 TEST_REQUIRES_ARM_NEON;
484 for (size_t channels = 17; channels < 32; channels++) {
485 GAvgPoolMicrokernelTester()
486 .rows(14)
487 .channels(channels)
488 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
489 }
490 }
491
492 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_gt_16_2pass_fulltile_with_qmax) {
493 TEST_REQUIRES_ARM_NEON;
494 for (size_t channels = 17; channels < 32; channels++) {
495 GAvgPoolMicrokernelTester()
496 .rows(14)
497 .channels(channels)
498 .qmax(128)
499 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
500 }
501 }
502
503 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_gt_16_2pass_fulltile_with_qmin) {
504 TEST_REQUIRES_ARM_NEON;
505 for (size_t channels = 17; channels < 32; channels++) {
506 GAvgPoolMicrokernelTester()
507 .rows(14)
508 .channels(channels)
509 .qmin(128)
510 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
511 }
512 }
513
514 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_gt_16_2pass_subtile) {
515 TEST_REQUIRES_ARM_NEON;
516 for (size_t channels = 17; channels < 32; channels++) {
517 for (size_t rows = 8; rows < 14; rows++) {
518 GAvgPoolMicrokernelTester()
519 .rows(rows)
520 .channels(channels)
521 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
522 }
523 }
524 }
525
526 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_gt_16_multipass_fulltile) {
527 TEST_REQUIRES_ARM_NEON;
528 for (size_t channels = 17; channels < 32; channels++) {
529 for (size_t rows = 14; rows < 35; rows += 14) {
530 GAvgPoolMicrokernelTester()
531 .rows(rows)
532 .channels(channels)
533 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
534 }
535 }
536 }
537
538 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C16, channels_gt_16_multipass_fulltile_with_input_stride) {
539 TEST_REQUIRES_ARM_NEON;
540 for (size_t channels = 17; channels < 32; channels++) {
541 for (size_t rows = 14; rows < 35; rows += 14) {
542 GAvgPoolMicrokernelTester()
543 .rows(rows)
544 .channels(channels)
545 .input_stride(47)
546 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
547 }
548 }
549 }
550#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
551
552
553#if XNN_ARCH_ARM || XNN_ARCH_ARM64
554 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_eq_24_2pass_fulltile) {
555 TEST_REQUIRES_ARM_NEON;
556 GAvgPoolMicrokernelTester()
557 .rows(14)
558 .channels(24)
559 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
560 }
561
562 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_eq_24_2pass_fulltile_with_input_stride) {
563 TEST_REQUIRES_ARM_NEON;
564 GAvgPoolMicrokernelTester()
565 .rows(14)
566 .channels(24)
567 .input_stride(29)
568 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
569 }
570
571 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_eq_24_2pass_fulltile_with_qmax) {
572 TEST_REQUIRES_ARM_NEON;
573 GAvgPoolMicrokernelTester()
574 .rows(14)
575 .channels(24)
576 .qmax(128)
577 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
578 }
579
580 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_eq_24_2pass_fulltile_with_qmin) {
581 TEST_REQUIRES_ARM_NEON;
582 GAvgPoolMicrokernelTester()
583 .rows(14)
584 .channels(24)
585 .qmin(128)
586 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
587 }
588
589 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_eq_24_2pass_subtile) {
590 TEST_REQUIRES_ARM_NEON;
591 for (size_t rows = 8; rows < 14; rows++) {
592 GAvgPoolMicrokernelTester()
593 .rows(rows)
594 .channels(24)
595 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
596 }
597 }
598
599 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_eq_24_2pass_subtile_with_input_stride) {
600 TEST_REQUIRES_ARM_NEON;
601 for (size_t rows = 8; rows < 14; rows++) {
602 GAvgPoolMicrokernelTester()
603 .rows(rows)
604 .channels(24)
605 .input_stride(29)
606 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
607 }
608 }
609
610 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_eq_24_multipass_fulltile) {
611 TEST_REQUIRES_ARM_NEON;
612 for (size_t rows = 14; rows <= 35; rows += 7) {
613 GAvgPoolMicrokernelTester()
614 .rows(rows)
615 .channels(24)
616 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
617 }
618 }
619
620 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_eq_24_multipass_fulltile_with_input_stride) {
621 TEST_REQUIRES_ARM_NEON;
622 for (size_t rows = 14; rows <= 35; rows += 7) {
623 GAvgPoolMicrokernelTester()
624 .rows(rows)
625 .channels(24)
626 .input_stride(29)
627 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
628 }
629 }
630
631 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_div_24_2pass_fulltile) {
632 TEST_REQUIRES_ARM_NEON;
633 for (size_t channels = 48; channels < 192; channels += 24) {
634 GAvgPoolMicrokernelTester()
635 .rows(14)
636 .channels(channels)
637 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
638 }
639 }
640
641 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_div_24_2pass_subtile) {
642 TEST_REQUIRES_ARM_NEON;
643 for (size_t channels = 48; channels < 192; channels += 24) {
644 for (size_t rows = 8; rows < 14; rows++) {
645 GAvgPoolMicrokernelTester()
646 .rows(rows)
647 .channels(channels)
648 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
649 }
650 }
651 }
652
653 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_div_24_multipass_fulltile) {
654 TEST_REQUIRES_ARM_NEON;
655 for (size_t channels = 48; channels < 192; channels += 24) {
656 for (size_t rows = 14; rows <= 35; rows += 7) {
657 GAvgPoolMicrokernelTester()
658 .rows(rows)
659 .channels(channels)
660 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
661 }
662 }
663 }
664
665 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_div_24_multipass_fulltile_with_input_stride) {
666 TEST_REQUIRES_ARM_NEON;
667 for (size_t channels = 48; channels < 192; channels += 24) {
668 for (size_t rows = 14; rows <= 35; rows += 7) {
669 GAvgPoolMicrokernelTester()
670 .rows(rows)
671 .channels(channels)
672 .input_stride(389)
673 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
674 }
675 }
676 }
677
678 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_lt_24_2pass_fulltile) {
679 TEST_REQUIRES_ARM_NEON;
680 for (size_t channels = 1; channels < 24; channels++) {
681 GAvgPoolMicrokernelTester()
682 .rows(14)
683 .channels(channels)
684 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
685 }
686 }
687
688 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_lt_24_2pass_fulltile_with_qmax) {
689 TEST_REQUIRES_ARM_NEON;
690 for (size_t channels = 1; channels < 24; channels++) {
691 GAvgPoolMicrokernelTester()
692 .rows(14)
693 .channels(channels)
694 .qmax(128)
695 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
696 }
697 }
698
699 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_lt_24_2pass_fulltile_with_qmin) {
700 TEST_REQUIRES_ARM_NEON;
701 for (size_t channels = 1; channels < 24; channels++) {
702 GAvgPoolMicrokernelTester()
703 .rows(14)
704 .channels(channels)
705 .qmin(128)
706 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
707 }
708 }
709
710 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_lt_24_2pass_subtile) {
711 TEST_REQUIRES_ARM_NEON;
712 for (size_t channels = 1; channels < 24; channels++) {
713 for (size_t rows = 8; rows < 14; rows++) {
714 GAvgPoolMicrokernelTester()
715 .rows(rows)
716 .channels(channels)
717 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
718 }
719 }
720 }
721
722 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_lt_24_multipass_fulltile) {
723 TEST_REQUIRES_ARM_NEON;
724 for (size_t channels = 1; channels < 24; channels++) {
725 for (size_t rows = 14; rows <= 35; rows += 7) {
726 GAvgPoolMicrokernelTester()
727 .rows(rows)
728 .channels(channels)
729 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
730 }
731 }
732 }
733
734 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_lt_24_multipass_fulltile_with_input_stride) {
735 TEST_REQUIRES_ARM_NEON;
736 for (size_t channels = 1; channels < 24; channels++) {
737 for (size_t rows = 14; rows <= 35; rows += 7) {
738 GAvgPoolMicrokernelTester()
739 .rows(rows)
740 .channels(channels)
741 .input_stride(29)
742 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
743 }
744 }
745 }
746
747 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_gt_24_2pass_fulltile) {
748 TEST_REQUIRES_ARM_NEON;
749 for (size_t channels = 25; channels < 48; channels++) {
750 GAvgPoolMicrokernelTester()
751 .rows(14)
752 .channels(channels)
753 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
754 }
755 }
756
757 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_gt_24_2pass_fulltile_with_qmax) {
758 TEST_REQUIRES_ARM_NEON;
759 for (size_t channels = 25; channels < 48; channels++) {
760 GAvgPoolMicrokernelTester()
761 .rows(14)
762 .channels(channels)
763 .qmax(128)
764 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
765 }
766 }
767
768 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_gt_24_2pass_fulltile_with_qmin) {
769 TEST_REQUIRES_ARM_NEON;
770 for (size_t channels = 25; channels < 48; channels++) {
771 GAvgPoolMicrokernelTester()
772 .rows(14)
773 .channels(channels)
774 .qmin(128)
775 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
776 }
777 }
778
779 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_gt_24_2pass_subtile) {
780 TEST_REQUIRES_ARM_NEON;
781 for (size_t channels = 25; channels < 48; channels++) {
782 for (size_t rows = 8; rows < 14; rows++) {
783 GAvgPoolMicrokernelTester()
784 .rows(rows)
785 .channels(channels)
786 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
787 }
788 }
789 }
790
791 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_gt_24_multipass_fulltile) {
792 TEST_REQUIRES_ARM_NEON;
793 for (size_t channels = 25; channels < 48; channels++) {
794 for (size_t rows = 14; rows < 35; rows += 14) {
795 GAvgPoolMicrokernelTester()
796 .rows(rows)
797 .channels(channels)
798 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
799 }
800 }
801 }
802
803 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C24, channels_gt_24_multipass_fulltile_with_input_stride) {
804 TEST_REQUIRES_ARM_NEON;
805 for (size_t channels = 25; channels < 48; channels++) {
806 for (size_t rows = 14; rows < 35; rows += 14) {
807 GAvgPoolMicrokernelTester()
808 .rows(rows)
809 .channels(channels)
810 .input_stride(61)
811 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
812 }
813 }
814 }
815#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
816
817
818#if XNN_ARCH_ARM || XNN_ARCH_ARM64
819 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_eq_32_2pass_fulltile) {
820 TEST_REQUIRES_ARM_NEON;
821 GAvgPoolMicrokernelTester()
822 .rows(14)
823 .channels(32)
824 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
825 }
826
827 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_eq_32_2pass_fulltile_with_input_stride) {
828 TEST_REQUIRES_ARM_NEON;
829 GAvgPoolMicrokernelTester()
830 .rows(14)
831 .channels(32)
832 .input_stride(37)
833 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
834 }
835
836 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_eq_32_2pass_fulltile_with_qmax) {
837 TEST_REQUIRES_ARM_NEON;
838 GAvgPoolMicrokernelTester()
839 .rows(14)
840 .channels(32)
841 .qmax(128)
842 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
843 }
844
845 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_eq_32_2pass_fulltile_with_qmin) {
846 TEST_REQUIRES_ARM_NEON;
847 GAvgPoolMicrokernelTester()
848 .rows(14)
849 .channels(32)
850 .qmin(128)
851 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
852 }
853
854 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_eq_32_2pass_subtile) {
855 TEST_REQUIRES_ARM_NEON;
856 for (size_t rows = 8; rows < 14; rows++) {
857 GAvgPoolMicrokernelTester()
858 .rows(rows)
859 .channels(32)
860 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
861 }
862 }
863
864 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_eq_32_2pass_subtile_with_input_stride) {
865 TEST_REQUIRES_ARM_NEON;
866 for (size_t rows = 8; rows < 14; rows++) {
867 GAvgPoolMicrokernelTester()
868 .rows(rows)
869 .channels(32)
870 .input_stride(37)
871 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
872 }
873 }
874
875 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_eq_32_multipass_fulltile) {
876 TEST_REQUIRES_ARM_NEON;
877 for (size_t rows = 14; rows <= 35; rows += 7) {
878 GAvgPoolMicrokernelTester()
879 .rows(rows)
880 .channels(32)
881 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
882 }
883 }
884
885 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_eq_32_multipass_fulltile_with_input_stride) {
886 TEST_REQUIRES_ARM_NEON;
887 for (size_t rows = 14; rows <= 35; rows += 7) {
888 GAvgPoolMicrokernelTester()
889 .rows(rows)
890 .channels(32)
891 .input_stride(37)
892 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
893 }
894 }
895
896 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_div_32_2pass_fulltile) {
897 TEST_REQUIRES_ARM_NEON;
898 for (size_t channels = 64; channels < 256; channels += 32) {
899 GAvgPoolMicrokernelTester()
900 .rows(14)
901 .channels(channels)
902 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
903 }
904 }
905
906 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_div_32_2pass_subtile) {
907 TEST_REQUIRES_ARM_NEON;
908 for (size_t channels = 64; channels < 256; channels += 32) {
909 for (size_t rows = 8; rows < 14; rows++) {
910 GAvgPoolMicrokernelTester()
911 .rows(rows)
912 .channels(channels)
913 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
914 }
915 }
916 }
917
918 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_div_32_multipass_fulltile) {
919 TEST_REQUIRES_ARM_NEON;
920 for (size_t channels = 64; channels < 256; channels += 32) {
921 for (size_t rows = 14; rows <= 35; rows += 7) {
922 GAvgPoolMicrokernelTester()
923 .rows(rows)
924 .channels(channels)
925 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
926 }
927 }
928 }
929
930 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_div_32_multipass_fulltile_with_input_stride) {
931 TEST_REQUIRES_ARM_NEON;
932 for (size_t channels = 64; channels < 256; channels += 32) {
933 for (size_t rows = 14; rows <= 35; rows += 7) {
934 GAvgPoolMicrokernelTester()
935 .rows(rows)
936 .channels(channels)
937 .input_stride(521)
938 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
939 }
940 }
941 }
942
943 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_lt_32_2pass_fulltile) {
944 TEST_REQUIRES_ARM_NEON;
945 for (size_t channels = 1; channels < 32; channels++) {
946 GAvgPoolMicrokernelTester()
947 .rows(14)
948 .channels(channels)
949 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
950 }
951 }
952
953 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_lt_32_2pass_fulltile_with_qmax) {
954 TEST_REQUIRES_ARM_NEON;
955 for (size_t channels = 1; channels < 32; channels++) {
956 GAvgPoolMicrokernelTester()
957 .rows(14)
958 .channels(channels)
959 .qmax(128)
960 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
961 }
962 }
963
964 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_lt_32_2pass_fulltile_with_qmin) {
965 TEST_REQUIRES_ARM_NEON;
966 for (size_t channels = 1; channels < 32; channels++) {
967 GAvgPoolMicrokernelTester()
968 .rows(14)
969 .channels(channels)
970 .qmin(128)
971 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
972 }
973 }
974
975 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_lt_32_2pass_subtile) {
976 TEST_REQUIRES_ARM_NEON;
977 for (size_t channels = 1; channels < 32; channels++) {
978 for (size_t rows = 8; rows < 14; rows++) {
979 GAvgPoolMicrokernelTester()
980 .rows(rows)
981 .channels(channels)
982 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
983 }
984 }
985 }
986
987 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_lt_32_multipass_fulltile) {
988 TEST_REQUIRES_ARM_NEON;
989 for (size_t channels = 1; channels < 32; channels++) {
990 for (size_t rows = 14; rows <= 35; rows += 7) {
991 GAvgPoolMicrokernelTester()
992 .rows(rows)
993 .channels(channels)
994 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
995 }
996 }
997 }
998
999 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_lt_32_multipass_fulltile_with_input_stride) {
1000 TEST_REQUIRES_ARM_NEON;
1001 for (size_t channels = 1; channels < 32; channels++) {
1002 for (size_t rows = 14; rows <= 35; rows += 7) {
1003 GAvgPoolMicrokernelTester()
1004 .rows(rows)
1005 .channels(channels)
1006 .input_stride(37)
1007 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1008 }
1009 }
1010 }
1011
1012 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_gt_32_2pass_fulltile) {
1013 TEST_REQUIRES_ARM_NEON;
1014 for (size_t channels = 33; channels < 64; channels++) {
1015 GAvgPoolMicrokernelTester()
1016 .rows(14)
1017 .channels(channels)
1018 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1019 }
1020 }
1021
1022 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_gt_32_2pass_fulltile_with_qmax) {
1023 TEST_REQUIRES_ARM_NEON;
1024 for (size_t channels = 33; channels < 64; channels++) {
1025 GAvgPoolMicrokernelTester()
1026 .rows(14)
1027 .channels(channels)
1028 .qmax(128)
1029 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1030 }
1031 }
1032
1033 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_gt_32_2pass_fulltile_with_qmin) {
1034 TEST_REQUIRES_ARM_NEON;
1035 for (size_t channels = 33; channels < 64; channels++) {
1036 GAvgPoolMicrokernelTester()
1037 .rows(14)
1038 .channels(channels)
1039 .qmin(128)
1040 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1041 }
1042 }
1043
1044 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_gt_32_2pass_subtile) {
1045 TEST_REQUIRES_ARM_NEON;
1046 for (size_t channels = 33; channels < 64; channels++) {
1047 for (size_t rows = 8; rows < 14; rows++) {
1048 GAvgPoolMicrokernelTester()
1049 .rows(rows)
1050 .channels(channels)
1051 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1052 }
1053 }
1054 }
1055
1056 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_gt_32_multipass_fulltile) {
1057 TEST_REQUIRES_ARM_NEON;
1058 for (size_t channels = 33; channels < 64; channels++) {
1059 for (size_t rows = 14; rows < 35; rows += 14) {
1060 GAvgPoolMicrokernelTester()
1061 .rows(rows)
1062 .channels(channels)
1063 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1064 }
1065 }
1066 }
1067
1068 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7P7X__NEON_C32, channels_gt_32_multipass_fulltile_with_input_stride) {
1069 TEST_REQUIRES_ARM_NEON;
1070 for (size_t channels = 33; channels < 64; channels++) {
1071 for (size_t rows = 14; rows < 35; rows += 14) {
1072 GAvgPoolMicrokernelTester()
1073 .rows(rows)
1074 .channels(channels)
1075 .input_stride(79)
1076 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7p7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1077 }
1078 }
1079 }
1080#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1081
1082
1083#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1084 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_eq_8_fulltile) {
1085 TEST_REQUIRES_ARM_NEON;
1086 GAvgPoolMicrokernelTester()
1087 .rows(7)
1088 .channels(8)
1089 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1090 }
1091
1092 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_eq_8_subtile) {
1093 TEST_REQUIRES_ARM_NEON;
1094 for (size_t rows = 1; rows < 7; rows++) {
1095 GAvgPoolMicrokernelTester()
1096 .rows(rows)
1097 .channels(8)
1098 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1099 }
1100 }
1101
1102 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_eq_8_fulltile_with_input_stride) {
1103 TEST_REQUIRES_ARM_NEON;
1104 GAvgPoolMicrokernelTester()
1105 .rows(7)
1106 .channels(8)
1107 .input_stride(11)
1108 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1109 }
1110
1111 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_eq_8_fulltile_with_qmax) {
1112 TEST_REQUIRES_ARM_NEON;
1113 GAvgPoolMicrokernelTester()
1114 .rows(7)
1115 .channels(8)
1116 .qmax(128)
1117 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1118 }
1119
1120 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_eq_8_fulltile_with_qmin) {
1121 TEST_REQUIRES_ARM_NEON;
1122 GAvgPoolMicrokernelTester()
1123 .rows(7)
1124 .channels(8)
1125 .qmin(128)
1126 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1127 }
1128
1129 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_div_8_fulltile) {
1130 TEST_REQUIRES_ARM_NEON;
1131 for (size_t channels = 16; channels < 64; channels += 8) {
1132 GAvgPoolMicrokernelTester()
1133 .rows(7)
1134 .channels(channels)
1135 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1136 }
1137 }
1138
1139 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_div_8_subtile) {
1140 TEST_REQUIRES_ARM_NEON;
1141 for (size_t channels = 16; channels < 64; channels += 8) {
1142 for (size_t rows = 1; rows < 7; rows++) {
1143 GAvgPoolMicrokernelTester()
1144 .rows(rows)
1145 .channels(channels)
1146 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1147 }
1148 }
1149 }
1150
1151 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_lt_8_fulltile) {
1152 TEST_REQUIRES_ARM_NEON;
1153 for (size_t channels = 1; channels < 8; channels++) {
1154 GAvgPoolMicrokernelTester()
1155 .rows(7)
1156 .channels(channels)
1157 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1158 }
1159 }
1160
1161 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_lt_8_subtile) {
1162 TEST_REQUIRES_ARM_NEON;
1163 for (size_t channels = 1; channels < 8; channels++) {
1164 for (size_t rows = 1; rows < 7; rows++) {
1165 GAvgPoolMicrokernelTester()
1166 .rows(rows)
1167 .channels(channels)
1168 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1169 }
1170 }
1171 }
1172
1173 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_lt_8_fulltile_with_qmax) {
1174 TEST_REQUIRES_ARM_NEON;
1175 for (size_t channels = 1; channels < 8; channels++) {
1176 GAvgPoolMicrokernelTester()
1177 .rows(7)
1178 .channels(channels)
1179 .qmax(128)
1180 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1181 }
1182 }
1183
1184 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_lt_8_fulltile_with_qmin) {
1185 TEST_REQUIRES_ARM_NEON;
1186 for (size_t channels = 1; channels < 8; channels++) {
1187 GAvgPoolMicrokernelTester()
1188 .rows(7)
1189 .channels(channels)
1190 .qmin(128)
1191 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1192 }
1193 }
1194
1195 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_gt_8_fulltile) {
1196 TEST_REQUIRES_ARM_NEON;
1197 for (size_t channels = 9; channels < 16; channels++) {
1198 GAvgPoolMicrokernelTester()
1199 .rows(7)
1200 .channels(channels)
1201 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1202 }
1203 }
1204
1205 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_gt_8_subtile) {
1206 TEST_REQUIRES_ARM_NEON;
1207 for (size_t channels = 9; channels < 16; channels++) {
1208 for (size_t rows = 1; rows < 7; rows++) {
1209 GAvgPoolMicrokernelTester()
1210 .rows(rows)
1211 .channels(channels)
1212 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1213 }
1214 }
1215 }
1216
1217 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_gt_8_fulltile_with_qmax) {
1218 TEST_REQUIRES_ARM_NEON;
1219 for (size_t channels = 9; channels < 16; channels++) {
1220 GAvgPoolMicrokernelTester()
1221 .rows(7)
1222 .channels(channels)
1223 .qmax(128)
1224 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1225 }
1226 }
1227
1228 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C8, channels_gt_8_fulltile_with_qmin) {
1229 TEST_REQUIRES_ARM_NEON;
1230 for (size_t channels = 9; channels < 16; channels++) {
1231 GAvgPoolMicrokernelTester()
1232 .rows(7)
1233 .channels(channels)
1234 .qmin(128)
1235 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c8, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1236 }
1237 }
1238#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1239
1240
1241#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1242 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_eq_16_fulltile) {
1243 TEST_REQUIRES_ARM_NEON;
1244 GAvgPoolMicrokernelTester()
1245 .rows(7)
1246 .channels(16)
1247 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1248 }
1249
1250 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_eq_16_subtile) {
1251 TEST_REQUIRES_ARM_NEON;
1252 for (size_t rows = 1; rows < 7; rows++) {
1253 GAvgPoolMicrokernelTester()
1254 .rows(rows)
1255 .channels(16)
1256 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1257 }
1258 }
1259
1260 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_eq_16_fulltile_with_input_stride) {
1261 TEST_REQUIRES_ARM_NEON;
1262 GAvgPoolMicrokernelTester()
1263 .rows(7)
1264 .channels(16)
1265 .input_stride(19)
1266 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1267 }
1268
1269 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_eq_16_fulltile_with_qmax) {
1270 TEST_REQUIRES_ARM_NEON;
1271 GAvgPoolMicrokernelTester()
1272 .rows(7)
1273 .channels(16)
1274 .qmax(128)
1275 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1276 }
1277
1278 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_eq_16_fulltile_with_qmin) {
1279 TEST_REQUIRES_ARM_NEON;
1280 GAvgPoolMicrokernelTester()
1281 .rows(7)
1282 .channels(16)
1283 .qmin(128)
1284 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1285 }
1286
1287 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_div_16_fulltile) {
1288 TEST_REQUIRES_ARM_NEON;
1289 for (size_t channels = 32; channels < 128; channels += 16) {
1290 GAvgPoolMicrokernelTester()
1291 .rows(7)
1292 .channels(channels)
1293 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1294 }
1295 }
1296
1297 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_div_16_subtile) {
1298 TEST_REQUIRES_ARM_NEON;
1299 for (size_t channels = 32; channels < 128; channels += 16) {
1300 for (size_t rows = 1; rows < 7; rows++) {
1301 GAvgPoolMicrokernelTester()
1302 .rows(rows)
1303 .channels(channels)
1304 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1305 }
1306 }
1307 }
1308
1309 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_lt_16_fulltile) {
1310 TEST_REQUIRES_ARM_NEON;
1311 for (size_t channels = 1; channels < 16; channels++) {
1312 GAvgPoolMicrokernelTester()
1313 .rows(7)
1314 .channels(channels)
1315 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1316 }
1317 }
1318
1319 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_lt_16_subtile) {
1320 TEST_REQUIRES_ARM_NEON;
1321 for (size_t channels = 1; channels < 16; channels++) {
1322 for (size_t rows = 1; rows < 7; rows++) {
1323 GAvgPoolMicrokernelTester()
1324 .rows(rows)
1325 .channels(channels)
1326 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1327 }
1328 }
1329 }
1330
1331 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_lt_16_fulltile_with_qmax) {
1332 TEST_REQUIRES_ARM_NEON;
1333 for (size_t channels = 1; channels < 16; channels++) {
1334 GAvgPoolMicrokernelTester()
1335 .rows(7)
1336 .channels(channels)
1337 .qmax(128)
1338 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1339 }
1340 }
1341
1342 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_lt_16_fulltile_with_qmin) {
1343 TEST_REQUIRES_ARM_NEON;
1344 for (size_t channels = 1; channels < 16; channels++) {
1345 GAvgPoolMicrokernelTester()
1346 .rows(7)
1347 .channels(channels)
1348 .qmin(128)
1349 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1350 }
1351 }
1352
1353 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_gt_16_fulltile) {
1354 TEST_REQUIRES_ARM_NEON;
1355 for (size_t channels = 17; channels < 32; channels++) {
1356 GAvgPoolMicrokernelTester()
1357 .rows(7)
1358 .channels(channels)
1359 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1360 }
1361 }
1362
1363 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_gt_16_subtile) {
1364 TEST_REQUIRES_ARM_NEON;
1365 for (size_t channels = 17; channels < 32; channels++) {
1366 for (size_t rows = 1; rows < 7; rows++) {
1367 GAvgPoolMicrokernelTester()
1368 .rows(rows)
1369 .channels(channels)
1370 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1371 }
1372 }
1373 }
1374
1375 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_gt_16_fulltile_with_qmax) {
1376 TEST_REQUIRES_ARM_NEON;
1377 for (size_t channels = 17; channels < 32; channels++) {
1378 GAvgPoolMicrokernelTester()
1379 .rows(7)
1380 .channels(channels)
1381 .qmax(128)
1382 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1383 }
1384 }
1385
1386 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C16, channels_gt_16_fulltile_with_qmin) {
1387 TEST_REQUIRES_ARM_NEON;
1388 for (size_t channels = 17; channels < 32; channels++) {
1389 GAvgPoolMicrokernelTester()
1390 .rows(7)
1391 .channels(channels)
1392 .qmin(128)
1393 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c16, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1394 }
1395 }
1396#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1397
1398
1399#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1400 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_eq_24_fulltile) {
1401 TEST_REQUIRES_ARM_NEON;
1402 GAvgPoolMicrokernelTester()
1403 .rows(7)
1404 .channels(24)
1405 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1406 }
1407
1408 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_eq_24_subtile) {
1409 TEST_REQUIRES_ARM_NEON;
1410 for (size_t rows = 1; rows < 7; rows++) {
1411 GAvgPoolMicrokernelTester()
1412 .rows(rows)
1413 .channels(24)
1414 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1415 }
1416 }
1417
1418 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_eq_24_fulltile_with_input_stride) {
1419 TEST_REQUIRES_ARM_NEON;
1420 GAvgPoolMicrokernelTester()
1421 .rows(7)
1422 .channels(24)
1423 .input_stride(29)
1424 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1425 }
1426
1427 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_eq_24_fulltile_with_qmax) {
1428 TEST_REQUIRES_ARM_NEON;
1429 GAvgPoolMicrokernelTester()
1430 .rows(7)
1431 .channels(24)
1432 .qmax(128)
1433 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1434 }
1435
1436 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_eq_24_fulltile_with_qmin) {
1437 TEST_REQUIRES_ARM_NEON;
1438 GAvgPoolMicrokernelTester()
1439 .rows(7)
1440 .channels(24)
1441 .qmin(128)
1442 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1443 }
1444
1445 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_div_24_fulltile) {
1446 TEST_REQUIRES_ARM_NEON;
1447 for (size_t channels = 48; channels < 192; channels += 24) {
1448 GAvgPoolMicrokernelTester()
1449 .rows(7)
1450 .channels(channels)
1451 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1452 }
1453 }
1454
1455 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_div_24_subtile) {
1456 TEST_REQUIRES_ARM_NEON;
1457 for (size_t channels = 48; channels < 192; channels += 24) {
1458 for (size_t rows = 1; rows < 7; rows++) {
1459 GAvgPoolMicrokernelTester()
1460 .rows(rows)
1461 .channels(channels)
1462 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1463 }
1464 }
1465 }
1466
1467 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_lt_24_fulltile) {
1468 TEST_REQUIRES_ARM_NEON;
1469 for (size_t channels = 1; channels < 24; channels++) {
1470 GAvgPoolMicrokernelTester()
1471 .rows(7)
1472 .channels(channels)
1473 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1474 }
1475 }
1476
1477 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_lt_24_subtile) {
1478 TEST_REQUIRES_ARM_NEON;
1479 for (size_t channels = 1; channels < 24; channels++) {
1480 for (size_t rows = 1; rows < 7; rows++) {
1481 GAvgPoolMicrokernelTester()
1482 .rows(rows)
1483 .channels(channels)
1484 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1485 }
1486 }
1487 }
1488
1489 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_lt_24_fulltile_with_qmax) {
1490 TEST_REQUIRES_ARM_NEON;
1491 for (size_t channels = 1; channels < 24; channels++) {
1492 GAvgPoolMicrokernelTester()
1493 .rows(7)
1494 .channels(channels)
1495 .qmax(128)
1496 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1497 }
1498 }
1499
1500 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_lt_24_fulltile_with_qmin) {
1501 TEST_REQUIRES_ARM_NEON;
1502 for (size_t channels = 1; channels < 24; channels++) {
1503 GAvgPoolMicrokernelTester()
1504 .rows(7)
1505 .channels(channels)
1506 .qmin(128)
1507 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1508 }
1509 }
1510
1511 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_gt_24_fulltile) {
1512 TEST_REQUIRES_ARM_NEON;
1513 for (size_t channels = 25; channels < 48; channels++) {
1514 GAvgPoolMicrokernelTester()
1515 .rows(7)
1516 .channels(channels)
1517 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1518 }
1519 }
1520
1521 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_gt_24_subtile) {
1522 TEST_REQUIRES_ARM_NEON;
1523 for (size_t channels = 25; channels < 48; channels++) {
1524 for (size_t rows = 1; rows < 7; rows++) {
1525 GAvgPoolMicrokernelTester()
1526 .rows(rows)
1527 .channels(channels)
1528 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1529 }
1530 }
1531 }
1532
1533 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_gt_24_fulltile_with_qmax) {
1534 TEST_REQUIRES_ARM_NEON;
1535 for (size_t channels = 25; channels < 48; channels++) {
1536 GAvgPoolMicrokernelTester()
1537 .rows(7)
1538 .channels(channels)
1539 .qmax(128)
1540 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1541 }
1542 }
1543
1544 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C24, channels_gt_24_fulltile_with_qmin) {
1545 TEST_REQUIRES_ARM_NEON;
1546 for (size_t channels = 25; channels < 48; channels++) {
1547 GAvgPoolMicrokernelTester()
1548 .rows(7)
1549 .channels(channels)
1550 .qmin(128)
1551 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c24, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1552 }
1553 }
1554#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1555
1556
1557#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1558 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_eq_32_fulltile) {
1559 TEST_REQUIRES_ARM_NEON;
1560 GAvgPoolMicrokernelTester()
1561 .rows(7)
1562 .channels(32)
1563 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1564 }
1565
1566 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_eq_32_subtile) {
1567 TEST_REQUIRES_ARM_NEON;
1568 for (size_t rows = 1; rows < 7; rows++) {
1569 GAvgPoolMicrokernelTester()
1570 .rows(rows)
1571 .channels(32)
1572 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1573 }
1574 }
1575
1576 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_eq_32_fulltile_with_input_stride) {
1577 TEST_REQUIRES_ARM_NEON;
1578 GAvgPoolMicrokernelTester()
1579 .rows(7)
1580 .channels(32)
1581 .input_stride(37)
1582 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1583 }
1584
1585 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_eq_32_fulltile_with_qmax) {
1586 TEST_REQUIRES_ARM_NEON;
1587 GAvgPoolMicrokernelTester()
1588 .rows(7)
1589 .channels(32)
1590 .qmax(128)
1591 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1592 }
1593
1594 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_eq_32_fulltile_with_qmin) {
1595 TEST_REQUIRES_ARM_NEON;
1596 GAvgPoolMicrokernelTester()
1597 .rows(7)
1598 .channels(32)
1599 .qmin(128)
1600 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1601 }
1602
1603 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_div_32_fulltile) {
1604 TEST_REQUIRES_ARM_NEON;
1605 for (size_t channels = 64; channels < 256; channels += 32) {
1606 GAvgPoolMicrokernelTester()
1607 .rows(7)
1608 .channels(channels)
1609 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1610 }
1611 }
1612
1613 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_div_32_subtile) {
1614 TEST_REQUIRES_ARM_NEON;
1615 for (size_t channels = 64; channels < 256; channels += 32) {
1616 for (size_t rows = 1; rows < 7; rows++) {
1617 GAvgPoolMicrokernelTester()
1618 .rows(rows)
1619 .channels(channels)
1620 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1621 }
1622 }
1623 }
1624
1625 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_lt_32_fulltile) {
1626 TEST_REQUIRES_ARM_NEON;
1627 for (size_t channels = 1; channels < 32; channels++) {
1628 GAvgPoolMicrokernelTester()
1629 .rows(7)
1630 .channels(channels)
1631 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1632 }
1633 }
1634
1635 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_lt_32_subtile) {
1636 TEST_REQUIRES_ARM_NEON;
1637 for (size_t channels = 1; channels < 32; channels++) {
1638 for (size_t rows = 1; rows < 7; rows++) {
1639 GAvgPoolMicrokernelTester()
1640 .rows(rows)
1641 .channels(channels)
1642 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1643 }
1644 }
1645 }
1646
1647 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_lt_32_fulltile_with_qmax) {
1648 TEST_REQUIRES_ARM_NEON;
1649 for (size_t channels = 1; channels < 32; channels++) {
1650 GAvgPoolMicrokernelTester()
1651 .rows(7)
1652 .channels(channels)
1653 .qmax(128)
1654 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1655 }
1656 }
1657
1658 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_lt_32_fulltile_with_qmin) {
1659 TEST_REQUIRES_ARM_NEON;
1660 for (size_t channels = 1; channels < 32; channels++) {
1661 GAvgPoolMicrokernelTester()
1662 .rows(7)
1663 .channels(channels)
1664 .qmin(128)
1665 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1666 }
1667 }
1668
1669 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_gt_32_fulltile) {
1670 TEST_REQUIRES_ARM_NEON;
1671 for (size_t channels = 33; channels < 64; channels++) {
1672 GAvgPoolMicrokernelTester()
1673 .rows(7)
1674 .channels(channels)
1675 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1676 }
1677 }
1678
1679 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_gt_32_subtile) {
1680 TEST_REQUIRES_ARM_NEON;
1681 for (size_t channels = 33; channels < 64; channels++) {
1682 for (size_t rows = 1; rows < 7; rows++) {
1683 GAvgPoolMicrokernelTester()
1684 .rows(rows)
1685 .channels(channels)
1686 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1687 }
1688 }
1689 }
1690
1691 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_gt_32_fulltile_with_qmax) {
1692 TEST_REQUIRES_ARM_NEON;
1693 for (size_t channels = 33; channels < 64; channels++) {
1694 GAvgPoolMicrokernelTester()
1695 .rows(7)
1696 .channels(channels)
1697 .qmax(128)
1698 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1699 }
1700 }
1701
1702 TEST(QU8_GAVGPOOL_MINMAX_RNDNU_7X__NEON_C32, channels_gt_32_fulltile_with_qmin) {
1703 TEST_REQUIRES_ARM_NEON;
1704 for (size_t channels = 33; channels < 64; channels++) {
1705 GAvgPoolMicrokernelTester()
1706 .rows(7)
1707 .channels(channels)
1708 .qmin(128)
1709 .Test(xnn_qu8_gavgpool_minmax_rndnu_ukernel_7x__neon_c32, xnn_init_qu8_avgpool_minmax_rndnu_neon_params, xnn_qu8_requantize_rndnu);
1710 }
1711 }
1712#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64