blob: 52bf748a4365a7e617197530cf73269757e8255b [file] [log] [blame]
Marat Dukhana6c05162021-05-13 16:52:02 -07001// Copyright 2019 Google LLC
XNNPACK Teamb455b122019-09-27 18:10:33 -07002//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
Marat Dukhan5c5fa962020-03-10 18:38:33 -07005//
6// Auto-generated file. Do not edit!
Marat Dukhan6674d692021-05-05 22:27:00 -07007// Specification: test/u8-vclamp.yaml
Marat Dukhana6c05162021-05-13 16:52:02 -07008// Generator: tools/generate-vunary-test.py
Marat Dukhan5c5fa962020-03-10 18:38:33 -07009
XNNPACK Teamb455b122019-09-27 18:10:33 -070010
XNNPACK Teamb455b122019-09-27 18:10:33 -070011#include <gtest/gtest.h>
12
Marat Dukhan1dadbf72019-10-01 10:46:20 -070013#include <xnnpack/common.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070014#include <xnnpack/isa-checks.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070015
Marat Dukhan60d3f242021-05-13 11:59:02 -070016#include <xnnpack/vunary.h>
Marat Dukhana6c05162021-05-13 16:52:02 -070017#include "vunary-microkernel-tester.h"
XNNPACK Teamb455b122019-09-27 18:10:33 -070018
19
Marat Dukhan1dadbf72019-10-01 10:46:20 -070020#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Marat Dukhan6674d692021-05-05 22:27:00 -070021 TEST(U8_VCLAMP__NEON_X64, batch_eq_64) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070022 TEST_REQUIRES_ARM_NEON;
Marat Dukhana6c05162021-05-13 16:52:02 -070023 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -070024 .batch_size(64)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080025 .Test(xnn_u8_vclamp_ukernel__neon_x64, xnn_init_u8_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070026 }
27
Marat Dukhan6674d692021-05-05 22:27:00 -070028 TEST(U8_VCLAMP__NEON_X64, batch_div_64) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070029 TEST_REQUIRES_ARM_NEON;
Marat Dukhan5c5fa962020-03-10 18:38:33 -070030 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhana6c05162021-05-13 16:52:02 -070031 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -070032 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080033 .Test(xnn_u8_vclamp_ukernel__neon_x64, xnn_init_u8_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070034 }
35 }
36
Marat Dukhan6674d692021-05-05 22:27:00 -070037 TEST(U8_VCLAMP__NEON_X64, batch_lt_64) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070038 TEST_REQUIRES_ARM_NEON;
Marat Dukhan5c5fa962020-03-10 18:38:33 -070039 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhana6c05162021-05-13 16:52:02 -070040 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -070041 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080042 .Test(xnn_u8_vclamp_ukernel__neon_x64, xnn_init_u8_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070043 }
44 }
45
Marat Dukhan6674d692021-05-05 22:27:00 -070046 TEST(U8_VCLAMP__NEON_X64, batch_gt_64) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070047 TEST_REQUIRES_ARM_NEON;
Marat Dukhan5c5fa962020-03-10 18:38:33 -070048 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhana6c05162021-05-13 16:52:02 -070049 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -070050 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080051 .Test(xnn_u8_vclamp_ukernel__neon_x64, xnn_init_u8_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070052 }
53 }
54
Marat Dukhan6674d692021-05-05 22:27:00 -070055 TEST(U8_VCLAMP__NEON_X64, inplace) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070056 TEST_REQUIRES_ARM_NEON;
Marat Dukhan5c5fa962020-03-10 18:38:33 -070057 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhana6c05162021-05-13 16:52:02 -070058 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -070059 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -070060 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080061 .Test(xnn_u8_vclamp_ukernel__neon_x64, xnn_init_u8_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070062 }
63 }
64
Marat Dukhan6674d692021-05-05 22:27:00 -070065 TEST(U8_VCLAMP__NEON_X64, qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070066 TEST_REQUIRES_ARM_NEON;
Marat Dukhana6c05162021-05-13 16:52:02 -070067 for (uint8_t qmin = 1; qmin < 255; qmin++) {
68 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
69 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -070070 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -070071 .qmin(qmin)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080072 .Test(xnn_u8_vclamp_ukernel__neon_x64, xnn_init_u8_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070073 }
74 }
75 }
76
Marat Dukhan6674d692021-05-05 22:27:00 -070077 TEST(U8_VCLAMP__NEON_X64, qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070078 TEST_REQUIRES_ARM_NEON;
Marat Dukhana6c05162021-05-13 16:52:02 -070079 for (uint8_t qmax = 1; qmax < 255; qmax++) {
80 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
81 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -070082 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -070083 .qmax(qmax)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080084 .Test(xnn_u8_vclamp_ukernel__neon_x64, xnn_init_u8_minmax_neon_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070085 }
86 }
87 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -070088#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
XNNPACK Teamb455b122019-09-27 18:10:33 -070089
Marat Dukhan5c5fa962020-03-10 18:38:33 -070090
Marat Dukhan1dadbf72019-10-01 10:46:20 -070091#if XNN_ARCH_X86 || XNN_ARCH_X86_64
Marat Dukhan6674d692021-05-05 22:27:00 -070092 TEST(U8_VCLAMP__SSE2_X64, batch_eq_64) {
XNNPACK Teamb455b122019-09-27 18:10:33 -070093 TEST_REQUIRES_X86_SSE2;
Marat Dukhana6c05162021-05-13 16:52:02 -070094 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -070095 .batch_size(64)
Marat Dukhan0d10cc72021-12-23 19:49:19 -080096 .Test(xnn_u8_vclamp_ukernel__sse2_x64, xnn_init_u8_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -070097 }
98
Marat Dukhan6674d692021-05-05 22:27:00 -070099 TEST(U8_VCLAMP__SSE2_X64, batch_div_64) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700100 TEST_REQUIRES_X86_SSE2;
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700101 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700102 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700103 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800104 .Test(xnn_u8_vclamp_ukernel__sse2_x64, xnn_init_u8_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700105 }
106 }
107
Marat Dukhan6674d692021-05-05 22:27:00 -0700108 TEST(U8_VCLAMP__SSE2_X64, batch_lt_64) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700109 TEST_REQUIRES_X86_SSE2;
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700110 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700111 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700112 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800113 .Test(xnn_u8_vclamp_ukernel__sse2_x64, xnn_init_u8_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700114 }
115 }
116
Marat Dukhan6674d692021-05-05 22:27:00 -0700117 TEST(U8_VCLAMP__SSE2_X64, batch_gt_64) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700118 TEST_REQUIRES_X86_SSE2;
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700119 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700120 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700121 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800122 .Test(xnn_u8_vclamp_ukernel__sse2_x64, xnn_init_u8_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700123 }
124 }
125
Marat Dukhan6674d692021-05-05 22:27:00 -0700126 TEST(U8_VCLAMP__SSE2_X64, inplace) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700127 TEST_REQUIRES_X86_SSE2;
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700128 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700129 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700130 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700131 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800132 .Test(xnn_u8_vclamp_ukernel__sse2_x64, xnn_init_u8_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700133 }
134 }
135
Marat Dukhan6674d692021-05-05 22:27:00 -0700136 TEST(U8_VCLAMP__SSE2_X64, qmin) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700137 TEST_REQUIRES_X86_SSE2;
Marat Dukhana6c05162021-05-13 16:52:02 -0700138 for (uint8_t qmin = 1; qmin < 255; qmin++) {
139 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
140 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700141 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700142 .qmin(qmin)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800143 .Test(xnn_u8_vclamp_ukernel__sse2_x64, xnn_init_u8_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700144 }
145 }
146 }
147
Marat Dukhan6674d692021-05-05 22:27:00 -0700148 TEST(U8_VCLAMP__SSE2_X64, qmax) {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700149 TEST_REQUIRES_X86_SSE2;
Marat Dukhana6c05162021-05-13 16:52:02 -0700150 for (uint8_t qmax = 1; qmax < 255; qmax++) {
151 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
152 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700153 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700154 .qmax(qmax)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800155 .Test(xnn_u8_vclamp_ukernel__sse2_x64, xnn_init_u8_minmax_sse2_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700156 }
157 }
158 }
Marat Dukhan1dadbf72019-10-01 10:46:20 -0700159#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
XNNPACK Teamb455b122019-09-27 18:10:33 -0700160
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700161
Marat Dukhan4c617792021-12-21 15:47:58 -0800162#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700163 TEST(U8_VCLAMP__WASMSIMD_X64, batch_eq_64) {
164 VUnaryMicrokernelTester()
165 .batch_size(64)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800166 .Test(xnn_u8_vclamp_ukernel__wasmsimd_x64, xnn_init_u8_minmax_wasmsimd_params);
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700167 }
168
169 TEST(U8_VCLAMP__WASMSIMD_X64, batch_div_64) {
170 for (size_t batch_size = 128; batch_size < 640; batch_size += 64) {
171 VUnaryMicrokernelTester()
172 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800173 .Test(xnn_u8_vclamp_ukernel__wasmsimd_x64, xnn_init_u8_minmax_wasmsimd_params);
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700174 }
175 }
176
177 TEST(U8_VCLAMP__WASMSIMD_X64, batch_lt_64) {
178 for (size_t batch_size = 1; batch_size < 64; batch_size++) {
179 VUnaryMicrokernelTester()
180 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800181 .Test(xnn_u8_vclamp_ukernel__wasmsimd_x64, xnn_init_u8_minmax_wasmsimd_params);
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700182 }
183 }
184
185 TEST(U8_VCLAMP__WASMSIMD_X64, batch_gt_64) {
186 for (size_t batch_size = 65; batch_size < 128; batch_size++) {
187 VUnaryMicrokernelTester()
188 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800189 .Test(xnn_u8_vclamp_ukernel__wasmsimd_x64, xnn_init_u8_minmax_wasmsimd_params);
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700190 }
191 }
192
193 TEST(U8_VCLAMP__WASMSIMD_X64, inplace) {
194 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
195 VUnaryMicrokernelTester()
196 .batch_size(batch_size)
197 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800198 .Test(xnn_u8_vclamp_ukernel__wasmsimd_x64, xnn_init_u8_minmax_wasmsimd_params);
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700199 }
200 }
201
202 TEST(U8_VCLAMP__WASMSIMD_X64, qmin) {
203 for (uint8_t qmin = 1; qmin < 255; qmin++) {
204 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
205 VUnaryMicrokernelTester()
206 .batch_size(batch_size)
207 .qmin(qmin)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800208 .Test(xnn_u8_vclamp_ukernel__wasmsimd_x64, xnn_init_u8_minmax_wasmsimd_params);
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700209 }
210 }
211 }
212
213 TEST(U8_VCLAMP__WASMSIMD_X64, qmax) {
214 for (uint8_t qmax = 1; qmax < 255; qmax++) {
215 for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) {
216 VUnaryMicrokernelTester()
217 .batch_size(batch_size)
218 .qmax(qmax)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800219 .Test(xnn_u8_vclamp_ukernel__wasmsimd_x64, xnn_init_u8_minmax_wasmsimd_params);
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700220 }
221 }
222 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800223#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan1f5b1082021-08-16 17:01:44 -0700224
225
Marat Dukhan6674d692021-05-05 22:27:00 -0700226TEST(U8_VCLAMP__SCALAR_X4, batch_eq_4) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700227 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700228 .batch_size(4)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800229 .Test(xnn_u8_vclamp_ukernel__scalar_x4, xnn_init_u8_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700230}
231
Marat Dukhan6674d692021-05-05 22:27:00 -0700232TEST(U8_VCLAMP__SCALAR_X4, batch_div_4) {
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700233 for (size_t batch_size = 8; batch_size < 40; batch_size += 4) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700234 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700235 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800236 .Test(xnn_u8_vclamp_ukernel__scalar_x4, xnn_init_u8_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700237 }
238}
239
Marat Dukhan6674d692021-05-05 22:27:00 -0700240TEST(U8_VCLAMP__SCALAR_X4, batch_lt_4) {
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700241 for (size_t batch_size = 1; batch_size < 4; batch_size++) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700242 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700243 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800244 .Test(xnn_u8_vclamp_ukernel__scalar_x4, xnn_init_u8_minmax_scalar_params);
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700245 }
246}
247
Marat Dukhan6674d692021-05-05 22:27:00 -0700248TEST(U8_VCLAMP__SCALAR_X4, batch_gt_4) {
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700249 for (size_t batch_size = 5; batch_size < 8; batch_size++) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700250 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700251 .batch_size(batch_size)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800252 .Test(xnn_u8_vclamp_ukernel__scalar_x4, xnn_init_u8_minmax_scalar_params);
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700253 }
254}
255
Marat Dukhan6674d692021-05-05 22:27:00 -0700256TEST(U8_VCLAMP__SCALAR_X4, inplace) {
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700257 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700258 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700259 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700260 .inplace(true)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800261 .Test(xnn_u8_vclamp_ukernel__scalar_x4, xnn_init_u8_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700262 }
263}
264
Marat Dukhan6674d692021-05-05 22:27:00 -0700265TEST(U8_VCLAMP__SCALAR_X4, qmin) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700266 for (uint8_t qmin = 1; qmin < 255; qmin++) {
267 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
268 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700269 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700270 .qmin(qmin)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800271 .Test(xnn_u8_vclamp_ukernel__scalar_x4, xnn_init_u8_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700272 }
273 }
274}
275
Marat Dukhan6674d692021-05-05 22:27:00 -0700276TEST(U8_VCLAMP__SCALAR_X4, qmax) {
Marat Dukhana6c05162021-05-13 16:52:02 -0700277 for (uint8_t qmax = 1; qmax < 255; qmax++) {
278 for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) {
279 VUnaryMicrokernelTester()
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700280 .batch_size(batch_size)
XNNPACK Teamb455b122019-09-27 18:10:33 -0700281 .qmax(qmax)
Marat Dukhan0d10cc72021-12-23 19:49:19 -0800282 .Test(xnn_u8_vclamp_ukernel__scalar_x4, xnn_init_u8_minmax_scalar_params);
XNNPACK Teamb455b122019-09-27 18:10:33 -0700283 }
284 }
Marat Dukhana6c05162021-05-13 16:52:02 -0700285}