Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | // |
| 9 | // Auto-generated file. Do not edit! |
| 10 | // Specification: test/f32-igemm-relu.yaml |
| 11 | // Generator: tools/generate-gemm-test.py |
| 12 | |
| 13 | |
| 14 | #include <gtest/gtest.h> |
| 15 | |
Frank Barchard | 447aa7b | 2021-12-28 14:11:40 -0800 | [diff] [blame] | 16 | #include <xnnpack/allocator.h> |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 17 | #include <xnnpack/common.h> |
| 18 | #include <xnnpack/isa-checks.h> |
| 19 | |
| 20 | #include <xnnpack/gemm.h> |
| 21 | #include <xnnpack/igemm.h> |
| 22 | #include <xnnpack/ppmm.h> |
| 23 | #include "gemm-microkernel-tester.h" |
| 24 | |
| 25 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 27 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_eq_4) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 28 | GemmMicrokernelTester() |
| 29 | .mr(1) |
| 30 | .nr(8) |
| 31 | .kr(1) |
| 32 | .sr(1) |
| 33 | .m(1) |
| 34 | .n(8) |
| 35 | .k(4) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 36 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 37 | } |
| 38 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 39 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, strided_cn) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 40 | GemmMicrokernelTester() |
| 41 | .mr(1) |
| 42 | .nr(8) |
| 43 | .kr(1) |
| 44 | .sr(1) |
| 45 | .m(1) |
| 46 | .n(8) |
| 47 | .k(4) |
| 48 | .cn_stride(11) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 49 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 50 | } |
| 51 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 52 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_eq_4_subtile) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 53 | for (uint32_t n = 1; n <= 8; n++) { |
| 54 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 55 | GemmMicrokernelTester() |
| 56 | .mr(1) |
| 57 | .nr(8) |
| 58 | .kr(1) |
| 59 | .sr(1) |
| 60 | .m(m) |
| 61 | .n(n) |
| 62 | .k(4) |
| 63 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 64 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 65 | } |
| 66 | } |
| 67 | } |
| 68 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 69 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_eq_4_subtile_m) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 70 | for (uint32_t m = 1; m <= 1; m++) { |
| 71 | GemmMicrokernelTester() |
| 72 | .mr(1) |
| 73 | .nr(8) |
| 74 | .kr(1) |
| 75 | .sr(1) |
| 76 | .m(m) |
| 77 | .n(8) |
| 78 | .k(4) |
| 79 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 80 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 81 | } |
| 82 | } |
| 83 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 84 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_eq_4_subtile_n) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 85 | for (uint32_t n = 1; n <= 8; n++) { |
| 86 | GemmMicrokernelTester() |
| 87 | .mr(1) |
| 88 | .nr(8) |
| 89 | .kr(1) |
| 90 | .sr(1) |
| 91 | .m(1) |
| 92 | .n(n) |
| 93 | .k(4) |
| 94 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 95 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 96 | } |
| 97 | } |
| 98 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 99 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_lt_4) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 100 | for (size_t k = 1; k < 4; k++) { |
| 101 | GemmMicrokernelTester() |
| 102 | .mr(1) |
| 103 | .nr(8) |
| 104 | .kr(1) |
| 105 | .sr(1) |
| 106 | .m(1) |
| 107 | .n(8) |
| 108 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 109 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 110 | } |
| 111 | } |
| 112 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 113 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_lt_4_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 114 | for (size_t k = 1; k < 4; k++) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 115 | for (uint32_t n = 1; n <= 8; n++) { |
| 116 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 117 | GemmMicrokernelTester() |
| 118 | .mr(1) |
| 119 | .nr(8) |
| 120 | .kr(1) |
| 121 | .sr(1) |
| 122 | .m(m) |
| 123 | .n(n) |
| 124 | .k(k) |
| 125 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 126 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 127 | } |
| 128 | } |
| 129 | } |
| 130 | } |
| 131 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 132 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_gt_4) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 133 | for (size_t k = 5; k < 8; k++) { |
| 134 | GemmMicrokernelTester() |
| 135 | .mr(1) |
| 136 | .nr(8) |
| 137 | .kr(1) |
| 138 | .sr(1) |
| 139 | .m(1) |
| 140 | .n(8) |
| 141 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 142 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 143 | } |
| 144 | } |
| 145 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 146 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_gt_4_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 147 | for (size_t k = 5; k < 8; k++) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 148 | for (uint32_t n = 1; n <= 8; n++) { |
| 149 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 150 | GemmMicrokernelTester() |
| 151 | .mr(1) |
| 152 | .nr(8) |
| 153 | .kr(1) |
| 154 | .sr(1) |
| 155 | .m(m) |
| 156 | .n(n) |
| 157 | .k(k) |
| 158 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 159 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 160 | } |
| 161 | } |
| 162 | } |
| 163 | } |
| 164 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 165 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_div_4) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 166 | for (size_t k = 8; k <= 40; k += 4) { |
| 167 | GemmMicrokernelTester() |
| 168 | .mr(1) |
| 169 | .nr(8) |
| 170 | .kr(1) |
| 171 | .sr(1) |
| 172 | .m(1) |
| 173 | .n(8) |
| 174 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 175 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 176 | } |
| 177 | } |
| 178 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 179 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, k_div_4_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 180 | for (size_t k = 8; k <= 40; k += 4) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 181 | for (uint32_t n = 1; n <= 8; n++) { |
| 182 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 183 | GemmMicrokernelTester() |
| 184 | .mr(1) |
| 185 | .nr(8) |
| 186 | .kr(1) |
| 187 | .sr(1) |
| 188 | .m(m) |
| 189 | .n(n) |
| 190 | .k(k) |
| 191 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 192 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 193 | } |
| 194 | } |
| 195 | } |
| 196 | } |
| 197 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 198 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, n_gt_8) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 199 | for (uint32_t n = 9; n < 16; n++) { |
| 200 | for (size_t k = 1; k <= 20; k += 5) { |
| 201 | GemmMicrokernelTester() |
| 202 | .mr(1) |
| 203 | .nr(8) |
| 204 | .kr(1) |
| 205 | .sr(1) |
| 206 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 207 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 208 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 209 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 210 | } |
| 211 | } |
| 212 | } |
| 213 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 214 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, n_gt_8_strided_cn) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 215 | for (uint32_t n = 9; n < 16; n++) { |
| 216 | for (size_t k = 1; k <= 20; k += 5) { |
| 217 | GemmMicrokernelTester() |
| 218 | .mr(1) |
| 219 | .nr(8) |
| 220 | .kr(1) |
| 221 | .sr(1) |
| 222 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 223 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 224 | .k(k) |
| 225 | .cn_stride(11) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 226 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 227 | } |
| 228 | } |
| 229 | } |
| 230 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 231 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, n_gt_8_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 232 | for (uint32_t n = 9; n < 16; n++) { |
| 233 | for (size_t k = 1; k <= 20; k += 5) { |
| 234 | for (uint32_t m = 1; m <= 1; m++) { |
| 235 | GemmMicrokernelTester() |
| 236 | .mr(1) |
| 237 | .nr(8) |
| 238 | .kr(1) |
| 239 | .sr(1) |
| 240 | .m(m) |
| 241 | .n(n) |
| 242 | .k(k) |
| 243 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 244 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 245 | } |
| 246 | } |
| 247 | } |
| 248 | } |
| 249 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 250 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, n_div_8) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 251 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 252 | for (size_t k = 1; k <= 20; k += 5) { |
| 253 | GemmMicrokernelTester() |
| 254 | .mr(1) |
| 255 | .nr(8) |
| 256 | .kr(1) |
| 257 | .sr(1) |
| 258 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 259 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 260 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 261 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 262 | } |
| 263 | } |
| 264 | } |
| 265 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 266 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, n_div_8_strided_cn) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 267 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 268 | for (size_t k = 1; k <= 20; k += 5) { |
| 269 | GemmMicrokernelTester() |
| 270 | .mr(1) |
| 271 | .nr(8) |
| 272 | .kr(1) |
| 273 | .sr(1) |
| 274 | .m(1) |
| 275 | .n(n) |
| 276 | .k(k) |
| 277 | .cn_stride(11) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 278 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 279 | } |
| 280 | } |
| 281 | } |
| 282 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 283 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, n_div_8_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 284 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 285 | for (size_t k = 1; k <= 20; k += 5) { |
| 286 | for (uint32_t m = 1; m <= 1; m++) { |
| 287 | GemmMicrokernelTester() |
| 288 | .mr(1) |
| 289 | .nr(8) |
| 290 | .kr(1) |
| 291 | .sr(1) |
| 292 | .m(m) |
| 293 | .n(n) |
| 294 | .k(k) |
| 295 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 296 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 297 | } |
| 298 | } |
| 299 | } |
| 300 | } |
| 301 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 302 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, small_kernel) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 303 | for (size_t k = 1; k <= 20; k += 5) { |
| 304 | GemmMicrokernelTester() |
| 305 | .mr(1) |
| 306 | .nr(8) |
| 307 | .kr(1) |
| 308 | .sr(1) |
| 309 | .m(1) |
| 310 | .n(8) |
| 311 | .k(k) |
| 312 | .ks(3) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 313 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 314 | } |
| 315 | } |
| 316 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 317 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, small_kernel_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 318 | for (size_t k = 1; k <= 20; k += 5) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 319 | for (uint32_t n = 1; n <= 8; n++) { |
| 320 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 321 | GemmMicrokernelTester() |
| 322 | .mr(1) |
| 323 | .nr(8) |
| 324 | .kr(1) |
| 325 | .sr(1) |
| 326 | .m(m) |
| 327 | .n(n) |
| 328 | .k(k) |
| 329 | .ks(3) |
| 330 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 331 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 332 | } |
| 333 | } |
| 334 | } |
| 335 | } |
| 336 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 337 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, n_gt_8_small_kernel) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 338 | for (uint32_t n = 9; n < 16; n++) { |
| 339 | for (size_t k = 1; k <= 20; k += 5) { |
| 340 | GemmMicrokernelTester() |
| 341 | .mr(1) |
| 342 | .nr(8) |
| 343 | .kr(1) |
| 344 | .sr(1) |
| 345 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 346 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 347 | .k(k) |
| 348 | .ks(3) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 349 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 350 | } |
| 351 | } |
| 352 | } |
| 353 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 354 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, n_div_8_small_kernel) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 355 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 356 | for (size_t k = 1; k <= 20; k += 5) { |
| 357 | GemmMicrokernelTester() |
| 358 | .mr(1) |
| 359 | .nr(8) |
| 360 | .kr(1) |
| 361 | .sr(1) |
| 362 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 363 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 364 | .k(k) |
| 365 | .ks(3) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 366 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 367 | } |
| 368 | } |
| 369 | } |
| 370 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 371 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, strided_cm_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 372 | for (size_t k = 1; k <= 20; k += 5) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 373 | for (uint32_t n = 1; n <= 8; n++) { |
| 374 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 375 | GemmMicrokernelTester() |
| 376 | .mr(1) |
| 377 | .nr(8) |
| 378 | .kr(1) |
| 379 | .sr(1) |
| 380 | .m(m) |
| 381 | .n(n) |
| 382 | .k(k) |
| 383 | .cm_stride(11) |
| 384 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 385 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 386 | } |
| 387 | } |
| 388 | } |
| 389 | } |
| 390 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 391 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, a_offset) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 392 | for (size_t k = 1; k <= 20; k += 5) { |
| 393 | GemmMicrokernelTester() |
| 394 | .mr(1) |
| 395 | .nr(8) |
| 396 | .kr(1) |
| 397 | .sr(1) |
| 398 | .m(1) |
| 399 | .n(8) |
| 400 | .k(k) |
| 401 | .ks(3) |
| 402 | .a_offset(23) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 403 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 404 | } |
| 405 | } |
| 406 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 407 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, zero) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 408 | for (size_t k = 1; k <= 20; k += 5) { |
| 409 | for (uint32_t mz = 0; mz < 1; mz++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 410 | GemmMicrokernelTester() |
| 411 | .mr(1) |
| 412 | .nr(8) |
| 413 | .kr(1) |
| 414 | .sr(1) |
| 415 | .m(1) |
| 416 | .n(8) |
| 417 | .k(k) |
| 418 | .ks(3) |
| 419 | .a_offset(23) |
| 420 | .zero_index(mz) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 421 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 422 | } |
| 423 | } |
| 424 | } |
| 425 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 426 | TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, strided_cm) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 427 | GemmMicrokernelTester() |
| 428 | .mr(1) |
| 429 | .nr(8) |
| 430 | .kr(1) |
| 431 | .sr(1) |
| 432 | .m(1) |
| 433 | .n(8) |
| 434 | .k(4) |
| 435 | .cm_stride(11) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 436 | .Test(xnn_f32_igemm_relu_ukernel_1x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 437 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 438 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 439 | |
| 440 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 441 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 442 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_eq_4) { |
| 443 | GemmMicrokernelTester() |
| 444 | .mr(4) |
| 445 | .nr(8) |
| 446 | .kr(1) |
| 447 | .sr(1) |
| 448 | .m(4) |
| 449 | .n(8) |
| 450 | .k(4) |
| 451 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 452 | } |
| 453 | |
| 454 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, strided_cn) { |
| 455 | GemmMicrokernelTester() |
| 456 | .mr(4) |
| 457 | .nr(8) |
| 458 | .kr(1) |
| 459 | .sr(1) |
| 460 | .m(4) |
| 461 | .n(8) |
| 462 | .k(4) |
| 463 | .cn_stride(11) |
| 464 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 465 | } |
| 466 | |
| 467 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_eq_4_subtile) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 468 | for (uint32_t n = 1; n <= 8; n++) { |
| 469 | for (uint32_t m = 1; m <= 4; m++) { |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 470 | GemmMicrokernelTester() |
| 471 | .mr(4) |
| 472 | .nr(8) |
| 473 | .kr(1) |
| 474 | .sr(1) |
| 475 | .m(m) |
| 476 | .n(n) |
| 477 | .k(4) |
| 478 | .iterations(1) |
| 479 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 480 | } |
| 481 | } |
| 482 | } |
| 483 | |
| 484 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_eq_4_subtile_m) { |
| 485 | for (uint32_t m = 1; m <= 4; m++) { |
| 486 | GemmMicrokernelTester() |
| 487 | .mr(4) |
| 488 | .nr(8) |
| 489 | .kr(1) |
| 490 | .sr(1) |
| 491 | .m(m) |
| 492 | .n(8) |
| 493 | .k(4) |
| 494 | .iterations(1) |
| 495 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 496 | } |
| 497 | } |
| 498 | |
| 499 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_eq_4_subtile_n) { |
| 500 | for (uint32_t n = 1; n <= 8; n++) { |
| 501 | GemmMicrokernelTester() |
| 502 | .mr(4) |
| 503 | .nr(8) |
| 504 | .kr(1) |
| 505 | .sr(1) |
| 506 | .m(4) |
| 507 | .n(n) |
| 508 | .k(4) |
| 509 | .iterations(1) |
| 510 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 511 | } |
| 512 | } |
| 513 | |
| 514 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_lt_4) { |
| 515 | for (size_t k = 1; k < 4; k++) { |
| 516 | GemmMicrokernelTester() |
| 517 | .mr(4) |
| 518 | .nr(8) |
| 519 | .kr(1) |
| 520 | .sr(1) |
| 521 | .m(4) |
| 522 | .n(8) |
| 523 | .k(k) |
| 524 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 525 | } |
| 526 | } |
| 527 | |
| 528 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_lt_4_subtile) { |
| 529 | for (size_t k = 1; k < 4; k++) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 530 | for (uint32_t n = 1; n <= 8; n++) { |
| 531 | for (uint32_t m = 1; m <= 4; m++) { |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 532 | GemmMicrokernelTester() |
| 533 | .mr(4) |
| 534 | .nr(8) |
| 535 | .kr(1) |
| 536 | .sr(1) |
| 537 | .m(m) |
| 538 | .n(n) |
| 539 | .k(k) |
| 540 | .iterations(1) |
| 541 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 542 | } |
| 543 | } |
| 544 | } |
| 545 | } |
| 546 | |
| 547 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_gt_4) { |
| 548 | for (size_t k = 5; k < 8; k++) { |
| 549 | GemmMicrokernelTester() |
| 550 | .mr(4) |
| 551 | .nr(8) |
| 552 | .kr(1) |
| 553 | .sr(1) |
| 554 | .m(4) |
| 555 | .n(8) |
| 556 | .k(k) |
| 557 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 558 | } |
| 559 | } |
| 560 | |
| 561 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_gt_4_subtile) { |
| 562 | for (size_t k = 5; k < 8; k++) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 563 | for (uint32_t n = 1; n <= 8; n++) { |
| 564 | for (uint32_t m = 1; m <= 4; m++) { |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 565 | GemmMicrokernelTester() |
| 566 | .mr(4) |
| 567 | .nr(8) |
| 568 | .kr(1) |
| 569 | .sr(1) |
| 570 | .m(m) |
| 571 | .n(n) |
| 572 | .k(k) |
| 573 | .iterations(1) |
| 574 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 575 | } |
| 576 | } |
| 577 | } |
| 578 | } |
| 579 | |
| 580 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_div_4) { |
| 581 | for (size_t k = 8; k <= 40; k += 4) { |
| 582 | GemmMicrokernelTester() |
| 583 | .mr(4) |
| 584 | .nr(8) |
| 585 | .kr(1) |
| 586 | .sr(1) |
| 587 | .m(4) |
| 588 | .n(8) |
| 589 | .k(k) |
| 590 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 591 | } |
| 592 | } |
| 593 | |
| 594 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, k_div_4_subtile) { |
| 595 | for (size_t k = 8; k <= 40; k += 4) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 596 | for (uint32_t n = 1; n <= 8; n++) { |
| 597 | for (uint32_t m = 1; m <= 4; m++) { |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 598 | GemmMicrokernelTester() |
| 599 | .mr(4) |
| 600 | .nr(8) |
| 601 | .kr(1) |
| 602 | .sr(1) |
| 603 | .m(m) |
| 604 | .n(n) |
| 605 | .k(k) |
| 606 | .iterations(1) |
| 607 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 608 | } |
| 609 | } |
| 610 | } |
| 611 | } |
| 612 | |
| 613 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, n_gt_8) { |
| 614 | for (uint32_t n = 9; n < 16; n++) { |
| 615 | for (size_t k = 1; k <= 20; k += 5) { |
| 616 | GemmMicrokernelTester() |
| 617 | .mr(4) |
| 618 | .nr(8) |
| 619 | .kr(1) |
| 620 | .sr(1) |
| 621 | .m(4) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 622 | .n(n) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 623 | .k(k) |
| 624 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 625 | } |
| 626 | } |
| 627 | } |
| 628 | |
| 629 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, n_gt_8_strided_cn) { |
| 630 | for (uint32_t n = 9; n < 16; n++) { |
| 631 | for (size_t k = 1; k <= 20; k += 5) { |
| 632 | GemmMicrokernelTester() |
| 633 | .mr(4) |
| 634 | .nr(8) |
| 635 | .kr(1) |
| 636 | .sr(1) |
| 637 | .m(4) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 638 | .n(n) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 639 | .k(k) |
| 640 | .cn_stride(11) |
| 641 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 642 | } |
| 643 | } |
| 644 | } |
| 645 | |
| 646 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, n_gt_8_subtile) { |
| 647 | for (uint32_t n = 9; n < 16; n++) { |
| 648 | for (size_t k = 1; k <= 20; k += 5) { |
| 649 | for (uint32_t m = 1; m <= 4; m++) { |
| 650 | GemmMicrokernelTester() |
| 651 | .mr(4) |
| 652 | .nr(8) |
| 653 | .kr(1) |
| 654 | .sr(1) |
| 655 | .m(m) |
| 656 | .n(n) |
| 657 | .k(k) |
| 658 | .iterations(1) |
| 659 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 660 | } |
| 661 | } |
| 662 | } |
| 663 | } |
| 664 | |
| 665 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, n_div_8) { |
| 666 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 667 | for (size_t k = 1; k <= 20; k += 5) { |
| 668 | GemmMicrokernelTester() |
| 669 | .mr(4) |
| 670 | .nr(8) |
| 671 | .kr(1) |
| 672 | .sr(1) |
| 673 | .m(4) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 674 | .n(n) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 675 | .k(k) |
| 676 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 677 | } |
| 678 | } |
| 679 | } |
| 680 | |
| 681 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, n_div_8_strided_cn) { |
| 682 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 683 | for (size_t k = 1; k <= 20; k += 5) { |
| 684 | GemmMicrokernelTester() |
| 685 | .mr(4) |
| 686 | .nr(8) |
| 687 | .kr(1) |
| 688 | .sr(1) |
| 689 | .m(4) |
| 690 | .n(n) |
| 691 | .k(k) |
| 692 | .cn_stride(11) |
| 693 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 694 | } |
| 695 | } |
| 696 | } |
| 697 | |
| 698 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, n_div_8_subtile) { |
| 699 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 700 | for (size_t k = 1; k <= 20; k += 5) { |
| 701 | for (uint32_t m = 1; m <= 4; m++) { |
| 702 | GemmMicrokernelTester() |
| 703 | .mr(4) |
| 704 | .nr(8) |
| 705 | .kr(1) |
| 706 | .sr(1) |
| 707 | .m(m) |
| 708 | .n(n) |
| 709 | .k(k) |
| 710 | .iterations(1) |
| 711 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 712 | } |
| 713 | } |
| 714 | } |
| 715 | } |
| 716 | |
| 717 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, small_kernel) { |
| 718 | for (size_t k = 1; k <= 20; k += 5) { |
| 719 | GemmMicrokernelTester() |
| 720 | .mr(4) |
| 721 | .nr(8) |
| 722 | .kr(1) |
| 723 | .sr(1) |
| 724 | .m(4) |
| 725 | .n(8) |
| 726 | .k(k) |
| 727 | .ks(3) |
| 728 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 729 | } |
| 730 | } |
| 731 | |
| 732 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, small_kernel_subtile) { |
| 733 | for (size_t k = 1; k <= 20; k += 5) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 734 | for (uint32_t n = 1; n <= 8; n++) { |
| 735 | for (uint32_t m = 1; m <= 4; m++) { |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 736 | GemmMicrokernelTester() |
| 737 | .mr(4) |
| 738 | .nr(8) |
| 739 | .kr(1) |
| 740 | .sr(1) |
| 741 | .m(m) |
| 742 | .n(n) |
| 743 | .k(k) |
| 744 | .ks(3) |
| 745 | .iterations(1) |
| 746 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 747 | } |
| 748 | } |
| 749 | } |
| 750 | } |
| 751 | |
| 752 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, n_gt_8_small_kernel) { |
| 753 | for (uint32_t n = 9; n < 16; n++) { |
| 754 | for (size_t k = 1; k <= 20; k += 5) { |
| 755 | GemmMicrokernelTester() |
| 756 | .mr(4) |
| 757 | .nr(8) |
| 758 | .kr(1) |
| 759 | .sr(1) |
| 760 | .m(4) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 761 | .n(n) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 762 | .k(k) |
| 763 | .ks(3) |
| 764 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 765 | } |
| 766 | } |
| 767 | } |
| 768 | |
| 769 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, n_div_8_small_kernel) { |
| 770 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 771 | for (size_t k = 1; k <= 20; k += 5) { |
| 772 | GemmMicrokernelTester() |
| 773 | .mr(4) |
| 774 | .nr(8) |
| 775 | .kr(1) |
| 776 | .sr(1) |
| 777 | .m(4) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 778 | .n(n) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 779 | .k(k) |
| 780 | .ks(3) |
| 781 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 782 | } |
| 783 | } |
| 784 | } |
| 785 | |
| 786 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, strided_cm_subtile) { |
| 787 | for (size_t k = 1; k <= 20; k += 5) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 788 | for (uint32_t n = 1; n <= 8; n++) { |
| 789 | for (uint32_t m = 1; m <= 4; m++) { |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 790 | GemmMicrokernelTester() |
| 791 | .mr(4) |
| 792 | .nr(8) |
| 793 | .kr(1) |
| 794 | .sr(1) |
| 795 | .m(m) |
| 796 | .n(n) |
| 797 | .k(k) |
| 798 | .cm_stride(11) |
| 799 | .iterations(1) |
| 800 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 801 | } |
| 802 | } |
| 803 | } |
| 804 | } |
| 805 | |
| 806 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, a_offset) { |
| 807 | for (size_t k = 1; k <= 20; k += 5) { |
| 808 | GemmMicrokernelTester() |
| 809 | .mr(4) |
| 810 | .nr(8) |
| 811 | .kr(1) |
| 812 | .sr(1) |
| 813 | .m(4) |
| 814 | .n(8) |
| 815 | .k(k) |
| 816 | .ks(3) |
| 817 | .a_offset(83) |
| 818 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 819 | } |
| 820 | } |
| 821 | |
| 822 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, zero) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 823 | for (size_t k = 1; k <= 20; k += 5) { |
| 824 | for (uint32_t mz = 0; mz < 4; mz++) { |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 825 | GemmMicrokernelTester() |
| 826 | .mr(4) |
| 827 | .nr(8) |
| 828 | .kr(1) |
| 829 | .sr(1) |
| 830 | .m(4) |
| 831 | .n(8) |
| 832 | .k(k) |
| 833 | .ks(3) |
| 834 | .a_offset(83) |
| 835 | .zero_index(mz) |
| 836 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 837 | } |
| 838 | } |
| 839 | } |
| 840 | |
| 841 | TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, strided_cm) { |
| 842 | GemmMicrokernelTester() |
| 843 | .mr(4) |
| 844 | .nr(8) |
| 845 | .kr(1) |
| 846 | .sr(1) |
| 847 | .m(4) |
| 848 | .n(8) |
| 849 | .k(4) |
| 850 | .cm_stride(11) |
| 851 | .Test(xnn_f32_igemm_relu_ukernel_4x8__wasmsimd_splat); |
| 852 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 853 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 854 | |
| 855 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 856 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 857 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_eq_4) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 858 | GemmMicrokernelTester() |
| 859 | .mr(5) |
| 860 | .nr(8) |
| 861 | .kr(1) |
| 862 | .sr(1) |
| 863 | .m(5) |
| 864 | .n(8) |
| 865 | .k(4) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 866 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 867 | } |
| 868 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 869 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, strided_cn) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 870 | GemmMicrokernelTester() |
| 871 | .mr(5) |
| 872 | .nr(8) |
| 873 | .kr(1) |
| 874 | .sr(1) |
| 875 | .m(5) |
| 876 | .n(8) |
| 877 | .k(4) |
| 878 | .cn_stride(11) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 879 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 880 | } |
| 881 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 882 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_eq_4_subtile) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 883 | for (uint32_t n = 1; n <= 8; n++) { |
| 884 | for (uint32_t m = 1; m <= 5; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 885 | GemmMicrokernelTester() |
| 886 | .mr(5) |
| 887 | .nr(8) |
| 888 | .kr(1) |
| 889 | .sr(1) |
| 890 | .m(m) |
| 891 | .n(n) |
| 892 | .k(4) |
| 893 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 894 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 895 | } |
| 896 | } |
| 897 | } |
| 898 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 899 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_eq_4_subtile_m) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 900 | for (uint32_t m = 1; m <= 5; m++) { |
| 901 | GemmMicrokernelTester() |
| 902 | .mr(5) |
| 903 | .nr(8) |
| 904 | .kr(1) |
| 905 | .sr(1) |
| 906 | .m(m) |
| 907 | .n(8) |
| 908 | .k(4) |
| 909 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 910 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 911 | } |
| 912 | } |
| 913 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 914 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_eq_4_subtile_n) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 915 | for (uint32_t n = 1; n <= 8; n++) { |
| 916 | GemmMicrokernelTester() |
| 917 | .mr(5) |
| 918 | .nr(8) |
| 919 | .kr(1) |
| 920 | .sr(1) |
| 921 | .m(5) |
| 922 | .n(n) |
| 923 | .k(4) |
| 924 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 925 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 926 | } |
| 927 | } |
| 928 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 929 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_lt_4) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 930 | for (size_t k = 1; k < 4; k++) { |
| 931 | GemmMicrokernelTester() |
| 932 | .mr(5) |
| 933 | .nr(8) |
| 934 | .kr(1) |
| 935 | .sr(1) |
| 936 | .m(5) |
| 937 | .n(8) |
| 938 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 939 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 940 | } |
| 941 | } |
| 942 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 943 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_lt_4_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 944 | for (size_t k = 1; k < 4; k++) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 945 | for (uint32_t n = 1; n <= 8; n++) { |
| 946 | for (uint32_t m = 1; m <= 5; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 947 | GemmMicrokernelTester() |
| 948 | .mr(5) |
| 949 | .nr(8) |
| 950 | .kr(1) |
| 951 | .sr(1) |
| 952 | .m(m) |
| 953 | .n(n) |
| 954 | .k(k) |
| 955 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 956 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 957 | } |
| 958 | } |
| 959 | } |
| 960 | } |
| 961 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 962 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_gt_4) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 963 | for (size_t k = 5; k < 8; k++) { |
| 964 | GemmMicrokernelTester() |
| 965 | .mr(5) |
| 966 | .nr(8) |
| 967 | .kr(1) |
| 968 | .sr(1) |
| 969 | .m(5) |
| 970 | .n(8) |
| 971 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 972 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 973 | } |
| 974 | } |
| 975 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 976 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_gt_4_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 977 | for (size_t k = 5; k < 8; k++) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 978 | for (uint32_t n = 1; n <= 8; n++) { |
| 979 | for (uint32_t m = 1; m <= 5; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 980 | GemmMicrokernelTester() |
| 981 | .mr(5) |
| 982 | .nr(8) |
| 983 | .kr(1) |
| 984 | .sr(1) |
| 985 | .m(m) |
| 986 | .n(n) |
| 987 | .k(k) |
| 988 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 989 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 990 | } |
| 991 | } |
| 992 | } |
| 993 | } |
| 994 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 995 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_div_4) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 996 | for (size_t k = 8; k <= 40; k += 4) { |
| 997 | GemmMicrokernelTester() |
| 998 | .mr(5) |
| 999 | .nr(8) |
| 1000 | .kr(1) |
| 1001 | .sr(1) |
| 1002 | .m(5) |
| 1003 | .n(8) |
| 1004 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1005 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1006 | } |
| 1007 | } |
| 1008 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1009 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, k_div_4_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1010 | for (size_t k = 8; k <= 40; k += 4) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1011 | for (uint32_t n = 1; n <= 8; n++) { |
| 1012 | for (uint32_t m = 1; m <= 5; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1013 | GemmMicrokernelTester() |
| 1014 | .mr(5) |
| 1015 | .nr(8) |
| 1016 | .kr(1) |
| 1017 | .sr(1) |
| 1018 | .m(m) |
| 1019 | .n(n) |
| 1020 | .k(k) |
| 1021 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1022 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1023 | } |
| 1024 | } |
| 1025 | } |
| 1026 | } |
| 1027 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1028 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, n_gt_8) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1029 | for (uint32_t n = 9; n < 16; n++) { |
| 1030 | for (size_t k = 1; k <= 20; k += 5) { |
| 1031 | GemmMicrokernelTester() |
| 1032 | .mr(5) |
| 1033 | .nr(8) |
| 1034 | .kr(1) |
| 1035 | .sr(1) |
| 1036 | .m(5) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1037 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1038 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1039 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1040 | } |
| 1041 | } |
| 1042 | } |
| 1043 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1044 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, n_gt_8_strided_cn) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1045 | for (uint32_t n = 9; n < 16; n++) { |
| 1046 | for (size_t k = 1; k <= 20; k += 5) { |
| 1047 | GemmMicrokernelTester() |
| 1048 | .mr(5) |
| 1049 | .nr(8) |
| 1050 | .kr(1) |
| 1051 | .sr(1) |
| 1052 | .m(5) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1053 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1054 | .k(k) |
| 1055 | .cn_stride(11) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1056 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1057 | } |
| 1058 | } |
| 1059 | } |
| 1060 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1061 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, n_gt_8_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1062 | for (uint32_t n = 9; n < 16; n++) { |
| 1063 | for (size_t k = 1; k <= 20; k += 5) { |
| 1064 | for (uint32_t m = 1; m <= 5; m++) { |
| 1065 | GemmMicrokernelTester() |
| 1066 | .mr(5) |
| 1067 | .nr(8) |
| 1068 | .kr(1) |
| 1069 | .sr(1) |
| 1070 | .m(m) |
| 1071 | .n(n) |
| 1072 | .k(k) |
| 1073 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1074 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1075 | } |
| 1076 | } |
| 1077 | } |
| 1078 | } |
| 1079 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1080 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, n_div_8) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1081 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 1082 | for (size_t k = 1; k <= 20; k += 5) { |
| 1083 | GemmMicrokernelTester() |
| 1084 | .mr(5) |
| 1085 | .nr(8) |
| 1086 | .kr(1) |
| 1087 | .sr(1) |
| 1088 | .m(5) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1089 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1090 | .k(k) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1091 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1092 | } |
| 1093 | } |
| 1094 | } |
| 1095 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1096 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, n_div_8_strided_cn) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1097 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 1098 | for (size_t k = 1; k <= 20; k += 5) { |
| 1099 | GemmMicrokernelTester() |
| 1100 | .mr(5) |
| 1101 | .nr(8) |
| 1102 | .kr(1) |
| 1103 | .sr(1) |
| 1104 | .m(5) |
| 1105 | .n(n) |
| 1106 | .k(k) |
| 1107 | .cn_stride(11) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1108 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1109 | } |
| 1110 | } |
| 1111 | } |
| 1112 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1113 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, n_div_8_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1114 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 1115 | for (size_t k = 1; k <= 20; k += 5) { |
| 1116 | for (uint32_t m = 1; m <= 5; m++) { |
| 1117 | GemmMicrokernelTester() |
| 1118 | .mr(5) |
| 1119 | .nr(8) |
| 1120 | .kr(1) |
| 1121 | .sr(1) |
| 1122 | .m(m) |
| 1123 | .n(n) |
| 1124 | .k(k) |
| 1125 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1126 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1127 | } |
| 1128 | } |
| 1129 | } |
| 1130 | } |
| 1131 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1132 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, small_kernel) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1133 | for (size_t k = 1; k <= 20; k += 5) { |
| 1134 | GemmMicrokernelTester() |
| 1135 | .mr(5) |
| 1136 | .nr(8) |
| 1137 | .kr(1) |
| 1138 | .sr(1) |
| 1139 | .m(5) |
| 1140 | .n(8) |
| 1141 | .k(k) |
| 1142 | .ks(3) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1143 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1144 | } |
| 1145 | } |
| 1146 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1147 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, small_kernel_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1148 | for (size_t k = 1; k <= 20; k += 5) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1149 | for (uint32_t n = 1; n <= 8; n++) { |
| 1150 | for (uint32_t m = 1; m <= 5; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1151 | GemmMicrokernelTester() |
| 1152 | .mr(5) |
| 1153 | .nr(8) |
| 1154 | .kr(1) |
| 1155 | .sr(1) |
| 1156 | .m(m) |
| 1157 | .n(n) |
| 1158 | .k(k) |
| 1159 | .ks(3) |
| 1160 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1161 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1162 | } |
| 1163 | } |
| 1164 | } |
| 1165 | } |
| 1166 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1167 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, n_gt_8_small_kernel) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1168 | for (uint32_t n = 9; n < 16; n++) { |
| 1169 | for (size_t k = 1; k <= 20; k += 5) { |
| 1170 | GemmMicrokernelTester() |
| 1171 | .mr(5) |
| 1172 | .nr(8) |
| 1173 | .kr(1) |
| 1174 | .sr(1) |
| 1175 | .m(5) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1176 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1177 | .k(k) |
| 1178 | .ks(3) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1179 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1180 | } |
| 1181 | } |
| 1182 | } |
| 1183 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1184 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, n_div_8_small_kernel) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1185 | for (uint32_t n = 16; n <= 24; n += 8) { |
| 1186 | for (size_t k = 1; k <= 20; k += 5) { |
| 1187 | GemmMicrokernelTester() |
| 1188 | .mr(5) |
| 1189 | .nr(8) |
| 1190 | .kr(1) |
| 1191 | .sr(1) |
| 1192 | .m(5) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1193 | .n(n) |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1194 | .k(k) |
| 1195 | .ks(3) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1196 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1197 | } |
| 1198 | } |
| 1199 | } |
| 1200 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1201 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, strided_cm_subtile) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1202 | for (size_t k = 1; k <= 20; k += 5) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1203 | for (uint32_t n = 1; n <= 8; n++) { |
| 1204 | for (uint32_t m = 1; m <= 5; m++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1205 | GemmMicrokernelTester() |
| 1206 | .mr(5) |
| 1207 | .nr(8) |
| 1208 | .kr(1) |
| 1209 | .sr(1) |
| 1210 | .m(m) |
| 1211 | .n(n) |
| 1212 | .k(k) |
| 1213 | .cm_stride(11) |
| 1214 | .iterations(1) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1215 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1216 | } |
| 1217 | } |
| 1218 | } |
| 1219 | } |
| 1220 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1221 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, a_offset) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1222 | for (size_t k = 1; k <= 20; k += 5) { |
| 1223 | GemmMicrokernelTester() |
| 1224 | .mr(5) |
| 1225 | .nr(8) |
| 1226 | .kr(1) |
| 1227 | .sr(1) |
| 1228 | .m(5) |
| 1229 | .n(8) |
| 1230 | .k(k) |
| 1231 | .ks(3) |
| 1232 | .a_offset(103) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1233 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1234 | } |
| 1235 | } |
| 1236 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1237 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, zero) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1238 | for (size_t k = 1; k <= 20; k += 5) { |
| 1239 | for (uint32_t mz = 0; mz < 5; mz++) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1240 | GemmMicrokernelTester() |
| 1241 | .mr(5) |
| 1242 | .nr(8) |
| 1243 | .kr(1) |
| 1244 | .sr(1) |
| 1245 | .m(5) |
| 1246 | .n(8) |
| 1247 | .k(k) |
| 1248 | .ks(3) |
| 1249 | .a_offset(103) |
| 1250 | .zero_index(mz) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1251 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1252 | } |
| 1253 | } |
| 1254 | } |
| 1255 | |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1256 | TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, strided_cm) { |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1257 | GemmMicrokernelTester() |
| 1258 | .mr(5) |
| 1259 | .nr(8) |
| 1260 | .kr(1) |
| 1261 | .sr(1) |
| 1262 | .m(5) |
| 1263 | .n(8) |
| 1264 | .k(4) |
| 1265 | .cm_stride(11) |
Marat Dukhan | 688f6d8 | 2020-07-14 17:02:11 -0700 | [diff] [blame] | 1266 | .Test(xnn_f32_igemm_relu_ukernel_5x8__wasmsimd_splat); |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1267 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 1268 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 802808c | 2020-06-16 11:01:17 -0700 | [diff] [blame] | 1269 | |
| 1270 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 1271 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1272 | TEST(F32_IGEMM_RELU_1X4__WASM, k_eq_1) { |
| 1273 | GemmMicrokernelTester() |
| 1274 | .mr(1) |
| 1275 | .nr(4) |
| 1276 | .kr(1) |
| 1277 | .sr(1) |
| 1278 | .m(1) |
| 1279 | .n(4) |
| 1280 | .k(1) |
| 1281 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1282 | } |
| 1283 | |
| 1284 | TEST(F32_IGEMM_RELU_1X4__WASM, strided_cn) { |
| 1285 | GemmMicrokernelTester() |
| 1286 | .mr(1) |
| 1287 | .nr(4) |
| 1288 | .kr(1) |
| 1289 | .sr(1) |
| 1290 | .m(1) |
| 1291 | .n(4) |
| 1292 | .k(1) |
| 1293 | .cn_stride(7) |
| 1294 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1295 | } |
| 1296 | |
| 1297 | TEST(F32_IGEMM_RELU_1X4__WASM, k_eq_1_subtile) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1298 | for (uint32_t n = 1; n <= 4; n++) { |
| 1299 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1300 | GemmMicrokernelTester() |
| 1301 | .mr(1) |
| 1302 | .nr(4) |
| 1303 | .kr(1) |
| 1304 | .sr(1) |
| 1305 | .m(m) |
| 1306 | .n(n) |
| 1307 | .k(1) |
| 1308 | .iterations(1) |
| 1309 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1310 | } |
| 1311 | } |
| 1312 | } |
| 1313 | |
| 1314 | TEST(F32_IGEMM_RELU_1X4__WASM, k_eq_1_subtile_m) { |
| 1315 | for (uint32_t m = 1; m <= 1; m++) { |
| 1316 | GemmMicrokernelTester() |
| 1317 | .mr(1) |
| 1318 | .nr(4) |
| 1319 | .kr(1) |
| 1320 | .sr(1) |
| 1321 | .m(m) |
| 1322 | .n(4) |
| 1323 | .k(1) |
| 1324 | .iterations(1) |
| 1325 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1326 | } |
| 1327 | } |
| 1328 | |
| 1329 | TEST(F32_IGEMM_RELU_1X4__WASM, k_eq_1_subtile_n) { |
| 1330 | for (uint32_t n = 1; n <= 4; n++) { |
| 1331 | GemmMicrokernelTester() |
| 1332 | .mr(1) |
| 1333 | .nr(4) |
| 1334 | .kr(1) |
| 1335 | .sr(1) |
| 1336 | .m(1) |
| 1337 | .n(n) |
| 1338 | .k(1) |
| 1339 | .iterations(1) |
| 1340 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1341 | } |
| 1342 | } |
| 1343 | |
| 1344 | TEST(F32_IGEMM_RELU_1X4__WASM, k_gt_1) { |
| 1345 | for (size_t k = 2; k < 10; k++) { |
| 1346 | GemmMicrokernelTester() |
| 1347 | .mr(1) |
| 1348 | .nr(4) |
| 1349 | .kr(1) |
| 1350 | .sr(1) |
| 1351 | .m(1) |
| 1352 | .n(4) |
| 1353 | .k(k) |
| 1354 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1355 | } |
| 1356 | } |
| 1357 | |
| 1358 | TEST(F32_IGEMM_RELU_1X4__WASM, k_gt_1_subtile) { |
| 1359 | for (size_t k = 2; k < 10; k++) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1360 | for (uint32_t n = 1; n <= 4; n++) { |
| 1361 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1362 | GemmMicrokernelTester() |
| 1363 | .mr(1) |
| 1364 | .nr(4) |
| 1365 | .kr(1) |
| 1366 | .sr(1) |
| 1367 | .m(m) |
| 1368 | .n(n) |
| 1369 | .k(k) |
| 1370 | .iterations(1) |
| 1371 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1372 | } |
| 1373 | } |
| 1374 | } |
| 1375 | } |
| 1376 | |
| 1377 | TEST(F32_IGEMM_RELU_1X4__WASM, n_gt_4) { |
| 1378 | for (uint32_t n = 5; n < 8; n++) { |
| 1379 | for (size_t k = 1; k <= 5; k += 2) { |
| 1380 | GemmMicrokernelTester() |
| 1381 | .mr(1) |
| 1382 | .nr(4) |
| 1383 | .kr(1) |
| 1384 | .sr(1) |
| 1385 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1386 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1387 | .k(k) |
| 1388 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1389 | } |
| 1390 | } |
| 1391 | } |
| 1392 | |
| 1393 | TEST(F32_IGEMM_RELU_1X4__WASM, n_gt_4_strided_cn) { |
| 1394 | for (uint32_t n = 5; n < 8; n++) { |
| 1395 | for (size_t k = 1; k <= 5; k += 2) { |
| 1396 | GemmMicrokernelTester() |
| 1397 | .mr(1) |
| 1398 | .nr(4) |
| 1399 | .kr(1) |
| 1400 | .sr(1) |
| 1401 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1402 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1403 | .k(k) |
| 1404 | .cn_stride(7) |
| 1405 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1406 | } |
| 1407 | } |
| 1408 | } |
| 1409 | |
| 1410 | TEST(F32_IGEMM_RELU_1X4__WASM, n_gt_4_subtile) { |
| 1411 | for (uint32_t n = 5; n < 8; n++) { |
| 1412 | for (size_t k = 1; k <= 5; k += 2) { |
| 1413 | for (uint32_t m = 1; m <= 1; m++) { |
| 1414 | GemmMicrokernelTester() |
| 1415 | .mr(1) |
| 1416 | .nr(4) |
| 1417 | .kr(1) |
| 1418 | .sr(1) |
| 1419 | .m(m) |
| 1420 | .n(n) |
| 1421 | .k(k) |
| 1422 | .iterations(1) |
| 1423 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1424 | } |
| 1425 | } |
| 1426 | } |
| 1427 | } |
| 1428 | |
| 1429 | TEST(F32_IGEMM_RELU_1X4__WASM, n_div_4) { |
| 1430 | for (uint32_t n = 8; n <= 12; n += 4) { |
| 1431 | for (size_t k = 1; k <= 5; k += 2) { |
| 1432 | GemmMicrokernelTester() |
| 1433 | .mr(1) |
| 1434 | .nr(4) |
| 1435 | .kr(1) |
| 1436 | .sr(1) |
| 1437 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1438 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1439 | .k(k) |
| 1440 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1441 | } |
| 1442 | } |
| 1443 | } |
| 1444 | |
| 1445 | TEST(F32_IGEMM_RELU_1X4__WASM, n_div_4_strided_cn) { |
| 1446 | for (uint32_t n = 8; n <= 12; n += 4) { |
| 1447 | for (size_t k = 1; k <= 5; k += 2) { |
| 1448 | GemmMicrokernelTester() |
| 1449 | .mr(1) |
| 1450 | .nr(4) |
| 1451 | .kr(1) |
| 1452 | .sr(1) |
| 1453 | .m(1) |
| 1454 | .n(n) |
| 1455 | .k(k) |
| 1456 | .cn_stride(7) |
| 1457 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1458 | } |
| 1459 | } |
| 1460 | } |
| 1461 | |
| 1462 | TEST(F32_IGEMM_RELU_1X4__WASM, n_div_4_subtile) { |
| 1463 | for (uint32_t n = 8; n <= 12; n += 4) { |
| 1464 | for (size_t k = 1; k <= 5; k += 2) { |
| 1465 | for (uint32_t m = 1; m <= 1; m++) { |
| 1466 | GemmMicrokernelTester() |
| 1467 | .mr(1) |
| 1468 | .nr(4) |
| 1469 | .kr(1) |
| 1470 | .sr(1) |
| 1471 | .m(m) |
| 1472 | .n(n) |
| 1473 | .k(k) |
| 1474 | .iterations(1) |
| 1475 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1476 | } |
| 1477 | } |
| 1478 | } |
| 1479 | } |
| 1480 | |
| 1481 | TEST(F32_IGEMM_RELU_1X4__WASM, small_kernel) { |
| 1482 | for (size_t k = 1; k <= 5; k += 2) { |
| 1483 | GemmMicrokernelTester() |
| 1484 | .mr(1) |
| 1485 | .nr(4) |
| 1486 | .kr(1) |
| 1487 | .sr(1) |
| 1488 | .m(1) |
| 1489 | .n(4) |
| 1490 | .k(k) |
| 1491 | .ks(3) |
| 1492 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1493 | } |
| 1494 | } |
| 1495 | |
| 1496 | TEST(F32_IGEMM_RELU_1X4__WASM, small_kernel_subtile) { |
| 1497 | for (size_t k = 1; k <= 5; k += 2) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1498 | for (uint32_t n = 1; n <= 4; n++) { |
| 1499 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1500 | GemmMicrokernelTester() |
| 1501 | .mr(1) |
| 1502 | .nr(4) |
| 1503 | .kr(1) |
| 1504 | .sr(1) |
| 1505 | .m(m) |
| 1506 | .n(n) |
| 1507 | .k(k) |
| 1508 | .ks(3) |
| 1509 | .iterations(1) |
| 1510 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1511 | } |
| 1512 | } |
| 1513 | } |
| 1514 | } |
| 1515 | |
| 1516 | TEST(F32_IGEMM_RELU_1X4__WASM, n_gt_4_small_kernel) { |
| 1517 | for (uint32_t n = 5; n < 8; n++) { |
| 1518 | for (size_t k = 1; k <= 5; k += 2) { |
| 1519 | GemmMicrokernelTester() |
| 1520 | .mr(1) |
| 1521 | .nr(4) |
| 1522 | .kr(1) |
| 1523 | .sr(1) |
| 1524 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1525 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1526 | .k(k) |
| 1527 | .ks(3) |
| 1528 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1529 | } |
| 1530 | } |
| 1531 | } |
| 1532 | |
| 1533 | TEST(F32_IGEMM_RELU_1X4__WASM, n_div_4_small_kernel) { |
| 1534 | for (uint32_t n = 8; n <= 12; n += 4) { |
| 1535 | for (size_t k = 1; k <= 5; k += 2) { |
| 1536 | GemmMicrokernelTester() |
| 1537 | .mr(1) |
| 1538 | .nr(4) |
| 1539 | .kr(1) |
| 1540 | .sr(1) |
| 1541 | .m(1) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1542 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1543 | .k(k) |
| 1544 | .ks(3) |
| 1545 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1546 | } |
| 1547 | } |
| 1548 | } |
| 1549 | |
| 1550 | TEST(F32_IGEMM_RELU_1X4__WASM, strided_cm_subtile) { |
| 1551 | for (size_t k = 1; k <= 5; k += 2) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1552 | for (uint32_t n = 1; n <= 4; n++) { |
| 1553 | for (uint32_t m = 1; m <= 1; m++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1554 | GemmMicrokernelTester() |
| 1555 | .mr(1) |
| 1556 | .nr(4) |
| 1557 | .kr(1) |
| 1558 | .sr(1) |
| 1559 | .m(m) |
| 1560 | .n(n) |
| 1561 | .k(k) |
| 1562 | .cm_stride(7) |
| 1563 | .iterations(1) |
| 1564 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1565 | } |
| 1566 | } |
| 1567 | } |
| 1568 | } |
| 1569 | |
| 1570 | TEST(F32_IGEMM_RELU_1X4__WASM, a_offset) { |
| 1571 | for (size_t k = 1; k <= 5; k += 2) { |
| 1572 | GemmMicrokernelTester() |
| 1573 | .mr(1) |
| 1574 | .nr(4) |
| 1575 | .kr(1) |
| 1576 | .sr(1) |
| 1577 | .m(1) |
| 1578 | .n(4) |
| 1579 | .k(k) |
| 1580 | .ks(3) |
| 1581 | .a_offset(7) |
| 1582 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1583 | } |
| 1584 | } |
| 1585 | |
| 1586 | TEST(F32_IGEMM_RELU_1X4__WASM, zero) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1587 | for (size_t k = 1; k <= 5; k += 2) { |
| 1588 | for (uint32_t mz = 0; mz < 1; mz++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1589 | GemmMicrokernelTester() |
| 1590 | .mr(1) |
| 1591 | .nr(4) |
| 1592 | .kr(1) |
| 1593 | .sr(1) |
| 1594 | .m(1) |
| 1595 | .n(4) |
| 1596 | .k(k) |
| 1597 | .ks(3) |
| 1598 | .a_offset(7) |
| 1599 | .zero_index(mz) |
| 1600 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1601 | } |
| 1602 | } |
| 1603 | } |
| 1604 | |
| 1605 | TEST(F32_IGEMM_RELU_1X4__WASM, strided_cm) { |
| 1606 | GemmMicrokernelTester() |
| 1607 | .mr(1) |
| 1608 | .nr(4) |
| 1609 | .kr(1) |
| 1610 | .sr(1) |
| 1611 | .m(1) |
| 1612 | .n(4) |
| 1613 | .k(1) |
| 1614 | .cm_stride(7) |
| 1615 | .Test(xnn_f32_igemm_relu_ukernel_1x4__wasm); |
| 1616 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 1617 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1618 | |
| 1619 | |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1620 | TEST(F32_IGEMM_RELU_2X4__SCALAR, k_eq_1) { |
| 1621 | GemmMicrokernelTester() |
| 1622 | .mr(2) |
| 1623 | .nr(4) |
| 1624 | .kr(1) |
| 1625 | .sr(1) |
| 1626 | .m(2) |
| 1627 | .n(4) |
| 1628 | .k(1) |
| 1629 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1630 | } |
| 1631 | |
| 1632 | TEST(F32_IGEMM_RELU_2X4__SCALAR, strided_cn) { |
| 1633 | GemmMicrokernelTester() |
| 1634 | .mr(2) |
| 1635 | .nr(4) |
| 1636 | .kr(1) |
| 1637 | .sr(1) |
| 1638 | .m(2) |
| 1639 | .n(4) |
| 1640 | .k(1) |
| 1641 | .cn_stride(7) |
| 1642 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1643 | } |
| 1644 | |
| 1645 | TEST(F32_IGEMM_RELU_2X4__SCALAR, k_eq_1_subtile) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1646 | for (uint32_t n = 1; n <= 4; n++) { |
| 1647 | for (uint32_t m = 1; m <= 2; m++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1648 | GemmMicrokernelTester() |
| 1649 | .mr(2) |
| 1650 | .nr(4) |
| 1651 | .kr(1) |
| 1652 | .sr(1) |
| 1653 | .m(m) |
| 1654 | .n(n) |
| 1655 | .k(1) |
| 1656 | .iterations(1) |
| 1657 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1658 | } |
| 1659 | } |
| 1660 | } |
| 1661 | |
| 1662 | TEST(F32_IGEMM_RELU_2X4__SCALAR, k_eq_1_subtile_m) { |
| 1663 | for (uint32_t m = 1; m <= 2; m++) { |
| 1664 | GemmMicrokernelTester() |
| 1665 | .mr(2) |
| 1666 | .nr(4) |
| 1667 | .kr(1) |
| 1668 | .sr(1) |
| 1669 | .m(m) |
| 1670 | .n(4) |
| 1671 | .k(1) |
| 1672 | .iterations(1) |
| 1673 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1674 | } |
| 1675 | } |
| 1676 | |
| 1677 | TEST(F32_IGEMM_RELU_2X4__SCALAR, k_eq_1_subtile_n) { |
| 1678 | for (uint32_t n = 1; n <= 4; n++) { |
| 1679 | GemmMicrokernelTester() |
| 1680 | .mr(2) |
| 1681 | .nr(4) |
| 1682 | .kr(1) |
| 1683 | .sr(1) |
| 1684 | .m(2) |
| 1685 | .n(n) |
| 1686 | .k(1) |
| 1687 | .iterations(1) |
| 1688 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1689 | } |
| 1690 | } |
| 1691 | |
| 1692 | TEST(F32_IGEMM_RELU_2X4__SCALAR, k_gt_1) { |
| 1693 | for (size_t k = 2; k < 10; k++) { |
| 1694 | GemmMicrokernelTester() |
| 1695 | .mr(2) |
| 1696 | .nr(4) |
| 1697 | .kr(1) |
| 1698 | .sr(1) |
| 1699 | .m(2) |
| 1700 | .n(4) |
| 1701 | .k(k) |
| 1702 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1703 | } |
| 1704 | } |
| 1705 | |
| 1706 | TEST(F32_IGEMM_RELU_2X4__SCALAR, k_gt_1_subtile) { |
| 1707 | for (size_t k = 2; k < 10; k++) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1708 | for (uint32_t n = 1; n <= 4; n++) { |
| 1709 | for (uint32_t m = 1; m <= 2; m++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1710 | GemmMicrokernelTester() |
| 1711 | .mr(2) |
| 1712 | .nr(4) |
| 1713 | .kr(1) |
| 1714 | .sr(1) |
| 1715 | .m(m) |
| 1716 | .n(n) |
| 1717 | .k(k) |
| 1718 | .iterations(1) |
| 1719 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1720 | } |
| 1721 | } |
| 1722 | } |
| 1723 | } |
| 1724 | |
| 1725 | TEST(F32_IGEMM_RELU_2X4__SCALAR, n_gt_4) { |
| 1726 | for (uint32_t n = 5; n < 8; n++) { |
| 1727 | for (size_t k = 1; k <= 5; k += 2) { |
| 1728 | GemmMicrokernelTester() |
| 1729 | .mr(2) |
| 1730 | .nr(4) |
| 1731 | .kr(1) |
| 1732 | .sr(1) |
| 1733 | .m(2) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1734 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1735 | .k(k) |
| 1736 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1737 | } |
| 1738 | } |
| 1739 | } |
| 1740 | |
| 1741 | TEST(F32_IGEMM_RELU_2X4__SCALAR, n_gt_4_strided_cn) { |
| 1742 | for (uint32_t n = 5; n < 8; n++) { |
| 1743 | for (size_t k = 1; k <= 5; k += 2) { |
| 1744 | GemmMicrokernelTester() |
| 1745 | .mr(2) |
| 1746 | .nr(4) |
| 1747 | .kr(1) |
| 1748 | .sr(1) |
| 1749 | .m(2) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1750 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1751 | .k(k) |
| 1752 | .cn_stride(7) |
| 1753 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1754 | } |
| 1755 | } |
| 1756 | } |
| 1757 | |
| 1758 | TEST(F32_IGEMM_RELU_2X4__SCALAR, n_gt_4_subtile) { |
| 1759 | for (uint32_t n = 5; n < 8; n++) { |
| 1760 | for (size_t k = 1; k <= 5; k += 2) { |
| 1761 | for (uint32_t m = 1; m <= 2; m++) { |
| 1762 | GemmMicrokernelTester() |
| 1763 | .mr(2) |
| 1764 | .nr(4) |
| 1765 | .kr(1) |
| 1766 | .sr(1) |
| 1767 | .m(m) |
| 1768 | .n(n) |
| 1769 | .k(k) |
| 1770 | .iterations(1) |
| 1771 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1772 | } |
| 1773 | } |
| 1774 | } |
| 1775 | } |
| 1776 | |
| 1777 | TEST(F32_IGEMM_RELU_2X4__SCALAR, n_div_4) { |
| 1778 | for (uint32_t n = 8; n <= 12; n += 4) { |
| 1779 | for (size_t k = 1; k <= 5; k += 2) { |
| 1780 | GemmMicrokernelTester() |
| 1781 | .mr(2) |
| 1782 | .nr(4) |
| 1783 | .kr(1) |
| 1784 | .sr(1) |
| 1785 | .m(2) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1786 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1787 | .k(k) |
| 1788 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1789 | } |
| 1790 | } |
| 1791 | } |
| 1792 | |
| 1793 | TEST(F32_IGEMM_RELU_2X4__SCALAR, n_div_4_strided_cn) { |
| 1794 | for (uint32_t n = 8; n <= 12; n += 4) { |
| 1795 | for (size_t k = 1; k <= 5; k += 2) { |
| 1796 | GemmMicrokernelTester() |
| 1797 | .mr(2) |
| 1798 | .nr(4) |
| 1799 | .kr(1) |
| 1800 | .sr(1) |
| 1801 | .m(2) |
| 1802 | .n(n) |
| 1803 | .k(k) |
| 1804 | .cn_stride(7) |
| 1805 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1806 | } |
| 1807 | } |
| 1808 | } |
| 1809 | |
| 1810 | TEST(F32_IGEMM_RELU_2X4__SCALAR, n_div_4_subtile) { |
| 1811 | for (uint32_t n = 8; n <= 12; n += 4) { |
| 1812 | for (size_t k = 1; k <= 5; k += 2) { |
| 1813 | for (uint32_t m = 1; m <= 2; m++) { |
| 1814 | GemmMicrokernelTester() |
| 1815 | .mr(2) |
| 1816 | .nr(4) |
| 1817 | .kr(1) |
| 1818 | .sr(1) |
| 1819 | .m(m) |
| 1820 | .n(n) |
| 1821 | .k(k) |
| 1822 | .iterations(1) |
| 1823 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1824 | } |
| 1825 | } |
| 1826 | } |
| 1827 | } |
| 1828 | |
| 1829 | TEST(F32_IGEMM_RELU_2X4__SCALAR, small_kernel) { |
| 1830 | for (size_t k = 1; k <= 5; k += 2) { |
| 1831 | GemmMicrokernelTester() |
| 1832 | .mr(2) |
| 1833 | .nr(4) |
| 1834 | .kr(1) |
| 1835 | .sr(1) |
| 1836 | .m(2) |
| 1837 | .n(4) |
| 1838 | .k(k) |
| 1839 | .ks(3) |
| 1840 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1841 | } |
| 1842 | } |
| 1843 | |
| 1844 | TEST(F32_IGEMM_RELU_2X4__SCALAR, small_kernel_subtile) { |
| 1845 | for (size_t k = 1; k <= 5; k += 2) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1846 | for (uint32_t n = 1; n <= 4; n++) { |
| 1847 | for (uint32_t m = 1; m <= 2; m++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1848 | GemmMicrokernelTester() |
| 1849 | .mr(2) |
| 1850 | .nr(4) |
| 1851 | .kr(1) |
| 1852 | .sr(1) |
| 1853 | .m(m) |
| 1854 | .n(n) |
| 1855 | .k(k) |
| 1856 | .ks(3) |
| 1857 | .iterations(1) |
| 1858 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1859 | } |
| 1860 | } |
| 1861 | } |
| 1862 | } |
| 1863 | |
| 1864 | TEST(F32_IGEMM_RELU_2X4__SCALAR, n_gt_4_small_kernel) { |
| 1865 | for (uint32_t n = 5; n < 8; n++) { |
| 1866 | for (size_t k = 1; k <= 5; k += 2) { |
| 1867 | GemmMicrokernelTester() |
| 1868 | .mr(2) |
| 1869 | .nr(4) |
| 1870 | .kr(1) |
| 1871 | .sr(1) |
| 1872 | .m(2) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1873 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1874 | .k(k) |
| 1875 | .ks(3) |
| 1876 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1877 | } |
| 1878 | } |
| 1879 | } |
| 1880 | |
| 1881 | TEST(F32_IGEMM_RELU_2X4__SCALAR, n_div_4_small_kernel) { |
| 1882 | for (uint32_t n = 8; n <= 12; n += 4) { |
| 1883 | for (size_t k = 1; k <= 5; k += 2) { |
| 1884 | GemmMicrokernelTester() |
| 1885 | .mr(2) |
| 1886 | .nr(4) |
| 1887 | .kr(1) |
| 1888 | .sr(1) |
| 1889 | .m(2) |
Zhi An Ng | af9ff85 | 2022-01-13 10:48:37 -0800 | [diff] [blame] | 1890 | .n(n) |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1891 | .k(k) |
| 1892 | .ks(3) |
| 1893 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1894 | } |
| 1895 | } |
| 1896 | } |
| 1897 | |
| 1898 | TEST(F32_IGEMM_RELU_2X4__SCALAR, strided_cm_subtile) { |
| 1899 | for (size_t k = 1; k <= 5; k += 2) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1900 | for (uint32_t n = 1; n <= 4; n++) { |
| 1901 | for (uint32_t m = 1; m <= 2; m++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1902 | GemmMicrokernelTester() |
| 1903 | .mr(2) |
| 1904 | .nr(4) |
| 1905 | .kr(1) |
| 1906 | .sr(1) |
| 1907 | .m(m) |
| 1908 | .n(n) |
| 1909 | .k(k) |
| 1910 | .cm_stride(7) |
| 1911 | .iterations(1) |
| 1912 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1913 | } |
| 1914 | } |
| 1915 | } |
| 1916 | } |
| 1917 | |
| 1918 | TEST(F32_IGEMM_RELU_2X4__SCALAR, a_offset) { |
| 1919 | for (size_t k = 1; k <= 5; k += 2) { |
| 1920 | GemmMicrokernelTester() |
| 1921 | .mr(2) |
| 1922 | .nr(4) |
| 1923 | .kr(1) |
| 1924 | .sr(1) |
| 1925 | .m(2) |
| 1926 | .n(4) |
| 1927 | .k(k) |
| 1928 | .ks(3) |
| 1929 | .a_offset(13) |
| 1930 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1931 | } |
| 1932 | } |
| 1933 | |
| 1934 | TEST(F32_IGEMM_RELU_2X4__SCALAR, zero) { |
Zhi An Ng | 83844ae | 2022-01-14 09:52:25 -0800 | [diff] [blame] | 1935 | for (size_t k = 1; k <= 5; k += 2) { |
| 1936 | for (uint32_t mz = 0; mz < 2; mz++) { |
Marat Dukhan | 467f636 | 2020-05-22 23:21:55 -0700 | [diff] [blame] | 1937 | GemmMicrokernelTester() |
| 1938 | .mr(2) |
| 1939 | .nr(4) |
| 1940 | .kr(1) |
| 1941 | .sr(1) |
| 1942 | .m(2) |
| 1943 | .n(4) |
| 1944 | .k(k) |
| 1945 | .ks(3) |
| 1946 | .a_offset(13) |
| 1947 | .zero_index(mz) |
| 1948 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1949 | } |
| 1950 | } |
| 1951 | } |
| 1952 | |
| 1953 | TEST(F32_IGEMM_RELU_2X4__SCALAR, strided_cm) { |
| 1954 | GemmMicrokernelTester() |
| 1955 | .mr(2) |
| 1956 | .nr(4) |
| 1957 | .kr(1) |
| 1958 | .sr(1) |
| 1959 | .m(2) |
| 1960 | .n(4) |
| 1961 | .k(1) |
| 1962 | .cm_stride(7) |
| 1963 | .Test(xnn_f32_igemm_relu_ukernel_2x4__scalar); |
| 1964 | } |