blob: 6e310ab085a04350cfb6add6a0933daaffa2d05e [file] [log] [blame]
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
4// Copyright 2019 Google LLC
5//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
8//
9// Auto-generated file. Do not edit!
10// Specification: test/qs8-igemm-minmax-rndnu.yaml
11// Generator: tools/generate-gemm-test.py
12
13
14#include <gtest/gtest.h>
15
16#include <xnnpack/allocator.h>
17#include <xnnpack/common.h>
18#include <xnnpack/isa-checks.h>
19
20#include <xnnpack/gemm.h>
21#include <xnnpack/igemm.h>
22#include <xnnpack/ppmm.h>
23#include "gemm-microkernel-tester.h"
24
25
Zhi An Nge96b6bc2022-02-03 10:49:46 -080026#if XNN_ARCH_ARM && !XNN_PLATFORM_IOS && XNN_ENABLE_ASSEMBLY
27 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_eq_8) {
28 TEST_REQUIRES_ARM_NEON_DOT;
29 GemmMicrokernelTester()
30 .mr(4)
31 .nr(8)
32 .kr(4)
33 .sr(1)
34 .m(4)
35 .n(8)
36 .k(8)
37 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
38 }
39
40 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, strided_cn) {
41 TEST_REQUIRES_ARM_NEON_DOT;
42 GemmMicrokernelTester()
43 .mr(4)
44 .nr(8)
45 .kr(4)
46 .sr(1)
47 .m(4)
48 .n(8)
49 .k(8)
50 .cn_stride(11)
51 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
52 }
53
54 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_eq_8_subtile) {
55 TEST_REQUIRES_ARM_NEON_DOT;
56 for (uint32_t n = 1; n <= 8; n++) {
57 for (uint32_t m = 1; m <= 4; m++) {
58 GemmMicrokernelTester()
59 .mr(4)
60 .nr(8)
61 .kr(4)
62 .sr(1)
63 .m(m)
64 .n(n)
65 .k(8)
66 .iterations(1)
67 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
68 }
69 }
70 }
71
72 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_eq_8_subtile_m) {
73 TEST_REQUIRES_ARM_NEON_DOT;
74 for (uint32_t m = 1; m <= 4; m++) {
75 GemmMicrokernelTester()
76 .mr(4)
77 .nr(8)
78 .kr(4)
79 .sr(1)
80 .m(m)
81 .n(8)
82 .k(8)
83 .iterations(1)
84 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
85 }
86 }
87
88 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_eq_8_subtile_n) {
89 TEST_REQUIRES_ARM_NEON_DOT;
90 for (uint32_t n = 1; n <= 8; n++) {
91 GemmMicrokernelTester()
92 .mr(4)
93 .nr(8)
94 .kr(4)
95 .sr(1)
96 .m(4)
97 .n(n)
98 .k(8)
99 .iterations(1)
100 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
101 }
102 }
103
104 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_lt_8) {
105 TEST_REQUIRES_ARM_NEON_DOT;
106 for (size_t k = 1; k < 8; k++) {
107 GemmMicrokernelTester()
108 .mr(4)
109 .nr(8)
110 .kr(4)
111 .sr(1)
112 .m(4)
113 .n(8)
114 .k(k)
115 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
116 }
117 }
118
119 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_lt_8_subtile) {
120 TEST_REQUIRES_ARM_NEON_DOT;
121 for (size_t k = 1; k < 8; k++) {
122 for (uint32_t n = 1; n <= 8; n++) {
123 for (uint32_t m = 1; m <= 4; m++) {
124 GemmMicrokernelTester()
125 .mr(4)
126 .nr(8)
127 .kr(4)
128 .sr(1)
129 .m(m)
130 .n(n)
131 .k(k)
132 .iterations(1)
133 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
134 }
135 }
136 }
137 }
138
139 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_gt_8) {
140 TEST_REQUIRES_ARM_NEON_DOT;
141 for (size_t k = 9; k < 16; k++) {
142 GemmMicrokernelTester()
143 .mr(4)
144 .nr(8)
145 .kr(4)
146 .sr(1)
147 .m(4)
148 .n(8)
149 .k(k)
150 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
151 }
152 }
153
154 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_gt_8_subtile) {
155 TEST_REQUIRES_ARM_NEON_DOT;
156 for (size_t k = 9; k < 16; k++) {
157 for (uint32_t n = 1; n <= 8; n++) {
158 for (uint32_t m = 1; m <= 4; m++) {
159 GemmMicrokernelTester()
160 .mr(4)
161 .nr(8)
162 .kr(4)
163 .sr(1)
164 .m(m)
165 .n(n)
166 .k(k)
167 .iterations(1)
168 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
169 }
170 }
171 }
172 }
173
174 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_div_8) {
175 TEST_REQUIRES_ARM_NEON_DOT;
176 for (size_t k = 16; k <= 80; k += 8) {
177 GemmMicrokernelTester()
178 .mr(4)
179 .nr(8)
180 .kr(4)
181 .sr(1)
182 .m(4)
183 .n(8)
184 .k(k)
185 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
186 }
187 }
188
189 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, k_div_8_subtile) {
190 TEST_REQUIRES_ARM_NEON_DOT;
191 for (size_t k = 16; k <= 80; k += 8) {
192 for (uint32_t n = 1; n <= 8; n++) {
193 for (uint32_t m = 1; m <= 4; m++) {
194 GemmMicrokernelTester()
195 .mr(4)
196 .nr(8)
197 .kr(4)
198 .sr(1)
199 .m(m)
200 .n(n)
201 .k(k)
202 .iterations(1)
203 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
204 }
205 }
206 }
207 }
208
209 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, n_gt_8) {
210 TEST_REQUIRES_ARM_NEON_DOT;
211 for (uint32_t n = 9; n < 16; n++) {
212 for (size_t k = 1; k <= 40; k += 9) {
213 GemmMicrokernelTester()
214 .mr(4)
215 .nr(8)
216 .kr(4)
217 .sr(1)
218 .m(4)
219 .n(n)
220 .k(k)
221 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
222 }
223 }
224 }
225
226 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, n_gt_8_strided_cn) {
227 TEST_REQUIRES_ARM_NEON_DOT;
228 for (uint32_t n = 9; n < 16; n++) {
229 for (size_t k = 1; k <= 40; k += 9) {
230 GemmMicrokernelTester()
231 .mr(4)
232 .nr(8)
233 .kr(4)
234 .sr(1)
235 .m(4)
236 .n(n)
237 .k(k)
238 .cn_stride(11)
239 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
240 }
241 }
242 }
243
244 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, n_gt_8_subtile) {
245 TEST_REQUIRES_ARM_NEON_DOT;
246 for (uint32_t n = 9; n < 16; n++) {
247 for (size_t k = 1; k <= 40; k += 9) {
248 for (uint32_t m = 1; m <= 4; m++) {
249 GemmMicrokernelTester()
250 .mr(4)
251 .nr(8)
252 .kr(4)
253 .sr(1)
254 .m(m)
255 .n(n)
256 .k(k)
257 .iterations(1)
258 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
259 }
260 }
261 }
262 }
263
264 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, n_div_8) {
265 TEST_REQUIRES_ARM_NEON_DOT;
266 for (uint32_t n = 16; n <= 24; n += 8) {
267 for (size_t k = 1; k <= 40; k += 9) {
268 GemmMicrokernelTester()
269 .mr(4)
270 .nr(8)
271 .kr(4)
272 .sr(1)
273 .m(4)
274 .n(n)
275 .k(k)
276 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
277 }
278 }
279 }
280
281 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, n_div_8_strided_cn) {
282 TEST_REQUIRES_ARM_NEON_DOT;
283 for (uint32_t n = 16; n <= 24; n += 8) {
284 for (size_t k = 1; k <= 40; k += 9) {
285 GemmMicrokernelTester()
286 .mr(4)
287 .nr(8)
288 .kr(4)
289 .sr(1)
290 .m(4)
291 .n(n)
292 .k(k)
293 .cn_stride(11)
294 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
295 }
296 }
297 }
298
299 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, n_div_8_subtile) {
300 TEST_REQUIRES_ARM_NEON_DOT;
301 for (uint32_t n = 16; n <= 24; n += 8) {
302 for (size_t k = 1; k <= 40; k += 9) {
303 for (uint32_t m = 1; m <= 4; m++) {
304 GemmMicrokernelTester()
305 .mr(4)
306 .nr(8)
307 .kr(4)
308 .sr(1)
309 .m(m)
310 .n(n)
311 .k(k)
312 .iterations(1)
313 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
314 }
315 }
316 }
317 }
318
319 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, small_kernel) {
320 TEST_REQUIRES_ARM_NEON_DOT;
321 for (size_t k = 1; k <= 40; k += 9) {
322 GemmMicrokernelTester()
323 .mr(4)
324 .nr(8)
325 .kr(4)
326 .sr(1)
327 .m(4)
328 .n(8)
329 .k(k)
330 .ks(3)
331 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
332 }
333 }
334
335 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, small_kernel_subtile) {
336 TEST_REQUIRES_ARM_NEON_DOT;
337 for (size_t k = 1; k <= 40; k += 9) {
338 for (uint32_t n = 1; n <= 8; n++) {
339 for (uint32_t m = 1; m <= 4; m++) {
340 GemmMicrokernelTester()
341 .mr(4)
342 .nr(8)
343 .kr(4)
344 .sr(1)
345 .m(m)
346 .n(n)
347 .k(k)
348 .ks(3)
349 .iterations(1)
350 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
351 }
352 }
353 }
354 }
355
356 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, n_gt_8_small_kernel) {
357 TEST_REQUIRES_ARM_NEON_DOT;
358 for (uint32_t n = 9; n < 16; n++) {
359 for (size_t k = 1; k <= 40; k += 9) {
360 GemmMicrokernelTester()
361 .mr(4)
362 .nr(8)
363 .kr(4)
364 .sr(1)
365 .m(4)
366 .n(n)
367 .k(k)
368 .ks(3)
369 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
370 }
371 }
372 }
373
374 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, n_div_8_small_kernel) {
375 TEST_REQUIRES_ARM_NEON_DOT;
376 for (uint32_t n = 16; n <= 24; n += 8) {
377 for (size_t k = 1; k <= 40; k += 9) {
378 GemmMicrokernelTester()
379 .mr(4)
380 .nr(8)
381 .kr(4)
382 .sr(1)
383 .m(4)
384 .n(n)
385 .k(k)
386 .ks(3)
387 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
388 }
389 }
390 }
391
392 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, strided_cm_subtile) {
393 TEST_REQUIRES_ARM_NEON_DOT;
394 for (size_t k = 1; k <= 40; k += 9) {
395 for (uint32_t n = 1; n <= 8; n++) {
396 for (uint32_t m = 1; m <= 4; m++) {
397 GemmMicrokernelTester()
398 .mr(4)
399 .nr(8)
400 .kr(4)
401 .sr(1)
402 .m(m)
403 .n(n)
404 .k(k)
405 .cm_stride(11)
406 .iterations(1)
407 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
408 }
409 }
410 }
411 }
412
413 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, a_offset) {
414 TEST_REQUIRES_ARM_NEON_DOT;
415 for (size_t k = 1; k <= 40; k += 9) {
416 GemmMicrokernelTester()
417 .mr(4)
418 .nr(8)
419 .kr(4)
420 .sr(1)
421 .m(4)
422 .n(8)
423 .k(k)
424 .ks(3)
425 .a_offset(163)
426 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
427 }
428 }
429
430 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, zero) {
431 TEST_REQUIRES_ARM_NEON_DOT;
432 for (size_t k = 1; k <= 40; k += 9) {
433 for (uint32_t mz = 0; mz < 4; mz++) {
434 GemmMicrokernelTester()
435 .mr(4)
436 .nr(8)
437 .kr(4)
438 .sr(1)
439 .m(4)
440 .n(8)
441 .k(k)
442 .ks(3)
443 .a_offset(163)
444 .zero_index(mz)
445 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
446 }
447 }
448 }
449
450 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, qmin) {
451 TEST_REQUIRES_ARM_NEON_DOT;
452 GemmMicrokernelTester()
453 .mr(4)
454 .nr(8)
455 .kr(4)
456 .sr(1)
457 .m(4)
458 .n(8)
459 .k(8)
460 .qmin(128)
461 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
462 }
463
464 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, qmax) {
465 TEST_REQUIRES_ARM_NEON_DOT;
466 GemmMicrokernelTester()
467 .mr(4)
468 .nr(8)
469 .kr(4)
470 .sr(1)
471 .m(4)
472 .n(8)
473 .k(8)
474 .qmax(128)
475 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
476 }
477
478 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__AARCH32_NEONDOT_LD64, strided_cm) {
479 TEST_REQUIRES_ARM_NEON_DOT;
480 GemmMicrokernelTester()
481 .mr(4)
482 .nr(8)
483 .kr(4)
484 .sr(1)
485 .m(4)
486 .n(8)
487 .k(8)
488 .cm_stride(11)
489 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__aarch32_neondot_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
490 }
491#endif // XNN_ARCH_ARM && !XNN_PLATFORM_IOS && XNN_ENABLE_ASSEMBLY
492
493
494#if XNN_ARCH_ARM && XNN_ENABLE_ASSEMBLY
495 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_eq_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800496 TEST_REQUIRES_ARM_NEON;
497 GemmMicrokernelTester()
498 .mr(4)
499 .nr(8)
500 .kr(1)
501 .sr(1)
502 .m(4)
503 .n(8)
504 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800505 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800506 }
507
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800508 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800509 TEST_REQUIRES_ARM_NEON;
510 GemmMicrokernelTester()
511 .mr(4)
512 .nr(8)
513 .kr(1)
514 .sr(1)
515 .m(4)
516 .n(8)
517 .k(8)
518 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800519 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800520 }
521
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800522 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_eq_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800523 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -0800524 for (uint32_t n = 1; n <= 8; n++) {
525 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800526 GemmMicrokernelTester()
527 .mr(4)
528 .nr(8)
529 .kr(1)
530 .sr(1)
531 .m(m)
532 .n(n)
533 .k(8)
534 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800535 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800536 }
537 }
538 }
539
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800540 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_eq_8_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800541 TEST_REQUIRES_ARM_NEON;
542 for (uint32_t m = 1; m <= 4; m++) {
543 GemmMicrokernelTester()
544 .mr(4)
545 .nr(8)
546 .kr(1)
547 .sr(1)
548 .m(m)
549 .n(8)
550 .k(8)
551 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800552 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800553 }
554 }
555
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800556 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_eq_8_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800557 TEST_REQUIRES_ARM_NEON;
558 for (uint32_t n = 1; n <= 8; n++) {
559 GemmMicrokernelTester()
560 .mr(4)
561 .nr(8)
562 .kr(1)
563 .sr(1)
564 .m(4)
565 .n(n)
566 .k(8)
567 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800568 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800569 }
570 }
571
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800572 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_lt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800573 TEST_REQUIRES_ARM_NEON;
574 for (size_t k = 1; k < 8; k++) {
575 GemmMicrokernelTester()
576 .mr(4)
577 .nr(8)
578 .kr(1)
579 .sr(1)
580 .m(4)
581 .n(8)
582 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800583 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800584 }
585 }
586
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800587 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_lt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800588 TEST_REQUIRES_ARM_NEON;
589 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -0800590 for (uint32_t n = 1; n <= 8; n++) {
591 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800592 GemmMicrokernelTester()
593 .mr(4)
594 .nr(8)
595 .kr(1)
596 .sr(1)
597 .m(m)
598 .n(n)
599 .k(k)
600 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800601 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800602 }
603 }
604 }
605 }
606
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800607 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800608 TEST_REQUIRES_ARM_NEON;
609 for (size_t k = 9; k < 16; k++) {
610 GemmMicrokernelTester()
611 .mr(4)
612 .nr(8)
613 .kr(1)
614 .sr(1)
615 .m(4)
616 .n(8)
617 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800618 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800619 }
620 }
621
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800622 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800623 TEST_REQUIRES_ARM_NEON;
624 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -0800625 for (uint32_t n = 1; n <= 8; n++) {
626 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800627 GemmMicrokernelTester()
628 .mr(4)
629 .nr(8)
630 .kr(1)
631 .sr(1)
632 .m(m)
633 .n(n)
634 .k(k)
635 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800636 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800637 }
638 }
639 }
640 }
641
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800642 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800643 TEST_REQUIRES_ARM_NEON;
644 for (size_t k = 16; k <= 80; k += 8) {
645 GemmMicrokernelTester()
646 .mr(4)
647 .nr(8)
648 .kr(1)
649 .sr(1)
650 .m(4)
651 .n(8)
652 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800653 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800654 }
655 }
656
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800657 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, k_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800658 TEST_REQUIRES_ARM_NEON;
659 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -0800660 for (uint32_t n = 1; n <= 8; n++) {
661 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800662 GemmMicrokernelTester()
663 .mr(4)
664 .nr(8)
665 .kr(1)
666 .sr(1)
667 .m(m)
668 .n(n)
669 .k(k)
670 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800671 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800672 }
673 }
674 }
675 }
676
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800677 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800678 TEST_REQUIRES_ARM_NEON;
679 for (uint32_t n = 9; n < 16; n++) {
680 for (size_t k = 1; k <= 40; k += 9) {
681 GemmMicrokernelTester()
682 .mr(4)
683 .nr(8)
684 .kr(1)
685 .sr(1)
686 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -0800687 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800688 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800689 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800690 }
691 }
692 }
693
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800694 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800695 TEST_REQUIRES_ARM_NEON;
696 for (uint32_t n = 9; n < 16; n++) {
697 for (size_t k = 1; k <= 40; k += 9) {
698 GemmMicrokernelTester()
699 .mr(4)
700 .nr(8)
701 .kr(1)
702 .sr(1)
703 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -0800704 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800705 .k(k)
706 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800707 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800708 }
709 }
710 }
711
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800712 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800713 TEST_REQUIRES_ARM_NEON;
714 for (uint32_t n = 9; n < 16; n++) {
715 for (size_t k = 1; k <= 40; k += 9) {
716 for (uint32_t m = 1; m <= 4; m++) {
717 GemmMicrokernelTester()
718 .mr(4)
719 .nr(8)
720 .kr(1)
721 .sr(1)
722 .m(m)
723 .n(n)
724 .k(k)
725 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800726 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800727 }
728 }
729 }
730 }
731
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800732 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800733 TEST_REQUIRES_ARM_NEON;
734 for (uint32_t n = 16; n <= 24; n += 8) {
735 for (size_t k = 1; k <= 40; k += 9) {
736 GemmMicrokernelTester()
737 .mr(4)
738 .nr(8)
739 .kr(1)
740 .sr(1)
741 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -0800742 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800743 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800744 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800745 }
746 }
747 }
748
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800749 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800750 TEST_REQUIRES_ARM_NEON;
751 for (uint32_t n = 16; n <= 24; n += 8) {
752 for (size_t k = 1; k <= 40; k += 9) {
753 GemmMicrokernelTester()
754 .mr(4)
755 .nr(8)
756 .kr(1)
757 .sr(1)
758 .m(4)
759 .n(n)
760 .k(k)
761 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800762 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800763 }
764 }
765 }
766
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800767 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800768 TEST_REQUIRES_ARM_NEON;
769 for (uint32_t n = 16; n <= 24; n += 8) {
770 for (size_t k = 1; k <= 40; k += 9) {
771 for (uint32_t m = 1; m <= 4; m++) {
772 GemmMicrokernelTester()
773 .mr(4)
774 .nr(8)
775 .kr(1)
776 .sr(1)
777 .m(m)
778 .n(n)
779 .k(k)
780 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800781 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800782 }
783 }
784 }
785 }
786
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800787 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800788 TEST_REQUIRES_ARM_NEON;
789 for (size_t k = 1; k <= 40; k += 9) {
790 GemmMicrokernelTester()
791 .mr(4)
792 .nr(8)
793 .kr(1)
794 .sr(1)
795 .m(4)
796 .n(8)
797 .k(k)
798 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800799 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800800 }
801 }
802
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800803 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800804 TEST_REQUIRES_ARM_NEON;
805 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -0800806 for (uint32_t n = 1; n <= 8; n++) {
807 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800808 GemmMicrokernelTester()
809 .mr(4)
810 .nr(8)
811 .kr(1)
812 .sr(1)
813 .m(m)
814 .n(n)
815 .k(k)
816 .ks(3)
817 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800818 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800819 }
820 }
821 }
822 }
823
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800824 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800825 TEST_REQUIRES_ARM_NEON;
826 for (uint32_t n = 9; n < 16; n++) {
827 for (size_t k = 1; k <= 40; k += 9) {
828 GemmMicrokernelTester()
829 .mr(4)
830 .nr(8)
831 .kr(1)
832 .sr(1)
833 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -0800834 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800835 .k(k)
836 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800837 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800838 }
839 }
840 }
841
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800842 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800843 TEST_REQUIRES_ARM_NEON;
844 for (uint32_t n = 16; n <= 24; n += 8) {
845 for (size_t k = 1; k <= 40; k += 9) {
846 GemmMicrokernelTester()
847 .mr(4)
848 .nr(8)
849 .kr(1)
850 .sr(1)
851 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -0800852 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800853 .k(k)
854 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800855 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800856 }
857 }
858 }
859
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800860 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800861 TEST_REQUIRES_ARM_NEON;
862 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -0800863 for (uint32_t n = 1; n <= 8; n++) {
864 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800865 GemmMicrokernelTester()
866 .mr(4)
867 .nr(8)
868 .kr(1)
869 .sr(1)
870 .m(m)
871 .n(n)
872 .k(k)
873 .cm_stride(11)
874 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800875 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800876 }
877 }
878 }
879 }
880
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800881 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800882 TEST_REQUIRES_ARM_NEON;
883 for (size_t k = 1; k <= 40; k += 9) {
884 GemmMicrokernelTester()
885 .mr(4)
886 .nr(8)
887 .kr(1)
888 .sr(1)
889 .m(4)
890 .n(8)
891 .k(k)
892 .ks(3)
893 .a_offset(163)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800894 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800895 }
896 }
897
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800898 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800899 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -0800900 for (size_t k = 1; k <= 40; k += 9) {
901 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800902 GemmMicrokernelTester()
903 .mr(4)
904 .nr(8)
905 .kr(1)
906 .sr(1)
907 .m(4)
908 .n(8)
909 .k(k)
910 .ks(3)
911 .a_offset(163)
912 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800913 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800914 }
915 }
916 }
917
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800918 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800919 TEST_REQUIRES_ARM_NEON;
920 GemmMicrokernelTester()
921 .mr(4)
922 .nr(8)
923 .kr(1)
924 .sr(1)
925 .m(4)
926 .n(8)
927 .k(8)
928 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800929 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800930 }
931
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800932 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800933 TEST_REQUIRES_ARM_NEON;
934 GemmMicrokernelTester()
935 .mr(4)
936 .nr(8)
937 .kr(1)
938 .sr(1)
939 .m(4)
940 .n(8)
941 .k(8)
942 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800943 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800944 }
945
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800946 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_PRFM_LD64, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800947 TEST_REQUIRES_ARM_NEON;
948 GemmMicrokernelTester()
949 .mr(4)
950 .nr(8)
951 .kr(1)
952 .sr(1)
953 .m(4)
954 .n(8)
955 .k(8)
956 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800957 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_prfm_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800958 }
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800959#endif // XNN_ARCH_ARM && XNN_ENABLE_ASSEMBLY
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -0800960
961
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800962#if XNN_ARCH_ARM && XNN_ENABLE_ASSEMBLY
963 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_eq_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800964 TEST_REQUIRES_ARM_NEON;
965 GemmMicrokernelTester()
966 .mr(4)
967 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800968 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800969 .sr(1)
970 .m(4)
971 .n(8)
972 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800973 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800974 }
975
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800976 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800977 TEST_REQUIRES_ARM_NEON;
978 GemmMicrokernelTester()
979 .mr(4)
980 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800981 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800982 .sr(1)
983 .m(4)
984 .n(8)
985 .k(8)
986 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800987 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800988 }
989
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800990 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_eq_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800991 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -0800992 for (uint32_t n = 1; n <= 8; n++) {
993 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800994 GemmMicrokernelTester()
995 .mr(4)
996 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -0800997 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -0800998 .sr(1)
999 .m(m)
1000 .n(n)
1001 .k(8)
1002 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001003 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001004 }
1005 }
1006 }
1007
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001008 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_eq_8_subtile_m) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001009 TEST_REQUIRES_ARM_NEON;
1010 for (uint32_t m = 1; m <= 4; m++) {
1011 GemmMicrokernelTester()
1012 .mr(4)
1013 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001014 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001015 .sr(1)
1016 .m(m)
1017 .n(8)
1018 .k(8)
1019 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001020 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001021 }
1022 }
1023
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001024 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_eq_8_subtile_n) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001025 TEST_REQUIRES_ARM_NEON;
1026 for (uint32_t n = 1; n <= 8; n++) {
1027 GemmMicrokernelTester()
1028 .mr(4)
1029 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001030 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001031 .sr(1)
1032 .m(4)
1033 .n(n)
1034 .k(8)
1035 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001036 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001037 }
1038 }
1039
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001040 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_lt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001041 TEST_REQUIRES_ARM_NEON;
1042 for (size_t k = 1; k < 8; k++) {
1043 GemmMicrokernelTester()
1044 .mr(4)
1045 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001046 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001047 .sr(1)
1048 .m(4)
1049 .n(8)
1050 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001051 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001052 }
1053 }
1054
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001055 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_lt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001056 TEST_REQUIRES_ARM_NEON;
1057 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001058 for (uint32_t n = 1; n <= 8; n++) {
1059 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001060 GemmMicrokernelTester()
1061 .mr(4)
1062 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001063 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001064 .sr(1)
1065 .m(m)
1066 .n(n)
1067 .k(k)
1068 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001069 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001070 }
1071 }
1072 }
1073 }
1074
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001075 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_gt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001076 TEST_REQUIRES_ARM_NEON;
1077 for (size_t k = 9; k < 16; k++) {
1078 GemmMicrokernelTester()
1079 .mr(4)
1080 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001081 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001082 .sr(1)
1083 .m(4)
1084 .n(8)
1085 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001086 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001087 }
1088 }
1089
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001090 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_gt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001091 TEST_REQUIRES_ARM_NEON;
1092 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001093 for (uint32_t n = 1; n <= 8; n++) {
1094 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001095 GemmMicrokernelTester()
1096 .mr(4)
1097 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001098 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001099 .sr(1)
1100 .m(m)
1101 .n(n)
1102 .k(k)
1103 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001104 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001105 }
1106 }
1107 }
1108 }
1109
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001110 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_div_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001111 TEST_REQUIRES_ARM_NEON;
1112 for (size_t k = 16; k <= 80; k += 8) {
1113 GemmMicrokernelTester()
1114 .mr(4)
1115 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001116 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001117 .sr(1)
1118 .m(4)
1119 .n(8)
1120 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001121 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001122 }
1123 }
1124
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001125 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, k_div_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001126 TEST_REQUIRES_ARM_NEON;
1127 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001128 for (uint32_t n = 1; n <= 8; n++) {
1129 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001130 GemmMicrokernelTester()
1131 .mr(4)
1132 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001133 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001134 .sr(1)
1135 .m(m)
1136 .n(n)
1137 .k(k)
1138 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001139 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001140 }
1141 }
1142 }
1143 }
1144
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001145 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, n_gt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001146 TEST_REQUIRES_ARM_NEON;
1147 for (uint32_t n = 9; n < 16; n++) {
1148 for (size_t k = 1; k <= 40; k += 9) {
1149 GemmMicrokernelTester()
1150 .mr(4)
1151 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001152 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001153 .sr(1)
1154 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001155 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001156 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001157 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001158 }
1159 }
1160 }
1161
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001162 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, n_gt_8_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001163 TEST_REQUIRES_ARM_NEON;
1164 for (uint32_t n = 9; n < 16; n++) {
1165 for (size_t k = 1; k <= 40; k += 9) {
1166 GemmMicrokernelTester()
1167 .mr(4)
1168 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001169 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001170 .sr(1)
1171 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001172 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001173 .k(k)
1174 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001175 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001176 }
1177 }
1178 }
1179
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001180 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, n_gt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001181 TEST_REQUIRES_ARM_NEON;
1182 for (uint32_t n = 9; n < 16; n++) {
1183 for (size_t k = 1; k <= 40; k += 9) {
1184 for (uint32_t m = 1; m <= 4; m++) {
1185 GemmMicrokernelTester()
1186 .mr(4)
1187 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001188 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001189 .sr(1)
1190 .m(m)
1191 .n(n)
1192 .k(k)
1193 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001194 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001195 }
1196 }
1197 }
1198 }
1199
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001200 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, n_div_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001201 TEST_REQUIRES_ARM_NEON;
1202 for (uint32_t n = 16; n <= 24; n += 8) {
1203 for (size_t k = 1; k <= 40; k += 9) {
1204 GemmMicrokernelTester()
1205 .mr(4)
1206 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001207 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001208 .sr(1)
1209 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001210 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001211 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001212 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001213 }
1214 }
1215 }
1216
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001217 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, n_div_8_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001218 TEST_REQUIRES_ARM_NEON;
1219 for (uint32_t n = 16; n <= 24; n += 8) {
1220 for (size_t k = 1; k <= 40; k += 9) {
1221 GemmMicrokernelTester()
1222 .mr(4)
1223 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001224 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001225 .sr(1)
1226 .m(4)
1227 .n(n)
1228 .k(k)
1229 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001230 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001231 }
1232 }
1233 }
1234
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001235 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, n_div_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001236 TEST_REQUIRES_ARM_NEON;
1237 for (uint32_t n = 16; n <= 24; n += 8) {
1238 for (size_t k = 1; k <= 40; k += 9) {
1239 for (uint32_t m = 1; m <= 4; m++) {
1240 GemmMicrokernelTester()
1241 .mr(4)
1242 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001243 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001244 .sr(1)
1245 .m(m)
1246 .n(n)
1247 .k(k)
1248 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001249 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001250 }
1251 }
1252 }
1253 }
1254
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001255 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001256 TEST_REQUIRES_ARM_NEON;
1257 for (size_t k = 1; k <= 40; k += 9) {
1258 GemmMicrokernelTester()
1259 .mr(4)
1260 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001261 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001262 .sr(1)
1263 .m(4)
1264 .n(8)
1265 .k(k)
1266 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001267 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001268 }
1269 }
1270
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001271 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, small_kernel_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001272 TEST_REQUIRES_ARM_NEON;
1273 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001274 for (uint32_t n = 1; n <= 8; n++) {
1275 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001276 GemmMicrokernelTester()
1277 .mr(4)
1278 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001279 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001280 .sr(1)
1281 .m(m)
1282 .n(n)
1283 .k(k)
1284 .ks(3)
1285 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001286 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001287 }
1288 }
1289 }
1290 }
1291
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001292 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, n_gt_8_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001293 TEST_REQUIRES_ARM_NEON;
1294 for (uint32_t n = 9; n < 16; n++) {
1295 for (size_t k = 1; k <= 40; k += 9) {
1296 GemmMicrokernelTester()
1297 .mr(4)
1298 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001299 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001300 .sr(1)
1301 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001302 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001303 .k(k)
1304 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001305 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001306 }
1307 }
1308 }
1309
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001310 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, n_div_8_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001311 TEST_REQUIRES_ARM_NEON;
1312 for (uint32_t n = 16; n <= 24; n += 8) {
1313 for (size_t k = 1; k <= 40; k += 9) {
1314 GemmMicrokernelTester()
1315 .mr(4)
1316 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001317 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001318 .sr(1)
1319 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001320 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001321 .k(k)
1322 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001323 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001324 }
1325 }
1326 }
1327
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001328 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, strided_cm_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001329 TEST_REQUIRES_ARM_NEON;
1330 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001331 for (uint32_t n = 1; n <= 8; n++) {
1332 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001333 GemmMicrokernelTester()
1334 .mr(4)
1335 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001336 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001337 .sr(1)
1338 .m(m)
1339 .n(n)
1340 .k(k)
1341 .cm_stride(11)
1342 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001343 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001344 }
1345 }
1346 }
1347 }
1348
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001349 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, a_offset) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001350 TEST_REQUIRES_ARM_NEON;
1351 for (size_t k = 1; k <= 40; k += 9) {
1352 GemmMicrokernelTester()
1353 .mr(4)
1354 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001355 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001356 .sr(1)
1357 .m(4)
1358 .n(8)
1359 .k(k)
1360 .ks(3)
1361 .a_offset(163)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001362 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001363 }
1364 }
1365
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001366 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, zero) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001367 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08001368 for (size_t k = 1; k <= 40; k += 9) {
1369 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001370 GemmMicrokernelTester()
1371 .mr(4)
1372 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001373 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001374 .sr(1)
1375 .m(4)
1376 .n(8)
1377 .k(k)
1378 .ks(3)
1379 .a_offset(163)
1380 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001381 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001382 }
1383 }
1384 }
1385
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001386 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, qmin) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001387 TEST_REQUIRES_ARM_NEON;
1388 GemmMicrokernelTester()
1389 .mr(4)
1390 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001391 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001392 .sr(1)
1393 .m(4)
1394 .n(8)
1395 .k(8)
1396 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001397 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001398 }
1399
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001400 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, qmax) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001401 TEST_REQUIRES_ARM_NEON;
1402 GemmMicrokernelTester()
1403 .mr(4)
1404 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001405 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001406 .sr(1)
1407 .m(4)
1408 .n(8)
1409 .k(8)
1410 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001411 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001412 }
1413
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001414 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__AARCH32_NEON_MLAL_LANE_LD64, strided_cm) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001415 TEST_REQUIRES_ARM_NEON;
1416 GemmMicrokernelTester()
1417 .mr(4)
1418 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001419 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08001420 .sr(1)
1421 .m(4)
1422 .n(8)
1423 .k(8)
1424 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001425 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__aarch32_neon_mlal_lane_ld64, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001426 }
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001427#endif // XNN_ARCH_ARM && XNN_ENABLE_ASSEMBLY
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001428
1429
1430#if XNN_ARCH_ARM || XNN_ARCH_ARM64
1431 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_eq_8) {
1432 TEST_REQUIRES_ARM_NEON;
1433 GemmMicrokernelTester()
1434 .mr(1)
1435 .nr(16)
1436 .kr(2)
1437 .sr(1)
1438 .m(1)
1439 .n(16)
1440 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -08001441 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001442 }
1443
1444 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, strided_cn) {
1445 TEST_REQUIRES_ARM_NEON;
1446 GemmMicrokernelTester()
1447 .mr(1)
1448 .nr(16)
1449 .kr(2)
1450 .sr(1)
1451 .m(1)
1452 .n(16)
1453 .k(8)
1454 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -08001455 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001456 }
1457
1458 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_eq_8_subtile) {
1459 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08001460 for (uint32_t n = 1; n <= 16; n++) {
1461 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001462 GemmMicrokernelTester()
1463 .mr(1)
1464 .nr(16)
1465 .kr(2)
1466 .sr(1)
1467 .m(m)
1468 .n(n)
1469 .k(8)
1470 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001471 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001472 }
1473 }
1474 }
1475
1476 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_eq_8_subtile_m) {
1477 TEST_REQUIRES_ARM_NEON;
1478 for (uint32_t m = 1; m <= 1; m++) {
1479 GemmMicrokernelTester()
1480 .mr(1)
1481 .nr(16)
1482 .kr(2)
1483 .sr(1)
1484 .m(m)
1485 .n(16)
1486 .k(8)
1487 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001488 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001489 }
1490 }
1491
1492 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_eq_8_subtile_n) {
1493 TEST_REQUIRES_ARM_NEON;
1494 for (uint32_t n = 1; n <= 16; n++) {
1495 GemmMicrokernelTester()
1496 .mr(1)
1497 .nr(16)
1498 .kr(2)
1499 .sr(1)
1500 .m(1)
1501 .n(n)
1502 .k(8)
1503 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001504 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001505 }
1506 }
1507
1508 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_lt_8) {
1509 TEST_REQUIRES_ARM_NEON;
1510 for (size_t k = 1; k < 8; k++) {
1511 GemmMicrokernelTester()
1512 .mr(1)
1513 .nr(16)
1514 .kr(2)
1515 .sr(1)
1516 .m(1)
1517 .n(16)
1518 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08001519 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001520 }
1521 }
1522
1523 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_lt_8_subtile) {
1524 TEST_REQUIRES_ARM_NEON;
1525 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001526 for (uint32_t n = 1; n <= 16; n++) {
1527 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001528 GemmMicrokernelTester()
1529 .mr(1)
1530 .nr(16)
1531 .kr(2)
1532 .sr(1)
1533 .m(m)
1534 .n(n)
1535 .k(k)
1536 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001537 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001538 }
1539 }
1540 }
1541 }
1542
1543 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_gt_8) {
1544 TEST_REQUIRES_ARM_NEON;
1545 for (size_t k = 9; k < 16; k++) {
1546 GemmMicrokernelTester()
1547 .mr(1)
1548 .nr(16)
1549 .kr(2)
1550 .sr(1)
1551 .m(1)
1552 .n(16)
1553 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08001554 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001555 }
1556 }
1557
1558 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_gt_8_subtile) {
1559 TEST_REQUIRES_ARM_NEON;
1560 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001561 for (uint32_t n = 1; n <= 16; n++) {
1562 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001563 GemmMicrokernelTester()
1564 .mr(1)
1565 .nr(16)
1566 .kr(2)
1567 .sr(1)
1568 .m(m)
1569 .n(n)
1570 .k(k)
1571 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001572 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001573 }
1574 }
1575 }
1576 }
1577
1578 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_div_8) {
1579 TEST_REQUIRES_ARM_NEON;
1580 for (size_t k = 16; k <= 80; k += 8) {
1581 GemmMicrokernelTester()
1582 .mr(1)
1583 .nr(16)
1584 .kr(2)
1585 .sr(1)
1586 .m(1)
1587 .n(16)
1588 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08001589 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001590 }
1591 }
1592
1593 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, k_div_8_subtile) {
1594 TEST_REQUIRES_ARM_NEON;
1595 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001596 for (uint32_t n = 1; n <= 16; n++) {
1597 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001598 GemmMicrokernelTester()
1599 .mr(1)
1600 .nr(16)
1601 .kr(2)
1602 .sr(1)
1603 .m(m)
1604 .n(n)
1605 .k(k)
1606 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001607 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001608 }
1609 }
1610 }
1611 }
1612
1613 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, n_gt_16) {
1614 TEST_REQUIRES_ARM_NEON;
1615 for (uint32_t n = 17; n < 32; n++) {
1616 for (size_t k = 1; k <= 40; k += 9) {
1617 GemmMicrokernelTester()
1618 .mr(1)
1619 .nr(16)
1620 .kr(2)
1621 .sr(1)
1622 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001623 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001624 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08001625 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001626 }
1627 }
1628 }
1629
1630 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, n_gt_16_strided_cn) {
1631 TEST_REQUIRES_ARM_NEON;
1632 for (uint32_t n = 17; n < 32; n++) {
1633 for (size_t k = 1; k <= 40; k += 9) {
1634 GemmMicrokernelTester()
1635 .mr(1)
1636 .nr(16)
1637 .kr(2)
1638 .sr(1)
1639 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001640 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001641 .k(k)
1642 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -08001643 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001644 }
1645 }
1646 }
1647
1648 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, n_gt_16_subtile) {
1649 TEST_REQUIRES_ARM_NEON;
1650 for (uint32_t n = 17; n < 32; n++) {
1651 for (size_t k = 1; k <= 40; k += 9) {
1652 for (uint32_t m = 1; m <= 1; m++) {
1653 GemmMicrokernelTester()
1654 .mr(1)
1655 .nr(16)
1656 .kr(2)
1657 .sr(1)
1658 .m(m)
1659 .n(n)
1660 .k(k)
1661 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001662 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001663 }
1664 }
1665 }
1666 }
1667
1668 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, n_div_16) {
1669 TEST_REQUIRES_ARM_NEON;
1670 for (uint32_t n = 32; n <= 48; n += 16) {
1671 for (size_t k = 1; k <= 40; k += 9) {
1672 GemmMicrokernelTester()
1673 .mr(1)
1674 .nr(16)
1675 .kr(2)
1676 .sr(1)
1677 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001678 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001679 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08001680 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001681 }
1682 }
1683 }
1684
1685 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, n_div_16_strided_cn) {
1686 TEST_REQUIRES_ARM_NEON;
1687 for (uint32_t n = 32; n <= 48; n += 16) {
1688 for (size_t k = 1; k <= 40; k += 9) {
1689 GemmMicrokernelTester()
1690 .mr(1)
1691 .nr(16)
1692 .kr(2)
1693 .sr(1)
1694 .m(1)
1695 .n(n)
1696 .k(k)
1697 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -08001698 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001699 }
1700 }
1701 }
1702
1703 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, n_div_16_subtile) {
1704 TEST_REQUIRES_ARM_NEON;
1705 for (uint32_t n = 32; n <= 48; n += 16) {
1706 for (size_t k = 1; k <= 40; k += 9) {
1707 for (uint32_t m = 1; m <= 1; m++) {
1708 GemmMicrokernelTester()
1709 .mr(1)
1710 .nr(16)
1711 .kr(2)
1712 .sr(1)
1713 .m(m)
1714 .n(n)
1715 .k(k)
1716 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001717 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001718 }
1719 }
1720 }
1721 }
1722
1723 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, small_kernel) {
1724 TEST_REQUIRES_ARM_NEON;
1725 for (size_t k = 1; k <= 40; k += 9) {
1726 GemmMicrokernelTester()
1727 .mr(1)
1728 .nr(16)
1729 .kr(2)
1730 .sr(1)
1731 .m(1)
1732 .n(16)
1733 .k(k)
1734 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08001735 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001736 }
1737 }
1738
1739 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, small_kernel_subtile) {
1740 TEST_REQUIRES_ARM_NEON;
1741 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001742 for (uint32_t n = 1; n <= 16; n++) {
1743 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001744 GemmMicrokernelTester()
1745 .mr(1)
1746 .nr(16)
1747 .kr(2)
1748 .sr(1)
1749 .m(m)
1750 .n(n)
1751 .k(k)
1752 .ks(3)
1753 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001754 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001755 }
1756 }
1757 }
1758 }
1759
1760 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, n_gt_16_small_kernel) {
1761 TEST_REQUIRES_ARM_NEON;
1762 for (uint32_t n = 17; n < 32; n++) {
1763 for (size_t k = 1; k <= 40; k += 9) {
1764 GemmMicrokernelTester()
1765 .mr(1)
1766 .nr(16)
1767 .kr(2)
1768 .sr(1)
1769 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001770 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001771 .k(k)
1772 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08001773 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001774 }
1775 }
1776 }
1777
1778 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, n_div_16_small_kernel) {
1779 TEST_REQUIRES_ARM_NEON;
1780 for (uint32_t n = 32; n <= 48; n += 16) {
1781 for (size_t k = 1; k <= 40; k += 9) {
1782 GemmMicrokernelTester()
1783 .mr(1)
1784 .nr(16)
1785 .kr(2)
1786 .sr(1)
1787 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08001788 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001789 .k(k)
1790 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08001791 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001792 }
1793 }
1794 }
1795
1796 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, strided_cm_subtile) {
1797 TEST_REQUIRES_ARM_NEON;
1798 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08001799 for (uint32_t n = 1; n <= 16; n++) {
1800 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001801 GemmMicrokernelTester()
1802 .mr(1)
1803 .nr(16)
1804 .kr(2)
1805 .sr(1)
1806 .m(m)
1807 .n(n)
1808 .k(k)
1809 .cm_stride(19)
1810 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08001811 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001812 }
1813 }
1814 }
1815 }
1816
1817 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, a_offset) {
1818 TEST_REQUIRES_ARM_NEON;
1819 for (size_t k = 1; k <= 40; k += 9) {
1820 GemmMicrokernelTester()
1821 .mr(1)
1822 .nr(16)
1823 .kr(2)
1824 .sr(1)
1825 .m(1)
1826 .n(16)
1827 .k(k)
1828 .ks(3)
1829 .a_offset(43)
Marat Dukhan50323b82022-01-11 00:12:01 -08001830 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001831 }
1832 }
1833
1834 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, zero) {
1835 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08001836 for (size_t k = 1; k <= 40; k += 9) {
1837 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001838 GemmMicrokernelTester()
1839 .mr(1)
1840 .nr(16)
1841 .kr(2)
1842 .sr(1)
1843 .m(1)
1844 .n(16)
1845 .k(k)
1846 .ks(3)
1847 .a_offset(43)
1848 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -08001849 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001850 }
1851 }
1852 }
1853
1854 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, qmin) {
1855 TEST_REQUIRES_ARM_NEON;
1856 GemmMicrokernelTester()
1857 .mr(1)
1858 .nr(16)
1859 .kr(2)
1860 .sr(1)
1861 .m(1)
1862 .n(16)
1863 .k(8)
1864 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08001865 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001866 }
1867
1868 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, qmax) {
1869 TEST_REQUIRES_ARM_NEON;
1870 GemmMicrokernelTester()
1871 .mr(1)
1872 .nr(16)
1873 .kr(2)
1874 .sr(1)
1875 .m(1)
1876 .n(16)
1877 .k(8)
1878 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08001879 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001880 }
1881
1882 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MULL_LD1R, strided_cm) {
1883 TEST_REQUIRES_ARM_NEON;
1884 GemmMicrokernelTester()
1885 .mr(1)
1886 .nr(16)
1887 .kr(2)
1888 .sr(1)
1889 .m(1)
1890 .n(16)
1891 .k(8)
1892 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -08001893 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08001894 }
1895#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
1896
1897
1898#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -08001899 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_eq_8) {
1900 TEST_REQUIRES_ARM_NEON;
1901 GemmMicrokernelTester()
1902 .mr(2)
1903 .nr(16)
1904 .kr(2)
1905 .sr(1)
1906 .m(2)
1907 .n(16)
1908 .k(8)
1909 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
1910 }
1911
1912 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, strided_cn) {
1913 TEST_REQUIRES_ARM_NEON;
1914 GemmMicrokernelTester()
1915 .mr(2)
1916 .nr(16)
1917 .kr(2)
1918 .sr(1)
1919 .m(2)
1920 .n(16)
1921 .k(8)
1922 .cn_stride(19)
1923 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
1924 }
1925
1926 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_eq_8_subtile) {
1927 TEST_REQUIRES_ARM_NEON;
1928 for (uint32_t n = 1; n <= 16; n++) {
1929 for (uint32_t m = 1; m <= 2; m++) {
1930 GemmMicrokernelTester()
1931 .mr(2)
1932 .nr(16)
1933 .kr(2)
1934 .sr(1)
1935 .m(m)
1936 .n(n)
1937 .k(8)
1938 .iterations(1)
1939 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
1940 }
1941 }
1942 }
1943
1944 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_eq_8_subtile_m) {
1945 TEST_REQUIRES_ARM_NEON;
1946 for (uint32_t m = 1; m <= 2; m++) {
1947 GemmMicrokernelTester()
1948 .mr(2)
1949 .nr(16)
1950 .kr(2)
1951 .sr(1)
1952 .m(m)
1953 .n(16)
1954 .k(8)
1955 .iterations(1)
1956 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
1957 }
1958 }
1959
1960 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_eq_8_subtile_n) {
1961 TEST_REQUIRES_ARM_NEON;
1962 for (uint32_t n = 1; n <= 16; n++) {
1963 GemmMicrokernelTester()
1964 .mr(2)
1965 .nr(16)
1966 .kr(2)
1967 .sr(1)
1968 .m(2)
1969 .n(n)
1970 .k(8)
1971 .iterations(1)
1972 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
1973 }
1974 }
1975
1976 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_lt_8) {
1977 TEST_REQUIRES_ARM_NEON;
1978 for (size_t k = 1; k < 8; k++) {
1979 GemmMicrokernelTester()
1980 .mr(2)
1981 .nr(16)
1982 .kr(2)
1983 .sr(1)
1984 .m(2)
1985 .n(16)
1986 .k(k)
1987 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
1988 }
1989 }
1990
1991 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_lt_8_subtile) {
1992 TEST_REQUIRES_ARM_NEON;
1993 for (size_t k = 1; k < 8; k++) {
1994 for (uint32_t n = 1; n <= 16; n++) {
1995 for (uint32_t m = 1; m <= 2; m++) {
1996 GemmMicrokernelTester()
1997 .mr(2)
1998 .nr(16)
1999 .kr(2)
2000 .sr(1)
2001 .m(m)
2002 .n(n)
2003 .k(k)
2004 .iterations(1)
2005 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2006 }
2007 }
2008 }
2009 }
2010
2011 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_gt_8) {
2012 TEST_REQUIRES_ARM_NEON;
2013 for (size_t k = 9; k < 16; k++) {
2014 GemmMicrokernelTester()
2015 .mr(2)
2016 .nr(16)
2017 .kr(2)
2018 .sr(1)
2019 .m(2)
2020 .n(16)
2021 .k(k)
2022 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2023 }
2024 }
2025
2026 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_gt_8_subtile) {
2027 TEST_REQUIRES_ARM_NEON;
2028 for (size_t k = 9; k < 16; k++) {
2029 for (uint32_t n = 1; n <= 16; n++) {
2030 for (uint32_t m = 1; m <= 2; m++) {
2031 GemmMicrokernelTester()
2032 .mr(2)
2033 .nr(16)
2034 .kr(2)
2035 .sr(1)
2036 .m(m)
2037 .n(n)
2038 .k(k)
2039 .iterations(1)
2040 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2041 }
2042 }
2043 }
2044 }
2045
2046 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_div_8) {
2047 TEST_REQUIRES_ARM_NEON;
2048 for (size_t k = 16; k <= 80; k += 8) {
2049 GemmMicrokernelTester()
2050 .mr(2)
2051 .nr(16)
2052 .kr(2)
2053 .sr(1)
2054 .m(2)
2055 .n(16)
2056 .k(k)
2057 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2058 }
2059 }
2060
2061 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, k_div_8_subtile) {
2062 TEST_REQUIRES_ARM_NEON;
2063 for (size_t k = 16; k <= 80; k += 8) {
2064 for (uint32_t n = 1; n <= 16; n++) {
2065 for (uint32_t m = 1; m <= 2; m++) {
2066 GemmMicrokernelTester()
2067 .mr(2)
2068 .nr(16)
2069 .kr(2)
2070 .sr(1)
2071 .m(m)
2072 .n(n)
2073 .k(k)
2074 .iterations(1)
2075 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2076 }
2077 }
2078 }
2079 }
2080
2081 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, n_gt_16) {
2082 TEST_REQUIRES_ARM_NEON;
2083 for (uint32_t n = 17; n < 32; n++) {
2084 for (size_t k = 1; k <= 40; k += 9) {
2085 GemmMicrokernelTester()
2086 .mr(2)
2087 .nr(16)
2088 .kr(2)
2089 .sr(1)
2090 .m(2)
2091 .n(n)
2092 .k(k)
2093 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2094 }
2095 }
2096 }
2097
2098 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, n_gt_16_strided_cn) {
2099 TEST_REQUIRES_ARM_NEON;
2100 for (uint32_t n = 17; n < 32; n++) {
2101 for (size_t k = 1; k <= 40; k += 9) {
2102 GemmMicrokernelTester()
2103 .mr(2)
2104 .nr(16)
2105 .kr(2)
2106 .sr(1)
2107 .m(2)
2108 .n(n)
2109 .k(k)
2110 .cn_stride(19)
2111 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2112 }
2113 }
2114 }
2115
2116 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, n_gt_16_subtile) {
2117 TEST_REQUIRES_ARM_NEON;
2118 for (uint32_t n = 17; n < 32; n++) {
2119 for (size_t k = 1; k <= 40; k += 9) {
2120 for (uint32_t m = 1; m <= 2; m++) {
2121 GemmMicrokernelTester()
2122 .mr(2)
2123 .nr(16)
2124 .kr(2)
2125 .sr(1)
2126 .m(m)
2127 .n(n)
2128 .k(k)
2129 .iterations(1)
2130 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2131 }
2132 }
2133 }
2134 }
2135
2136 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, n_div_16) {
2137 TEST_REQUIRES_ARM_NEON;
2138 for (uint32_t n = 32; n <= 48; n += 16) {
2139 for (size_t k = 1; k <= 40; k += 9) {
2140 GemmMicrokernelTester()
2141 .mr(2)
2142 .nr(16)
2143 .kr(2)
2144 .sr(1)
2145 .m(2)
2146 .n(n)
2147 .k(k)
2148 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2149 }
2150 }
2151 }
2152
2153 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, n_div_16_strided_cn) {
2154 TEST_REQUIRES_ARM_NEON;
2155 for (uint32_t n = 32; n <= 48; n += 16) {
2156 for (size_t k = 1; k <= 40; k += 9) {
2157 GemmMicrokernelTester()
2158 .mr(2)
2159 .nr(16)
2160 .kr(2)
2161 .sr(1)
2162 .m(2)
2163 .n(n)
2164 .k(k)
2165 .cn_stride(19)
2166 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2167 }
2168 }
2169 }
2170
2171 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, n_div_16_subtile) {
2172 TEST_REQUIRES_ARM_NEON;
2173 for (uint32_t n = 32; n <= 48; n += 16) {
2174 for (size_t k = 1; k <= 40; k += 9) {
2175 for (uint32_t m = 1; m <= 2; m++) {
2176 GemmMicrokernelTester()
2177 .mr(2)
2178 .nr(16)
2179 .kr(2)
2180 .sr(1)
2181 .m(m)
2182 .n(n)
2183 .k(k)
2184 .iterations(1)
2185 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2186 }
2187 }
2188 }
2189 }
2190
2191 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, small_kernel) {
2192 TEST_REQUIRES_ARM_NEON;
2193 for (size_t k = 1; k <= 40; k += 9) {
2194 GemmMicrokernelTester()
2195 .mr(2)
2196 .nr(16)
2197 .kr(2)
2198 .sr(1)
2199 .m(2)
2200 .n(16)
2201 .k(k)
2202 .ks(3)
2203 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2204 }
2205 }
2206
2207 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, small_kernel_subtile) {
2208 TEST_REQUIRES_ARM_NEON;
2209 for (size_t k = 1; k <= 40; k += 9) {
2210 for (uint32_t n = 1; n <= 16; n++) {
2211 for (uint32_t m = 1; m <= 2; m++) {
2212 GemmMicrokernelTester()
2213 .mr(2)
2214 .nr(16)
2215 .kr(2)
2216 .sr(1)
2217 .m(m)
2218 .n(n)
2219 .k(k)
2220 .ks(3)
2221 .iterations(1)
2222 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2223 }
2224 }
2225 }
2226 }
2227
2228 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, n_gt_16_small_kernel) {
2229 TEST_REQUIRES_ARM_NEON;
2230 for (uint32_t n = 17; n < 32; n++) {
2231 for (size_t k = 1; k <= 40; k += 9) {
2232 GemmMicrokernelTester()
2233 .mr(2)
2234 .nr(16)
2235 .kr(2)
2236 .sr(1)
2237 .m(2)
2238 .n(n)
2239 .k(k)
2240 .ks(3)
2241 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2242 }
2243 }
2244 }
2245
2246 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, n_div_16_small_kernel) {
2247 TEST_REQUIRES_ARM_NEON;
2248 for (uint32_t n = 32; n <= 48; n += 16) {
2249 for (size_t k = 1; k <= 40; k += 9) {
2250 GemmMicrokernelTester()
2251 .mr(2)
2252 .nr(16)
2253 .kr(2)
2254 .sr(1)
2255 .m(2)
2256 .n(n)
2257 .k(k)
2258 .ks(3)
2259 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2260 }
2261 }
2262 }
2263
2264 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, strided_cm_subtile) {
2265 TEST_REQUIRES_ARM_NEON;
2266 for (size_t k = 1; k <= 40; k += 9) {
2267 for (uint32_t n = 1; n <= 16; n++) {
2268 for (uint32_t m = 1; m <= 2; m++) {
2269 GemmMicrokernelTester()
2270 .mr(2)
2271 .nr(16)
2272 .kr(2)
2273 .sr(1)
2274 .m(m)
2275 .n(n)
2276 .k(k)
2277 .cm_stride(19)
2278 .iterations(1)
2279 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2280 }
2281 }
2282 }
2283 }
2284
2285 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, a_offset) {
2286 TEST_REQUIRES_ARM_NEON;
2287 for (size_t k = 1; k <= 40; k += 9) {
2288 GemmMicrokernelTester()
2289 .mr(2)
2290 .nr(16)
2291 .kr(2)
2292 .sr(1)
2293 .m(2)
2294 .n(16)
2295 .k(k)
2296 .ks(3)
2297 .a_offset(83)
2298 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2299 }
2300 }
2301
2302 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, zero) {
2303 TEST_REQUIRES_ARM_NEON;
2304 for (size_t k = 1; k <= 40; k += 9) {
2305 for (uint32_t mz = 0; mz < 2; mz++) {
2306 GemmMicrokernelTester()
2307 .mr(2)
2308 .nr(16)
2309 .kr(2)
2310 .sr(1)
2311 .m(2)
2312 .n(16)
2313 .k(k)
2314 .ks(3)
2315 .a_offset(83)
2316 .zero_index(mz)
2317 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2318 }
2319 }
2320 }
2321
2322 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, qmin) {
2323 TEST_REQUIRES_ARM_NEON;
2324 GemmMicrokernelTester()
2325 .mr(2)
2326 .nr(16)
2327 .kr(2)
2328 .sr(1)
2329 .m(2)
2330 .n(16)
2331 .k(8)
2332 .qmin(128)
2333 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2334 }
2335
2336 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, qmax) {
2337 TEST_REQUIRES_ARM_NEON;
2338 GemmMicrokernelTester()
2339 .mr(2)
2340 .nr(16)
2341 .kr(2)
2342 .sr(1)
2343 .m(2)
2344 .n(16)
2345 .k(8)
2346 .qmax(128)
2347 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2348 }
2349
2350 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MULL_LD1R, strided_cm) {
2351 TEST_REQUIRES_ARM_NEON;
2352 GemmMicrokernelTester()
2353 .mr(2)
2354 .nr(16)
2355 .kr(2)
2356 .sr(1)
2357 .m(2)
2358 .n(16)
2359 .k(8)
2360 .cm_stride(19)
2361 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2362 }
2363#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2364
2365
2366#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2367 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_eq_8) {
2368 TEST_REQUIRES_ARM_NEON;
2369 GemmMicrokernelTester()
2370 .mr(3)
2371 .nr(16)
2372 .kr(2)
2373 .sr(1)
2374 .m(3)
2375 .n(16)
2376 .k(8)
2377 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2378 }
2379
2380 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, strided_cn) {
2381 TEST_REQUIRES_ARM_NEON;
2382 GemmMicrokernelTester()
2383 .mr(3)
2384 .nr(16)
2385 .kr(2)
2386 .sr(1)
2387 .m(3)
2388 .n(16)
2389 .k(8)
2390 .cn_stride(19)
2391 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2392 }
2393
2394 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_eq_8_subtile) {
2395 TEST_REQUIRES_ARM_NEON;
2396 for (uint32_t n = 1; n <= 16; n++) {
2397 for (uint32_t m = 1; m <= 3; m++) {
2398 GemmMicrokernelTester()
2399 .mr(3)
2400 .nr(16)
2401 .kr(2)
2402 .sr(1)
2403 .m(m)
2404 .n(n)
2405 .k(8)
2406 .iterations(1)
2407 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2408 }
2409 }
2410 }
2411
2412 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_eq_8_subtile_m) {
2413 TEST_REQUIRES_ARM_NEON;
2414 for (uint32_t m = 1; m <= 3; m++) {
2415 GemmMicrokernelTester()
2416 .mr(3)
2417 .nr(16)
2418 .kr(2)
2419 .sr(1)
2420 .m(m)
2421 .n(16)
2422 .k(8)
2423 .iterations(1)
2424 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2425 }
2426 }
2427
2428 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_eq_8_subtile_n) {
2429 TEST_REQUIRES_ARM_NEON;
2430 for (uint32_t n = 1; n <= 16; n++) {
2431 GemmMicrokernelTester()
2432 .mr(3)
2433 .nr(16)
2434 .kr(2)
2435 .sr(1)
2436 .m(3)
2437 .n(n)
2438 .k(8)
2439 .iterations(1)
2440 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2441 }
2442 }
2443
2444 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_lt_8) {
2445 TEST_REQUIRES_ARM_NEON;
2446 for (size_t k = 1; k < 8; k++) {
2447 GemmMicrokernelTester()
2448 .mr(3)
2449 .nr(16)
2450 .kr(2)
2451 .sr(1)
2452 .m(3)
2453 .n(16)
2454 .k(k)
2455 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2456 }
2457 }
2458
2459 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_lt_8_subtile) {
2460 TEST_REQUIRES_ARM_NEON;
2461 for (size_t k = 1; k < 8; k++) {
2462 for (uint32_t n = 1; n <= 16; n++) {
2463 for (uint32_t m = 1; m <= 3; m++) {
2464 GemmMicrokernelTester()
2465 .mr(3)
2466 .nr(16)
2467 .kr(2)
2468 .sr(1)
2469 .m(m)
2470 .n(n)
2471 .k(k)
2472 .iterations(1)
2473 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2474 }
2475 }
2476 }
2477 }
2478
2479 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_gt_8) {
2480 TEST_REQUIRES_ARM_NEON;
2481 for (size_t k = 9; k < 16; k++) {
2482 GemmMicrokernelTester()
2483 .mr(3)
2484 .nr(16)
2485 .kr(2)
2486 .sr(1)
2487 .m(3)
2488 .n(16)
2489 .k(k)
2490 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2491 }
2492 }
2493
2494 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_gt_8_subtile) {
2495 TEST_REQUIRES_ARM_NEON;
2496 for (size_t k = 9; k < 16; k++) {
2497 for (uint32_t n = 1; n <= 16; n++) {
2498 for (uint32_t m = 1; m <= 3; m++) {
2499 GemmMicrokernelTester()
2500 .mr(3)
2501 .nr(16)
2502 .kr(2)
2503 .sr(1)
2504 .m(m)
2505 .n(n)
2506 .k(k)
2507 .iterations(1)
2508 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2509 }
2510 }
2511 }
2512 }
2513
2514 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_div_8) {
2515 TEST_REQUIRES_ARM_NEON;
2516 for (size_t k = 16; k <= 80; k += 8) {
2517 GemmMicrokernelTester()
2518 .mr(3)
2519 .nr(16)
2520 .kr(2)
2521 .sr(1)
2522 .m(3)
2523 .n(16)
2524 .k(k)
2525 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2526 }
2527 }
2528
2529 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, k_div_8_subtile) {
2530 TEST_REQUIRES_ARM_NEON;
2531 for (size_t k = 16; k <= 80; k += 8) {
2532 for (uint32_t n = 1; n <= 16; n++) {
2533 for (uint32_t m = 1; m <= 3; m++) {
2534 GemmMicrokernelTester()
2535 .mr(3)
2536 .nr(16)
2537 .kr(2)
2538 .sr(1)
2539 .m(m)
2540 .n(n)
2541 .k(k)
2542 .iterations(1)
2543 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2544 }
2545 }
2546 }
2547 }
2548
2549 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, n_gt_16) {
2550 TEST_REQUIRES_ARM_NEON;
2551 for (uint32_t n = 17; n < 32; n++) {
2552 for (size_t k = 1; k <= 40; k += 9) {
2553 GemmMicrokernelTester()
2554 .mr(3)
2555 .nr(16)
2556 .kr(2)
2557 .sr(1)
2558 .m(3)
2559 .n(n)
2560 .k(k)
2561 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2562 }
2563 }
2564 }
2565
2566 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, n_gt_16_strided_cn) {
2567 TEST_REQUIRES_ARM_NEON;
2568 for (uint32_t n = 17; n < 32; n++) {
2569 for (size_t k = 1; k <= 40; k += 9) {
2570 GemmMicrokernelTester()
2571 .mr(3)
2572 .nr(16)
2573 .kr(2)
2574 .sr(1)
2575 .m(3)
2576 .n(n)
2577 .k(k)
2578 .cn_stride(19)
2579 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2580 }
2581 }
2582 }
2583
2584 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, n_gt_16_subtile) {
2585 TEST_REQUIRES_ARM_NEON;
2586 for (uint32_t n = 17; n < 32; n++) {
2587 for (size_t k = 1; k <= 40; k += 9) {
2588 for (uint32_t m = 1; m <= 3; m++) {
2589 GemmMicrokernelTester()
2590 .mr(3)
2591 .nr(16)
2592 .kr(2)
2593 .sr(1)
2594 .m(m)
2595 .n(n)
2596 .k(k)
2597 .iterations(1)
2598 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2599 }
2600 }
2601 }
2602 }
2603
2604 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, n_div_16) {
2605 TEST_REQUIRES_ARM_NEON;
2606 for (uint32_t n = 32; n <= 48; n += 16) {
2607 for (size_t k = 1; k <= 40; k += 9) {
2608 GemmMicrokernelTester()
2609 .mr(3)
2610 .nr(16)
2611 .kr(2)
2612 .sr(1)
2613 .m(3)
2614 .n(n)
2615 .k(k)
2616 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2617 }
2618 }
2619 }
2620
2621 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, n_div_16_strided_cn) {
2622 TEST_REQUIRES_ARM_NEON;
2623 for (uint32_t n = 32; n <= 48; n += 16) {
2624 for (size_t k = 1; k <= 40; k += 9) {
2625 GemmMicrokernelTester()
2626 .mr(3)
2627 .nr(16)
2628 .kr(2)
2629 .sr(1)
2630 .m(3)
2631 .n(n)
2632 .k(k)
2633 .cn_stride(19)
2634 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2635 }
2636 }
2637 }
2638
2639 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, n_div_16_subtile) {
2640 TEST_REQUIRES_ARM_NEON;
2641 for (uint32_t n = 32; n <= 48; n += 16) {
2642 for (size_t k = 1; k <= 40; k += 9) {
2643 for (uint32_t m = 1; m <= 3; m++) {
2644 GemmMicrokernelTester()
2645 .mr(3)
2646 .nr(16)
2647 .kr(2)
2648 .sr(1)
2649 .m(m)
2650 .n(n)
2651 .k(k)
2652 .iterations(1)
2653 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2654 }
2655 }
2656 }
2657 }
2658
2659 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, small_kernel) {
2660 TEST_REQUIRES_ARM_NEON;
2661 for (size_t k = 1; k <= 40; k += 9) {
2662 GemmMicrokernelTester()
2663 .mr(3)
2664 .nr(16)
2665 .kr(2)
2666 .sr(1)
2667 .m(3)
2668 .n(16)
2669 .k(k)
2670 .ks(3)
2671 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2672 }
2673 }
2674
2675 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, small_kernel_subtile) {
2676 TEST_REQUIRES_ARM_NEON;
2677 for (size_t k = 1; k <= 40; k += 9) {
2678 for (uint32_t n = 1; n <= 16; n++) {
2679 for (uint32_t m = 1; m <= 3; m++) {
2680 GemmMicrokernelTester()
2681 .mr(3)
2682 .nr(16)
2683 .kr(2)
2684 .sr(1)
2685 .m(m)
2686 .n(n)
2687 .k(k)
2688 .ks(3)
2689 .iterations(1)
2690 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2691 }
2692 }
2693 }
2694 }
2695
2696 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, n_gt_16_small_kernel) {
2697 TEST_REQUIRES_ARM_NEON;
2698 for (uint32_t n = 17; n < 32; n++) {
2699 for (size_t k = 1; k <= 40; k += 9) {
2700 GemmMicrokernelTester()
2701 .mr(3)
2702 .nr(16)
2703 .kr(2)
2704 .sr(1)
2705 .m(3)
2706 .n(n)
2707 .k(k)
2708 .ks(3)
2709 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2710 }
2711 }
2712 }
2713
2714 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, n_div_16_small_kernel) {
2715 TEST_REQUIRES_ARM_NEON;
2716 for (uint32_t n = 32; n <= 48; n += 16) {
2717 for (size_t k = 1; k <= 40; k += 9) {
2718 GemmMicrokernelTester()
2719 .mr(3)
2720 .nr(16)
2721 .kr(2)
2722 .sr(1)
2723 .m(3)
2724 .n(n)
2725 .k(k)
2726 .ks(3)
2727 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2728 }
2729 }
2730 }
2731
2732 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, strided_cm_subtile) {
2733 TEST_REQUIRES_ARM_NEON;
2734 for (size_t k = 1; k <= 40; k += 9) {
2735 for (uint32_t n = 1; n <= 16; n++) {
2736 for (uint32_t m = 1; m <= 3; m++) {
2737 GemmMicrokernelTester()
2738 .mr(3)
2739 .nr(16)
2740 .kr(2)
2741 .sr(1)
2742 .m(m)
2743 .n(n)
2744 .k(k)
2745 .cm_stride(19)
2746 .iterations(1)
2747 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2748 }
2749 }
2750 }
2751 }
2752
2753 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, a_offset) {
2754 TEST_REQUIRES_ARM_NEON;
2755 for (size_t k = 1; k <= 40; k += 9) {
2756 GemmMicrokernelTester()
2757 .mr(3)
2758 .nr(16)
2759 .kr(2)
2760 .sr(1)
2761 .m(3)
2762 .n(16)
2763 .k(k)
2764 .ks(3)
2765 .a_offset(127)
2766 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2767 }
2768 }
2769
2770 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, zero) {
2771 TEST_REQUIRES_ARM_NEON;
2772 for (size_t k = 1; k <= 40; k += 9) {
2773 for (uint32_t mz = 0; mz < 3; mz++) {
2774 GemmMicrokernelTester()
2775 .mr(3)
2776 .nr(16)
2777 .kr(2)
2778 .sr(1)
2779 .m(3)
2780 .n(16)
2781 .k(k)
2782 .ks(3)
2783 .a_offset(127)
2784 .zero_index(mz)
2785 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2786 }
2787 }
2788 }
2789
2790 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, qmin) {
2791 TEST_REQUIRES_ARM_NEON;
2792 GemmMicrokernelTester()
2793 .mr(3)
2794 .nr(16)
2795 .kr(2)
2796 .sr(1)
2797 .m(3)
2798 .n(16)
2799 .k(8)
2800 .qmin(128)
2801 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2802 }
2803
2804 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, qmax) {
2805 TEST_REQUIRES_ARM_NEON;
2806 GemmMicrokernelTester()
2807 .mr(3)
2808 .nr(16)
2809 .kr(2)
2810 .sr(1)
2811 .m(3)
2812 .n(16)
2813 .k(8)
2814 .qmax(128)
2815 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2816 }
2817
2818 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_LD1R, strided_cm) {
2819 TEST_REQUIRES_ARM_NEON;
2820 GemmMicrokernelTester()
2821 .mr(3)
2822 .nr(16)
2823 .kr(2)
2824 .sr(1)
2825 .m(3)
2826 .n(16)
2827 .k(8)
2828 .cm_stride(19)
2829 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2830 }
2831#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
2832
2833
2834#if XNN_ARCH_ARM || XNN_ARCH_ARM64
2835 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_eq_8) {
2836 TEST_REQUIRES_ARM_NEON;
2837 GemmMicrokernelTester()
2838 .mr(4)
2839 .nr(16)
2840 .kr(2)
2841 .sr(1)
2842 .m(4)
2843 .n(16)
2844 .k(8)
2845 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2846 }
2847
2848 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, strided_cn) {
2849 TEST_REQUIRES_ARM_NEON;
2850 GemmMicrokernelTester()
2851 .mr(4)
2852 .nr(16)
2853 .kr(2)
2854 .sr(1)
2855 .m(4)
2856 .n(16)
2857 .k(8)
2858 .cn_stride(19)
2859 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2860 }
2861
2862 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_eq_8_subtile) {
2863 TEST_REQUIRES_ARM_NEON;
2864 for (uint32_t n = 1; n <= 16; n++) {
2865 for (uint32_t m = 1; m <= 4; m++) {
2866 GemmMicrokernelTester()
2867 .mr(4)
2868 .nr(16)
2869 .kr(2)
2870 .sr(1)
2871 .m(m)
2872 .n(n)
2873 .k(8)
2874 .iterations(1)
2875 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2876 }
2877 }
2878 }
2879
2880 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_eq_8_subtile_m) {
2881 TEST_REQUIRES_ARM_NEON;
2882 for (uint32_t m = 1; m <= 4; m++) {
2883 GemmMicrokernelTester()
2884 .mr(4)
2885 .nr(16)
2886 .kr(2)
2887 .sr(1)
2888 .m(m)
2889 .n(16)
2890 .k(8)
2891 .iterations(1)
2892 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2893 }
2894 }
2895
2896 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_eq_8_subtile_n) {
2897 TEST_REQUIRES_ARM_NEON;
2898 for (uint32_t n = 1; n <= 16; n++) {
2899 GemmMicrokernelTester()
2900 .mr(4)
2901 .nr(16)
2902 .kr(2)
2903 .sr(1)
2904 .m(4)
2905 .n(n)
2906 .k(8)
2907 .iterations(1)
2908 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2909 }
2910 }
2911
2912 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_lt_8) {
2913 TEST_REQUIRES_ARM_NEON;
2914 for (size_t k = 1; k < 8; k++) {
2915 GemmMicrokernelTester()
2916 .mr(4)
2917 .nr(16)
2918 .kr(2)
2919 .sr(1)
2920 .m(4)
2921 .n(16)
2922 .k(k)
2923 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2924 }
2925 }
2926
2927 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_lt_8_subtile) {
2928 TEST_REQUIRES_ARM_NEON;
2929 for (size_t k = 1; k < 8; k++) {
2930 for (uint32_t n = 1; n <= 16; n++) {
2931 for (uint32_t m = 1; m <= 4; m++) {
2932 GemmMicrokernelTester()
2933 .mr(4)
2934 .nr(16)
2935 .kr(2)
2936 .sr(1)
2937 .m(m)
2938 .n(n)
2939 .k(k)
2940 .iterations(1)
2941 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2942 }
2943 }
2944 }
2945 }
2946
2947 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_gt_8) {
2948 TEST_REQUIRES_ARM_NEON;
2949 for (size_t k = 9; k < 16; k++) {
2950 GemmMicrokernelTester()
2951 .mr(4)
2952 .nr(16)
2953 .kr(2)
2954 .sr(1)
2955 .m(4)
2956 .n(16)
2957 .k(k)
2958 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2959 }
2960 }
2961
2962 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_gt_8_subtile) {
2963 TEST_REQUIRES_ARM_NEON;
2964 for (size_t k = 9; k < 16; k++) {
2965 for (uint32_t n = 1; n <= 16; n++) {
2966 for (uint32_t m = 1; m <= 4; m++) {
2967 GemmMicrokernelTester()
2968 .mr(4)
2969 .nr(16)
2970 .kr(2)
2971 .sr(1)
2972 .m(m)
2973 .n(n)
2974 .k(k)
2975 .iterations(1)
2976 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2977 }
2978 }
2979 }
2980 }
2981
2982 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_div_8) {
2983 TEST_REQUIRES_ARM_NEON;
2984 for (size_t k = 16; k <= 80; k += 8) {
2985 GemmMicrokernelTester()
2986 .mr(4)
2987 .nr(16)
2988 .kr(2)
2989 .sr(1)
2990 .m(4)
2991 .n(16)
2992 .k(k)
2993 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
2994 }
2995 }
2996
2997 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, k_div_8_subtile) {
2998 TEST_REQUIRES_ARM_NEON;
2999 for (size_t k = 16; k <= 80; k += 8) {
3000 for (uint32_t n = 1; n <= 16; n++) {
3001 for (uint32_t m = 1; m <= 4; m++) {
3002 GemmMicrokernelTester()
3003 .mr(4)
3004 .nr(16)
3005 .kr(2)
3006 .sr(1)
3007 .m(m)
3008 .n(n)
3009 .k(k)
3010 .iterations(1)
3011 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3012 }
3013 }
3014 }
3015 }
3016
3017 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, n_gt_16) {
3018 TEST_REQUIRES_ARM_NEON;
3019 for (uint32_t n = 17; n < 32; n++) {
3020 for (size_t k = 1; k <= 40; k += 9) {
3021 GemmMicrokernelTester()
3022 .mr(4)
3023 .nr(16)
3024 .kr(2)
3025 .sr(1)
3026 .m(4)
3027 .n(n)
3028 .k(k)
3029 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3030 }
3031 }
3032 }
3033
3034 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, n_gt_16_strided_cn) {
3035 TEST_REQUIRES_ARM_NEON;
3036 for (uint32_t n = 17; n < 32; n++) {
3037 for (size_t k = 1; k <= 40; k += 9) {
3038 GemmMicrokernelTester()
3039 .mr(4)
3040 .nr(16)
3041 .kr(2)
3042 .sr(1)
3043 .m(4)
3044 .n(n)
3045 .k(k)
3046 .cn_stride(19)
3047 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3048 }
3049 }
3050 }
3051
3052 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, n_gt_16_subtile) {
3053 TEST_REQUIRES_ARM_NEON;
3054 for (uint32_t n = 17; n < 32; n++) {
3055 for (size_t k = 1; k <= 40; k += 9) {
3056 for (uint32_t m = 1; m <= 4; m++) {
3057 GemmMicrokernelTester()
3058 .mr(4)
3059 .nr(16)
3060 .kr(2)
3061 .sr(1)
3062 .m(m)
3063 .n(n)
3064 .k(k)
3065 .iterations(1)
3066 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3067 }
3068 }
3069 }
3070 }
3071
3072 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, n_div_16) {
3073 TEST_REQUIRES_ARM_NEON;
3074 for (uint32_t n = 32; n <= 48; n += 16) {
3075 for (size_t k = 1; k <= 40; k += 9) {
3076 GemmMicrokernelTester()
3077 .mr(4)
3078 .nr(16)
3079 .kr(2)
3080 .sr(1)
3081 .m(4)
3082 .n(n)
3083 .k(k)
3084 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3085 }
3086 }
3087 }
3088
3089 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, n_div_16_strided_cn) {
3090 TEST_REQUIRES_ARM_NEON;
3091 for (uint32_t n = 32; n <= 48; n += 16) {
3092 for (size_t k = 1; k <= 40; k += 9) {
3093 GemmMicrokernelTester()
3094 .mr(4)
3095 .nr(16)
3096 .kr(2)
3097 .sr(1)
3098 .m(4)
3099 .n(n)
3100 .k(k)
3101 .cn_stride(19)
3102 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3103 }
3104 }
3105 }
3106
3107 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, n_div_16_subtile) {
3108 TEST_REQUIRES_ARM_NEON;
3109 for (uint32_t n = 32; n <= 48; n += 16) {
3110 for (size_t k = 1; k <= 40; k += 9) {
3111 for (uint32_t m = 1; m <= 4; m++) {
3112 GemmMicrokernelTester()
3113 .mr(4)
3114 .nr(16)
3115 .kr(2)
3116 .sr(1)
3117 .m(m)
3118 .n(n)
3119 .k(k)
3120 .iterations(1)
3121 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3122 }
3123 }
3124 }
3125 }
3126
3127 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, small_kernel) {
3128 TEST_REQUIRES_ARM_NEON;
3129 for (size_t k = 1; k <= 40; k += 9) {
3130 GemmMicrokernelTester()
3131 .mr(4)
3132 .nr(16)
3133 .kr(2)
3134 .sr(1)
3135 .m(4)
3136 .n(16)
3137 .k(k)
3138 .ks(3)
3139 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3140 }
3141 }
3142
3143 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, small_kernel_subtile) {
3144 TEST_REQUIRES_ARM_NEON;
3145 for (size_t k = 1; k <= 40; k += 9) {
3146 for (uint32_t n = 1; n <= 16; n++) {
3147 for (uint32_t m = 1; m <= 4; m++) {
3148 GemmMicrokernelTester()
3149 .mr(4)
3150 .nr(16)
3151 .kr(2)
3152 .sr(1)
3153 .m(m)
3154 .n(n)
3155 .k(k)
3156 .ks(3)
3157 .iterations(1)
3158 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3159 }
3160 }
3161 }
3162 }
3163
3164 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, n_gt_16_small_kernel) {
3165 TEST_REQUIRES_ARM_NEON;
3166 for (uint32_t n = 17; n < 32; n++) {
3167 for (size_t k = 1; k <= 40; k += 9) {
3168 GemmMicrokernelTester()
3169 .mr(4)
3170 .nr(16)
3171 .kr(2)
3172 .sr(1)
3173 .m(4)
3174 .n(n)
3175 .k(k)
3176 .ks(3)
3177 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3178 }
3179 }
3180 }
3181
3182 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, n_div_16_small_kernel) {
3183 TEST_REQUIRES_ARM_NEON;
3184 for (uint32_t n = 32; n <= 48; n += 16) {
3185 for (size_t k = 1; k <= 40; k += 9) {
3186 GemmMicrokernelTester()
3187 .mr(4)
3188 .nr(16)
3189 .kr(2)
3190 .sr(1)
3191 .m(4)
3192 .n(n)
3193 .k(k)
3194 .ks(3)
3195 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3196 }
3197 }
3198 }
3199
3200 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, strided_cm_subtile) {
3201 TEST_REQUIRES_ARM_NEON;
3202 for (size_t k = 1; k <= 40; k += 9) {
3203 for (uint32_t n = 1; n <= 16; n++) {
3204 for (uint32_t m = 1; m <= 4; m++) {
3205 GemmMicrokernelTester()
3206 .mr(4)
3207 .nr(16)
3208 .kr(2)
3209 .sr(1)
3210 .m(m)
3211 .n(n)
3212 .k(k)
3213 .cm_stride(19)
3214 .iterations(1)
3215 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3216 }
3217 }
3218 }
3219 }
3220
3221 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, a_offset) {
3222 TEST_REQUIRES_ARM_NEON;
3223 for (size_t k = 1; k <= 40; k += 9) {
3224 GemmMicrokernelTester()
3225 .mr(4)
3226 .nr(16)
3227 .kr(2)
3228 .sr(1)
3229 .m(4)
3230 .n(16)
3231 .k(k)
3232 .ks(3)
3233 .a_offset(163)
3234 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3235 }
3236 }
3237
3238 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, zero) {
3239 TEST_REQUIRES_ARM_NEON;
3240 for (size_t k = 1; k <= 40; k += 9) {
3241 for (uint32_t mz = 0; mz < 4; mz++) {
3242 GemmMicrokernelTester()
3243 .mr(4)
3244 .nr(16)
3245 .kr(2)
3246 .sr(1)
3247 .m(4)
3248 .n(16)
3249 .k(k)
3250 .ks(3)
3251 .a_offset(163)
3252 .zero_index(mz)
3253 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3254 }
3255 }
3256 }
3257
3258 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, qmin) {
3259 TEST_REQUIRES_ARM_NEON;
3260 GemmMicrokernelTester()
3261 .mr(4)
3262 .nr(16)
3263 .kr(2)
3264 .sr(1)
3265 .m(4)
3266 .n(16)
3267 .k(8)
3268 .qmin(128)
3269 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3270 }
3271
3272 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, qmax) {
3273 TEST_REQUIRES_ARM_NEON;
3274 GemmMicrokernelTester()
3275 .mr(4)
3276 .nr(16)
3277 .kr(2)
3278 .sr(1)
3279 .m(4)
3280 .n(16)
3281 .k(8)
3282 .qmax(128)
3283 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3284 }
3285
3286 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_LD1R, strided_cm) {
3287 TEST_REQUIRES_ARM_NEON;
3288 GemmMicrokernelTester()
3289 .mr(4)
3290 .nr(16)
3291 .kr(2)
3292 .sr(1)
3293 .m(4)
3294 .n(16)
3295 .k(8)
3296 .cm_stride(19)
3297 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3298 }
3299#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3300
3301
3302#if XNN_ARCH_ARM || XNN_ARCH_ARM64
3303 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_eq_16) {
3304 TEST_REQUIRES_ARM_NEON;
3305 GemmMicrokernelTester()
3306 .mr(1)
3307 .nr(16)
3308 .kr(2)
3309 .sr(1)
3310 .m(1)
3311 .n(16)
3312 .k(16)
3313 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3314 }
3315
3316 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, strided_cn) {
3317 TEST_REQUIRES_ARM_NEON;
3318 GemmMicrokernelTester()
3319 .mr(1)
3320 .nr(16)
3321 .kr(2)
3322 .sr(1)
3323 .m(1)
3324 .n(16)
3325 .k(16)
3326 .cn_stride(19)
3327 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3328 }
3329
3330 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_eq_16_subtile) {
3331 TEST_REQUIRES_ARM_NEON;
3332 for (uint32_t n = 1; n <= 16; n++) {
3333 for (uint32_t m = 1; m <= 1; m++) {
3334 GemmMicrokernelTester()
3335 .mr(1)
3336 .nr(16)
3337 .kr(2)
3338 .sr(1)
3339 .m(m)
3340 .n(n)
3341 .k(16)
3342 .iterations(1)
3343 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3344 }
3345 }
3346 }
3347
3348 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_eq_16_subtile_m) {
3349 TEST_REQUIRES_ARM_NEON;
3350 for (uint32_t m = 1; m <= 1; m++) {
3351 GemmMicrokernelTester()
3352 .mr(1)
3353 .nr(16)
3354 .kr(2)
3355 .sr(1)
3356 .m(m)
3357 .n(16)
3358 .k(16)
3359 .iterations(1)
3360 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3361 }
3362 }
3363
3364 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_eq_16_subtile_n) {
3365 TEST_REQUIRES_ARM_NEON;
3366 for (uint32_t n = 1; n <= 16; n++) {
3367 GemmMicrokernelTester()
3368 .mr(1)
3369 .nr(16)
3370 .kr(2)
3371 .sr(1)
3372 .m(1)
3373 .n(n)
3374 .k(16)
3375 .iterations(1)
3376 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3377 }
3378 }
3379
3380 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_lt_16) {
3381 TEST_REQUIRES_ARM_NEON;
3382 for (size_t k = 1; k < 16; k++) {
3383 GemmMicrokernelTester()
3384 .mr(1)
3385 .nr(16)
3386 .kr(2)
3387 .sr(1)
3388 .m(1)
3389 .n(16)
3390 .k(k)
3391 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3392 }
3393 }
3394
3395 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_lt_16_subtile) {
3396 TEST_REQUIRES_ARM_NEON;
3397 for (size_t k = 1; k < 16; k++) {
3398 for (uint32_t n = 1; n <= 16; n++) {
3399 for (uint32_t m = 1; m <= 1; m++) {
3400 GemmMicrokernelTester()
3401 .mr(1)
3402 .nr(16)
3403 .kr(2)
3404 .sr(1)
3405 .m(m)
3406 .n(n)
3407 .k(k)
3408 .iterations(1)
3409 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3410 }
3411 }
3412 }
3413 }
3414
3415 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_gt_16) {
3416 TEST_REQUIRES_ARM_NEON;
3417 for (size_t k = 17; k < 32; k++) {
3418 GemmMicrokernelTester()
3419 .mr(1)
3420 .nr(16)
3421 .kr(2)
3422 .sr(1)
3423 .m(1)
3424 .n(16)
3425 .k(k)
3426 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3427 }
3428 }
3429
3430 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_gt_16_subtile) {
3431 TEST_REQUIRES_ARM_NEON;
3432 for (size_t k = 17; k < 32; k++) {
3433 for (uint32_t n = 1; n <= 16; n++) {
3434 for (uint32_t m = 1; m <= 1; m++) {
3435 GemmMicrokernelTester()
3436 .mr(1)
3437 .nr(16)
3438 .kr(2)
3439 .sr(1)
3440 .m(m)
3441 .n(n)
3442 .k(k)
3443 .iterations(1)
3444 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3445 }
3446 }
3447 }
3448 }
3449
3450 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_div_16) {
3451 TEST_REQUIRES_ARM_NEON;
3452 for (size_t k = 32; k <= 160; k += 16) {
3453 GemmMicrokernelTester()
3454 .mr(1)
3455 .nr(16)
3456 .kr(2)
3457 .sr(1)
3458 .m(1)
3459 .n(16)
3460 .k(k)
3461 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3462 }
3463 }
3464
3465 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, k_div_16_subtile) {
3466 TEST_REQUIRES_ARM_NEON;
3467 for (size_t k = 32; k <= 160; k += 16) {
3468 for (uint32_t n = 1; n <= 16; n++) {
3469 for (uint32_t m = 1; m <= 1; m++) {
3470 GemmMicrokernelTester()
3471 .mr(1)
3472 .nr(16)
3473 .kr(2)
3474 .sr(1)
3475 .m(m)
3476 .n(n)
3477 .k(k)
3478 .iterations(1)
3479 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3480 }
3481 }
3482 }
3483 }
3484
3485 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, n_gt_16) {
3486 TEST_REQUIRES_ARM_NEON;
3487 for (uint32_t n = 17; n < 32; n++) {
3488 for (size_t k = 1; k <= 80; k += 17) {
3489 GemmMicrokernelTester()
3490 .mr(1)
3491 .nr(16)
3492 .kr(2)
3493 .sr(1)
3494 .m(1)
3495 .n(n)
3496 .k(k)
3497 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3498 }
3499 }
3500 }
3501
3502 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, n_gt_16_strided_cn) {
3503 TEST_REQUIRES_ARM_NEON;
3504 for (uint32_t n = 17; n < 32; n++) {
3505 for (size_t k = 1; k <= 80; k += 17) {
3506 GemmMicrokernelTester()
3507 .mr(1)
3508 .nr(16)
3509 .kr(2)
3510 .sr(1)
3511 .m(1)
3512 .n(n)
3513 .k(k)
3514 .cn_stride(19)
3515 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3516 }
3517 }
3518 }
3519
3520 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, n_gt_16_subtile) {
3521 TEST_REQUIRES_ARM_NEON;
3522 for (uint32_t n = 17; n < 32; n++) {
3523 for (size_t k = 1; k <= 80; k += 17) {
3524 for (uint32_t m = 1; m <= 1; m++) {
3525 GemmMicrokernelTester()
3526 .mr(1)
3527 .nr(16)
3528 .kr(2)
3529 .sr(1)
3530 .m(m)
3531 .n(n)
3532 .k(k)
3533 .iterations(1)
3534 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3535 }
3536 }
3537 }
3538 }
3539
3540 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, n_div_16) {
3541 TEST_REQUIRES_ARM_NEON;
3542 for (uint32_t n = 32; n <= 48; n += 16) {
3543 for (size_t k = 1; k <= 80; k += 17) {
3544 GemmMicrokernelTester()
3545 .mr(1)
3546 .nr(16)
3547 .kr(2)
3548 .sr(1)
3549 .m(1)
3550 .n(n)
3551 .k(k)
3552 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3553 }
3554 }
3555 }
3556
3557 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, n_div_16_strided_cn) {
3558 TEST_REQUIRES_ARM_NEON;
3559 for (uint32_t n = 32; n <= 48; n += 16) {
3560 for (size_t k = 1; k <= 80; k += 17) {
3561 GemmMicrokernelTester()
3562 .mr(1)
3563 .nr(16)
3564 .kr(2)
3565 .sr(1)
3566 .m(1)
3567 .n(n)
3568 .k(k)
3569 .cn_stride(19)
3570 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3571 }
3572 }
3573 }
3574
3575 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, n_div_16_subtile) {
3576 TEST_REQUIRES_ARM_NEON;
3577 for (uint32_t n = 32; n <= 48; n += 16) {
3578 for (size_t k = 1; k <= 80; k += 17) {
3579 for (uint32_t m = 1; m <= 1; m++) {
3580 GemmMicrokernelTester()
3581 .mr(1)
3582 .nr(16)
3583 .kr(2)
3584 .sr(1)
3585 .m(m)
3586 .n(n)
3587 .k(k)
3588 .iterations(1)
3589 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3590 }
3591 }
3592 }
3593 }
3594
3595 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, small_kernel) {
3596 TEST_REQUIRES_ARM_NEON;
3597 for (size_t k = 1; k <= 80; k += 17) {
3598 GemmMicrokernelTester()
3599 .mr(1)
3600 .nr(16)
3601 .kr(2)
3602 .sr(1)
3603 .m(1)
3604 .n(16)
3605 .k(k)
3606 .ks(3)
3607 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3608 }
3609 }
3610
3611 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, small_kernel_subtile) {
3612 TEST_REQUIRES_ARM_NEON;
3613 for (size_t k = 1; k <= 80; k += 17) {
3614 for (uint32_t n = 1; n <= 16; n++) {
3615 for (uint32_t m = 1; m <= 1; m++) {
3616 GemmMicrokernelTester()
3617 .mr(1)
3618 .nr(16)
3619 .kr(2)
3620 .sr(1)
3621 .m(m)
3622 .n(n)
3623 .k(k)
3624 .ks(3)
3625 .iterations(1)
3626 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3627 }
3628 }
3629 }
3630 }
3631
3632 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, n_gt_16_small_kernel) {
3633 TEST_REQUIRES_ARM_NEON;
3634 for (uint32_t n = 17; n < 32; n++) {
3635 for (size_t k = 1; k <= 80; k += 17) {
3636 GemmMicrokernelTester()
3637 .mr(1)
3638 .nr(16)
3639 .kr(2)
3640 .sr(1)
3641 .m(1)
3642 .n(n)
3643 .k(k)
3644 .ks(3)
3645 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3646 }
3647 }
3648 }
3649
3650 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, n_div_16_small_kernel) {
3651 TEST_REQUIRES_ARM_NEON;
3652 for (uint32_t n = 32; n <= 48; n += 16) {
3653 for (size_t k = 1; k <= 80; k += 17) {
3654 GemmMicrokernelTester()
3655 .mr(1)
3656 .nr(16)
3657 .kr(2)
3658 .sr(1)
3659 .m(1)
3660 .n(n)
3661 .k(k)
3662 .ks(3)
3663 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3664 }
3665 }
3666 }
3667
3668 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, strided_cm_subtile) {
3669 TEST_REQUIRES_ARM_NEON;
3670 for (size_t k = 1; k <= 80; k += 17) {
3671 for (uint32_t n = 1; n <= 16; n++) {
3672 for (uint32_t m = 1; m <= 1; m++) {
3673 GemmMicrokernelTester()
3674 .mr(1)
3675 .nr(16)
3676 .kr(2)
3677 .sr(1)
3678 .m(m)
3679 .n(n)
3680 .k(k)
3681 .cm_stride(19)
3682 .iterations(1)
3683 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3684 }
3685 }
3686 }
3687 }
3688
3689 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, a_offset) {
3690 TEST_REQUIRES_ARM_NEON;
3691 for (size_t k = 1; k <= 80; k += 17) {
3692 GemmMicrokernelTester()
3693 .mr(1)
3694 .nr(16)
3695 .kr(2)
3696 .sr(1)
3697 .m(1)
3698 .n(16)
3699 .k(k)
3700 .ks(3)
3701 .a_offset(83)
3702 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3703 }
3704 }
3705
3706 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, zero) {
3707 TEST_REQUIRES_ARM_NEON;
3708 for (size_t k = 1; k <= 80; k += 17) {
3709 for (uint32_t mz = 0; mz < 1; mz++) {
3710 GemmMicrokernelTester()
3711 .mr(1)
3712 .nr(16)
3713 .kr(2)
3714 .sr(1)
3715 .m(1)
3716 .n(16)
3717 .k(k)
3718 .ks(3)
3719 .a_offset(83)
3720 .zero_index(mz)
3721 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3722 }
3723 }
3724 }
3725
3726 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, qmin) {
3727 TEST_REQUIRES_ARM_NEON;
3728 GemmMicrokernelTester()
3729 .mr(1)
3730 .nr(16)
3731 .kr(2)
3732 .sr(1)
3733 .m(1)
3734 .n(16)
3735 .k(16)
3736 .qmin(128)
3737 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3738 }
3739
3740 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, qmax) {
3741 TEST_REQUIRES_ARM_NEON;
3742 GemmMicrokernelTester()
3743 .mr(1)
3744 .nr(16)
3745 .kr(2)
3746 .sr(1)
3747 .m(1)
3748 .n(16)
3749 .k(16)
3750 .qmax(128)
3751 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3752 }
3753
3754 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2__NEON_MLAL_LD1R, strided_cm) {
3755 TEST_REQUIRES_ARM_NEON;
3756 GemmMicrokernelTester()
3757 .mr(1)
3758 .nr(16)
3759 .kr(2)
3760 .sr(1)
3761 .m(1)
3762 .n(16)
3763 .k(16)
3764 .cm_stride(19)
3765 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
3766 }
3767#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
3768
3769
3770#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003771 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_eq_16) {
3772 TEST_REQUIRES_ARM_NEON;
3773 GemmMicrokernelTester()
3774 .mr(2)
3775 .nr(16)
3776 .kr(2)
3777 .sr(1)
3778 .m(2)
3779 .n(16)
3780 .k(16)
Marat Dukhan50323b82022-01-11 00:12:01 -08003781 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003782 }
3783
3784 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, strided_cn) {
3785 TEST_REQUIRES_ARM_NEON;
3786 GemmMicrokernelTester()
3787 .mr(2)
3788 .nr(16)
3789 .kr(2)
3790 .sr(1)
3791 .m(2)
3792 .n(16)
3793 .k(16)
3794 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -08003795 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003796 }
3797
3798 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_eq_16_subtile) {
3799 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08003800 for (uint32_t n = 1; n <= 16; n++) {
3801 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003802 GemmMicrokernelTester()
3803 .mr(2)
3804 .nr(16)
3805 .kr(2)
3806 .sr(1)
3807 .m(m)
3808 .n(n)
3809 .k(16)
3810 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08003811 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003812 }
3813 }
3814 }
3815
3816 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_eq_16_subtile_m) {
3817 TEST_REQUIRES_ARM_NEON;
3818 for (uint32_t m = 1; m <= 2; m++) {
3819 GemmMicrokernelTester()
3820 .mr(2)
3821 .nr(16)
3822 .kr(2)
3823 .sr(1)
3824 .m(m)
3825 .n(16)
3826 .k(16)
3827 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08003828 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003829 }
3830 }
3831
3832 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_eq_16_subtile_n) {
3833 TEST_REQUIRES_ARM_NEON;
3834 for (uint32_t n = 1; n <= 16; n++) {
3835 GemmMicrokernelTester()
3836 .mr(2)
3837 .nr(16)
3838 .kr(2)
3839 .sr(1)
3840 .m(2)
3841 .n(n)
3842 .k(16)
3843 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08003844 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003845 }
3846 }
3847
3848 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_lt_16) {
3849 TEST_REQUIRES_ARM_NEON;
3850 for (size_t k = 1; k < 16; k++) {
3851 GemmMicrokernelTester()
3852 .mr(2)
3853 .nr(16)
3854 .kr(2)
3855 .sr(1)
3856 .m(2)
3857 .n(16)
3858 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08003859 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003860 }
3861 }
3862
3863 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_lt_16_subtile) {
3864 TEST_REQUIRES_ARM_NEON;
3865 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08003866 for (uint32_t n = 1; n <= 16; n++) {
3867 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003868 GemmMicrokernelTester()
3869 .mr(2)
3870 .nr(16)
3871 .kr(2)
3872 .sr(1)
3873 .m(m)
3874 .n(n)
3875 .k(k)
3876 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08003877 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003878 }
3879 }
3880 }
3881 }
3882
3883 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_gt_16) {
3884 TEST_REQUIRES_ARM_NEON;
3885 for (size_t k = 17; k < 32; k++) {
3886 GemmMicrokernelTester()
3887 .mr(2)
3888 .nr(16)
3889 .kr(2)
3890 .sr(1)
3891 .m(2)
3892 .n(16)
3893 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08003894 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003895 }
3896 }
3897
3898 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_gt_16_subtile) {
3899 TEST_REQUIRES_ARM_NEON;
3900 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08003901 for (uint32_t n = 1; n <= 16; n++) {
3902 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003903 GemmMicrokernelTester()
3904 .mr(2)
3905 .nr(16)
3906 .kr(2)
3907 .sr(1)
3908 .m(m)
3909 .n(n)
3910 .k(k)
3911 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08003912 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003913 }
3914 }
3915 }
3916 }
3917
3918 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_div_16) {
3919 TEST_REQUIRES_ARM_NEON;
3920 for (size_t k = 32; k <= 160; k += 16) {
3921 GemmMicrokernelTester()
3922 .mr(2)
3923 .nr(16)
3924 .kr(2)
3925 .sr(1)
3926 .m(2)
3927 .n(16)
3928 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08003929 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003930 }
3931 }
3932
3933 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, k_div_16_subtile) {
3934 TEST_REQUIRES_ARM_NEON;
3935 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08003936 for (uint32_t n = 1; n <= 16; n++) {
3937 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003938 GemmMicrokernelTester()
3939 .mr(2)
3940 .nr(16)
3941 .kr(2)
3942 .sr(1)
3943 .m(m)
3944 .n(n)
3945 .k(k)
3946 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08003947 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003948 }
3949 }
3950 }
3951 }
3952
3953 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, n_gt_16) {
3954 TEST_REQUIRES_ARM_NEON;
3955 for (uint32_t n = 17; n < 32; n++) {
3956 for (size_t k = 1; k <= 80; k += 17) {
3957 GemmMicrokernelTester()
3958 .mr(2)
3959 .nr(16)
3960 .kr(2)
3961 .sr(1)
3962 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08003963 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003964 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08003965 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003966 }
3967 }
3968 }
3969
3970 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, n_gt_16_strided_cn) {
3971 TEST_REQUIRES_ARM_NEON;
3972 for (uint32_t n = 17; n < 32; n++) {
3973 for (size_t k = 1; k <= 80; k += 17) {
3974 GemmMicrokernelTester()
3975 .mr(2)
3976 .nr(16)
3977 .kr(2)
3978 .sr(1)
3979 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08003980 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003981 .k(k)
3982 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -08003983 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08003984 }
3985 }
3986 }
3987
3988 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, n_gt_16_subtile) {
3989 TEST_REQUIRES_ARM_NEON;
3990 for (uint32_t n = 17; n < 32; n++) {
3991 for (size_t k = 1; k <= 80; k += 17) {
3992 for (uint32_t m = 1; m <= 2; m++) {
3993 GemmMicrokernelTester()
3994 .mr(2)
3995 .nr(16)
3996 .kr(2)
3997 .sr(1)
3998 .m(m)
3999 .n(n)
4000 .k(k)
4001 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08004002 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004003 }
4004 }
4005 }
4006 }
4007
4008 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, n_div_16) {
4009 TEST_REQUIRES_ARM_NEON;
4010 for (uint32_t n = 32; n <= 48; n += 16) {
4011 for (size_t k = 1; k <= 80; k += 17) {
4012 GemmMicrokernelTester()
4013 .mr(2)
4014 .nr(16)
4015 .kr(2)
4016 .sr(1)
4017 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08004018 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004019 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08004020 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004021 }
4022 }
4023 }
4024
4025 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, n_div_16_strided_cn) {
4026 TEST_REQUIRES_ARM_NEON;
4027 for (uint32_t n = 32; n <= 48; n += 16) {
4028 for (size_t k = 1; k <= 80; k += 17) {
4029 GemmMicrokernelTester()
4030 .mr(2)
4031 .nr(16)
4032 .kr(2)
4033 .sr(1)
4034 .m(2)
4035 .n(n)
4036 .k(k)
4037 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -08004038 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004039 }
4040 }
4041 }
4042
4043 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, n_div_16_subtile) {
4044 TEST_REQUIRES_ARM_NEON;
4045 for (uint32_t n = 32; n <= 48; n += 16) {
4046 for (size_t k = 1; k <= 80; k += 17) {
4047 for (uint32_t m = 1; m <= 2; m++) {
4048 GemmMicrokernelTester()
4049 .mr(2)
4050 .nr(16)
4051 .kr(2)
4052 .sr(1)
4053 .m(m)
4054 .n(n)
4055 .k(k)
4056 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08004057 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004058 }
4059 }
4060 }
4061 }
4062
4063 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, small_kernel) {
4064 TEST_REQUIRES_ARM_NEON;
4065 for (size_t k = 1; k <= 80; k += 17) {
4066 GemmMicrokernelTester()
4067 .mr(2)
4068 .nr(16)
4069 .kr(2)
4070 .sr(1)
4071 .m(2)
4072 .n(16)
4073 .k(k)
4074 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08004075 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004076 }
4077 }
4078
4079 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, small_kernel_subtile) {
4080 TEST_REQUIRES_ARM_NEON;
4081 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08004082 for (uint32_t n = 1; n <= 16; n++) {
4083 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004084 GemmMicrokernelTester()
4085 .mr(2)
4086 .nr(16)
4087 .kr(2)
4088 .sr(1)
4089 .m(m)
4090 .n(n)
4091 .k(k)
4092 .ks(3)
4093 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08004094 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004095 }
4096 }
4097 }
4098 }
4099
4100 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, n_gt_16_small_kernel) {
4101 TEST_REQUIRES_ARM_NEON;
4102 for (uint32_t n = 17; n < 32; n++) {
4103 for (size_t k = 1; k <= 80; k += 17) {
4104 GemmMicrokernelTester()
4105 .mr(2)
4106 .nr(16)
4107 .kr(2)
4108 .sr(1)
4109 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08004110 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004111 .k(k)
4112 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08004113 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004114 }
4115 }
4116 }
4117
4118 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, n_div_16_small_kernel) {
4119 TEST_REQUIRES_ARM_NEON;
4120 for (uint32_t n = 32; n <= 48; n += 16) {
4121 for (size_t k = 1; k <= 80; k += 17) {
4122 GemmMicrokernelTester()
4123 .mr(2)
4124 .nr(16)
4125 .kr(2)
4126 .sr(1)
4127 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08004128 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004129 .k(k)
4130 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08004131 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004132 }
4133 }
4134 }
4135
4136 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, strided_cm_subtile) {
4137 TEST_REQUIRES_ARM_NEON;
4138 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08004139 for (uint32_t n = 1; n <= 16; n++) {
4140 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004141 GemmMicrokernelTester()
4142 .mr(2)
4143 .nr(16)
4144 .kr(2)
4145 .sr(1)
4146 .m(m)
4147 .n(n)
4148 .k(k)
4149 .cm_stride(19)
4150 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08004151 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004152 }
4153 }
4154 }
4155 }
4156
4157 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, a_offset) {
4158 TEST_REQUIRES_ARM_NEON;
4159 for (size_t k = 1; k <= 80; k += 17) {
4160 GemmMicrokernelTester()
4161 .mr(2)
4162 .nr(16)
4163 .kr(2)
4164 .sr(1)
4165 .m(2)
4166 .n(16)
4167 .k(k)
4168 .ks(3)
4169 .a_offset(163)
Marat Dukhan50323b82022-01-11 00:12:01 -08004170 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004171 }
4172 }
4173
4174 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, zero) {
4175 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08004176 for (size_t k = 1; k <= 80; k += 17) {
4177 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004178 GemmMicrokernelTester()
4179 .mr(2)
4180 .nr(16)
4181 .kr(2)
4182 .sr(1)
4183 .m(2)
4184 .n(16)
4185 .k(k)
4186 .ks(3)
4187 .a_offset(163)
4188 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -08004189 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004190 }
4191 }
4192 }
4193
4194 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, qmin) {
4195 TEST_REQUIRES_ARM_NEON;
4196 GemmMicrokernelTester()
4197 .mr(2)
4198 .nr(16)
4199 .kr(2)
4200 .sr(1)
4201 .m(2)
4202 .n(16)
4203 .k(16)
4204 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08004205 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004206 }
4207
4208 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, qmax) {
4209 TEST_REQUIRES_ARM_NEON;
4210 GemmMicrokernelTester()
4211 .mr(2)
4212 .nr(16)
4213 .kr(2)
4214 .sr(1)
4215 .m(2)
4216 .n(16)
4217 .k(16)
4218 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08004219 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004220 }
4221
4222 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C2__NEON_MLAL_LD1R, strided_cm) {
4223 TEST_REQUIRES_ARM_NEON;
4224 GemmMicrokernelTester()
4225 .mr(2)
4226 .nr(16)
4227 .kr(2)
4228 .sr(1)
4229 .m(2)
4230 .n(16)
4231 .k(16)
4232 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -08004233 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004234 }
4235#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4236
4237
4238#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -08004239 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004240 TEST_REQUIRES_ARM_NEON;
4241 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08004242 .mr(3)
4243 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004244 .kr(2)
4245 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08004246 .m(3)
4247 .n(16)
4248 .k(16)
4249 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004250 }
4251
Zhi An Nge96b6bc2022-02-03 10:49:46 -08004252 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08004253 TEST_REQUIRES_ARM_NEON;
4254 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08004255 .mr(3)
4256 .nr(16)
4257 .kr(2)
4258 .sr(1)
4259 .m(3)
4260 .n(16)
4261 .k(16)
4262 .cn_stride(19)
4263 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4264 }
4265
4266 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_eq_16_subtile) {
4267 TEST_REQUIRES_ARM_NEON;
4268 for (uint32_t n = 1; n <= 16; n++) {
4269 for (uint32_t m = 1; m <= 3; m++) {
4270 GemmMicrokernelTester()
4271 .mr(3)
4272 .nr(16)
4273 .kr(2)
4274 .sr(1)
4275 .m(m)
4276 .n(n)
4277 .k(16)
4278 .iterations(1)
4279 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4280 }
4281 }
4282 }
4283
4284 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_eq_16_subtile_m) {
4285 TEST_REQUIRES_ARM_NEON;
4286 for (uint32_t m = 1; m <= 3; m++) {
4287 GemmMicrokernelTester()
4288 .mr(3)
4289 .nr(16)
4290 .kr(2)
4291 .sr(1)
4292 .m(m)
4293 .n(16)
4294 .k(16)
4295 .iterations(1)
4296 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4297 }
4298 }
4299
4300 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_eq_16_subtile_n) {
4301 TEST_REQUIRES_ARM_NEON;
4302 for (uint32_t n = 1; n <= 16; n++) {
4303 GemmMicrokernelTester()
4304 .mr(3)
4305 .nr(16)
4306 .kr(2)
4307 .sr(1)
4308 .m(3)
4309 .n(n)
4310 .k(16)
4311 .iterations(1)
4312 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4313 }
4314 }
4315
4316 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_lt_16) {
4317 TEST_REQUIRES_ARM_NEON;
4318 for (size_t k = 1; k < 16; k++) {
4319 GemmMicrokernelTester()
4320 .mr(3)
4321 .nr(16)
4322 .kr(2)
4323 .sr(1)
4324 .m(3)
4325 .n(16)
4326 .k(k)
4327 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4328 }
4329 }
4330
4331 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_lt_16_subtile) {
4332 TEST_REQUIRES_ARM_NEON;
4333 for (size_t k = 1; k < 16; k++) {
4334 for (uint32_t n = 1; n <= 16; n++) {
4335 for (uint32_t m = 1; m <= 3; m++) {
4336 GemmMicrokernelTester()
4337 .mr(3)
4338 .nr(16)
4339 .kr(2)
4340 .sr(1)
4341 .m(m)
4342 .n(n)
4343 .k(k)
4344 .iterations(1)
4345 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4346 }
4347 }
4348 }
4349 }
4350
4351 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_gt_16) {
4352 TEST_REQUIRES_ARM_NEON;
4353 for (size_t k = 17; k < 32; k++) {
4354 GemmMicrokernelTester()
4355 .mr(3)
4356 .nr(16)
4357 .kr(2)
4358 .sr(1)
4359 .m(3)
4360 .n(16)
4361 .k(k)
4362 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4363 }
4364 }
4365
4366 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_gt_16_subtile) {
4367 TEST_REQUIRES_ARM_NEON;
4368 for (size_t k = 17; k < 32; k++) {
4369 for (uint32_t n = 1; n <= 16; n++) {
4370 for (uint32_t m = 1; m <= 3; m++) {
4371 GemmMicrokernelTester()
4372 .mr(3)
4373 .nr(16)
4374 .kr(2)
4375 .sr(1)
4376 .m(m)
4377 .n(n)
4378 .k(k)
4379 .iterations(1)
4380 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4381 }
4382 }
4383 }
4384 }
4385
4386 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_div_16) {
4387 TEST_REQUIRES_ARM_NEON;
4388 for (size_t k = 32; k <= 160; k += 16) {
4389 GemmMicrokernelTester()
4390 .mr(3)
4391 .nr(16)
4392 .kr(2)
4393 .sr(1)
4394 .m(3)
4395 .n(16)
4396 .k(k)
4397 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4398 }
4399 }
4400
4401 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, k_div_16_subtile) {
4402 TEST_REQUIRES_ARM_NEON;
4403 for (size_t k = 32; k <= 160; k += 16) {
4404 for (uint32_t n = 1; n <= 16; n++) {
4405 for (uint32_t m = 1; m <= 3; m++) {
4406 GemmMicrokernelTester()
4407 .mr(3)
4408 .nr(16)
4409 .kr(2)
4410 .sr(1)
4411 .m(m)
4412 .n(n)
4413 .k(k)
4414 .iterations(1)
4415 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4416 }
4417 }
4418 }
4419 }
4420
4421 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, n_gt_16) {
4422 TEST_REQUIRES_ARM_NEON;
4423 for (uint32_t n = 17; n < 32; n++) {
4424 for (size_t k = 1; k <= 80; k += 17) {
4425 GemmMicrokernelTester()
4426 .mr(3)
4427 .nr(16)
4428 .kr(2)
4429 .sr(1)
4430 .m(3)
4431 .n(n)
4432 .k(k)
4433 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4434 }
4435 }
4436 }
4437
4438 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, n_gt_16_strided_cn) {
4439 TEST_REQUIRES_ARM_NEON;
4440 for (uint32_t n = 17; n < 32; n++) {
4441 for (size_t k = 1; k <= 80; k += 17) {
4442 GemmMicrokernelTester()
4443 .mr(3)
4444 .nr(16)
4445 .kr(2)
4446 .sr(1)
4447 .m(3)
4448 .n(n)
4449 .k(k)
4450 .cn_stride(19)
4451 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4452 }
4453 }
4454 }
4455
4456 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, n_gt_16_subtile) {
4457 TEST_REQUIRES_ARM_NEON;
4458 for (uint32_t n = 17; n < 32; n++) {
4459 for (size_t k = 1; k <= 80; k += 17) {
4460 for (uint32_t m = 1; m <= 3; m++) {
4461 GemmMicrokernelTester()
4462 .mr(3)
4463 .nr(16)
4464 .kr(2)
4465 .sr(1)
4466 .m(m)
4467 .n(n)
4468 .k(k)
4469 .iterations(1)
4470 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4471 }
4472 }
4473 }
4474 }
4475
4476 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, n_div_16) {
4477 TEST_REQUIRES_ARM_NEON;
4478 for (uint32_t n = 32; n <= 48; n += 16) {
4479 for (size_t k = 1; k <= 80; k += 17) {
4480 GemmMicrokernelTester()
4481 .mr(3)
4482 .nr(16)
4483 .kr(2)
4484 .sr(1)
4485 .m(3)
4486 .n(n)
4487 .k(k)
4488 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4489 }
4490 }
4491 }
4492
4493 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, n_div_16_strided_cn) {
4494 TEST_REQUIRES_ARM_NEON;
4495 for (uint32_t n = 32; n <= 48; n += 16) {
4496 for (size_t k = 1; k <= 80; k += 17) {
4497 GemmMicrokernelTester()
4498 .mr(3)
4499 .nr(16)
4500 .kr(2)
4501 .sr(1)
4502 .m(3)
4503 .n(n)
4504 .k(k)
4505 .cn_stride(19)
4506 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4507 }
4508 }
4509 }
4510
4511 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, n_div_16_subtile) {
4512 TEST_REQUIRES_ARM_NEON;
4513 for (uint32_t n = 32; n <= 48; n += 16) {
4514 for (size_t k = 1; k <= 80; k += 17) {
4515 for (uint32_t m = 1; m <= 3; m++) {
4516 GemmMicrokernelTester()
4517 .mr(3)
4518 .nr(16)
4519 .kr(2)
4520 .sr(1)
4521 .m(m)
4522 .n(n)
4523 .k(k)
4524 .iterations(1)
4525 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4526 }
4527 }
4528 }
4529 }
4530
4531 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, small_kernel) {
4532 TEST_REQUIRES_ARM_NEON;
4533 for (size_t k = 1; k <= 80; k += 17) {
4534 GemmMicrokernelTester()
4535 .mr(3)
4536 .nr(16)
4537 .kr(2)
4538 .sr(1)
4539 .m(3)
4540 .n(16)
4541 .k(k)
4542 .ks(3)
4543 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4544 }
4545 }
4546
4547 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, small_kernel_subtile) {
4548 TEST_REQUIRES_ARM_NEON;
4549 for (size_t k = 1; k <= 80; k += 17) {
4550 for (uint32_t n = 1; n <= 16; n++) {
4551 for (uint32_t m = 1; m <= 3; m++) {
4552 GemmMicrokernelTester()
4553 .mr(3)
4554 .nr(16)
4555 .kr(2)
4556 .sr(1)
4557 .m(m)
4558 .n(n)
4559 .k(k)
4560 .ks(3)
4561 .iterations(1)
4562 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4563 }
4564 }
4565 }
4566 }
4567
4568 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, n_gt_16_small_kernel) {
4569 TEST_REQUIRES_ARM_NEON;
4570 for (uint32_t n = 17; n < 32; n++) {
4571 for (size_t k = 1; k <= 80; k += 17) {
4572 GemmMicrokernelTester()
4573 .mr(3)
4574 .nr(16)
4575 .kr(2)
4576 .sr(1)
4577 .m(3)
4578 .n(n)
4579 .k(k)
4580 .ks(3)
4581 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4582 }
4583 }
4584 }
4585
4586 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, n_div_16_small_kernel) {
4587 TEST_REQUIRES_ARM_NEON;
4588 for (uint32_t n = 32; n <= 48; n += 16) {
4589 for (size_t k = 1; k <= 80; k += 17) {
4590 GemmMicrokernelTester()
4591 .mr(3)
4592 .nr(16)
4593 .kr(2)
4594 .sr(1)
4595 .m(3)
4596 .n(n)
4597 .k(k)
4598 .ks(3)
4599 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4600 }
4601 }
4602 }
4603
4604 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, strided_cm_subtile) {
4605 TEST_REQUIRES_ARM_NEON;
4606 for (size_t k = 1; k <= 80; k += 17) {
4607 for (uint32_t n = 1; n <= 16; n++) {
4608 for (uint32_t m = 1; m <= 3; m++) {
4609 GemmMicrokernelTester()
4610 .mr(3)
4611 .nr(16)
4612 .kr(2)
4613 .sr(1)
4614 .m(m)
4615 .n(n)
4616 .k(k)
4617 .cm_stride(19)
4618 .iterations(1)
4619 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4620 }
4621 }
4622 }
4623 }
4624
4625 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, a_offset) {
4626 TEST_REQUIRES_ARM_NEON;
4627 for (size_t k = 1; k <= 80; k += 17) {
4628 GemmMicrokernelTester()
4629 .mr(3)
4630 .nr(16)
4631 .kr(2)
4632 .sr(1)
4633 .m(3)
4634 .n(16)
4635 .k(k)
4636 .ks(3)
4637 .a_offset(251)
4638 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4639 }
4640 }
4641
4642 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, zero) {
4643 TEST_REQUIRES_ARM_NEON;
4644 for (size_t k = 1; k <= 80; k += 17) {
4645 for (uint32_t mz = 0; mz < 3; mz++) {
4646 GemmMicrokernelTester()
4647 .mr(3)
4648 .nr(16)
4649 .kr(2)
4650 .sr(1)
4651 .m(3)
4652 .n(16)
4653 .k(k)
4654 .ks(3)
4655 .a_offset(251)
4656 .zero_index(mz)
4657 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4658 }
4659 }
4660 }
4661
4662 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, qmin) {
4663 TEST_REQUIRES_ARM_NEON;
4664 GemmMicrokernelTester()
4665 .mr(3)
4666 .nr(16)
4667 .kr(2)
4668 .sr(1)
4669 .m(3)
4670 .n(16)
4671 .k(16)
4672 .qmin(128)
4673 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4674 }
4675
4676 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, qmax) {
4677 TEST_REQUIRES_ARM_NEON;
4678 GemmMicrokernelTester()
4679 .mr(3)
4680 .nr(16)
4681 .kr(2)
4682 .sr(1)
4683 .m(3)
4684 .n(16)
4685 .k(16)
4686 .qmax(128)
4687 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4688 }
4689
4690 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MLAL_LD1R, strided_cm) {
4691 TEST_REQUIRES_ARM_NEON;
4692 GemmMicrokernelTester()
4693 .mr(3)
4694 .nr(16)
4695 .kr(2)
4696 .sr(1)
4697 .m(3)
4698 .n(16)
4699 .k(16)
4700 .cm_stride(19)
4701 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4702 }
4703#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
4704
4705
4706#if XNN_ARCH_ARM || XNN_ARCH_ARM64
4707 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_eq_16) {
4708 TEST_REQUIRES_ARM_NEON;
4709 GemmMicrokernelTester()
4710 .mr(4)
4711 .nr(16)
4712 .kr(2)
4713 .sr(1)
4714 .m(4)
4715 .n(16)
4716 .k(16)
4717 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4718 }
4719
4720 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, strided_cn) {
4721 TEST_REQUIRES_ARM_NEON;
4722 GemmMicrokernelTester()
4723 .mr(4)
4724 .nr(16)
4725 .kr(2)
4726 .sr(1)
4727 .m(4)
4728 .n(16)
4729 .k(16)
4730 .cn_stride(19)
4731 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4732 }
4733
4734 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_eq_16_subtile) {
4735 TEST_REQUIRES_ARM_NEON;
4736 for (uint32_t n = 1; n <= 16; n++) {
4737 for (uint32_t m = 1; m <= 4; m++) {
4738 GemmMicrokernelTester()
4739 .mr(4)
4740 .nr(16)
4741 .kr(2)
4742 .sr(1)
4743 .m(m)
4744 .n(n)
4745 .k(16)
4746 .iterations(1)
4747 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4748 }
4749 }
4750 }
4751
4752 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_eq_16_subtile_m) {
4753 TEST_REQUIRES_ARM_NEON;
4754 for (uint32_t m = 1; m <= 4; m++) {
4755 GemmMicrokernelTester()
4756 .mr(4)
4757 .nr(16)
4758 .kr(2)
4759 .sr(1)
4760 .m(m)
4761 .n(16)
4762 .k(16)
4763 .iterations(1)
4764 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4765 }
4766 }
4767
4768 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_eq_16_subtile_n) {
4769 TEST_REQUIRES_ARM_NEON;
4770 for (uint32_t n = 1; n <= 16; n++) {
4771 GemmMicrokernelTester()
4772 .mr(4)
4773 .nr(16)
4774 .kr(2)
4775 .sr(1)
4776 .m(4)
4777 .n(n)
4778 .k(16)
4779 .iterations(1)
4780 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4781 }
4782 }
4783
4784 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_lt_16) {
4785 TEST_REQUIRES_ARM_NEON;
4786 for (size_t k = 1; k < 16; k++) {
4787 GemmMicrokernelTester()
4788 .mr(4)
4789 .nr(16)
4790 .kr(2)
4791 .sr(1)
4792 .m(4)
4793 .n(16)
4794 .k(k)
4795 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4796 }
4797 }
4798
4799 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_lt_16_subtile) {
4800 TEST_REQUIRES_ARM_NEON;
4801 for (size_t k = 1; k < 16; k++) {
4802 for (uint32_t n = 1; n <= 16; n++) {
4803 for (uint32_t m = 1; m <= 4; m++) {
4804 GemmMicrokernelTester()
4805 .mr(4)
4806 .nr(16)
4807 .kr(2)
4808 .sr(1)
4809 .m(m)
4810 .n(n)
4811 .k(k)
4812 .iterations(1)
4813 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4814 }
4815 }
4816 }
4817 }
4818
4819 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_gt_16) {
4820 TEST_REQUIRES_ARM_NEON;
4821 for (size_t k = 17; k < 32; k++) {
4822 GemmMicrokernelTester()
4823 .mr(4)
4824 .nr(16)
4825 .kr(2)
4826 .sr(1)
4827 .m(4)
4828 .n(16)
4829 .k(k)
4830 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4831 }
4832 }
4833
4834 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_gt_16_subtile) {
4835 TEST_REQUIRES_ARM_NEON;
4836 for (size_t k = 17; k < 32; k++) {
4837 for (uint32_t n = 1; n <= 16; n++) {
4838 for (uint32_t m = 1; m <= 4; m++) {
4839 GemmMicrokernelTester()
4840 .mr(4)
4841 .nr(16)
4842 .kr(2)
4843 .sr(1)
4844 .m(m)
4845 .n(n)
4846 .k(k)
4847 .iterations(1)
4848 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4849 }
4850 }
4851 }
4852 }
4853
4854 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_div_16) {
4855 TEST_REQUIRES_ARM_NEON;
4856 for (size_t k = 32; k <= 160; k += 16) {
4857 GemmMicrokernelTester()
4858 .mr(4)
4859 .nr(16)
4860 .kr(2)
4861 .sr(1)
4862 .m(4)
4863 .n(16)
4864 .k(k)
4865 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4866 }
4867 }
4868
4869 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, k_div_16_subtile) {
4870 TEST_REQUIRES_ARM_NEON;
4871 for (size_t k = 32; k <= 160; k += 16) {
4872 for (uint32_t n = 1; n <= 16; n++) {
4873 for (uint32_t m = 1; m <= 4; m++) {
4874 GemmMicrokernelTester()
4875 .mr(4)
4876 .nr(16)
4877 .kr(2)
4878 .sr(1)
4879 .m(m)
4880 .n(n)
4881 .k(k)
4882 .iterations(1)
4883 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4884 }
4885 }
4886 }
4887 }
4888
4889 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, n_gt_16) {
4890 TEST_REQUIRES_ARM_NEON;
4891 for (uint32_t n = 17; n < 32; n++) {
4892 for (size_t k = 1; k <= 80; k += 17) {
4893 GemmMicrokernelTester()
4894 .mr(4)
4895 .nr(16)
4896 .kr(2)
4897 .sr(1)
4898 .m(4)
4899 .n(n)
4900 .k(k)
4901 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4902 }
4903 }
4904 }
4905
4906 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, n_gt_16_strided_cn) {
4907 TEST_REQUIRES_ARM_NEON;
4908 for (uint32_t n = 17; n < 32; n++) {
4909 for (size_t k = 1; k <= 80; k += 17) {
4910 GemmMicrokernelTester()
4911 .mr(4)
4912 .nr(16)
4913 .kr(2)
4914 .sr(1)
4915 .m(4)
4916 .n(n)
4917 .k(k)
4918 .cn_stride(19)
4919 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4920 }
4921 }
4922 }
4923
4924 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, n_gt_16_subtile) {
4925 TEST_REQUIRES_ARM_NEON;
4926 for (uint32_t n = 17; n < 32; n++) {
4927 for (size_t k = 1; k <= 80; k += 17) {
4928 for (uint32_t m = 1; m <= 4; m++) {
4929 GemmMicrokernelTester()
4930 .mr(4)
4931 .nr(16)
4932 .kr(2)
4933 .sr(1)
4934 .m(m)
4935 .n(n)
4936 .k(k)
4937 .iterations(1)
4938 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4939 }
4940 }
4941 }
4942 }
4943
4944 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, n_div_16) {
4945 TEST_REQUIRES_ARM_NEON;
4946 for (uint32_t n = 32; n <= 48; n += 16) {
4947 for (size_t k = 1; k <= 80; k += 17) {
4948 GemmMicrokernelTester()
4949 .mr(4)
4950 .nr(16)
4951 .kr(2)
4952 .sr(1)
4953 .m(4)
4954 .n(n)
4955 .k(k)
4956 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4957 }
4958 }
4959 }
4960
4961 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, n_div_16_strided_cn) {
4962 TEST_REQUIRES_ARM_NEON;
4963 for (uint32_t n = 32; n <= 48; n += 16) {
4964 for (size_t k = 1; k <= 80; k += 17) {
4965 GemmMicrokernelTester()
4966 .mr(4)
4967 .nr(16)
4968 .kr(2)
4969 .sr(1)
4970 .m(4)
4971 .n(n)
4972 .k(k)
4973 .cn_stride(19)
4974 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4975 }
4976 }
4977 }
4978
4979 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, n_div_16_subtile) {
4980 TEST_REQUIRES_ARM_NEON;
4981 for (uint32_t n = 32; n <= 48; n += 16) {
4982 for (size_t k = 1; k <= 80; k += 17) {
4983 for (uint32_t m = 1; m <= 4; m++) {
4984 GemmMicrokernelTester()
4985 .mr(4)
4986 .nr(16)
4987 .kr(2)
4988 .sr(1)
4989 .m(m)
4990 .n(n)
4991 .k(k)
4992 .iterations(1)
4993 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
4994 }
4995 }
4996 }
4997 }
4998
4999 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, small_kernel) {
5000 TEST_REQUIRES_ARM_NEON;
5001 for (size_t k = 1; k <= 80; k += 17) {
5002 GemmMicrokernelTester()
5003 .mr(4)
5004 .nr(16)
5005 .kr(2)
5006 .sr(1)
5007 .m(4)
5008 .n(16)
5009 .k(k)
5010 .ks(3)
5011 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5012 }
5013 }
5014
5015 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, small_kernel_subtile) {
5016 TEST_REQUIRES_ARM_NEON;
5017 for (size_t k = 1; k <= 80; k += 17) {
5018 for (uint32_t n = 1; n <= 16; n++) {
5019 for (uint32_t m = 1; m <= 4; m++) {
5020 GemmMicrokernelTester()
5021 .mr(4)
5022 .nr(16)
5023 .kr(2)
5024 .sr(1)
5025 .m(m)
5026 .n(n)
5027 .k(k)
5028 .ks(3)
5029 .iterations(1)
5030 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5031 }
5032 }
5033 }
5034 }
5035
5036 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, n_gt_16_small_kernel) {
5037 TEST_REQUIRES_ARM_NEON;
5038 for (uint32_t n = 17; n < 32; n++) {
5039 for (size_t k = 1; k <= 80; k += 17) {
5040 GemmMicrokernelTester()
5041 .mr(4)
5042 .nr(16)
5043 .kr(2)
5044 .sr(1)
5045 .m(4)
5046 .n(n)
5047 .k(k)
5048 .ks(3)
5049 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5050 }
5051 }
5052 }
5053
5054 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, n_div_16_small_kernel) {
5055 TEST_REQUIRES_ARM_NEON;
5056 for (uint32_t n = 32; n <= 48; n += 16) {
5057 for (size_t k = 1; k <= 80; k += 17) {
5058 GemmMicrokernelTester()
5059 .mr(4)
5060 .nr(16)
5061 .kr(2)
5062 .sr(1)
5063 .m(4)
5064 .n(n)
5065 .k(k)
5066 .ks(3)
5067 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5068 }
5069 }
5070 }
5071
5072 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, strided_cm_subtile) {
5073 TEST_REQUIRES_ARM_NEON;
5074 for (size_t k = 1; k <= 80; k += 17) {
5075 for (uint32_t n = 1; n <= 16; n++) {
5076 for (uint32_t m = 1; m <= 4; m++) {
5077 GemmMicrokernelTester()
5078 .mr(4)
5079 .nr(16)
5080 .kr(2)
5081 .sr(1)
5082 .m(m)
5083 .n(n)
5084 .k(k)
5085 .cm_stride(19)
5086 .iterations(1)
5087 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5088 }
5089 }
5090 }
5091 }
5092
5093 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, a_offset) {
5094 TEST_REQUIRES_ARM_NEON;
5095 for (size_t k = 1; k <= 80; k += 17) {
5096 GemmMicrokernelTester()
5097 .mr(4)
5098 .nr(16)
5099 .kr(2)
5100 .sr(1)
5101 .m(4)
5102 .n(16)
5103 .k(k)
5104 .ks(3)
5105 .a_offset(331)
5106 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5107 }
5108 }
5109
5110 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, zero) {
5111 TEST_REQUIRES_ARM_NEON;
5112 for (size_t k = 1; k <= 80; k += 17) {
5113 for (uint32_t mz = 0; mz < 4; mz++) {
5114 GemmMicrokernelTester()
5115 .mr(4)
5116 .nr(16)
5117 .kr(2)
5118 .sr(1)
5119 .m(4)
5120 .n(16)
5121 .k(k)
5122 .ks(3)
5123 .a_offset(331)
5124 .zero_index(mz)
5125 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5126 }
5127 }
5128 }
5129
5130 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, qmin) {
5131 TEST_REQUIRES_ARM_NEON;
5132 GemmMicrokernelTester()
5133 .mr(4)
5134 .nr(16)
5135 .kr(2)
5136 .sr(1)
5137 .m(4)
5138 .n(16)
5139 .k(16)
5140 .qmin(128)
5141 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5142 }
5143
5144 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, qmax) {
5145 TEST_REQUIRES_ARM_NEON;
5146 GemmMicrokernelTester()
5147 .mr(4)
5148 .nr(16)
5149 .kr(2)
5150 .sr(1)
5151 .m(4)
5152 .n(16)
5153 .k(16)
5154 .qmax(128)
5155 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5156 }
5157
5158 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MLAL_LD1R, strided_cm) {
5159 TEST_REQUIRES_ARM_NEON;
5160 GemmMicrokernelTester()
5161 .mr(4)
5162 .nr(16)
5163 .kr(2)
5164 .sr(1)
5165 .m(4)
5166 .n(16)
5167 .k(16)
5168 .cm_stride(19)
5169 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5170 }
5171#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
5172
5173
5174#if XNN_ARCH_ARM || XNN_ARCH_ARM64
5175 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_eq_8) {
5176 TEST_REQUIRES_ARM_NEON;
5177 GemmMicrokernelTester()
5178 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005179 .nr(8)
5180 .kr(2)
5181 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005182 .m(3)
5183 .n(8)
5184 .k(8)
5185 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
5186 }
5187
5188 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, strided_cn) {
5189 TEST_REQUIRES_ARM_NEON;
5190 GemmMicrokernelTester()
5191 .mr(3)
5192 .nr(8)
5193 .kr(2)
5194 .sr(1)
5195 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005196 .n(8)
5197 .k(8)
5198 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005199 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005200 }
5201
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005202 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_eq_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005203 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08005204 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005205 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005206 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005207 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005208 .nr(8)
5209 .kr(2)
5210 .sr(1)
5211 .m(m)
5212 .n(n)
5213 .k(8)
5214 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005215 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005216 }
5217 }
5218 }
5219
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005220 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_eq_8_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005221 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005222 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005223 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005224 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005225 .nr(8)
5226 .kr(2)
5227 .sr(1)
5228 .m(m)
5229 .n(8)
5230 .k(8)
5231 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005232 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005233 }
5234 }
5235
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005236 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_eq_8_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005237 TEST_REQUIRES_ARM_NEON;
5238 for (uint32_t n = 1; n <= 8; n++) {
5239 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005240 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005241 .nr(8)
5242 .kr(2)
5243 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005244 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005245 .n(n)
5246 .k(8)
5247 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005248 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005249 }
5250 }
5251
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005252 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_lt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005253 TEST_REQUIRES_ARM_NEON;
5254 for (size_t k = 1; k < 8; k++) {
5255 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005256 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005257 .nr(8)
5258 .kr(2)
5259 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005260 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005261 .n(8)
5262 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005263 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005264 }
5265 }
5266
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005267 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_lt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005268 TEST_REQUIRES_ARM_NEON;
5269 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005270 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005271 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005272 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005273 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005274 .nr(8)
5275 .kr(2)
5276 .sr(1)
5277 .m(m)
5278 .n(n)
5279 .k(k)
5280 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005281 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005282 }
5283 }
5284 }
5285 }
5286
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005287 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005288 TEST_REQUIRES_ARM_NEON;
5289 for (size_t k = 9; k < 16; k++) {
5290 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005291 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005292 .nr(8)
5293 .kr(2)
5294 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005295 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005296 .n(8)
5297 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005298 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005299 }
5300 }
5301
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005302 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005303 TEST_REQUIRES_ARM_NEON;
5304 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005305 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005306 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005307 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005308 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005309 .nr(8)
5310 .kr(2)
5311 .sr(1)
5312 .m(m)
5313 .n(n)
5314 .k(k)
5315 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005316 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005317 }
5318 }
5319 }
5320 }
5321
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005322 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005323 TEST_REQUIRES_ARM_NEON;
5324 for (size_t k = 16; k <= 80; k += 8) {
5325 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005326 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005327 .nr(8)
5328 .kr(2)
5329 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005330 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005331 .n(8)
5332 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005333 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005334 }
5335 }
5336
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005337 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, k_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005338 TEST_REQUIRES_ARM_NEON;
5339 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005340 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005341 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005342 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005343 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005344 .nr(8)
5345 .kr(2)
5346 .sr(1)
5347 .m(m)
5348 .n(n)
5349 .k(k)
5350 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005351 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005352 }
5353 }
5354 }
5355 }
5356
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005357 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005358 TEST_REQUIRES_ARM_NEON;
5359 for (uint32_t n = 9; n < 16; n++) {
5360 for (size_t k = 1; k <= 40; k += 9) {
5361 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005362 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005363 .nr(8)
5364 .kr(2)
5365 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005366 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005367 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005368 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005369 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005370 }
5371 }
5372 }
5373
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005374 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005375 TEST_REQUIRES_ARM_NEON;
5376 for (uint32_t n = 9; n < 16; n++) {
5377 for (size_t k = 1; k <= 40; k += 9) {
5378 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005379 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005380 .nr(8)
5381 .kr(2)
5382 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005383 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005384 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005385 .k(k)
5386 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005387 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005388 }
5389 }
5390 }
5391
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005392 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005393 TEST_REQUIRES_ARM_NEON;
5394 for (uint32_t n = 9; n < 16; n++) {
5395 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005396 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005397 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005398 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005399 .nr(8)
5400 .kr(2)
5401 .sr(1)
5402 .m(m)
5403 .n(n)
5404 .k(k)
5405 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005406 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005407 }
5408 }
5409 }
5410 }
5411
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005412 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005413 TEST_REQUIRES_ARM_NEON;
5414 for (uint32_t n = 16; n <= 24; n += 8) {
5415 for (size_t k = 1; k <= 40; k += 9) {
5416 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005417 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005418 .nr(8)
5419 .kr(2)
5420 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005421 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005422 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005423 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005424 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005425 }
5426 }
5427 }
5428
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005429 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005430 TEST_REQUIRES_ARM_NEON;
5431 for (uint32_t n = 16; n <= 24; n += 8) {
5432 for (size_t k = 1; k <= 40; k += 9) {
5433 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005434 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005435 .nr(8)
5436 .kr(2)
5437 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005438 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005439 .n(n)
5440 .k(k)
5441 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005442 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005443 }
5444 }
5445 }
5446
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005447 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005448 TEST_REQUIRES_ARM_NEON;
5449 for (uint32_t n = 16; n <= 24; n += 8) {
5450 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005451 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005452 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005453 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005454 .nr(8)
5455 .kr(2)
5456 .sr(1)
5457 .m(m)
5458 .n(n)
5459 .k(k)
5460 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005461 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005462 }
5463 }
5464 }
5465 }
5466
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005467 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005468 TEST_REQUIRES_ARM_NEON;
5469 for (size_t k = 1; k <= 40; k += 9) {
5470 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005471 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005472 .nr(8)
5473 .kr(2)
5474 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005475 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005476 .n(8)
5477 .k(k)
5478 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005479 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005480 }
5481 }
5482
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005483 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005484 TEST_REQUIRES_ARM_NEON;
5485 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005486 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005487 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005488 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005489 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005490 .nr(8)
5491 .kr(2)
5492 .sr(1)
5493 .m(m)
5494 .n(n)
5495 .k(k)
5496 .ks(3)
5497 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005498 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005499 }
5500 }
5501 }
5502 }
5503
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005504 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005505 TEST_REQUIRES_ARM_NEON;
5506 for (uint32_t n = 9; n < 16; n++) {
5507 for (size_t k = 1; k <= 40; k += 9) {
5508 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005509 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005510 .nr(8)
5511 .kr(2)
5512 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005513 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005514 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005515 .k(k)
5516 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005517 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005518 }
5519 }
5520 }
5521
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005522 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005523 TEST_REQUIRES_ARM_NEON;
5524 for (uint32_t n = 16; n <= 24; n += 8) {
5525 for (size_t k = 1; k <= 40; k += 9) {
5526 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005527 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005528 .nr(8)
5529 .kr(2)
5530 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005531 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005532 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005533 .k(k)
5534 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005535 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005536 }
5537 }
5538 }
5539
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005540 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005541 TEST_REQUIRES_ARM_NEON;
5542 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005543 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005544 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005545 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005546 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005547 .nr(8)
5548 .kr(2)
5549 .sr(1)
5550 .m(m)
5551 .n(n)
5552 .k(k)
5553 .cm_stride(11)
5554 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005555 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005556 }
5557 }
5558 }
5559 }
5560
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005561 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005562 TEST_REQUIRES_ARM_NEON;
5563 for (size_t k = 1; k <= 40; k += 9) {
5564 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005565 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005566 .nr(8)
5567 .kr(2)
5568 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005569 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005570 .n(8)
5571 .k(k)
5572 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005573 .a_offset(127)
5574 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005575 }
5576 }
5577
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005578 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005579 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08005580 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005581 for (uint32_t mz = 0; mz < 3; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005582 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005583 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005584 .nr(8)
5585 .kr(2)
5586 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005587 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005588 .n(8)
5589 .k(k)
5590 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005591 .a_offset(127)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005592 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005593 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005594 }
5595 }
5596 }
5597
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005598 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005599 TEST_REQUIRES_ARM_NEON;
5600 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005601 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005602 .nr(8)
5603 .kr(2)
5604 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005605 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005606 .n(8)
5607 .k(8)
5608 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005609 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005610 }
5611
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005612 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005613 TEST_REQUIRES_ARM_NEON;
5614 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005615 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005616 .nr(8)
5617 .kr(2)
5618 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005619 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005620 .n(8)
5621 .k(8)
5622 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005623 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005624 }
5625
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005626 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MULL_LD2R, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005627 TEST_REQUIRES_ARM_NEON;
5628 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005629 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005630 .nr(8)
5631 .kr(2)
5632 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005633 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005634 .n(8)
5635 .k(8)
5636 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08005637 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005638 }
5639#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
5640
5641
5642#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005643 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_eq_8) {
5644 TEST_REQUIRES_ARM_NEON;
5645 GemmMicrokernelTester()
5646 .mr(4)
5647 .nr(8)
5648 .kr(2)
5649 .sr(1)
5650 .m(4)
5651 .n(8)
5652 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -08005653 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005654 }
5655
5656 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, strided_cn) {
5657 TEST_REQUIRES_ARM_NEON;
5658 GemmMicrokernelTester()
5659 .mr(4)
5660 .nr(8)
5661 .kr(2)
5662 .sr(1)
5663 .m(4)
5664 .n(8)
5665 .k(8)
5666 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08005667 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005668 }
5669
5670 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_eq_8_subtile) {
5671 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08005672 for (uint32_t n = 1; n <= 8; n++) {
5673 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005674 GemmMicrokernelTester()
5675 .mr(4)
5676 .nr(8)
5677 .kr(2)
5678 .sr(1)
5679 .m(m)
5680 .n(n)
5681 .k(8)
5682 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005683 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005684 }
5685 }
5686 }
5687
5688 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_eq_8_subtile_m) {
5689 TEST_REQUIRES_ARM_NEON;
5690 for (uint32_t m = 1; m <= 4; m++) {
5691 GemmMicrokernelTester()
5692 .mr(4)
5693 .nr(8)
5694 .kr(2)
5695 .sr(1)
5696 .m(m)
5697 .n(8)
5698 .k(8)
5699 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005700 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005701 }
5702 }
5703
5704 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_eq_8_subtile_n) {
5705 TEST_REQUIRES_ARM_NEON;
5706 for (uint32_t n = 1; n <= 8; n++) {
5707 GemmMicrokernelTester()
5708 .mr(4)
5709 .nr(8)
5710 .kr(2)
5711 .sr(1)
5712 .m(4)
5713 .n(n)
5714 .k(8)
5715 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005716 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005717 }
5718 }
5719
5720 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_lt_8) {
5721 TEST_REQUIRES_ARM_NEON;
5722 for (size_t k = 1; k < 8; k++) {
5723 GemmMicrokernelTester()
5724 .mr(4)
5725 .nr(8)
5726 .kr(2)
5727 .sr(1)
5728 .m(4)
5729 .n(8)
5730 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08005731 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005732 }
5733 }
5734
5735 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_lt_8_subtile) {
5736 TEST_REQUIRES_ARM_NEON;
5737 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005738 for (uint32_t n = 1; n <= 8; n++) {
5739 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005740 GemmMicrokernelTester()
5741 .mr(4)
5742 .nr(8)
5743 .kr(2)
5744 .sr(1)
5745 .m(m)
5746 .n(n)
5747 .k(k)
5748 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005749 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005750 }
5751 }
5752 }
5753 }
5754
5755 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_gt_8) {
5756 TEST_REQUIRES_ARM_NEON;
5757 for (size_t k = 9; k < 16; k++) {
5758 GemmMicrokernelTester()
5759 .mr(4)
5760 .nr(8)
5761 .kr(2)
5762 .sr(1)
5763 .m(4)
5764 .n(8)
5765 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08005766 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005767 }
5768 }
5769
5770 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_gt_8_subtile) {
5771 TEST_REQUIRES_ARM_NEON;
5772 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005773 for (uint32_t n = 1; n <= 8; n++) {
5774 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005775 GemmMicrokernelTester()
5776 .mr(4)
5777 .nr(8)
5778 .kr(2)
5779 .sr(1)
5780 .m(m)
5781 .n(n)
5782 .k(k)
5783 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005784 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005785 }
5786 }
5787 }
5788 }
5789
5790 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_div_8) {
5791 TEST_REQUIRES_ARM_NEON;
5792 for (size_t k = 16; k <= 80; k += 8) {
5793 GemmMicrokernelTester()
5794 .mr(4)
5795 .nr(8)
5796 .kr(2)
5797 .sr(1)
5798 .m(4)
5799 .n(8)
5800 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08005801 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005802 }
5803 }
5804
5805 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, k_div_8_subtile) {
5806 TEST_REQUIRES_ARM_NEON;
5807 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005808 for (uint32_t n = 1; n <= 8; n++) {
5809 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005810 GemmMicrokernelTester()
5811 .mr(4)
5812 .nr(8)
5813 .kr(2)
5814 .sr(1)
5815 .m(m)
5816 .n(n)
5817 .k(k)
5818 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005819 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005820 }
5821 }
5822 }
5823 }
5824
5825 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, n_gt_8) {
5826 TEST_REQUIRES_ARM_NEON;
5827 for (uint32_t n = 9; n < 16; n++) {
5828 for (size_t k = 1; k <= 40; k += 9) {
5829 GemmMicrokernelTester()
5830 .mr(4)
5831 .nr(8)
5832 .kr(2)
5833 .sr(1)
5834 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005835 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005836 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08005837 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005838 }
5839 }
5840 }
5841
5842 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, n_gt_8_strided_cn) {
5843 TEST_REQUIRES_ARM_NEON;
5844 for (uint32_t n = 9; n < 16; n++) {
5845 for (size_t k = 1; k <= 40; k += 9) {
5846 GemmMicrokernelTester()
5847 .mr(4)
5848 .nr(8)
5849 .kr(2)
5850 .sr(1)
5851 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005852 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005853 .k(k)
5854 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08005855 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005856 }
5857 }
5858 }
5859
5860 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, n_gt_8_subtile) {
5861 TEST_REQUIRES_ARM_NEON;
5862 for (uint32_t n = 9; n < 16; n++) {
5863 for (size_t k = 1; k <= 40; k += 9) {
5864 for (uint32_t m = 1; m <= 4; m++) {
5865 GemmMicrokernelTester()
5866 .mr(4)
5867 .nr(8)
5868 .kr(2)
5869 .sr(1)
5870 .m(m)
5871 .n(n)
5872 .k(k)
5873 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005874 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005875 }
5876 }
5877 }
5878 }
5879
5880 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, n_div_8) {
5881 TEST_REQUIRES_ARM_NEON;
5882 for (uint32_t n = 16; n <= 24; n += 8) {
5883 for (size_t k = 1; k <= 40; k += 9) {
5884 GemmMicrokernelTester()
5885 .mr(4)
5886 .nr(8)
5887 .kr(2)
5888 .sr(1)
5889 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005890 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005891 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08005892 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005893 }
5894 }
5895 }
5896
5897 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, n_div_8_strided_cn) {
5898 TEST_REQUIRES_ARM_NEON;
5899 for (uint32_t n = 16; n <= 24; n += 8) {
5900 for (size_t k = 1; k <= 40; k += 9) {
5901 GemmMicrokernelTester()
5902 .mr(4)
5903 .nr(8)
5904 .kr(2)
5905 .sr(1)
5906 .m(4)
5907 .n(n)
5908 .k(k)
5909 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08005910 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005911 }
5912 }
5913 }
5914
5915 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, n_div_8_subtile) {
5916 TEST_REQUIRES_ARM_NEON;
5917 for (uint32_t n = 16; n <= 24; n += 8) {
5918 for (size_t k = 1; k <= 40; k += 9) {
5919 for (uint32_t m = 1; m <= 4; m++) {
5920 GemmMicrokernelTester()
5921 .mr(4)
5922 .nr(8)
5923 .kr(2)
5924 .sr(1)
5925 .m(m)
5926 .n(n)
5927 .k(k)
5928 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005929 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005930 }
5931 }
5932 }
5933 }
5934
5935 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, small_kernel) {
5936 TEST_REQUIRES_ARM_NEON;
5937 for (size_t k = 1; k <= 40; k += 9) {
5938 GemmMicrokernelTester()
5939 .mr(4)
5940 .nr(8)
5941 .kr(2)
5942 .sr(1)
5943 .m(4)
5944 .n(8)
5945 .k(k)
5946 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08005947 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005948 }
5949 }
5950
5951 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, small_kernel_subtile) {
5952 TEST_REQUIRES_ARM_NEON;
5953 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08005954 for (uint32_t n = 1; n <= 8; n++) {
5955 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005956 GemmMicrokernelTester()
5957 .mr(4)
5958 .nr(8)
5959 .kr(2)
5960 .sr(1)
5961 .m(m)
5962 .n(n)
5963 .k(k)
5964 .ks(3)
5965 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08005966 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005967 }
5968 }
5969 }
5970 }
5971
5972 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, n_gt_8_small_kernel) {
5973 TEST_REQUIRES_ARM_NEON;
5974 for (uint32_t n = 9; n < 16; n++) {
5975 for (size_t k = 1; k <= 40; k += 9) {
5976 GemmMicrokernelTester()
5977 .mr(4)
5978 .nr(8)
5979 .kr(2)
5980 .sr(1)
5981 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08005982 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005983 .k(k)
5984 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08005985 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08005986 }
5987 }
5988 }
5989
5990 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, n_div_8_small_kernel) {
5991 TEST_REQUIRES_ARM_NEON;
5992 for (uint32_t n = 16; n <= 24; n += 8) {
5993 for (size_t k = 1; k <= 40; k += 9) {
5994 GemmMicrokernelTester()
5995 .mr(4)
5996 .nr(8)
5997 .kr(2)
5998 .sr(1)
5999 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006000 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006001 .k(k)
6002 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08006003 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006004 }
6005 }
6006 }
6007
6008 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, strided_cm_subtile) {
6009 TEST_REQUIRES_ARM_NEON;
6010 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006011 for (uint32_t n = 1; n <= 8; n++) {
6012 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006013 GemmMicrokernelTester()
6014 .mr(4)
6015 .nr(8)
6016 .kr(2)
6017 .sr(1)
6018 .m(m)
6019 .n(n)
6020 .k(k)
6021 .cm_stride(11)
6022 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006023 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006024 }
6025 }
6026 }
6027 }
6028
6029 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, a_offset) {
6030 TEST_REQUIRES_ARM_NEON;
6031 for (size_t k = 1; k <= 40; k += 9) {
6032 GemmMicrokernelTester()
6033 .mr(4)
6034 .nr(8)
6035 .kr(2)
6036 .sr(1)
6037 .m(4)
6038 .n(8)
6039 .k(k)
6040 .ks(3)
6041 .a_offset(163)
Marat Dukhan50323b82022-01-11 00:12:01 -08006042 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006043 }
6044 }
6045
6046 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, zero) {
6047 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08006048 for (size_t k = 1; k <= 40; k += 9) {
6049 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006050 GemmMicrokernelTester()
6051 .mr(4)
6052 .nr(8)
6053 .kr(2)
6054 .sr(1)
6055 .m(4)
6056 .n(8)
6057 .k(k)
6058 .ks(3)
6059 .a_offset(163)
6060 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -08006061 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006062 }
6063 }
6064 }
6065
6066 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, qmin) {
6067 TEST_REQUIRES_ARM_NEON;
6068 GemmMicrokernelTester()
6069 .mr(4)
6070 .nr(8)
6071 .kr(2)
6072 .sr(1)
6073 .m(4)
6074 .n(8)
6075 .k(8)
6076 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08006077 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006078 }
6079
6080 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, qmax) {
6081 TEST_REQUIRES_ARM_NEON;
6082 GemmMicrokernelTester()
6083 .mr(4)
6084 .nr(8)
6085 .kr(2)
6086 .sr(1)
6087 .m(4)
6088 .n(8)
6089 .k(8)
6090 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08006091 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006092 }
6093
6094 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MULL_LD2R, strided_cm) {
6095 TEST_REQUIRES_ARM_NEON;
6096 GemmMicrokernelTester()
6097 .mr(4)
6098 .nr(8)
6099 .kr(2)
6100 .sr(1)
6101 .m(4)
6102 .n(8)
6103 .k(8)
6104 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08006105 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006106 }
6107#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
6108
6109
6110#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006111 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_eq_16) {
6112 TEST_REQUIRES_ARM_NEON;
6113 GemmMicrokernelTester()
6114 .mr(3)
6115 .nr(8)
6116 .kr(2)
6117 .sr(1)
6118 .m(3)
6119 .n(8)
6120 .k(16)
Marat Dukhan50323b82022-01-11 00:12:01 -08006121 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006122 }
6123
6124 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, strided_cn) {
6125 TEST_REQUIRES_ARM_NEON;
6126 GemmMicrokernelTester()
6127 .mr(3)
6128 .nr(8)
6129 .kr(2)
6130 .sr(1)
6131 .m(3)
6132 .n(8)
6133 .k(16)
6134 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08006135 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006136 }
6137
6138 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_eq_16_subtile) {
6139 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08006140 for (uint32_t n = 1; n <= 8; n++) {
6141 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006142 GemmMicrokernelTester()
6143 .mr(3)
6144 .nr(8)
6145 .kr(2)
6146 .sr(1)
6147 .m(m)
6148 .n(n)
6149 .k(16)
6150 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006151 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006152 }
6153 }
6154 }
6155
6156 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_eq_16_subtile_m) {
6157 TEST_REQUIRES_ARM_NEON;
6158 for (uint32_t m = 1; m <= 3; m++) {
6159 GemmMicrokernelTester()
6160 .mr(3)
6161 .nr(8)
6162 .kr(2)
6163 .sr(1)
6164 .m(m)
6165 .n(8)
6166 .k(16)
6167 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006168 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006169 }
6170 }
6171
6172 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_eq_16_subtile_n) {
6173 TEST_REQUIRES_ARM_NEON;
6174 for (uint32_t n = 1; n <= 8; n++) {
6175 GemmMicrokernelTester()
6176 .mr(3)
6177 .nr(8)
6178 .kr(2)
6179 .sr(1)
6180 .m(3)
6181 .n(n)
6182 .k(16)
6183 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006184 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006185 }
6186 }
6187
6188 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_lt_16) {
6189 TEST_REQUIRES_ARM_NEON;
6190 for (size_t k = 1; k < 16; k++) {
6191 GemmMicrokernelTester()
6192 .mr(3)
6193 .nr(8)
6194 .kr(2)
6195 .sr(1)
6196 .m(3)
6197 .n(8)
6198 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006199 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006200 }
6201 }
6202
6203 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_lt_16_subtile) {
6204 TEST_REQUIRES_ARM_NEON;
6205 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006206 for (uint32_t n = 1; n <= 8; n++) {
6207 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006208 GemmMicrokernelTester()
6209 .mr(3)
6210 .nr(8)
6211 .kr(2)
6212 .sr(1)
6213 .m(m)
6214 .n(n)
6215 .k(k)
6216 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006217 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006218 }
6219 }
6220 }
6221 }
6222
6223 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_gt_16) {
6224 TEST_REQUIRES_ARM_NEON;
6225 for (size_t k = 17; k < 32; k++) {
6226 GemmMicrokernelTester()
6227 .mr(3)
6228 .nr(8)
6229 .kr(2)
6230 .sr(1)
6231 .m(3)
6232 .n(8)
6233 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006234 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006235 }
6236 }
6237
6238 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_gt_16_subtile) {
6239 TEST_REQUIRES_ARM_NEON;
6240 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006241 for (uint32_t n = 1; n <= 8; n++) {
6242 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006243 GemmMicrokernelTester()
6244 .mr(3)
6245 .nr(8)
6246 .kr(2)
6247 .sr(1)
6248 .m(m)
6249 .n(n)
6250 .k(k)
6251 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006252 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006253 }
6254 }
6255 }
6256 }
6257
6258 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_div_16) {
6259 TEST_REQUIRES_ARM_NEON;
6260 for (size_t k = 32; k <= 160; k += 16) {
6261 GemmMicrokernelTester()
6262 .mr(3)
6263 .nr(8)
6264 .kr(2)
6265 .sr(1)
6266 .m(3)
6267 .n(8)
6268 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006269 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006270 }
6271 }
6272
6273 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, k_div_16_subtile) {
6274 TEST_REQUIRES_ARM_NEON;
6275 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006276 for (uint32_t n = 1; n <= 8; n++) {
6277 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006278 GemmMicrokernelTester()
6279 .mr(3)
6280 .nr(8)
6281 .kr(2)
6282 .sr(1)
6283 .m(m)
6284 .n(n)
6285 .k(k)
6286 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006287 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006288 }
6289 }
6290 }
6291 }
6292
6293 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, n_gt_8) {
6294 TEST_REQUIRES_ARM_NEON;
6295 for (uint32_t n = 9; n < 16; n++) {
6296 for (size_t k = 1; k <= 80; k += 17) {
6297 GemmMicrokernelTester()
6298 .mr(3)
6299 .nr(8)
6300 .kr(2)
6301 .sr(1)
6302 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006303 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006304 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006305 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006306 }
6307 }
6308 }
6309
6310 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, n_gt_8_strided_cn) {
6311 TEST_REQUIRES_ARM_NEON;
6312 for (uint32_t n = 9; n < 16; n++) {
6313 for (size_t k = 1; k <= 80; k += 17) {
6314 GemmMicrokernelTester()
6315 .mr(3)
6316 .nr(8)
6317 .kr(2)
6318 .sr(1)
6319 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006320 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006321 .k(k)
6322 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08006323 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006324 }
6325 }
6326 }
6327
6328 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, n_gt_8_subtile) {
6329 TEST_REQUIRES_ARM_NEON;
6330 for (uint32_t n = 9; n < 16; n++) {
6331 for (size_t k = 1; k <= 80; k += 17) {
6332 for (uint32_t m = 1; m <= 3; m++) {
6333 GemmMicrokernelTester()
6334 .mr(3)
6335 .nr(8)
6336 .kr(2)
6337 .sr(1)
6338 .m(m)
6339 .n(n)
6340 .k(k)
6341 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006342 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006343 }
6344 }
6345 }
6346 }
6347
6348 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, n_div_8) {
6349 TEST_REQUIRES_ARM_NEON;
6350 for (uint32_t n = 16; n <= 24; n += 8) {
6351 for (size_t k = 1; k <= 80; k += 17) {
6352 GemmMicrokernelTester()
6353 .mr(3)
6354 .nr(8)
6355 .kr(2)
6356 .sr(1)
6357 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006358 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006359 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006360 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006361 }
6362 }
6363 }
6364
6365 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, n_div_8_strided_cn) {
6366 TEST_REQUIRES_ARM_NEON;
6367 for (uint32_t n = 16; n <= 24; n += 8) {
6368 for (size_t k = 1; k <= 80; k += 17) {
6369 GemmMicrokernelTester()
6370 .mr(3)
6371 .nr(8)
6372 .kr(2)
6373 .sr(1)
6374 .m(3)
6375 .n(n)
6376 .k(k)
6377 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08006378 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006379 }
6380 }
6381 }
6382
6383 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, n_div_8_subtile) {
6384 TEST_REQUIRES_ARM_NEON;
6385 for (uint32_t n = 16; n <= 24; n += 8) {
6386 for (size_t k = 1; k <= 80; k += 17) {
6387 for (uint32_t m = 1; m <= 3; m++) {
6388 GemmMicrokernelTester()
6389 .mr(3)
6390 .nr(8)
6391 .kr(2)
6392 .sr(1)
6393 .m(m)
6394 .n(n)
6395 .k(k)
6396 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006397 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006398 }
6399 }
6400 }
6401 }
6402
6403 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, small_kernel) {
6404 TEST_REQUIRES_ARM_NEON;
6405 for (size_t k = 1; k <= 80; k += 17) {
6406 GemmMicrokernelTester()
6407 .mr(3)
6408 .nr(8)
6409 .kr(2)
6410 .sr(1)
6411 .m(3)
6412 .n(8)
6413 .k(k)
6414 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08006415 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006416 }
6417 }
6418
6419 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, small_kernel_subtile) {
6420 TEST_REQUIRES_ARM_NEON;
6421 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006422 for (uint32_t n = 1; n <= 8; n++) {
6423 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006424 GemmMicrokernelTester()
6425 .mr(3)
6426 .nr(8)
6427 .kr(2)
6428 .sr(1)
6429 .m(m)
6430 .n(n)
6431 .k(k)
6432 .ks(3)
6433 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006434 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006435 }
6436 }
6437 }
6438 }
6439
6440 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, n_gt_8_small_kernel) {
6441 TEST_REQUIRES_ARM_NEON;
6442 for (uint32_t n = 9; n < 16; n++) {
6443 for (size_t k = 1; k <= 80; k += 17) {
6444 GemmMicrokernelTester()
6445 .mr(3)
6446 .nr(8)
6447 .kr(2)
6448 .sr(1)
6449 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006450 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006451 .k(k)
6452 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08006453 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006454 }
6455 }
6456 }
6457
6458 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, n_div_8_small_kernel) {
6459 TEST_REQUIRES_ARM_NEON;
6460 for (uint32_t n = 16; n <= 24; n += 8) {
6461 for (size_t k = 1; k <= 80; k += 17) {
6462 GemmMicrokernelTester()
6463 .mr(3)
6464 .nr(8)
6465 .kr(2)
6466 .sr(1)
6467 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006468 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006469 .k(k)
6470 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08006471 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006472 }
6473 }
6474 }
6475
6476 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, strided_cm_subtile) {
6477 TEST_REQUIRES_ARM_NEON;
6478 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006479 for (uint32_t n = 1; n <= 8; n++) {
6480 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006481 GemmMicrokernelTester()
6482 .mr(3)
6483 .nr(8)
6484 .kr(2)
6485 .sr(1)
6486 .m(m)
6487 .n(n)
6488 .k(k)
6489 .cm_stride(11)
6490 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006491 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006492 }
6493 }
6494 }
6495 }
6496
6497 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, a_offset) {
6498 TEST_REQUIRES_ARM_NEON;
6499 for (size_t k = 1; k <= 80; k += 17) {
6500 GemmMicrokernelTester()
6501 .mr(3)
6502 .nr(8)
6503 .kr(2)
6504 .sr(1)
6505 .m(3)
6506 .n(8)
6507 .k(k)
6508 .ks(3)
6509 .a_offset(251)
Marat Dukhan50323b82022-01-11 00:12:01 -08006510 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006511 }
6512 }
6513
6514 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, zero) {
6515 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08006516 for (size_t k = 1; k <= 80; k += 17) {
6517 for (uint32_t mz = 0; mz < 3; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006518 GemmMicrokernelTester()
6519 .mr(3)
6520 .nr(8)
6521 .kr(2)
6522 .sr(1)
6523 .m(3)
6524 .n(8)
6525 .k(k)
6526 .ks(3)
6527 .a_offset(251)
6528 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -08006529 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006530 }
6531 }
6532 }
6533
6534 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, qmin) {
6535 TEST_REQUIRES_ARM_NEON;
6536 GemmMicrokernelTester()
6537 .mr(3)
6538 .nr(8)
6539 .kr(2)
6540 .sr(1)
6541 .m(3)
6542 .n(8)
6543 .k(16)
6544 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08006545 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006546 }
6547
6548 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, qmax) {
6549 TEST_REQUIRES_ARM_NEON;
6550 GemmMicrokernelTester()
6551 .mr(3)
6552 .nr(8)
6553 .kr(2)
6554 .sr(1)
6555 .m(3)
6556 .n(8)
6557 .k(16)
6558 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08006559 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006560 }
6561
6562 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C2__NEON_MLAL_LD2R, strided_cm) {
6563 TEST_REQUIRES_ARM_NEON;
6564 GemmMicrokernelTester()
6565 .mr(3)
6566 .nr(8)
6567 .kr(2)
6568 .sr(1)
6569 .m(3)
6570 .n(8)
6571 .k(16)
6572 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08006573 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006574 }
6575#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
6576
6577
6578#if XNN_ARCH_ARM || XNN_ARCH_ARM64
6579 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_eq_16) {
6580 TEST_REQUIRES_ARM_NEON;
6581 GemmMicrokernelTester()
6582 .mr(4)
6583 .nr(8)
6584 .kr(2)
6585 .sr(1)
6586 .m(4)
6587 .n(8)
6588 .k(16)
Marat Dukhan50323b82022-01-11 00:12:01 -08006589 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006590 }
6591
6592 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, strided_cn) {
6593 TEST_REQUIRES_ARM_NEON;
6594 GemmMicrokernelTester()
6595 .mr(4)
6596 .nr(8)
6597 .kr(2)
6598 .sr(1)
6599 .m(4)
6600 .n(8)
6601 .k(16)
6602 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08006603 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006604 }
6605
6606 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_eq_16_subtile) {
6607 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08006608 for (uint32_t n = 1; n <= 8; n++) {
6609 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006610 GemmMicrokernelTester()
6611 .mr(4)
6612 .nr(8)
6613 .kr(2)
6614 .sr(1)
6615 .m(m)
6616 .n(n)
6617 .k(16)
6618 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006619 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006620 }
6621 }
6622 }
6623
6624 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_eq_16_subtile_m) {
6625 TEST_REQUIRES_ARM_NEON;
6626 for (uint32_t m = 1; m <= 4; m++) {
6627 GemmMicrokernelTester()
6628 .mr(4)
6629 .nr(8)
6630 .kr(2)
6631 .sr(1)
6632 .m(m)
6633 .n(8)
6634 .k(16)
6635 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006636 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006637 }
6638 }
6639
6640 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_eq_16_subtile_n) {
6641 TEST_REQUIRES_ARM_NEON;
6642 for (uint32_t n = 1; n <= 8; n++) {
6643 GemmMicrokernelTester()
6644 .mr(4)
6645 .nr(8)
6646 .kr(2)
6647 .sr(1)
6648 .m(4)
6649 .n(n)
6650 .k(16)
6651 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006652 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006653 }
6654 }
6655
6656 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_lt_16) {
6657 TEST_REQUIRES_ARM_NEON;
6658 for (size_t k = 1; k < 16; k++) {
6659 GemmMicrokernelTester()
6660 .mr(4)
6661 .nr(8)
6662 .kr(2)
6663 .sr(1)
6664 .m(4)
6665 .n(8)
6666 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006667 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006668 }
6669 }
6670
6671 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_lt_16_subtile) {
6672 TEST_REQUIRES_ARM_NEON;
6673 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006674 for (uint32_t n = 1; n <= 8; n++) {
6675 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006676 GemmMicrokernelTester()
6677 .mr(4)
6678 .nr(8)
6679 .kr(2)
6680 .sr(1)
6681 .m(m)
6682 .n(n)
6683 .k(k)
6684 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006685 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006686 }
6687 }
6688 }
6689 }
6690
6691 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_gt_16) {
6692 TEST_REQUIRES_ARM_NEON;
6693 for (size_t k = 17; k < 32; k++) {
6694 GemmMicrokernelTester()
6695 .mr(4)
6696 .nr(8)
6697 .kr(2)
6698 .sr(1)
6699 .m(4)
6700 .n(8)
6701 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006702 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006703 }
6704 }
6705
6706 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_gt_16_subtile) {
6707 TEST_REQUIRES_ARM_NEON;
6708 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006709 for (uint32_t n = 1; n <= 8; n++) {
6710 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006711 GemmMicrokernelTester()
6712 .mr(4)
6713 .nr(8)
6714 .kr(2)
6715 .sr(1)
6716 .m(m)
6717 .n(n)
6718 .k(k)
6719 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006720 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006721 }
6722 }
6723 }
6724 }
6725
6726 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_div_16) {
6727 TEST_REQUIRES_ARM_NEON;
6728 for (size_t k = 32; k <= 160; k += 16) {
6729 GemmMicrokernelTester()
6730 .mr(4)
6731 .nr(8)
6732 .kr(2)
6733 .sr(1)
6734 .m(4)
6735 .n(8)
6736 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006737 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006738 }
6739 }
6740
6741 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, k_div_16_subtile) {
6742 TEST_REQUIRES_ARM_NEON;
6743 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006744 for (uint32_t n = 1; n <= 8; n++) {
6745 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006746 GemmMicrokernelTester()
6747 .mr(4)
6748 .nr(8)
6749 .kr(2)
6750 .sr(1)
6751 .m(m)
6752 .n(n)
6753 .k(k)
6754 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006755 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006756 }
6757 }
6758 }
6759 }
6760
6761 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, n_gt_8) {
6762 TEST_REQUIRES_ARM_NEON;
6763 for (uint32_t n = 9; n < 16; n++) {
6764 for (size_t k = 1; k <= 80; k += 17) {
6765 GemmMicrokernelTester()
6766 .mr(4)
6767 .nr(8)
6768 .kr(2)
6769 .sr(1)
6770 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006771 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006772 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006773 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006774 }
6775 }
6776 }
6777
6778 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, n_gt_8_strided_cn) {
6779 TEST_REQUIRES_ARM_NEON;
6780 for (uint32_t n = 9; n < 16; n++) {
6781 for (size_t k = 1; k <= 80; k += 17) {
6782 GemmMicrokernelTester()
6783 .mr(4)
6784 .nr(8)
6785 .kr(2)
6786 .sr(1)
6787 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006788 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006789 .k(k)
6790 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08006791 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006792 }
6793 }
6794 }
6795
6796 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, n_gt_8_subtile) {
6797 TEST_REQUIRES_ARM_NEON;
6798 for (uint32_t n = 9; n < 16; n++) {
6799 for (size_t k = 1; k <= 80; k += 17) {
6800 for (uint32_t m = 1; m <= 4; m++) {
6801 GemmMicrokernelTester()
6802 .mr(4)
6803 .nr(8)
6804 .kr(2)
6805 .sr(1)
6806 .m(m)
6807 .n(n)
6808 .k(k)
6809 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006810 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006811 }
6812 }
6813 }
6814 }
6815
6816 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, n_div_8) {
6817 TEST_REQUIRES_ARM_NEON;
6818 for (uint32_t n = 16; n <= 24; n += 8) {
6819 for (size_t k = 1; k <= 80; k += 17) {
6820 GemmMicrokernelTester()
6821 .mr(4)
6822 .nr(8)
6823 .kr(2)
6824 .sr(1)
6825 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006826 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006827 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -08006828 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006829 }
6830 }
6831 }
6832
6833 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, n_div_8_strided_cn) {
6834 TEST_REQUIRES_ARM_NEON;
6835 for (uint32_t n = 16; n <= 24; n += 8) {
6836 for (size_t k = 1; k <= 80; k += 17) {
6837 GemmMicrokernelTester()
6838 .mr(4)
6839 .nr(8)
6840 .kr(2)
6841 .sr(1)
6842 .m(4)
6843 .n(n)
6844 .k(k)
6845 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08006846 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006847 }
6848 }
6849 }
6850
6851 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, n_div_8_subtile) {
6852 TEST_REQUIRES_ARM_NEON;
6853 for (uint32_t n = 16; n <= 24; n += 8) {
6854 for (size_t k = 1; k <= 80; k += 17) {
6855 for (uint32_t m = 1; m <= 4; m++) {
6856 GemmMicrokernelTester()
6857 .mr(4)
6858 .nr(8)
6859 .kr(2)
6860 .sr(1)
6861 .m(m)
6862 .n(n)
6863 .k(k)
6864 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006865 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006866 }
6867 }
6868 }
6869 }
6870
6871 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, small_kernel) {
6872 TEST_REQUIRES_ARM_NEON;
6873 for (size_t k = 1; k <= 80; k += 17) {
6874 GemmMicrokernelTester()
6875 .mr(4)
6876 .nr(8)
6877 .kr(2)
6878 .sr(1)
6879 .m(4)
6880 .n(8)
6881 .k(k)
6882 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08006883 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006884 }
6885 }
6886
6887 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, small_kernel_subtile) {
6888 TEST_REQUIRES_ARM_NEON;
6889 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006890 for (uint32_t n = 1; n <= 8; n++) {
6891 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006892 GemmMicrokernelTester()
6893 .mr(4)
6894 .nr(8)
6895 .kr(2)
6896 .sr(1)
6897 .m(m)
6898 .n(n)
6899 .k(k)
6900 .ks(3)
6901 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006902 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006903 }
6904 }
6905 }
6906 }
6907
6908 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, n_gt_8_small_kernel) {
6909 TEST_REQUIRES_ARM_NEON;
6910 for (uint32_t n = 9; n < 16; n++) {
6911 for (size_t k = 1; k <= 80; k += 17) {
6912 GemmMicrokernelTester()
6913 .mr(4)
6914 .nr(8)
6915 .kr(2)
6916 .sr(1)
6917 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006918 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006919 .k(k)
6920 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08006921 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006922 }
6923 }
6924 }
6925
6926 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, n_div_8_small_kernel) {
6927 TEST_REQUIRES_ARM_NEON;
6928 for (uint32_t n = 16; n <= 24; n += 8) {
6929 for (size_t k = 1; k <= 80; k += 17) {
6930 GemmMicrokernelTester()
6931 .mr(4)
6932 .nr(8)
6933 .kr(2)
6934 .sr(1)
6935 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08006936 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006937 .k(k)
6938 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -08006939 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006940 }
6941 }
6942 }
6943
6944 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, strided_cm_subtile) {
6945 TEST_REQUIRES_ARM_NEON;
6946 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08006947 for (uint32_t n = 1; n <= 8; n++) {
6948 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006949 GemmMicrokernelTester()
6950 .mr(4)
6951 .nr(8)
6952 .kr(2)
6953 .sr(1)
6954 .m(m)
6955 .n(n)
6956 .k(k)
6957 .cm_stride(11)
6958 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -08006959 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006960 }
6961 }
6962 }
6963 }
6964
6965 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, a_offset) {
6966 TEST_REQUIRES_ARM_NEON;
6967 for (size_t k = 1; k <= 80; k += 17) {
6968 GemmMicrokernelTester()
6969 .mr(4)
6970 .nr(8)
6971 .kr(2)
6972 .sr(1)
6973 .m(4)
6974 .n(8)
6975 .k(k)
6976 .ks(3)
6977 .a_offset(331)
Marat Dukhan50323b82022-01-11 00:12:01 -08006978 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006979 }
6980 }
6981
6982 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, zero) {
6983 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08006984 for (size_t k = 1; k <= 80; k += 17) {
6985 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006986 GemmMicrokernelTester()
6987 .mr(4)
6988 .nr(8)
6989 .kr(2)
6990 .sr(1)
6991 .m(4)
6992 .n(8)
6993 .k(k)
6994 .ks(3)
6995 .a_offset(331)
6996 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -08006997 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08006998 }
6999 }
7000 }
7001
7002 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, qmin) {
7003 TEST_REQUIRES_ARM_NEON;
7004 GemmMicrokernelTester()
7005 .mr(4)
7006 .nr(8)
7007 .kr(2)
7008 .sr(1)
7009 .m(4)
7010 .n(8)
7011 .k(16)
7012 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08007013 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007014 }
7015
7016 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, qmax) {
7017 TEST_REQUIRES_ARM_NEON;
7018 GemmMicrokernelTester()
7019 .mr(4)
7020 .nr(8)
7021 .kr(2)
7022 .sr(1)
7023 .m(4)
7024 .n(8)
7025 .k(16)
7026 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -08007027 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007028 }
7029
7030 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C2__NEON_MLAL_LD2R, strided_cm) {
7031 TEST_REQUIRES_ARM_NEON;
7032 GemmMicrokernelTester()
7033 .mr(4)
7034 .nr(8)
7035 .kr(2)
7036 .sr(1)
7037 .m(4)
7038 .n(8)
7039 .k(16)
7040 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -08007041 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c2__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007042 }
7043#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
7044
7045
7046#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007047 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_eq_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007048 TEST_REQUIRES_ARM_NEON;
7049 GemmMicrokernelTester()
7050 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007051 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007052 .kr(2)
7053 .sr(1)
7054 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007055 .n(8)
7056 .k(8)
7057 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007058 }
7059
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007060 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007061 TEST_REQUIRES_ARM_NEON;
7062 GemmMicrokernelTester()
7063 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007064 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007065 .kr(2)
7066 .sr(1)
7067 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007068 .n(8)
7069 .k(8)
7070 .cn_stride(11)
7071 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007072 }
7073
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007074 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_eq_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007075 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007076 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08007077 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007078 GemmMicrokernelTester()
7079 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007080 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007081 .kr(2)
7082 .sr(1)
7083 .m(m)
7084 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007085 .k(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007086 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007087 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007088 }
7089 }
7090 }
7091
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007092 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_eq_8_subtile_m) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007093 TEST_REQUIRES_ARM_NEON;
7094 for (uint32_t m = 1; m <= 2; m++) {
7095 GemmMicrokernelTester()
7096 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007097 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007098 .kr(2)
7099 .sr(1)
7100 .m(m)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007101 .n(8)
7102 .k(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007103 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007104 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007105 }
7106 }
7107
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007108 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_eq_8_subtile_n) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007109 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007110 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007111 GemmMicrokernelTester()
7112 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007113 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007114 .kr(2)
7115 .sr(1)
7116 .m(2)
7117 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007118 .k(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007119 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007120 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007121 }
7122 }
7123
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007124 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_lt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007125 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007126 for (size_t k = 1; k < 8; k++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007127 GemmMicrokernelTester()
7128 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007129 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007130 .kr(2)
7131 .sr(1)
7132 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007133 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007134 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007135 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007136 }
7137 }
7138
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007139 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_lt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007140 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007141 for (size_t k = 1; k < 8; k++) {
7142 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08007143 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007144 GemmMicrokernelTester()
7145 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007146 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007147 .kr(2)
7148 .sr(1)
7149 .m(m)
7150 .n(n)
7151 .k(k)
7152 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007153 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007154 }
7155 }
7156 }
7157 }
7158
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007159 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_gt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007160 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007161 for (size_t k = 9; k < 16; k++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007162 GemmMicrokernelTester()
7163 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007164 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007165 .kr(2)
7166 .sr(1)
7167 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007168 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007169 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007170 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007171 }
7172 }
7173
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007174 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_gt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007175 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007176 for (size_t k = 9; k < 16; k++) {
7177 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08007178 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007179 GemmMicrokernelTester()
7180 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007181 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007182 .kr(2)
7183 .sr(1)
7184 .m(m)
7185 .n(n)
7186 .k(k)
7187 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007188 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007189 }
7190 }
7191 }
7192 }
7193
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007194 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_div_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007195 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007196 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007197 GemmMicrokernelTester()
7198 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007199 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007200 .kr(2)
7201 .sr(1)
7202 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007203 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007204 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007205 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007206 }
7207 }
7208
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007209 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, k_div_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007210 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007211 for (size_t k = 16; k <= 80; k += 8) {
7212 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08007213 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007214 GemmMicrokernelTester()
7215 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007216 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007217 .kr(2)
7218 .sr(1)
7219 .m(m)
7220 .n(n)
7221 .k(k)
7222 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007223 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007224 }
7225 }
7226 }
7227 }
7228
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007229 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, n_gt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007230 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007231 for (uint32_t n = 9; n < 16; n++) {
7232 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007233 GemmMicrokernelTester()
7234 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007235 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007236 .kr(2)
7237 .sr(1)
7238 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08007239 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007240 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007241 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007242 }
7243 }
7244 }
7245
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007246 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, n_gt_8_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007247 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007248 for (uint32_t n = 9; n < 16; n++) {
7249 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007250 GemmMicrokernelTester()
7251 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007252 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007253 .kr(2)
7254 .sr(1)
7255 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08007256 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007257 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007258 .cn_stride(11)
7259 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007260 }
7261 }
7262 }
7263
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007264 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, n_gt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007265 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007266 for (uint32_t n = 9; n < 16; n++) {
7267 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007268 for (uint32_t m = 1; m <= 2; m++) {
7269 GemmMicrokernelTester()
7270 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007271 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007272 .kr(2)
7273 .sr(1)
7274 .m(m)
7275 .n(n)
7276 .k(k)
7277 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007278 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007279 }
7280 }
7281 }
7282 }
7283
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007284 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, n_div_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007285 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007286 for (uint32_t n = 16; n <= 24; n += 8) {
7287 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007288 GemmMicrokernelTester()
7289 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007290 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007291 .kr(2)
7292 .sr(1)
7293 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08007294 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007295 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007296 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007297 }
7298 }
7299 }
7300
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007301 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, n_div_8_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007302 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007303 for (uint32_t n = 16; n <= 24; n += 8) {
7304 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007305 GemmMicrokernelTester()
7306 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007307 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007308 .kr(2)
7309 .sr(1)
7310 .m(2)
7311 .n(n)
7312 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007313 .cn_stride(11)
7314 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007315 }
7316 }
7317 }
7318
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007319 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, n_div_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007320 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007321 for (uint32_t n = 16; n <= 24; n += 8) {
7322 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007323 for (uint32_t m = 1; m <= 2; m++) {
7324 GemmMicrokernelTester()
7325 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007326 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007327 .kr(2)
7328 .sr(1)
7329 .m(m)
7330 .n(n)
7331 .k(k)
7332 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007333 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007334 }
7335 }
7336 }
7337 }
7338
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007339 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007340 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007341 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007342 GemmMicrokernelTester()
7343 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007344 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007345 .kr(2)
7346 .sr(1)
7347 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007348 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007349 .k(k)
7350 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007351 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007352 }
7353 }
7354
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007355 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, small_kernel_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007356 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007357 for (size_t k = 1; k <= 40; k += 9) {
7358 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08007359 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007360 GemmMicrokernelTester()
7361 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007362 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007363 .kr(2)
7364 .sr(1)
7365 .m(m)
7366 .n(n)
7367 .k(k)
7368 .ks(3)
7369 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007370 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007371 }
7372 }
7373 }
7374 }
7375
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007376 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, n_gt_8_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007377 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007378 for (uint32_t n = 9; n < 16; n++) {
7379 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007380 GemmMicrokernelTester()
7381 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007382 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007383 .kr(2)
7384 .sr(1)
7385 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08007386 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007387 .k(k)
7388 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007389 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007390 }
7391 }
7392 }
7393
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007394 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, n_div_8_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007395 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007396 for (uint32_t n = 16; n <= 24; n += 8) {
7397 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007398 GemmMicrokernelTester()
7399 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007400 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007401 .kr(2)
7402 .sr(1)
7403 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08007404 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007405 .k(k)
7406 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007407 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007408 }
7409 }
7410 }
7411
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007412 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, strided_cm_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007413 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007414 for (size_t k = 1; k <= 40; k += 9) {
7415 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08007416 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007417 GemmMicrokernelTester()
7418 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007419 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007420 .kr(2)
7421 .sr(1)
7422 .m(m)
7423 .n(n)
7424 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007425 .cm_stride(11)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007426 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007427 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007428 }
7429 }
7430 }
7431 }
7432
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007433 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, a_offset) {
7434 TEST_REQUIRES_ARM_NEON;
7435 for (size_t k = 1; k <= 40; k += 9) {
7436 GemmMicrokernelTester()
7437 .mr(2)
7438 .nr(8)
7439 .kr(2)
7440 .sr(1)
7441 .m(2)
7442 .n(8)
7443 .k(k)
7444 .ks(3)
7445 .a_offset(83)
7446 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7447 }
7448 }
7449
7450 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, zero) {
7451 TEST_REQUIRES_ARM_NEON;
7452 for (size_t k = 1; k <= 40; k += 9) {
7453 for (uint32_t mz = 0; mz < 2; mz++) {
7454 GemmMicrokernelTester()
7455 .mr(2)
7456 .nr(8)
7457 .kr(2)
7458 .sr(1)
7459 .m(2)
7460 .n(8)
7461 .k(k)
7462 .ks(3)
7463 .a_offset(83)
7464 .zero_index(mz)
7465 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7466 }
7467 }
7468 }
7469
7470 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, qmin) {
7471 TEST_REQUIRES_ARM_NEON;
7472 GemmMicrokernelTester()
7473 .mr(2)
7474 .nr(8)
7475 .kr(2)
7476 .sr(1)
7477 .m(2)
7478 .n(8)
7479 .k(8)
7480 .qmin(128)
7481 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7482 }
7483
7484 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, qmax) {
7485 TEST_REQUIRES_ARM_NEON;
7486 GemmMicrokernelTester()
7487 .mr(2)
7488 .nr(8)
7489 .kr(2)
7490 .sr(1)
7491 .m(2)
7492 .n(8)
7493 .k(8)
7494 .qmax(128)
7495 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7496 }
7497
7498 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MULL_LD4R, strided_cm) {
7499 TEST_REQUIRES_ARM_NEON;
7500 GemmMicrokernelTester()
7501 .mr(2)
7502 .nr(8)
7503 .kr(2)
7504 .sr(1)
7505 .m(2)
7506 .n(8)
7507 .k(8)
7508 .cm_stride(11)
7509 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mull_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7510 }
7511#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
7512
7513
7514#if XNN_ARCH_ARM || XNN_ARCH_ARM64
7515 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_eq_16) {
7516 TEST_REQUIRES_ARM_NEON;
7517 GemmMicrokernelTester()
7518 .mr(2)
7519 .nr(8)
7520 .kr(2)
7521 .sr(1)
7522 .m(2)
7523 .n(8)
7524 .k(16)
7525 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7526 }
7527
7528 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, strided_cn) {
7529 TEST_REQUIRES_ARM_NEON;
7530 GemmMicrokernelTester()
7531 .mr(2)
7532 .nr(8)
7533 .kr(2)
7534 .sr(1)
7535 .m(2)
7536 .n(8)
7537 .k(16)
7538 .cn_stride(11)
7539 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7540 }
7541
7542 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_eq_16_subtile) {
7543 TEST_REQUIRES_ARM_NEON;
7544 for (uint32_t n = 1; n <= 8; n++) {
7545 for (uint32_t m = 1; m <= 2; m++) {
7546 GemmMicrokernelTester()
7547 .mr(2)
7548 .nr(8)
7549 .kr(2)
7550 .sr(1)
7551 .m(m)
7552 .n(n)
7553 .k(16)
7554 .iterations(1)
7555 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7556 }
7557 }
7558 }
7559
7560 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_eq_16_subtile_m) {
7561 TEST_REQUIRES_ARM_NEON;
7562 for (uint32_t m = 1; m <= 2; m++) {
7563 GemmMicrokernelTester()
7564 .mr(2)
7565 .nr(8)
7566 .kr(2)
7567 .sr(1)
7568 .m(m)
7569 .n(8)
7570 .k(16)
7571 .iterations(1)
7572 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7573 }
7574 }
7575
7576 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_eq_16_subtile_n) {
7577 TEST_REQUIRES_ARM_NEON;
7578 for (uint32_t n = 1; n <= 8; n++) {
7579 GemmMicrokernelTester()
7580 .mr(2)
7581 .nr(8)
7582 .kr(2)
7583 .sr(1)
7584 .m(2)
7585 .n(n)
7586 .k(16)
7587 .iterations(1)
7588 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7589 }
7590 }
7591
7592 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_lt_16) {
7593 TEST_REQUIRES_ARM_NEON;
7594 for (size_t k = 1; k < 16; k++) {
7595 GemmMicrokernelTester()
7596 .mr(2)
7597 .nr(8)
7598 .kr(2)
7599 .sr(1)
7600 .m(2)
7601 .n(8)
7602 .k(k)
7603 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7604 }
7605 }
7606
7607 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_lt_16_subtile) {
7608 TEST_REQUIRES_ARM_NEON;
7609 for (size_t k = 1; k < 16; k++) {
7610 for (uint32_t n = 1; n <= 8; n++) {
7611 for (uint32_t m = 1; m <= 2; m++) {
7612 GemmMicrokernelTester()
7613 .mr(2)
7614 .nr(8)
7615 .kr(2)
7616 .sr(1)
7617 .m(m)
7618 .n(n)
7619 .k(k)
7620 .iterations(1)
7621 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7622 }
7623 }
7624 }
7625 }
7626
7627 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_gt_16) {
7628 TEST_REQUIRES_ARM_NEON;
7629 for (size_t k = 17; k < 32; k++) {
7630 GemmMicrokernelTester()
7631 .mr(2)
7632 .nr(8)
7633 .kr(2)
7634 .sr(1)
7635 .m(2)
7636 .n(8)
7637 .k(k)
7638 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7639 }
7640 }
7641
7642 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_gt_16_subtile) {
7643 TEST_REQUIRES_ARM_NEON;
7644 for (size_t k = 17; k < 32; k++) {
7645 for (uint32_t n = 1; n <= 8; n++) {
7646 for (uint32_t m = 1; m <= 2; m++) {
7647 GemmMicrokernelTester()
7648 .mr(2)
7649 .nr(8)
7650 .kr(2)
7651 .sr(1)
7652 .m(m)
7653 .n(n)
7654 .k(k)
7655 .iterations(1)
7656 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7657 }
7658 }
7659 }
7660 }
7661
7662 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_div_16) {
7663 TEST_REQUIRES_ARM_NEON;
7664 for (size_t k = 32; k <= 160; k += 16) {
7665 GemmMicrokernelTester()
7666 .mr(2)
7667 .nr(8)
7668 .kr(2)
7669 .sr(1)
7670 .m(2)
7671 .n(8)
7672 .k(k)
7673 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7674 }
7675 }
7676
7677 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, k_div_16_subtile) {
7678 TEST_REQUIRES_ARM_NEON;
7679 for (size_t k = 32; k <= 160; k += 16) {
7680 for (uint32_t n = 1; n <= 8; n++) {
7681 for (uint32_t m = 1; m <= 2; m++) {
7682 GemmMicrokernelTester()
7683 .mr(2)
7684 .nr(8)
7685 .kr(2)
7686 .sr(1)
7687 .m(m)
7688 .n(n)
7689 .k(k)
7690 .iterations(1)
7691 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7692 }
7693 }
7694 }
7695 }
7696
7697 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, n_gt_8) {
7698 TEST_REQUIRES_ARM_NEON;
7699 for (uint32_t n = 9; n < 16; n++) {
7700 for (size_t k = 1; k <= 80; k += 17) {
7701 GemmMicrokernelTester()
7702 .mr(2)
7703 .nr(8)
7704 .kr(2)
7705 .sr(1)
7706 .m(2)
7707 .n(n)
7708 .k(k)
7709 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7710 }
7711 }
7712 }
7713
7714 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, n_gt_8_strided_cn) {
7715 TEST_REQUIRES_ARM_NEON;
7716 for (uint32_t n = 9; n < 16; n++) {
7717 for (size_t k = 1; k <= 80; k += 17) {
7718 GemmMicrokernelTester()
7719 .mr(2)
7720 .nr(8)
7721 .kr(2)
7722 .sr(1)
7723 .m(2)
7724 .n(n)
7725 .k(k)
7726 .cn_stride(11)
7727 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7728 }
7729 }
7730 }
7731
7732 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, n_gt_8_subtile) {
7733 TEST_REQUIRES_ARM_NEON;
7734 for (uint32_t n = 9; n < 16; n++) {
7735 for (size_t k = 1; k <= 80; k += 17) {
7736 for (uint32_t m = 1; m <= 2; m++) {
7737 GemmMicrokernelTester()
7738 .mr(2)
7739 .nr(8)
7740 .kr(2)
7741 .sr(1)
7742 .m(m)
7743 .n(n)
7744 .k(k)
7745 .iterations(1)
7746 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7747 }
7748 }
7749 }
7750 }
7751
7752 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, n_div_8) {
7753 TEST_REQUIRES_ARM_NEON;
7754 for (uint32_t n = 16; n <= 24; n += 8) {
7755 for (size_t k = 1; k <= 80; k += 17) {
7756 GemmMicrokernelTester()
7757 .mr(2)
7758 .nr(8)
7759 .kr(2)
7760 .sr(1)
7761 .m(2)
7762 .n(n)
7763 .k(k)
7764 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7765 }
7766 }
7767 }
7768
7769 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, n_div_8_strided_cn) {
7770 TEST_REQUIRES_ARM_NEON;
7771 for (uint32_t n = 16; n <= 24; n += 8) {
7772 for (size_t k = 1; k <= 80; k += 17) {
7773 GemmMicrokernelTester()
7774 .mr(2)
7775 .nr(8)
7776 .kr(2)
7777 .sr(1)
7778 .m(2)
7779 .n(n)
7780 .k(k)
7781 .cn_stride(11)
7782 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7783 }
7784 }
7785 }
7786
7787 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, n_div_8_subtile) {
7788 TEST_REQUIRES_ARM_NEON;
7789 for (uint32_t n = 16; n <= 24; n += 8) {
7790 for (size_t k = 1; k <= 80; k += 17) {
7791 for (uint32_t m = 1; m <= 2; m++) {
7792 GemmMicrokernelTester()
7793 .mr(2)
7794 .nr(8)
7795 .kr(2)
7796 .sr(1)
7797 .m(m)
7798 .n(n)
7799 .k(k)
7800 .iterations(1)
7801 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7802 }
7803 }
7804 }
7805 }
7806
7807 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007808 TEST_REQUIRES_ARM_NEON;
7809 for (size_t k = 1; k <= 80; k += 17) {
7810 GemmMicrokernelTester()
7811 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007812 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007813 .kr(2)
7814 .sr(1)
7815 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007816 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007817 .k(k)
7818 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007819 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007820 }
7821 }
7822
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007823 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, small_kernel_subtile) {
7824 TEST_REQUIRES_ARM_NEON;
7825 for (size_t k = 1; k <= 80; k += 17) {
7826 for (uint32_t n = 1; n <= 8; n++) {
7827 for (uint32_t m = 1; m <= 2; m++) {
7828 GemmMicrokernelTester()
7829 .mr(2)
7830 .nr(8)
7831 .kr(2)
7832 .sr(1)
7833 .m(m)
7834 .n(n)
7835 .k(k)
7836 .ks(3)
7837 .iterations(1)
7838 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7839 }
7840 }
7841 }
7842 }
7843
7844 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, n_gt_8_small_kernel) {
7845 TEST_REQUIRES_ARM_NEON;
7846 for (uint32_t n = 9; n < 16; n++) {
7847 for (size_t k = 1; k <= 80; k += 17) {
7848 GemmMicrokernelTester()
7849 .mr(2)
7850 .nr(8)
7851 .kr(2)
7852 .sr(1)
7853 .m(2)
7854 .n(n)
7855 .k(k)
7856 .ks(3)
7857 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7858 }
7859 }
7860 }
7861
7862 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, n_div_8_small_kernel) {
7863 TEST_REQUIRES_ARM_NEON;
7864 for (uint32_t n = 16; n <= 24; n += 8) {
7865 for (size_t k = 1; k <= 80; k += 17) {
7866 GemmMicrokernelTester()
7867 .mr(2)
7868 .nr(8)
7869 .kr(2)
7870 .sr(1)
7871 .m(2)
7872 .n(n)
7873 .k(k)
7874 .ks(3)
7875 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7876 }
7877 }
7878 }
7879
7880 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, strided_cm_subtile) {
7881 TEST_REQUIRES_ARM_NEON;
7882 for (size_t k = 1; k <= 80; k += 17) {
7883 for (uint32_t n = 1; n <= 8; n++) {
7884 for (uint32_t m = 1; m <= 2; m++) {
7885 GemmMicrokernelTester()
7886 .mr(2)
7887 .nr(8)
7888 .kr(2)
7889 .sr(1)
7890 .m(m)
7891 .n(n)
7892 .k(k)
7893 .cm_stride(11)
7894 .iterations(1)
7895 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7896 }
7897 }
7898 }
7899 }
7900
7901 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, a_offset) {
7902 TEST_REQUIRES_ARM_NEON;
7903 for (size_t k = 1; k <= 80; k += 17) {
7904 GemmMicrokernelTester()
7905 .mr(2)
7906 .nr(8)
7907 .kr(2)
7908 .sr(1)
7909 .m(2)
7910 .n(8)
7911 .k(k)
7912 .ks(3)
7913 .a_offset(163)
7914 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
7915 }
7916 }
7917
7918 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, zero) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007919 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08007920 for (size_t k = 1; k <= 80; k += 17) {
7921 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007922 GemmMicrokernelTester()
7923 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007924 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007925 .kr(2)
7926 .sr(1)
7927 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007928 .n(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007929 .k(k)
7930 .ks(3)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007931 .a_offset(163)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007932 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007933 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007934 }
7935 }
7936 }
7937
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007938 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007939 TEST_REQUIRES_ARM_NEON;
7940 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007941 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007942 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007943 .kr(2)
7944 .sr(1)
7945 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007946 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007947 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007948 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007949 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007950 }
7951
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007952 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007953 TEST_REQUIRES_ARM_NEON;
7954 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007955 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007956 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007957 .kr(2)
7958 .sr(1)
7959 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007960 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007961 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007962 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007963 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007964 }
7965
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007966 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_LD4R, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007967 TEST_REQUIRES_ARM_NEON;
7968 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007969 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007970 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007971 .kr(2)
7972 .sr(1)
7973 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007974 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007975 .k(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08007976 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007977 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_ld4r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007978 }
7979#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
7980
7981
7982#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007983 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_eq_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007984 TEST_REQUIRES_ARM_NEON;
7985 GemmMicrokernelTester()
7986 .mr(2)
7987 .nr(8)
7988 .kr(4)
7989 .sr(2)
7990 .m(2)
7991 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007992 .k(8)
7993 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007994 }
7995
Zhi An Nge96b6bc2022-02-03 10:49:46 -08007996 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08007997 TEST_REQUIRES_ARM_NEON;
7998 GemmMicrokernelTester()
7999 .mr(2)
8000 .nr(8)
8001 .kr(4)
8002 .sr(2)
8003 .m(2)
8004 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008005 .k(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008006 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008007 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008008 }
8009
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008010 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_eq_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008011 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08008012 for (uint32_t n = 1; n <= 8; n++) {
8013 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008014 GemmMicrokernelTester()
8015 .mr(2)
8016 .nr(8)
8017 .kr(4)
8018 .sr(2)
8019 .m(m)
8020 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008021 .k(8)
8022 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008023 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008024 }
8025 }
8026 }
8027
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008028 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_eq_8_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008029 TEST_REQUIRES_ARM_NEON;
8030 for (uint32_t m = 1; m <= 2; m++) {
8031 GemmMicrokernelTester()
8032 .mr(2)
8033 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008034 .kr(4)
8035 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008036 .m(m)
8037 .n(8)
8038 .k(8)
8039 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008040 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008041 }
8042 }
8043
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008044 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_eq_8_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008045 TEST_REQUIRES_ARM_NEON;
8046 for (uint32_t n = 1; n <= 8; n++) {
8047 GemmMicrokernelTester()
8048 .mr(2)
8049 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008050 .kr(4)
8051 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008052 .m(2)
8053 .n(n)
8054 .k(8)
8055 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008056 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008057 }
8058 }
8059
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008060 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_lt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008061 TEST_REQUIRES_ARM_NEON;
8062 for (size_t k = 1; k < 8; k++) {
8063 GemmMicrokernelTester()
8064 .mr(2)
8065 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008066 .kr(4)
8067 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008068 .m(2)
8069 .n(8)
8070 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008071 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008072 }
8073 }
8074
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008075 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_lt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008076 TEST_REQUIRES_ARM_NEON;
8077 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008078 for (uint32_t n = 1; n <= 8; n++) {
8079 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008080 GemmMicrokernelTester()
8081 .mr(2)
8082 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008083 .kr(4)
8084 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008085 .m(m)
8086 .n(n)
8087 .k(k)
8088 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008089 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008090 }
8091 }
8092 }
8093 }
8094
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008095 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008096 TEST_REQUIRES_ARM_NEON;
8097 for (size_t k = 9; k < 16; k++) {
8098 GemmMicrokernelTester()
8099 .mr(2)
8100 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008101 .kr(4)
8102 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008103 .m(2)
8104 .n(8)
8105 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008106 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008107 }
8108 }
8109
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008110 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008111 TEST_REQUIRES_ARM_NEON;
8112 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008113 for (uint32_t n = 1; n <= 8; n++) {
8114 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008115 GemmMicrokernelTester()
8116 .mr(2)
8117 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008118 .kr(4)
8119 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008120 .m(m)
8121 .n(n)
8122 .k(k)
8123 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008124 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008125 }
8126 }
8127 }
8128 }
8129
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008130 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008131 TEST_REQUIRES_ARM_NEON;
8132 for (size_t k = 16; k <= 80; k += 8) {
8133 GemmMicrokernelTester()
8134 .mr(2)
8135 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008136 .kr(4)
8137 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008138 .m(2)
8139 .n(8)
8140 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008141 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008142 }
8143 }
8144
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008145 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, k_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008146 TEST_REQUIRES_ARM_NEON;
8147 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008148 for (uint32_t n = 1; n <= 8; n++) {
8149 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008150 GemmMicrokernelTester()
8151 .mr(2)
8152 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008153 .kr(4)
8154 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008155 .m(m)
8156 .n(n)
8157 .k(k)
8158 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008159 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008160 }
8161 }
8162 }
8163 }
8164
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008165 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008166 TEST_REQUIRES_ARM_NEON;
8167 for (uint32_t n = 9; n < 16; n++) {
8168 for (size_t k = 1; k <= 40; k += 9) {
8169 GemmMicrokernelTester()
8170 .mr(2)
8171 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008172 .kr(4)
8173 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008174 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008175 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008176 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008177 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008178 }
8179 }
8180 }
8181
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008182 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008183 TEST_REQUIRES_ARM_NEON;
8184 for (uint32_t n = 9; n < 16; n++) {
8185 for (size_t k = 1; k <= 40; k += 9) {
8186 GemmMicrokernelTester()
8187 .mr(2)
8188 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008189 .kr(4)
8190 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008191 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008192 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008193 .k(k)
8194 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008195 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008196 }
8197 }
8198 }
8199
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008200 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008201 TEST_REQUIRES_ARM_NEON;
8202 for (uint32_t n = 9; n < 16; n++) {
8203 for (size_t k = 1; k <= 40; k += 9) {
8204 for (uint32_t m = 1; m <= 2; m++) {
8205 GemmMicrokernelTester()
8206 .mr(2)
8207 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008208 .kr(4)
8209 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008210 .m(m)
8211 .n(n)
8212 .k(k)
8213 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008214 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008215 }
8216 }
8217 }
8218 }
8219
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008220 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008221 TEST_REQUIRES_ARM_NEON;
8222 for (uint32_t n = 16; n <= 24; n += 8) {
8223 for (size_t k = 1; k <= 40; k += 9) {
8224 GemmMicrokernelTester()
8225 .mr(2)
8226 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008227 .kr(4)
8228 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008229 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008230 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008231 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008232 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008233 }
8234 }
8235 }
8236
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008237 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008238 TEST_REQUIRES_ARM_NEON;
8239 for (uint32_t n = 16; n <= 24; n += 8) {
8240 for (size_t k = 1; k <= 40; k += 9) {
8241 GemmMicrokernelTester()
8242 .mr(2)
8243 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008244 .kr(4)
8245 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008246 .m(2)
8247 .n(n)
8248 .k(k)
8249 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008250 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008251 }
8252 }
8253 }
8254
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008255 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008256 TEST_REQUIRES_ARM_NEON;
8257 for (uint32_t n = 16; n <= 24; n += 8) {
8258 for (size_t k = 1; k <= 40; k += 9) {
8259 for (uint32_t m = 1; m <= 2; m++) {
8260 GemmMicrokernelTester()
8261 .mr(2)
8262 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008263 .kr(4)
8264 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008265 .m(m)
8266 .n(n)
8267 .k(k)
8268 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008269 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008270 }
8271 }
8272 }
8273 }
8274
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008275 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008276 TEST_REQUIRES_ARM_NEON;
8277 for (size_t k = 1; k <= 40; k += 9) {
8278 GemmMicrokernelTester()
8279 .mr(2)
8280 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008281 .kr(4)
8282 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008283 .m(2)
8284 .n(8)
8285 .k(k)
8286 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008287 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008288 }
8289 }
8290
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008291 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008292 TEST_REQUIRES_ARM_NEON;
8293 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008294 for (uint32_t n = 1; n <= 8; n++) {
8295 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008296 GemmMicrokernelTester()
8297 .mr(2)
8298 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008299 .kr(4)
8300 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008301 .m(m)
8302 .n(n)
8303 .k(k)
8304 .ks(3)
8305 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008306 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008307 }
8308 }
8309 }
8310 }
8311
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008312 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008313 TEST_REQUIRES_ARM_NEON;
8314 for (uint32_t n = 9; n < 16; n++) {
8315 for (size_t k = 1; k <= 40; k += 9) {
8316 GemmMicrokernelTester()
8317 .mr(2)
8318 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008319 .kr(4)
8320 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008321 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008322 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008323 .k(k)
8324 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008325 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008326 }
8327 }
8328 }
8329
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008330 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008331 TEST_REQUIRES_ARM_NEON;
8332 for (uint32_t n = 16; n <= 24; n += 8) {
8333 for (size_t k = 1; k <= 40; k += 9) {
8334 GemmMicrokernelTester()
8335 .mr(2)
8336 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008337 .kr(4)
8338 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008339 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008340 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008341 .k(k)
8342 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008343 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008344 }
8345 }
8346 }
8347
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008348 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008349 TEST_REQUIRES_ARM_NEON;
8350 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008351 for (uint32_t n = 1; n <= 8; n++) {
8352 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008353 GemmMicrokernelTester()
8354 .mr(2)
8355 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008356 .kr(4)
8357 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008358 .m(m)
8359 .n(n)
8360 .k(k)
8361 .cm_stride(11)
8362 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008363 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008364 }
8365 }
8366 }
8367 }
8368
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008369 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008370 TEST_REQUIRES_ARM_NEON;
8371 for (size_t k = 1; k <= 40; k += 9) {
8372 GemmMicrokernelTester()
8373 .mr(2)
8374 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008375 .kr(4)
8376 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008377 .m(2)
8378 .n(8)
8379 .k(k)
8380 .ks(3)
8381 .a_offset(83)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008382 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008383 }
8384 }
8385
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008386 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008387 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08008388 for (size_t k = 1; k <= 40; k += 9) {
8389 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008390 GemmMicrokernelTester()
8391 .mr(2)
8392 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008393 .kr(4)
8394 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008395 .m(2)
8396 .n(8)
8397 .k(k)
8398 .ks(3)
8399 .a_offset(83)
8400 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008401 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008402 }
8403 }
8404 }
8405
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008406 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008407 TEST_REQUIRES_ARM_NEON;
8408 GemmMicrokernelTester()
8409 .mr(2)
8410 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008411 .kr(4)
8412 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008413 .m(2)
8414 .n(8)
8415 .k(8)
8416 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008417 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008418 }
8419
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008420 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008421 TEST_REQUIRES_ARM_NEON;
8422 GemmMicrokernelTester()
8423 .mr(2)
8424 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008425 .kr(4)
8426 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008427 .m(2)
8428 .n(8)
8429 .k(8)
8430 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008431 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008432 }
8433
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008434 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4S2__NEON_MULL, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008435 TEST_REQUIRES_ARM_NEON;
8436 GemmMicrokernelTester()
8437 .mr(2)
8438 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008439 .kr(4)
8440 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008441 .m(2)
8442 .n(8)
8443 .k(8)
8444 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008445 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008446 }
8447#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
8448
8449
8450#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008451 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_eq_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008452 TEST_REQUIRES_ARM_NEON;
8453 GemmMicrokernelTester()
8454 .mr(1)
8455 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008456 .kr(4)
8457 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008458 .m(1)
8459 .n(16)
8460 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008461 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008462 }
8463
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008464 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008465 TEST_REQUIRES_ARM_NEON;
8466 GemmMicrokernelTester()
8467 .mr(1)
8468 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008469 .kr(4)
8470 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008471 .m(1)
8472 .n(16)
8473 .k(8)
8474 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008475 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008476 }
8477
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008478 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_eq_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008479 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08008480 for (uint32_t n = 1; n <= 16; n++) {
8481 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008482 GemmMicrokernelTester()
8483 .mr(1)
8484 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008485 .kr(4)
8486 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008487 .m(m)
8488 .n(n)
8489 .k(8)
8490 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008491 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008492 }
8493 }
8494 }
8495
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008496 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_eq_8_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008497 TEST_REQUIRES_ARM_NEON;
8498 for (uint32_t m = 1; m <= 1; m++) {
8499 GemmMicrokernelTester()
8500 .mr(1)
8501 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008502 .kr(4)
8503 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008504 .m(m)
8505 .n(16)
8506 .k(8)
8507 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008508 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008509 }
8510 }
8511
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008512 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_eq_8_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008513 TEST_REQUIRES_ARM_NEON;
8514 for (uint32_t n = 1; n <= 16; n++) {
8515 GemmMicrokernelTester()
8516 .mr(1)
8517 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008518 .kr(4)
8519 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008520 .m(1)
8521 .n(n)
8522 .k(8)
8523 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008524 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008525 }
8526 }
8527
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008528 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_lt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008529 TEST_REQUIRES_ARM_NEON;
8530 for (size_t k = 1; k < 8; k++) {
8531 GemmMicrokernelTester()
8532 .mr(1)
8533 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008534 .kr(4)
8535 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008536 .m(1)
8537 .n(16)
8538 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008539 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008540 }
8541 }
8542
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008543 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_lt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008544 TEST_REQUIRES_ARM_NEON;
8545 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008546 for (uint32_t n = 1; n <= 16; n++) {
8547 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008548 GemmMicrokernelTester()
8549 .mr(1)
8550 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008551 .kr(4)
8552 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008553 .m(m)
8554 .n(n)
8555 .k(k)
8556 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008557 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008558 }
8559 }
8560 }
8561 }
8562
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008563 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008564 TEST_REQUIRES_ARM_NEON;
8565 for (size_t k = 9; k < 16; k++) {
8566 GemmMicrokernelTester()
8567 .mr(1)
8568 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008569 .kr(4)
8570 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008571 .m(1)
8572 .n(16)
8573 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008574 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008575 }
8576 }
8577
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008578 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008579 TEST_REQUIRES_ARM_NEON;
8580 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008581 for (uint32_t n = 1; n <= 16; n++) {
8582 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008583 GemmMicrokernelTester()
8584 .mr(1)
8585 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008586 .kr(4)
8587 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008588 .m(m)
8589 .n(n)
8590 .k(k)
8591 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008592 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008593 }
8594 }
8595 }
8596 }
8597
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008598 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008599 TEST_REQUIRES_ARM_NEON;
8600 for (size_t k = 16; k <= 80; k += 8) {
8601 GemmMicrokernelTester()
8602 .mr(1)
8603 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008604 .kr(4)
8605 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008606 .m(1)
8607 .n(16)
8608 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008609 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008610 }
8611 }
8612
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008613 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, k_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008614 TEST_REQUIRES_ARM_NEON;
8615 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008616 for (uint32_t n = 1; n <= 16; n++) {
8617 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008618 GemmMicrokernelTester()
8619 .mr(1)
8620 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008621 .kr(4)
8622 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008623 .m(m)
8624 .n(n)
8625 .k(k)
8626 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008627 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008628 }
8629 }
8630 }
8631 }
8632
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008633 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, n_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008634 TEST_REQUIRES_ARM_NEON;
8635 for (uint32_t n = 17; n < 32; n++) {
8636 for (size_t k = 1; k <= 40; k += 9) {
8637 GemmMicrokernelTester()
8638 .mr(1)
8639 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008640 .kr(4)
8641 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008642 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008643 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008644 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008645 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008646 }
8647 }
8648 }
8649
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008650 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, n_gt_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008651 TEST_REQUIRES_ARM_NEON;
8652 for (uint32_t n = 17; n < 32; n++) {
8653 for (size_t k = 1; k <= 40; k += 9) {
8654 GemmMicrokernelTester()
8655 .mr(1)
8656 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008657 .kr(4)
8658 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008659 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008660 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008661 .k(k)
8662 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008663 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008664 }
8665 }
8666 }
8667
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008668 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, n_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008669 TEST_REQUIRES_ARM_NEON;
8670 for (uint32_t n = 17; n < 32; n++) {
8671 for (size_t k = 1; k <= 40; k += 9) {
8672 for (uint32_t m = 1; m <= 1; m++) {
8673 GemmMicrokernelTester()
8674 .mr(1)
8675 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008676 .kr(4)
8677 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008678 .m(m)
8679 .n(n)
8680 .k(k)
8681 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008682 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008683 }
8684 }
8685 }
8686 }
8687
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008688 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, n_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008689 TEST_REQUIRES_ARM_NEON;
8690 for (uint32_t n = 32; n <= 48; n += 16) {
8691 for (size_t k = 1; k <= 40; k += 9) {
8692 GemmMicrokernelTester()
8693 .mr(1)
8694 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008695 .kr(4)
8696 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008697 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008698 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008699 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008700 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008701 }
8702 }
8703 }
8704
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008705 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, n_div_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008706 TEST_REQUIRES_ARM_NEON;
8707 for (uint32_t n = 32; n <= 48; n += 16) {
8708 for (size_t k = 1; k <= 40; k += 9) {
8709 GemmMicrokernelTester()
8710 .mr(1)
8711 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008712 .kr(4)
8713 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008714 .m(1)
8715 .n(n)
8716 .k(k)
8717 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008718 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008719 }
8720 }
8721 }
8722
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008723 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, n_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008724 TEST_REQUIRES_ARM_NEON;
8725 for (uint32_t n = 32; n <= 48; n += 16) {
8726 for (size_t k = 1; k <= 40; k += 9) {
8727 for (uint32_t m = 1; m <= 1; m++) {
8728 GemmMicrokernelTester()
8729 .mr(1)
8730 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008731 .kr(4)
8732 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008733 .m(m)
8734 .n(n)
8735 .k(k)
8736 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008737 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008738 }
8739 }
8740 }
8741 }
8742
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008743 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008744 TEST_REQUIRES_ARM_NEON;
8745 for (size_t k = 1; k <= 40; k += 9) {
8746 GemmMicrokernelTester()
8747 .mr(1)
8748 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008749 .kr(4)
8750 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008751 .m(1)
8752 .n(16)
8753 .k(k)
8754 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008755 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008756 }
8757 }
8758
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008759 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008760 TEST_REQUIRES_ARM_NEON;
8761 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008762 for (uint32_t n = 1; n <= 16; n++) {
8763 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008764 GemmMicrokernelTester()
8765 .mr(1)
8766 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008767 .kr(4)
8768 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008769 .m(m)
8770 .n(n)
8771 .k(k)
8772 .ks(3)
8773 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008774 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008775 }
8776 }
8777 }
8778 }
8779
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008780 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, n_gt_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008781 TEST_REQUIRES_ARM_NEON;
8782 for (uint32_t n = 17; n < 32; n++) {
8783 for (size_t k = 1; k <= 40; k += 9) {
8784 GemmMicrokernelTester()
8785 .mr(1)
8786 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008787 .kr(4)
8788 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008789 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008790 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008791 .k(k)
8792 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008793 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008794 }
8795 }
8796 }
8797
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008798 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, n_div_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008799 TEST_REQUIRES_ARM_NEON;
8800 for (uint32_t n = 32; n <= 48; n += 16) {
8801 for (size_t k = 1; k <= 40; k += 9) {
8802 GemmMicrokernelTester()
8803 .mr(1)
8804 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008805 .kr(4)
8806 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008807 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -08008808 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008809 .k(k)
8810 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008811 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008812 }
8813 }
8814 }
8815
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008816 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008817 TEST_REQUIRES_ARM_NEON;
8818 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -08008819 for (uint32_t n = 1; n <= 16; n++) {
8820 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008821 GemmMicrokernelTester()
8822 .mr(1)
8823 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008824 .kr(4)
8825 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008826 .m(m)
8827 .n(n)
8828 .k(k)
8829 .cm_stride(19)
8830 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008831 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008832 }
8833 }
8834 }
8835 }
8836
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008837 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008838 TEST_REQUIRES_ARM_NEON;
8839 for (size_t k = 1; k <= 40; k += 9) {
8840 GemmMicrokernelTester()
8841 .mr(1)
8842 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008843 .kr(4)
8844 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008845 .m(1)
8846 .n(16)
8847 .k(k)
8848 .ks(3)
8849 .a_offset(43)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008850 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008851 }
8852 }
8853
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008854 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008855 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08008856 for (size_t k = 1; k <= 40; k += 9) {
8857 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008858 GemmMicrokernelTester()
8859 .mr(1)
8860 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008861 .kr(4)
8862 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008863 .m(1)
8864 .n(16)
8865 .k(k)
8866 .ks(3)
8867 .a_offset(43)
8868 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008869 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008870 }
8871 }
8872 }
8873
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008874 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008875 TEST_REQUIRES_ARM_NEON;
8876 GemmMicrokernelTester()
8877 .mr(1)
8878 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008879 .kr(4)
8880 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008881 .m(1)
8882 .n(16)
8883 .k(8)
8884 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008885 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008886 }
8887
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008888 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008889 TEST_REQUIRES_ARM_NEON;
8890 GemmMicrokernelTester()
8891 .mr(1)
8892 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008893 .kr(4)
8894 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008895 .m(1)
8896 .n(16)
8897 .k(8)
8898 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008899 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008900 }
8901
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008902 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4S2__NEON_MULL, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008903 TEST_REQUIRES_ARM_NEON;
8904 GemmMicrokernelTester()
8905 .mr(1)
8906 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008907 .kr(4)
8908 .sr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008909 .m(1)
8910 .n(16)
8911 .k(8)
8912 .cm_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008913 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -08008914 }
8915#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
8916
8917
8918#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008919 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_eq_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08008920 TEST_REQUIRES_ARM_NEON;
8921 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008922 .mr(1)
8923 .nr(8)
8924 .kr(4)
8925 .sr(2)
8926 .m(1)
8927 .n(8)
8928 .k(16)
8929 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08008930 }
8931
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008932 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08008933 TEST_REQUIRES_ARM_NEON;
8934 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08008935 .mr(1)
8936 .nr(8)
8937 .kr(4)
8938 .sr(2)
8939 .m(1)
8940 .n(8)
8941 .k(16)
8942 .cn_stride(11)
8943 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
8944 }
8945
8946 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_eq_16_subtile) {
8947 TEST_REQUIRES_ARM_NEON;
8948 for (uint32_t n = 1; n <= 8; n++) {
8949 for (uint32_t m = 1; m <= 1; m++) {
8950 GemmMicrokernelTester()
8951 .mr(1)
8952 .nr(8)
8953 .kr(4)
8954 .sr(2)
8955 .m(m)
8956 .n(n)
8957 .k(16)
8958 .iterations(1)
8959 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
8960 }
8961 }
8962 }
8963
8964 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_eq_16_subtile_m) {
8965 TEST_REQUIRES_ARM_NEON;
8966 for (uint32_t m = 1; m <= 1; m++) {
8967 GemmMicrokernelTester()
8968 .mr(1)
8969 .nr(8)
8970 .kr(4)
8971 .sr(2)
8972 .m(m)
8973 .n(8)
8974 .k(16)
8975 .iterations(1)
8976 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
8977 }
8978 }
8979
8980 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_eq_16_subtile_n) {
8981 TEST_REQUIRES_ARM_NEON;
8982 for (uint32_t n = 1; n <= 8; n++) {
8983 GemmMicrokernelTester()
8984 .mr(1)
8985 .nr(8)
8986 .kr(4)
8987 .sr(2)
8988 .m(1)
8989 .n(n)
8990 .k(16)
8991 .iterations(1)
8992 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
8993 }
8994 }
8995
8996 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_lt_16) {
8997 TEST_REQUIRES_ARM_NEON;
8998 for (size_t k = 1; k < 16; k++) {
8999 GemmMicrokernelTester()
9000 .mr(1)
9001 .nr(8)
9002 .kr(4)
9003 .sr(2)
9004 .m(1)
9005 .n(8)
9006 .k(k)
9007 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9008 }
9009 }
9010
9011 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_lt_16_subtile) {
9012 TEST_REQUIRES_ARM_NEON;
9013 for (size_t k = 1; k < 16; k++) {
9014 for (uint32_t n = 1; n <= 8; n++) {
9015 for (uint32_t m = 1; m <= 1; m++) {
9016 GemmMicrokernelTester()
9017 .mr(1)
9018 .nr(8)
9019 .kr(4)
9020 .sr(2)
9021 .m(m)
9022 .n(n)
9023 .k(k)
9024 .iterations(1)
9025 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9026 }
9027 }
9028 }
9029 }
9030
9031 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_gt_16) {
9032 TEST_REQUIRES_ARM_NEON;
9033 for (size_t k = 17; k < 32; k++) {
9034 GemmMicrokernelTester()
9035 .mr(1)
9036 .nr(8)
9037 .kr(4)
9038 .sr(2)
9039 .m(1)
9040 .n(8)
9041 .k(k)
9042 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9043 }
9044 }
9045
9046 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_gt_16_subtile) {
9047 TEST_REQUIRES_ARM_NEON;
9048 for (size_t k = 17; k < 32; k++) {
9049 for (uint32_t n = 1; n <= 8; n++) {
9050 for (uint32_t m = 1; m <= 1; m++) {
9051 GemmMicrokernelTester()
9052 .mr(1)
9053 .nr(8)
9054 .kr(4)
9055 .sr(2)
9056 .m(m)
9057 .n(n)
9058 .k(k)
9059 .iterations(1)
9060 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9061 }
9062 }
9063 }
9064 }
9065
9066 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_div_16) {
9067 TEST_REQUIRES_ARM_NEON;
9068 for (size_t k = 32; k <= 160; k += 16) {
9069 GemmMicrokernelTester()
9070 .mr(1)
9071 .nr(8)
9072 .kr(4)
9073 .sr(2)
9074 .m(1)
9075 .n(8)
9076 .k(k)
9077 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9078 }
9079 }
9080
9081 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, k_div_16_subtile) {
9082 TEST_REQUIRES_ARM_NEON;
9083 for (size_t k = 32; k <= 160; k += 16) {
9084 for (uint32_t n = 1; n <= 8; n++) {
9085 for (uint32_t m = 1; m <= 1; m++) {
9086 GemmMicrokernelTester()
9087 .mr(1)
9088 .nr(8)
9089 .kr(4)
9090 .sr(2)
9091 .m(m)
9092 .n(n)
9093 .k(k)
9094 .iterations(1)
9095 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9096 }
9097 }
9098 }
9099 }
9100
9101 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, n_gt_8) {
9102 TEST_REQUIRES_ARM_NEON;
9103 for (uint32_t n = 9; n < 16; n++) {
9104 for (size_t k = 1; k <= 80; k += 17) {
9105 GemmMicrokernelTester()
9106 .mr(1)
9107 .nr(8)
9108 .kr(4)
9109 .sr(2)
9110 .m(1)
9111 .n(n)
9112 .k(k)
9113 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9114 }
9115 }
9116 }
9117
9118 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, n_gt_8_strided_cn) {
9119 TEST_REQUIRES_ARM_NEON;
9120 for (uint32_t n = 9; n < 16; n++) {
9121 for (size_t k = 1; k <= 80; k += 17) {
9122 GemmMicrokernelTester()
9123 .mr(1)
9124 .nr(8)
9125 .kr(4)
9126 .sr(2)
9127 .m(1)
9128 .n(n)
9129 .k(k)
9130 .cn_stride(11)
9131 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9132 }
9133 }
9134 }
9135
9136 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, n_gt_8_subtile) {
9137 TEST_REQUIRES_ARM_NEON;
9138 for (uint32_t n = 9; n < 16; n++) {
9139 for (size_t k = 1; k <= 80; k += 17) {
9140 for (uint32_t m = 1; m <= 1; m++) {
9141 GemmMicrokernelTester()
9142 .mr(1)
9143 .nr(8)
9144 .kr(4)
9145 .sr(2)
9146 .m(m)
9147 .n(n)
9148 .k(k)
9149 .iterations(1)
9150 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9151 }
9152 }
9153 }
9154 }
9155
9156 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, n_div_8) {
9157 TEST_REQUIRES_ARM_NEON;
9158 for (uint32_t n = 16; n <= 24; n += 8) {
9159 for (size_t k = 1; k <= 80; k += 17) {
9160 GemmMicrokernelTester()
9161 .mr(1)
9162 .nr(8)
9163 .kr(4)
9164 .sr(2)
9165 .m(1)
9166 .n(n)
9167 .k(k)
9168 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9169 }
9170 }
9171 }
9172
9173 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, n_div_8_strided_cn) {
9174 TEST_REQUIRES_ARM_NEON;
9175 for (uint32_t n = 16; n <= 24; n += 8) {
9176 for (size_t k = 1; k <= 80; k += 17) {
9177 GemmMicrokernelTester()
9178 .mr(1)
9179 .nr(8)
9180 .kr(4)
9181 .sr(2)
9182 .m(1)
9183 .n(n)
9184 .k(k)
9185 .cn_stride(11)
9186 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9187 }
9188 }
9189 }
9190
9191 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, n_div_8_subtile) {
9192 TEST_REQUIRES_ARM_NEON;
9193 for (uint32_t n = 16; n <= 24; n += 8) {
9194 for (size_t k = 1; k <= 80; k += 17) {
9195 for (uint32_t m = 1; m <= 1; m++) {
9196 GemmMicrokernelTester()
9197 .mr(1)
9198 .nr(8)
9199 .kr(4)
9200 .sr(2)
9201 .m(m)
9202 .n(n)
9203 .k(k)
9204 .iterations(1)
9205 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9206 }
9207 }
9208 }
9209 }
9210
9211 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, small_kernel) {
9212 TEST_REQUIRES_ARM_NEON;
9213 for (size_t k = 1; k <= 80; k += 17) {
9214 GemmMicrokernelTester()
9215 .mr(1)
9216 .nr(8)
9217 .kr(4)
9218 .sr(2)
9219 .m(1)
9220 .n(8)
9221 .k(k)
9222 .ks(3)
9223 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9224 }
9225 }
9226
9227 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, small_kernel_subtile) {
9228 TEST_REQUIRES_ARM_NEON;
9229 for (size_t k = 1; k <= 80; k += 17) {
9230 for (uint32_t n = 1; n <= 8; n++) {
9231 for (uint32_t m = 1; m <= 1; m++) {
9232 GemmMicrokernelTester()
9233 .mr(1)
9234 .nr(8)
9235 .kr(4)
9236 .sr(2)
9237 .m(m)
9238 .n(n)
9239 .k(k)
9240 .ks(3)
9241 .iterations(1)
9242 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9243 }
9244 }
9245 }
9246 }
9247
9248 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, n_gt_8_small_kernel) {
9249 TEST_REQUIRES_ARM_NEON;
9250 for (uint32_t n = 9; n < 16; n++) {
9251 for (size_t k = 1; k <= 80; k += 17) {
9252 GemmMicrokernelTester()
9253 .mr(1)
9254 .nr(8)
9255 .kr(4)
9256 .sr(2)
9257 .m(1)
9258 .n(n)
9259 .k(k)
9260 .ks(3)
9261 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9262 }
9263 }
9264 }
9265
9266 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, n_div_8_small_kernel) {
9267 TEST_REQUIRES_ARM_NEON;
9268 for (uint32_t n = 16; n <= 24; n += 8) {
9269 for (size_t k = 1; k <= 80; k += 17) {
9270 GemmMicrokernelTester()
9271 .mr(1)
9272 .nr(8)
9273 .kr(4)
9274 .sr(2)
9275 .m(1)
9276 .n(n)
9277 .k(k)
9278 .ks(3)
9279 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9280 }
9281 }
9282 }
9283
9284 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, strided_cm_subtile) {
9285 TEST_REQUIRES_ARM_NEON;
9286 for (size_t k = 1; k <= 80; k += 17) {
9287 for (uint32_t n = 1; n <= 8; n++) {
9288 for (uint32_t m = 1; m <= 1; m++) {
9289 GemmMicrokernelTester()
9290 .mr(1)
9291 .nr(8)
9292 .kr(4)
9293 .sr(2)
9294 .m(m)
9295 .n(n)
9296 .k(k)
9297 .cm_stride(11)
9298 .iterations(1)
9299 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9300 }
9301 }
9302 }
9303 }
9304
9305 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, a_offset) {
9306 TEST_REQUIRES_ARM_NEON;
9307 for (size_t k = 1; k <= 80; k += 17) {
9308 GemmMicrokernelTester()
9309 .mr(1)
9310 .nr(8)
9311 .kr(4)
9312 .sr(2)
9313 .m(1)
9314 .n(8)
9315 .k(k)
9316 .ks(3)
9317 .a_offset(83)
9318 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9319 }
9320 }
9321
9322 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, zero) {
9323 TEST_REQUIRES_ARM_NEON;
9324 for (size_t k = 1; k <= 80; k += 17) {
9325 for (uint32_t mz = 0; mz < 1; mz++) {
9326 GemmMicrokernelTester()
9327 .mr(1)
9328 .nr(8)
9329 .kr(4)
9330 .sr(2)
9331 .m(1)
9332 .n(8)
9333 .k(k)
9334 .ks(3)
9335 .a_offset(83)
9336 .zero_index(mz)
9337 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9338 }
9339 }
9340 }
9341
9342 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, qmin) {
9343 TEST_REQUIRES_ARM_NEON;
9344 GemmMicrokernelTester()
9345 .mr(1)
9346 .nr(8)
9347 .kr(4)
9348 .sr(2)
9349 .m(1)
9350 .n(8)
9351 .k(16)
9352 .qmin(128)
9353 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9354 }
9355
9356 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, qmax) {
9357 TEST_REQUIRES_ARM_NEON;
9358 GemmMicrokernelTester()
9359 .mr(1)
9360 .nr(8)
9361 .kr(4)
9362 .sr(2)
9363 .m(1)
9364 .n(8)
9365 .k(16)
9366 .qmax(128)
9367 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9368 }
9369
9370 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C4S2__NEON_MLAL, strided_cm) {
9371 TEST_REQUIRES_ARM_NEON;
9372 GemmMicrokernelTester()
9373 .mr(1)
9374 .nr(8)
9375 .kr(4)
9376 .sr(2)
9377 .m(1)
9378 .n(8)
9379 .k(16)
9380 .cm_stride(11)
9381 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9382 }
9383#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
9384
9385
9386#if XNN_ARCH_ARM || XNN_ARCH_ARM64
9387 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_eq_16) {
9388 TEST_REQUIRES_ARM_NEON;
9389 GemmMicrokernelTester()
9390 .mr(4)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009391 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009392 .kr(4)
9393 .sr(2)
9394 .m(4)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009395 .n(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009396 .k(16)
9397 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9398 }
9399
9400 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, strided_cn) {
9401 TEST_REQUIRES_ARM_NEON;
9402 GemmMicrokernelTester()
9403 .mr(4)
9404 .nr(16)
9405 .kr(4)
9406 .sr(2)
9407 .m(4)
9408 .n(16)
9409 .k(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009410 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009411 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009412 }
9413
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009414 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_eq_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009415 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -08009416 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009417 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009418 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009419 .mr(4)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009420 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009421 .kr(4)
9422 .sr(2)
9423 .m(m)
9424 .n(n)
9425 .k(16)
9426 .iterations(1)
9427 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9428 }
9429 }
9430 }
9431
9432 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_eq_16_subtile_m) {
9433 TEST_REQUIRES_ARM_NEON;
9434 for (uint32_t m = 1; m <= 4; m++) {
9435 GemmMicrokernelTester()
9436 .mr(4)
9437 .nr(16)
9438 .kr(4)
9439 .sr(2)
9440 .m(m)
9441 .n(16)
9442 .k(16)
9443 .iterations(1)
9444 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9445 }
9446 }
9447
9448 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_eq_16_subtile_n) {
9449 TEST_REQUIRES_ARM_NEON;
9450 for (uint32_t n = 1; n <= 16; n++) {
9451 GemmMicrokernelTester()
9452 .mr(4)
9453 .nr(16)
9454 .kr(4)
9455 .sr(2)
9456 .m(4)
9457 .n(n)
9458 .k(16)
9459 .iterations(1)
9460 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9461 }
9462 }
9463
9464 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_lt_16) {
9465 TEST_REQUIRES_ARM_NEON;
9466 for (size_t k = 1; k < 16; k++) {
9467 GemmMicrokernelTester()
9468 .mr(4)
9469 .nr(16)
9470 .kr(4)
9471 .sr(2)
9472 .m(4)
9473 .n(16)
9474 .k(k)
9475 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9476 }
9477 }
9478
9479 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_lt_16_subtile) {
9480 TEST_REQUIRES_ARM_NEON;
9481 for (size_t k = 1; k < 16; k++) {
9482 for (uint32_t n = 1; n <= 16; n++) {
9483 for (uint32_t m = 1; m <= 4; m++) {
9484 GemmMicrokernelTester()
9485 .mr(4)
9486 .nr(16)
9487 .kr(4)
9488 .sr(2)
9489 .m(m)
9490 .n(n)
9491 .k(k)
9492 .iterations(1)
9493 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9494 }
9495 }
9496 }
9497 }
9498
9499 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_gt_16) {
9500 TEST_REQUIRES_ARM_NEON;
9501 for (size_t k = 17; k < 32; k++) {
9502 GemmMicrokernelTester()
9503 .mr(4)
9504 .nr(16)
9505 .kr(4)
9506 .sr(2)
9507 .m(4)
9508 .n(16)
9509 .k(k)
9510 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9511 }
9512 }
9513
9514 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_gt_16_subtile) {
9515 TEST_REQUIRES_ARM_NEON;
9516 for (size_t k = 17; k < 32; k++) {
9517 for (uint32_t n = 1; n <= 16; n++) {
9518 for (uint32_t m = 1; m <= 4; m++) {
9519 GemmMicrokernelTester()
9520 .mr(4)
9521 .nr(16)
9522 .kr(4)
9523 .sr(2)
9524 .m(m)
9525 .n(n)
9526 .k(k)
9527 .iterations(1)
9528 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9529 }
9530 }
9531 }
9532 }
9533
9534 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_div_16) {
9535 TEST_REQUIRES_ARM_NEON;
9536 for (size_t k = 32; k <= 160; k += 16) {
9537 GemmMicrokernelTester()
9538 .mr(4)
9539 .nr(16)
9540 .kr(4)
9541 .sr(2)
9542 .m(4)
9543 .n(16)
9544 .k(k)
9545 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9546 }
9547 }
9548
9549 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, k_div_16_subtile) {
9550 TEST_REQUIRES_ARM_NEON;
9551 for (size_t k = 32; k <= 160; k += 16) {
9552 for (uint32_t n = 1; n <= 16; n++) {
9553 for (uint32_t m = 1; m <= 4; m++) {
9554 GemmMicrokernelTester()
9555 .mr(4)
9556 .nr(16)
9557 .kr(4)
9558 .sr(2)
9559 .m(m)
9560 .n(n)
9561 .k(k)
9562 .iterations(1)
9563 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9564 }
9565 }
9566 }
9567 }
9568
9569 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, n_gt_16) {
9570 TEST_REQUIRES_ARM_NEON;
9571 for (uint32_t n = 17; n < 32; n++) {
9572 for (size_t k = 1; k <= 80; k += 17) {
9573 GemmMicrokernelTester()
9574 .mr(4)
9575 .nr(16)
9576 .kr(4)
9577 .sr(2)
9578 .m(4)
9579 .n(n)
9580 .k(k)
9581 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9582 }
9583 }
9584 }
9585
9586 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, n_gt_16_strided_cn) {
9587 TEST_REQUIRES_ARM_NEON;
9588 for (uint32_t n = 17; n < 32; n++) {
9589 for (size_t k = 1; k <= 80; k += 17) {
9590 GemmMicrokernelTester()
9591 .mr(4)
9592 .nr(16)
9593 .kr(4)
9594 .sr(2)
9595 .m(4)
9596 .n(n)
9597 .k(k)
9598 .cn_stride(19)
9599 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9600 }
9601 }
9602 }
9603
9604 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, n_gt_16_subtile) {
9605 TEST_REQUIRES_ARM_NEON;
9606 for (uint32_t n = 17; n < 32; n++) {
9607 for (size_t k = 1; k <= 80; k += 17) {
9608 for (uint32_t m = 1; m <= 4; m++) {
9609 GemmMicrokernelTester()
9610 .mr(4)
9611 .nr(16)
9612 .kr(4)
9613 .sr(2)
9614 .m(m)
9615 .n(n)
9616 .k(k)
9617 .iterations(1)
9618 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9619 }
9620 }
9621 }
9622 }
9623
9624 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, n_div_16) {
9625 TEST_REQUIRES_ARM_NEON;
9626 for (uint32_t n = 32; n <= 48; n += 16) {
9627 for (size_t k = 1; k <= 80; k += 17) {
9628 GemmMicrokernelTester()
9629 .mr(4)
9630 .nr(16)
9631 .kr(4)
9632 .sr(2)
9633 .m(4)
9634 .n(n)
9635 .k(k)
9636 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9637 }
9638 }
9639 }
9640
9641 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, n_div_16_strided_cn) {
9642 TEST_REQUIRES_ARM_NEON;
9643 for (uint32_t n = 32; n <= 48; n += 16) {
9644 for (size_t k = 1; k <= 80; k += 17) {
9645 GemmMicrokernelTester()
9646 .mr(4)
9647 .nr(16)
9648 .kr(4)
9649 .sr(2)
9650 .m(4)
9651 .n(n)
9652 .k(k)
9653 .cn_stride(19)
9654 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9655 }
9656 }
9657 }
9658
9659 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, n_div_16_subtile) {
9660 TEST_REQUIRES_ARM_NEON;
9661 for (uint32_t n = 32; n <= 48; n += 16) {
9662 for (size_t k = 1; k <= 80; k += 17) {
9663 for (uint32_t m = 1; m <= 4; m++) {
9664 GemmMicrokernelTester()
9665 .mr(4)
9666 .nr(16)
9667 .kr(4)
9668 .sr(2)
9669 .m(m)
9670 .n(n)
9671 .k(k)
9672 .iterations(1)
9673 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9674 }
9675 }
9676 }
9677 }
9678
9679 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, small_kernel) {
9680 TEST_REQUIRES_ARM_NEON;
9681 for (size_t k = 1; k <= 80; k += 17) {
9682 GemmMicrokernelTester()
9683 .mr(4)
9684 .nr(16)
9685 .kr(4)
9686 .sr(2)
9687 .m(4)
9688 .n(16)
9689 .k(k)
9690 .ks(3)
9691 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9692 }
9693 }
9694
9695 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, small_kernel_subtile) {
9696 TEST_REQUIRES_ARM_NEON;
9697 for (size_t k = 1; k <= 80; k += 17) {
9698 for (uint32_t n = 1; n <= 16; n++) {
9699 for (uint32_t m = 1; m <= 4; m++) {
9700 GemmMicrokernelTester()
9701 .mr(4)
9702 .nr(16)
9703 .kr(4)
9704 .sr(2)
9705 .m(m)
9706 .n(n)
9707 .k(k)
9708 .ks(3)
9709 .iterations(1)
9710 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9711 }
9712 }
9713 }
9714 }
9715
9716 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, n_gt_16_small_kernel) {
9717 TEST_REQUIRES_ARM_NEON;
9718 for (uint32_t n = 17; n < 32; n++) {
9719 for (size_t k = 1; k <= 80; k += 17) {
9720 GemmMicrokernelTester()
9721 .mr(4)
9722 .nr(16)
9723 .kr(4)
9724 .sr(2)
9725 .m(4)
9726 .n(n)
9727 .k(k)
9728 .ks(3)
9729 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9730 }
9731 }
9732 }
9733
9734 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, n_div_16_small_kernel) {
9735 TEST_REQUIRES_ARM_NEON;
9736 for (uint32_t n = 32; n <= 48; n += 16) {
9737 for (size_t k = 1; k <= 80; k += 17) {
9738 GemmMicrokernelTester()
9739 .mr(4)
9740 .nr(16)
9741 .kr(4)
9742 .sr(2)
9743 .m(4)
9744 .n(n)
9745 .k(k)
9746 .ks(3)
9747 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9748 }
9749 }
9750 }
9751
9752 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, strided_cm_subtile) {
9753 TEST_REQUIRES_ARM_NEON;
9754 for (size_t k = 1; k <= 80; k += 17) {
9755 for (uint32_t n = 1; n <= 16; n++) {
9756 for (uint32_t m = 1; m <= 4; m++) {
9757 GemmMicrokernelTester()
9758 .mr(4)
9759 .nr(16)
9760 .kr(4)
9761 .sr(2)
9762 .m(m)
9763 .n(n)
9764 .k(k)
9765 .cm_stride(19)
9766 .iterations(1)
9767 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9768 }
9769 }
9770 }
9771 }
9772
9773 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, a_offset) {
9774 TEST_REQUIRES_ARM_NEON;
9775 for (size_t k = 1; k <= 80; k += 17) {
9776 GemmMicrokernelTester()
9777 .mr(4)
9778 .nr(16)
9779 .kr(4)
9780 .sr(2)
9781 .m(4)
9782 .n(16)
9783 .k(k)
9784 .ks(3)
9785 .a_offset(331)
9786 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9787 }
9788 }
9789
9790 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, zero) {
9791 TEST_REQUIRES_ARM_NEON;
9792 for (size_t k = 1; k <= 80; k += 17) {
9793 for (uint32_t mz = 0; mz < 4; mz++) {
9794 GemmMicrokernelTester()
9795 .mr(4)
9796 .nr(16)
9797 .kr(4)
9798 .sr(2)
9799 .m(4)
9800 .n(16)
9801 .k(k)
9802 .ks(3)
9803 .a_offset(331)
9804 .zero_index(mz)
9805 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9806 }
9807 }
9808 }
9809
9810 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, qmin) {
9811 TEST_REQUIRES_ARM_NEON;
9812 GemmMicrokernelTester()
9813 .mr(4)
9814 .nr(16)
9815 .kr(4)
9816 .sr(2)
9817 .m(4)
9818 .n(16)
9819 .k(16)
9820 .qmin(128)
9821 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9822 }
9823
9824 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, qmax) {
9825 TEST_REQUIRES_ARM_NEON;
9826 GemmMicrokernelTester()
9827 .mr(4)
9828 .nr(16)
9829 .kr(4)
9830 .sr(2)
9831 .m(4)
9832 .n(16)
9833 .k(16)
9834 .qmax(128)
9835 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9836 }
9837
9838 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4S2__NEON_MLAL, strided_cm) {
9839 TEST_REQUIRES_ARM_NEON;
9840 GemmMicrokernelTester()
9841 .mr(4)
9842 .nr(16)
9843 .kr(4)
9844 .sr(2)
9845 .m(4)
9846 .n(16)
9847 .k(16)
9848 .cm_stride(19)
9849 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4s2__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9850 }
9851#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
9852
9853
9854#if XNN_ARCH_ARM || XNN_ARCH_ARM64
9855 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_eq_8) {
9856 TEST_REQUIRES_ARM_NEON;
9857 GemmMicrokernelTester()
9858 .mr(1)
9859 .nr(8)
9860 .kr(2)
9861 .sr(4)
9862 .m(1)
9863 .n(8)
9864 .k(8)
9865 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9866 }
9867
9868 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, strided_cn) {
9869 TEST_REQUIRES_ARM_NEON;
9870 GemmMicrokernelTester()
9871 .mr(1)
9872 .nr(8)
9873 .kr(2)
9874 .sr(4)
9875 .m(1)
9876 .n(8)
9877 .k(8)
9878 .cn_stride(11)
9879 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
9880 }
9881
9882 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_eq_8_subtile) {
9883 TEST_REQUIRES_ARM_NEON;
9884 for (uint32_t n = 1; n <= 8; n++) {
9885 for (uint32_t m = 1; m <= 1; m++) {
9886 GemmMicrokernelTester()
9887 .mr(1)
9888 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009889 .kr(2)
9890 .sr(4)
9891 .m(m)
9892 .n(n)
9893 .k(8)
9894 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009895 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009896 }
9897 }
9898 }
9899
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009900 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_eq_8_subtile_m) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009901 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009902 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009903 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009904 .mr(1)
9905 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009906 .kr(2)
9907 .sr(4)
9908 .m(m)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009909 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009910 .k(8)
9911 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009912 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009913 }
9914 }
9915
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009916 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_eq_8_subtile_n) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009917 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009918 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009919 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009920 .mr(1)
9921 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009922 .kr(2)
9923 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009924 .m(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009925 .n(n)
9926 .k(8)
9927 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009928 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009929 }
9930 }
9931
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009932 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_lt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009933 TEST_REQUIRES_ARM_NEON;
9934 for (size_t k = 1; k < 8; k++) {
9935 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009936 .mr(1)
9937 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009938 .kr(2)
9939 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009940 .m(1)
9941 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009942 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009943 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009944 }
9945 }
9946
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009947 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_lt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009948 TEST_REQUIRES_ARM_NEON;
9949 for (size_t k = 1; k < 8; k++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009950 for (uint32_t n = 1; n <= 8; n++) {
9951 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009952 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009953 .mr(1)
9954 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009955 .kr(2)
9956 .sr(4)
9957 .m(m)
9958 .n(n)
9959 .k(k)
9960 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009961 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009962 }
9963 }
9964 }
9965 }
9966
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009967 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_gt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009968 TEST_REQUIRES_ARM_NEON;
9969 for (size_t k = 9; k < 16; k++) {
9970 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009971 .mr(1)
9972 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009973 .kr(2)
9974 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009975 .m(1)
9976 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009977 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009978 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009979 }
9980 }
9981
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009982 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_gt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009983 TEST_REQUIRES_ARM_NEON;
9984 for (size_t k = 9; k < 16; k++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009985 for (uint32_t n = 1; n <= 8; n++) {
9986 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009987 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009988 .mr(1)
9989 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009990 .kr(2)
9991 .sr(4)
9992 .m(m)
9993 .n(n)
9994 .k(k)
9995 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -08009996 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -08009997 }
9998 }
9999 }
10000 }
10001
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010002 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_div_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010003 TEST_REQUIRES_ARM_NEON;
10004 for (size_t k = 16; k <= 80; k += 8) {
10005 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010006 .mr(1)
10007 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010008 .kr(2)
10009 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010010 .m(1)
10011 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010012 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010013 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010014 }
10015 }
10016
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010017 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, k_div_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010018 TEST_REQUIRES_ARM_NEON;
10019 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010020 for (uint32_t n = 1; n <= 8; n++) {
10021 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010022 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010023 .mr(1)
10024 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010025 .kr(2)
10026 .sr(4)
10027 .m(m)
10028 .n(n)
10029 .k(k)
10030 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010031 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010032 }
10033 }
10034 }
10035 }
10036
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010037 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, n_gt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010038 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010039 for (uint32_t n = 9; n < 16; n++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010040 for (size_t k = 1; k <= 40; k += 9) {
10041 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010042 .mr(1)
10043 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010044 .kr(2)
10045 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010046 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010047 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010048 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010049 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010050 }
10051 }
10052 }
10053
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010054 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, n_gt_8_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010055 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010056 for (uint32_t n = 9; n < 16; n++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010057 for (size_t k = 1; k <= 40; k += 9) {
10058 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010059 .mr(1)
10060 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010061 .kr(2)
10062 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010063 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010064 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010065 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010066 .cn_stride(11)
10067 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010068 }
10069 }
10070 }
10071
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010072 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, n_gt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010073 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010074 for (uint32_t n = 9; n < 16; n++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010075 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010076 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010077 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010078 .mr(1)
10079 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010080 .kr(2)
10081 .sr(4)
10082 .m(m)
10083 .n(n)
10084 .k(k)
10085 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010086 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010087 }
10088 }
10089 }
10090 }
10091
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010092 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, n_div_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010093 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010094 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010095 for (size_t k = 1; k <= 40; k += 9) {
10096 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010097 .mr(1)
10098 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010099 .kr(2)
10100 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010101 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010102 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010103 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010104 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010105 }
10106 }
10107 }
10108
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010109 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, n_div_8_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010110 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010111 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010112 for (size_t k = 1; k <= 40; k += 9) {
10113 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010114 .mr(1)
10115 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010116 .kr(2)
10117 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010118 .m(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010119 .n(n)
10120 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010121 .cn_stride(11)
10122 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010123 }
10124 }
10125 }
10126
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010127 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, n_div_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010128 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010129 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010130 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010131 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010132 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010133 .mr(1)
10134 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010135 .kr(2)
10136 .sr(4)
10137 .m(m)
10138 .n(n)
10139 .k(k)
10140 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010141 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010142 }
10143 }
10144 }
10145 }
10146
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010147 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010148 TEST_REQUIRES_ARM_NEON;
10149 for (size_t k = 1; k <= 40; k += 9) {
10150 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010151 .mr(1)
10152 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010153 .kr(2)
10154 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010155 .m(1)
10156 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010157 .k(k)
10158 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010159 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010160 }
10161 }
10162
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010163 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, small_kernel_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010164 TEST_REQUIRES_ARM_NEON;
10165 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010166 for (uint32_t n = 1; n <= 8; n++) {
10167 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010168 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010169 .mr(1)
10170 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010171 .kr(2)
10172 .sr(4)
10173 .m(m)
10174 .n(n)
10175 .k(k)
10176 .ks(3)
10177 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010178 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010179 }
10180 }
10181 }
10182 }
10183
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010184 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, n_gt_8_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010185 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010186 for (uint32_t n = 9; n < 16; n++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010187 for (size_t k = 1; k <= 40; k += 9) {
10188 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010189 .mr(1)
10190 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010191 .kr(2)
10192 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010193 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010194 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010195 .k(k)
10196 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010197 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010198 }
10199 }
10200 }
10201
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010202 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, n_div_8_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010203 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010204 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010205 for (size_t k = 1; k <= 40; k += 9) {
10206 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010207 .mr(1)
10208 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010209 .kr(2)
10210 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010211 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010212 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010213 .k(k)
10214 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010215 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010216 }
10217 }
10218 }
10219
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010220 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, strided_cm_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010221 TEST_REQUIRES_ARM_NEON;
10222 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010223 for (uint32_t n = 1; n <= 8; n++) {
10224 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010225 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010226 .mr(1)
10227 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010228 .kr(2)
10229 .sr(4)
10230 .m(m)
10231 .n(n)
10232 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010233 .cm_stride(11)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010234 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010235 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010236 }
10237 }
10238 }
10239 }
10240
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010241 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, a_offset) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010242 TEST_REQUIRES_ARM_NEON;
10243 for (size_t k = 1; k <= 40; k += 9) {
10244 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010245 .mr(1)
10246 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010247 .kr(2)
10248 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010249 .m(1)
10250 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010251 .k(k)
10252 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010253 .a_offset(43)
10254 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010255 }
10256 }
10257
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010258 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, zero) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010259 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080010260 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010261 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010262 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010263 .mr(1)
10264 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010265 .kr(2)
10266 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010267 .m(1)
10268 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010269 .k(k)
10270 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010271 .a_offset(43)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010272 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010273 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010274 }
10275 }
10276 }
10277
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010278 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, qmin) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010279 TEST_REQUIRES_ARM_NEON;
10280 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010281 .mr(1)
10282 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010283 .kr(2)
10284 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010285 .m(1)
10286 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010287 .k(8)
10288 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010289 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010290 }
10291
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010292 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, qmax) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010293 TEST_REQUIRES_ARM_NEON;
10294 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010295 .mr(1)
10296 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010297 .kr(2)
10298 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010299 .m(1)
10300 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010301 .k(8)
10302 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010303 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010304 }
10305
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010306 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C2S4__NEON_MULL, strided_cm) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010307 TEST_REQUIRES_ARM_NEON;
10308 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010309 .mr(1)
10310 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010311 .kr(2)
10312 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010313 .m(1)
10314 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010315 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080010316 .cm_stride(11)
10317 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080010318 }
10319#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
10320
10321
10322#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010323 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_eq_8) {
10324 TEST_REQUIRES_ARM_NEON;
10325 GemmMicrokernelTester()
10326 .mr(4)
10327 .nr(16)
10328 .kr(2)
10329 .sr(4)
10330 .m(4)
10331 .n(16)
10332 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080010333 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010334 }
10335
10336 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, strided_cn) {
10337 TEST_REQUIRES_ARM_NEON;
10338 GemmMicrokernelTester()
10339 .mr(4)
10340 .nr(16)
10341 .kr(2)
10342 .sr(4)
10343 .m(4)
10344 .n(16)
10345 .k(8)
10346 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080010347 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010348 }
10349
10350 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_eq_8_subtile) {
10351 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080010352 for (uint32_t n = 1; n <= 16; n++) {
10353 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010354 GemmMicrokernelTester()
10355 .mr(4)
10356 .nr(16)
10357 .kr(2)
10358 .sr(4)
10359 .m(m)
10360 .n(n)
10361 .k(8)
10362 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010363 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010364 }
10365 }
10366 }
10367
10368 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_eq_8_subtile_m) {
10369 TEST_REQUIRES_ARM_NEON;
10370 for (uint32_t m = 1; m <= 4; m++) {
10371 GemmMicrokernelTester()
10372 .mr(4)
10373 .nr(16)
10374 .kr(2)
10375 .sr(4)
10376 .m(m)
10377 .n(16)
10378 .k(8)
10379 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010380 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010381 }
10382 }
10383
10384 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_eq_8_subtile_n) {
10385 TEST_REQUIRES_ARM_NEON;
10386 for (uint32_t n = 1; n <= 16; n++) {
10387 GemmMicrokernelTester()
10388 .mr(4)
10389 .nr(16)
10390 .kr(2)
10391 .sr(4)
10392 .m(4)
10393 .n(n)
10394 .k(8)
10395 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010396 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010397 }
10398 }
10399
10400 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_lt_8) {
10401 TEST_REQUIRES_ARM_NEON;
10402 for (size_t k = 1; k < 8; k++) {
10403 GemmMicrokernelTester()
10404 .mr(4)
10405 .nr(16)
10406 .kr(2)
10407 .sr(4)
10408 .m(4)
10409 .n(16)
10410 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010411 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010412 }
10413 }
10414
10415 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_lt_8_subtile) {
10416 TEST_REQUIRES_ARM_NEON;
10417 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080010418 for (uint32_t n = 1; n <= 16; n++) {
10419 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010420 GemmMicrokernelTester()
10421 .mr(4)
10422 .nr(16)
10423 .kr(2)
10424 .sr(4)
10425 .m(m)
10426 .n(n)
10427 .k(k)
10428 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010429 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010430 }
10431 }
10432 }
10433 }
10434
10435 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_gt_8) {
10436 TEST_REQUIRES_ARM_NEON;
10437 for (size_t k = 9; k < 16; k++) {
10438 GemmMicrokernelTester()
10439 .mr(4)
10440 .nr(16)
10441 .kr(2)
10442 .sr(4)
10443 .m(4)
10444 .n(16)
10445 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010446 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010447 }
10448 }
10449
10450 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_gt_8_subtile) {
10451 TEST_REQUIRES_ARM_NEON;
10452 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080010453 for (uint32_t n = 1; n <= 16; n++) {
10454 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010455 GemmMicrokernelTester()
10456 .mr(4)
10457 .nr(16)
10458 .kr(2)
10459 .sr(4)
10460 .m(m)
10461 .n(n)
10462 .k(k)
10463 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010464 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010465 }
10466 }
10467 }
10468 }
10469
10470 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_div_8) {
10471 TEST_REQUIRES_ARM_NEON;
10472 for (size_t k = 16; k <= 80; k += 8) {
10473 GemmMicrokernelTester()
10474 .mr(4)
10475 .nr(16)
10476 .kr(2)
10477 .sr(4)
10478 .m(4)
10479 .n(16)
10480 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010481 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010482 }
10483 }
10484
10485 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, k_div_8_subtile) {
10486 TEST_REQUIRES_ARM_NEON;
10487 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080010488 for (uint32_t n = 1; n <= 16; n++) {
10489 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010490 GemmMicrokernelTester()
10491 .mr(4)
10492 .nr(16)
10493 .kr(2)
10494 .sr(4)
10495 .m(m)
10496 .n(n)
10497 .k(k)
10498 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010499 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010500 }
10501 }
10502 }
10503 }
10504
10505 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, n_gt_16) {
10506 TEST_REQUIRES_ARM_NEON;
10507 for (uint32_t n = 17; n < 32; n++) {
10508 for (size_t k = 1; k <= 40; k += 9) {
10509 GemmMicrokernelTester()
10510 .mr(4)
10511 .nr(16)
10512 .kr(2)
10513 .sr(4)
10514 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010515 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010516 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010517 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010518 }
10519 }
10520 }
10521
10522 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, n_gt_16_strided_cn) {
10523 TEST_REQUIRES_ARM_NEON;
10524 for (uint32_t n = 17; n < 32; n++) {
10525 for (size_t k = 1; k <= 40; k += 9) {
10526 GemmMicrokernelTester()
10527 .mr(4)
10528 .nr(16)
10529 .kr(2)
10530 .sr(4)
10531 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010532 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010533 .k(k)
10534 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080010535 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010536 }
10537 }
10538 }
10539
10540 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, n_gt_16_subtile) {
10541 TEST_REQUIRES_ARM_NEON;
10542 for (uint32_t n = 17; n < 32; n++) {
10543 for (size_t k = 1; k <= 40; k += 9) {
10544 for (uint32_t m = 1; m <= 4; m++) {
10545 GemmMicrokernelTester()
10546 .mr(4)
10547 .nr(16)
10548 .kr(2)
10549 .sr(4)
10550 .m(m)
10551 .n(n)
10552 .k(k)
10553 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010554 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010555 }
10556 }
10557 }
10558 }
10559
10560 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, n_div_16) {
10561 TEST_REQUIRES_ARM_NEON;
10562 for (uint32_t n = 32; n <= 48; n += 16) {
10563 for (size_t k = 1; k <= 40; k += 9) {
10564 GemmMicrokernelTester()
10565 .mr(4)
10566 .nr(16)
10567 .kr(2)
10568 .sr(4)
10569 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010570 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010571 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010572 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010573 }
10574 }
10575 }
10576
10577 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, n_div_16_strided_cn) {
10578 TEST_REQUIRES_ARM_NEON;
10579 for (uint32_t n = 32; n <= 48; n += 16) {
10580 for (size_t k = 1; k <= 40; k += 9) {
10581 GemmMicrokernelTester()
10582 .mr(4)
10583 .nr(16)
10584 .kr(2)
10585 .sr(4)
10586 .m(4)
10587 .n(n)
10588 .k(k)
10589 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080010590 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010591 }
10592 }
10593 }
10594
10595 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, n_div_16_subtile) {
10596 TEST_REQUIRES_ARM_NEON;
10597 for (uint32_t n = 32; n <= 48; n += 16) {
10598 for (size_t k = 1; k <= 40; k += 9) {
10599 for (uint32_t m = 1; m <= 4; m++) {
10600 GemmMicrokernelTester()
10601 .mr(4)
10602 .nr(16)
10603 .kr(2)
10604 .sr(4)
10605 .m(m)
10606 .n(n)
10607 .k(k)
10608 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010609 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010610 }
10611 }
10612 }
10613 }
10614
10615 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, small_kernel) {
10616 TEST_REQUIRES_ARM_NEON;
10617 for (size_t k = 1; k <= 40; k += 9) {
10618 GemmMicrokernelTester()
10619 .mr(4)
10620 .nr(16)
10621 .kr(2)
10622 .sr(4)
10623 .m(4)
10624 .n(16)
10625 .k(k)
10626 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080010627 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010628 }
10629 }
10630
10631 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, small_kernel_subtile) {
10632 TEST_REQUIRES_ARM_NEON;
10633 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080010634 for (uint32_t n = 1; n <= 16; n++) {
10635 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010636 GemmMicrokernelTester()
10637 .mr(4)
10638 .nr(16)
10639 .kr(2)
10640 .sr(4)
10641 .m(m)
10642 .n(n)
10643 .k(k)
10644 .ks(3)
10645 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010646 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010647 }
10648 }
10649 }
10650 }
10651
10652 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, n_gt_16_small_kernel) {
10653 TEST_REQUIRES_ARM_NEON;
10654 for (uint32_t n = 17; n < 32; n++) {
10655 for (size_t k = 1; k <= 40; k += 9) {
10656 GemmMicrokernelTester()
10657 .mr(4)
10658 .nr(16)
10659 .kr(2)
10660 .sr(4)
10661 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010662 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010663 .k(k)
10664 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080010665 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010666 }
10667 }
10668 }
10669
10670 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, n_div_16_small_kernel) {
10671 TEST_REQUIRES_ARM_NEON;
10672 for (uint32_t n = 32; n <= 48; n += 16) {
10673 for (size_t k = 1; k <= 40; k += 9) {
10674 GemmMicrokernelTester()
10675 .mr(4)
10676 .nr(16)
10677 .kr(2)
10678 .sr(4)
10679 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010680 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010681 .k(k)
10682 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080010683 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010684 }
10685 }
10686 }
10687
10688 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, strided_cm_subtile) {
10689 TEST_REQUIRES_ARM_NEON;
10690 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080010691 for (uint32_t n = 1; n <= 16; n++) {
10692 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010693 GemmMicrokernelTester()
10694 .mr(4)
10695 .nr(16)
10696 .kr(2)
10697 .sr(4)
10698 .m(m)
10699 .n(n)
10700 .k(k)
10701 .cm_stride(19)
10702 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010703 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010704 }
10705 }
10706 }
10707 }
10708
10709 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, a_offset) {
10710 TEST_REQUIRES_ARM_NEON;
10711 for (size_t k = 1; k <= 40; k += 9) {
10712 GemmMicrokernelTester()
10713 .mr(4)
10714 .nr(16)
10715 .kr(2)
10716 .sr(4)
10717 .m(4)
10718 .n(16)
10719 .k(k)
10720 .ks(3)
10721 .a_offset(163)
Marat Dukhan50323b82022-01-11 00:12:01 -080010722 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010723 }
10724 }
10725
10726 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, zero) {
10727 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080010728 for (size_t k = 1; k <= 40; k += 9) {
10729 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010730 GemmMicrokernelTester()
10731 .mr(4)
10732 .nr(16)
10733 .kr(2)
10734 .sr(4)
10735 .m(4)
10736 .n(16)
10737 .k(k)
10738 .ks(3)
10739 .a_offset(163)
10740 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080010741 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010742 }
10743 }
10744 }
10745
10746 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, qmin) {
10747 TEST_REQUIRES_ARM_NEON;
10748 GemmMicrokernelTester()
10749 .mr(4)
10750 .nr(16)
10751 .kr(2)
10752 .sr(4)
10753 .m(4)
10754 .n(16)
10755 .k(8)
10756 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080010757 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010758 }
10759
10760 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, qmax) {
10761 TEST_REQUIRES_ARM_NEON;
10762 GemmMicrokernelTester()
10763 .mr(4)
10764 .nr(16)
10765 .kr(2)
10766 .sr(4)
10767 .m(4)
10768 .n(16)
10769 .k(8)
10770 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080010771 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010772 }
10773
10774 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2S4__NEON_MULL, strided_cm) {
10775 TEST_REQUIRES_ARM_NEON;
10776 GemmMicrokernelTester()
10777 .mr(4)
10778 .nr(16)
10779 .kr(2)
10780 .sr(4)
10781 .m(4)
10782 .n(16)
10783 .k(8)
10784 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080010785 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2s4__neon_mull, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010786 }
10787#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
10788
10789
10790#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010791 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_eq_16) {
10792 TEST_REQUIRES_ARM_NEON;
10793 GemmMicrokernelTester()
10794 .mr(2)
10795 .nr(8)
10796 .kr(2)
10797 .sr(4)
10798 .m(2)
10799 .n(8)
10800 .k(16)
Marat Dukhan50323b82022-01-11 00:12:01 -080010801 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010802 }
10803
10804 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, strided_cn) {
10805 TEST_REQUIRES_ARM_NEON;
10806 GemmMicrokernelTester()
10807 .mr(2)
10808 .nr(8)
10809 .kr(2)
10810 .sr(4)
10811 .m(2)
10812 .n(8)
10813 .k(16)
10814 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080010815 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010816 }
10817
10818 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_eq_16_subtile) {
10819 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080010820 for (uint32_t n = 1; n <= 8; n++) {
10821 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010822 GemmMicrokernelTester()
10823 .mr(2)
10824 .nr(8)
10825 .kr(2)
10826 .sr(4)
10827 .m(m)
10828 .n(n)
10829 .k(16)
10830 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010831 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010832 }
10833 }
10834 }
10835
10836 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_eq_16_subtile_m) {
10837 TEST_REQUIRES_ARM_NEON;
10838 for (uint32_t m = 1; m <= 2; m++) {
10839 GemmMicrokernelTester()
10840 .mr(2)
10841 .nr(8)
10842 .kr(2)
10843 .sr(4)
10844 .m(m)
10845 .n(8)
10846 .k(16)
10847 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010848 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010849 }
10850 }
10851
10852 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_eq_16_subtile_n) {
10853 TEST_REQUIRES_ARM_NEON;
10854 for (uint32_t n = 1; n <= 8; n++) {
10855 GemmMicrokernelTester()
10856 .mr(2)
10857 .nr(8)
10858 .kr(2)
10859 .sr(4)
10860 .m(2)
10861 .n(n)
10862 .k(16)
10863 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010864 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010865 }
10866 }
10867
10868 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_lt_16) {
10869 TEST_REQUIRES_ARM_NEON;
10870 for (size_t k = 1; k < 16; k++) {
10871 GemmMicrokernelTester()
10872 .mr(2)
10873 .nr(8)
10874 .kr(2)
10875 .sr(4)
10876 .m(2)
10877 .n(8)
10878 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010879 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010880 }
10881 }
10882
10883 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_lt_16_subtile) {
10884 TEST_REQUIRES_ARM_NEON;
10885 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080010886 for (uint32_t n = 1; n <= 8; n++) {
10887 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010888 GemmMicrokernelTester()
10889 .mr(2)
10890 .nr(8)
10891 .kr(2)
10892 .sr(4)
10893 .m(m)
10894 .n(n)
10895 .k(k)
10896 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010897 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010898 }
10899 }
10900 }
10901 }
10902
10903 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_gt_16) {
10904 TEST_REQUIRES_ARM_NEON;
10905 for (size_t k = 17; k < 32; k++) {
10906 GemmMicrokernelTester()
10907 .mr(2)
10908 .nr(8)
10909 .kr(2)
10910 .sr(4)
10911 .m(2)
10912 .n(8)
10913 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010914 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010915 }
10916 }
10917
10918 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_gt_16_subtile) {
10919 TEST_REQUIRES_ARM_NEON;
10920 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080010921 for (uint32_t n = 1; n <= 8; n++) {
10922 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010923 GemmMicrokernelTester()
10924 .mr(2)
10925 .nr(8)
10926 .kr(2)
10927 .sr(4)
10928 .m(m)
10929 .n(n)
10930 .k(k)
10931 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010932 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010933 }
10934 }
10935 }
10936 }
10937
10938 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_div_16) {
10939 TEST_REQUIRES_ARM_NEON;
10940 for (size_t k = 32; k <= 160; k += 16) {
10941 GemmMicrokernelTester()
10942 .mr(2)
10943 .nr(8)
10944 .kr(2)
10945 .sr(4)
10946 .m(2)
10947 .n(8)
10948 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010949 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010950 }
10951 }
10952
10953 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, k_div_16_subtile) {
10954 TEST_REQUIRES_ARM_NEON;
10955 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080010956 for (uint32_t n = 1; n <= 8; n++) {
10957 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010958 GemmMicrokernelTester()
10959 .mr(2)
10960 .nr(8)
10961 .kr(2)
10962 .sr(4)
10963 .m(m)
10964 .n(n)
10965 .k(k)
10966 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080010967 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010968 }
10969 }
10970 }
10971 }
10972
10973 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, n_gt_8) {
10974 TEST_REQUIRES_ARM_NEON;
10975 for (uint32_t n = 9; n < 16; n++) {
10976 for (size_t k = 1; k <= 80; k += 17) {
10977 GemmMicrokernelTester()
10978 .mr(2)
10979 .nr(8)
10980 .kr(2)
10981 .sr(4)
10982 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080010983 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010984 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080010985 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080010986 }
10987 }
10988 }
10989
10990 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, n_gt_8_strided_cn) {
10991 TEST_REQUIRES_ARM_NEON;
10992 for (uint32_t n = 9; n < 16; n++) {
10993 for (size_t k = 1; k <= 80; k += 17) {
10994 GemmMicrokernelTester()
10995 .mr(2)
10996 .nr(8)
10997 .kr(2)
10998 .sr(4)
10999 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011000 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011001 .k(k)
11002 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080011003 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011004 }
11005 }
11006 }
11007
11008 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, n_gt_8_subtile) {
11009 TEST_REQUIRES_ARM_NEON;
11010 for (uint32_t n = 9; n < 16; n++) {
11011 for (size_t k = 1; k <= 80; k += 17) {
11012 for (uint32_t m = 1; m <= 2; m++) {
11013 GemmMicrokernelTester()
11014 .mr(2)
11015 .nr(8)
11016 .kr(2)
11017 .sr(4)
11018 .m(m)
11019 .n(n)
11020 .k(k)
11021 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080011022 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011023 }
11024 }
11025 }
11026 }
11027
11028 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, n_div_8) {
11029 TEST_REQUIRES_ARM_NEON;
11030 for (uint32_t n = 16; n <= 24; n += 8) {
11031 for (size_t k = 1; k <= 80; k += 17) {
11032 GemmMicrokernelTester()
11033 .mr(2)
11034 .nr(8)
11035 .kr(2)
11036 .sr(4)
11037 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011038 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011039 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080011040 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011041 }
11042 }
11043 }
11044
11045 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, n_div_8_strided_cn) {
11046 TEST_REQUIRES_ARM_NEON;
11047 for (uint32_t n = 16; n <= 24; n += 8) {
11048 for (size_t k = 1; k <= 80; k += 17) {
11049 GemmMicrokernelTester()
11050 .mr(2)
11051 .nr(8)
11052 .kr(2)
11053 .sr(4)
11054 .m(2)
11055 .n(n)
11056 .k(k)
11057 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080011058 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011059 }
11060 }
11061 }
11062
11063 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, n_div_8_subtile) {
11064 TEST_REQUIRES_ARM_NEON;
11065 for (uint32_t n = 16; n <= 24; n += 8) {
11066 for (size_t k = 1; k <= 80; k += 17) {
11067 for (uint32_t m = 1; m <= 2; m++) {
11068 GemmMicrokernelTester()
11069 .mr(2)
11070 .nr(8)
11071 .kr(2)
11072 .sr(4)
11073 .m(m)
11074 .n(n)
11075 .k(k)
11076 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080011077 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011078 }
11079 }
11080 }
11081 }
11082
11083 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, small_kernel) {
11084 TEST_REQUIRES_ARM_NEON;
11085 for (size_t k = 1; k <= 80; k += 17) {
11086 GemmMicrokernelTester()
11087 .mr(2)
11088 .nr(8)
11089 .kr(2)
11090 .sr(4)
11091 .m(2)
11092 .n(8)
11093 .k(k)
11094 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080011095 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011096 }
11097 }
11098
11099 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, small_kernel_subtile) {
11100 TEST_REQUIRES_ARM_NEON;
11101 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080011102 for (uint32_t n = 1; n <= 8; n++) {
11103 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011104 GemmMicrokernelTester()
11105 .mr(2)
11106 .nr(8)
11107 .kr(2)
11108 .sr(4)
11109 .m(m)
11110 .n(n)
11111 .k(k)
11112 .ks(3)
11113 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080011114 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011115 }
11116 }
11117 }
11118 }
11119
11120 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, n_gt_8_small_kernel) {
11121 TEST_REQUIRES_ARM_NEON;
11122 for (uint32_t n = 9; n < 16; n++) {
11123 for (size_t k = 1; k <= 80; k += 17) {
11124 GemmMicrokernelTester()
11125 .mr(2)
11126 .nr(8)
11127 .kr(2)
11128 .sr(4)
11129 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011130 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011131 .k(k)
11132 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080011133 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011134 }
11135 }
11136 }
11137
11138 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, n_div_8_small_kernel) {
11139 TEST_REQUIRES_ARM_NEON;
11140 for (uint32_t n = 16; n <= 24; n += 8) {
11141 for (size_t k = 1; k <= 80; k += 17) {
11142 GemmMicrokernelTester()
11143 .mr(2)
11144 .nr(8)
11145 .kr(2)
11146 .sr(4)
11147 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011148 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011149 .k(k)
11150 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080011151 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011152 }
11153 }
11154 }
11155
11156 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, strided_cm_subtile) {
11157 TEST_REQUIRES_ARM_NEON;
11158 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080011159 for (uint32_t n = 1; n <= 8; n++) {
11160 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011161 GemmMicrokernelTester()
11162 .mr(2)
11163 .nr(8)
11164 .kr(2)
11165 .sr(4)
11166 .m(m)
11167 .n(n)
11168 .k(k)
11169 .cm_stride(11)
11170 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080011171 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011172 }
11173 }
11174 }
11175 }
11176
11177 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, a_offset) {
11178 TEST_REQUIRES_ARM_NEON;
11179 for (size_t k = 1; k <= 80; k += 17) {
11180 GemmMicrokernelTester()
11181 .mr(2)
11182 .nr(8)
11183 .kr(2)
11184 .sr(4)
11185 .m(2)
11186 .n(8)
11187 .k(k)
11188 .ks(3)
11189 .a_offset(163)
Marat Dukhan50323b82022-01-11 00:12:01 -080011190 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011191 }
11192 }
11193
11194 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, zero) {
11195 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080011196 for (size_t k = 1; k <= 80; k += 17) {
11197 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011198 GemmMicrokernelTester()
11199 .mr(2)
11200 .nr(8)
11201 .kr(2)
11202 .sr(4)
11203 .m(2)
11204 .n(8)
11205 .k(k)
11206 .ks(3)
11207 .a_offset(163)
11208 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080011209 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011210 }
11211 }
11212 }
11213
11214 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, qmin) {
11215 TEST_REQUIRES_ARM_NEON;
11216 GemmMicrokernelTester()
11217 .mr(2)
11218 .nr(8)
11219 .kr(2)
11220 .sr(4)
11221 .m(2)
11222 .n(8)
11223 .k(16)
11224 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080011225 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011226 }
11227
11228 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, qmax) {
11229 TEST_REQUIRES_ARM_NEON;
11230 GemmMicrokernelTester()
11231 .mr(2)
11232 .nr(8)
11233 .kr(2)
11234 .sr(4)
11235 .m(2)
11236 .n(8)
11237 .k(16)
11238 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080011239 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011240 }
11241
11242 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2S4__NEON_MLAL, strided_cm) {
11243 TEST_REQUIRES_ARM_NEON;
11244 GemmMicrokernelTester()
11245 .mr(2)
11246 .nr(8)
11247 .kr(2)
11248 .sr(4)
11249 .m(2)
11250 .n(8)
11251 .k(16)
11252 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080011253 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011254 }
11255#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
11256
11257
11258#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011259 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011260 TEST_REQUIRES_ARM_NEON;
11261 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011262 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011263 .nr(16)
11264 .kr(2)
11265 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011266 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011267 .n(16)
11268 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011269 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011270 }
11271
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011272 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011273 TEST_REQUIRES_ARM_NEON;
11274 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011275 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011276 .nr(16)
11277 .kr(2)
11278 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011279 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011280 .n(16)
11281 .k(16)
11282 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011283 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011284 }
11285
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011286 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_eq_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011287 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080011288 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011289 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011290 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011291 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011292 .nr(16)
11293 .kr(2)
11294 .sr(4)
11295 .m(m)
11296 .n(n)
11297 .k(16)
11298 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011299 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011300 }
11301 }
11302 }
11303
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011304 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011305 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011306 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011307 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011308 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011309 .nr(16)
11310 .kr(2)
11311 .sr(4)
11312 .m(m)
11313 .n(16)
11314 .k(16)
11315 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011316 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011317 }
11318 }
11319
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011320 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011321 TEST_REQUIRES_ARM_NEON;
11322 for (uint32_t n = 1; n <= 16; n++) {
11323 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011324 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011325 .nr(16)
11326 .kr(2)
11327 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011328 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011329 .n(n)
11330 .k(16)
11331 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011332 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011333 }
11334 }
11335
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011336 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011337 TEST_REQUIRES_ARM_NEON;
11338 for (size_t k = 1; k < 16; k++) {
11339 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011340 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011341 .nr(16)
11342 .kr(2)
11343 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011344 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011345 .n(16)
11346 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011347 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011348 }
11349 }
11350
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011351 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011352 TEST_REQUIRES_ARM_NEON;
11353 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080011354 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011355 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011356 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011357 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011358 .nr(16)
11359 .kr(2)
11360 .sr(4)
11361 .m(m)
11362 .n(n)
11363 .k(k)
11364 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011365 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011366 }
11367 }
11368 }
11369 }
11370
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011371 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011372 TEST_REQUIRES_ARM_NEON;
11373 for (size_t k = 17; k < 32; k++) {
11374 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011375 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011376 .nr(16)
11377 .kr(2)
11378 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011379 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011380 .n(16)
11381 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011382 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011383 }
11384 }
11385
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011386 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011387 TEST_REQUIRES_ARM_NEON;
11388 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080011389 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011390 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011391 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011392 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011393 .nr(16)
11394 .kr(2)
11395 .sr(4)
11396 .m(m)
11397 .n(n)
11398 .k(k)
11399 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011400 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011401 }
11402 }
11403 }
11404 }
11405
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011406 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011407 TEST_REQUIRES_ARM_NEON;
11408 for (size_t k = 32; k <= 160; k += 16) {
11409 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011410 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011411 .nr(16)
11412 .kr(2)
11413 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011414 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011415 .n(16)
11416 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011417 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011418 }
11419 }
11420
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011421 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011422 TEST_REQUIRES_ARM_NEON;
11423 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080011424 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011425 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011426 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011427 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011428 .nr(16)
11429 .kr(2)
11430 .sr(4)
11431 .m(m)
11432 .n(n)
11433 .k(k)
11434 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011435 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011436 }
11437 }
11438 }
11439 }
11440
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011441 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, n_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011442 TEST_REQUIRES_ARM_NEON;
11443 for (uint32_t n = 17; n < 32; n++) {
11444 for (size_t k = 1; k <= 80; k += 17) {
11445 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011446 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011447 .nr(16)
11448 .kr(2)
11449 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011450 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011451 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011452 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011453 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011454 }
11455 }
11456 }
11457
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011458 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, n_gt_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011459 TEST_REQUIRES_ARM_NEON;
11460 for (uint32_t n = 17; n < 32; n++) {
11461 for (size_t k = 1; k <= 80; k += 17) {
11462 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011463 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011464 .nr(16)
11465 .kr(2)
11466 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011467 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011468 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011469 .k(k)
11470 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011471 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011472 }
11473 }
11474 }
11475
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011476 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, n_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011477 TEST_REQUIRES_ARM_NEON;
11478 for (uint32_t n = 17; n < 32; n++) {
11479 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011480 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011481 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011482 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011483 .nr(16)
11484 .kr(2)
11485 .sr(4)
11486 .m(m)
11487 .n(n)
11488 .k(k)
11489 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011490 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011491 }
11492 }
11493 }
11494 }
11495
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011496 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, n_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011497 TEST_REQUIRES_ARM_NEON;
11498 for (uint32_t n = 32; n <= 48; n += 16) {
11499 for (size_t k = 1; k <= 80; k += 17) {
11500 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011501 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011502 .nr(16)
11503 .kr(2)
11504 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011505 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011506 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011507 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011508 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011509 }
11510 }
11511 }
11512
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011513 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, n_div_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011514 TEST_REQUIRES_ARM_NEON;
11515 for (uint32_t n = 32; n <= 48; n += 16) {
11516 for (size_t k = 1; k <= 80; k += 17) {
11517 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011518 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011519 .nr(16)
11520 .kr(2)
11521 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011522 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011523 .n(n)
11524 .k(k)
11525 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011526 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011527 }
11528 }
11529 }
11530
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011531 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, n_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011532 TEST_REQUIRES_ARM_NEON;
11533 for (uint32_t n = 32; n <= 48; n += 16) {
11534 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011535 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011536 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011537 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011538 .nr(16)
11539 .kr(2)
11540 .sr(4)
11541 .m(m)
11542 .n(n)
11543 .k(k)
11544 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011545 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011546 }
11547 }
11548 }
11549 }
11550
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011551 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011552 TEST_REQUIRES_ARM_NEON;
11553 for (size_t k = 1; k <= 80; k += 17) {
11554 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011555 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011556 .nr(16)
11557 .kr(2)
11558 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011559 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011560 .n(16)
11561 .k(k)
11562 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011563 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011564 }
11565 }
11566
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011567 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011568 TEST_REQUIRES_ARM_NEON;
11569 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080011570 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011571 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011572 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011573 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011574 .nr(16)
11575 .kr(2)
11576 .sr(4)
11577 .m(m)
11578 .n(n)
11579 .k(k)
11580 .ks(3)
11581 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011582 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011583 }
11584 }
11585 }
11586 }
11587
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011588 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, n_gt_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011589 TEST_REQUIRES_ARM_NEON;
11590 for (uint32_t n = 17; n < 32; n++) {
11591 for (size_t k = 1; k <= 80; k += 17) {
11592 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011593 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011594 .nr(16)
11595 .kr(2)
11596 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011597 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011598 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011599 .k(k)
11600 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011601 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011602 }
11603 }
11604 }
11605
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011606 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, n_div_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011607 TEST_REQUIRES_ARM_NEON;
11608 for (uint32_t n = 32; n <= 48; n += 16) {
11609 for (size_t k = 1; k <= 80; k += 17) {
11610 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011611 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011612 .nr(16)
11613 .kr(2)
11614 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011615 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080011616 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011617 .k(k)
11618 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011619 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011620 }
11621 }
11622 }
11623
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011624 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011625 TEST_REQUIRES_ARM_NEON;
11626 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080011627 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011628 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011629 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011630 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011631 .nr(16)
11632 .kr(2)
11633 .sr(4)
11634 .m(m)
11635 .n(n)
11636 .k(k)
11637 .cm_stride(19)
11638 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011639 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011640 }
11641 }
11642 }
11643 }
11644
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011645 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011646 TEST_REQUIRES_ARM_NEON;
11647 for (size_t k = 1; k <= 80; k += 17) {
11648 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011649 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011650 .nr(16)
11651 .kr(2)
11652 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011653 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011654 .n(16)
11655 .k(k)
11656 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011657 .a_offset(83)
11658 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011659 }
11660 }
11661
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011662 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011663 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080011664 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011665 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011666 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011667 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011668 .nr(16)
11669 .kr(2)
11670 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011671 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011672 .n(16)
11673 .k(k)
11674 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011675 .a_offset(83)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011676 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011677 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011678 }
11679 }
11680 }
11681
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011682 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011683 TEST_REQUIRES_ARM_NEON;
11684 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011685 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011686 .nr(16)
11687 .kr(2)
11688 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011689 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011690 .n(16)
11691 .k(16)
11692 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011693 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011694 }
11695
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011696 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011697 TEST_REQUIRES_ARM_NEON;
11698 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011699 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011700 .nr(16)
11701 .kr(2)
11702 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011703 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011704 .n(16)
11705 .k(16)
11706 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011707 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011708 }
11709
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011710 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C2S4__NEON_MLAL, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011711 TEST_REQUIRES_ARM_NEON;
11712 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011713 .mr(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011714 .nr(16)
11715 .kr(2)
11716 .sr(4)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011717 .m(1)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011718 .n(16)
11719 .k(16)
11720 .cm_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011721 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c2s4__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080011722 }
11723#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
11724
11725
11726#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011727 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_eq_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011728 TEST_REQUIRES_ARM_NEON;
11729 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011730 .mr(3)
11731 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011732 .kr(4)
11733 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011734 .m(3)
11735 .n(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011736 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011737 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011738 }
11739
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011740 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011741 TEST_REQUIRES_ARM_NEON;
11742 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011743 .mr(3)
11744 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011745 .kr(4)
11746 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011747 .m(3)
11748 .n(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011749 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011750 .cn_stride(19)
11751 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011752 }
11753
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011754 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_eq_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011755 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011756 for (uint32_t n = 1; n <= 16; n++) {
11757 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011758 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011759 .mr(3)
11760 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011761 .kr(4)
11762 .sr(1)
11763 .m(m)
11764 .n(n)
11765 .k(8)
11766 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011767 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011768 }
11769 }
11770 }
11771
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011772 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_eq_8_subtile_m) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011773 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011774 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080011775 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080011776 .mr(3)
11777 .nr(16)
11778 .kr(4)
11779 .sr(1)
11780 .m(m)
11781 .n(16)
11782 .k(8)
11783 .iterations(1)
11784 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11785 }
11786 }
11787
11788 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_eq_8_subtile_n) {
11789 TEST_REQUIRES_ARM_NEON;
11790 for (uint32_t n = 1; n <= 16; n++) {
11791 GemmMicrokernelTester()
11792 .mr(3)
11793 .nr(16)
11794 .kr(4)
11795 .sr(1)
11796 .m(3)
11797 .n(n)
11798 .k(8)
11799 .iterations(1)
11800 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11801 }
11802 }
11803
11804 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_lt_8) {
11805 TEST_REQUIRES_ARM_NEON;
11806 for (size_t k = 1; k < 8; k++) {
11807 GemmMicrokernelTester()
11808 .mr(3)
11809 .nr(16)
11810 .kr(4)
11811 .sr(1)
11812 .m(3)
11813 .n(16)
11814 .k(k)
11815 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11816 }
11817 }
11818
11819 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_lt_8_subtile) {
11820 TEST_REQUIRES_ARM_NEON;
11821 for (size_t k = 1; k < 8; k++) {
11822 for (uint32_t n = 1; n <= 16; n++) {
11823 for (uint32_t m = 1; m <= 3; m++) {
11824 GemmMicrokernelTester()
11825 .mr(3)
11826 .nr(16)
11827 .kr(4)
11828 .sr(1)
11829 .m(m)
11830 .n(n)
11831 .k(k)
11832 .iterations(1)
11833 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11834 }
11835 }
11836 }
11837 }
11838
11839 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_gt_8) {
11840 TEST_REQUIRES_ARM_NEON;
11841 for (size_t k = 9; k < 16; k++) {
11842 GemmMicrokernelTester()
11843 .mr(3)
11844 .nr(16)
11845 .kr(4)
11846 .sr(1)
11847 .m(3)
11848 .n(16)
11849 .k(k)
11850 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11851 }
11852 }
11853
11854 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_gt_8_subtile) {
11855 TEST_REQUIRES_ARM_NEON;
11856 for (size_t k = 9; k < 16; k++) {
11857 for (uint32_t n = 1; n <= 16; n++) {
11858 for (uint32_t m = 1; m <= 3; m++) {
11859 GemmMicrokernelTester()
11860 .mr(3)
11861 .nr(16)
11862 .kr(4)
11863 .sr(1)
11864 .m(m)
11865 .n(n)
11866 .k(k)
11867 .iterations(1)
11868 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11869 }
11870 }
11871 }
11872 }
11873
11874 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_div_8) {
11875 TEST_REQUIRES_ARM_NEON;
11876 for (size_t k = 16; k <= 80; k += 8) {
11877 GemmMicrokernelTester()
11878 .mr(3)
11879 .nr(16)
11880 .kr(4)
11881 .sr(1)
11882 .m(3)
11883 .n(16)
11884 .k(k)
11885 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11886 }
11887 }
11888
11889 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, k_div_8_subtile) {
11890 TEST_REQUIRES_ARM_NEON;
11891 for (size_t k = 16; k <= 80; k += 8) {
11892 for (uint32_t n = 1; n <= 16; n++) {
11893 for (uint32_t m = 1; m <= 3; m++) {
11894 GemmMicrokernelTester()
11895 .mr(3)
11896 .nr(16)
11897 .kr(4)
11898 .sr(1)
11899 .m(m)
11900 .n(n)
11901 .k(k)
11902 .iterations(1)
11903 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11904 }
11905 }
11906 }
11907 }
11908
11909 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, n_gt_16) {
11910 TEST_REQUIRES_ARM_NEON;
11911 for (uint32_t n = 17; n < 32; n++) {
11912 for (size_t k = 1; k <= 40; k += 9) {
11913 GemmMicrokernelTester()
11914 .mr(3)
11915 .nr(16)
11916 .kr(4)
11917 .sr(1)
11918 .m(3)
11919 .n(n)
11920 .k(k)
11921 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11922 }
11923 }
11924 }
11925
11926 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, n_gt_16_strided_cn) {
11927 TEST_REQUIRES_ARM_NEON;
11928 for (uint32_t n = 17; n < 32; n++) {
11929 for (size_t k = 1; k <= 40; k += 9) {
11930 GemmMicrokernelTester()
11931 .mr(3)
11932 .nr(16)
11933 .kr(4)
11934 .sr(1)
11935 .m(3)
11936 .n(n)
11937 .k(k)
11938 .cn_stride(19)
11939 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11940 }
11941 }
11942 }
11943
11944 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, n_gt_16_subtile) {
11945 TEST_REQUIRES_ARM_NEON;
11946 for (uint32_t n = 17; n < 32; n++) {
11947 for (size_t k = 1; k <= 40; k += 9) {
11948 for (uint32_t m = 1; m <= 3; m++) {
11949 GemmMicrokernelTester()
11950 .mr(3)
11951 .nr(16)
11952 .kr(4)
11953 .sr(1)
11954 .m(m)
11955 .n(n)
11956 .k(k)
11957 .iterations(1)
11958 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11959 }
11960 }
11961 }
11962 }
11963
11964 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, n_div_16) {
11965 TEST_REQUIRES_ARM_NEON;
11966 for (uint32_t n = 32; n <= 48; n += 16) {
11967 for (size_t k = 1; k <= 40; k += 9) {
11968 GemmMicrokernelTester()
11969 .mr(3)
11970 .nr(16)
11971 .kr(4)
11972 .sr(1)
11973 .m(3)
11974 .n(n)
11975 .k(k)
11976 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11977 }
11978 }
11979 }
11980
11981 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, n_div_16_strided_cn) {
11982 TEST_REQUIRES_ARM_NEON;
11983 for (uint32_t n = 32; n <= 48; n += 16) {
11984 for (size_t k = 1; k <= 40; k += 9) {
11985 GemmMicrokernelTester()
11986 .mr(3)
11987 .nr(16)
11988 .kr(4)
11989 .sr(1)
11990 .m(3)
11991 .n(n)
11992 .k(k)
11993 .cn_stride(19)
11994 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
11995 }
11996 }
11997 }
11998
11999 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, n_div_16_subtile) {
12000 TEST_REQUIRES_ARM_NEON;
12001 for (uint32_t n = 32; n <= 48; n += 16) {
12002 for (size_t k = 1; k <= 40; k += 9) {
12003 for (uint32_t m = 1; m <= 3; m++) {
12004 GemmMicrokernelTester()
12005 .mr(3)
12006 .nr(16)
12007 .kr(4)
12008 .sr(1)
12009 .m(m)
12010 .n(n)
12011 .k(k)
12012 .iterations(1)
12013 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12014 }
12015 }
12016 }
12017 }
12018
12019 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, small_kernel) {
12020 TEST_REQUIRES_ARM_NEON;
12021 for (size_t k = 1; k <= 40; k += 9) {
12022 GemmMicrokernelTester()
12023 .mr(3)
12024 .nr(16)
12025 .kr(4)
12026 .sr(1)
12027 .m(3)
12028 .n(16)
12029 .k(k)
12030 .ks(3)
12031 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12032 }
12033 }
12034
12035 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, small_kernel_subtile) {
12036 TEST_REQUIRES_ARM_NEON;
12037 for (size_t k = 1; k <= 40; k += 9) {
12038 for (uint32_t n = 1; n <= 16; n++) {
12039 for (uint32_t m = 1; m <= 3; m++) {
12040 GemmMicrokernelTester()
12041 .mr(3)
12042 .nr(16)
12043 .kr(4)
12044 .sr(1)
12045 .m(m)
12046 .n(n)
12047 .k(k)
12048 .ks(3)
12049 .iterations(1)
12050 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12051 }
12052 }
12053 }
12054 }
12055
12056 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, n_gt_16_small_kernel) {
12057 TEST_REQUIRES_ARM_NEON;
12058 for (uint32_t n = 17; n < 32; n++) {
12059 for (size_t k = 1; k <= 40; k += 9) {
12060 GemmMicrokernelTester()
12061 .mr(3)
12062 .nr(16)
12063 .kr(4)
12064 .sr(1)
12065 .m(3)
12066 .n(n)
12067 .k(k)
12068 .ks(3)
12069 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12070 }
12071 }
12072 }
12073
12074 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, n_div_16_small_kernel) {
12075 TEST_REQUIRES_ARM_NEON;
12076 for (uint32_t n = 32; n <= 48; n += 16) {
12077 for (size_t k = 1; k <= 40; k += 9) {
12078 GemmMicrokernelTester()
12079 .mr(3)
12080 .nr(16)
12081 .kr(4)
12082 .sr(1)
12083 .m(3)
12084 .n(n)
12085 .k(k)
12086 .ks(3)
12087 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12088 }
12089 }
12090 }
12091
12092 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, strided_cm_subtile) {
12093 TEST_REQUIRES_ARM_NEON;
12094 for (size_t k = 1; k <= 40; k += 9) {
12095 for (uint32_t n = 1; n <= 16; n++) {
12096 for (uint32_t m = 1; m <= 3; m++) {
12097 GemmMicrokernelTester()
12098 .mr(3)
12099 .nr(16)
12100 .kr(4)
12101 .sr(1)
12102 .m(m)
12103 .n(n)
12104 .k(k)
12105 .cm_stride(19)
12106 .iterations(1)
12107 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12108 }
12109 }
12110 }
12111 }
12112
12113 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, a_offset) {
12114 TEST_REQUIRES_ARM_NEON;
12115 for (size_t k = 1; k <= 40; k += 9) {
12116 GemmMicrokernelTester()
12117 .mr(3)
12118 .nr(16)
12119 .kr(4)
12120 .sr(1)
12121 .m(3)
12122 .n(16)
12123 .k(k)
12124 .ks(3)
12125 .a_offset(127)
12126 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12127 }
12128 }
12129
12130 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, zero) {
12131 TEST_REQUIRES_ARM_NEON;
12132 for (size_t k = 1; k <= 40; k += 9) {
12133 for (uint32_t mz = 0; mz < 3; mz++) {
12134 GemmMicrokernelTester()
12135 .mr(3)
12136 .nr(16)
12137 .kr(4)
12138 .sr(1)
12139 .m(3)
12140 .n(16)
12141 .k(k)
12142 .ks(3)
12143 .a_offset(127)
12144 .zero_index(mz)
12145 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12146 }
12147 }
12148 }
12149
12150 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, qmin) {
12151 TEST_REQUIRES_ARM_NEON;
12152 GemmMicrokernelTester()
12153 .mr(3)
12154 .nr(16)
12155 .kr(4)
12156 .sr(1)
12157 .m(3)
12158 .n(16)
12159 .k(8)
12160 .qmin(128)
12161 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12162 }
12163
12164 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, qmax) {
12165 TEST_REQUIRES_ARM_NEON;
12166 GemmMicrokernelTester()
12167 .mr(3)
12168 .nr(16)
12169 .kr(4)
12170 .sr(1)
12171 .m(3)
12172 .n(16)
12173 .k(8)
12174 .qmax(128)
12175 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12176 }
12177
12178 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_DUP, strided_cm) {
12179 TEST_REQUIRES_ARM_NEON;
12180 GemmMicrokernelTester()
12181 .mr(3)
12182 .nr(16)
12183 .kr(4)
12184 .sr(1)
12185 .m(3)
12186 .n(16)
12187 .k(8)
12188 .cm_stride(19)
12189 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12190 }
12191#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
12192
12193
12194#if XNN_ARCH_ARM || XNN_ARCH_ARM64
12195 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_eq_8) {
12196 TEST_REQUIRES_ARM_NEON;
12197 GemmMicrokernelTester()
12198 .mr(4)
12199 .nr(16)
12200 .kr(4)
12201 .sr(1)
12202 .m(4)
12203 .n(16)
12204 .k(8)
12205 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12206 }
12207
12208 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, strided_cn) {
12209 TEST_REQUIRES_ARM_NEON;
12210 GemmMicrokernelTester()
12211 .mr(4)
12212 .nr(16)
12213 .kr(4)
12214 .sr(1)
12215 .m(4)
12216 .n(16)
12217 .k(8)
12218 .cn_stride(19)
12219 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12220 }
12221
12222 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_eq_8_subtile) {
12223 TEST_REQUIRES_ARM_NEON;
12224 for (uint32_t n = 1; n <= 16; n++) {
12225 for (uint32_t m = 1; m <= 4; m++) {
12226 GemmMicrokernelTester()
12227 .mr(4)
12228 .nr(16)
12229 .kr(4)
12230 .sr(1)
12231 .m(m)
12232 .n(n)
12233 .k(8)
12234 .iterations(1)
12235 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12236 }
12237 }
12238 }
12239
12240 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_eq_8_subtile_m) {
12241 TEST_REQUIRES_ARM_NEON;
12242 for (uint32_t m = 1; m <= 4; m++) {
12243 GemmMicrokernelTester()
12244 .mr(4)
12245 .nr(16)
12246 .kr(4)
12247 .sr(1)
12248 .m(m)
12249 .n(16)
12250 .k(8)
12251 .iterations(1)
12252 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12253 }
12254 }
12255
12256 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_eq_8_subtile_n) {
12257 TEST_REQUIRES_ARM_NEON;
12258 for (uint32_t n = 1; n <= 16; n++) {
12259 GemmMicrokernelTester()
12260 .mr(4)
12261 .nr(16)
12262 .kr(4)
12263 .sr(1)
12264 .m(4)
12265 .n(n)
12266 .k(8)
12267 .iterations(1)
12268 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12269 }
12270 }
12271
12272 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_lt_8) {
12273 TEST_REQUIRES_ARM_NEON;
12274 for (size_t k = 1; k < 8; k++) {
12275 GemmMicrokernelTester()
12276 .mr(4)
12277 .nr(16)
12278 .kr(4)
12279 .sr(1)
12280 .m(4)
12281 .n(16)
12282 .k(k)
12283 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12284 }
12285 }
12286
12287 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_lt_8_subtile) {
12288 TEST_REQUIRES_ARM_NEON;
12289 for (size_t k = 1; k < 8; k++) {
12290 for (uint32_t n = 1; n <= 16; n++) {
12291 for (uint32_t m = 1; m <= 4; m++) {
12292 GemmMicrokernelTester()
12293 .mr(4)
12294 .nr(16)
12295 .kr(4)
12296 .sr(1)
12297 .m(m)
12298 .n(n)
12299 .k(k)
12300 .iterations(1)
12301 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12302 }
12303 }
12304 }
12305 }
12306
12307 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_gt_8) {
12308 TEST_REQUIRES_ARM_NEON;
12309 for (size_t k = 9; k < 16; k++) {
12310 GemmMicrokernelTester()
12311 .mr(4)
12312 .nr(16)
12313 .kr(4)
12314 .sr(1)
12315 .m(4)
12316 .n(16)
12317 .k(k)
12318 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12319 }
12320 }
12321
12322 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_gt_8_subtile) {
12323 TEST_REQUIRES_ARM_NEON;
12324 for (size_t k = 9; k < 16; k++) {
12325 for (uint32_t n = 1; n <= 16; n++) {
12326 for (uint32_t m = 1; m <= 4; m++) {
12327 GemmMicrokernelTester()
12328 .mr(4)
12329 .nr(16)
12330 .kr(4)
12331 .sr(1)
12332 .m(m)
12333 .n(n)
12334 .k(k)
12335 .iterations(1)
12336 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12337 }
12338 }
12339 }
12340 }
12341
12342 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_div_8) {
12343 TEST_REQUIRES_ARM_NEON;
12344 for (size_t k = 16; k <= 80; k += 8) {
12345 GemmMicrokernelTester()
12346 .mr(4)
12347 .nr(16)
12348 .kr(4)
12349 .sr(1)
12350 .m(4)
12351 .n(16)
12352 .k(k)
12353 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12354 }
12355 }
12356
12357 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, k_div_8_subtile) {
12358 TEST_REQUIRES_ARM_NEON;
12359 for (size_t k = 16; k <= 80; k += 8) {
12360 for (uint32_t n = 1; n <= 16; n++) {
12361 for (uint32_t m = 1; m <= 4; m++) {
12362 GemmMicrokernelTester()
12363 .mr(4)
12364 .nr(16)
12365 .kr(4)
12366 .sr(1)
12367 .m(m)
12368 .n(n)
12369 .k(k)
12370 .iterations(1)
12371 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12372 }
12373 }
12374 }
12375 }
12376
12377 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, n_gt_16) {
12378 TEST_REQUIRES_ARM_NEON;
12379 for (uint32_t n = 17; n < 32; n++) {
12380 for (size_t k = 1; k <= 40; k += 9) {
12381 GemmMicrokernelTester()
12382 .mr(4)
12383 .nr(16)
12384 .kr(4)
12385 .sr(1)
12386 .m(4)
12387 .n(n)
12388 .k(k)
12389 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12390 }
12391 }
12392 }
12393
12394 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, n_gt_16_strided_cn) {
12395 TEST_REQUIRES_ARM_NEON;
12396 for (uint32_t n = 17; n < 32; n++) {
12397 for (size_t k = 1; k <= 40; k += 9) {
12398 GemmMicrokernelTester()
12399 .mr(4)
12400 .nr(16)
12401 .kr(4)
12402 .sr(1)
12403 .m(4)
12404 .n(n)
12405 .k(k)
12406 .cn_stride(19)
12407 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12408 }
12409 }
12410 }
12411
12412 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, n_gt_16_subtile) {
12413 TEST_REQUIRES_ARM_NEON;
12414 for (uint32_t n = 17; n < 32; n++) {
12415 for (size_t k = 1; k <= 40; k += 9) {
12416 for (uint32_t m = 1; m <= 4; m++) {
12417 GemmMicrokernelTester()
12418 .mr(4)
12419 .nr(16)
12420 .kr(4)
12421 .sr(1)
12422 .m(m)
12423 .n(n)
12424 .k(k)
12425 .iterations(1)
12426 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12427 }
12428 }
12429 }
12430 }
12431
12432 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, n_div_16) {
12433 TEST_REQUIRES_ARM_NEON;
12434 for (uint32_t n = 32; n <= 48; n += 16) {
12435 for (size_t k = 1; k <= 40; k += 9) {
12436 GemmMicrokernelTester()
12437 .mr(4)
12438 .nr(16)
12439 .kr(4)
12440 .sr(1)
12441 .m(4)
12442 .n(n)
12443 .k(k)
12444 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12445 }
12446 }
12447 }
12448
12449 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, n_div_16_strided_cn) {
12450 TEST_REQUIRES_ARM_NEON;
12451 for (uint32_t n = 32; n <= 48; n += 16) {
12452 for (size_t k = 1; k <= 40; k += 9) {
12453 GemmMicrokernelTester()
12454 .mr(4)
12455 .nr(16)
12456 .kr(4)
12457 .sr(1)
12458 .m(4)
12459 .n(n)
12460 .k(k)
12461 .cn_stride(19)
12462 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12463 }
12464 }
12465 }
12466
12467 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, n_div_16_subtile) {
12468 TEST_REQUIRES_ARM_NEON;
12469 for (uint32_t n = 32; n <= 48; n += 16) {
12470 for (size_t k = 1; k <= 40; k += 9) {
12471 for (uint32_t m = 1; m <= 4; m++) {
12472 GemmMicrokernelTester()
12473 .mr(4)
12474 .nr(16)
12475 .kr(4)
12476 .sr(1)
12477 .m(m)
12478 .n(n)
12479 .k(k)
12480 .iterations(1)
12481 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12482 }
12483 }
12484 }
12485 }
12486
12487 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, small_kernel) {
12488 TEST_REQUIRES_ARM_NEON;
12489 for (size_t k = 1; k <= 40; k += 9) {
12490 GemmMicrokernelTester()
12491 .mr(4)
12492 .nr(16)
12493 .kr(4)
12494 .sr(1)
12495 .m(4)
12496 .n(16)
12497 .k(k)
12498 .ks(3)
12499 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12500 }
12501 }
12502
12503 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, small_kernel_subtile) {
12504 TEST_REQUIRES_ARM_NEON;
12505 for (size_t k = 1; k <= 40; k += 9) {
12506 for (uint32_t n = 1; n <= 16; n++) {
12507 for (uint32_t m = 1; m <= 4; m++) {
12508 GemmMicrokernelTester()
12509 .mr(4)
12510 .nr(16)
12511 .kr(4)
12512 .sr(1)
12513 .m(m)
12514 .n(n)
12515 .k(k)
12516 .ks(3)
12517 .iterations(1)
12518 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12519 }
12520 }
12521 }
12522 }
12523
12524 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, n_gt_16_small_kernel) {
12525 TEST_REQUIRES_ARM_NEON;
12526 for (uint32_t n = 17; n < 32; n++) {
12527 for (size_t k = 1; k <= 40; k += 9) {
12528 GemmMicrokernelTester()
12529 .mr(4)
12530 .nr(16)
12531 .kr(4)
12532 .sr(1)
12533 .m(4)
12534 .n(n)
12535 .k(k)
12536 .ks(3)
12537 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12538 }
12539 }
12540 }
12541
12542 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, n_div_16_small_kernel) {
12543 TEST_REQUIRES_ARM_NEON;
12544 for (uint32_t n = 32; n <= 48; n += 16) {
12545 for (size_t k = 1; k <= 40; k += 9) {
12546 GemmMicrokernelTester()
12547 .mr(4)
12548 .nr(16)
12549 .kr(4)
12550 .sr(1)
12551 .m(4)
12552 .n(n)
12553 .k(k)
12554 .ks(3)
12555 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12556 }
12557 }
12558 }
12559
12560 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, strided_cm_subtile) {
12561 TEST_REQUIRES_ARM_NEON;
12562 for (size_t k = 1; k <= 40; k += 9) {
12563 for (uint32_t n = 1; n <= 16; n++) {
12564 for (uint32_t m = 1; m <= 4; m++) {
12565 GemmMicrokernelTester()
12566 .mr(4)
12567 .nr(16)
12568 .kr(4)
12569 .sr(1)
12570 .m(m)
12571 .n(n)
12572 .k(k)
12573 .cm_stride(19)
12574 .iterations(1)
12575 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12576 }
12577 }
12578 }
12579 }
12580
12581 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, a_offset) {
12582 TEST_REQUIRES_ARM_NEON;
12583 for (size_t k = 1; k <= 40; k += 9) {
12584 GemmMicrokernelTester()
12585 .mr(4)
12586 .nr(16)
12587 .kr(4)
12588 .sr(1)
12589 .m(4)
12590 .n(16)
12591 .k(k)
12592 .ks(3)
12593 .a_offset(163)
12594 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12595 }
12596 }
12597
12598 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, zero) {
12599 TEST_REQUIRES_ARM_NEON;
12600 for (size_t k = 1; k <= 40; k += 9) {
12601 for (uint32_t mz = 0; mz < 4; mz++) {
12602 GemmMicrokernelTester()
12603 .mr(4)
12604 .nr(16)
12605 .kr(4)
12606 .sr(1)
12607 .m(4)
12608 .n(16)
12609 .k(k)
12610 .ks(3)
12611 .a_offset(163)
12612 .zero_index(mz)
12613 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12614 }
12615 }
12616 }
12617
12618 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, qmin) {
12619 TEST_REQUIRES_ARM_NEON;
12620 GemmMicrokernelTester()
12621 .mr(4)
12622 .nr(16)
12623 .kr(4)
12624 .sr(1)
12625 .m(4)
12626 .n(16)
12627 .k(8)
12628 .qmin(128)
12629 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12630 }
12631
12632 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, qmax) {
12633 TEST_REQUIRES_ARM_NEON;
12634 GemmMicrokernelTester()
12635 .mr(4)
12636 .nr(16)
12637 .kr(4)
12638 .sr(1)
12639 .m(4)
12640 .n(16)
12641 .k(8)
12642 .qmax(128)
12643 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12644 }
12645
12646 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_DUP, strided_cm) {
12647 TEST_REQUIRES_ARM_NEON;
12648 GemmMicrokernelTester()
12649 .mr(4)
12650 .nr(16)
12651 .kr(4)
12652 .sr(1)
12653 .m(4)
12654 .n(16)
12655 .k(8)
12656 .cm_stride(19)
12657 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12658 }
12659#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
12660
12661
12662#if XNN_ARCH_ARM || XNN_ARCH_ARM64
12663 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_eq_16) {
12664 TEST_REQUIRES_ARM_NEON;
12665 GemmMicrokernelTester()
12666 .mr(2)
12667 .nr(8)
12668 .kr(4)
12669 .sr(1)
12670 .m(2)
12671 .n(8)
12672 .k(16)
12673 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12674 }
12675
12676 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, strided_cn) {
12677 TEST_REQUIRES_ARM_NEON;
12678 GemmMicrokernelTester()
12679 .mr(2)
12680 .nr(8)
12681 .kr(4)
12682 .sr(1)
12683 .m(2)
12684 .n(8)
12685 .k(16)
12686 .cn_stride(11)
12687 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12688 }
12689
12690 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_eq_16_subtile) {
12691 TEST_REQUIRES_ARM_NEON;
12692 for (uint32_t n = 1; n <= 8; n++) {
12693 for (uint32_t m = 1; m <= 2; m++) {
12694 GemmMicrokernelTester()
12695 .mr(2)
12696 .nr(8)
12697 .kr(4)
12698 .sr(1)
12699 .m(m)
12700 .n(n)
12701 .k(16)
12702 .iterations(1)
12703 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
12704 }
12705 }
12706 }
12707
12708 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_eq_16_subtile_m) {
12709 TEST_REQUIRES_ARM_NEON;
12710 for (uint32_t m = 1; m <= 2; m++) {
12711 GemmMicrokernelTester()
12712 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012713 .nr(8)
12714 .kr(4)
12715 .sr(1)
12716 .m(m)
12717 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012718 .k(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012719 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012720 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012721 }
12722 }
12723
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012724 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_eq_16_subtile_n) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012725 TEST_REQUIRES_ARM_NEON;
12726 for (uint32_t n = 1; n <= 8; n++) {
12727 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012728 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012729 .nr(8)
12730 .kr(4)
12731 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012732 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012733 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012734 .k(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012735 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012736 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012737 }
12738 }
12739
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012740 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_lt_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012741 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012742 for (size_t k = 1; k < 16; k++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012743 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012744 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012745 .nr(8)
12746 .kr(4)
12747 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012748 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012749 .n(8)
12750 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012751 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012752 }
12753 }
12754
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012755 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_lt_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012756 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012757 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080012758 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012759 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012760 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012761 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012762 .nr(8)
12763 .kr(4)
12764 .sr(1)
12765 .m(m)
12766 .n(n)
12767 .k(k)
12768 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012769 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012770 }
12771 }
12772 }
12773 }
12774
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012775 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_gt_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012776 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012777 for (size_t k = 17; k < 32; k++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012778 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012779 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012780 .nr(8)
12781 .kr(4)
12782 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012783 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012784 .n(8)
12785 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012786 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012787 }
12788 }
12789
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012790 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_gt_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012791 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012792 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080012793 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012794 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012795 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012796 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012797 .nr(8)
12798 .kr(4)
12799 .sr(1)
12800 .m(m)
12801 .n(n)
12802 .k(k)
12803 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012804 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012805 }
12806 }
12807 }
12808 }
12809
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012810 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_div_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012811 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012812 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012813 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012814 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012815 .nr(8)
12816 .kr(4)
12817 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012818 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012819 .n(8)
12820 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012821 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012822 }
12823 }
12824
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012825 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, k_div_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012826 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012827 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080012828 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012829 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012830 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012831 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012832 .nr(8)
12833 .kr(4)
12834 .sr(1)
12835 .m(m)
12836 .n(n)
12837 .k(k)
12838 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012839 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012840 }
12841 }
12842 }
12843 }
12844
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012845 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, n_gt_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012846 TEST_REQUIRES_ARM_NEON;
12847 for (uint32_t n = 9; n < 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012848 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012849 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012850 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012851 .nr(8)
12852 .kr(4)
12853 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012854 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080012855 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012856 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012857 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012858 }
12859 }
12860 }
12861
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012862 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, n_gt_8_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012863 TEST_REQUIRES_ARM_NEON;
12864 for (uint32_t n = 9; n < 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012865 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012866 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012867 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012868 .nr(8)
12869 .kr(4)
12870 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012871 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080012872 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012873 .k(k)
12874 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012875 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012876 }
12877 }
12878 }
12879
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012880 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, n_gt_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012881 TEST_REQUIRES_ARM_NEON;
12882 for (uint32_t n = 9; n < 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012883 for (size_t k = 1; k <= 80; k += 17) {
12884 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012885 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012886 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012887 .nr(8)
12888 .kr(4)
12889 .sr(1)
12890 .m(m)
12891 .n(n)
12892 .k(k)
12893 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012894 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012895 }
12896 }
12897 }
12898 }
12899
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012900 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, n_div_8) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012901 TEST_REQUIRES_ARM_NEON;
12902 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012903 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012904 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012905 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012906 .nr(8)
12907 .kr(4)
12908 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012909 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080012910 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012911 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012912 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012913 }
12914 }
12915 }
12916
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012917 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, n_div_8_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012918 TEST_REQUIRES_ARM_NEON;
12919 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012920 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012921 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012922 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012923 .nr(8)
12924 .kr(4)
12925 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012926 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012927 .n(n)
12928 .k(k)
12929 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012930 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012931 }
12932 }
12933 }
12934
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012935 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, n_div_8_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012936 TEST_REQUIRES_ARM_NEON;
12937 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012938 for (size_t k = 1; k <= 80; k += 17) {
12939 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012940 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012941 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012942 .nr(8)
12943 .kr(4)
12944 .sr(1)
12945 .m(m)
12946 .n(n)
12947 .k(k)
12948 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012949 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012950 }
12951 }
12952 }
12953 }
12954
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012955 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012956 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012957 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012958 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012959 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012960 .nr(8)
12961 .kr(4)
12962 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012963 .m(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012964 .n(8)
12965 .k(k)
12966 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012967 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012968 }
12969 }
12970
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012971 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, small_kernel_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012972 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012973 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080012974 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012975 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012976 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012977 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012978 .nr(8)
12979 .kr(4)
12980 .sr(1)
12981 .m(m)
12982 .n(n)
12983 .k(k)
12984 .ks(3)
12985 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012986 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012987 }
12988 }
12989 }
12990 }
12991
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012992 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, n_gt_8_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012993 TEST_REQUIRES_ARM_NEON;
12994 for (uint32_t n = 9; n < 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012995 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012996 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080012997 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080012998 .nr(8)
12999 .kr(4)
13000 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013001 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080013002 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013003 .k(k)
13004 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013005 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013006 }
13007 }
13008 }
13009
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013010 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, n_div_8_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013011 TEST_REQUIRES_ARM_NEON;
13012 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013013 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013014 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013015 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013016 .nr(8)
13017 .kr(4)
13018 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013019 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080013020 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013021 .k(k)
13022 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013023 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013024 }
13025 }
13026 }
13027
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013028 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, strided_cm_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013029 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013030 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080013031 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013032 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013033 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013034 .mr(2)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013035 .nr(8)
13036 .kr(4)
13037 .sr(1)
13038 .m(m)
13039 .n(n)
13040 .k(k)
13041 .cm_stride(11)
13042 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013043 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013044 }
13045 }
13046 }
13047 }
13048
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013049 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, a_offset) {
13050 TEST_REQUIRES_ARM_NEON;
13051 for (size_t k = 1; k <= 80; k += 17) {
13052 GemmMicrokernelTester()
13053 .mr(2)
13054 .nr(8)
13055 .kr(4)
13056 .sr(1)
13057 .m(2)
13058 .n(8)
13059 .k(k)
13060 .ks(3)
13061 .a_offset(163)
13062 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13063 }
13064 }
13065
13066 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, zero) {
13067 TEST_REQUIRES_ARM_NEON;
13068 for (size_t k = 1; k <= 80; k += 17) {
13069 for (uint32_t mz = 0; mz < 2; mz++) {
13070 GemmMicrokernelTester()
13071 .mr(2)
13072 .nr(8)
13073 .kr(4)
13074 .sr(1)
13075 .m(2)
13076 .n(8)
13077 .k(k)
13078 .ks(3)
13079 .a_offset(163)
13080 .zero_index(mz)
13081 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13082 }
13083 }
13084 }
13085
13086 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, qmin) {
13087 TEST_REQUIRES_ARM_NEON;
13088 GemmMicrokernelTester()
13089 .mr(2)
13090 .nr(8)
13091 .kr(4)
13092 .sr(1)
13093 .m(2)
13094 .n(8)
13095 .k(16)
13096 .qmin(128)
13097 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13098 }
13099
13100 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, qmax) {
13101 TEST_REQUIRES_ARM_NEON;
13102 GemmMicrokernelTester()
13103 .mr(2)
13104 .nr(8)
13105 .kr(4)
13106 .sr(1)
13107 .m(2)
13108 .n(8)
13109 .k(16)
13110 .qmax(128)
13111 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13112 }
13113
13114 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C4__NEON_MLAL_DUP, strided_cm) {
13115 TEST_REQUIRES_ARM_NEON;
13116 GemmMicrokernelTester()
13117 .mr(2)
13118 .nr(8)
13119 .kr(4)
13120 .sr(1)
13121 .m(2)
13122 .n(8)
13123 .k(16)
13124 .cm_stride(11)
13125 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c4__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13126 }
13127#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
13128
13129
13130#if XNN_ARCH_ARM || XNN_ARCH_ARM64
13131 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_eq_8) {
13132 TEST_REQUIRES_ARM_NEON;
13133 GemmMicrokernelTester()
13134 .mr(1)
13135 .nr(16)
13136 .kr(4)
13137 .sr(1)
13138 .m(1)
13139 .n(16)
13140 .k(8)
13141 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13142 }
13143
13144 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, strided_cn) {
13145 TEST_REQUIRES_ARM_NEON;
13146 GemmMicrokernelTester()
13147 .mr(1)
13148 .nr(16)
13149 .kr(4)
13150 .sr(1)
13151 .m(1)
13152 .n(16)
13153 .k(8)
13154 .cn_stride(19)
13155 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13156 }
13157
13158 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_eq_8_subtile) {
13159 TEST_REQUIRES_ARM_NEON;
13160 for (uint32_t n = 1; n <= 16; n++) {
13161 for (uint32_t m = 1; m <= 1; m++) {
13162 GemmMicrokernelTester()
13163 .mr(1)
13164 .nr(16)
13165 .kr(4)
13166 .sr(1)
13167 .m(m)
13168 .n(n)
13169 .k(8)
13170 .iterations(1)
13171 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13172 }
13173 }
13174 }
13175
13176 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_eq_8_subtile_m) {
13177 TEST_REQUIRES_ARM_NEON;
13178 for (uint32_t m = 1; m <= 1; m++) {
13179 GemmMicrokernelTester()
13180 .mr(1)
13181 .nr(16)
13182 .kr(4)
13183 .sr(1)
13184 .m(m)
13185 .n(16)
13186 .k(8)
13187 .iterations(1)
13188 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13189 }
13190 }
13191
13192 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_eq_8_subtile_n) {
13193 TEST_REQUIRES_ARM_NEON;
13194 for (uint32_t n = 1; n <= 16; n++) {
13195 GemmMicrokernelTester()
13196 .mr(1)
13197 .nr(16)
13198 .kr(4)
13199 .sr(1)
13200 .m(1)
13201 .n(n)
13202 .k(8)
13203 .iterations(1)
13204 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13205 }
13206 }
13207
13208 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_lt_8) {
13209 TEST_REQUIRES_ARM_NEON;
13210 for (size_t k = 1; k < 8; k++) {
13211 GemmMicrokernelTester()
13212 .mr(1)
13213 .nr(16)
13214 .kr(4)
13215 .sr(1)
13216 .m(1)
13217 .n(16)
13218 .k(k)
13219 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13220 }
13221 }
13222
13223 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_lt_8_subtile) {
13224 TEST_REQUIRES_ARM_NEON;
13225 for (size_t k = 1; k < 8; k++) {
13226 for (uint32_t n = 1; n <= 16; n++) {
13227 for (uint32_t m = 1; m <= 1; m++) {
13228 GemmMicrokernelTester()
13229 .mr(1)
13230 .nr(16)
13231 .kr(4)
13232 .sr(1)
13233 .m(m)
13234 .n(n)
13235 .k(k)
13236 .iterations(1)
13237 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13238 }
13239 }
13240 }
13241 }
13242
13243 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_gt_8) {
13244 TEST_REQUIRES_ARM_NEON;
13245 for (size_t k = 9; k < 16; k++) {
13246 GemmMicrokernelTester()
13247 .mr(1)
13248 .nr(16)
13249 .kr(4)
13250 .sr(1)
13251 .m(1)
13252 .n(16)
13253 .k(k)
13254 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13255 }
13256 }
13257
13258 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_gt_8_subtile) {
13259 TEST_REQUIRES_ARM_NEON;
13260 for (size_t k = 9; k < 16; k++) {
13261 for (uint32_t n = 1; n <= 16; n++) {
13262 for (uint32_t m = 1; m <= 1; m++) {
13263 GemmMicrokernelTester()
13264 .mr(1)
13265 .nr(16)
13266 .kr(4)
13267 .sr(1)
13268 .m(m)
13269 .n(n)
13270 .k(k)
13271 .iterations(1)
13272 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13273 }
13274 }
13275 }
13276 }
13277
13278 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_div_8) {
13279 TEST_REQUIRES_ARM_NEON;
13280 for (size_t k = 16; k <= 80; k += 8) {
13281 GemmMicrokernelTester()
13282 .mr(1)
13283 .nr(16)
13284 .kr(4)
13285 .sr(1)
13286 .m(1)
13287 .n(16)
13288 .k(k)
13289 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13290 }
13291 }
13292
13293 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, k_div_8_subtile) {
13294 TEST_REQUIRES_ARM_NEON;
13295 for (size_t k = 16; k <= 80; k += 8) {
13296 for (uint32_t n = 1; n <= 16; n++) {
13297 for (uint32_t m = 1; m <= 1; m++) {
13298 GemmMicrokernelTester()
13299 .mr(1)
13300 .nr(16)
13301 .kr(4)
13302 .sr(1)
13303 .m(m)
13304 .n(n)
13305 .k(k)
13306 .iterations(1)
13307 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13308 }
13309 }
13310 }
13311 }
13312
13313 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, n_gt_16) {
13314 TEST_REQUIRES_ARM_NEON;
13315 for (uint32_t n = 17; n < 32; n++) {
13316 for (size_t k = 1; k <= 40; k += 9) {
13317 GemmMicrokernelTester()
13318 .mr(1)
13319 .nr(16)
13320 .kr(4)
13321 .sr(1)
13322 .m(1)
13323 .n(n)
13324 .k(k)
13325 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13326 }
13327 }
13328 }
13329
13330 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, n_gt_16_strided_cn) {
13331 TEST_REQUIRES_ARM_NEON;
13332 for (uint32_t n = 17; n < 32; n++) {
13333 for (size_t k = 1; k <= 40; k += 9) {
13334 GemmMicrokernelTester()
13335 .mr(1)
13336 .nr(16)
13337 .kr(4)
13338 .sr(1)
13339 .m(1)
13340 .n(n)
13341 .k(k)
13342 .cn_stride(19)
13343 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13344 }
13345 }
13346 }
13347
13348 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, n_gt_16_subtile) {
13349 TEST_REQUIRES_ARM_NEON;
13350 for (uint32_t n = 17; n < 32; n++) {
13351 for (size_t k = 1; k <= 40; k += 9) {
13352 for (uint32_t m = 1; m <= 1; m++) {
13353 GemmMicrokernelTester()
13354 .mr(1)
13355 .nr(16)
13356 .kr(4)
13357 .sr(1)
13358 .m(m)
13359 .n(n)
13360 .k(k)
13361 .iterations(1)
13362 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13363 }
13364 }
13365 }
13366 }
13367
13368 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, n_div_16) {
13369 TEST_REQUIRES_ARM_NEON;
13370 for (uint32_t n = 32; n <= 48; n += 16) {
13371 for (size_t k = 1; k <= 40; k += 9) {
13372 GemmMicrokernelTester()
13373 .mr(1)
13374 .nr(16)
13375 .kr(4)
13376 .sr(1)
13377 .m(1)
13378 .n(n)
13379 .k(k)
13380 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13381 }
13382 }
13383 }
13384
13385 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, n_div_16_strided_cn) {
13386 TEST_REQUIRES_ARM_NEON;
13387 for (uint32_t n = 32; n <= 48; n += 16) {
13388 for (size_t k = 1; k <= 40; k += 9) {
13389 GemmMicrokernelTester()
13390 .mr(1)
13391 .nr(16)
13392 .kr(4)
13393 .sr(1)
13394 .m(1)
13395 .n(n)
13396 .k(k)
13397 .cn_stride(19)
13398 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13399 }
13400 }
13401 }
13402
13403 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, n_div_16_subtile) {
13404 TEST_REQUIRES_ARM_NEON;
13405 for (uint32_t n = 32; n <= 48; n += 16) {
13406 for (size_t k = 1; k <= 40; k += 9) {
13407 for (uint32_t m = 1; m <= 1; m++) {
13408 GemmMicrokernelTester()
13409 .mr(1)
13410 .nr(16)
13411 .kr(4)
13412 .sr(1)
13413 .m(m)
13414 .n(n)
13415 .k(k)
13416 .iterations(1)
13417 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13418 }
13419 }
13420 }
13421 }
13422
13423 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013424 TEST_REQUIRES_ARM_NEON;
13425 for (size_t k = 1; k <= 40; k += 9) {
13426 GemmMicrokernelTester()
13427 .mr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013428 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013429 .kr(4)
13430 .sr(1)
13431 .m(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013432 .n(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013433 .k(k)
13434 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013435 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013436 }
13437 }
13438
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013439 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, small_kernel_subtile) {
13440 TEST_REQUIRES_ARM_NEON;
13441 for (size_t k = 1; k <= 40; k += 9) {
13442 for (uint32_t n = 1; n <= 16; n++) {
13443 for (uint32_t m = 1; m <= 1; m++) {
13444 GemmMicrokernelTester()
13445 .mr(1)
13446 .nr(16)
13447 .kr(4)
13448 .sr(1)
13449 .m(m)
13450 .n(n)
13451 .k(k)
13452 .ks(3)
13453 .iterations(1)
13454 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13455 }
13456 }
13457 }
13458 }
13459
13460 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, n_gt_16_small_kernel) {
13461 TEST_REQUIRES_ARM_NEON;
13462 for (uint32_t n = 17; n < 32; n++) {
13463 for (size_t k = 1; k <= 40; k += 9) {
13464 GemmMicrokernelTester()
13465 .mr(1)
13466 .nr(16)
13467 .kr(4)
13468 .sr(1)
13469 .m(1)
13470 .n(n)
13471 .k(k)
13472 .ks(3)
13473 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13474 }
13475 }
13476 }
13477
13478 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, n_div_16_small_kernel) {
13479 TEST_REQUIRES_ARM_NEON;
13480 for (uint32_t n = 32; n <= 48; n += 16) {
13481 for (size_t k = 1; k <= 40; k += 9) {
13482 GemmMicrokernelTester()
13483 .mr(1)
13484 .nr(16)
13485 .kr(4)
13486 .sr(1)
13487 .m(1)
13488 .n(n)
13489 .k(k)
13490 .ks(3)
13491 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13492 }
13493 }
13494 }
13495
13496 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, strided_cm_subtile) {
13497 TEST_REQUIRES_ARM_NEON;
13498 for (size_t k = 1; k <= 40; k += 9) {
13499 for (uint32_t n = 1; n <= 16; n++) {
13500 for (uint32_t m = 1; m <= 1; m++) {
13501 GemmMicrokernelTester()
13502 .mr(1)
13503 .nr(16)
13504 .kr(4)
13505 .sr(1)
13506 .m(m)
13507 .n(n)
13508 .k(k)
13509 .cm_stride(19)
13510 .iterations(1)
13511 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13512 }
13513 }
13514 }
13515 }
13516
13517 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, a_offset) {
13518 TEST_REQUIRES_ARM_NEON;
13519 for (size_t k = 1; k <= 40; k += 9) {
13520 GemmMicrokernelTester()
13521 .mr(1)
13522 .nr(16)
13523 .kr(4)
13524 .sr(1)
13525 .m(1)
13526 .n(16)
13527 .k(k)
13528 .ks(3)
13529 .a_offset(43)
13530 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
13531 }
13532 }
13533
13534 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, zero) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013535 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080013536 for (size_t k = 1; k <= 40; k += 9) {
13537 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013538 GemmMicrokernelTester()
13539 .mr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013540 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013541 .kr(4)
13542 .sr(1)
13543 .m(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013544 .n(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013545 .k(k)
13546 .ks(3)
13547 .a_offset(43)
13548 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013549 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013550 }
13551 }
13552 }
13553
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013554 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, qmin) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013555 TEST_REQUIRES_ARM_NEON;
13556 GemmMicrokernelTester()
13557 .mr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013558 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013559 .kr(4)
13560 .sr(1)
13561 .m(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013562 .n(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013563 .k(8)
13564 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013565 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013566 }
13567
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013568 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, qmax) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013569 TEST_REQUIRES_ARM_NEON;
13570 GemmMicrokernelTester()
13571 .mr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013572 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013573 .kr(4)
13574 .sr(1)
13575 .m(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013576 .n(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013577 .k(8)
13578 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013579 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013580 }
13581
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013582 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MULL_LD1R, strided_cm) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013583 TEST_REQUIRES_ARM_NEON;
13584 GemmMicrokernelTester()
13585 .mr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013586 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013587 .kr(4)
13588 .sr(1)
13589 .m(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013590 .n(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013591 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013592 .cm_stride(19)
13593 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080013594 }
13595#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
13596
13597
13598#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013599 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_eq_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013600 TEST_REQUIRES_ARM_NEON;
13601 GemmMicrokernelTester()
13602 .mr(2)
13603 .nr(16)
13604 .kr(4)
13605 .sr(1)
13606 .m(2)
13607 .n(16)
13608 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013609 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013610 }
13611
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013612 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013613 TEST_REQUIRES_ARM_NEON;
13614 GemmMicrokernelTester()
13615 .mr(2)
13616 .nr(16)
13617 .kr(4)
13618 .sr(1)
13619 .m(2)
13620 .n(16)
13621 .k(8)
13622 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013623 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013624 }
13625
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013626 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_eq_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013627 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080013628 for (uint32_t n = 1; n <= 16; n++) {
13629 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013630 GemmMicrokernelTester()
13631 .mr(2)
13632 .nr(16)
13633 .kr(4)
13634 .sr(1)
13635 .m(m)
13636 .n(n)
13637 .k(8)
13638 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013639 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013640 }
13641 }
13642 }
13643
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013644 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_eq_8_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013645 TEST_REQUIRES_ARM_NEON;
13646 for (uint32_t m = 1; m <= 2; m++) {
13647 GemmMicrokernelTester()
13648 .mr(2)
13649 .nr(16)
13650 .kr(4)
13651 .sr(1)
13652 .m(m)
13653 .n(16)
13654 .k(8)
13655 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013656 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013657 }
13658 }
13659
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013660 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_eq_8_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013661 TEST_REQUIRES_ARM_NEON;
13662 for (uint32_t n = 1; n <= 16; n++) {
13663 GemmMicrokernelTester()
13664 .mr(2)
13665 .nr(16)
13666 .kr(4)
13667 .sr(1)
13668 .m(2)
13669 .n(n)
13670 .k(8)
13671 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013672 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013673 }
13674 }
13675
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013676 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_lt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013677 TEST_REQUIRES_ARM_NEON;
13678 for (size_t k = 1; k < 8; k++) {
13679 GemmMicrokernelTester()
13680 .mr(2)
13681 .nr(16)
13682 .kr(4)
13683 .sr(1)
13684 .m(2)
13685 .n(16)
13686 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013687 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013688 }
13689 }
13690
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013691 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_lt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013692 TEST_REQUIRES_ARM_NEON;
13693 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080013694 for (uint32_t n = 1; n <= 16; n++) {
13695 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013696 GemmMicrokernelTester()
13697 .mr(2)
13698 .nr(16)
13699 .kr(4)
13700 .sr(1)
13701 .m(m)
13702 .n(n)
13703 .k(k)
13704 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013705 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013706 }
13707 }
13708 }
13709 }
13710
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013711 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013712 TEST_REQUIRES_ARM_NEON;
13713 for (size_t k = 9; k < 16; k++) {
13714 GemmMicrokernelTester()
13715 .mr(2)
13716 .nr(16)
13717 .kr(4)
13718 .sr(1)
13719 .m(2)
13720 .n(16)
13721 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013722 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013723 }
13724 }
13725
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013726 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013727 TEST_REQUIRES_ARM_NEON;
13728 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080013729 for (uint32_t n = 1; n <= 16; n++) {
13730 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013731 GemmMicrokernelTester()
13732 .mr(2)
13733 .nr(16)
13734 .kr(4)
13735 .sr(1)
13736 .m(m)
13737 .n(n)
13738 .k(k)
13739 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013740 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013741 }
13742 }
13743 }
13744 }
13745
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013746 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013747 TEST_REQUIRES_ARM_NEON;
13748 for (size_t k = 16; k <= 80; k += 8) {
13749 GemmMicrokernelTester()
13750 .mr(2)
13751 .nr(16)
13752 .kr(4)
13753 .sr(1)
13754 .m(2)
13755 .n(16)
13756 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013757 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013758 }
13759 }
13760
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013761 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, k_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013762 TEST_REQUIRES_ARM_NEON;
13763 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080013764 for (uint32_t n = 1; n <= 16; n++) {
13765 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013766 GemmMicrokernelTester()
13767 .mr(2)
13768 .nr(16)
13769 .kr(4)
13770 .sr(1)
13771 .m(m)
13772 .n(n)
13773 .k(k)
13774 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013775 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013776 }
13777 }
13778 }
13779 }
13780
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013781 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, n_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013782 TEST_REQUIRES_ARM_NEON;
13783 for (uint32_t n = 17; n < 32; n++) {
13784 for (size_t k = 1; k <= 40; k += 9) {
13785 GemmMicrokernelTester()
13786 .mr(2)
13787 .nr(16)
13788 .kr(4)
13789 .sr(1)
13790 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080013791 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013792 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013793 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013794 }
13795 }
13796 }
13797
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013798 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, n_gt_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013799 TEST_REQUIRES_ARM_NEON;
13800 for (uint32_t n = 17; n < 32; n++) {
13801 for (size_t k = 1; k <= 40; k += 9) {
13802 GemmMicrokernelTester()
13803 .mr(2)
13804 .nr(16)
13805 .kr(4)
13806 .sr(1)
13807 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080013808 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013809 .k(k)
13810 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013811 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013812 }
13813 }
13814 }
13815
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013816 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, n_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013817 TEST_REQUIRES_ARM_NEON;
13818 for (uint32_t n = 17; n < 32; n++) {
13819 for (size_t k = 1; k <= 40; k += 9) {
13820 for (uint32_t m = 1; m <= 2; m++) {
13821 GemmMicrokernelTester()
13822 .mr(2)
13823 .nr(16)
13824 .kr(4)
13825 .sr(1)
13826 .m(m)
13827 .n(n)
13828 .k(k)
13829 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013830 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013831 }
13832 }
13833 }
13834 }
13835
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013836 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, n_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013837 TEST_REQUIRES_ARM_NEON;
13838 for (uint32_t n = 32; n <= 48; n += 16) {
13839 for (size_t k = 1; k <= 40; k += 9) {
13840 GemmMicrokernelTester()
13841 .mr(2)
13842 .nr(16)
13843 .kr(4)
13844 .sr(1)
13845 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080013846 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013847 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013848 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013849 }
13850 }
13851 }
13852
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013853 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, n_div_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013854 TEST_REQUIRES_ARM_NEON;
13855 for (uint32_t n = 32; n <= 48; n += 16) {
13856 for (size_t k = 1; k <= 40; k += 9) {
13857 GemmMicrokernelTester()
13858 .mr(2)
13859 .nr(16)
13860 .kr(4)
13861 .sr(1)
13862 .m(2)
13863 .n(n)
13864 .k(k)
13865 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013866 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013867 }
13868 }
13869 }
13870
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013871 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, n_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013872 TEST_REQUIRES_ARM_NEON;
13873 for (uint32_t n = 32; n <= 48; n += 16) {
13874 for (size_t k = 1; k <= 40; k += 9) {
13875 for (uint32_t m = 1; m <= 2; m++) {
13876 GemmMicrokernelTester()
13877 .mr(2)
13878 .nr(16)
13879 .kr(4)
13880 .sr(1)
13881 .m(m)
13882 .n(n)
13883 .k(k)
13884 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013885 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013886 }
13887 }
13888 }
13889 }
13890
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013891 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013892 TEST_REQUIRES_ARM_NEON;
13893 for (size_t k = 1; k <= 40; k += 9) {
13894 GemmMicrokernelTester()
13895 .mr(2)
13896 .nr(16)
13897 .kr(4)
13898 .sr(1)
13899 .m(2)
13900 .n(16)
13901 .k(k)
13902 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013903 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013904 }
13905 }
13906
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013907 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013908 TEST_REQUIRES_ARM_NEON;
13909 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080013910 for (uint32_t n = 1; n <= 16; n++) {
13911 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013912 GemmMicrokernelTester()
13913 .mr(2)
13914 .nr(16)
13915 .kr(4)
13916 .sr(1)
13917 .m(m)
13918 .n(n)
13919 .k(k)
13920 .ks(3)
13921 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013922 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013923 }
13924 }
13925 }
13926 }
13927
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013928 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, n_gt_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013929 TEST_REQUIRES_ARM_NEON;
13930 for (uint32_t n = 17; n < 32; n++) {
13931 for (size_t k = 1; k <= 40; k += 9) {
13932 GemmMicrokernelTester()
13933 .mr(2)
13934 .nr(16)
13935 .kr(4)
13936 .sr(1)
13937 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080013938 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013939 .k(k)
13940 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013941 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013942 }
13943 }
13944 }
13945
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013946 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, n_div_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013947 TEST_REQUIRES_ARM_NEON;
13948 for (uint32_t n = 32; n <= 48; n += 16) {
13949 for (size_t k = 1; k <= 40; k += 9) {
13950 GemmMicrokernelTester()
13951 .mr(2)
13952 .nr(16)
13953 .kr(4)
13954 .sr(1)
13955 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080013956 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013957 .k(k)
13958 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013959 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013960 }
13961 }
13962 }
13963
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013964 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013965 TEST_REQUIRES_ARM_NEON;
13966 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080013967 for (uint32_t n = 1; n <= 16; n++) {
13968 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013969 GemmMicrokernelTester()
13970 .mr(2)
13971 .nr(16)
13972 .kr(4)
13973 .sr(1)
13974 .m(m)
13975 .n(n)
13976 .k(k)
13977 .cm_stride(19)
13978 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013979 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013980 }
13981 }
13982 }
13983 }
13984
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013985 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013986 TEST_REQUIRES_ARM_NEON;
13987 for (size_t k = 1; k <= 40; k += 9) {
13988 GemmMicrokernelTester()
13989 .mr(2)
13990 .nr(16)
13991 .kr(4)
13992 .sr(1)
13993 .m(2)
13994 .n(16)
13995 .k(k)
13996 .ks(3)
13997 .a_offset(83)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080013998 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080013999 }
14000 }
14001
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014002 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014003 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080014004 for (size_t k = 1; k <= 40; k += 9) {
14005 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014006 GemmMicrokernelTester()
14007 .mr(2)
14008 .nr(16)
14009 .kr(4)
14010 .sr(1)
14011 .m(2)
14012 .n(16)
14013 .k(k)
14014 .ks(3)
14015 .a_offset(83)
14016 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014017 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014018 }
14019 }
14020 }
14021
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014022 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014023 TEST_REQUIRES_ARM_NEON;
14024 GemmMicrokernelTester()
14025 .mr(2)
14026 .nr(16)
14027 .kr(4)
14028 .sr(1)
14029 .m(2)
14030 .n(16)
14031 .k(8)
14032 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014033 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014034 }
14035
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014036 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014037 TEST_REQUIRES_ARM_NEON;
14038 GemmMicrokernelTester()
14039 .mr(2)
14040 .nr(16)
14041 .kr(4)
14042 .sr(1)
14043 .m(2)
14044 .n(16)
14045 .k(8)
14046 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014047 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014048 }
14049
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014050 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MULL_LD1R, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014051 TEST_REQUIRES_ARM_NEON;
14052 GemmMicrokernelTester()
14053 .mr(2)
14054 .nr(16)
14055 .kr(4)
14056 .sr(1)
14057 .m(2)
14058 .n(16)
14059 .k(8)
14060 .cm_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014061 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014062 }
14063#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
14064
14065
14066#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014067 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_eq_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014068 TEST_REQUIRES_ARM_NEON;
14069 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014070 .mr(3)
14071 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014072 .kr(4)
14073 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014074 .m(3)
14075 .n(16)
14076 .k(8)
14077 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014078 }
14079
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014080 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014081 TEST_REQUIRES_ARM_NEON;
14082 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014083 .mr(3)
14084 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014085 .kr(4)
14086 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014087 .m(3)
14088 .n(16)
14089 .k(8)
14090 .cn_stride(19)
14091 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014092 }
14093
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014094 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_eq_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014095 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014096 for (uint32_t n = 1; n <= 16; n++) {
14097 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014098 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014099 .mr(3)
14100 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014101 .kr(4)
14102 .sr(1)
14103 .m(m)
14104 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014105 .k(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014106 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014107 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014108 }
14109 }
14110 }
14111
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014112 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_eq_8_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014113 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014114 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014115 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014116 .mr(3)
14117 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014118 .kr(4)
14119 .sr(1)
14120 .m(m)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014121 .n(16)
14122 .k(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014123 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014124 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014125 }
14126 }
14127
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014128 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_eq_8_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014129 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014130 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014131 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014132 .mr(3)
14133 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014134 .kr(4)
14135 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014136 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014137 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014138 .k(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014139 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014140 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014141 }
14142 }
14143
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014144 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_lt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014145 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014146 for (size_t k = 1; k < 8; k++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014147 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014148 .mr(3)
14149 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014150 .kr(4)
14151 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014152 .m(3)
14153 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014154 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014155 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014156 }
14157 }
14158
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014159 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_lt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014160 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014161 for (size_t k = 1; k < 8; k++) {
14162 for (uint32_t n = 1; n <= 16; n++) {
14163 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014164 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014165 .mr(3)
14166 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014167 .kr(4)
14168 .sr(1)
14169 .m(m)
14170 .n(n)
14171 .k(k)
14172 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014173 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014174 }
14175 }
14176 }
14177 }
14178
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014179 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014180 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014181 for (size_t k = 9; k < 16; k++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014182 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014183 .mr(3)
14184 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014185 .kr(4)
14186 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014187 .m(3)
14188 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014189 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014190 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014191 }
14192 }
14193
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014194 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014195 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014196 for (size_t k = 9; k < 16; k++) {
14197 for (uint32_t n = 1; n <= 16; n++) {
14198 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014199 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014200 .mr(3)
14201 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014202 .kr(4)
14203 .sr(1)
14204 .m(m)
14205 .n(n)
14206 .k(k)
14207 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014208 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014209 }
14210 }
14211 }
14212 }
14213
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014214 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014215 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014216 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014217 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014218 .mr(3)
14219 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014220 .kr(4)
14221 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014222 .m(3)
14223 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014224 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014225 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014226 }
14227 }
14228
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014229 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, k_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014230 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014231 for (size_t k = 16; k <= 80; k += 8) {
14232 for (uint32_t n = 1; n <= 16; n++) {
14233 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014234 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014235 .mr(3)
14236 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014237 .kr(4)
14238 .sr(1)
14239 .m(m)
14240 .n(n)
14241 .k(k)
14242 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014243 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014244 }
14245 }
14246 }
14247 }
14248
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014249 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, n_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014250 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014251 for (uint32_t n = 17; n < 32; n++) {
14252 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014253 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014254 .mr(3)
14255 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014256 .kr(4)
14257 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014258 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080014259 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014260 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014261 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014262 }
14263 }
14264 }
14265
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014266 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, n_gt_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014267 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014268 for (uint32_t n = 17; n < 32; n++) {
14269 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014270 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014271 .mr(3)
14272 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014273 .kr(4)
14274 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014275 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080014276 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014277 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014278 .cn_stride(19)
14279 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014280 }
14281 }
14282 }
14283
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014284 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, n_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014285 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014286 for (uint32_t n = 17; n < 32; n++) {
14287 for (size_t k = 1; k <= 40; k += 9) {
14288 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014289 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014290 .mr(3)
14291 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014292 .kr(4)
14293 .sr(1)
14294 .m(m)
14295 .n(n)
14296 .k(k)
14297 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014298 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014299 }
14300 }
14301 }
14302 }
14303
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014304 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, n_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014305 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014306 for (uint32_t n = 32; n <= 48; n += 16) {
14307 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014308 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014309 .mr(3)
14310 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014311 .kr(4)
14312 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014313 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080014314 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014315 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014316 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014317 }
14318 }
14319 }
14320
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014321 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, n_div_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014322 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014323 for (uint32_t n = 32; n <= 48; n += 16) {
14324 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014325 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014326 .mr(3)
14327 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014328 .kr(4)
14329 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014330 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014331 .n(n)
14332 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014333 .cn_stride(19)
14334 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014335 }
14336 }
14337 }
14338
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014339 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, n_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014340 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014341 for (uint32_t n = 32; n <= 48; n += 16) {
14342 for (size_t k = 1; k <= 40; k += 9) {
14343 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014344 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014345 .mr(3)
14346 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014347 .kr(4)
14348 .sr(1)
14349 .m(m)
14350 .n(n)
14351 .k(k)
14352 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014353 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014354 }
14355 }
14356 }
14357 }
14358
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014359 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014360 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014361 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014362 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014363 .mr(3)
14364 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014365 .kr(4)
14366 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014367 .m(3)
14368 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014369 .k(k)
14370 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014371 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014372 }
14373 }
14374
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014375 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014376 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014377 for (size_t k = 1; k <= 40; k += 9) {
14378 for (uint32_t n = 1; n <= 16; n++) {
14379 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014380 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014381 .mr(3)
14382 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014383 .kr(4)
14384 .sr(1)
14385 .m(m)
14386 .n(n)
14387 .k(k)
14388 .ks(3)
14389 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014390 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014391 }
14392 }
14393 }
14394 }
14395
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014396 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, n_gt_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014397 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014398 for (uint32_t n = 17; n < 32; n++) {
14399 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014400 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014401 .mr(3)
14402 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014403 .kr(4)
14404 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014405 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080014406 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014407 .k(k)
14408 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014409 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014410 }
14411 }
14412 }
14413
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014414 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, n_div_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014415 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014416 for (uint32_t n = 32; n <= 48; n += 16) {
14417 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014418 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014419 .mr(3)
14420 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014421 .kr(4)
14422 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014423 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080014424 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014425 .k(k)
14426 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014427 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014428 }
14429 }
14430 }
14431
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014432 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014433 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014434 for (size_t k = 1; k <= 40; k += 9) {
14435 for (uint32_t n = 1; n <= 16; n++) {
14436 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014437 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014438 .mr(3)
14439 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014440 .kr(4)
14441 .sr(1)
14442 .m(m)
14443 .n(n)
14444 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014445 .cm_stride(19)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014446 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014447 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080014448 }
14449 }
14450 }
14451 }
14452
Zhi An Nge96b6bc2022-02-03 10:49:46 -080014453 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, a_offset) {
14454 TEST_REQUIRES_ARM_NEON;
14455 for (size_t k = 1; k <= 40; k += 9) {
14456 GemmMicrokernelTester()
14457 .mr(3)
14458 .nr(16)
14459 .kr(4)
14460 .sr(1)
14461 .m(3)
14462 .n(16)
14463 .k(k)
14464 .ks(3)
14465 .a_offset(127)
14466 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14467 }
14468 }
14469
14470 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, zero) {
14471 TEST_REQUIRES_ARM_NEON;
14472 for (size_t k = 1; k <= 40; k += 9) {
14473 for (uint32_t mz = 0; mz < 3; mz++) {
14474 GemmMicrokernelTester()
14475 .mr(3)
14476 .nr(16)
14477 .kr(4)
14478 .sr(1)
14479 .m(3)
14480 .n(16)
14481 .k(k)
14482 .ks(3)
14483 .a_offset(127)
14484 .zero_index(mz)
14485 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14486 }
14487 }
14488 }
14489
14490 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, qmin) {
14491 TEST_REQUIRES_ARM_NEON;
14492 GemmMicrokernelTester()
14493 .mr(3)
14494 .nr(16)
14495 .kr(4)
14496 .sr(1)
14497 .m(3)
14498 .n(16)
14499 .k(8)
14500 .qmin(128)
14501 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14502 }
14503
14504 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, qmax) {
14505 TEST_REQUIRES_ARM_NEON;
14506 GemmMicrokernelTester()
14507 .mr(3)
14508 .nr(16)
14509 .kr(4)
14510 .sr(1)
14511 .m(3)
14512 .n(16)
14513 .k(8)
14514 .qmax(128)
14515 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14516 }
14517
14518 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MULL_LD1R, strided_cm) {
14519 TEST_REQUIRES_ARM_NEON;
14520 GemmMicrokernelTester()
14521 .mr(3)
14522 .nr(16)
14523 .kr(4)
14524 .sr(1)
14525 .m(3)
14526 .n(16)
14527 .k(8)
14528 .cm_stride(19)
14529 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14530 }
14531#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
14532
14533
14534#if XNN_ARCH_ARM || XNN_ARCH_ARM64
14535 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_eq_8) {
14536 TEST_REQUIRES_ARM_NEON;
14537 GemmMicrokernelTester()
14538 .mr(4)
14539 .nr(16)
14540 .kr(4)
14541 .sr(1)
14542 .m(4)
14543 .n(16)
14544 .k(8)
14545 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14546 }
14547
14548 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, strided_cn) {
14549 TEST_REQUIRES_ARM_NEON;
14550 GemmMicrokernelTester()
14551 .mr(4)
14552 .nr(16)
14553 .kr(4)
14554 .sr(1)
14555 .m(4)
14556 .n(16)
14557 .k(8)
14558 .cn_stride(19)
14559 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14560 }
14561
14562 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_eq_8_subtile) {
14563 TEST_REQUIRES_ARM_NEON;
14564 for (uint32_t n = 1; n <= 16; n++) {
14565 for (uint32_t m = 1; m <= 4; m++) {
14566 GemmMicrokernelTester()
14567 .mr(4)
14568 .nr(16)
14569 .kr(4)
14570 .sr(1)
14571 .m(m)
14572 .n(n)
14573 .k(8)
14574 .iterations(1)
14575 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14576 }
14577 }
14578 }
14579
14580 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_eq_8_subtile_m) {
14581 TEST_REQUIRES_ARM_NEON;
14582 for (uint32_t m = 1; m <= 4; m++) {
14583 GemmMicrokernelTester()
14584 .mr(4)
14585 .nr(16)
14586 .kr(4)
14587 .sr(1)
14588 .m(m)
14589 .n(16)
14590 .k(8)
14591 .iterations(1)
14592 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14593 }
14594 }
14595
14596 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_eq_8_subtile_n) {
14597 TEST_REQUIRES_ARM_NEON;
14598 for (uint32_t n = 1; n <= 16; n++) {
14599 GemmMicrokernelTester()
14600 .mr(4)
14601 .nr(16)
14602 .kr(4)
14603 .sr(1)
14604 .m(4)
14605 .n(n)
14606 .k(8)
14607 .iterations(1)
14608 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14609 }
14610 }
14611
14612 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_lt_8) {
14613 TEST_REQUIRES_ARM_NEON;
14614 for (size_t k = 1; k < 8; k++) {
14615 GemmMicrokernelTester()
14616 .mr(4)
14617 .nr(16)
14618 .kr(4)
14619 .sr(1)
14620 .m(4)
14621 .n(16)
14622 .k(k)
14623 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14624 }
14625 }
14626
14627 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_lt_8_subtile) {
14628 TEST_REQUIRES_ARM_NEON;
14629 for (size_t k = 1; k < 8; k++) {
14630 for (uint32_t n = 1; n <= 16; n++) {
14631 for (uint32_t m = 1; m <= 4; m++) {
14632 GemmMicrokernelTester()
14633 .mr(4)
14634 .nr(16)
14635 .kr(4)
14636 .sr(1)
14637 .m(m)
14638 .n(n)
14639 .k(k)
14640 .iterations(1)
14641 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14642 }
14643 }
14644 }
14645 }
14646
14647 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_gt_8) {
14648 TEST_REQUIRES_ARM_NEON;
14649 for (size_t k = 9; k < 16; k++) {
14650 GemmMicrokernelTester()
14651 .mr(4)
14652 .nr(16)
14653 .kr(4)
14654 .sr(1)
14655 .m(4)
14656 .n(16)
14657 .k(k)
14658 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14659 }
14660 }
14661
14662 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_gt_8_subtile) {
14663 TEST_REQUIRES_ARM_NEON;
14664 for (size_t k = 9; k < 16; k++) {
14665 for (uint32_t n = 1; n <= 16; n++) {
14666 for (uint32_t m = 1; m <= 4; m++) {
14667 GemmMicrokernelTester()
14668 .mr(4)
14669 .nr(16)
14670 .kr(4)
14671 .sr(1)
14672 .m(m)
14673 .n(n)
14674 .k(k)
14675 .iterations(1)
14676 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14677 }
14678 }
14679 }
14680 }
14681
14682 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_div_8) {
14683 TEST_REQUIRES_ARM_NEON;
14684 for (size_t k = 16; k <= 80; k += 8) {
14685 GemmMicrokernelTester()
14686 .mr(4)
14687 .nr(16)
14688 .kr(4)
14689 .sr(1)
14690 .m(4)
14691 .n(16)
14692 .k(k)
14693 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14694 }
14695 }
14696
14697 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, k_div_8_subtile) {
14698 TEST_REQUIRES_ARM_NEON;
14699 for (size_t k = 16; k <= 80; k += 8) {
14700 for (uint32_t n = 1; n <= 16; n++) {
14701 for (uint32_t m = 1; m <= 4; m++) {
14702 GemmMicrokernelTester()
14703 .mr(4)
14704 .nr(16)
14705 .kr(4)
14706 .sr(1)
14707 .m(m)
14708 .n(n)
14709 .k(k)
14710 .iterations(1)
14711 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14712 }
14713 }
14714 }
14715 }
14716
14717 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, n_gt_16) {
14718 TEST_REQUIRES_ARM_NEON;
14719 for (uint32_t n = 17; n < 32; n++) {
14720 for (size_t k = 1; k <= 40; k += 9) {
14721 GemmMicrokernelTester()
14722 .mr(4)
14723 .nr(16)
14724 .kr(4)
14725 .sr(1)
14726 .m(4)
14727 .n(n)
14728 .k(k)
14729 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14730 }
14731 }
14732 }
14733
14734 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, n_gt_16_strided_cn) {
14735 TEST_REQUIRES_ARM_NEON;
14736 for (uint32_t n = 17; n < 32; n++) {
14737 for (size_t k = 1; k <= 40; k += 9) {
14738 GemmMicrokernelTester()
14739 .mr(4)
14740 .nr(16)
14741 .kr(4)
14742 .sr(1)
14743 .m(4)
14744 .n(n)
14745 .k(k)
14746 .cn_stride(19)
14747 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14748 }
14749 }
14750 }
14751
14752 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, n_gt_16_subtile) {
14753 TEST_REQUIRES_ARM_NEON;
14754 for (uint32_t n = 17; n < 32; n++) {
14755 for (size_t k = 1; k <= 40; k += 9) {
14756 for (uint32_t m = 1; m <= 4; m++) {
14757 GemmMicrokernelTester()
14758 .mr(4)
14759 .nr(16)
14760 .kr(4)
14761 .sr(1)
14762 .m(m)
14763 .n(n)
14764 .k(k)
14765 .iterations(1)
14766 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14767 }
14768 }
14769 }
14770 }
14771
14772 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, n_div_16) {
14773 TEST_REQUIRES_ARM_NEON;
14774 for (uint32_t n = 32; n <= 48; n += 16) {
14775 for (size_t k = 1; k <= 40; k += 9) {
14776 GemmMicrokernelTester()
14777 .mr(4)
14778 .nr(16)
14779 .kr(4)
14780 .sr(1)
14781 .m(4)
14782 .n(n)
14783 .k(k)
14784 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14785 }
14786 }
14787 }
14788
14789 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, n_div_16_strided_cn) {
14790 TEST_REQUIRES_ARM_NEON;
14791 for (uint32_t n = 32; n <= 48; n += 16) {
14792 for (size_t k = 1; k <= 40; k += 9) {
14793 GemmMicrokernelTester()
14794 .mr(4)
14795 .nr(16)
14796 .kr(4)
14797 .sr(1)
14798 .m(4)
14799 .n(n)
14800 .k(k)
14801 .cn_stride(19)
14802 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14803 }
14804 }
14805 }
14806
14807 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, n_div_16_subtile) {
14808 TEST_REQUIRES_ARM_NEON;
14809 for (uint32_t n = 32; n <= 48; n += 16) {
14810 for (size_t k = 1; k <= 40; k += 9) {
14811 for (uint32_t m = 1; m <= 4; m++) {
14812 GemmMicrokernelTester()
14813 .mr(4)
14814 .nr(16)
14815 .kr(4)
14816 .sr(1)
14817 .m(m)
14818 .n(n)
14819 .k(k)
14820 .iterations(1)
14821 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14822 }
14823 }
14824 }
14825 }
14826
14827 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, small_kernel) {
14828 TEST_REQUIRES_ARM_NEON;
14829 for (size_t k = 1; k <= 40; k += 9) {
14830 GemmMicrokernelTester()
14831 .mr(4)
14832 .nr(16)
14833 .kr(4)
14834 .sr(1)
14835 .m(4)
14836 .n(16)
14837 .k(k)
14838 .ks(3)
14839 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14840 }
14841 }
14842
14843 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, small_kernel_subtile) {
14844 TEST_REQUIRES_ARM_NEON;
14845 for (size_t k = 1; k <= 40; k += 9) {
14846 for (uint32_t n = 1; n <= 16; n++) {
14847 for (uint32_t m = 1; m <= 4; m++) {
14848 GemmMicrokernelTester()
14849 .mr(4)
14850 .nr(16)
14851 .kr(4)
14852 .sr(1)
14853 .m(m)
14854 .n(n)
14855 .k(k)
14856 .ks(3)
14857 .iterations(1)
14858 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14859 }
14860 }
14861 }
14862 }
14863
14864 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, n_gt_16_small_kernel) {
14865 TEST_REQUIRES_ARM_NEON;
14866 for (uint32_t n = 17; n < 32; n++) {
14867 for (size_t k = 1; k <= 40; k += 9) {
14868 GemmMicrokernelTester()
14869 .mr(4)
14870 .nr(16)
14871 .kr(4)
14872 .sr(1)
14873 .m(4)
14874 .n(n)
14875 .k(k)
14876 .ks(3)
14877 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14878 }
14879 }
14880 }
14881
14882 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, n_div_16_small_kernel) {
14883 TEST_REQUIRES_ARM_NEON;
14884 for (uint32_t n = 32; n <= 48; n += 16) {
14885 for (size_t k = 1; k <= 40; k += 9) {
14886 GemmMicrokernelTester()
14887 .mr(4)
14888 .nr(16)
14889 .kr(4)
14890 .sr(1)
14891 .m(4)
14892 .n(n)
14893 .k(k)
14894 .ks(3)
14895 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14896 }
14897 }
14898 }
14899
14900 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, strided_cm_subtile) {
14901 TEST_REQUIRES_ARM_NEON;
14902 for (size_t k = 1; k <= 40; k += 9) {
14903 for (uint32_t n = 1; n <= 16; n++) {
14904 for (uint32_t m = 1; m <= 4; m++) {
14905 GemmMicrokernelTester()
14906 .mr(4)
14907 .nr(16)
14908 .kr(4)
14909 .sr(1)
14910 .m(m)
14911 .n(n)
14912 .k(k)
14913 .cm_stride(19)
14914 .iterations(1)
14915 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14916 }
14917 }
14918 }
14919 }
14920
14921 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, a_offset) {
14922 TEST_REQUIRES_ARM_NEON;
14923 for (size_t k = 1; k <= 40; k += 9) {
14924 GemmMicrokernelTester()
14925 .mr(4)
14926 .nr(16)
14927 .kr(4)
14928 .sr(1)
14929 .m(4)
14930 .n(16)
14931 .k(k)
14932 .ks(3)
14933 .a_offset(163)
14934 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14935 }
14936 }
14937
14938 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, zero) {
14939 TEST_REQUIRES_ARM_NEON;
14940 for (size_t k = 1; k <= 40; k += 9) {
14941 for (uint32_t mz = 0; mz < 4; mz++) {
14942 GemmMicrokernelTester()
14943 .mr(4)
14944 .nr(16)
14945 .kr(4)
14946 .sr(1)
14947 .m(4)
14948 .n(16)
14949 .k(k)
14950 .ks(3)
14951 .a_offset(163)
14952 .zero_index(mz)
14953 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14954 }
14955 }
14956 }
14957
14958 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, qmin) {
14959 TEST_REQUIRES_ARM_NEON;
14960 GemmMicrokernelTester()
14961 .mr(4)
14962 .nr(16)
14963 .kr(4)
14964 .sr(1)
14965 .m(4)
14966 .n(16)
14967 .k(8)
14968 .qmin(128)
14969 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14970 }
14971
14972 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, qmax) {
14973 TEST_REQUIRES_ARM_NEON;
14974 GemmMicrokernelTester()
14975 .mr(4)
14976 .nr(16)
14977 .kr(4)
14978 .sr(1)
14979 .m(4)
14980 .n(16)
14981 .k(8)
14982 .qmax(128)
14983 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14984 }
14985
14986 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MULL_LD1R, strided_cm) {
14987 TEST_REQUIRES_ARM_NEON;
14988 GemmMicrokernelTester()
14989 .mr(4)
14990 .nr(16)
14991 .kr(4)
14992 .sr(1)
14993 .m(4)
14994 .n(16)
14995 .k(8)
14996 .cm_stride(19)
14997 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mull_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
14998 }
14999#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
15000
15001
15002#if XNN_ARCH_ARM || XNN_ARCH_ARM64
15003 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_eq_16) {
15004 TEST_REQUIRES_ARM_NEON;
15005 GemmMicrokernelTester()
15006 .mr(1)
15007 .nr(16)
15008 .kr(4)
15009 .sr(1)
15010 .m(1)
15011 .n(16)
15012 .k(16)
15013 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15014 }
15015
15016 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, strided_cn) {
15017 TEST_REQUIRES_ARM_NEON;
15018 GemmMicrokernelTester()
15019 .mr(1)
15020 .nr(16)
15021 .kr(4)
15022 .sr(1)
15023 .m(1)
15024 .n(16)
15025 .k(16)
15026 .cn_stride(19)
15027 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15028 }
15029
15030 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_eq_16_subtile) {
15031 TEST_REQUIRES_ARM_NEON;
15032 for (uint32_t n = 1; n <= 16; n++) {
15033 for (uint32_t m = 1; m <= 1; m++) {
15034 GemmMicrokernelTester()
15035 .mr(1)
15036 .nr(16)
15037 .kr(4)
15038 .sr(1)
15039 .m(m)
15040 .n(n)
15041 .k(16)
15042 .iterations(1)
15043 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15044 }
15045 }
15046 }
15047
15048 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_eq_16_subtile_m) {
15049 TEST_REQUIRES_ARM_NEON;
15050 for (uint32_t m = 1; m <= 1; m++) {
15051 GemmMicrokernelTester()
15052 .mr(1)
15053 .nr(16)
15054 .kr(4)
15055 .sr(1)
15056 .m(m)
15057 .n(16)
15058 .k(16)
15059 .iterations(1)
15060 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15061 }
15062 }
15063
15064 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_eq_16_subtile_n) {
15065 TEST_REQUIRES_ARM_NEON;
15066 for (uint32_t n = 1; n <= 16; n++) {
15067 GemmMicrokernelTester()
15068 .mr(1)
15069 .nr(16)
15070 .kr(4)
15071 .sr(1)
15072 .m(1)
15073 .n(n)
15074 .k(16)
15075 .iterations(1)
15076 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15077 }
15078 }
15079
15080 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_lt_16) {
15081 TEST_REQUIRES_ARM_NEON;
15082 for (size_t k = 1; k < 16; k++) {
15083 GemmMicrokernelTester()
15084 .mr(1)
15085 .nr(16)
15086 .kr(4)
15087 .sr(1)
15088 .m(1)
15089 .n(16)
15090 .k(k)
15091 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15092 }
15093 }
15094
15095 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_lt_16_subtile) {
15096 TEST_REQUIRES_ARM_NEON;
15097 for (size_t k = 1; k < 16; k++) {
15098 for (uint32_t n = 1; n <= 16; n++) {
15099 for (uint32_t m = 1; m <= 1; m++) {
15100 GemmMicrokernelTester()
15101 .mr(1)
15102 .nr(16)
15103 .kr(4)
15104 .sr(1)
15105 .m(m)
15106 .n(n)
15107 .k(k)
15108 .iterations(1)
15109 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15110 }
15111 }
15112 }
15113 }
15114
15115 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_gt_16) {
15116 TEST_REQUIRES_ARM_NEON;
15117 for (size_t k = 17; k < 32; k++) {
15118 GemmMicrokernelTester()
15119 .mr(1)
15120 .nr(16)
15121 .kr(4)
15122 .sr(1)
15123 .m(1)
15124 .n(16)
15125 .k(k)
15126 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15127 }
15128 }
15129
15130 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_gt_16_subtile) {
15131 TEST_REQUIRES_ARM_NEON;
15132 for (size_t k = 17; k < 32; k++) {
15133 for (uint32_t n = 1; n <= 16; n++) {
15134 for (uint32_t m = 1; m <= 1; m++) {
15135 GemmMicrokernelTester()
15136 .mr(1)
15137 .nr(16)
15138 .kr(4)
15139 .sr(1)
15140 .m(m)
15141 .n(n)
15142 .k(k)
15143 .iterations(1)
15144 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15145 }
15146 }
15147 }
15148 }
15149
15150 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_div_16) {
15151 TEST_REQUIRES_ARM_NEON;
15152 for (size_t k = 32; k <= 160; k += 16) {
15153 GemmMicrokernelTester()
15154 .mr(1)
15155 .nr(16)
15156 .kr(4)
15157 .sr(1)
15158 .m(1)
15159 .n(16)
15160 .k(k)
15161 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15162 }
15163 }
15164
15165 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, k_div_16_subtile) {
15166 TEST_REQUIRES_ARM_NEON;
15167 for (size_t k = 32; k <= 160; k += 16) {
15168 for (uint32_t n = 1; n <= 16; n++) {
15169 for (uint32_t m = 1; m <= 1; m++) {
15170 GemmMicrokernelTester()
15171 .mr(1)
15172 .nr(16)
15173 .kr(4)
15174 .sr(1)
15175 .m(m)
15176 .n(n)
15177 .k(k)
15178 .iterations(1)
15179 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15180 }
15181 }
15182 }
15183 }
15184
15185 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, n_gt_16) {
15186 TEST_REQUIRES_ARM_NEON;
15187 for (uint32_t n = 17; n < 32; n++) {
15188 for (size_t k = 1; k <= 80; k += 17) {
15189 GemmMicrokernelTester()
15190 .mr(1)
15191 .nr(16)
15192 .kr(4)
15193 .sr(1)
15194 .m(1)
15195 .n(n)
15196 .k(k)
15197 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15198 }
15199 }
15200 }
15201
15202 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, n_gt_16_strided_cn) {
15203 TEST_REQUIRES_ARM_NEON;
15204 for (uint32_t n = 17; n < 32; n++) {
15205 for (size_t k = 1; k <= 80; k += 17) {
15206 GemmMicrokernelTester()
15207 .mr(1)
15208 .nr(16)
15209 .kr(4)
15210 .sr(1)
15211 .m(1)
15212 .n(n)
15213 .k(k)
15214 .cn_stride(19)
15215 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15216 }
15217 }
15218 }
15219
15220 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, n_gt_16_subtile) {
15221 TEST_REQUIRES_ARM_NEON;
15222 for (uint32_t n = 17; n < 32; n++) {
15223 for (size_t k = 1; k <= 80; k += 17) {
15224 for (uint32_t m = 1; m <= 1; m++) {
15225 GemmMicrokernelTester()
15226 .mr(1)
15227 .nr(16)
15228 .kr(4)
15229 .sr(1)
15230 .m(m)
15231 .n(n)
15232 .k(k)
15233 .iterations(1)
15234 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15235 }
15236 }
15237 }
15238 }
15239
15240 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, n_div_16) {
15241 TEST_REQUIRES_ARM_NEON;
15242 for (uint32_t n = 32; n <= 48; n += 16) {
15243 for (size_t k = 1; k <= 80; k += 17) {
15244 GemmMicrokernelTester()
15245 .mr(1)
15246 .nr(16)
15247 .kr(4)
15248 .sr(1)
15249 .m(1)
15250 .n(n)
15251 .k(k)
15252 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15253 }
15254 }
15255 }
15256
15257 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, n_div_16_strided_cn) {
15258 TEST_REQUIRES_ARM_NEON;
15259 for (uint32_t n = 32; n <= 48; n += 16) {
15260 for (size_t k = 1; k <= 80; k += 17) {
15261 GemmMicrokernelTester()
15262 .mr(1)
15263 .nr(16)
15264 .kr(4)
15265 .sr(1)
15266 .m(1)
15267 .n(n)
15268 .k(k)
15269 .cn_stride(19)
15270 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15271 }
15272 }
15273 }
15274
15275 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, n_div_16_subtile) {
15276 TEST_REQUIRES_ARM_NEON;
15277 for (uint32_t n = 32; n <= 48; n += 16) {
15278 for (size_t k = 1; k <= 80; k += 17) {
15279 for (uint32_t m = 1; m <= 1; m++) {
15280 GemmMicrokernelTester()
15281 .mr(1)
15282 .nr(16)
15283 .kr(4)
15284 .sr(1)
15285 .m(m)
15286 .n(n)
15287 .k(k)
15288 .iterations(1)
15289 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15290 }
15291 }
15292 }
15293 }
15294
15295 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015296 TEST_REQUIRES_ARM_NEON;
15297 for (size_t k = 1; k <= 80; k += 17) {
15298 GemmMicrokernelTester()
15299 .mr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015300 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015301 .kr(4)
15302 .sr(1)
15303 .m(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015304 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015305 .k(k)
15306 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015307 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015308 }
15309 }
15310
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015311 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, small_kernel_subtile) {
15312 TEST_REQUIRES_ARM_NEON;
15313 for (size_t k = 1; k <= 80; k += 17) {
15314 for (uint32_t n = 1; n <= 16; n++) {
15315 for (uint32_t m = 1; m <= 1; m++) {
15316 GemmMicrokernelTester()
15317 .mr(1)
15318 .nr(16)
15319 .kr(4)
15320 .sr(1)
15321 .m(m)
15322 .n(n)
15323 .k(k)
15324 .ks(3)
15325 .iterations(1)
15326 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15327 }
15328 }
15329 }
15330 }
15331
15332 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, n_gt_16_small_kernel) {
15333 TEST_REQUIRES_ARM_NEON;
15334 for (uint32_t n = 17; n < 32; n++) {
15335 for (size_t k = 1; k <= 80; k += 17) {
15336 GemmMicrokernelTester()
15337 .mr(1)
15338 .nr(16)
15339 .kr(4)
15340 .sr(1)
15341 .m(1)
15342 .n(n)
15343 .k(k)
15344 .ks(3)
15345 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15346 }
15347 }
15348 }
15349
15350 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, n_div_16_small_kernel) {
15351 TEST_REQUIRES_ARM_NEON;
15352 for (uint32_t n = 32; n <= 48; n += 16) {
15353 for (size_t k = 1; k <= 80; k += 17) {
15354 GemmMicrokernelTester()
15355 .mr(1)
15356 .nr(16)
15357 .kr(4)
15358 .sr(1)
15359 .m(1)
15360 .n(n)
15361 .k(k)
15362 .ks(3)
15363 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15364 }
15365 }
15366 }
15367
15368 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, strided_cm_subtile) {
15369 TEST_REQUIRES_ARM_NEON;
15370 for (size_t k = 1; k <= 80; k += 17) {
15371 for (uint32_t n = 1; n <= 16; n++) {
15372 for (uint32_t m = 1; m <= 1; m++) {
15373 GemmMicrokernelTester()
15374 .mr(1)
15375 .nr(16)
15376 .kr(4)
15377 .sr(1)
15378 .m(m)
15379 .n(n)
15380 .k(k)
15381 .cm_stride(19)
15382 .iterations(1)
15383 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15384 }
15385 }
15386 }
15387 }
15388
15389 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, a_offset) {
15390 TEST_REQUIRES_ARM_NEON;
15391 for (size_t k = 1; k <= 80; k += 17) {
15392 GemmMicrokernelTester()
15393 .mr(1)
15394 .nr(16)
15395 .kr(4)
15396 .sr(1)
15397 .m(1)
15398 .n(16)
15399 .k(k)
15400 .ks(3)
15401 .a_offset(83)
15402 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
15403 }
15404 }
15405
15406 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015407 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080015408 for (size_t k = 1; k <= 80; k += 17) {
15409 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015410 GemmMicrokernelTester()
15411 .mr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015412 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015413 .kr(4)
15414 .sr(1)
15415 .m(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015416 .n(16)
15417 .k(k)
15418 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015419 .a_offset(83)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015420 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015421 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015422 }
15423 }
15424 }
15425
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015426 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, qmin) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015427 TEST_REQUIRES_ARM_NEON;
15428 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015429 .mr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015430 .nr(16)
15431 .kr(4)
15432 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015433 .m(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015434 .n(16)
15435 .k(16)
15436 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015437 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015438 }
15439
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015440 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, qmax) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015441 TEST_REQUIRES_ARM_NEON;
15442 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015443 .mr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015444 .nr(16)
15445 .kr(4)
15446 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015447 .m(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015448 .n(16)
15449 .k(16)
15450 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015451 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015452 }
15453
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015454 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEON_MLAL_LD1R, strided_cm) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015455 TEST_REQUIRES_ARM_NEON;
15456 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015457 .mr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015458 .nr(16)
15459 .kr(4)
15460 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015461 .m(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080015462 .n(16)
15463 .k(16)
15464 .cm_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015465 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015466 }
15467#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
15468
15469
15470#if XNN_ARCH_ARM || XNN_ARCH_ARM64
15471 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_eq_16) {
15472 TEST_REQUIRES_ARM_NEON;
15473 GemmMicrokernelTester()
15474 .mr(2)
15475 .nr(16)
15476 .kr(4)
15477 .sr(1)
15478 .m(2)
15479 .n(16)
15480 .k(16)
Marat Dukhan50323b82022-01-11 00:12:01 -080015481 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015482 }
15483
15484 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, strided_cn) {
15485 TEST_REQUIRES_ARM_NEON;
15486 GemmMicrokernelTester()
15487 .mr(2)
15488 .nr(16)
15489 .kr(4)
15490 .sr(1)
15491 .m(2)
15492 .n(16)
15493 .k(16)
15494 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080015495 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015496 }
15497
15498 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_eq_16_subtile) {
15499 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080015500 for (uint32_t n = 1; n <= 16; n++) {
15501 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015502 GemmMicrokernelTester()
15503 .mr(2)
15504 .nr(16)
15505 .kr(4)
15506 .sr(1)
15507 .m(m)
15508 .n(n)
15509 .k(16)
15510 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015511 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015512 }
15513 }
15514 }
15515
15516 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_eq_16_subtile_m) {
15517 TEST_REQUIRES_ARM_NEON;
15518 for (uint32_t m = 1; m <= 2; m++) {
15519 GemmMicrokernelTester()
15520 .mr(2)
15521 .nr(16)
15522 .kr(4)
15523 .sr(1)
15524 .m(m)
15525 .n(16)
15526 .k(16)
15527 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015528 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015529 }
15530 }
15531
15532 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_eq_16_subtile_n) {
15533 TEST_REQUIRES_ARM_NEON;
15534 for (uint32_t n = 1; n <= 16; n++) {
15535 GemmMicrokernelTester()
15536 .mr(2)
15537 .nr(16)
15538 .kr(4)
15539 .sr(1)
15540 .m(2)
15541 .n(n)
15542 .k(16)
15543 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015544 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015545 }
15546 }
15547
15548 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_lt_16) {
15549 TEST_REQUIRES_ARM_NEON;
15550 for (size_t k = 1; k < 16; k++) {
15551 GemmMicrokernelTester()
15552 .mr(2)
15553 .nr(16)
15554 .kr(4)
15555 .sr(1)
15556 .m(2)
15557 .n(16)
15558 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080015559 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015560 }
15561 }
15562
15563 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_lt_16_subtile) {
15564 TEST_REQUIRES_ARM_NEON;
15565 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080015566 for (uint32_t n = 1; n <= 16; n++) {
15567 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015568 GemmMicrokernelTester()
15569 .mr(2)
15570 .nr(16)
15571 .kr(4)
15572 .sr(1)
15573 .m(m)
15574 .n(n)
15575 .k(k)
15576 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015577 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015578 }
15579 }
15580 }
15581 }
15582
15583 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_gt_16) {
15584 TEST_REQUIRES_ARM_NEON;
15585 for (size_t k = 17; k < 32; k++) {
15586 GemmMicrokernelTester()
15587 .mr(2)
15588 .nr(16)
15589 .kr(4)
15590 .sr(1)
15591 .m(2)
15592 .n(16)
15593 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080015594 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015595 }
15596 }
15597
15598 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_gt_16_subtile) {
15599 TEST_REQUIRES_ARM_NEON;
15600 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080015601 for (uint32_t n = 1; n <= 16; n++) {
15602 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015603 GemmMicrokernelTester()
15604 .mr(2)
15605 .nr(16)
15606 .kr(4)
15607 .sr(1)
15608 .m(m)
15609 .n(n)
15610 .k(k)
15611 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015612 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015613 }
15614 }
15615 }
15616 }
15617
15618 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_div_16) {
15619 TEST_REQUIRES_ARM_NEON;
15620 for (size_t k = 32; k <= 160; k += 16) {
15621 GemmMicrokernelTester()
15622 .mr(2)
15623 .nr(16)
15624 .kr(4)
15625 .sr(1)
15626 .m(2)
15627 .n(16)
15628 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080015629 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015630 }
15631 }
15632
15633 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, k_div_16_subtile) {
15634 TEST_REQUIRES_ARM_NEON;
15635 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080015636 for (uint32_t n = 1; n <= 16; n++) {
15637 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015638 GemmMicrokernelTester()
15639 .mr(2)
15640 .nr(16)
15641 .kr(4)
15642 .sr(1)
15643 .m(m)
15644 .n(n)
15645 .k(k)
15646 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015647 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015648 }
15649 }
15650 }
15651 }
15652
15653 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, n_gt_16) {
15654 TEST_REQUIRES_ARM_NEON;
15655 for (uint32_t n = 17; n < 32; n++) {
15656 for (size_t k = 1; k <= 80; k += 17) {
15657 GemmMicrokernelTester()
15658 .mr(2)
15659 .nr(16)
15660 .kr(4)
15661 .sr(1)
15662 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080015663 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015664 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080015665 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015666 }
15667 }
15668 }
15669
15670 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, n_gt_16_strided_cn) {
15671 TEST_REQUIRES_ARM_NEON;
15672 for (uint32_t n = 17; n < 32; n++) {
15673 for (size_t k = 1; k <= 80; k += 17) {
15674 GemmMicrokernelTester()
15675 .mr(2)
15676 .nr(16)
15677 .kr(4)
15678 .sr(1)
15679 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080015680 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015681 .k(k)
15682 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080015683 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015684 }
15685 }
15686 }
15687
15688 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, n_gt_16_subtile) {
15689 TEST_REQUIRES_ARM_NEON;
15690 for (uint32_t n = 17; n < 32; n++) {
15691 for (size_t k = 1; k <= 80; k += 17) {
15692 for (uint32_t m = 1; m <= 2; m++) {
15693 GemmMicrokernelTester()
15694 .mr(2)
15695 .nr(16)
15696 .kr(4)
15697 .sr(1)
15698 .m(m)
15699 .n(n)
15700 .k(k)
15701 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015702 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015703 }
15704 }
15705 }
15706 }
15707
15708 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, n_div_16) {
15709 TEST_REQUIRES_ARM_NEON;
15710 for (uint32_t n = 32; n <= 48; n += 16) {
15711 for (size_t k = 1; k <= 80; k += 17) {
15712 GemmMicrokernelTester()
15713 .mr(2)
15714 .nr(16)
15715 .kr(4)
15716 .sr(1)
15717 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080015718 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015719 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080015720 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015721 }
15722 }
15723 }
15724
15725 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, n_div_16_strided_cn) {
15726 TEST_REQUIRES_ARM_NEON;
15727 for (uint32_t n = 32; n <= 48; n += 16) {
15728 for (size_t k = 1; k <= 80; k += 17) {
15729 GemmMicrokernelTester()
15730 .mr(2)
15731 .nr(16)
15732 .kr(4)
15733 .sr(1)
15734 .m(2)
15735 .n(n)
15736 .k(k)
15737 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080015738 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015739 }
15740 }
15741 }
15742
15743 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, n_div_16_subtile) {
15744 TEST_REQUIRES_ARM_NEON;
15745 for (uint32_t n = 32; n <= 48; n += 16) {
15746 for (size_t k = 1; k <= 80; k += 17) {
15747 for (uint32_t m = 1; m <= 2; m++) {
15748 GemmMicrokernelTester()
15749 .mr(2)
15750 .nr(16)
15751 .kr(4)
15752 .sr(1)
15753 .m(m)
15754 .n(n)
15755 .k(k)
15756 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015757 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015758 }
15759 }
15760 }
15761 }
15762
15763 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, small_kernel) {
15764 TEST_REQUIRES_ARM_NEON;
15765 for (size_t k = 1; k <= 80; k += 17) {
15766 GemmMicrokernelTester()
15767 .mr(2)
15768 .nr(16)
15769 .kr(4)
15770 .sr(1)
15771 .m(2)
15772 .n(16)
15773 .k(k)
15774 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080015775 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015776 }
15777 }
15778
15779 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, small_kernel_subtile) {
15780 TEST_REQUIRES_ARM_NEON;
15781 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080015782 for (uint32_t n = 1; n <= 16; n++) {
15783 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015784 GemmMicrokernelTester()
15785 .mr(2)
15786 .nr(16)
15787 .kr(4)
15788 .sr(1)
15789 .m(m)
15790 .n(n)
15791 .k(k)
15792 .ks(3)
15793 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015794 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015795 }
15796 }
15797 }
15798 }
15799
15800 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, n_gt_16_small_kernel) {
15801 TEST_REQUIRES_ARM_NEON;
15802 for (uint32_t n = 17; n < 32; n++) {
15803 for (size_t k = 1; k <= 80; k += 17) {
15804 GemmMicrokernelTester()
15805 .mr(2)
15806 .nr(16)
15807 .kr(4)
15808 .sr(1)
15809 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080015810 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015811 .k(k)
15812 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080015813 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015814 }
15815 }
15816 }
15817
15818 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, n_div_16_small_kernel) {
15819 TEST_REQUIRES_ARM_NEON;
15820 for (uint32_t n = 32; n <= 48; n += 16) {
15821 for (size_t k = 1; k <= 80; k += 17) {
15822 GemmMicrokernelTester()
15823 .mr(2)
15824 .nr(16)
15825 .kr(4)
15826 .sr(1)
15827 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080015828 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015829 .k(k)
15830 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080015831 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015832 }
15833 }
15834 }
15835
15836 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, strided_cm_subtile) {
15837 TEST_REQUIRES_ARM_NEON;
15838 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080015839 for (uint32_t n = 1; n <= 16; n++) {
15840 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015841 GemmMicrokernelTester()
15842 .mr(2)
15843 .nr(16)
15844 .kr(4)
15845 .sr(1)
15846 .m(m)
15847 .n(n)
15848 .k(k)
15849 .cm_stride(19)
15850 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080015851 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015852 }
15853 }
15854 }
15855 }
15856
15857 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, a_offset) {
15858 TEST_REQUIRES_ARM_NEON;
15859 for (size_t k = 1; k <= 80; k += 17) {
15860 GemmMicrokernelTester()
15861 .mr(2)
15862 .nr(16)
15863 .kr(4)
15864 .sr(1)
15865 .m(2)
15866 .n(16)
15867 .k(k)
15868 .ks(3)
15869 .a_offset(163)
Marat Dukhan50323b82022-01-11 00:12:01 -080015870 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015871 }
15872 }
15873
15874 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, zero) {
15875 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080015876 for (size_t k = 1; k <= 80; k += 17) {
15877 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015878 GemmMicrokernelTester()
15879 .mr(2)
15880 .nr(16)
15881 .kr(4)
15882 .sr(1)
15883 .m(2)
15884 .n(16)
15885 .k(k)
15886 .ks(3)
15887 .a_offset(163)
15888 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080015889 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015890 }
15891 }
15892 }
15893
15894 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, qmin) {
15895 TEST_REQUIRES_ARM_NEON;
15896 GemmMicrokernelTester()
15897 .mr(2)
15898 .nr(16)
15899 .kr(4)
15900 .sr(1)
15901 .m(2)
15902 .n(16)
15903 .k(16)
15904 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080015905 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015906 }
15907
15908 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, qmax) {
15909 TEST_REQUIRES_ARM_NEON;
15910 GemmMicrokernelTester()
15911 .mr(2)
15912 .nr(16)
15913 .kr(4)
15914 .sr(1)
15915 .m(2)
15916 .n(16)
15917 .k(16)
15918 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080015919 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015920 }
15921
15922 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C4__NEON_MLAL_LD1R, strided_cm) {
15923 TEST_REQUIRES_ARM_NEON;
15924 GemmMicrokernelTester()
15925 .mr(2)
15926 .nr(16)
15927 .kr(4)
15928 .sr(1)
15929 .m(2)
15930 .n(16)
15931 .k(16)
15932 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080015933 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015934 }
15935#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
15936
15937
15938#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015939 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015940 TEST_REQUIRES_ARM_NEON;
15941 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015942 .mr(3)
15943 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015944 .kr(4)
15945 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015946 .m(3)
15947 .n(16)
15948 .k(16)
15949 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015950 }
15951
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015952 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015953 TEST_REQUIRES_ARM_NEON;
15954 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015955 .mr(3)
15956 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015957 .kr(4)
15958 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015959 .m(3)
15960 .n(16)
15961 .k(16)
15962 .cn_stride(19)
15963 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015964 }
15965
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015966 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_eq_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015967 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015968 for (uint32_t n = 1; n <= 16; n++) {
15969 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015970 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015971 .mr(3)
15972 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015973 .kr(4)
15974 .sr(1)
15975 .m(m)
15976 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015977 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015978 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015979 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015980 }
15981 }
15982 }
15983
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015984 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015985 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015986 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015987 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015988 .mr(3)
15989 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015990 .kr(4)
15991 .sr(1)
15992 .m(m)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015993 .n(16)
15994 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015995 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080015996 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080015997 }
15998 }
15999
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016000 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016001 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016002 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016003 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016004 .mr(3)
16005 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016006 .kr(4)
16007 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016008 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016009 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016010 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016011 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016012 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016013 }
16014 }
16015
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016016 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016017 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016018 for (size_t k = 1; k < 16; k++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016019 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016020 .mr(3)
16021 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016022 .kr(4)
16023 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016024 .m(3)
16025 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016026 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016027 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016028 }
16029 }
16030
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016031 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016032 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016033 for (size_t k = 1; k < 16; k++) {
16034 for (uint32_t n = 1; n <= 16; n++) {
16035 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016036 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016037 .mr(3)
16038 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016039 .kr(4)
16040 .sr(1)
16041 .m(m)
16042 .n(n)
16043 .k(k)
16044 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016045 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016046 }
16047 }
16048 }
16049 }
16050
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016051 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016052 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016053 for (size_t k = 17; k < 32; k++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016054 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016055 .mr(3)
16056 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016057 .kr(4)
16058 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016059 .m(3)
16060 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016061 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016062 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016063 }
16064 }
16065
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016066 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016067 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016068 for (size_t k = 17; k < 32; k++) {
16069 for (uint32_t n = 1; n <= 16; n++) {
16070 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016071 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016072 .mr(3)
16073 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016074 .kr(4)
16075 .sr(1)
16076 .m(m)
16077 .n(n)
16078 .k(k)
16079 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016080 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016081 }
16082 }
16083 }
16084 }
16085
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016086 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016087 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016088 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016089 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016090 .mr(3)
16091 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016092 .kr(4)
16093 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016094 .m(3)
16095 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016096 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016097 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016098 }
16099 }
16100
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016101 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016102 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016103 for (size_t k = 32; k <= 160; k += 16) {
16104 for (uint32_t n = 1; n <= 16; n++) {
16105 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016106 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016107 .mr(3)
16108 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016109 .kr(4)
16110 .sr(1)
16111 .m(m)
16112 .n(n)
16113 .k(k)
16114 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016115 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016116 }
16117 }
16118 }
16119 }
16120
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016121 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, n_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016122 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016123 for (uint32_t n = 17; n < 32; n++) {
16124 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016125 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016126 .mr(3)
16127 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016128 .kr(4)
16129 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016130 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016131 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016132 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016133 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016134 }
16135 }
16136 }
16137
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016138 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, n_gt_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016139 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016140 for (uint32_t n = 17; n < 32; n++) {
16141 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016142 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016143 .mr(3)
16144 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016145 .kr(4)
16146 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016147 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016148 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016149 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016150 .cn_stride(19)
16151 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016152 }
16153 }
16154 }
16155
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016156 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, n_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016157 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016158 for (uint32_t n = 17; n < 32; n++) {
16159 for (size_t k = 1; k <= 80; k += 17) {
16160 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016161 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016162 .mr(3)
16163 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016164 .kr(4)
16165 .sr(1)
16166 .m(m)
16167 .n(n)
16168 .k(k)
16169 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016170 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016171 }
16172 }
16173 }
16174 }
16175
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016176 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, n_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016177 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016178 for (uint32_t n = 32; n <= 48; n += 16) {
16179 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016180 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016181 .mr(3)
16182 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016183 .kr(4)
16184 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016185 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016186 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016187 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016188 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016189 }
16190 }
16191 }
16192
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016193 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, n_div_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016194 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016195 for (uint32_t n = 32; n <= 48; n += 16) {
16196 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016197 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016198 .mr(3)
16199 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016200 .kr(4)
16201 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016202 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016203 .n(n)
16204 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016205 .cn_stride(19)
16206 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016207 }
16208 }
16209 }
16210
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016211 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, n_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016212 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016213 for (uint32_t n = 32; n <= 48; n += 16) {
16214 for (size_t k = 1; k <= 80; k += 17) {
16215 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016216 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016217 .mr(3)
16218 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016219 .kr(4)
16220 .sr(1)
16221 .m(m)
16222 .n(n)
16223 .k(k)
16224 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016225 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016226 }
16227 }
16228 }
16229 }
16230
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016231 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016232 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016233 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016234 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016235 .mr(3)
16236 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016237 .kr(4)
16238 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016239 .m(3)
16240 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016241 .k(k)
16242 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016243 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016244 }
16245 }
16246
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016247 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016248 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016249 for (size_t k = 1; k <= 80; k += 17) {
16250 for (uint32_t n = 1; n <= 16; n++) {
16251 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016252 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016253 .mr(3)
16254 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016255 .kr(4)
16256 .sr(1)
16257 .m(m)
16258 .n(n)
16259 .k(k)
16260 .ks(3)
16261 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016262 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016263 }
16264 }
16265 }
16266 }
16267
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016268 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, n_gt_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016269 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016270 for (uint32_t n = 17; n < 32; n++) {
16271 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016272 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016273 .mr(3)
16274 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016275 .kr(4)
16276 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016277 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016278 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016279 .k(k)
16280 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016281 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016282 }
16283 }
16284 }
16285
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016286 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, n_div_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016287 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016288 for (uint32_t n = 32; n <= 48; n += 16) {
16289 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016290 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016291 .mr(3)
16292 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016293 .kr(4)
16294 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016295 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016296 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016297 .k(k)
16298 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016299 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016300 }
16301 }
16302 }
16303
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016304 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016305 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016306 for (size_t k = 1; k <= 80; k += 17) {
16307 for (uint32_t n = 1; n <= 16; n++) {
16308 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016309 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016310 .mr(3)
16311 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016312 .kr(4)
16313 .sr(1)
16314 .m(m)
16315 .n(n)
16316 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016317 .cm_stride(19)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016318 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016319 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016320 }
16321 }
16322 }
16323 }
16324
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016325 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016326 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016327 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016328 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016329 .mr(3)
16330 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016331 .kr(4)
16332 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016333 .m(3)
16334 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016335 .k(k)
16336 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016337 .a_offset(251)
16338 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016339 }
16340 }
16341
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016342 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016343 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016344 for (size_t k = 1; k <= 80; k += 17) {
16345 for (uint32_t mz = 0; mz < 3; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016346 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016347 .mr(3)
16348 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016349 .kr(4)
16350 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016351 .m(3)
16352 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016353 .k(k)
16354 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016355 .a_offset(251)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016356 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016357 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016358 }
16359 }
16360 }
16361
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016362 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016363 TEST_REQUIRES_ARM_NEON;
16364 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016365 .mr(3)
16366 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016367 .kr(4)
16368 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016369 .m(3)
16370 .n(16)
16371 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016372 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016373 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016374 }
16375
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016376 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016377 TEST_REQUIRES_ARM_NEON;
16378 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016379 .mr(3)
16380 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016381 .kr(4)
16382 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016383 .m(3)
16384 .n(16)
16385 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016386 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016387 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016388 }
16389
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016390 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C4__NEON_MLAL_LD1R, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016391 TEST_REQUIRES_ARM_NEON;
16392 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016393 .mr(3)
16394 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016395 .kr(4)
16396 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016397 .m(3)
16398 .n(16)
16399 .k(16)
16400 .cm_stride(19)
16401 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016402 }
16403#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
16404
16405
16406#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016407 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016408 TEST_REQUIRES_ARM_NEON;
16409 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016410 .mr(4)
16411 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016412 .kr(4)
16413 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016414 .m(4)
16415 .n(16)
16416 .k(16)
16417 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016418 }
16419
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016420 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016421 TEST_REQUIRES_ARM_NEON;
16422 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016423 .mr(4)
16424 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016425 .kr(4)
16426 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016427 .m(4)
16428 .n(16)
16429 .k(16)
16430 .cn_stride(19)
16431 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016432 }
16433
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016434 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_eq_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016435 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016436 for (uint32_t n = 1; n <= 16; n++) {
16437 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016438 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016439 .mr(4)
16440 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016441 .kr(4)
16442 .sr(1)
16443 .m(m)
16444 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016445 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016446 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016447 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016448 }
16449 }
16450 }
16451
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016452 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016453 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016454 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016455 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016456 .mr(4)
16457 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016458 .kr(4)
16459 .sr(1)
16460 .m(m)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016461 .n(16)
16462 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016463 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016464 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016465 }
16466 }
16467
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016468 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016469 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016470 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016471 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016472 .mr(4)
16473 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016474 .kr(4)
16475 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016476 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016477 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016478 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016479 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016480 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016481 }
16482 }
16483
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016484 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016485 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016486 for (size_t k = 1; k < 16; k++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016487 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016488 .mr(4)
16489 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016490 .kr(4)
16491 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016492 .m(4)
16493 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016494 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016495 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016496 }
16497 }
16498
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016499 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016500 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016501 for (size_t k = 1; k < 16; k++) {
16502 for (uint32_t n = 1; n <= 16; n++) {
16503 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016504 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016505 .mr(4)
16506 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016507 .kr(4)
16508 .sr(1)
16509 .m(m)
16510 .n(n)
16511 .k(k)
16512 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016513 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016514 }
16515 }
16516 }
16517 }
16518
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016519 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016520 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016521 for (size_t k = 17; k < 32; k++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016522 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016523 .mr(4)
16524 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016525 .kr(4)
16526 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016527 .m(4)
16528 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016529 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016530 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016531 }
16532 }
16533
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016534 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016535 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016536 for (size_t k = 17; k < 32; k++) {
16537 for (uint32_t n = 1; n <= 16; n++) {
16538 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016539 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016540 .mr(4)
16541 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016542 .kr(4)
16543 .sr(1)
16544 .m(m)
16545 .n(n)
16546 .k(k)
16547 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016548 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016549 }
16550 }
16551 }
16552 }
16553
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016554 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016555 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016556 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016557 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016558 .mr(4)
16559 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016560 .kr(4)
16561 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016562 .m(4)
16563 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016564 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016565 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016566 }
16567 }
16568
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016569 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016570 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016571 for (size_t k = 32; k <= 160; k += 16) {
16572 for (uint32_t n = 1; n <= 16; n++) {
16573 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016574 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016575 .mr(4)
16576 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016577 .kr(4)
16578 .sr(1)
16579 .m(m)
16580 .n(n)
16581 .k(k)
16582 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016583 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016584 }
16585 }
16586 }
16587 }
16588
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016589 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, n_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016590 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016591 for (uint32_t n = 17; n < 32; n++) {
16592 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016593 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016594 .mr(4)
16595 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016596 .kr(4)
16597 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016598 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016599 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016600 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016601 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016602 }
16603 }
16604 }
16605
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016606 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, n_gt_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016607 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016608 for (uint32_t n = 17; n < 32; n++) {
16609 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016610 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016611 .mr(4)
16612 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016613 .kr(4)
16614 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016615 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016616 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016617 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016618 .cn_stride(19)
16619 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016620 }
16621 }
16622 }
16623
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016624 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, n_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016625 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016626 for (uint32_t n = 17; n < 32; n++) {
16627 for (size_t k = 1; k <= 80; k += 17) {
16628 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016629 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016630 .mr(4)
16631 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016632 .kr(4)
16633 .sr(1)
16634 .m(m)
16635 .n(n)
16636 .k(k)
16637 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016638 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016639 }
16640 }
16641 }
16642 }
16643
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016644 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, n_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016645 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016646 for (uint32_t n = 32; n <= 48; n += 16) {
16647 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016648 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016649 .mr(4)
16650 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016651 .kr(4)
16652 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016653 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016654 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016655 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016656 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016657 }
16658 }
16659 }
16660
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016661 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, n_div_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016662 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016663 for (uint32_t n = 32; n <= 48; n += 16) {
16664 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016665 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016666 .mr(4)
16667 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016668 .kr(4)
16669 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016670 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016671 .n(n)
16672 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016673 .cn_stride(19)
16674 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016675 }
16676 }
16677 }
16678
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016679 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, n_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016680 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016681 for (uint32_t n = 32; n <= 48; n += 16) {
16682 for (size_t k = 1; k <= 80; k += 17) {
16683 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016684 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016685 .mr(4)
16686 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016687 .kr(4)
16688 .sr(1)
16689 .m(m)
16690 .n(n)
16691 .k(k)
16692 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016693 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016694 }
16695 }
16696 }
16697 }
16698
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016699 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016700 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016701 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016702 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016703 .mr(4)
16704 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016705 .kr(4)
16706 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016707 .m(4)
16708 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016709 .k(k)
16710 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016711 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016712 }
16713 }
16714
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016715 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016716 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016717 for (size_t k = 1; k <= 80; k += 17) {
16718 for (uint32_t n = 1; n <= 16; n++) {
16719 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016720 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016721 .mr(4)
16722 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016723 .kr(4)
16724 .sr(1)
16725 .m(m)
16726 .n(n)
16727 .k(k)
16728 .ks(3)
16729 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016730 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016731 }
16732 }
16733 }
16734 }
16735
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016736 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, n_gt_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016737 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016738 for (uint32_t n = 17; n < 32; n++) {
16739 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016740 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016741 .mr(4)
16742 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016743 .kr(4)
16744 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016745 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016746 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016747 .k(k)
16748 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016749 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016750 }
16751 }
16752 }
16753
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016754 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, n_div_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016755 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016756 for (uint32_t n = 32; n <= 48; n += 16) {
16757 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016758 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016759 .mr(4)
16760 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016761 .kr(4)
16762 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016763 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080016764 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016765 .k(k)
16766 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016767 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016768 }
16769 }
16770 }
16771
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016772 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016773 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016774 for (size_t k = 1; k <= 80; k += 17) {
16775 for (uint32_t n = 1; n <= 16; n++) {
16776 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016777 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016778 .mr(4)
16779 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016780 .kr(4)
16781 .sr(1)
16782 .m(m)
16783 .n(n)
16784 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016785 .cm_stride(19)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016786 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016787 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016788 }
16789 }
16790 }
16791 }
16792
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016793 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016794 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016795 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016796 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016797 .mr(4)
16798 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016799 .kr(4)
16800 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016801 .m(4)
16802 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016803 .k(k)
16804 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016805 .a_offset(331)
16806 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016807 }
16808 }
16809
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016810 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016811 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016812 for (size_t k = 1; k <= 80; k += 17) {
16813 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016814 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016815 .mr(4)
16816 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016817 .kr(4)
16818 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016819 .m(4)
16820 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016821 .k(k)
16822 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016823 .a_offset(331)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016824 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016825 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016826 }
16827 }
16828 }
16829
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016830 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016831 TEST_REQUIRES_ARM_NEON;
16832 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016833 .mr(4)
16834 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016835 .kr(4)
16836 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016837 .m(4)
16838 .n(16)
16839 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016840 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016841 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016842 }
16843
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016844 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016845 TEST_REQUIRES_ARM_NEON;
16846 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016847 .mr(4)
16848 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016849 .kr(4)
16850 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016851 .m(4)
16852 .n(16)
16853 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016854 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016855 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016856 }
16857
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016858 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C4__NEON_MLAL_LD1R, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016859 TEST_REQUIRES_ARM_NEON;
16860 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016861 .mr(4)
16862 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016863 .kr(4)
16864 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080016865 .m(4)
16866 .n(16)
16867 .k(16)
16868 .cm_stride(19)
16869 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c4__neon_mlal_ld1r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016870 }
16871#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
16872
16873
16874#if XNN_ARCH_ARM || XNN_ARCH_ARM64
16875 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_eq_8) {
16876 TEST_REQUIRES_ARM_NEON;
16877 GemmMicrokernelTester()
16878 .mr(3)
16879 .nr(8)
16880 .kr(4)
16881 .sr(1)
16882 .m(3)
16883 .n(8)
16884 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080016885 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016886 }
16887
16888 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, strided_cn) {
16889 TEST_REQUIRES_ARM_NEON;
16890 GemmMicrokernelTester()
16891 .mr(3)
16892 .nr(8)
16893 .kr(4)
16894 .sr(1)
16895 .m(3)
16896 .n(8)
16897 .k(8)
16898 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080016899 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016900 }
16901
16902 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_eq_8_subtile) {
16903 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080016904 for (uint32_t n = 1; n <= 8; n++) {
16905 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016906 GemmMicrokernelTester()
16907 .mr(3)
16908 .nr(8)
16909 .kr(4)
16910 .sr(1)
16911 .m(m)
16912 .n(n)
16913 .k(8)
16914 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080016915 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016916 }
16917 }
16918 }
16919
16920 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_eq_8_subtile_m) {
16921 TEST_REQUIRES_ARM_NEON;
16922 for (uint32_t m = 1; m <= 3; m++) {
16923 GemmMicrokernelTester()
16924 .mr(3)
16925 .nr(8)
16926 .kr(4)
16927 .sr(1)
16928 .m(m)
16929 .n(8)
16930 .k(8)
16931 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080016932 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016933 }
16934 }
16935
16936 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_eq_8_subtile_n) {
16937 TEST_REQUIRES_ARM_NEON;
16938 for (uint32_t n = 1; n <= 8; n++) {
16939 GemmMicrokernelTester()
16940 .mr(3)
16941 .nr(8)
16942 .kr(4)
16943 .sr(1)
16944 .m(3)
16945 .n(n)
16946 .k(8)
16947 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080016948 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016949 }
16950 }
16951
16952 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_lt_8) {
16953 TEST_REQUIRES_ARM_NEON;
16954 for (size_t k = 1; k < 8; k++) {
16955 GemmMicrokernelTester()
16956 .mr(3)
16957 .nr(8)
16958 .kr(4)
16959 .sr(1)
16960 .m(3)
16961 .n(8)
16962 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080016963 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016964 }
16965 }
16966
16967 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_lt_8_subtile) {
16968 TEST_REQUIRES_ARM_NEON;
16969 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080016970 for (uint32_t n = 1; n <= 8; n++) {
16971 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016972 GemmMicrokernelTester()
16973 .mr(3)
16974 .nr(8)
16975 .kr(4)
16976 .sr(1)
16977 .m(m)
16978 .n(n)
16979 .k(k)
16980 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080016981 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016982 }
16983 }
16984 }
16985 }
16986
16987 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_gt_8) {
16988 TEST_REQUIRES_ARM_NEON;
16989 for (size_t k = 9; k < 16; k++) {
16990 GemmMicrokernelTester()
16991 .mr(3)
16992 .nr(8)
16993 .kr(4)
16994 .sr(1)
16995 .m(3)
16996 .n(8)
16997 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080016998 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080016999 }
17000 }
17001
17002 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_gt_8_subtile) {
17003 TEST_REQUIRES_ARM_NEON;
17004 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017005 for (uint32_t n = 1; n <= 8; n++) {
17006 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017007 GemmMicrokernelTester()
17008 .mr(3)
17009 .nr(8)
17010 .kr(4)
17011 .sr(1)
17012 .m(m)
17013 .n(n)
17014 .k(k)
17015 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017016 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017017 }
17018 }
17019 }
17020 }
17021
17022 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_div_8) {
17023 TEST_REQUIRES_ARM_NEON;
17024 for (size_t k = 16; k <= 80; k += 8) {
17025 GemmMicrokernelTester()
17026 .mr(3)
17027 .nr(8)
17028 .kr(4)
17029 .sr(1)
17030 .m(3)
17031 .n(8)
17032 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017033 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017034 }
17035 }
17036
17037 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, k_div_8_subtile) {
17038 TEST_REQUIRES_ARM_NEON;
17039 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017040 for (uint32_t n = 1; n <= 8; n++) {
17041 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017042 GemmMicrokernelTester()
17043 .mr(3)
17044 .nr(8)
17045 .kr(4)
17046 .sr(1)
17047 .m(m)
17048 .n(n)
17049 .k(k)
17050 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017051 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017052 }
17053 }
17054 }
17055 }
17056
17057 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, n_gt_8) {
17058 TEST_REQUIRES_ARM_NEON;
17059 for (uint32_t n = 9; n < 16; n++) {
17060 for (size_t k = 1; k <= 40; k += 9) {
17061 GemmMicrokernelTester()
17062 .mr(3)
17063 .nr(8)
17064 .kr(4)
17065 .sr(1)
17066 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017067 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017068 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017069 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017070 }
17071 }
17072 }
17073
17074 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, n_gt_8_strided_cn) {
17075 TEST_REQUIRES_ARM_NEON;
17076 for (uint32_t n = 9; n < 16; n++) {
17077 for (size_t k = 1; k <= 40; k += 9) {
17078 GemmMicrokernelTester()
17079 .mr(3)
17080 .nr(8)
17081 .kr(4)
17082 .sr(1)
17083 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017084 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017085 .k(k)
17086 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080017087 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017088 }
17089 }
17090 }
17091
17092 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, n_gt_8_subtile) {
17093 TEST_REQUIRES_ARM_NEON;
17094 for (uint32_t n = 9; n < 16; n++) {
17095 for (size_t k = 1; k <= 40; k += 9) {
17096 for (uint32_t m = 1; m <= 3; m++) {
17097 GemmMicrokernelTester()
17098 .mr(3)
17099 .nr(8)
17100 .kr(4)
17101 .sr(1)
17102 .m(m)
17103 .n(n)
17104 .k(k)
17105 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017106 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017107 }
17108 }
17109 }
17110 }
17111
17112 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, n_div_8) {
17113 TEST_REQUIRES_ARM_NEON;
17114 for (uint32_t n = 16; n <= 24; n += 8) {
17115 for (size_t k = 1; k <= 40; k += 9) {
17116 GemmMicrokernelTester()
17117 .mr(3)
17118 .nr(8)
17119 .kr(4)
17120 .sr(1)
17121 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017122 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017123 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017124 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017125 }
17126 }
17127 }
17128
17129 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, n_div_8_strided_cn) {
17130 TEST_REQUIRES_ARM_NEON;
17131 for (uint32_t n = 16; n <= 24; n += 8) {
17132 for (size_t k = 1; k <= 40; k += 9) {
17133 GemmMicrokernelTester()
17134 .mr(3)
17135 .nr(8)
17136 .kr(4)
17137 .sr(1)
17138 .m(3)
17139 .n(n)
17140 .k(k)
17141 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080017142 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017143 }
17144 }
17145 }
17146
17147 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, n_div_8_subtile) {
17148 TEST_REQUIRES_ARM_NEON;
17149 for (uint32_t n = 16; n <= 24; n += 8) {
17150 for (size_t k = 1; k <= 40; k += 9) {
17151 for (uint32_t m = 1; m <= 3; m++) {
17152 GemmMicrokernelTester()
17153 .mr(3)
17154 .nr(8)
17155 .kr(4)
17156 .sr(1)
17157 .m(m)
17158 .n(n)
17159 .k(k)
17160 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017161 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017162 }
17163 }
17164 }
17165 }
17166
17167 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, small_kernel) {
17168 TEST_REQUIRES_ARM_NEON;
17169 for (size_t k = 1; k <= 40; k += 9) {
17170 GemmMicrokernelTester()
17171 .mr(3)
17172 .nr(8)
17173 .kr(4)
17174 .sr(1)
17175 .m(3)
17176 .n(8)
17177 .k(k)
17178 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080017179 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017180 }
17181 }
17182
17183 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, small_kernel_subtile) {
17184 TEST_REQUIRES_ARM_NEON;
17185 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017186 for (uint32_t n = 1; n <= 8; n++) {
17187 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017188 GemmMicrokernelTester()
17189 .mr(3)
17190 .nr(8)
17191 .kr(4)
17192 .sr(1)
17193 .m(m)
17194 .n(n)
17195 .k(k)
17196 .ks(3)
17197 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017198 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017199 }
17200 }
17201 }
17202 }
17203
17204 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, n_gt_8_small_kernel) {
17205 TEST_REQUIRES_ARM_NEON;
17206 for (uint32_t n = 9; n < 16; n++) {
17207 for (size_t k = 1; k <= 40; k += 9) {
17208 GemmMicrokernelTester()
17209 .mr(3)
17210 .nr(8)
17211 .kr(4)
17212 .sr(1)
17213 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017214 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017215 .k(k)
17216 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080017217 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017218 }
17219 }
17220 }
17221
17222 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, n_div_8_small_kernel) {
17223 TEST_REQUIRES_ARM_NEON;
17224 for (uint32_t n = 16; n <= 24; n += 8) {
17225 for (size_t k = 1; k <= 40; k += 9) {
17226 GemmMicrokernelTester()
17227 .mr(3)
17228 .nr(8)
17229 .kr(4)
17230 .sr(1)
17231 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017232 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017233 .k(k)
17234 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080017235 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017236 }
17237 }
17238 }
17239
17240 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, strided_cm_subtile) {
17241 TEST_REQUIRES_ARM_NEON;
17242 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017243 for (uint32_t n = 1; n <= 8; n++) {
17244 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017245 GemmMicrokernelTester()
17246 .mr(3)
17247 .nr(8)
17248 .kr(4)
17249 .sr(1)
17250 .m(m)
17251 .n(n)
17252 .k(k)
17253 .cm_stride(11)
17254 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017255 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017256 }
17257 }
17258 }
17259 }
17260
17261 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, a_offset) {
17262 TEST_REQUIRES_ARM_NEON;
17263 for (size_t k = 1; k <= 40; k += 9) {
17264 GemmMicrokernelTester()
17265 .mr(3)
17266 .nr(8)
17267 .kr(4)
17268 .sr(1)
17269 .m(3)
17270 .n(8)
17271 .k(k)
17272 .ks(3)
17273 .a_offset(127)
Marat Dukhan50323b82022-01-11 00:12:01 -080017274 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017275 }
17276 }
17277
17278 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, zero) {
17279 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080017280 for (size_t k = 1; k <= 40; k += 9) {
17281 for (uint32_t mz = 0; mz < 3; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017282 GemmMicrokernelTester()
17283 .mr(3)
17284 .nr(8)
17285 .kr(4)
17286 .sr(1)
17287 .m(3)
17288 .n(8)
17289 .k(k)
17290 .ks(3)
17291 .a_offset(127)
17292 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080017293 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017294 }
17295 }
17296 }
17297
17298 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, qmin) {
17299 TEST_REQUIRES_ARM_NEON;
17300 GemmMicrokernelTester()
17301 .mr(3)
17302 .nr(8)
17303 .kr(4)
17304 .sr(1)
17305 .m(3)
17306 .n(8)
17307 .k(8)
17308 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080017309 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017310 }
17311
17312 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, qmax) {
17313 TEST_REQUIRES_ARM_NEON;
17314 GemmMicrokernelTester()
17315 .mr(3)
17316 .nr(8)
17317 .kr(4)
17318 .sr(1)
17319 .m(3)
17320 .n(8)
17321 .k(8)
17322 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080017323 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017324 }
17325
17326 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MULL_LD2R, strided_cm) {
17327 TEST_REQUIRES_ARM_NEON;
17328 GemmMicrokernelTester()
17329 .mr(3)
17330 .nr(8)
17331 .kr(4)
17332 .sr(1)
17333 .m(3)
17334 .n(8)
17335 .k(8)
17336 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080017337 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017338 }
17339#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
17340
17341
17342#if XNN_ARCH_ARM || XNN_ARCH_ARM64
17343 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_eq_8) {
17344 TEST_REQUIRES_ARM_NEON;
17345 GemmMicrokernelTester()
17346 .mr(4)
17347 .nr(8)
17348 .kr(4)
17349 .sr(1)
17350 .m(4)
17351 .n(8)
17352 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080017353 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017354 }
17355
17356 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, strided_cn) {
17357 TEST_REQUIRES_ARM_NEON;
17358 GemmMicrokernelTester()
17359 .mr(4)
17360 .nr(8)
17361 .kr(4)
17362 .sr(1)
17363 .m(4)
17364 .n(8)
17365 .k(8)
17366 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080017367 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017368 }
17369
17370 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_eq_8_subtile) {
17371 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080017372 for (uint32_t n = 1; n <= 8; n++) {
17373 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017374 GemmMicrokernelTester()
17375 .mr(4)
17376 .nr(8)
17377 .kr(4)
17378 .sr(1)
17379 .m(m)
17380 .n(n)
17381 .k(8)
17382 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017383 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017384 }
17385 }
17386 }
17387
17388 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_eq_8_subtile_m) {
17389 TEST_REQUIRES_ARM_NEON;
17390 for (uint32_t m = 1; m <= 4; m++) {
17391 GemmMicrokernelTester()
17392 .mr(4)
17393 .nr(8)
17394 .kr(4)
17395 .sr(1)
17396 .m(m)
17397 .n(8)
17398 .k(8)
17399 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017400 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017401 }
17402 }
17403
17404 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_eq_8_subtile_n) {
17405 TEST_REQUIRES_ARM_NEON;
17406 for (uint32_t n = 1; n <= 8; n++) {
17407 GemmMicrokernelTester()
17408 .mr(4)
17409 .nr(8)
17410 .kr(4)
17411 .sr(1)
17412 .m(4)
17413 .n(n)
17414 .k(8)
17415 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017416 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017417 }
17418 }
17419
17420 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_lt_8) {
17421 TEST_REQUIRES_ARM_NEON;
17422 for (size_t k = 1; k < 8; k++) {
17423 GemmMicrokernelTester()
17424 .mr(4)
17425 .nr(8)
17426 .kr(4)
17427 .sr(1)
17428 .m(4)
17429 .n(8)
17430 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017431 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017432 }
17433 }
17434
17435 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_lt_8_subtile) {
17436 TEST_REQUIRES_ARM_NEON;
17437 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017438 for (uint32_t n = 1; n <= 8; n++) {
17439 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017440 GemmMicrokernelTester()
17441 .mr(4)
17442 .nr(8)
17443 .kr(4)
17444 .sr(1)
17445 .m(m)
17446 .n(n)
17447 .k(k)
17448 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017449 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017450 }
17451 }
17452 }
17453 }
17454
17455 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_gt_8) {
17456 TEST_REQUIRES_ARM_NEON;
17457 for (size_t k = 9; k < 16; k++) {
17458 GemmMicrokernelTester()
17459 .mr(4)
17460 .nr(8)
17461 .kr(4)
17462 .sr(1)
17463 .m(4)
17464 .n(8)
17465 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017466 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017467 }
17468 }
17469
17470 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_gt_8_subtile) {
17471 TEST_REQUIRES_ARM_NEON;
17472 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017473 for (uint32_t n = 1; n <= 8; n++) {
17474 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017475 GemmMicrokernelTester()
17476 .mr(4)
17477 .nr(8)
17478 .kr(4)
17479 .sr(1)
17480 .m(m)
17481 .n(n)
17482 .k(k)
17483 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017484 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017485 }
17486 }
17487 }
17488 }
17489
17490 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_div_8) {
17491 TEST_REQUIRES_ARM_NEON;
17492 for (size_t k = 16; k <= 80; k += 8) {
17493 GemmMicrokernelTester()
17494 .mr(4)
17495 .nr(8)
17496 .kr(4)
17497 .sr(1)
17498 .m(4)
17499 .n(8)
17500 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017501 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017502 }
17503 }
17504
17505 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, k_div_8_subtile) {
17506 TEST_REQUIRES_ARM_NEON;
17507 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017508 for (uint32_t n = 1; n <= 8; n++) {
17509 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017510 GemmMicrokernelTester()
17511 .mr(4)
17512 .nr(8)
17513 .kr(4)
17514 .sr(1)
17515 .m(m)
17516 .n(n)
17517 .k(k)
17518 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017519 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017520 }
17521 }
17522 }
17523 }
17524
17525 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, n_gt_8) {
17526 TEST_REQUIRES_ARM_NEON;
17527 for (uint32_t n = 9; n < 16; n++) {
17528 for (size_t k = 1; k <= 40; k += 9) {
17529 GemmMicrokernelTester()
17530 .mr(4)
17531 .nr(8)
17532 .kr(4)
17533 .sr(1)
17534 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017535 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017536 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017537 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017538 }
17539 }
17540 }
17541
17542 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, n_gt_8_strided_cn) {
17543 TEST_REQUIRES_ARM_NEON;
17544 for (uint32_t n = 9; n < 16; n++) {
17545 for (size_t k = 1; k <= 40; k += 9) {
17546 GemmMicrokernelTester()
17547 .mr(4)
17548 .nr(8)
17549 .kr(4)
17550 .sr(1)
17551 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017552 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017553 .k(k)
17554 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080017555 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017556 }
17557 }
17558 }
17559
17560 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, n_gt_8_subtile) {
17561 TEST_REQUIRES_ARM_NEON;
17562 for (uint32_t n = 9; n < 16; n++) {
17563 for (size_t k = 1; k <= 40; k += 9) {
17564 for (uint32_t m = 1; m <= 4; m++) {
17565 GemmMicrokernelTester()
17566 .mr(4)
17567 .nr(8)
17568 .kr(4)
17569 .sr(1)
17570 .m(m)
17571 .n(n)
17572 .k(k)
17573 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017574 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017575 }
17576 }
17577 }
17578 }
17579
17580 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, n_div_8) {
17581 TEST_REQUIRES_ARM_NEON;
17582 for (uint32_t n = 16; n <= 24; n += 8) {
17583 for (size_t k = 1; k <= 40; k += 9) {
17584 GemmMicrokernelTester()
17585 .mr(4)
17586 .nr(8)
17587 .kr(4)
17588 .sr(1)
17589 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017590 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017591 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017592 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017593 }
17594 }
17595 }
17596
17597 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, n_div_8_strided_cn) {
17598 TEST_REQUIRES_ARM_NEON;
17599 for (uint32_t n = 16; n <= 24; n += 8) {
17600 for (size_t k = 1; k <= 40; k += 9) {
17601 GemmMicrokernelTester()
17602 .mr(4)
17603 .nr(8)
17604 .kr(4)
17605 .sr(1)
17606 .m(4)
17607 .n(n)
17608 .k(k)
17609 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080017610 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017611 }
17612 }
17613 }
17614
17615 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, n_div_8_subtile) {
17616 TEST_REQUIRES_ARM_NEON;
17617 for (uint32_t n = 16; n <= 24; n += 8) {
17618 for (size_t k = 1; k <= 40; k += 9) {
17619 for (uint32_t m = 1; m <= 4; m++) {
17620 GemmMicrokernelTester()
17621 .mr(4)
17622 .nr(8)
17623 .kr(4)
17624 .sr(1)
17625 .m(m)
17626 .n(n)
17627 .k(k)
17628 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017629 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017630 }
17631 }
17632 }
17633 }
17634
17635 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, small_kernel) {
17636 TEST_REQUIRES_ARM_NEON;
17637 for (size_t k = 1; k <= 40; k += 9) {
17638 GemmMicrokernelTester()
17639 .mr(4)
17640 .nr(8)
17641 .kr(4)
17642 .sr(1)
17643 .m(4)
17644 .n(8)
17645 .k(k)
17646 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080017647 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017648 }
17649 }
17650
17651 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, small_kernel_subtile) {
17652 TEST_REQUIRES_ARM_NEON;
17653 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017654 for (uint32_t n = 1; n <= 8; n++) {
17655 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017656 GemmMicrokernelTester()
17657 .mr(4)
17658 .nr(8)
17659 .kr(4)
17660 .sr(1)
17661 .m(m)
17662 .n(n)
17663 .k(k)
17664 .ks(3)
17665 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017666 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017667 }
17668 }
17669 }
17670 }
17671
17672 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, n_gt_8_small_kernel) {
17673 TEST_REQUIRES_ARM_NEON;
17674 for (uint32_t n = 9; n < 16; n++) {
17675 for (size_t k = 1; k <= 40; k += 9) {
17676 GemmMicrokernelTester()
17677 .mr(4)
17678 .nr(8)
17679 .kr(4)
17680 .sr(1)
17681 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017682 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017683 .k(k)
17684 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080017685 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017686 }
17687 }
17688 }
17689
17690 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, n_div_8_small_kernel) {
17691 TEST_REQUIRES_ARM_NEON;
17692 for (uint32_t n = 16; n <= 24; n += 8) {
17693 for (size_t k = 1; k <= 40; k += 9) {
17694 GemmMicrokernelTester()
17695 .mr(4)
17696 .nr(8)
17697 .kr(4)
17698 .sr(1)
17699 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080017700 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017701 .k(k)
17702 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080017703 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017704 }
17705 }
17706 }
17707
17708 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, strided_cm_subtile) {
17709 TEST_REQUIRES_ARM_NEON;
17710 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017711 for (uint32_t n = 1; n <= 8; n++) {
17712 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017713 GemmMicrokernelTester()
17714 .mr(4)
17715 .nr(8)
17716 .kr(4)
17717 .sr(1)
17718 .m(m)
17719 .n(n)
17720 .k(k)
17721 .cm_stride(11)
17722 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017723 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017724 }
17725 }
17726 }
17727 }
17728
17729 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, a_offset) {
17730 TEST_REQUIRES_ARM_NEON;
17731 for (size_t k = 1; k <= 40; k += 9) {
17732 GemmMicrokernelTester()
17733 .mr(4)
17734 .nr(8)
17735 .kr(4)
17736 .sr(1)
17737 .m(4)
17738 .n(8)
17739 .k(k)
17740 .ks(3)
17741 .a_offset(163)
Marat Dukhan50323b82022-01-11 00:12:01 -080017742 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017743 }
17744 }
17745
17746 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, zero) {
17747 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080017748 for (size_t k = 1; k <= 40; k += 9) {
17749 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017750 GemmMicrokernelTester()
17751 .mr(4)
17752 .nr(8)
17753 .kr(4)
17754 .sr(1)
17755 .m(4)
17756 .n(8)
17757 .k(k)
17758 .ks(3)
17759 .a_offset(163)
17760 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080017761 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017762 }
17763 }
17764 }
17765
17766 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, qmin) {
17767 TEST_REQUIRES_ARM_NEON;
17768 GemmMicrokernelTester()
17769 .mr(4)
17770 .nr(8)
17771 .kr(4)
17772 .sr(1)
17773 .m(4)
17774 .n(8)
17775 .k(8)
17776 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080017777 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017778 }
17779
17780 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, qmax) {
17781 TEST_REQUIRES_ARM_NEON;
17782 GemmMicrokernelTester()
17783 .mr(4)
17784 .nr(8)
17785 .kr(4)
17786 .sr(1)
17787 .m(4)
17788 .n(8)
17789 .k(8)
17790 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080017791 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017792 }
17793
17794 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MULL_LD2R, strided_cm) {
17795 TEST_REQUIRES_ARM_NEON;
17796 GemmMicrokernelTester()
17797 .mr(4)
17798 .nr(8)
17799 .kr(4)
17800 .sr(1)
17801 .m(4)
17802 .n(8)
17803 .k(8)
17804 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080017805 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mull_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017806 }
17807#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
17808
17809
17810#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017811 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_eq_16) {
17812 TEST_REQUIRES_ARM_NEON;
17813 GemmMicrokernelTester()
17814 .mr(3)
17815 .nr(8)
17816 .kr(4)
17817 .sr(1)
17818 .m(3)
17819 .n(8)
17820 .k(16)
Marat Dukhan50323b82022-01-11 00:12:01 -080017821 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017822 }
17823
17824 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, strided_cn) {
17825 TEST_REQUIRES_ARM_NEON;
17826 GemmMicrokernelTester()
17827 .mr(3)
17828 .nr(8)
17829 .kr(4)
17830 .sr(1)
17831 .m(3)
17832 .n(8)
17833 .k(16)
17834 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080017835 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017836 }
17837
17838 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_eq_16_subtile) {
17839 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080017840 for (uint32_t n = 1; n <= 8; n++) {
17841 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017842 GemmMicrokernelTester()
17843 .mr(3)
17844 .nr(8)
17845 .kr(4)
17846 .sr(1)
17847 .m(m)
17848 .n(n)
17849 .k(16)
17850 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017851 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017852 }
17853 }
17854 }
17855
17856 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_eq_16_subtile_m) {
17857 TEST_REQUIRES_ARM_NEON;
17858 for (uint32_t m = 1; m <= 3; m++) {
17859 GemmMicrokernelTester()
17860 .mr(3)
17861 .nr(8)
17862 .kr(4)
17863 .sr(1)
17864 .m(m)
17865 .n(8)
17866 .k(16)
17867 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017868 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017869 }
17870 }
17871
17872 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_eq_16_subtile_n) {
17873 TEST_REQUIRES_ARM_NEON;
17874 for (uint32_t n = 1; n <= 8; n++) {
17875 GemmMicrokernelTester()
17876 .mr(3)
17877 .nr(8)
17878 .kr(4)
17879 .sr(1)
17880 .m(3)
17881 .n(n)
17882 .k(16)
17883 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017884 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017885 }
17886 }
17887
17888 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_lt_16) {
17889 TEST_REQUIRES_ARM_NEON;
17890 for (size_t k = 1; k < 16; k++) {
17891 GemmMicrokernelTester()
17892 .mr(3)
17893 .nr(8)
17894 .kr(4)
17895 .sr(1)
17896 .m(3)
17897 .n(8)
17898 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017899 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017900 }
17901 }
17902
17903 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_lt_16_subtile) {
17904 TEST_REQUIRES_ARM_NEON;
17905 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017906 for (uint32_t n = 1; n <= 8; n++) {
17907 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017908 GemmMicrokernelTester()
17909 .mr(3)
17910 .nr(8)
17911 .kr(4)
17912 .sr(1)
17913 .m(m)
17914 .n(n)
17915 .k(k)
17916 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017917 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017918 }
17919 }
17920 }
17921 }
17922
17923 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_gt_16) {
17924 TEST_REQUIRES_ARM_NEON;
17925 for (size_t k = 17; k < 32; k++) {
17926 GemmMicrokernelTester()
17927 .mr(3)
17928 .nr(8)
17929 .kr(4)
17930 .sr(1)
17931 .m(3)
17932 .n(8)
17933 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017934 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017935 }
17936 }
17937
17938 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_gt_16_subtile) {
17939 TEST_REQUIRES_ARM_NEON;
17940 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017941 for (uint32_t n = 1; n <= 8; n++) {
17942 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017943 GemmMicrokernelTester()
17944 .mr(3)
17945 .nr(8)
17946 .kr(4)
17947 .sr(1)
17948 .m(m)
17949 .n(n)
17950 .k(k)
17951 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017952 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017953 }
17954 }
17955 }
17956 }
17957
17958 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_div_16) {
17959 TEST_REQUIRES_ARM_NEON;
17960 for (size_t k = 32; k <= 160; k += 16) {
17961 GemmMicrokernelTester()
17962 .mr(3)
17963 .nr(8)
17964 .kr(4)
17965 .sr(1)
17966 .m(3)
17967 .n(8)
17968 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080017969 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017970 }
17971 }
17972
17973 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, k_div_16_subtile) {
17974 TEST_REQUIRES_ARM_NEON;
17975 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080017976 for (uint32_t n = 1; n <= 8; n++) {
17977 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017978 GemmMicrokernelTester()
17979 .mr(3)
17980 .nr(8)
17981 .kr(4)
17982 .sr(1)
17983 .m(m)
17984 .n(n)
17985 .k(k)
17986 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080017987 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080017988 }
17989 }
17990 }
17991 }
17992
17993 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, n_gt_8) {
17994 TEST_REQUIRES_ARM_NEON;
17995 for (uint32_t n = 9; n < 16; n++) {
17996 for (size_t k = 1; k <= 80; k += 17) {
17997 GemmMicrokernelTester()
17998 .mr(3)
17999 .nr(8)
18000 .kr(4)
18001 .sr(1)
18002 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018003 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018004 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080018005 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018006 }
18007 }
18008 }
18009
18010 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, n_gt_8_strided_cn) {
18011 TEST_REQUIRES_ARM_NEON;
18012 for (uint32_t n = 9; n < 16; n++) {
18013 for (size_t k = 1; k <= 80; k += 17) {
18014 GemmMicrokernelTester()
18015 .mr(3)
18016 .nr(8)
18017 .kr(4)
18018 .sr(1)
18019 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018020 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018021 .k(k)
18022 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080018023 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018024 }
18025 }
18026 }
18027
18028 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, n_gt_8_subtile) {
18029 TEST_REQUIRES_ARM_NEON;
18030 for (uint32_t n = 9; n < 16; n++) {
18031 for (size_t k = 1; k <= 80; k += 17) {
18032 for (uint32_t m = 1; m <= 3; m++) {
18033 GemmMicrokernelTester()
18034 .mr(3)
18035 .nr(8)
18036 .kr(4)
18037 .sr(1)
18038 .m(m)
18039 .n(n)
18040 .k(k)
18041 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080018042 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018043 }
18044 }
18045 }
18046 }
18047
18048 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, n_div_8) {
18049 TEST_REQUIRES_ARM_NEON;
18050 for (uint32_t n = 16; n <= 24; n += 8) {
18051 for (size_t k = 1; k <= 80; k += 17) {
18052 GemmMicrokernelTester()
18053 .mr(3)
18054 .nr(8)
18055 .kr(4)
18056 .sr(1)
18057 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018058 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018059 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080018060 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018061 }
18062 }
18063 }
18064
18065 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, n_div_8_strided_cn) {
18066 TEST_REQUIRES_ARM_NEON;
18067 for (uint32_t n = 16; n <= 24; n += 8) {
18068 for (size_t k = 1; k <= 80; k += 17) {
18069 GemmMicrokernelTester()
18070 .mr(3)
18071 .nr(8)
18072 .kr(4)
18073 .sr(1)
18074 .m(3)
18075 .n(n)
18076 .k(k)
18077 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080018078 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018079 }
18080 }
18081 }
18082
18083 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, n_div_8_subtile) {
18084 TEST_REQUIRES_ARM_NEON;
18085 for (uint32_t n = 16; n <= 24; n += 8) {
18086 for (size_t k = 1; k <= 80; k += 17) {
18087 for (uint32_t m = 1; m <= 3; m++) {
18088 GemmMicrokernelTester()
18089 .mr(3)
18090 .nr(8)
18091 .kr(4)
18092 .sr(1)
18093 .m(m)
18094 .n(n)
18095 .k(k)
18096 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080018097 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018098 }
18099 }
18100 }
18101 }
18102
18103 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, small_kernel) {
18104 TEST_REQUIRES_ARM_NEON;
18105 for (size_t k = 1; k <= 80; k += 17) {
18106 GemmMicrokernelTester()
18107 .mr(3)
18108 .nr(8)
18109 .kr(4)
18110 .sr(1)
18111 .m(3)
18112 .n(8)
18113 .k(k)
18114 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080018115 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018116 }
18117 }
18118
18119 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, small_kernel_subtile) {
18120 TEST_REQUIRES_ARM_NEON;
18121 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080018122 for (uint32_t n = 1; n <= 8; n++) {
18123 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018124 GemmMicrokernelTester()
18125 .mr(3)
18126 .nr(8)
18127 .kr(4)
18128 .sr(1)
18129 .m(m)
18130 .n(n)
18131 .k(k)
18132 .ks(3)
18133 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080018134 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018135 }
18136 }
18137 }
18138 }
18139
18140 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, n_gt_8_small_kernel) {
18141 TEST_REQUIRES_ARM_NEON;
18142 for (uint32_t n = 9; n < 16; n++) {
18143 for (size_t k = 1; k <= 80; k += 17) {
18144 GemmMicrokernelTester()
18145 .mr(3)
18146 .nr(8)
18147 .kr(4)
18148 .sr(1)
18149 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018150 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018151 .k(k)
18152 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080018153 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018154 }
18155 }
18156 }
18157
18158 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, n_div_8_small_kernel) {
18159 TEST_REQUIRES_ARM_NEON;
18160 for (uint32_t n = 16; n <= 24; n += 8) {
18161 for (size_t k = 1; k <= 80; k += 17) {
18162 GemmMicrokernelTester()
18163 .mr(3)
18164 .nr(8)
18165 .kr(4)
18166 .sr(1)
18167 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018168 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018169 .k(k)
18170 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080018171 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018172 }
18173 }
18174 }
18175
18176 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, strided_cm_subtile) {
18177 TEST_REQUIRES_ARM_NEON;
18178 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080018179 for (uint32_t n = 1; n <= 8; n++) {
18180 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018181 GemmMicrokernelTester()
18182 .mr(3)
18183 .nr(8)
18184 .kr(4)
18185 .sr(1)
18186 .m(m)
18187 .n(n)
18188 .k(k)
18189 .cm_stride(11)
18190 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080018191 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018192 }
18193 }
18194 }
18195 }
18196
18197 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, a_offset) {
18198 TEST_REQUIRES_ARM_NEON;
18199 for (size_t k = 1; k <= 80; k += 17) {
18200 GemmMicrokernelTester()
18201 .mr(3)
18202 .nr(8)
18203 .kr(4)
18204 .sr(1)
18205 .m(3)
18206 .n(8)
18207 .k(k)
18208 .ks(3)
18209 .a_offset(251)
Marat Dukhan50323b82022-01-11 00:12:01 -080018210 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018211 }
18212 }
18213
18214 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, zero) {
18215 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080018216 for (size_t k = 1; k <= 80; k += 17) {
18217 for (uint32_t mz = 0; mz < 3; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018218 GemmMicrokernelTester()
18219 .mr(3)
18220 .nr(8)
18221 .kr(4)
18222 .sr(1)
18223 .m(3)
18224 .n(8)
18225 .k(k)
18226 .ks(3)
18227 .a_offset(251)
18228 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080018229 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018230 }
18231 }
18232 }
18233
18234 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, qmin) {
18235 TEST_REQUIRES_ARM_NEON;
18236 GemmMicrokernelTester()
18237 .mr(3)
18238 .nr(8)
18239 .kr(4)
18240 .sr(1)
18241 .m(3)
18242 .n(8)
18243 .k(16)
18244 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080018245 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018246 }
18247
18248 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, qmax) {
18249 TEST_REQUIRES_ARM_NEON;
18250 GemmMicrokernelTester()
18251 .mr(3)
18252 .nr(8)
18253 .kr(4)
18254 .sr(1)
18255 .m(3)
18256 .n(8)
18257 .k(16)
18258 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080018259 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018260 }
18261
18262 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C4__NEON_MLAL_LD2R, strided_cm) {
18263 TEST_REQUIRES_ARM_NEON;
18264 GemmMicrokernelTester()
18265 .mr(3)
18266 .nr(8)
18267 .kr(4)
18268 .sr(1)
18269 .m(3)
18270 .n(8)
18271 .k(16)
18272 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080018273 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018274 }
18275#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
18276
18277
18278#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018279 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018280 TEST_REQUIRES_ARM_NEON;
18281 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018282 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018283 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018284 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018285 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018286 .m(4)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080018287 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018288 .k(16)
18289 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080018290 }
18291
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018292 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080018293 TEST_REQUIRES_ARM_NEON;
18294 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018295 .mr(4)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080018296 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018297 .kr(4)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080018298 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018299 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018300 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018301 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018302 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018303 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018304 }
18305
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018306 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_eq_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018307 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080018308 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018309 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018310 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018311 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018312 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018313 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018314 .sr(1)
18315 .m(m)
18316 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018317 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018318 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018319 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018320 }
18321 }
18322 }
18323
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018324 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018325 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018326 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018327 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018328 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018329 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018330 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018331 .sr(1)
18332 .m(m)
18333 .n(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018334 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018335 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018336 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018337 }
18338 }
18339
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018340 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018341 TEST_REQUIRES_ARM_NEON;
18342 for (uint32_t n = 1; n <= 8; n++) {
18343 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018344 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018345 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018346 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018347 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018348 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018349 .n(n)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018350 .k(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018351 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018352 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018353 }
18354 }
18355
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018356 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018357 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018358 for (size_t k = 1; k < 16; k++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018359 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018360 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018361 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018362 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018363 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018364 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018365 .n(8)
18366 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018367 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018368 }
18369 }
18370
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018371 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018372 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018373 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080018374 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018375 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018376 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018377 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018378 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018379 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018380 .sr(1)
18381 .m(m)
18382 .n(n)
18383 .k(k)
18384 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018385 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018386 }
18387 }
18388 }
18389 }
18390
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018391 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018392 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018393 for (size_t k = 17; k < 32; k++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018394 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018395 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018396 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018397 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018398 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018399 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018400 .n(8)
18401 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018402 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018403 }
18404 }
18405
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018406 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018407 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018408 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080018409 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018410 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018411 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018412 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018413 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018414 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018415 .sr(1)
18416 .m(m)
18417 .n(n)
18418 .k(k)
18419 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018420 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018421 }
18422 }
18423 }
18424 }
18425
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018426 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018427 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018428 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018429 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018430 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018431 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018432 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018433 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018434 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018435 .n(8)
18436 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018437 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018438 }
18439 }
18440
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018441 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018442 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018443 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080018444 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018445 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018446 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018447 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018448 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018449 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018450 .sr(1)
18451 .m(m)
18452 .n(n)
18453 .k(k)
18454 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018455 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018456 }
18457 }
18458 }
18459 }
18460
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018461 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018462 TEST_REQUIRES_ARM_NEON;
18463 for (uint32_t n = 9; n < 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018464 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018465 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018466 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018467 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018468 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018469 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018470 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018471 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018472 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018473 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018474 }
18475 }
18476 }
18477
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018478 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018479 TEST_REQUIRES_ARM_NEON;
18480 for (uint32_t n = 9; n < 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018481 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018482 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018483 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018484 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018485 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018486 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018487 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018488 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018489 .k(k)
18490 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018491 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018492 }
18493 }
18494 }
18495
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018496 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018497 TEST_REQUIRES_ARM_NEON;
18498 for (uint32_t n = 9; n < 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018499 for (size_t k = 1; k <= 80; k += 17) {
18500 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018501 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018502 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018503 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018504 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018505 .sr(1)
18506 .m(m)
18507 .n(n)
18508 .k(k)
18509 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018510 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018511 }
18512 }
18513 }
18514 }
18515
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018516 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018517 TEST_REQUIRES_ARM_NEON;
18518 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018519 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018520 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018521 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018522 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018523 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018524 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018525 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018526 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018527 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018528 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018529 }
18530 }
18531 }
18532
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018533 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018534 TEST_REQUIRES_ARM_NEON;
18535 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018536 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018537 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018538 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018539 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018540 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018541 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018542 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018543 .n(n)
18544 .k(k)
18545 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018546 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018547 }
18548 }
18549 }
18550
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018551 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018552 TEST_REQUIRES_ARM_NEON;
18553 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018554 for (size_t k = 1; k <= 80; k += 17) {
18555 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018556 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018557 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018558 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018559 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018560 .sr(1)
18561 .m(m)
18562 .n(n)
18563 .k(k)
18564 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018565 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018566 }
18567 }
18568 }
18569 }
18570
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018571 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018572 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018573 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018574 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018575 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018576 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018577 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018578 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018579 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018580 .n(8)
18581 .k(k)
18582 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018583 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018584 }
18585 }
18586
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018587 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018588 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018589 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080018590 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018591 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018592 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018593 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018594 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018595 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018596 .sr(1)
18597 .m(m)
18598 .n(n)
18599 .k(k)
18600 .ks(3)
18601 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018602 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018603 }
18604 }
18605 }
18606 }
18607
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018608 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018609 TEST_REQUIRES_ARM_NEON;
18610 for (uint32_t n = 9; n < 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018611 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018612 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018613 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018614 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018615 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018616 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018617 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018618 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018619 .k(k)
18620 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018621 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018622 }
18623 }
18624 }
18625
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018626 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018627 TEST_REQUIRES_ARM_NEON;
18628 for (uint32_t n = 16; n <= 24; n += 8) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018629 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018630 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018631 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018632 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018633 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018634 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018635 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080018636 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018637 .k(k)
18638 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018639 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018640 }
18641 }
18642 }
18643
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018644 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018645 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018646 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080018647 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018648 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018649 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018650 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018651 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018652 .kr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018653 .sr(1)
18654 .m(m)
18655 .n(n)
18656 .k(k)
18657 .cm_stride(11)
18658 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018659 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080018660 }
18661 }
18662 }
18663 }
18664
Zhi An Nge96b6bc2022-02-03 10:49:46 -080018665 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, a_offset) {
18666 TEST_REQUIRES_ARM_NEON;
18667 for (size_t k = 1; k <= 80; k += 17) {
18668 GemmMicrokernelTester()
18669 .mr(4)
18670 .nr(8)
18671 .kr(4)
18672 .sr(1)
18673 .m(4)
18674 .n(8)
18675 .k(k)
18676 .ks(3)
18677 .a_offset(331)
18678 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18679 }
18680 }
18681
18682 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, zero) {
18683 TEST_REQUIRES_ARM_NEON;
18684 for (size_t k = 1; k <= 80; k += 17) {
18685 for (uint32_t mz = 0; mz < 4; mz++) {
18686 GemmMicrokernelTester()
18687 .mr(4)
18688 .nr(8)
18689 .kr(4)
18690 .sr(1)
18691 .m(4)
18692 .n(8)
18693 .k(k)
18694 .ks(3)
18695 .a_offset(331)
18696 .zero_index(mz)
18697 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18698 }
18699 }
18700 }
18701
18702 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, qmin) {
18703 TEST_REQUIRES_ARM_NEON;
18704 GemmMicrokernelTester()
18705 .mr(4)
18706 .nr(8)
18707 .kr(4)
18708 .sr(1)
18709 .m(4)
18710 .n(8)
18711 .k(16)
18712 .qmin(128)
18713 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18714 }
18715
18716 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, qmax) {
18717 TEST_REQUIRES_ARM_NEON;
18718 GemmMicrokernelTester()
18719 .mr(4)
18720 .nr(8)
18721 .kr(4)
18722 .sr(1)
18723 .m(4)
18724 .n(8)
18725 .k(16)
18726 .qmax(128)
18727 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18728 }
18729
18730 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEON_MLAL_LD2R, strided_cm) {
18731 TEST_REQUIRES_ARM_NEON;
18732 GemmMicrokernelTester()
18733 .mr(4)
18734 .nr(8)
18735 .kr(4)
18736 .sr(1)
18737 .m(4)
18738 .n(8)
18739 .k(16)
18740 .cm_stride(11)
18741 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neon_mlal_ld2r, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18742 }
18743#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
18744
18745
18746#if XNN_ARCH_ARM || XNN_ARCH_ARM64
18747 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_eq_8) {
18748 TEST_REQUIRES_ARM_NEON;
18749 GemmMicrokernelTester()
18750 .mr(3)
18751 .nr(16)
18752 .kr(2)
18753 .sr(1)
18754 .m(3)
18755 .n(16)
18756 .k(8)
18757 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18758 }
18759
18760 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, strided_cn) {
18761 TEST_REQUIRES_ARM_NEON;
18762 GemmMicrokernelTester()
18763 .mr(3)
18764 .nr(16)
18765 .kr(2)
18766 .sr(1)
18767 .m(3)
18768 .n(16)
18769 .k(8)
18770 .cn_stride(19)
18771 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18772 }
18773
18774 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_eq_8_subtile) {
18775 TEST_REQUIRES_ARM_NEON;
18776 for (uint32_t n = 1; n <= 16; n++) {
18777 for (uint32_t m = 1; m <= 3; m++) {
18778 GemmMicrokernelTester()
18779 .mr(3)
18780 .nr(16)
18781 .kr(2)
18782 .sr(1)
18783 .m(m)
18784 .n(n)
18785 .k(8)
18786 .iterations(1)
18787 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18788 }
18789 }
18790 }
18791
18792 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_eq_8_subtile_m) {
18793 TEST_REQUIRES_ARM_NEON;
18794 for (uint32_t m = 1; m <= 3; m++) {
18795 GemmMicrokernelTester()
18796 .mr(3)
18797 .nr(16)
18798 .kr(2)
18799 .sr(1)
18800 .m(m)
18801 .n(16)
18802 .k(8)
18803 .iterations(1)
18804 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18805 }
18806 }
18807
18808 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_eq_8_subtile_n) {
18809 TEST_REQUIRES_ARM_NEON;
18810 for (uint32_t n = 1; n <= 16; n++) {
18811 GemmMicrokernelTester()
18812 .mr(3)
18813 .nr(16)
18814 .kr(2)
18815 .sr(1)
18816 .m(3)
18817 .n(n)
18818 .k(8)
18819 .iterations(1)
18820 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18821 }
18822 }
18823
18824 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_lt_8) {
18825 TEST_REQUIRES_ARM_NEON;
18826 for (size_t k = 1; k < 8; k++) {
18827 GemmMicrokernelTester()
18828 .mr(3)
18829 .nr(16)
18830 .kr(2)
18831 .sr(1)
18832 .m(3)
18833 .n(16)
18834 .k(k)
18835 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18836 }
18837 }
18838
18839 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_lt_8_subtile) {
18840 TEST_REQUIRES_ARM_NEON;
18841 for (size_t k = 1; k < 8; k++) {
18842 for (uint32_t n = 1; n <= 16; n++) {
18843 for (uint32_t m = 1; m <= 3; m++) {
18844 GemmMicrokernelTester()
18845 .mr(3)
18846 .nr(16)
18847 .kr(2)
18848 .sr(1)
18849 .m(m)
18850 .n(n)
18851 .k(k)
18852 .iterations(1)
18853 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18854 }
18855 }
18856 }
18857 }
18858
18859 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_gt_8) {
18860 TEST_REQUIRES_ARM_NEON;
18861 for (size_t k = 9; k < 16; k++) {
18862 GemmMicrokernelTester()
18863 .mr(3)
18864 .nr(16)
18865 .kr(2)
18866 .sr(1)
18867 .m(3)
18868 .n(16)
18869 .k(k)
18870 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18871 }
18872 }
18873
18874 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_gt_8_subtile) {
18875 TEST_REQUIRES_ARM_NEON;
18876 for (size_t k = 9; k < 16; k++) {
18877 for (uint32_t n = 1; n <= 16; n++) {
18878 for (uint32_t m = 1; m <= 3; m++) {
18879 GemmMicrokernelTester()
18880 .mr(3)
18881 .nr(16)
18882 .kr(2)
18883 .sr(1)
18884 .m(m)
18885 .n(n)
18886 .k(k)
18887 .iterations(1)
18888 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18889 }
18890 }
18891 }
18892 }
18893
18894 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_div_8) {
18895 TEST_REQUIRES_ARM_NEON;
18896 for (size_t k = 16; k <= 80; k += 8) {
18897 GemmMicrokernelTester()
18898 .mr(3)
18899 .nr(16)
18900 .kr(2)
18901 .sr(1)
18902 .m(3)
18903 .n(16)
18904 .k(k)
18905 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18906 }
18907 }
18908
18909 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, k_div_8_subtile) {
18910 TEST_REQUIRES_ARM_NEON;
18911 for (size_t k = 16; k <= 80; k += 8) {
18912 for (uint32_t n = 1; n <= 16; n++) {
18913 for (uint32_t m = 1; m <= 3; m++) {
18914 GemmMicrokernelTester()
18915 .mr(3)
18916 .nr(16)
18917 .kr(2)
18918 .sr(1)
18919 .m(m)
18920 .n(n)
18921 .k(k)
18922 .iterations(1)
18923 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18924 }
18925 }
18926 }
18927 }
18928
18929 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, n_gt_16) {
18930 TEST_REQUIRES_ARM_NEON;
18931 for (uint32_t n = 17; n < 32; n++) {
18932 for (size_t k = 1; k <= 40; k += 9) {
18933 GemmMicrokernelTester()
18934 .mr(3)
18935 .nr(16)
18936 .kr(2)
18937 .sr(1)
18938 .m(3)
18939 .n(n)
18940 .k(k)
18941 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18942 }
18943 }
18944 }
18945
18946 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, n_gt_16_strided_cn) {
18947 TEST_REQUIRES_ARM_NEON;
18948 for (uint32_t n = 17; n < 32; n++) {
18949 for (size_t k = 1; k <= 40; k += 9) {
18950 GemmMicrokernelTester()
18951 .mr(3)
18952 .nr(16)
18953 .kr(2)
18954 .sr(1)
18955 .m(3)
18956 .n(n)
18957 .k(k)
18958 .cn_stride(19)
18959 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18960 }
18961 }
18962 }
18963
18964 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, n_gt_16_subtile) {
18965 TEST_REQUIRES_ARM_NEON;
18966 for (uint32_t n = 17; n < 32; n++) {
18967 for (size_t k = 1; k <= 40; k += 9) {
18968 for (uint32_t m = 1; m <= 3; m++) {
18969 GemmMicrokernelTester()
18970 .mr(3)
18971 .nr(16)
18972 .kr(2)
18973 .sr(1)
18974 .m(m)
18975 .n(n)
18976 .k(k)
18977 .iterations(1)
18978 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18979 }
18980 }
18981 }
18982 }
18983
18984 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, n_div_16) {
18985 TEST_REQUIRES_ARM_NEON;
18986 for (uint32_t n = 32; n <= 48; n += 16) {
18987 for (size_t k = 1; k <= 40; k += 9) {
18988 GemmMicrokernelTester()
18989 .mr(3)
18990 .nr(16)
18991 .kr(2)
18992 .sr(1)
18993 .m(3)
18994 .n(n)
18995 .k(k)
18996 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
18997 }
18998 }
18999 }
19000
19001 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, n_div_16_strided_cn) {
19002 TEST_REQUIRES_ARM_NEON;
19003 for (uint32_t n = 32; n <= 48; n += 16) {
19004 for (size_t k = 1; k <= 40; k += 9) {
19005 GemmMicrokernelTester()
19006 .mr(3)
19007 .nr(16)
19008 .kr(2)
19009 .sr(1)
19010 .m(3)
19011 .n(n)
19012 .k(k)
19013 .cn_stride(19)
19014 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
19015 }
19016 }
19017 }
19018
19019 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, n_div_16_subtile) {
19020 TEST_REQUIRES_ARM_NEON;
19021 for (uint32_t n = 32; n <= 48; n += 16) {
19022 for (size_t k = 1; k <= 40; k += 9) {
19023 for (uint32_t m = 1; m <= 3; m++) {
19024 GemmMicrokernelTester()
19025 .mr(3)
19026 .nr(16)
19027 .kr(2)
19028 .sr(1)
19029 .m(m)
19030 .n(n)
19031 .k(k)
19032 .iterations(1)
19033 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
19034 }
19035 }
19036 }
19037 }
19038
19039 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019040 TEST_REQUIRES_ARM_NEON;
19041 for (size_t k = 1; k <= 40; k += 9) {
19042 GemmMicrokernelTester()
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019043 .mr(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019044 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019045 .kr(2)
19046 .sr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019047 .m(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019048 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019049 .k(k)
19050 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019051 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019052 }
19053 }
19054
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019055 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, small_kernel_subtile) {
19056 TEST_REQUIRES_ARM_NEON;
19057 for (size_t k = 1; k <= 40; k += 9) {
19058 for (uint32_t n = 1; n <= 16; n++) {
19059 for (uint32_t m = 1; m <= 3; m++) {
19060 GemmMicrokernelTester()
19061 .mr(3)
19062 .nr(16)
19063 .kr(2)
19064 .sr(1)
19065 .m(m)
19066 .n(n)
19067 .k(k)
19068 .ks(3)
19069 .iterations(1)
19070 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
19071 }
19072 }
19073 }
19074 }
19075
19076 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, n_gt_16_small_kernel) {
19077 TEST_REQUIRES_ARM_NEON;
19078 for (uint32_t n = 17; n < 32; n++) {
19079 for (size_t k = 1; k <= 40; k += 9) {
19080 GemmMicrokernelTester()
19081 .mr(3)
19082 .nr(16)
19083 .kr(2)
19084 .sr(1)
19085 .m(3)
19086 .n(n)
19087 .k(k)
19088 .ks(3)
19089 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
19090 }
19091 }
19092 }
19093
19094 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, n_div_16_small_kernel) {
19095 TEST_REQUIRES_ARM_NEON;
19096 for (uint32_t n = 32; n <= 48; n += 16) {
19097 for (size_t k = 1; k <= 40; k += 9) {
19098 GemmMicrokernelTester()
19099 .mr(3)
19100 .nr(16)
19101 .kr(2)
19102 .sr(1)
19103 .m(3)
19104 .n(n)
19105 .k(k)
19106 .ks(3)
19107 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
19108 }
19109 }
19110 }
19111
19112 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, strided_cm_subtile) {
19113 TEST_REQUIRES_ARM_NEON;
19114 for (size_t k = 1; k <= 40; k += 9) {
19115 for (uint32_t n = 1; n <= 16; n++) {
19116 for (uint32_t m = 1; m <= 3; m++) {
19117 GemmMicrokernelTester()
19118 .mr(3)
19119 .nr(16)
19120 .kr(2)
19121 .sr(1)
19122 .m(m)
19123 .n(n)
19124 .k(k)
19125 .cm_stride(19)
19126 .iterations(1)
19127 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
19128 }
19129 }
19130 }
19131 }
19132
19133 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, a_offset) {
19134 TEST_REQUIRES_ARM_NEON;
19135 for (size_t k = 1; k <= 40; k += 9) {
19136 GemmMicrokernelTester()
19137 .mr(3)
19138 .nr(16)
19139 .kr(2)
19140 .sr(1)
19141 .m(3)
19142 .n(16)
19143 .k(k)
19144 .ks(3)
19145 .a_offset(127)
19146 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
19147 }
19148 }
19149
19150 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019151 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080019152 for (size_t k = 1; k <= 40; k += 9) {
19153 for (uint32_t mz = 0; mz < 3; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019154 GemmMicrokernelTester()
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019155 .mr(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019156 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019157 .kr(2)
19158 .sr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019159 .m(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019160 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019161 .k(k)
19162 .ks(3)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019163 .a_offset(127)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019164 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019165 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019166 }
19167 }
19168 }
19169
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019170 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019171 TEST_REQUIRES_ARM_NEON;
19172 GemmMicrokernelTester()
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019173 .mr(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019174 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019175 .kr(2)
19176 .sr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019177 .m(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019178 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019179 .k(8)
19180 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019181 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019182 }
19183
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019184 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019185 TEST_REQUIRES_ARM_NEON;
19186 GemmMicrokernelTester()
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019187 .mr(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019188 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019189 .kr(2)
19190 .sr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019191 .m(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019192 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019193 .k(8)
19194 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019195 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019196 }
19197
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019198 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16C2__NEON_MULL_DUP, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019199 TEST_REQUIRES_ARM_NEON;
19200 GemmMicrokernelTester()
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019201 .mr(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019202 .nr(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019203 .kr(2)
19204 .sr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080019205 .m(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019206 .n(16)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019207 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019208 .cm_stride(19)
19209 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019210 }
19211#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
19212
19213
19214#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019215 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_eq_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019216 TEST_REQUIRES_ARM_NEON;
19217 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019218 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019219 .nr(16)
19220 .kr(2)
19221 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019222 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019223 .n(16)
19224 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019225 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019226 }
19227
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019228 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019229 TEST_REQUIRES_ARM_NEON;
19230 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019231 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019232 .nr(16)
19233 .kr(2)
19234 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019235 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019236 .n(16)
19237 .k(8)
19238 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019239 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019240 }
19241
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019242 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_eq_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019243 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080019244 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019245 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019246 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019247 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019248 .nr(16)
19249 .kr(2)
19250 .sr(1)
19251 .m(m)
19252 .n(n)
19253 .k(8)
19254 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019255 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019256 }
19257 }
19258 }
19259
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019260 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_eq_8_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019261 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019262 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019263 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019264 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019265 .nr(16)
19266 .kr(2)
19267 .sr(1)
19268 .m(m)
19269 .n(16)
19270 .k(8)
19271 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019272 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019273 }
19274 }
19275
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019276 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_eq_8_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019277 TEST_REQUIRES_ARM_NEON;
19278 for (uint32_t n = 1; n <= 16; n++) {
19279 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019280 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019281 .nr(16)
19282 .kr(2)
19283 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019284 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019285 .n(n)
19286 .k(8)
19287 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019288 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019289 }
19290 }
19291
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019292 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_lt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019293 TEST_REQUIRES_ARM_NEON;
19294 for (size_t k = 1; k < 8; k++) {
19295 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019296 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019297 .nr(16)
19298 .kr(2)
19299 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019300 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019301 .n(16)
19302 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019303 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019304 }
19305 }
19306
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019307 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_lt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019308 TEST_REQUIRES_ARM_NEON;
19309 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019310 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019311 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019312 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019313 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019314 .nr(16)
19315 .kr(2)
19316 .sr(1)
19317 .m(m)
19318 .n(n)
19319 .k(k)
19320 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019321 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019322 }
19323 }
19324 }
19325 }
19326
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019327 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019328 TEST_REQUIRES_ARM_NEON;
19329 for (size_t k = 9; k < 16; k++) {
19330 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019331 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019332 .nr(16)
19333 .kr(2)
19334 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019335 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019336 .n(16)
19337 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019338 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019339 }
19340 }
19341
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019342 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019343 TEST_REQUIRES_ARM_NEON;
19344 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019345 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019346 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019347 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019348 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019349 .nr(16)
19350 .kr(2)
19351 .sr(1)
19352 .m(m)
19353 .n(n)
19354 .k(k)
19355 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019356 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019357 }
19358 }
19359 }
19360 }
19361
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019362 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019363 TEST_REQUIRES_ARM_NEON;
19364 for (size_t k = 16; k <= 80; k += 8) {
19365 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019366 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019367 .nr(16)
19368 .kr(2)
19369 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019370 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019371 .n(16)
19372 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019373 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019374 }
19375 }
19376
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019377 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, k_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019378 TEST_REQUIRES_ARM_NEON;
19379 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019380 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019381 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019382 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019383 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019384 .nr(16)
19385 .kr(2)
19386 .sr(1)
19387 .m(m)
19388 .n(n)
19389 .k(k)
19390 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019391 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019392 }
19393 }
19394 }
19395 }
19396
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019397 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, n_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019398 TEST_REQUIRES_ARM_NEON;
19399 for (uint32_t n = 17; n < 32; n++) {
19400 for (size_t k = 1; k <= 40; k += 9) {
19401 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019402 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019403 .nr(16)
19404 .kr(2)
19405 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019406 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080019407 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019408 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019409 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019410 }
19411 }
19412 }
19413
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019414 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, n_gt_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019415 TEST_REQUIRES_ARM_NEON;
19416 for (uint32_t n = 17; n < 32; n++) {
19417 for (size_t k = 1; k <= 40; k += 9) {
19418 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019419 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019420 .nr(16)
19421 .kr(2)
19422 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019423 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080019424 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019425 .k(k)
19426 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019427 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019428 }
19429 }
19430 }
19431
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019432 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, n_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019433 TEST_REQUIRES_ARM_NEON;
19434 for (uint32_t n = 17; n < 32; n++) {
19435 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019436 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019437 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019438 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019439 .nr(16)
19440 .kr(2)
19441 .sr(1)
19442 .m(m)
19443 .n(n)
19444 .k(k)
19445 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019446 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019447 }
19448 }
19449 }
19450 }
19451
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019452 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, n_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019453 TEST_REQUIRES_ARM_NEON;
19454 for (uint32_t n = 32; n <= 48; n += 16) {
19455 for (size_t k = 1; k <= 40; k += 9) {
19456 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019457 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019458 .nr(16)
19459 .kr(2)
19460 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019461 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080019462 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019463 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019464 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019465 }
19466 }
19467 }
19468
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019469 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, n_div_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019470 TEST_REQUIRES_ARM_NEON;
19471 for (uint32_t n = 32; n <= 48; n += 16) {
19472 for (size_t k = 1; k <= 40; k += 9) {
19473 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019474 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019475 .nr(16)
19476 .kr(2)
19477 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019478 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019479 .n(n)
19480 .k(k)
19481 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019482 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019483 }
19484 }
19485 }
19486
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019487 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, n_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019488 TEST_REQUIRES_ARM_NEON;
19489 for (uint32_t n = 32; n <= 48; n += 16) {
19490 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019491 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019492 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019493 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019494 .nr(16)
19495 .kr(2)
19496 .sr(1)
19497 .m(m)
19498 .n(n)
19499 .k(k)
19500 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019501 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019502 }
19503 }
19504 }
19505 }
19506
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019507 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019508 TEST_REQUIRES_ARM_NEON;
19509 for (size_t k = 1; k <= 40; k += 9) {
19510 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019511 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019512 .nr(16)
19513 .kr(2)
19514 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019515 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019516 .n(16)
19517 .k(k)
19518 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019519 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019520 }
19521 }
19522
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019523 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019524 TEST_REQUIRES_ARM_NEON;
19525 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019526 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019527 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019528 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019529 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019530 .nr(16)
19531 .kr(2)
19532 .sr(1)
19533 .m(m)
19534 .n(n)
19535 .k(k)
19536 .ks(3)
19537 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019538 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019539 }
19540 }
19541 }
19542 }
19543
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019544 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, n_gt_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019545 TEST_REQUIRES_ARM_NEON;
19546 for (uint32_t n = 17; n < 32; n++) {
19547 for (size_t k = 1; k <= 40; k += 9) {
19548 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019549 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019550 .nr(16)
19551 .kr(2)
19552 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019553 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080019554 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019555 .k(k)
19556 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019557 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019558 }
19559 }
19560 }
19561
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019562 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, n_div_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019563 TEST_REQUIRES_ARM_NEON;
19564 for (uint32_t n = 32; n <= 48; n += 16) {
19565 for (size_t k = 1; k <= 40; k += 9) {
19566 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019567 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019568 .nr(16)
19569 .kr(2)
19570 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019571 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080019572 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019573 .k(k)
19574 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019575 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019576 }
19577 }
19578 }
19579
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019580 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019581 TEST_REQUIRES_ARM_NEON;
19582 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019583 for (uint32_t n = 1; n <= 16; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019584 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019585 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019586 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019587 .nr(16)
19588 .kr(2)
19589 .sr(1)
19590 .m(m)
19591 .n(n)
19592 .k(k)
19593 .cm_stride(19)
19594 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019595 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019596 }
19597 }
19598 }
19599 }
19600
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019601 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019602 TEST_REQUIRES_ARM_NEON;
19603 for (size_t k = 1; k <= 40; k += 9) {
19604 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019605 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019606 .nr(16)
19607 .kr(2)
19608 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019609 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019610 .n(16)
19611 .k(k)
19612 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019613 .a_offset(163)
19614 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019615 }
19616 }
19617
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019618 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019619 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080019620 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019621 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019622 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019623 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019624 .nr(16)
19625 .kr(2)
19626 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019627 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019628 .n(16)
19629 .k(k)
19630 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019631 .a_offset(163)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019632 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019633 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019634 }
19635 }
19636 }
19637
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019638 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019639 TEST_REQUIRES_ARM_NEON;
19640 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019641 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019642 .nr(16)
19643 .kr(2)
19644 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019645 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019646 .n(16)
19647 .k(8)
19648 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019649 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019650 }
19651
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019652 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019653 TEST_REQUIRES_ARM_NEON;
19654 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019655 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019656 .nr(16)
19657 .kr(2)
19658 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019659 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019660 .n(16)
19661 .k(8)
19662 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019663 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019664 }
19665
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019666 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C2__NEON_MULL_DUP, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019667 TEST_REQUIRES_ARM_NEON;
19668 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019669 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019670 .nr(16)
19671 .kr(2)
19672 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019673 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019674 .n(16)
19675 .k(8)
19676 .cm_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019677 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c2__neon_mull_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019678 }
19679#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
19680
19681
19682#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019683 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019684 TEST_REQUIRES_ARM_NEON;
19685 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019686 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019687 .nr(8)
19688 .kr(2)
19689 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019690 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019691 .n(8)
19692 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019693 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019694 }
19695
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019696 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019697 TEST_REQUIRES_ARM_NEON;
19698 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019699 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019700 .nr(8)
19701 .kr(2)
19702 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019703 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019704 .n(8)
19705 .k(16)
19706 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019707 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019708 }
19709
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019710 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_eq_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019711 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080019712 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019713 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019714 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019715 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019716 .nr(8)
19717 .kr(2)
19718 .sr(1)
19719 .m(m)
19720 .n(n)
19721 .k(16)
19722 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019723 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019724 }
19725 }
19726 }
19727
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019728 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019729 TEST_REQUIRES_ARM_NEON;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019730 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019731 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019732 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019733 .nr(8)
19734 .kr(2)
19735 .sr(1)
19736 .m(m)
19737 .n(8)
19738 .k(16)
19739 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019740 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019741 }
19742 }
19743
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019744 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019745 TEST_REQUIRES_ARM_NEON;
19746 for (uint32_t n = 1; n <= 8; n++) {
19747 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019748 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019749 .nr(8)
19750 .kr(2)
19751 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019752 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019753 .n(n)
19754 .k(16)
19755 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019756 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019757 }
19758 }
19759
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019760 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019761 TEST_REQUIRES_ARM_NEON;
19762 for (size_t k = 1; k < 16; k++) {
19763 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019764 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019765 .nr(8)
19766 .kr(2)
19767 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019768 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019769 .n(8)
19770 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019771 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019772 }
19773 }
19774
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019775 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019776 TEST_REQUIRES_ARM_NEON;
19777 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019778 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019779 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019780 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019781 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019782 .nr(8)
19783 .kr(2)
19784 .sr(1)
19785 .m(m)
19786 .n(n)
19787 .k(k)
19788 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019789 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019790 }
19791 }
19792 }
19793 }
19794
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019795 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019796 TEST_REQUIRES_ARM_NEON;
19797 for (size_t k = 17; k < 32; k++) {
19798 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019799 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019800 .nr(8)
19801 .kr(2)
19802 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019803 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019804 .n(8)
19805 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019806 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019807 }
19808 }
19809
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019810 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019811 TEST_REQUIRES_ARM_NEON;
19812 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019813 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019814 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019815 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019816 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019817 .nr(8)
19818 .kr(2)
19819 .sr(1)
19820 .m(m)
19821 .n(n)
19822 .k(k)
19823 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019824 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019825 }
19826 }
19827 }
19828 }
19829
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019830 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019831 TEST_REQUIRES_ARM_NEON;
19832 for (size_t k = 32; k <= 160; k += 16) {
19833 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019834 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019835 .nr(8)
19836 .kr(2)
19837 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019838 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019839 .n(8)
19840 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019841 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019842 }
19843 }
19844
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019845 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019846 TEST_REQUIRES_ARM_NEON;
19847 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019848 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019849 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019850 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019851 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019852 .nr(8)
19853 .kr(2)
19854 .sr(1)
19855 .m(m)
19856 .n(n)
19857 .k(k)
19858 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019859 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019860 }
19861 }
19862 }
19863 }
19864
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019865 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019866 TEST_REQUIRES_ARM_NEON;
19867 for (uint32_t n = 9; n < 16; n++) {
19868 for (size_t k = 1; k <= 80; k += 17) {
19869 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019870 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019871 .nr(8)
19872 .kr(2)
19873 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019874 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080019875 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019876 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019877 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019878 }
19879 }
19880 }
19881
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019882 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019883 TEST_REQUIRES_ARM_NEON;
19884 for (uint32_t n = 9; n < 16; n++) {
19885 for (size_t k = 1; k <= 80; k += 17) {
19886 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019887 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019888 .nr(8)
19889 .kr(2)
19890 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019891 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080019892 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019893 .k(k)
19894 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019895 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019896 }
19897 }
19898 }
19899
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019900 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019901 TEST_REQUIRES_ARM_NEON;
19902 for (uint32_t n = 9; n < 16; n++) {
19903 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019904 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019905 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019906 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019907 .nr(8)
19908 .kr(2)
19909 .sr(1)
19910 .m(m)
19911 .n(n)
19912 .k(k)
19913 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019914 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019915 }
19916 }
19917 }
19918 }
19919
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019920 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019921 TEST_REQUIRES_ARM_NEON;
19922 for (uint32_t n = 16; n <= 24; n += 8) {
19923 for (size_t k = 1; k <= 80; k += 17) {
19924 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019925 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019926 .nr(8)
19927 .kr(2)
19928 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019929 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080019930 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019931 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019932 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019933 }
19934 }
19935 }
19936
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019937 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019938 TEST_REQUIRES_ARM_NEON;
19939 for (uint32_t n = 16; n <= 24; n += 8) {
19940 for (size_t k = 1; k <= 80; k += 17) {
19941 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019942 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019943 .nr(8)
19944 .kr(2)
19945 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019946 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019947 .n(n)
19948 .k(k)
19949 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019950 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019951 }
19952 }
19953 }
19954
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019955 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019956 TEST_REQUIRES_ARM_NEON;
19957 for (uint32_t n = 16; n <= 24; n += 8) {
19958 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019959 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019960 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019961 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019962 .nr(8)
19963 .kr(2)
19964 .sr(1)
19965 .m(m)
19966 .n(n)
19967 .k(k)
19968 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019969 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019970 }
19971 }
19972 }
19973 }
19974
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019975 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019976 TEST_REQUIRES_ARM_NEON;
19977 for (size_t k = 1; k <= 80; k += 17) {
19978 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019979 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019980 .nr(8)
19981 .kr(2)
19982 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019983 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019984 .n(8)
19985 .k(k)
19986 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019987 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019988 }
19989 }
19990
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019991 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019992 TEST_REQUIRES_ARM_NEON;
19993 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080019994 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019995 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019996 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080019997 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080019998 .nr(8)
19999 .kr(2)
20000 .sr(1)
20001 .m(m)
20002 .n(n)
20003 .k(k)
20004 .ks(3)
20005 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020006 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020007 }
20008 }
20009 }
20010 }
20011
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020012 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020013 TEST_REQUIRES_ARM_NEON;
20014 for (uint32_t n = 9; n < 16; n++) {
20015 for (size_t k = 1; k <= 80; k += 17) {
20016 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020017 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020018 .nr(8)
20019 .kr(2)
20020 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020021 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020022 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020023 .k(k)
20024 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020025 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020026 }
20027 }
20028 }
20029
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020030 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020031 TEST_REQUIRES_ARM_NEON;
20032 for (uint32_t n = 16; n <= 24; n += 8) {
20033 for (size_t k = 1; k <= 80; k += 17) {
20034 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020035 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020036 .nr(8)
20037 .kr(2)
20038 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020039 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020040 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020041 .k(k)
20042 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020043 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020044 }
20045 }
20046 }
20047
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020048 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020049 TEST_REQUIRES_ARM_NEON;
20050 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020051 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020052 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020053 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020054 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020055 .nr(8)
20056 .kr(2)
20057 .sr(1)
20058 .m(m)
20059 .n(n)
20060 .k(k)
20061 .cm_stride(11)
20062 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020063 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020064 }
20065 }
20066 }
20067 }
20068
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020069 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020070 TEST_REQUIRES_ARM_NEON;
20071 for (size_t k = 1; k <= 80; k += 17) {
20072 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020073 .mr(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020074 .nr(8)
20075 .kr(2)
20076 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020077 .m(2)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020078 .n(8)
20079 .k(k)
20080 .ks(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020081 .a_offset(163)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020082 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020083 }
20084 }
20085
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020086 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020087 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080020088 for (size_t k = 1; k <= 80; k += 17) {
20089 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020090 GemmMicrokernelTester()
20091 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020092 .nr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020093 .kr(2)
20094 .sr(1)
20095 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020096 .n(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020097 .k(k)
20098 .ks(3)
20099 .a_offset(163)
20100 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020101 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020102 }
20103 }
20104 }
20105
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020106 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020107 TEST_REQUIRES_ARM_NEON;
20108 GemmMicrokernelTester()
20109 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020110 .nr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020111 .kr(2)
20112 .sr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020113 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020114 .n(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020115 .k(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020116 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020117 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020118 }
20119
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020120 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020121 TEST_REQUIRES_ARM_NEON;
20122 GemmMicrokernelTester()
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020123 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020124 .nr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020125 .kr(2)
20126 .sr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020127 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020128 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020129 .k(16)
20130 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020131 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020132 }
20133
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020134 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C2__NEON_MLAL_DUP, strided_cm) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020135 TEST_REQUIRES_ARM_NEON;
20136 GemmMicrokernelTester()
20137 .mr(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020138 .nr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020139 .kr(2)
20140 .sr(1)
20141 .m(2)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020142 .n(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080020143 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020144 .cm_stride(11)
20145 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c2__neon_mlal_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020146 }
20147#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
20148
20149
20150#if XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020151 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020152 TEST_REQUIRES_ARM_NEON;
20153 GemmMicrokernelTester()
20154 .mr(2)
20155 .nr(8)
20156 .kr(8)
20157 .sr(1)
20158 .m(2)
20159 .n(8)
20160 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020161 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020162 }
20163
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020164 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020165 TEST_REQUIRES_ARM_NEON;
20166 GemmMicrokernelTester()
20167 .mr(2)
20168 .nr(8)
20169 .kr(8)
20170 .sr(1)
20171 .m(2)
20172 .n(8)
20173 .k(16)
20174 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020175 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020176 }
20177
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020178 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_eq_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020179 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080020180 for (uint32_t n = 1; n <= 8; n++) {
20181 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020182 GemmMicrokernelTester()
20183 .mr(2)
20184 .nr(8)
20185 .kr(8)
20186 .sr(1)
20187 .m(m)
20188 .n(n)
20189 .k(16)
20190 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020191 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020192 }
20193 }
20194 }
20195
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020196 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020197 TEST_REQUIRES_ARM_NEON;
20198 for (uint32_t m = 1; m <= 2; m++) {
20199 GemmMicrokernelTester()
20200 .mr(2)
20201 .nr(8)
20202 .kr(8)
20203 .sr(1)
20204 .m(m)
20205 .n(8)
20206 .k(16)
20207 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020208 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020209 }
20210 }
20211
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020212 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020213 TEST_REQUIRES_ARM_NEON;
20214 for (uint32_t n = 1; n <= 8; n++) {
20215 GemmMicrokernelTester()
20216 .mr(2)
20217 .nr(8)
20218 .kr(8)
20219 .sr(1)
20220 .m(2)
20221 .n(n)
20222 .k(16)
20223 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020224 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020225 }
20226 }
20227
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020228 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020229 TEST_REQUIRES_ARM_NEON;
20230 for (size_t k = 1; k < 16; k++) {
20231 GemmMicrokernelTester()
20232 .mr(2)
20233 .nr(8)
20234 .kr(8)
20235 .sr(1)
20236 .m(2)
20237 .n(8)
20238 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020239 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020240 }
20241 }
20242
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020243 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020244 TEST_REQUIRES_ARM_NEON;
20245 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020246 for (uint32_t n = 1; n <= 8; n++) {
20247 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020248 GemmMicrokernelTester()
20249 .mr(2)
20250 .nr(8)
20251 .kr(8)
20252 .sr(1)
20253 .m(m)
20254 .n(n)
20255 .k(k)
20256 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020257 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020258 }
20259 }
20260 }
20261 }
20262
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020263 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020264 TEST_REQUIRES_ARM_NEON;
20265 for (size_t k = 17; k < 32; k++) {
20266 GemmMicrokernelTester()
20267 .mr(2)
20268 .nr(8)
20269 .kr(8)
20270 .sr(1)
20271 .m(2)
20272 .n(8)
20273 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020274 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020275 }
20276 }
20277
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020278 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020279 TEST_REQUIRES_ARM_NEON;
20280 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020281 for (uint32_t n = 1; n <= 8; n++) {
20282 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020283 GemmMicrokernelTester()
20284 .mr(2)
20285 .nr(8)
20286 .kr(8)
20287 .sr(1)
20288 .m(m)
20289 .n(n)
20290 .k(k)
20291 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020292 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020293 }
20294 }
20295 }
20296 }
20297
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020298 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020299 TEST_REQUIRES_ARM_NEON;
20300 for (size_t k = 32; k <= 160; k += 16) {
20301 GemmMicrokernelTester()
20302 .mr(2)
20303 .nr(8)
20304 .kr(8)
20305 .sr(1)
20306 .m(2)
20307 .n(8)
20308 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020309 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020310 }
20311 }
20312
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020313 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020314 TEST_REQUIRES_ARM_NEON;
20315 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020316 for (uint32_t n = 1; n <= 8; n++) {
20317 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020318 GemmMicrokernelTester()
20319 .mr(2)
20320 .nr(8)
20321 .kr(8)
20322 .sr(1)
20323 .m(m)
20324 .n(n)
20325 .k(k)
20326 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020327 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020328 }
20329 }
20330 }
20331 }
20332
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020333 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020334 TEST_REQUIRES_ARM_NEON;
20335 for (uint32_t n = 9; n < 16; n++) {
20336 for (size_t k = 1; k <= 80; k += 17) {
20337 GemmMicrokernelTester()
20338 .mr(2)
20339 .nr(8)
20340 .kr(8)
20341 .sr(1)
20342 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020343 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020344 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020345 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020346 }
20347 }
20348 }
20349
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020350 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020351 TEST_REQUIRES_ARM_NEON;
20352 for (uint32_t n = 9; n < 16; n++) {
20353 for (size_t k = 1; k <= 80; k += 17) {
20354 GemmMicrokernelTester()
20355 .mr(2)
20356 .nr(8)
20357 .kr(8)
20358 .sr(1)
20359 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020360 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020361 .k(k)
20362 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020363 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020364 }
20365 }
20366 }
20367
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020368 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020369 TEST_REQUIRES_ARM_NEON;
20370 for (uint32_t n = 9; n < 16; n++) {
20371 for (size_t k = 1; k <= 80; k += 17) {
20372 for (uint32_t m = 1; m <= 2; m++) {
20373 GemmMicrokernelTester()
20374 .mr(2)
20375 .nr(8)
20376 .kr(8)
20377 .sr(1)
20378 .m(m)
20379 .n(n)
20380 .k(k)
20381 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020382 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020383 }
20384 }
20385 }
20386 }
20387
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020388 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020389 TEST_REQUIRES_ARM_NEON;
20390 for (uint32_t n = 16; n <= 24; n += 8) {
20391 for (size_t k = 1; k <= 80; k += 17) {
20392 GemmMicrokernelTester()
20393 .mr(2)
20394 .nr(8)
20395 .kr(8)
20396 .sr(1)
20397 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020398 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020399 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020400 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020401 }
20402 }
20403 }
20404
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020405 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020406 TEST_REQUIRES_ARM_NEON;
20407 for (uint32_t n = 16; n <= 24; n += 8) {
20408 for (size_t k = 1; k <= 80; k += 17) {
20409 GemmMicrokernelTester()
20410 .mr(2)
20411 .nr(8)
20412 .kr(8)
20413 .sr(1)
20414 .m(2)
20415 .n(n)
20416 .k(k)
20417 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020418 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020419 }
20420 }
20421 }
20422
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020423 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020424 TEST_REQUIRES_ARM_NEON;
20425 for (uint32_t n = 16; n <= 24; n += 8) {
20426 for (size_t k = 1; k <= 80; k += 17) {
20427 for (uint32_t m = 1; m <= 2; m++) {
20428 GemmMicrokernelTester()
20429 .mr(2)
20430 .nr(8)
20431 .kr(8)
20432 .sr(1)
20433 .m(m)
20434 .n(n)
20435 .k(k)
20436 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020437 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020438 }
20439 }
20440 }
20441 }
20442
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020443 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020444 TEST_REQUIRES_ARM_NEON;
20445 for (size_t k = 1; k <= 80; k += 17) {
20446 GemmMicrokernelTester()
20447 .mr(2)
20448 .nr(8)
20449 .kr(8)
20450 .sr(1)
20451 .m(2)
20452 .n(8)
20453 .k(k)
20454 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020455 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020456 }
20457 }
20458
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020459 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020460 TEST_REQUIRES_ARM_NEON;
20461 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020462 for (uint32_t n = 1; n <= 8; n++) {
20463 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020464 GemmMicrokernelTester()
20465 .mr(2)
20466 .nr(8)
20467 .kr(8)
20468 .sr(1)
20469 .m(m)
20470 .n(n)
20471 .k(k)
20472 .ks(3)
20473 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020474 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020475 }
20476 }
20477 }
20478 }
20479
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020480 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020481 TEST_REQUIRES_ARM_NEON;
20482 for (uint32_t n = 9; n < 16; n++) {
20483 for (size_t k = 1; k <= 80; k += 17) {
20484 GemmMicrokernelTester()
20485 .mr(2)
20486 .nr(8)
20487 .kr(8)
20488 .sr(1)
20489 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020490 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020491 .k(k)
20492 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020493 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020494 }
20495 }
20496 }
20497
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020498 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020499 TEST_REQUIRES_ARM_NEON;
20500 for (uint32_t n = 16; n <= 24; n += 8) {
20501 for (size_t k = 1; k <= 80; k += 17) {
20502 GemmMicrokernelTester()
20503 .mr(2)
20504 .nr(8)
20505 .kr(8)
20506 .sr(1)
20507 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020508 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020509 .k(k)
20510 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020511 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020512 }
20513 }
20514 }
20515
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020516 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020517 TEST_REQUIRES_ARM_NEON;
20518 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020519 for (uint32_t n = 1; n <= 8; n++) {
20520 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020521 GemmMicrokernelTester()
20522 .mr(2)
20523 .nr(8)
20524 .kr(8)
20525 .sr(1)
20526 .m(m)
20527 .n(n)
20528 .k(k)
20529 .cm_stride(11)
20530 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020531 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020532 }
20533 }
20534 }
20535 }
20536
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020537 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020538 TEST_REQUIRES_ARM_NEON;
20539 for (size_t k = 1; k <= 80; k += 17) {
20540 GemmMicrokernelTester()
20541 .mr(2)
20542 .nr(8)
20543 .kr(8)
20544 .sr(1)
20545 .m(2)
20546 .n(8)
20547 .k(k)
20548 .ks(3)
20549 .a_offset(163)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020550 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020551 }
20552 }
20553
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020554 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020555 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080020556 for (size_t k = 1; k <= 80; k += 17) {
20557 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020558 GemmMicrokernelTester()
20559 .mr(2)
20560 .nr(8)
20561 .kr(8)
20562 .sr(1)
20563 .m(2)
20564 .n(8)
20565 .k(k)
20566 .ks(3)
20567 .a_offset(163)
20568 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020569 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020570 }
20571 }
20572 }
20573
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020574 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020575 TEST_REQUIRES_ARM_NEON;
20576 GemmMicrokernelTester()
20577 .mr(2)
20578 .nr(8)
20579 .kr(8)
20580 .sr(1)
20581 .m(2)
20582 .n(8)
20583 .k(16)
20584 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020585 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020586 }
20587
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020588 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020589 TEST_REQUIRES_ARM_NEON;
20590 GemmMicrokernelTester()
20591 .mr(2)
20592 .nr(8)
20593 .kr(8)
20594 .sr(1)
20595 .m(2)
20596 .n(8)
20597 .k(16)
20598 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020599 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020600 }
20601
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020602 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020603 TEST_REQUIRES_ARM_NEON;
20604 GemmMicrokernelTester()
20605 .mr(2)
20606 .nr(8)
20607 .kr(8)
20608 .sr(1)
20609 .m(2)
20610 .n(8)
20611 .k(16)
20612 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020613 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020614 }
20615#endif // XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
20616
20617
20618#if XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020619 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020620 TEST_REQUIRES_ARM_NEON;
20621 GemmMicrokernelTester()
20622 .mr(2)
20623 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020624 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020625 .sr(1)
20626 .m(2)
20627 .n(8)
20628 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020629 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020630 }
20631
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020632 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020633 TEST_REQUIRES_ARM_NEON;
20634 GemmMicrokernelTester()
20635 .mr(2)
20636 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020637 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020638 .sr(1)
20639 .m(2)
20640 .n(8)
20641 .k(16)
20642 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020643 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020644 }
20645
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020646 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_eq_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020647 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080020648 for (uint32_t n = 1; n <= 8; n++) {
20649 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020650 GemmMicrokernelTester()
20651 .mr(2)
20652 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020653 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020654 .sr(1)
20655 .m(m)
20656 .n(n)
20657 .k(16)
20658 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020659 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020660 }
20661 }
20662 }
20663
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020664 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020665 TEST_REQUIRES_ARM_NEON;
20666 for (uint32_t m = 1; m <= 2; m++) {
20667 GemmMicrokernelTester()
20668 .mr(2)
20669 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020670 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020671 .sr(1)
20672 .m(m)
20673 .n(8)
20674 .k(16)
20675 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020676 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020677 }
20678 }
20679
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020680 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020681 TEST_REQUIRES_ARM_NEON;
20682 for (uint32_t n = 1; n <= 8; n++) {
20683 GemmMicrokernelTester()
20684 .mr(2)
20685 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020686 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020687 .sr(1)
20688 .m(2)
20689 .n(n)
20690 .k(16)
20691 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020692 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020693 }
20694 }
20695
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020696 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020697 TEST_REQUIRES_ARM_NEON;
20698 for (size_t k = 1; k < 16; k++) {
20699 GemmMicrokernelTester()
20700 .mr(2)
20701 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020702 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020703 .sr(1)
20704 .m(2)
20705 .n(8)
20706 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020707 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020708 }
20709 }
20710
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020711 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020712 TEST_REQUIRES_ARM_NEON;
20713 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020714 for (uint32_t n = 1; n <= 8; n++) {
20715 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020716 GemmMicrokernelTester()
20717 .mr(2)
20718 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020719 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020720 .sr(1)
20721 .m(m)
20722 .n(n)
20723 .k(k)
20724 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020725 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020726 }
20727 }
20728 }
20729 }
20730
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020731 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020732 TEST_REQUIRES_ARM_NEON;
20733 for (size_t k = 17; k < 32; k++) {
20734 GemmMicrokernelTester()
20735 .mr(2)
20736 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020737 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020738 .sr(1)
20739 .m(2)
20740 .n(8)
20741 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020742 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020743 }
20744 }
20745
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020746 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020747 TEST_REQUIRES_ARM_NEON;
20748 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020749 for (uint32_t n = 1; n <= 8; n++) {
20750 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020751 GemmMicrokernelTester()
20752 .mr(2)
20753 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020754 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020755 .sr(1)
20756 .m(m)
20757 .n(n)
20758 .k(k)
20759 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020760 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020761 }
20762 }
20763 }
20764 }
20765
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020766 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020767 TEST_REQUIRES_ARM_NEON;
20768 for (size_t k = 32; k <= 160; k += 16) {
20769 GemmMicrokernelTester()
20770 .mr(2)
20771 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020772 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020773 .sr(1)
20774 .m(2)
20775 .n(8)
20776 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020777 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020778 }
20779 }
20780
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020781 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020782 TEST_REQUIRES_ARM_NEON;
20783 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020784 for (uint32_t n = 1; n <= 8; n++) {
20785 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020786 GemmMicrokernelTester()
20787 .mr(2)
20788 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020789 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020790 .sr(1)
20791 .m(m)
20792 .n(n)
20793 .k(k)
20794 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020795 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020796 }
20797 }
20798 }
20799 }
20800
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020801 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020802 TEST_REQUIRES_ARM_NEON;
20803 for (uint32_t n = 9; n < 16; n++) {
20804 for (size_t k = 1; k <= 80; k += 17) {
20805 GemmMicrokernelTester()
20806 .mr(2)
20807 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020808 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020809 .sr(1)
20810 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020811 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020812 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020813 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020814 }
20815 }
20816 }
20817
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020818 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020819 TEST_REQUIRES_ARM_NEON;
20820 for (uint32_t n = 9; n < 16; n++) {
20821 for (size_t k = 1; k <= 80; k += 17) {
20822 GemmMicrokernelTester()
20823 .mr(2)
20824 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020825 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020826 .sr(1)
20827 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020828 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020829 .k(k)
20830 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020831 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020832 }
20833 }
20834 }
20835
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020836 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020837 TEST_REQUIRES_ARM_NEON;
20838 for (uint32_t n = 9; n < 16; n++) {
20839 for (size_t k = 1; k <= 80; k += 17) {
20840 for (uint32_t m = 1; m <= 2; m++) {
20841 GemmMicrokernelTester()
20842 .mr(2)
20843 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020844 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020845 .sr(1)
20846 .m(m)
20847 .n(n)
20848 .k(k)
20849 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020850 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020851 }
20852 }
20853 }
20854 }
20855
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020856 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020857 TEST_REQUIRES_ARM_NEON;
20858 for (uint32_t n = 16; n <= 24; n += 8) {
20859 for (size_t k = 1; k <= 80; k += 17) {
20860 GemmMicrokernelTester()
20861 .mr(2)
20862 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020863 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020864 .sr(1)
20865 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020866 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020867 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020868 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020869 }
20870 }
20871 }
20872
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020873 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020874 TEST_REQUIRES_ARM_NEON;
20875 for (uint32_t n = 16; n <= 24; n += 8) {
20876 for (size_t k = 1; k <= 80; k += 17) {
20877 GemmMicrokernelTester()
20878 .mr(2)
20879 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020880 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020881 .sr(1)
20882 .m(2)
20883 .n(n)
20884 .k(k)
20885 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020886 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020887 }
20888 }
20889 }
20890
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020891 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020892 TEST_REQUIRES_ARM_NEON;
20893 for (uint32_t n = 16; n <= 24; n += 8) {
20894 for (size_t k = 1; k <= 80; k += 17) {
20895 for (uint32_t m = 1; m <= 2; m++) {
20896 GemmMicrokernelTester()
20897 .mr(2)
20898 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020899 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020900 .sr(1)
20901 .m(m)
20902 .n(n)
20903 .k(k)
20904 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020905 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020906 }
20907 }
20908 }
20909 }
20910
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020911 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020912 TEST_REQUIRES_ARM_NEON;
20913 for (size_t k = 1; k <= 80; k += 17) {
20914 GemmMicrokernelTester()
20915 .mr(2)
20916 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020917 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020918 .sr(1)
20919 .m(2)
20920 .n(8)
20921 .k(k)
20922 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020923 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020924 }
20925 }
20926
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020927 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020928 TEST_REQUIRES_ARM_NEON;
20929 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020930 for (uint32_t n = 1; n <= 8; n++) {
20931 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020932 GemmMicrokernelTester()
20933 .mr(2)
20934 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020935 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020936 .sr(1)
20937 .m(m)
20938 .n(n)
20939 .k(k)
20940 .ks(3)
20941 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020942 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020943 }
20944 }
20945 }
20946 }
20947
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020948 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020949 TEST_REQUIRES_ARM_NEON;
20950 for (uint32_t n = 9; n < 16; n++) {
20951 for (size_t k = 1; k <= 80; k += 17) {
20952 GemmMicrokernelTester()
20953 .mr(2)
20954 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020955 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020956 .sr(1)
20957 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020958 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020959 .k(k)
20960 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020961 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020962 }
20963 }
20964 }
20965
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020966 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020967 TEST_REQUIRES_ARM_NEON;
20968 for (uint32_t n = 16; n <= 24; n += 8) {
20969 for (size_t k = 1; k <= 80; k += 17) {
20970 GemmMicrokernelTester()
20971 .mr(2)
20972 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020973 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020974 .sr(1)
20975 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080020976 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020977 .k(k)
20978 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020979 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020980 }
20981 }
20982 }
20983
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020984 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020985 TEST_REQUIRES_ARM_NEON;
20986 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080020987 for (uint32_t n = 1; n <= 8; n++) {
20988 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020989 GemmMicrokernelTester()
20990 .mr(2)
20991 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020992 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080020993 .sr(1)
20994 .m(m)
20995 .n(n)
20996 .k(k)
20997 .cm_stride(11)
20998 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080020999 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021000 }
21001 }
21002 }
21003 }
21004
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021005 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021006 TEST_REQUIRES_ARM_NEON;
21007 for (size_t k = 1; k <= 80; k += 17) {
21008 GemmMicrokernelTester()
21009 .mr(2)
21010 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021011 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021012 .sr(1)
21013 .m(2)
21014 .n(8)
21015 .k(k)
21016 .ks(3)
21017 .a_offset(163)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021018 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021019 }
21020 }
21021
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021022 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021023 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080021024 for (size_t k = 1; k <= 80; k += 17) {
21025 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021026 GemmMicrokernelTester()
21027 .mr(2)
21028 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021029 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021030 .sr(1)
21031 .m(2)
21032 .n(8)
21033 .k(k)
21034 .ks(3)
21035 .a_offset(163)
21036 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021037 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021038 }
21039 }
21040 }
21041
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021042 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021043 TEST_REQUIRES_ARM_NEON;
21044 GemmMicrokernelTester()
21045 .mr(2)
21046 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021047 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021048 .sr(1)
21049 .m(2)
21050 .n(8)
21051 .k(16)
21052 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021053 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021054 }
21055
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021056 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021057 TEST_REQUIRES_ARM_NEON;
21058 GemmMicrokernelTester()
21059 .mr(2)
21060 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021061 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021062 .sr(1)
21063 .m(2)
21064 .n(8)
21065 .k(16)
21066 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021067 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021068 }
21069
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021070 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_CORTEX_A53, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021071 TEST_REQUIRES_ARM_NEON;
21072 GemmMicrokernelTester()
21073 .mr(2)
21074 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021075 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080021076 .sr(1)
21077 .m(2)
21078 .n(8)
21079 .k(16)
21080 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080021081 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21082 }
21083#endif // XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
21084
21085
21086#if XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
21087 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_eq_16) {
21088 TEST_REQUIRES_ARM_NEON;
21089 GemmMicrokernelTester()
21090 .mr(2)
21091 .nr(8)
21092 .kr(8)
21093 .sr(1)
21094 .m(2)
21095 .n(8)
21096 .k(16)
21097 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21098 }
21099
21100 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, strided_cn) {
21101 TEST_REQUIRES_ARM_NEON;
21102 GemmMicrokernelTester()
21103 .mr(2)
21104 .nr(8)
21105 .kr(8)
21106 .sr(1)
21107 .m(2)
21108 .n(8)
21109 .k(16)
21110 .cn_stride(11)
21111 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21112 }
21113
21114 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_eq_16_subtile) {
21115 TEST_REQUIRES_ARM_NEON;
21116 for (uint32_t n = 1; n <= 8; n++) {
21117 for (uint32_t m = 1; m <= 2; m++) {
21118 GemmMicrokernelTester()
21119 .mr(2)
21120 .nr(8)
21121 .kr(8)
21122 .sr(1)
21123 .m(m)
21124 .n(n)
21125 .k(16)
21126 .iterations(1)
21127 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21128 }
21129 }
21130 }
21131
21132 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_eq_16_subtile_m) {
21133 TEST_REQUIRES_ARM_NEON;
21134 for (uint32_t m = 1; m <= 2; m++) {
21135 GemmMicrokernelTester()
21136 .mr(2)
21137 .nr(8)
21138 .kr(8)
21139 .sr(1)
21140 .m(m)
21141 .n(8)
21142 .k(16)
21143 .iterations(1)
21144 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21145 }
21146 }
21147
21148 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_eq_16_subtile_n) {
21149 TEST_REQUIRES_ARM_NEON;
21150 for (uint32_t n = 1; n <= 8; n++) {
21151 GemmMicrokernelTester()
21152 .mr(2)
21153 .nr(8)
21154 .kr(8)
21155 .sr(1)
21156 .m(2)
21157 .n(n)
21158 .k(16)
21159 .iterations(1)
21160 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21161 }
21162 }
21163
21164 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_lt_16) {
21165 TEST_REQUIRES_ARM_NEON;
21166 for (size_t k = 1; k < 16; k++) {
21167 GemmMicrokernelTester()
21168 .mr(2)
21169 .nr(8)
21170 .kr(8)
21171 .sr(1)
21172 .m(2)
21173 .n(8)
21174 .k(k)
21175 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21176 }
21177 }
21178
21179 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_lt_16_subtile) {
21180 TEST_REQUIRES_ARM_NEON;
21181 for (size_t k = 1; k < 16; k++) {
21182 for (uint32_t n = 1; n <= 8; n++) {
21183 for (uint32_t m = 1; m <= 2; m++) {
21184 GemmMicrokernelTester()
21185 .mr(2)
21186 .nr(8)
21187 .kr(8)
21188 .sr(1)
21189 .m(m)
21190 .n(n)
21191 .k(k)
21192 .iterations(1)
21193 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21194 }
21195 }
21196 }
21197 }
21198
21199 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_gt_16) {
21200 TEST_REQUIRES_ARM_NEON;
21201 for (size_t k = 17; k < 32; k++) {
21202 GemmMicrokernelTester()
21203 .mr(2)
21204 .nr(8)
21205 .kr(8)
21206 .sr(1)
21207 .m(2)
21208 .n(8)
21209 .k(k)
21210 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21211 }
21212 }
21213
21214 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_gt_16_subtile) {
21215 TEST_REQUIRES_ARM_NEON;
21216 for (size_t k = 17; k < 32; k++) {
21217 for (uint32_t n = 1; n <= 8; n++) {
21218 for (uint32_t m = 1; m <= 2; m++) {
21219 GemmMicrokernelTester()
21220 .mr(2)
21221 .nr(8)
21222 .kr(8)
21223 .sr(1)
21224 .m(m)
21225 .n(n)
21226 .k(k)
21227 .iterations(1)
21228 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21229 }
21230 }
21231 }
21232 }
21233
21234 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_div_16) {
21235 TEST_REQUIRES_ARM_NEON;
21236 for (size_t k = 32; k <= 160; k += 16) {
21237 GemmMicrokernelTester()
21238 .mr(2)
21239 .nr(8)
21240 .kr(8)
21241 .sr(1)
21242 .m(2)
21243 .n(8)
21244 .k(k)
21245 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21246 }
21247 }
21248
21249 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_div_16_subtile) {
21250 TEST_REQUIRES_ARM_NEON;
21251 for (size_t k = 32; k <= 160; k += 16) {
21252 for (uint32_t n = 1; n <= 8; n++) {
21253 for (uint32_t m = 1; m <= 2; m++) {
21254 GemmMicrokernelTester()
21255 .mr(2)
21256 .nr(8)
21257 .kr(8)
21258 .sr(1)
21259 .m(m)
21260 .n(n)
21261 .k(k)
21262 .iterations(1)
21263 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21264 }
21265 }
21266 }
21267 }
21268
21269 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_gt_8) {
21270 TEST_REQUIRES_ARM_NEON;
21271 for (uint32_t n = 9; n < 16; n++) {
21272 for (size_t k = 1; k <= 80; k += 17) {
21273 GemmMicrokernelTester()
21274 .mr(2)
21275 .nr(8)
21276 .kr(8)
21277 .sr(1)
21278 .m(2)
21279 .n(n)
21280 .k(k)
21281 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21282 }
21283 }
21284 }
21285
21286 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_gt_8_strided_cn) {
21287 TEST_REQUIRES_ARM_NEON;
21288 for (uint32_t n = 9; n < 16; n++) {
21289 for (size_t k = 1; k <= 80; k += 17) {
21290 GemmMicrokernelTester()
21291 .mr(2)
21292 .nr(8)
21293 .kr(8)
21294 .sr(1)
21295 .m(2)
21296 .n(n)
21297 .k(k)
21298 .cn_stride(11)
21299 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21300 }
21301 }
21302 }
21303
21304 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_gt_8_subtile) {
21305 TEST_REQUIRES_ARM_NEON;
21306 for (uint32_t n = 9; n < 16; n++) {
21307 for (size_t k = 1; k <= 80; k += 17) {
21308 for (uint32_t m = 1; m <= 2; m++) {
21309 GemmMicrokernelTester()
21310 .mr(2)
21311 .nr(8)
21312 .kr(8)
21313 .sr(1)
21314 .m(m)
21315 .n(n)
21316 .k(k)
21317 .iterations(1)
21318 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21319 }
21320 }
21321 }
21322 }
21323
21324 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_div_8) {
21325 TEST_REQUIRES_ARM_NEON;
21326 for (uint32_t n = 16; n <= 24; n += 8) {
21327 for (size_t k = 1; k <= 80; k += 17) {
21328 GemmMicrokernelTester()
21329 .mr(2)
21330 .nr(8)
21331 .kr(8)
21332 .sr(1)
21333 .m(2)
21334 .n(n)
21335 .k(k)
21336 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21337 }
21338 }
21339 }
21340
21341 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_div_8_strided_cn) {
21342 TEST_REQUIRES_ARM_NEON;
21343 for (uint32_t n = 16; n <= 24; n += 8) {
21344 for (size_t k = 1; k <= 80; k += 17) {
21345 GemmMicrokernelTester()
21346 .mr(2)
21347 .nr(8)
21348 .kr(8)
21349 .sr(1)
21350 .m(2)
21351 .n(n)
21352 .k(k)
21353 .cn_stride(11)
21354 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21355 }
21356 }
21357 }
21358
21359 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_div_8_subtile) {
21360 TEST_REQUIRES_ARM_NEON;
21361 for (uint32_t n = 16; n <= 24; n += 8) {
21362 for (size_t k = 1; k <= 80; k += 17) {
21363 for (uint32_t m = 1; m <= 2; m++) {
21364 GemmMicrokernelTester()
21365 .mr(2)
21366 .nr(8)
21367 .kr(8)
21368 .sr(1)
21369 .m(m)
21370 .n(n)
21371 .k(k)
21372 .iterations(1)
21373 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21374 }
21375 }
21376 }
21377 }
21378
21379 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, small_kernel) {
21380 TEST_REQUIRES_ARM_NEON;
21381 for (size_t k = 1; k <= 80; k += 17) {
21382 GemmMicrokernelTester()
21383 .mr(2)
21384 .nr(8)
21385 .kr(8)
21386 .sr(1)
21387 .m(2)
21388 .n(8)
21389 .k(k)
21390 .ks(3)
21391 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21392 }
21393 }
21394
21395 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, small_kernel_subtile) {
21396 TEST_REQUIRES_ARM_NEON;
21397 for (size_t k = 1; k <= 80; k += 17) {
21398 for (uint32_t n = 1; n <= 8; n++) {
21399 for (uint32_t m = 1; m <= 2; m++) {
21400 GemmMicrokernelTester()
21401 .mr(2)
21402 .nr(8)
21403 .kr(8)
21404 .sr(1)
21405 .m(m)
21406 .n(n)
21407 .k(k)
21408 .ks(3)
21409 .iterations(1)
21410 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21411 }
21412 }
21413 }
21414 }
21415
21416 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_gt_8_small_kernel) {
21417 TEST_REQUIRES_ARM_NEON;
21418 for (uint32_t n = 9; n < 16; n++) {
21419 for (size_t k = 1; k <= 80; k += 17) {
21420 GemmMicrokernelTester()
21421 .mr(2)
21422 .nr(8)
21423 .kr(8)
21424 .sr(1)
21425 .m(2)
21426 .n(n)
21427 .k(k)
21428 .ks(3)
21429 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21430 }
21431 }
21432 }
21433
21434 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_div_8_small_kernel) {
21435 TEST_REQUIRES_ARM_NEON;
21436 for (uint32_t n = 16; n <= 24; n += 8) {
21437 for (size_t k = 1; k <= 80; k += 17) {
21438 GemmMicrokernelTester()
21439 .mr(2)
21440 .nr(8)
21441 .kr(8)
21442 .sr(1)
21443 .m(2)
21444 .n(n)
21445 .k(k)
21446 .ks(3)
21447 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21448 }
21449 }
21450 }
21451
21452 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, strided_cm_subtile) {
21453 TEST_REQUIRES_ARM_NEON;
21454 for (size_t k = 1; k <= 80; k += 17) {
21455 for (uint32_t n = 1; n <= 8; n++) {
21456 for (uint32_t m = 1; m <= 2; m++) {
21457 GemmMicrokernelTester()
21458 .mr(2)
21459 .nr(8)
21460 .kr(8)
21461 .sr(1)
21462 .m(m)
21463 .n(n)
21464 .k(k)
21465 .cm_stride(11)
21466 .iterations(1)
21467 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21468 }
21469 }
21470 }
21471 }
21472
21473 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, a_offset) {
21474 TEST_REQUIRES_ARM_NEON;
21475 for (size_t k = 1; k <= 80; k += 17) {
21476 GemmMicrokernelTester()
21477 .mr(2)
21478 .nr(8)
21479 .kr(8)
21480 .sr(1)
21481 .m(2)
21482 .n(8)
21483 .k(k)
21484 .ks(3)
21485 .a_offset(163)
21486 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21487 }
21488 }
21489
21490 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, zero) {
21491 TEST_REQUIRES_ARM_NEON;
21492 for (size_t k = 1; k <= 80; k += 17) {
21493 for (uint32_t mz = 0; mz < 2; mz++) {
21494 GemmMicrokernelTester()
21495 .mr(2)
21496 .nr(8)
21497 .kr(8)
21498 .sr(1)
21499 .m(2)
21500 .n(8)
21501 .k(k)
21502 .ks(3)
21503 .a_offset(163)
21504 .zero_index(mz)
21505 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21506 }
21507 }
21508 }
21509
21510 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, qmin) {
21511 TEST_REQUIRES_ARM_NEON;
21512 GemmMicrokernelTester()
21513 .mr(2)
21514 .nr(8)
21515 .kr(8)
21516 .sr(1)
21517 .m(2)
21518 .n(8)
21519 .k(16)
21520 .qmin(128)
21521 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21522 }
21523
21524 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, qmax) {
21525 TEST_REQUIRES_ARM_NEON;
21526 GemmMicrokernelTester()
21527 .mr(2)
21528 .nr(8)
21529 .kr(8)
21530 .sr(1)
21531 .m(2)
21532 .n(8)
21533 .k(16)
21534 .qmax(128)
21535 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21536 }
21537
21538 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, strided_cm) {
21539 TEST_REQUIRES_ARM_NEON;
21540 GemmMicrokernelTester()
21541 .mr(2)
21542 .nr(8)
21543 .kr(8)
21544 .sr(1)
21545 .m(2)
21546 .n(8)
21547 .k(16)
21548 .cm_stride(11)
21549 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21550 }
21551#endif // XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
21552
21553
21554#if XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
21555 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_eq_16) {
21556 TEST_REQUIRES_ARM_NEON;
21557 GemmMicrokernelTester()
21558 .mr(1)
21559 .nr(8)
21560 .kr(8)
21561 .sr(1)
21562 .m(1)
21563 .n(8)
21564 .k(16)
21565 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21566 }
21567
21568 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, strided_cn) {
21569 TEST_REQUIRES_ARM_NEON;
21570 GemmMicrokernelTester()
21571 .mr(1)
21572 .nr(8)
21573 .kr(8)
21574 .sr(1)
21575 .m(1)
21576 .n(8)
21577 .k(16)
21578 .cn_stride(11)
21579 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21580 }
21581
21582 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_eq_16_subtile) {
21583 TEST_REQUIRES_ARM_NEON;
21584 for (uint32_t n = 1; n <= 8; n++) {
21585 for (uint32_t m = 1; m <= 1; m++) {
21586 GemmMicrokernelTester()
21587 .mr(1)
21588 .nr(8)
21589 .kr(8)
21590 .sr(1)
21591 .m(m)
21592 .n(n)
21593 .k(16)
21594 .iterations(1)
21595 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21596 }
21597 }
21598 }
21599
21600 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_eq_16_subtile_m) {
21601 TEST_REQUIRES_ARM_NEON;
21602 for (uint32_t m = 1; m <= 1; m++) {
21603 GemmMicrokernelTester()
21604 .mr(1)
21605 .nr(8)
21606 .kr(8)
21607 .sr(1)
21608 .m(m)
21609 .n(8)
21610 .k(16)
21611 .iterations(1)
21612 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21613 }
21614 }
21615
21616 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_eq_16_subtile_n) {
21617 TEST_REQUIRES_ARM_NEON;
21618 for (uint32_t n = 1; n <= 8; n++) {
21619 GemmMicrokernelTester()
21620 .mr(1)
21621 .nr(8)
21622 .kr(8)
21623 .sr(1)
21624 .m(1)
21625 .n(n)
21626 .k(16)
21627 .iterations(1)
21628 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21629 }
21630 }
21631
21632 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_lt_16) {
21633 TEST_REQUIRES_ARM_NEON;
21634 for (size_t k = 1; k < 16; k++) {
21635 GemmMicrokernelTester()
21636 .mr(1)
21637 .nr(8)
21638 .kr(8)
21639 .sr(1)
21640 .m(1)
21641 .n(8)
21642 .k(k)
21643 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21644 }
21645 }
21646
21647 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_lt_16_subtile) {
21648 TEST_REQUIRES_ARM_NEON;
21649 for (size_t k = 1; k < 16; k++) {
21650 for (uint32_t n = 1; n <= 8; n++) {
21651 for (uint32_t m = 1; m <= 1; m++) {
21652 GemmMicrokernelTester()
21653 .mr(1)
21654 .nr(8)
21655 .kr(8)
21656 .sr(1)
21657 .m(m)
21658 .n(n)
21659 .k(k)
21660 .iterations(1)
21661 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21662 }
21663 }
21664 }
21665 }
21666
21667 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_gt_16) {
21668 TEST_REQUIRES_ARM_NEON;
21669 for (size_t k = 17; k < 32; k++) {
21670 GemmMicrokernelTester()
21671 .mr(1)
21672 .nr(8)
21673 .kr(8)
21674 .sr(1)
21675 .m(1)
21676 .n(8)
21677 .k(k)
21678 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21679 }
21680 }
21681
21682 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_gt_16_subtile) {
21683 TEST_REQUIRES_ARM_NEON;
21684 for (size_t k = 17; k < 32; k++) {
21685 for (uint32_t n = 1; n <= 8; n++) {
21686 for (uint32_t m = 1; m <= 1; m++) {
21687 GemmMicrokernelTester()
21688 .mr(1)
21689 .nr(8)
21690 .kr(8)
21691 .sr(1)
21692 .m(m)
21693 .n(n)
21694 .k(k)
21695 .iterations(1)
21696 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21697 }
21698 }
21699 }
21700 }
21701
21702 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_div_16) {
21703 TEST_REQUIRES_ARM_NEON;
21704 for (size_t k = 32; k <= 160; k += 16) {
21705 GemmMicrokernelTester()
21706 .mr(1)
21707 .nr(8)
21708 .kr(8)
21709 .sr(1)
21710 .m(1)
21711 .n(8)
21712 .k(k)
21713 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21714 }
21715 }
21716
21717 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, k_div_16_subtile) {
21718 TEST_REQUIRES_ARM_NEON;
21719 for (size_t k = 32; k <= 160; k += 16) {
21720 for (uint32_t n = 1; n <= 8; n++) {
21721 for (uint32_t m = 1; m <= 1; m++) {
21722 GemmMicrokernelTester()
21723 .mr(1)
21724 .nr(8)
21725 .kr(8)
21726 .sr(1)
21727 .m(m)
21728 .n(n)
21729 .k(k)
21730 .iterations(1)
21731 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21732 }
21733 }
21734 }
21735 }
21736
21737 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, n_gt_8) {
21738 TEST_REQUIRES_ARM_NEON;
21739 for (uint32_t n = 9; n < 16; n++) {
21740 for (size_t k = 1; k <= 80; k += 17) {
21741 GemmMicrokernelTester()
21742 .mr(1)
21743 .nr(8)
21744 .kr(8)
21745 .sr(1)
21746 .m(1)
21747 .n(n)
21748 .k(k)
21749 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21750 }
21751 }
21752 }
21753
21754 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, n_gt_8_strided_cn) {
21755 TEST_REQUIRES_ARM_NEON;
21756 for (uint32_t n = 9; n < 16; n++) {
21757 for (size_t k = 1; k <= 80; k += 17) {
21758 GemmMicrokernelTester()
21759 .mr(1)
21760 .nr(8)
21761 .kr(8)
21762 .sr(1)
21763 .m(1)
21764 .n(n)
21765 .k(k)
21766 .cn_stride(11)
21767 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21768 }
21769 }
21770 }
21771
21772 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, n_gt_8_subtile) {
21773 TEST_REQUIRES_ARM_NEON;
21774 for (uint32_t n = 9; n < 16; n++) {
21775 for (size_t k = 1; k <= 80; k += 17) {
21776 for (uint32_t m = 1; m <= 1; m++) {
21777 GemmMicrokernelTester()
21778 .mr(1)
21779 .nr(8)
21780 .kr(8)
21781 .sr(1)
21782 .m(m)
21783 .n(n)
21784 .k(k)
21785 .iterations(1)
21786 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21787 }
21788 }
21789 }
21790 }
21791
21792 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, n_div_8) {
21793 TEST_REQUIRES_ARM_NEON;
21794 for (uint32_t n = 16; n <= 24; n += 8) {
21795 for (size_t k = 1; k <= 80; k += 17) {
21796 GemmMicrokernelTester()
21797 .mr(1)
21798 .nr(8)
21799 .kr(8)
21800 .sr(1)
21801 .m(1)
21802 .n(n)
21803 .k(k)
21804 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21805 }
21806 }
21807 }
21808
21809 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, n_div_8_strided_cn) {
21810 TEST_REQUIRES_ARM_NEON;
21811 for (uint32_t n = 16; n <= 24; n += 8) {
21812 for (size_t k = 1; k <= 80; k += 17) {
21813 GemmMicrokernelTester()
21814 .mr(1)
21815 .nr(8)
21816 .kr(8)
21817 .sr(1)
21818 .m(1)
21819 .n(n)
21820 .k(k)
21821 .cn_stride(11)
21822 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21823 }
21824 }
21825 }
21826
21827 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, n_div_8_subtile) {
21828 TEST_REQUIRES_ARM_NEON;
21829 for (uint32_t n = 16; n <= 24; n += 8) {
21830 for (size_t k = 1; k <= 80; k += 17) {
21831 for (uint32_t m = 1; m <= 1; m++) {
21832 GemmMicrokernelTester()
21833 .mr(1)
21834 .nr(8)
21835 .kr(8)
21836 .sr(1)
21837 .m(m)
21838 .n(n)
21839 .k(k)
21840 .iterations(1)
21841 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21842 }
21843 }
21844 }
21845 }
21846
21847 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, small_kernel) {
21848 TEST_REQUIRES_ARM_NEON;
21849 for (size_t k = 1; k <= 80; k += 17) {
21850 GemmMicrokernelTester()
21851 .mr(1)
21852 .nr(8)
21853 .kr(8)
21854 .sr(1)
21855 .m(1)
21856 .n(8)
21857 .k(k)
21858 .ks(3)
21859 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21860 }
21861 }
21862
21863 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, small_kernel_subtile) {
21864 TEST_REQUIRES_ARM_NEON;
21865 for (size_t k = 1; k <= 80; k += 17) {
21866 for (uint32_t n = 1; n <= 8; n++) {
21867 for (uint32_t m = 1; m <= 1; m++) {
21868 GemmMicrokernelTester()
21869 .mr(1)
21870 .nr(8)
21871 .kr(8)
21872 .sr(1)
21873 .m(m)
21874 .n(n)
21875 .k(k)
21876 .ks(3)
21877 .iterations(1)
21878 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21879 }
21880 }
21881 }
21882 }
21883
21884 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, n_gt_8_small_kernel) {
21885 TEST_REQUIRES_ARM_NEON;
21886 for (uint32_t n = 9; n < 16; n++) {
21887 for (size_t k = 1; k <= 80; k += 17) {
21888 GemmMicrokernelTester()
21889 .mr(1)
21890 .nr(8)
21891 .kr(8)
21892 .sr(1)
21893 .m(1)
21894 .n(n)
21895 .k(k)
21896 .ks(3)
21897 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21898 }
21899 }
21900 }
21901
21902 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, n_div_8_small_kernel) {
21903 TEST_REQUIRES_ARM_NEON;
21904 for (uint32_t n = 16; n <= 24; n += 8) {
21905 for (size_t k = 1; k <= 80; k += 17) {
21906 GemmMicrokernelTester()
21907 .mr(1)
21908 .nr(8)
21909 .kr(8)
21910 .sr(1)
21911 .m(1)
21912 .n(n)
21913 .k(k)
21914 .ks(3)
21915 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21916 }
21917 }
21918 }
21919
21920 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, strided_cm_subtile) {
21921 TEST_REQUIRES_ARM_NEON;
21922 for (size_t k = 1; k <= 80; k += 17) {
21923 for (uint32_t n = 1; n <= 8; n++) {
21924 for (uint32_t m = 1; m <= 1; m++) {
21925 GemmMicrokernelTester()
21926 .mr(1)
21927 .nr(8)
21928 .kr(8)
21929 .sr(1)
21930 .m(m)
21931 .n(n)
21932 .k(k)
21933 .cm_stride(11)
21934 .iterations(1)
21935 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21936 }
21937 }
21938 }
21939 }
21940
21941 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, a_offset) {
21942 TEST_REQUIRES_ARM_NEON;
21943 for (size_t k = 1; k <= 80; k += 17) {
21944 GemmMicrokernelTester()
21945 .mr(1)
21946 .nr(8)
21947 .kr(8)
21948 .sr(1)
21949 .m(1)
21950 .n(8)
21951 .k(k)
21952 .ks(3)
21953 .a_offset(83)
21954 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21955 }
21956 }
21957
21958 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, zero) {
21959 TEST_REQUIRES_ARM_NEON;
21960 for (size_t k = 1; k <= 80; k += 17) {
21961 for (uint32_t mz = 0; mz < 1; mz++) {
21962 GemmMicrokernelTester()
21963 .mr(1)
21964 .nr(8)
21965 .kr(8)
21966 .sr(1)
21967 .m(1)
21968 .n(8)
21969 .k(k)
21970 .ks(3)
21971 .a_offset(83)
21972 .zero_index(mz)
21973 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21974 }
21975 }
21976 }
21977
21978 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, qmin) {
21979 TEST_REQUIRES_ARM_NEON;
21980 GemmMicrokernelTester()
21981 .mr(1)
21982 .nr(8)
21983 .kr(8)
21984 .sr(1)
21985 .m(1)
21986 .n(8)
21987 .k(16)
21988 .qmin(128)
21989 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
21990 }
21991
21992 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, qmax) {
21993 TEST_REQUIRES_ARM_NEON;
21994 GemmMicrokernelTester()
21995 .mr(1)
21996 .nr(8)
21997 .kr(8)
21998 .sr(1)
21999 .m(1)
22000 .n(8)
22001 .k(16)
22002 .qmax(128)
22003 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
22004 }
22005
22006 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM, strided_cm) {
22007 TEST_REQUIRES_ARM_NEON;
22008 GemmMicrokernelTester()
22009 .mr(1)
22010 .nr(8)
22011 .kr(8)
22012 .sr(1)
22013 .m(1)
22014 .n(8)
22015 .k(16)
22016 .cm_stride(11)
22017 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022018 }
22019#endif // XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
22020
22021
22022#if XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
22023 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_eq_16) {
22024 TEST_REQUIRES_ARM_NEON;
22025 GemmMicrokernelTester()
22026 .mr(1)
22027 .nr(8)
22028 .kr(8)
22029 .sr(1)
22030 .m(1)
22031 .n(8)
22032 .k(16)
Marat Dukhan50323b82022-01-11 00:12:01 -080022033 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022034 }
22035
22036 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, strided_cn) {
22037 TEST_REQUIRES_ARM_NEON;
22038 GemmMicrokernelTester()
22039 .mr(1)
22040 .nr(8)
22041 .kr(8)
22042 .sr(1)
22043 .m(1)
22044 .n(8)
22045 .k(16)
22046 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080022047 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022048 }
22049
22050 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_eq_16_subtile) {
22051 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080022052 for (uint32_t n = 1; n <= 8; n++) {
22053 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022054 GemmMicrokernelTester()
22055 .mr(1)
22056 .nr(8)
22057 .kr(8)
22058 .sr(1)
22059 .m(m)
22060 .n(n)
22061 .k(16)
22062 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022063 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022064 }
22065 }
22066 }
22067
22068 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_eq_16_subtile_m) {
22069 TEST_REQUIRES_ARM_NEON;
22070 for (uint32_t m = 1; m <= 1; m++) {
22071 GemmMicrokernelTester()
22072 .mr(1)
22073 .nr(8)
22074 .kr(8)
22075 .sr(1)
22076 .m(m)
22077 .n(8)
22078 .k(16)
22079 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022080 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022081 }
22082 }
22083
22084 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_eq_16_subtile_n) {
22085 TEST_REQUIRES_ARM_NEON;
22086 for (uint32_t n = 1; n <= 8; n++) {
22087 GemmMicrokernelTester()
22088 .mr(1)
22089 .nr(8)
22090 .kr(8)
22091 .sr(1)
22092 .m(1)
22093 .n(n)
22094 .k(16)
22095 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022096 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022097 }
22098 }
22099
22100 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_lt_16) {
22101 TEST_REQUIRES_ARM_NEON;
22102 for (size_t k = 1; k < 16; k++) {
22103 GemmMicrokernelTester()
22104 .mr(1)
22105 .nr(8)
22106 .kr(8)
22107 .sr(1)
22108 .m(1)
22109 .n(8)
22110 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080022111 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022112 }
22113 }
22114
22115 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_lt_16_subtile) {
22116 TEST_REQUIRES_ARM_NEON;
22117 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022118 for (uint32_t n = 1; n <= 8; n++) {
22119 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022120 GemmMicrokernelTester()
22121 .mr(1)
22122 .nr(8)
22123 .kr(8)
22124 .sr(1)
22125 .m(m)
22126 .n(n)
22127 .k(k)
22128 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022129 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022130 }
22131 }
22132 }
22133 }
22134
22135 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_gt_16) {
22136 TEST_REQUIRES_ARM_NEON;
22137 for (size_t k = 17; k < 32; k++) {
22138 GemmMicrokernelTester()
22139 .mr(1)
22140 .nr(8)
22141 .kr(8)
22142 .sr(1)
22143 .m(1)
22144 .n(8)
22145 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080022146 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022147 }
22148 }
22149
22150 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_gt_16_subtile) {
22151 TEST_REQUIRES_ARM_NEON;
22152 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022153 for (uint32_t n = 1; n <= 8; n++) {
22154 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022155 GemmMicrokernelTester()
22156 .mr(1)
22157 .nr(8)
22158 .kr(8)
22159 .sr(1)
22160 .m(m)
22161 .n(n)
22162 .k(k)
22163 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022164 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022165 }
22166 }
22167 }
22168 }
22169
22170 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_div_16) {
22171 TEST_REQUIRES_ARM_NEON;
22172 for (size_t k = 32; k <= 160; k += 16) {
22173 GemmMicrokernelTester()
22174 .mr(1)
22175 .nr(8)
22176 .kr(8)
22177 .sr(1)
22178 .m(1)
22179 .n(8)
22180 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080022181 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022182 }
22183 }
22184
22185 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, k_div_16_subtile) {
22186 TEST_REQUIRES_ARM_NEON;
22187 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022188 for (uint32_t n = 1; n <= 8; n++) {
22189 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022190 GemmMicrokernelTester()
22191 .mr(1)
22192 .nr(8)
22193 .kr(8)
22194 .sr(1)
22195 .m(m)
22196 .n(n)
22197 .k(k)
22198 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022199 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022200 }
22201 }
22202 }
22203 }
22204
22205 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_gt_8) {
22206 TEST_REQUIRES_ARM_NEON;
22207 for (uint32_t n = 9; n < 16; n++) {
22208 for (size_t k = 1; k <= 80; k += 17) {
22209 GemmMicrokernelTester()
22210 .mr(1)
22211 .nr(8)
22212 .kr(8)
22213 .sr(1)
22214 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022215 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022216 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080022217 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022218 }
22219 }
22220 }
22221
22222 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_gt_8_strided_cn) {
22223 TEST_REQUIRES_ARM_NEON;
22224 for (uint32_t n = 9; n < 16; n++) {
22225 for (size_t k = 1; k <= 80; k += 17) {
22226 GemmMicrokernelTester()
22227 .mr(1)
22228 .nr(8)
22229 .kr(8)
22230 .sr(1)
22231 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022232 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022233 .k(k)
22234 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080022235 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022236 }
22237 }
22238 }
22239
22240 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_gt_8_subtile) {
22241 TEST_REQUIRES_ARM_NEON;
22242 for (uint32_t n = 9; n < 16; n++) {
22243 for (size_t k = 1; k <= 80; k += 17) {
22244 for (uint32_t m = 1; m <= 1; m++) {
22245 GemmMicrokernelTester()
22246 .mr(1)
22247 .nr(8)
22248 .kr(8)
22249 .sr(1)
22250 .m(m)
22251 .n(n)
22252 .k(k)
22253 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022254 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022255 }
22256 }
22257 }
22258 }
22259
22260 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_div_8) {
22261 TEST_REQUIRES_ARM_NEON;
22262 for (uint32_t n = 16; n <= 24; n += 8) {
22263 for (size_t k = 1; k <= 80; k += 17) {
22264 GemmMicrokernelTester()
22265 .mr(1)
22266 .nr(8)
22267 .kr(8)
22268 .sr(1)
22269 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022270 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022271 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080022272 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022273 }
22274 }
22275 }
22276
22277 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_div_8_strided_cn) {
22278 TEST_REQUIRES_ARM_NEON;
22279 for (uint32_t n = 16; n <= 24; n += 8) {
22280 for (size_t k = 1; k <= 80; k += 17) {
22281 GemmMicrokernelTester()
22282 .mr(1)
22283 .nr(8)
22284 .kr(8)
22285 .sr(1)
22286 .m(1)
22287 .n(n)
22288 .k(k)
22289 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080022290 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022291 }
22292 }
22293 }
22294
22295 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_div_8_subtile) {
22296 TEST_REQUIRES_ARM_NEON;
22297 for (uint32_t n = 16; n <= 24; n += 8) {
22298 for (size_t k = 1; k <= 80; k += 17) {
22299 for (uint32_t m = 1; m <= 1; m++) {
22300 GemmMicrokernelTester()
22301 .mr(1)
22302 .nr(8)
22303 .kr(8)
22304 .sr(1)
22305 .m(m)
22306 .n(n)
22307 .k(k)
22308 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022309 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022310 }
22311 }
22312 }
22313 }
22314
22315 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, small_kernel) {
22316 TEST_REQUIRES_ARM_NEON;
22317 for (size_t k = 1; k <= 80; k += 17) {
22318 GemmMicrokernelTester()
22319 .mr(1)
22320 .nr(8)
22321 .kr(8)
22322 .sr(1)
22323 .m(1)
22324 .n(8)
22325 .k(k)
22326 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080022327 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022328 }
22329 }
22330
22331 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, small_kernel_subtile) {
22332 TEST_REQUIRES_ARM_NEON;
22333 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022334 for (uint32_t n = 1; n <= 8; n++) {
22335 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022336 GemmMicrokernelTester()
22337 .mr(1)
22338 .nr(8)
22339 .kr(8)
22340 .sr(1)
22341 .m(m)
22342 .n(n)
22343 .k(k)
22344 .ks(3)
22345 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022346 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022347 }
22348 }
22349 }
22350 }
22351
22352 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_gt_8_small_kernel) {
22353 TEST_REQUIRES_ARM_NEON;
22354 for (uint32_t n = 9; n < 16; n++) {
22355 for (size_t k = 1; k <= 80; k += 17) {
22356 GemmMicrokernelTester()
22357 .mr(1)
22358 .nr(8)
22359 .kr(8)
22360 .sr(1)
22361 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022362 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022363 .k(k)
22364 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080022365 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022366 }
22367 }
22368 }
22369
22370 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, n_div_8_small_kernel) {
22371 TEST_REQUIRES_ARM_NEON;
22372 for (uint32_t n = 16; n <= 24; n += 8) {
22373 for (size_t k = 1; k <= 80; k += 17) {
22374 GemmMicrokernelTester()
22375 .mr(1)
22376 .nr(8)
22377 .kr(8)
22378 .sr(1)
22379 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022380 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022381 .k(k)
22382 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080022383 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022384 }
22385 }
22386 }
22387
22388 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, strided_cm_subtile) {
22389 TEST_REQUIRES_ARM_NEON;
22390 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022391 for (uint32_t n = 1; n <= 8; n++) {
22392 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022393 GemmMicrokernelTester()
22394 .mr(1)
22395 .nr(8)
22396 .kr(8)
22397 .sr(1)
22398 .m(m)
22399 .n(n)
22400 .k(k)
22401 .cm_stride(11)
22402 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022403 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022404 }
22405 }
22406 }
22407 }
22408
22409 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, a_offset) {
22410 TEST_REQUIRES_ARM_NEON;
22411 for (size_t k = 1; k <= 80; k += 17) {
22412 GemmMicrokernelTester()
22413 .mr(1)
22414 .nr(8)
22415 .kr(8)
22416 .sr(1)
22417 .m(1)
22418 .n(8)
22419 .k(k)
22420 .ks(3)
22421 .a_offset(83)
Marat Dukhan50323b82022-01-11 00:12:01 -080022422 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022423 }
22424 }
22425
22426 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, zero) {
22427 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080022428 for (size_t k = 1; k <= 80; k += 17) {
22429 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022430 GemmMicrokernelTester()
22431 .mr(1)
22432 .nr(8)
22433 .kr(8)
22434 .sr(1)
22435 .m(1)
22436 .n(8)
22437 .k(k)
22438 .ks(3)
22439 .a_offset(83)
22440 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080022441 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022442 }
22443 }
22444 }
22445
22446 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, qmin) {
22447 TEST_REQUIRES_ARM_NEON;
22448 GemmMicrokernelTester()
22449 .mr(1)
22450 .nr(8)
22451 .kr(8)
22452 .sr(1)
22453 .m(1)
22454 .n(8)
22455 .k(16)
22456 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080022457 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022458 }
22459
22460 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, qmax) {
22461 TEST_REQUIRES_ARM_NEON;
22462 GemmMicrokernelTester()
22463 .mr(1)
22464 .nr(8)
22465 .kr(8)
22466 .sr(1)
22467 .m(1)
22468 .n(8)
22469 .k(16)
22470 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080022471 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022472 }
22473
22474 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8C8__AARCH64_NEON_MLAL_PRFM_CORTEX_A53, strided_cm) {
22475 TEST_REQUIRES_ARM_NEON;
22476 GemmMicrokernelTester()
22477 .mr(1)
22478 .nr(8)
22479 .kr(8)
22480 .sr(1)
22481 .m(1)
22482 .n(8)
22483 .k(16)
22484 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080022485 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__aarch64_neon_mlal_prfm_cortex_a53, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022486 }
22487#endif // XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
22488
22489
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022490#if XNN_ARCH_ARM || XNN_ARCH_ARM64
22491 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_eq_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080022492 TEST_REQUIRES_ARM_NEON;
22493 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022494 .mr(3)
22495 .nr(8)
22496 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080022497 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022498 .m(3)
22499 .n(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022500 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022501 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022502 }
22503
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022504 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, strided_cn) {
22505 TEST_REQUIRES_ARM_NEON;
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022506 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022507 .mr(3)
22508 .nr(8)
22509 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022510 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022511 .m(3)
22512 .n(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022513 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022514 .cn_stride(11)
22515 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022516 }
22517
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022518 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_eq_16_subtile) {
22519 TEST_REQUIRES_ARM_NEON;
22520 for (uint32_t n = 1; n <= 8; n++) {
22521 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022522 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022523 .mr(3)
22524 .nr(8)
22525 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022526 .sr(1)
22527 .m(m)
22528 .n(n)
22529 .k(16)
22530 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022531 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022532 }
22533 }
22534 }
22535
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022536 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022537 TEST_REQUIRES_ARM_NEON;
Zhi An Ngc27f04b2022-01-11 09:34:07 -080022538 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022539 GemmMicrokernelTester()
Zhi An Ngc27f04b2022-01-11 09:34:07 -080022540 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022541 .nr(8)
22542 .kr(8)
22543 .sr(1)
22544 .m(m)
22545 .n(8)
22546 .k(16)
22547 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022548 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022549 }
22550 }
22551
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022552 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022553 TEST_REQUIRES_ARM_NEON;
22554 for (uint32_t n = 1; n <= 8; n++) {
22555 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022556 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022557 .nr(8)
22558 .kr(8)
22559 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022560 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022561 .n(n)
22562 .k(16)
22563 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022564 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022565 }
22566 }
22567
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022568 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022569 TEST_REQUIRES_ARM_NEON;
22570 for (size_t k = 1; k < 16; k++) {
22571 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022572 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022573 .nr(8)
22574 .kr(8)
22575 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022576 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022577 .n(8)
22578 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022579 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022580 }
22581 }
22582
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022583 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022584 TEST_REQUIRES_ARM_NEON;
22585 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022586 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022587 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022588 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022589 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022590 .nr(8)
22591 .kr(8)
22592 .sr(1)
22593 .m(m)
22594 .n(n)
22595 .k(k)
22596 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022597 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022598 }
22599 }
22600 }
22601 }
22602
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022603 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022604 TEST_REQUIRES_ARM_NEON;
22605 for (size_t k = 17; k < 32; k++) {
22606 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022607 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022608 .nr(8)
22609 .kr(8)
22610 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022611 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022612 .n(8)
22613 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022614 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022615 }
22616 }
22617
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022618 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022619 TEST_REQUIRES_ARM_NEON;
22620 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022621 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022622 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022623 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022624 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022625 .nr(8)
22626 .kr(8)
22627 .sr(1)
22628 .m(m)
22629 .n(n)
22630 .k(k)
22631 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022632 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022633 }
22634 }
22635 }
22636 }
22637
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022638 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022639 TEST_REQUIRES_ARM_NEON;
22640 for (size_t k = 32; k <= 160; k += 16) {
22641 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022642 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022643 .nr(8)
22644 .kr(8)
22645 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022646 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022647 .n(8)
22648 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022649 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022650 }
22651 }
22652
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022653 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022654 TEST_REQUIRES_ARM_NEON;
22655 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022656 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022657 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022658 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022659 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022660 .nr(8)
22661 .kr(8)
22662 .sr(1)
22663 .m(m)
22664 .n(n)
22665 .k(k)
22666 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022667 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022668 }
22669 }
22670 }
22671 }
22672
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022673 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022674 TEST_REQUIRES_ARM_NEON;
22675 for (uint32_t n = 9; n < 16; n++) {
22676 for (size_t k = 1; k <= 80; k += 17) {
22677 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022678 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022679 .nr(8)
22680 .kr(8)
22681 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022682 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022683 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022684 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022685 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022686 }
22687 }
22688 }
22689
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022690 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022691 TEST_REQUIRES_ARM_NEON;
22692 for (uint32_t n = 9; n < 16; n++) {
22693 for (size_t k = 1; k <= 80; k += 17) {
22694 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022695 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022696 .nr(8)
22697 .kr(8)
22698 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022699 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022700 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022701 .k(k)
22702 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022703 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022704 }
22705 }
22706 }
22707
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022708 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022709 TEST_REQUIRES_ARM_NEON;
22710 for (uint32_t n = 9; n < 16; n++) {
22711 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022712 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022713 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022714 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022715 .nr(8)
22716 .kr(8)
22717 .sr(1)
22718 .m(m)
22719 .n(n)
22720 .k(k)
22721 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022722 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022723 }
22724 }
22725 }
22726 }
22727
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022728 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022729 TEST_REQUIRES_ARM_NEON;
22730 for (uint32_t n = 16; n <= 24; n += 8) {
22731 for (size_t k = 1; k <= 80; k += 17) {
22732 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022733 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022734 .nr(8)
22735 .kr(8)
22736 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022737 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022738 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022739 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022740 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022741 }
22742 }
22743 }
22744
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022745 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022746 TEST_REQUIRES_ARM_NEON;
22747 for (uint32_t n = 16; n <= 24; n += 8) {
22748 for (size_t k = 1; k <= 80; k += 17) {
22749 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022750 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022751 .nr(8)
22752 .kr(8)
22753 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022754 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022755 .n(n)
22756 .k(k)
22757 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022758 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022759 }
22760 }
22761 }
22762
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022763 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022764 TEST_REQUIRES_ARM_NEON;
22765 for (uint32_t n = 16; n <= 24; n += 8) {
22766 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022767 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022768 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022769 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022770 .nr(8)
22771 .kr(8)
22772 .sr(1)
22773 .m(m)
22774 .n(n)
22775 .k(k)
22776 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022777 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022778 }
22779 }
22780 }
22781 }
22782
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022783 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022784 TEST_REQUIRES_ARM_NEON;
22785 for (size_t k = 1; k <= 80; k += 17) {
22786 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022787 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022788 .nr(8)
22789 .kr(8)
22790 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022791 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022792 .n(8)
22793 .k(k)
22794 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022795 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022796 }
22797 }
22798
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022799 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022800 TEST_REQUIRES_ARM_NEON;
22801 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022802 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022803 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022804 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022805 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022806 .nr(8)
22807 .kr(8)
22808 .sr(1)
22809 .m(m)
22810 .n(n)
22811 .k(k)
22812 .ks(3)
22813 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022814 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022815 }
22816 }
22817 }
22818 }
22819
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022820 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022821 TEST_REQUIRES_ARM_NEON;
22822 for (uint32_t n = 9; n < 16; n++) {
22823 for (size_t k = 1; k <= 80; k += 17) {
22824 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022825 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022826 .nr(8)
22827 .kr(8)
22828 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022829 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022830 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022831 .k(k)
22832 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022833 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022834 }
22835 }
22836 }
22837
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022838 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022839 TEST_REQUIRES_ARM_NEON;
22840 for (uint32_t n = 16; n <= 24; n += 8) {
22841 for (size_t k = 1; k <= 80; k += 17) {
22842 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022843 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022844 .nr(8)
22845 .kr(8)
22846 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022847 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080022848 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022849 .k(k)
22850 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022851 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022852 }
22853 }
22854 }
22855
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022856 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022857 TEST_REQUIRES_ARM_NEON;
22858 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080022859 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022860 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022861 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022862 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022863 .nr(8)
22864 .kr(8)
22865 .sr(1)
22866 .m(m)
22867 .n(n)
22868 .k(k)
22869 .cm_stride(11)
22870 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022871 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022872 }
22873 }
22874 }
22875 }
22876
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022877 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022878 TEST_REQUIRES_ARM_NEON;
22879 for (size_t k = 1; k <= 80; k += 17) {
22880 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022881 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022882 .nr(8)
22883 .kr(8)
22884 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022885 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022886 .n(8)
22887 .k(k)
22888 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022889 .a_offset(251)
22890 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022891 }
22892 }
22893
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022894 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022895 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080022896 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022897 for (uint32_t mz = 0; mz < 3; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022898 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022899 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022900 .nr(8)
22901 .kr(8)
22902 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022903 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022904 .n(8)
22905 .k(k)
22906 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022907 .a_offset(251)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022908 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022909 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022910 }
22911 }
22912 }
22913
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022914 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022915 TEST_REQUIRES_ARM_NEON;
22916 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022917 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022918 .nr(8)
22919 .kr(8)
22920 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022921 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022922 .n(8)
22923 .k(16)
22924 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022925 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022926 }
22927
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022928 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022929 TEST_REQUIRES_ARM_NEON;
22930 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022931 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022932 .nr(8)
22933 .kr(8)
22934 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022935 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022936 .n(8)
22937 .k(16)
22938 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022939 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022940 }
22941
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022942 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C8__NEON_MLAL, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022943 TEST_REQUIRES_ARM_NEON;
22944 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022945 .mr(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022946 .nr(8)
22947 .kr(8)
22948 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022949 .m(3)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022950 .n(8)
22951 .k(16)
22952 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080022953 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022954 }
22955#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
22956
22957
22958#if XNN_ARCH_ARM || XNN_ARCH_ARM64
22959 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_eq_16) {
22960 TEST_REQUIRES_ARM_NEON;
22961 GemmMicrokernelTester()
22962 .mr(1)
22963 .nr(16)
22964 .kr(8)
22965 .sr(1)
22966 .m(1)
22967 .n(16)
22968 .k(16)
Marat Dukhan50323b82022-01-11 00:12:01 -080022969 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022970 }
22971
22972 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, strided_cn) {
22973 TEST_REQUIRES_ARM_NEON;
22974 GemmMicrokernelTester()
22975 .mr(1)
22976 .nr(16)
22977 .kr(8)
22978 .sr(1)
22979 .m(1)
22980 .n(16)
22981 .k(16)
22982 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080022983 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022984 }
22985
22986 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_eq_16_subtile) {
22987 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080022988 for (uint32_t n = 1; n <= 16; n++) {
22989 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080022990 GemmMicrokernelTester()
22991 .mr(1)
22992 .nr(16)
22993 .kr(8)
22994 .sr(1)
22995 .m(m)
22996 .n(n)
22997 .k(16)
22998 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080022999 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023000 }
23001 }
23002 }
23003
23004 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_eq_16_subtile_m) {
23005 TEST_REQUIRES_ARM_NEON;
23006 for (uint32_t m = 1; m <= 1; m++) {
23007 GemmMicrokernelTester()
23008 .mr(1)
23009 .nr(16)
23010 .kr(8)
23011 .sr(1)
23012 .m(m)
23013 .n(16)
23014 .k(16)
23015 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023016 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023017 }
23018 }
23019
23020 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_eq_16_subtile_n) {
23021 TEST_REQUIRES_ARM_NEON;
23022 for (uint32_t n = 1; n <= 16; n++) {
23023 GemmMicrokernelTester()
23024 .mr(1)
23025 .nr(16)
23026 .kr(8)
23027 .sr(1)
23028 .m(1)
23029 .n(n)
23030 .k(16)
23031 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023032 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023033 }
23034 }
23035
23036 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_lt_16) {
23037 TEST_REQUIRES_ARM_NEON;
23038 for (size_t k = 1; k < 16; k++) {
23039 GemmMicrokernelTester()
23040 .mr(1)
23041 .nr(16)
23042 .kr(8)
23043 .sr(1)
23044 .m(1)
23045 .n(16)
23046 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080023047 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023048 }
23049 }
23050
23051 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_lt_16_subtile) {
23052 TEST_REQUIRES_ARM_NEON;
23053 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023054 for (uint32_t n = 1; n <= 16; n++) {
23055 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023056 GemmMicrokernelTester()
23057 .mr(1)
23058 .nr(16)
23059 .kr(8)
23060 .sr(1)
23061 .m(m)
23062 .n(n)
23063 .k(k)
23064 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023065 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023066 }
23067 }
23068 }
23069 }
23070
23071 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_gt_16) {
23072 TEST_REQUIRES_ARM_NEON;
23073 for (size_t k = 17; k < 32; k++) {
23074 GemmMicrokernelTester()
23075 .mr(1)
23076 .nr(16)
23077 .kr(8)
23078 .sr(1)
23079 .m(1)
23080 .n(16)
23081 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080023082 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023083 }
23084 }
23085
23086 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_gt_16_subtile) {
23087 TEST_REQUIRES_ARM_NEON;
23088 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023089 for (uint32_t n = 1; n <= 16; n++) {
23090 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023091 GemmMicrokernelTester()
23092 .mr(1)
23093 .nr(16)
23094 .kr(8)
23095 .sr(1)
23096 .m(m)
23097 .n(n)
23098 .k(k)
23099 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023100 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023101 }
23102 }
23103 }
23104 }
23105
23106 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_div_16) {
23107 TEST_REQUIRES_ARM_NEON;
23108 for (size_t k = 32; k <= 160; k += 16) {
23109 GemmMicrokernelTester()
23110 .mr(1)
23111 .nr(16)
23112 .kr(8)
23113 .sr(1)
23114 .m(1)
23115 .n(16)
23116 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080023117 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023118 }
23119 }
23120
23121 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, k_div_16_subtile) {
23122 TEST_REQUIRES_ARM_NEON;
23123 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023124 for (uint32_t n = 1; n <= 16; n++) {
23125 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023126 GemmMicrokernelTester()
23127 .mr(1)
23128 .nr(16)
23129 .kr(8)
23130 .sr(1)
23131 .m(m)
23132 .n(n)
23133 .k(k)
23134 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023135 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023136 }
23137 }
23138 }
23139 }
23140
23141 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, n_gt_16) {
23142 TEST_REQUIRES_ARM_NEON;
23143 for (uint32_t n = 17; n < 32; n++) {
23144 for (size_t k = 1; k <= 80; k += 17) {
23145 GemmMicrokernelTester()
23146 .mr(1)
23147 .nr(16)
23148 .kr(8)
23149 .sr(1)
23150 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023151 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023152 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080023153 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023154 }
23155 }
23156 }
23157
23158 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, n_gt_16_strided_cn) {
23159 TEST_REQUIRES_ARM_NEON;
23160 for (uint32_t n = 17; n < 32; n++) {
23161 for (size_t k = 1; k <= 80; k += 17) {
23162 GemmMicrokernelTester()
23163 .mr(1)
23164 .nr(16)
23165 .kr(8)
23166 .sr(1)
23167 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023168 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023169 .k(k)
23170 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080023171 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023172 }
23173 }
23174 }
23175
23176 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, n_gt_16_subtile) {
23177 TEST_REQUIRES_ARM_NEON;
23178 for (uint32_t n = 17; n < 32; n++) {
23179 for (size_t k = 1; k <= 80; k += 17) {
23180 for (uint32_t m = 1; m <= 1; m++) {
23181 GemmMicrokernelTester()
23182 .mr(1)
23183 .nr(16)
23184 .kr(8)
23185 .sr(1)
23186 .m(m)
23187 .n(n)
23188 .k(k)
23189 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023190 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023191 }
23192 }
23193 }
23194 }
23195
23196 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, n_div_16) {
23197 TEST_REQUIRES_ARM_NEON;
23198 for (uint32_t n = 32; n <= 48; n += 16) {
23199 for (size_t k = 1; k <= 80; k += 17) {
23200 GemmMicrokernelTester()
23201 .mr(1)
23202 .nr(16)
23203 .kr(8)
23204 .sr(1)
23205 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023206 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023207 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080023208 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023209 }
23210 }
23211 }
23212
23213 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, n_div_16_strided_cn) {
23214 TEST_REQUIRES_ARM_NEON;
23215 for (uint32_t n = 32; n <= 48; n += 16) {
23216 for (size_t k = 1; k <= 80; k += 17) {
23217 GemmMicrokernelTester()
23218 .mr(1)
23219 .nr(16)
23220 .kr(8)
23221 .sr(1)
23222 .m(1)
23223 .n(n)
23224 .k(k)
23225 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080023226 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023227 }
23228 }
23229 }
23230
23231 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, n_div_16_subtile) {
23232 TEST_REQUIRES_ARM_NEON;
23233 for (uint32_t n = 32; n <= 48; n += 16) {
23234 for (size_t k = 1; k <= 80; k += 17) {
23235 for (uint32_t m = 1; m <= 1; m++) {
23236 GemmMicrokernelTester()
23237 .mr(1)
23238 .nr(16)
23239 .kr(8)
23240 .sr(1)
23241 .m(m)
23242 .n(n)
23243 .k(k)
23244 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023245 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023246 }
23247 }
23248 }
23249 }
23250
23251 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, small_kernel) {
23252 TEST_REQUIRES_ARM_NEON;
23253 for (size_t k = 1; k <= 80; k += 17) {
23254 GemmMicrokernelTester()
23255 .mr(1)
23256 .nr(16)
23257 .kr(8)
23258 .sr(1)
23259 .m(1)
23260 .n(16)
23261 .k(k)
23262 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080023263 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023264 }
23265 }
23266
23267 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, small_kernel_subtile) {
23268 TEST_REQUIRES_ARM_NEON;
23269 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023270 for (uint32_t n = 1; n <= 16; n++) {
23271 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023272 GemmMicrokernelTester()
23273 .mr(1)
23274 .nr(16)
23275 .kr(8)
23276 .sr(1)
23277 .m(m)
23278 .n(n)
23279 .k(k)
23280 .ks(3)
23281 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023282 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023283 }
23284 }
23285 }
23286 }
23287
23288 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, n_gt_16_small_kernel) {
23289 TEST_REQUIRES_ARM_NEON;
23290 for (uint32_t n = 17; n < 32; n++) {
23291 for (size_t k = 1; k <= 80; k += 17) {
23292 GemmMicrokernelTester()
23293 .mr(1)
23294 .nr(16)
23295 .kr(8)
23296 .sr(1)
23297 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023298 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023299 .k(k)
23300 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080023301 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023302 }
23303 }
23304 }
23305
23306 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, n_div_16_small_kernel) {
23307 TEST_REQUIRES_ARM_NEON;
23308 for (uint32_t n = 32; n <= 48; n += 16) {
23309 for (size_t k = 1; k <= 80; k += 17) {
23310 GemmMicrokernelTester()
23311 .mr(1)
23312 .nr(16)
23313 .kr(8)
23314 .sr(1)
23315 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023316 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023317 .k(k)
23318 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080023319 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023320 }
23321 }
23322 }
23323
23324 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, strided_cm_subtile) {
23325 TEST_REQUIRES_ARM_NEON;
23326 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023327 for (uint32_t n = 1; n <= 16; n++) {
23328 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023329 GemmMicrokernelTester()
23330 .mr(1)
23331 .nr(16)
23332 .kr(8)
23333 .sr(1)
23334 .m(m)
23335 .n(n)
23336 .k(k)
23337 .cm_stride(19)
23338 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080023339 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023340 }
23341 }
23342 }
23343 }
23344
23345 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, a_offset) {
23346 TEST_REQUIRES_ARM_NEON;
23347 for (size_t k = 1; k <= 80; k += 17) {
23348 GemmMicrokernelTester()
23349 .mr(1)
23350 .nr(16)
23351 .kr(8)
23352 .sr(1)
23353 .m(1)
23354 .n(16)
23355 .k(k)
23356 .ks(3)
23357 .a_offset(83)
Marat Dukhan50323b82022-01-11 00:12:01 -080023358 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023359 }
23360 }
23361
23362 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, zero) {
23363 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080023364 for (size_t k = 1; k <= 80; k += 17) {
23365 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023366 GemmMicrokernelTester()
23367 .mr(1)
23368 .nr(16)
23369 .kr(8)
23370 .sr(1)
23371 .m(1)
23372 .n(16)
23373 .k(k)
23374 .ks(3)
23375 .a_offset(83)
23376 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080023377 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023378 }
23379 }
23380 }
23381
23382 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, qmin) {
23383 TEST_REQUIRES_ARM_NEON;
23384 GemmMicrokernelTester()
23385 .mr(1)
23386 .nr(16)
23387 .kr(8)
23388 .sr(1)
23389 .m(1)
23390 .n(16)
23391 .k(16)
23392 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080023393 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023394 }
23395
23396 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, qmax) {
23397 TEST_REQUIRES_ARM_NEON;
23398 GemmMicrokernelTester()
23399 .mr(1)
23400 .nr(16)
23401 .kr(8)
23402 .sr(1)
23403 .m(1)
23404 .n(16)
23405 .k(16)
23406 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080023407 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023408 }
23409
23410 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C8__NEON_MLAL, strided_cm) {
23411 TEST_REQUIRES_ARM_NEON;
23412 GemmMicrokernelTester()
23413 .mr(1)
23414 .nr(16)
23415 .kr(8)
23416 .sr(1)
23417 .m(1)
23418 .n(16)
23419 .k(16)
23420 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080023421 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023422 }
23423#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
23424
23425
23426#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023427 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_eq_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023428 TEST_REQUIRES_ARM_NEON;
23429 GemmMicrokernelTester()
23430 .mr(2)
23431 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023432 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023433 .sr(1)
23434 .m(2)
23435 .n(16)
23436 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023437 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023438 }
23439
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023440 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023441 TEST_REQUIRES_ARM_NEON;
23442 GemmMicrokernelTester()
23443 .mr(2)
23444 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023445 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023446 .sr(1)
23447 .m(2)
23448 .n(16)
23449 .k(16)
23450 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023451 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023452 }
23453
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023454 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_eq_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023455 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080023456 for (uint32_t n = 1; n <= 16; n++) {
23457 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023458 GemmMicrokernelTester()
23459 .mr(2)
23460 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023461 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023462 .sr(1)
23463 .m(m)
23464 .n(n)
23465 .k(16)
23466 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023467 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023468 }
23469 }
23470 }
23471
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023472 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_eq_16_subtile_m) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023473 TEST_REQUIRES_ARM_NEON;
23474 for (uint32_t m = 1; m <= 2; m++) {
23475 GemmMicrokernelTester()
23476 .mr(2)
23477 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023478 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023479 .sr(1)
23480 .m(m)
23481 .n(16)
23482 .k(16)
23483 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023484 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023485 }
23486 }
23487
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023488 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_eq_16_subtile_n) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023489 TEST_REQUIRES_ARM_NEON;
23490 for (uint32_t n = 1; n <= 16; n++) {
23491 GemmMicrokernelTester()
23492 .mr(2)
23493 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023494 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023495 .sr(1)
23496 .m(2)
23497 .n(n)
23498 .k(16)
23499 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023500 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023501 }
23502 }
23503
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023504 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_lt_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023505 TEST_REQUIRES_ARM_NEON;
23506 for (size_t k = 1; k < 16; k++) {
23507 GemmMicrokernelTester()
23508 .mr(2)
23509 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023510 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023511 .sr(1)
23512 .m(2)
23513 .n(16)
23514 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023515 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023516 }
23517 }
23518
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023519 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_lt_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023520 TEST_REQUIRES_ARM_NEON;
23521 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023522 for (uint32_t n = 1; n <= 16; n++) {
23523 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023524 GemmMicrokernelTester()
23525 .mr(2)
23526 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023527 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023528 .sr(1)
23529 .m(m)
23530 .n(n)
23531 .k(k)
23532 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023533 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023534 }
23535 }
23536 }
23537 }
23538
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023539 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_gt_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023540 TEST_REQUIRES_ARM_NEON;
23541 for (size_t k = 17; k < 32; k++) {
23542 GemmMicrokernelTester()
23543 .mr(2)
23544 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023545 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023546 .sr(1)
23547 .m(2)
23548 .n(16)
23549 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023550 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023551 }
23552 }
23553
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023554 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_gt_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023555 TEST_REQUIRES_ARM_NEON;
23556 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023557 for (uint32_t n = 1; n <= 16; n++) {
23558 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023559 GemmMicrokernelTester()
23560 .mr(2)
23561 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023562 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023563 .sr(1)
23564 .m(m)
23565 .n(n)
23566 .k(k)
23567 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023568 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023569 }
23570 }
23571 }
23572 }
23573
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023574 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_div_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023575 TEST_REQUIRES_ARM_NEON;
23576 for (size_t k = 32; k <= 160; k += 16) {
23577 GemmMicrokernelTester()
23578 .mr(2)
23579 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023580 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023581 .sr(1)
23582 .m(2)
23583 .n(16)
23584 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023585 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023586 }
23587 }
23588
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023589 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, k_div_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023590 TEST_REQUIRES_ARM_NEON;
23591 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023592 for (uint32_t n = 1; n <= 16; n++) {
23593 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023594 GemmMicrokernelTester()
23595 .mr(2)
23596 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023597 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023598 .sr(1)
23599 .m(m)
23600 .n(n)
23601 .k(k)
23602 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023603 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023604 }
23605 }
23606 }
23607 }
23608
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023609 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, n_gt_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023610 TEST_REQUIRES_ARM_NEON;
23611 for (uint32_t n = 17; n < 32; n++) {
23612 for (size_t k = 1; k <= 80; k += 17) {
23613 GemmMicrokernelTester()
23614 .mr(2)
23615 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023616 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023617 .sr(1)
23618 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023619 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023620 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023621 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023622 }
23623 }
23624 }
23625
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023626 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, n_gt_16_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023627 TEST_REQUIRES_ARM_NEON;
23628 for (uint32_t n = 17; n < 32; n++) {
23629 for (size_t k = 1; k <= 80; k += 17) {
23630 GemmMicrokernelTester()
23631 .mr(2)
23632 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023633 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023634 .sr(1)
23635 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023636 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023637 .k(k)
23638 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023639 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023640 }
23641 }
23642 }
23643
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023644 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, n_gt_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023645 TEST_REQUIRES_ARM_NEON;
23646 for (uint32_t n = 17; n < 32; n++) {
23647 for (size_t k = 1; k <= 80; k += 17) {
23648 for (uint32_t m = 1; m <= 2; m++) {
23649 GemmMicrokernelTester()
23650 .mr(2)
23651 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023652 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023653 .sr(1)
23654 .m(m)
23655 .n(n)
23656 .k(k)
23657 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023658 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023659 }
23660 }
23661 }
23662 }
23663
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023664 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, n_div_16) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023665 TEST_REQUIRES_ARM_NEON;
23666 for (uint32_t n = 32; n <= 48; n += 16) {
23667 for (size_t k = 1; k <= 80; k += 17) {
23668 GemmMicrokernelTester()
23669 .mr(2)
23670 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023671 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023672 .sr(1)
23673 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023674 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023675 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023676 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023677 }
23678 }
23679 }
23680
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023681 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, n_div_16_strided_cn) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023682 TEST_REQUIRES_ARM_NEON;
23683 for (uint32_t n = 32; n <= 48; n += 16) {
23684 for (size_t k = 1; k <= 80; k += 17) {
23685 GemmMicrokernelTester()
23686 .mr(2)
23687 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023688 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023689 .sr(1)
23690 .m(2)
23691 .n(n)
23692 .k(k)
23693 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023694 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023695 }
23696 }
23697 }
23698
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023699 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, n_div_16_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023700 TEST_REQUIRES_ARM_NEON;
23701 for (uint32_t n = 32; n <= 48; n += 16) {
23702 for (size_t k = 1; k <= 80; k += 17) {
23703 for (uint32_t m = 1; m <= 2; m++) {
23704 GemmMicrokernelTester()
23705 .mr(2)
23706 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023707 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023708 .sr(1)
23709 .m(m)
23710 .n(n)
23711 .k(k)
23712 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023713 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023714 }
23715 }
23716 }
23717 }
23718
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023719 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023720 TEST_REQUIRES_ARM_NEON;
23721 for (size_t k = 1; k <= 80; k += 17) {
23722 GemmMicrokernelTester()
23723 .mr(2)
23724 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023725 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023726 .sr(1)
23727 .m(2)
23728 .n(16)
23729 .k(k)
23730 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023731 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023732 }
23733 }
23734
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023735 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, small_kernel_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023736 TEST_REQUIRES_ARM_NEON;
23737 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023738 for (uint32_t n = 1; n <= 16; n++) {
23739 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023740 GemmMicrokernelTester()
23741 .mr(2)
23742 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023743 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023744 .sr(1)
23745 .m(m)
23746 .n(n)
23747 .k(k)
23748 .ks(3)
23749 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023750 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023751 }
23752 }
23753 }
23754 }
23755
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023756 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, n_gt_16_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023757 TEST_REQUIRES_ARM_NEON;
23758 for (uint32_t n = 17; n < 32; n++) {
23759 for (size_t k = 1; k <= 80; k += 17) {
23760 GemmMicrokernelTester()
23761 .mr(2)
23762 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023763 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023764 .sr(1)
23765 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023766 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023767 .k(k)
23768 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023769 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023770 }
23771 }
23772 }
23773
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023774 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, n_div_16_small_kernel) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023775 TEST_REQUIRES_ARM_NEON;
23776 for (uint32_t n = 32; n <= 48; n += 16) {
23777 for (size_t k = 1; k <= 80; k += 17) {
23778 GemmMicrokernelTester()
23779 .mr(2)
23780 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023781 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023782 .sr(1)
23783 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080023784 .n(n)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023785 .k(k)
23786 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023787 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023788 }
23789 }
23790 }
23791
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023792 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, strided_cm_subtile) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023793 TEST_REQUIRES_ARM_NEON;
23794 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023795 for (uint32_t n = 1; n <= 16; n++) {
23796 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023797 GemmMicrokernelTester()
23798 .mr(2)
23799 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023800 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023801 .sr(1)
23802 .m(m)
23803 .n(n)
23804 .k(k)
23805 .cm_stride(19)
23806 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023807 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023808 }
23809 }
23810 }
23811 }
23812
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023813 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, a_offset) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023814 TEST_REQUIRES_ARM_NEON;
23815 for (size_t k = 1; k <= 80; k += 17) {
23816 GemmMicrokernelTester()
23817 .mr(2)
23818 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023819 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023820 .sr(1)
23821 .m(2)
23822 .n(16)
23823 .k(k)
23824 .ks(3)
23825 .a_offset(163)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023826 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023827 }
23828 }
23829
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023830 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, zero) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023831 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080023832 for (size_t k = 1; k <= 80; k += 17) {
23833 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023834 GemmMicrokernelTester()
23835 .mr(2)
23836 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023837 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023838 .sr(1)
23839 .m(2)
23840 .n(16)
23841 .k(k)
23842 .ks(3)
23843 .a_offset(163)
23844 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023845 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023846 }
23847 }
23848 }
23849
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023850 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, qmin) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023851 TEST_REQUIRES_ARM_NEON;
23852 GemmMicrokernelTester()
23853 .mr(2)
23854 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023855 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023856 .sr(1)
23857 .m(2)
23858 .n(16)
23859 .k(16)
23860 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023861 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023862 }
23863
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023864 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, qmax) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023865 TEST_REQUIRES_ARM_NEON;
23866 GemmMicrokernelTester()
23867 .mr(2)
23868 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023869 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023870 .sr(1)
23871 .m(2)
23872 .n(16)
23873 .k(16)
23874 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023875 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023876 }
23877
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023878 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16C8__NEON_MLAL, strided_cm) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023879 TEST_REQUIRES_ARM_NEON;
23880 GemmMicrokernelTester()
23881 .mr(2)
23882 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023883 .kr(8)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080023884 .sr(1)
23885 .m(2)
23886 .n(16)
23887 .k(16)
23888 .cm_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023889 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023890 }
23891#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
23892
23893
23894#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023895 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_eq_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023896 TEST_REQUIRES_ARM_NEON;
23897 GemmMicrokernelTester()
23898 .mr(4)
23899 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023900 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023901 .sr(1)
23902 .m(4)
23903 .n(16)
23904 .k(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023905 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023906 }
23907
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023908 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023909 TEST_REQUIRES_ARM_NEON;
23910 GemmMicrokernelTester()
23911 .mr(4)
23912 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023913 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023914 .sr(1)
23915 .m(4)
23916 .n(16)
23917 .k(16)
23918 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023919 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023920 }
23921
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023922 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_eq_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023923 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080023924 for (uint32_t n = 1; n <= 16; n++) {
23925 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023926 GemmMicrokernelTester()
23927 .mr(4)
23928 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023929 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023930 .sr(1)
23931 .m(m)
23932 .n(n)
23933 .k(16)
23934 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023935 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023936 }
23937 }
23938 }
23939
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023940 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_eq_16_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023941 TEST_REQUIRES_ARM_NEON;
23942 for (uint32_t m = 1; m <= 4; m++) {
23943 GemmMicrokernelTester()
23944 .mr(4)
23945 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023946 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023947 .sr(1)
23948 .m(m)
23949 .n(16)
23950 .k(16)
23951 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023952 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023953 }
23954 }
23955
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023956 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_eq_16_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023957 TEST_REQUIRES_ARM_NEON;
23958 for (uint32_t n = 1; n <= 16; n++) {
23959 GemmMicrokernelTester()
23960 .mr(4)
23961 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023962 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023963 .sr(1)
23964 .m(4)
23965 .n(n)
23966 .k(16)
23967 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023968 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023969 }
23970 }
23971
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023972 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_lt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023973 TEST_REQUIRES_ARM_NEON;
23974 for (size_t k = 1; k < 16; k++) {
23975 GemmMicrokernelTester()
23976 .mr(4)
23977 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023978 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023979 .sr(1)
23980 .m(4)
23981 .n(16)
23982 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023983 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023984 }
23985 }
23986
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023987 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_lt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023988 TEST_REQUIRES_ARM_NEON;
23989 for (size_t k = 1; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080023990 for (uint32_t n = 1; n <= 16; n++) {
23991 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023992 GemmMicrokernelTester()
23993 .mr(4)
23994 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080023995 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080023996 .sr(1)
23997 .m(m)
23998 .n(n)
23999 .k(k)
24000 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024001 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024002 }
24003 }
24004 }
24005 }
24006
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024007 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024008 TEST_REQUIRES_ARM_NEON;
24009 for (size_t k = 17; k < 32; k++) {
24010 GemmMicrokernelTester()
24011 .mr(4)
24012 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024013 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024014 .sr(1)
24015 .m(4)
24016 .n(16)
24017 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024018 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024019 }
24020 }
24021
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024022 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024023 TEST_REQUIRES_ARM_NEON;
24024 for (size_t k = 17; k < 32; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080024025 for (uint32_t n = 1; n <= 16; n++) {
24026 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024027 GemmMicrokernelTester()
24028 .mr(4)
24029 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024030 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024031 .sr(1)
24032 .m(m)
24033 .n(n)
24034 .k(k)
24035 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024036 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024037 }
24038 }
24039 }
24040 }
24041
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024042 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024043 TEST_REQUIRES_ARM_NEON;
24044 for (size_t k = 32; k <= 160; k += 16) {
24045 GemmMicrokernelTester()
24046 .mr(4)
24047 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024048 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024049 .sr(1)
24050 .m(4)
24051 .n(16)
24052 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024053 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024054 }
24055 }
24056
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024057 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, k_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024058 TEST_REQUIRES_ARM_NEON;
24059 for (size_t k = 32; k <= 160; k += 16) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080024060 for (uint32_t n = 1; n <= 16; n++) {
24061 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024062 GemmMicrokernelTester()
24063 .mr(4)
24064 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024065 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024066 .sr(1)
24067 .m(m)
24068 .n(n)
24069 .k(k)
24070 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024071 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024072 }
24073 }
24074 }
24075 }
24076
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024077 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, n_gt_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024078 TEST_REQUIRES_ARM_NEON;
24079 for (uint32_t n = 17; n < 32; n++) {
24080 for (size_t k = 1; k <= 80; k += 17) {
24081 GemmMicrokernelTester()
24082 .mr(4)
24083 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024084 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024085 .sr(1)
24086 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080024087 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024088 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024089 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024090 }
24091 }
24092 }
24093
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024094 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, n_gt_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024095 TEST_REQUIRES_ARM_NEON;
24096 for (uint32_t n = 17; n < 32; n++) {
24097 for (size_t k = 1; k <= 80; k += 17) {
24098 GemmMicrokernelTester()
24099 .mr(4)
24100 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024101 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024102 .sr(1)
24103 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080024104 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024105 .k(k)
24106 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024107 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024108 }
24109 }
24110 }
24111
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024112 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, n_gt_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024113 TEST_REQUIRES_ARM_NEON;
24114 for (uint32_t n = 17; n < 32; n++) {
24115 for (size_t k = 1; k <= 80; k += 17) {
24116 for (uint32_t m = 1; m <= 4; m++) {
24117 GemmMicrokernelTester()
24118 .mr(4)
24119 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024120 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024121 .sr(1)
24122 .m(m)
24123 .n(n)
24124 .k(k)
24125 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024126 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024127 }
24128 }
24129 }
24130 }
24131
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024132 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, n_div_16) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024133 TEST_REQUIRES_ARM_NEON;
24134 for (uint32_t n = 32; n <= 48; n += 16) {
24135 for (size_t k = 1; k <= 80; k += 17) {
24136 GemmMicrokernelTester()
24137 .mr(4)
24138 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024139 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024140 .sr(1)
24141 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080024142 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024143 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024144 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024145 }
24146 }
24147 }
24148
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024149 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, n_div_16_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024150 TEST_REQUIRES_ARM_NEON;
24151 for (uint32_t n = 32; n <= 48; n += 16) {
24152 for (size_t k = 1; k <= 80; k += 17) {
24153 GemmMicrokernelTester()
24154 .mr(4)
24155 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024156 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024157 .sr(1)
24158 .m(4)
24159 .n(n)
24160 .k(k)
24161 .cn_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024162 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024163 }
24164 }
24165 }
24166
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024167 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, n_div_16_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024168 TEST_REQUIRES_ARM_NEON;
24169 for (uint32_t n = 32; n <= 48; n += 16) {
24170 for (size_t k = 1; k <= 80; k += 17) {
24171 for (uint32_t m = 1; m <= 4; m++) {
24172 GemmMicrokernelTester()
24173 .mr(4)
24174 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024175 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024176 .sr(1)
24177 .m(m)
24178 .n(n)
24179 .k(k)
24180 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024181 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024182 }
24183 }
24184 }
24185 }
24186
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024187 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024188 TEST_REQUIRES_ARM_NEON;
24189 for (size_t k = 1; k <= 80; k += 17) {
24190 GemmMicrokernelTester()
24191 .mr(4)
24192 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024193 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024194 .sr(1)
24195 .m(4)
24196 .n(16)
24197 .k(k)
24198 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024199 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024200 }
24201 }
24202
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024203 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024204 TEST_REQUIRES_ARM_NEON;
24205 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080024206 for (uint32_t n = 1; n <= 16; n++) {
24207 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024208 GemmMicrokernelTester()
24209 .mr(4)
24210 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024211 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024212 .sr(1)
24213 .m(m)
24214 .n(n)
24215 .k(k)
24216 .ks(3)
24217 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024218 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024219 }
24220 }
24221 }
24222 }
24223
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024224 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, n_gt_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024225 TEST_REQUIRES_ARM_NEON;
24226 for (uint32_t n = 17; n < 32; n++) {
24227 for (size_t k = 1; k <= 80; k += 17) {
24228 GemmMicrokernelTester()
24229 .mr(4)
24230 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024231 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024232 .sr(1)
24233 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080024234 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024235 .k(k)
24236 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024237 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024238 }
24239 }
24240 }
24241
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024242 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, n_div_16_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024243 TEST_REQUIRES_ARM_NEON;
24244 for (uint32_t n = 32; n <= 48; n += 16) {
24245 for (size_t k = 1; k <= 80; k += 17) {
24246 GemmMicrokernelTester()
24247 .mr(4)
24248 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024249 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024250 .sr(1)
24251 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080024252 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024253 .k(k)
24254 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024255 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024256 }
24257 }
24258 }
24259
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024260 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024261 TEST_REQUIRES_ARM_NEON;
24262 for (size_t k = 1; k <= 80; k += 17) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080024263 for (uint32_t n = 1; n <= 16; n++) {
24264 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024265 GemmMicrokernelTester()
24266 .mr(4)
24267 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024268 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024269 .sr(1)
24270 .m(m)
24271 .n(n)
24272 .k(k)
24273 .cm_stride(19)
24274 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024275 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024276 }
24277 }
24278 }
24279 }
24280
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024281 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, a_offset) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024282 TEST_REQUIRES_ARM_NEON;
24283 for (size_t k = 1; k <= 80; k += 17) {
24284 GemmMicrokernelTester()
24285 .mr(4)
24286 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024287 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024288 .sr(1)
24289 .m(4)
24290 .n(16)
24291 .k(k)
24292 .ks(3)
24293 .a_offset(331)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024294 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024295 }
24296 }
24297
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024298 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, zero) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024299 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080024300 for (size_t k = 1; k <= 80; k += 17) {
24301 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024302 GemmMicrokernelTester()
24303 .mr(4)
24304 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024305 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024306 .sr(1)
24307 .m(4)
24308 .n(16)
24309 .k(k)
24310 .ks(3)
24311 .a_offset(331)
24312 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024313 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024314 }
24315 }
24316 }
24317
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024318 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, qmin) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024319 TEST_REQUIRES_ARM_NEON;
24320 GemmMicrokernelTester()
24321 .mr(4)
24322 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024323 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024324 .sr(1)
24325 .m(4)
24326 .n(16)
24327 .k(16)
24328 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024329 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024330 }
24331
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024332 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, qmax) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024333 TEST_REQUIRES_ARM_NEON;
24334 GemmMicrokernelTester()
24335 .mr(4)
24336 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024337 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024338 .sr(1)
24339 .m(4)
24340 .n(16)
24341 .k(16)
24342 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024343 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024344 }
24345
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024346 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16C8__NEON_MLAL, strided_cm) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024347 TEST_REQUIRES_ARM_NEON;
24348 GemmMicrokernelTester()
24349 .mr(4)
24350 .nr(16)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024351 .kr(8)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024352 .sr(1)
24353 .m(4)
24354 .n(16)
24355 .k(16)
24356 .cm_stride(19)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024357 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16c8__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24358 }
24359#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
24360
24361
24362#if XNN_ARCH_ARM || XNN_ARCH_ARM64
24363 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_eq_16) {
24364 TEST_REQUIRES_ARM_NEON;
24365 GemmMicrokernelTester()
24366 .mr(3)
24367 .nr(8)
24368 .kr(16)
24369 .sr(1)
24370 .m(3)
24371 .n(8)
24372 .k(16)
24373 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24374 }
24375
24376 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, strided_cn) {
24377 TEST_REQUIRES_ARM_NEON;
24378 GemmMicrokernelTester()
24379 .mr(3)
24380 .nr(8)
24381 .kr(16)
24382 .sr(1)
24383 .m(3)
24384 .n(8)
24385 .k(16)
24386 .cn_stride(11)
24387 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24388 }
24389
24390 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_eq_16_subtile) {
24391 TEST_REQUIRES_ARM_NEON;
24392 for (uint32_t n = 1; n <= 8; n++) {
24393 for (uint32_t m = 1; m <= 3; m++) {
24394 GemmMicrokernelTester()
24395 .mr(3)
24396 .nr(8)
24397 .kr(16)
24398 .sr(1)
24399 .m(m)
24400 .n(n)
24401 .k(16)
24402 .iterations(1)
24403 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24404 }
24405 }
24406 }
24407
24408 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_eq_16_subtile_m) {
24409 TEST_REQUIRES_ARM_NEON;
24410 for (uint32_t m = 1; m <= 3; m++) {
24411 GemmMicrokernelTester()
24412 .mr(3)
24413 .nr(8)
24414 .kr(16)
24415 .sr(1)
24416 .m(m)
24417 .n(8)
24418 .k(16)
24419 .iterations(1)
24420 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24421 }
24422 }
24423
24424 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_eq_16_subtile_n) {
24425 TEST_REQUIRES_ARM_NEON;
24426 for (uint32_t n = 1; n <= 8; n++) {
24427 GemmMicrokernelTester()
24428 .mr(3)
24429 .nr(8)
24430 .kr(16)
24431 .sr(1)
24432 .m(3)
24433 .n(n)
24434 .k(16)
24435 .iterations(1)
24436 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24437 }
24438 }
24439
24440 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_lt_16) {
24441 TEST_REQUIRES_ARM_NEON;
24442 for (size_t k = 1; k < 16; k++) {
24443 GemmMicrokernelTester()
24444 .mr(3)
24445 .nr(8)
24446 .kr(16)
24447 .sr(1)
24448 .m(3)
24449 .n(8)
24450 .k(k)
24451 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24452 }
24453 }
24454
24455 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_lt_16_subtile) {
24456 TEST_REQUIRES_ARM_NEON;
24457 for (size_t k = 1; k < 16; k++) {
24458 for (uint32_t n = 1; n <= 8; n++) {
24459 for (uint32_t m = 1; m <= 3; m++) {
24460 GemmMicrokernelTester()
24461 .mr(3)
24462 .nr(8)
24463 .kr(16)
24464 .sr(1)
24465 .m(m)
24466 .n(n)
24467 .k(k)
24468 .iterations(1)
24469 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24470 }
24471 }
24472 }
24473 }
24474
24475 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_gt_16) {
24476 TEST_REQUIRES_ARM_NEON;
24477 for (size_t k = 17; k < 32; k++) {
24478 GemmMicrokernelTester()
24479 .mr(3)
24480 .nr(8)
24481 .kr(16)
24482 .sr(1)
24483 .m(3)
24484 .n(8)
24485 .k(k)
24486 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24487 }
24488 }
24489
24490 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_gt_16_subtile) {
24491 TEST_REQUIRES_ARM_NEON;
24492 for (size_t k = 17; k < 32; k++) {
24493 for (uint32_t n = 1; n <= 8; n++) {
24494 for (uint32_t m = 1; m <= 3; m++) {
24495 GemmMicrokernelTester()
24496 .mr(3)
24497 .nr(8)
24498 .kr(16)
24499 .sr(1)
24500 .m(m)
24501 .n(n)
24502 .k(k)
24503 .iterations(1)
24504 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24505 }
24506 }
24507 }
24508 }
24509
24510 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_div_16) {
24511 TEST_REQUIRES_ARM_NEON;
24512 for (size_t k = 32; k <= 160; k += 16) {
24513 GemmMicrokernelTester()
24514 .mr(3)
24515 .nr(8)
24516 .kr(16)
24517 .sr(1)
24518 .m(3)
24519 .n(8)
24520 .k(k)
24521 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24522 }
24523 }
24524
24525 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, k_div_16_subtile) {
24526 TEST_REQUIRES_ARM_NEON;
24527 for (size_t k = 32; k <= 160; k += 16) {
24528 for (uint32_t n = 1; n <= 8; n++) {
24529 for (uint32_t m = 1; m <= 3; m++) {
24530 GemmMicrokernelTester()
24531 .mr(3)
24532 .nr(8)
24533 .kr(16)
24534 .sr(1)
24535 .m(m)
24536 .n(n)
24537 .k(k)
24538 .iterations(1)
24539 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24540 }
24541 }
24542 }
24543 }
24544
24545 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, n_gt_8) {
24546 TEST_REQUIRES_ARM_NEON;
24547 for (uint32_t n = 9; n < 16; n++) {
24548 for (size_t k = 1; k <= 80; k += 17) {
24549 GemmMicrokernelTester()
24550 .mr(3)
24551 .nr(8)
24552 .kr(16)
24553 .sr(1)
24554 .m(3)
24555 .n(n)
24556 .k(k)
24557 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24558 }
24559 }
24560 }
24561
24562 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, n_gt_8_strided_cn) {
24563 TEST_REQUIRES_ARM_NEON;
24564 for (uint32_t n = 9; n < 16; n++) {
24565 for (size_t k = 1; k <= 80; k += 17) {
24566 GemmMicrokernelTester()
24567 .mr(3)
24568 .nr(8)
24569 .kr(16)
24570 .sr(1)
24571 .m(3)
24572 .n(n)
24573 .k(k)
24574 .cn_stride(11)
24575 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24576 }
24577 }
24578 }
24579
24580 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, n_gt_8_subtile) {
24581 TEST_REQUIRES_ARM_NEON;
24582 for (uint32_t n = 9; n < 16; n++) {
24583 for (size_t k = 1; k <= 80; k += 17) {
24584 for (uint32_t m = 1; m <= 3; m++) {
24585 GemmMicrokernelTester()
24586 .mr(3)
24587 .nr(8)
24588 .kr(16)
24589 .sr(1)
24590 .m(m)
24591 .n(n)
24592 .k(k)
24593 .iterations(1)
24594 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24595 }
24596 }
24597 }
24598 }
24599
24600 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, n_div_8) {
24601 TEST_REQUIRES_ARM_NEON;
24602 for (uint32_t n = 16; n <= 24; n += 8) {
24603 for (size_t k = 1; k <= 80; k += 17) {
24604 GemmMicrokernelTester()
24605 .mr(3)
24606 .nr(8)
24607 .kr(16)
24608 .sr(1)
24609 .m(3)
24610 .n(n)
24611 .k(k)
24612 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24613 }
24614 }
24615 }
24616
24617 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, n_div_8_strided_cn) {
24618 TEST_REQUIRES_ARM_NEON;
24619 for (uint32_t n = 16; n <= 24; n += 8) {
24620 for (size_t k = 1; k <= 80; k += 17) {
24621 GemmMicrokernelTester()
24622 .mr(3)
24623 .nr(8)
24624 .kr(16)
24625 .sr(1)
24626 .m(3)
24627 .n(n)
24628 .k(k)
24629 .cn_stride(11)
24630 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24631 }
24632 }
24633 }
24634
24635 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, n_div_8_subtile) {
24636 TEST_REQUIRES_ARM_NEON;
24637 for (uint32_t n = 16; n <= 24; n += 8) {
24638 for (size_t k = 1; k <= 80; k += 17) {
24639 for (uint32_t m = 1; m <= 3; m++) {
24640 GemmMicrokernelTester()
24641 .mr(3)
24642 .nr(8)
24643 .kr(16)
24644 .sr(1)
24645 .m(m)
24646 .n(n)
24647 .k(k)
24648 .iterations(1)
24649 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24650 }
24651 }
24652 }
24653 }
24654
24655 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, small_kernel) {
24656 TEST_REQUIRES_ARM_NEON;
24657 for (size_t k = 1; k <= 80; k += 17) {
24658 GemmMicrokernelTester()
24659 .mr(3)
24660 .nr(8)
24661 .kr(16)
24662 .sr(1)
24663 .m(3)
24664 .n(8)
24665 .k(k)
24666 .ks(3)
24667 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24668 }
24669 }
24670
24671 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, small_kernel_subtile) {
24672 TEST_REQUIRES_ARM_NEON;
24673 for (size_t k = 1; k <= 80; k += 17) {
24674 for (uint32_t n = 1; n <= 8; n++) {
24675 for (uint32_t m = 1; m <= 3; m++) {
24676 GemmMicrokernelTester()
24677 .mr(3)
24678 .nr(8)
24679 .kr(16)
24680 .sr(1)
24681 .m(m)
24682 .n(n)
24683 .k(k)
24684 .ks(3)
24685 .iterations(1)
24686 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24687 }
24688 }
24689 }
24690 }
24691
24692 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, n_gt_8_small_kernel) {
24693 TEST_REQUIRES_ARM_NEON;
24694 for (uint32_t n = 9; n < 16; n++) {
24695 for (size_t k = 1; k <= 80; k += 17) {
24696 GemmMicrokernelTester()
24697 .mr(3)
24698 .nr(8)
24699 .kr(16)
24700 .sr(1)
24701 .m(3)
24702 .n(n)
24703 .k(k)
24704 .ks(3)
24705 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24706 }
24707 }
24708 }
24709
24710 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, n_div_8_small_kernel) {
24711 TEST_REQUIRES_ARM_NEON;
24712 for (uint32_t n = 16; n <= 24; n += 8) {
24713 for (size_t k = 1; k <= 80; k += 17) {
24714 GemmMicrokernelTester()
24715 .mr(3)
24716 .nr(8)
24717 .kr(16)
24718 .sr(1)
24719 .m(3)
24720 .n(n)
24721 .k(k)
24722 .ks(3)
24723 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24724 }
24725 }
24726 }
24727
24728 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, strided_cm_subtile) {
24729 TEST_REQUIRES_ARM_NEON;
24730 for (size_t k = 1; k <= 80; k += 17) {
24731 for (uint32_t n = 1; n <= 8; n++) {
24732 for (uint32_t m = 1; m <= 3; m++) {
24733 GemmMicrokernelTester()
24734 .mr(3)
24735 .nr(8)
24736 .kr(16)
24737 .sr(1)
24738 .m(m)
24739 .n(n)
24740 .k(k)
24741 .cm_stride(11)
24742 .iterations(1)
24743 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24744 }
24745 }
24746 }
24747 }
24748
24749 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, a_offset) {
24750 TEST_REQUIRES_ARM_NEON;
24751 for (size_t k = 1; k <= 80; k += 17) {
24752 GemmMicrokernelTester()
24753 .mr(3)
24754 .nr(8)
24755 .kr(16)
24756 .sr(1)
24757 .m(3)
24758 .n(8)
24759 .k(k)
24760 .ks(3)
24761 .a_offset(251)
24762 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24763 }
24764 }
24765
24766 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, zero) {
24767 TEST_REQUIRES_ARM_NEON;
24768 for (size_t k = 1; k <= 80; k += 17) {
24769 for (uint32_t mz = 0; mz < 3; mz++) {
24770 GemmMicrokernelTester()
24771 .mr(3)
24772 .nr(8)
24773 .kr(16)
24774 .sr(1)
24775 .m(3)
24776 .n(8)
24777 .k(k)
24778 .ks(3)
24779 .a_offset(251)
24780 .zero_index(mz)
24781 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24782 }
24783 }
24784 }
24785
24786 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, qmin) {
24787 TEST_REQUIRES_ARM_NEON;
24788 GemmMicrokernelTester()
24789 .mr(3)
24790 .nr(8)
24791 .kr(16)
24792 .sr(1)
24793 .m(3)
24794 .n(8)
24795 .k(16)
24796 .qmin(128)
24797 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24798 }
24799
24800 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, qmax) {
24801 TEST_REQUIRES_ARM_NEON;
24802 GemmMicrokernelTester()
24803 .mr(3)
24804 .nr(8)
24805 .kr(16)
24806 .sr(1)
24807 .m(3)
24808 .n(8)
24809 .k(16)
24810 .qmax(128)
24811 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
24812 }
24813
24814 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8C16__NEON_MLAL, strided_cm) {
24815 TEST_REQUIRES_ARM_NEON;
24816 GemmMicrokernelTester()
24817 .mr(3)
24818 .nr(8)
24819 .kr(16)
24820 .sr(1)
24821 .m(3)
24822 .n(8)
24823 .k(16)
24824 .cm_stride(11)
24825 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8c16__neon_mlal, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024826 }
24827#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
24828
24829
24830#if XNN_ARCH_ARM && !XNN_PLATFORM_IOS || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024831 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_eq_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024832 TEST_REQUIRES_ARM_NEON_DOT;
24833 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024834 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024835 .nr(8)
24836 .kr(4)
24837 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024838 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024839 .n(8)
24840 .k(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024841 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024842 }
24843
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024844 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024845 TEST_REQUIRES_ARM_NEON_DOT;
24846 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024847 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024848 .nr(8)
24849 .kr(4)
24850 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024851 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024852 .n(8)
24853 .k(8)
24854 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024855 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024856 }
24857
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024858 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_eq_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024859 TEST_REQUIRES_ARM_NEON_DOT;
Zhi An Ng83844ae2022-01-14 09:52:25 -080024860 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024861 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024862 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024863 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024864 .nr(8)
24865 .kr(4)
24866 .sr(1)
24867 .m(m)
24868 .n(n)
24869 .k(8)
24870 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024871 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024872 }
24873 }
24874 }
24875
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024876 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_eq_8_subtile_m) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024877 TEST_REQUIRES_ARM_NEON_DOT;
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024878 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024879 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024880 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024881 .nr(8)
24882 .kr(4)
24883 .sr(1)
24884 .m(m)
24885 .n(8)
24886 .k(8)
24887 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024888 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024889 }
24890 }
24891
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024892 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_eq_8_subtile_n) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024893 TEST_REQUIRES_ARM_NEON_DOT;
24894 for (uint32_t n = 1; n <= 8; n++) {
24895 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024896 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024897 .nr(8)
24898 .kr(4)
24899 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024900 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024901 .n(n)
24902 .k(8)
24903 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024904 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024905 }
24906 }
24907
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024908 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_lt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024909 TEST_REQUIRES_ARM_NEON_DOT;
24910 for (size_t k = 1; k < 8; k++) {
24911 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024912 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024913 .nr(8)
24914 .kr(4)
24915 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024916 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024917 .n(8)
24918 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024919 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024920 }
24921 }
24922
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024923 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_lt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024924 TEST_REQUIRES_ARM_NEON_DOT;
24925 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080024926 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024927 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024928 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024929 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024930 .nr(8)
24931 .kr(4)
24932 .sr(1)
24933 .m(m)
24934 .n(n)
24935 .k(k)
24936 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024937 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024938 }
24939 }
24940 }
24941 }
24942
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024943 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024944 TEST_REQUIRES_ARM_NEON_DOT;
24945 for (size_t k = 9; k < 16; k++) {
24946 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024947 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024948 .nr(8)
24949 .kr(4)
24950 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024951 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024952 .n(8)
24953 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024954 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024955 }
24956 }
24957
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024958 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024959 TEST_REQUIRES_ARM_NEON_DOT;
24960 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080024961 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024962 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024963 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024964 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024965 .nr(8)
24966 .kr(4)
24967 .sr(1)
24968 .m(m)
24969 .n(n)
24970 .k(k)
24971 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024972 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024973 }
24974 }
24975 }
24976 }
24977
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024978 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024979 TEST_REQUIRES_ARM_NEON_DOT;
24980 for (size_t k = 16; k <= 80; k += 8) {
24981 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024982 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024983 .nr(8)
24984 .kr(4)
24985 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024986 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024987 .n(8)
24988 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024989 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024990 }
24991 }
24992
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024993 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, k_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024994 TEST_REQUIRES_ARM_NEON_DOT;
24995 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080024996 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024997 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080024998 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080024999 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025000 .nr(8)
25001 .kr(4)
25002 .sr(1)
25003 .m(m)
25004 .n(n)
25005 .k(k)
25006 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025007 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025008 }
25009 }
25010 }
25011 }
25012
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025013 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, n_gt_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025014 TEST_REQUIRES_ARM_NEON_DOT;
25015 for (uint32_t n = 9; n < 16; n++) {
25016 for (size_t k = 1; k <= 40; k += 9) {
25017 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025018 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025019 .nr(8)
25020 .kr(4)
25021 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025022 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080025023 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025024 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025025 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025026 }
25027 }
25028 }
25029
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025030 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, n_gt_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025031 TEST_REQUIRES_ARM_NEON_DOT;
25032 for (uint32_t n = 9; n < 16; n++) {
25033 for (size_t k = 1; k <= 40; k += 9) {
25034 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025035 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025036 .nr(8)
25037 .kr(4)
25038 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025039 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080025040 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025041 .k(k)
25042 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025043 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025044 }
25045 }
25046 }
25047
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025048 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, n_gt_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025049 TEST_REQUIRES_ARM_NEON_DOT;
25050 for (uint32_t n = 9; n < 16; n++) {
25051 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025052 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025053 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025054 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025055 .nr(8)
25056 .kr(4)
25057 .sr(1)
25058 .m(m)
25059 .n(n)
25060 .k(k)
25061 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025062 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025063 }
25064 }
25065 }
25066 }
25067
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025068 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, n_div_8) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025069 TEST_REQUIRES_ARM_NEON_DOT;
25070 for (uint32_t n = 16; n <= 24; n += 8) {
25071 for (size_t k = 1; k <= 40; k += 9) {
25072 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025073 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025074 .nr(8)
25075 .kr(4)
25076 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025077 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080025078 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025079 .k(k)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025080 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025081 }
25082 }
25083 }
25084
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025085 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, n_div_8_strided_cn) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025086 TEST_REQUIRES_ARM_NEON_DOT;
25087 for (uint32_t n = 16; n <= 24; n += 8) {
25088 for (size_t k = 1; k <= 40; k += 9) {
25089 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025090 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025091 .nr(8)
25092 .kr(4)
25093 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025094 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025095 .n(n)
25096 .k(k)
25097 .cn_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025098 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025099 }
25100 }
25101 }
25102
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025103 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, n_div_8_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025104 TEST_REQUIRES_ARM_NEON_DOT;
25105 for (uint32_t n = 16; n <= 24; n += 8) {
25106 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025107 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025108 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025109 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025110 .nr(8)
25111 .kr(4)
25112 .sr(1)
25113 .m(m)
25114 .n(n)
25115 .k(k)
25116 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025117 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025118 }
25119 }
25120 }
25121 }
25122
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025123 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025124 TEST_REQUIRES_ARM_NEON_DOT;
25125 for (size_t k = 1; k <= 40; k += 9) {
25126 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025127 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025128 .nr(8)
25129 .kr(4)
25130 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025131 .m(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025132 .n(8)
25133 .k(k)
25134 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025135 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025136 }
25137 }
25138
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025139 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, small_kernel_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025140 TEST_REQUIRES_ARM_NEON_DOT;
25141 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080025142 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025143 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025144 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025145 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025146 .nr(8)
25147 .kr(4)
25148 .sr(1)
25149 .m(m)
25150 .n(n)
25151 .k(k)
25152 .ks(3)
25153 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025154 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025155 }
25156 }
25157 }
25158 }
25159
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025160 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, n_gt_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025161 TEST_REQUIRES_ARM_NEON_DOT;
25162 for (uint32_t n = 9; n < 16; n++) {
25163 for (size_t k = 1; k <= 40; k += 9) {
25164 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025165 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025166 .nr(8)
25167 .kr(4)
25168 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025169 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080025170 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025171 .k(k)
25172 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025173 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025174 }
25175 }
25176 }
25177
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025178 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, n_div_8_small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025179 TEST_REQUIRES_ARM_NEON_DOT;
25180 for (uint32_t n = 16; n <= 24; n += 8) {
25181 for (size_t k = 1; k <= 40; k += 9) {
25182 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025183 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025184 .nr(8)
25185 .kr(4)
25186 .sr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025187 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080025188 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025189 .k(k)
25190 .ks(3)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025191 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025192 }
25193 }
25194 }
25195
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025196 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, strided_cm_subtile) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025197 TEST_REQUIRES_ARM_NEON_DOT;
25198 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080025199 for (uint32_t n = 1; n <= 8; n++) {
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025200 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025201 GemmMicrokernelTester()
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025202 .mr(4)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025203 .nr(8)
25204 .kr(4)
25205 .sr(1)
25206 .m(m)
25207 .n(n)
25208 .k(k)
25209 .cm_stride(11)
25210 .iterations(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025211 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025212 }
25213 }
25214 }
25215 }
25216
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025217 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, a_offset) {
25218 TEST_REQUIRES_ARM_NEON_DOT;
25219 for (size_t k = 1; k <= 40; k += 9) {
25220 GemmMicrokernelTester()
25221 .mr(4)
25222 .nr(8)
25223 .kr(4)
25224 .sr(1)
25225 .m(4)
25226 .n(8)
25227 .k(k)
25228 .ks(3)
25229 .a_offset(163)
25230 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25231 }
25232 }
25233
25234 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, zero) {
25235 TEST_REQUIRES_ARM_NEON_DOT;
25236 for (size_t k = 1; k <= 40; k += 9) {
25237 for (uint32_t mz = 0; mz < 4; mz++) {
25238 GemmMicrokernelTester()
25239 .mr(4)
25240 .nr(8)
25241 .kr(4)
25242 .sr(1)
25243 .m(4)
25244 .n(8)
25245 .k(k)
25246 .ks(3)
25247 .a_offset(163)
25248 .zero_index(mz)
25249 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25250 }
25251 }
25252 }
25253
25254 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, qmin) {
25255 TEST_REQUIRES_ARM_NEON_DOT;
25256 GemmMicrokernelTester()
25257 .mr(4)
25258 .nr(8)
25259 .kr(4)
25260 .sr(1)
25261 .m(4)
25262 .n(8)
25263 .k(8)
25264 .qmin(128)
25265 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25266 }
25267
25268 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, qmax) {
25269 TEST_REQUIRES_ARM_NEON_DOT;
25270 GemmMicrokernelTester()
25271 .mr(4)
25272 .nr(8)
25273 .kr(4)
25274 .sr(1)
25275 .m(4)
25276 .n(8)
25277 .k(8)
25278 .qmax(128)
25279 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25280 }
25281
25282 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8C4__NEONDOT, strided_cm) {
25283 TEST_REQUIRES_ARM_NEON_DOT;
25284 GemmMicrokernelTester()
25285 .mr(4)
25286 .nr(8)
25287 .kr(4)
25288 .sr(1)
25289 .m(4)
25290 .n(8)
25291 .k(8)
25292 .cm_stride(11)
25293 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25294 }
25295#endif // XNN_ARCH_ARM && !XNN_PLATFORM_IOS || XNN_ARCH_ARM64
25296
25297
25298#if XNN_ARCH_ARM && !XNN_PLATFORM_IOS || XNN_ARCH_ARM64
25299 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_eq_8) {
25300 TEST_REQUIRES_ARM_NEON_DOT;
25301 GemmMicrokernelTester()
25302 .mr(1)
25303 .nr(16)
25304 .kr(4)
25305 .sr(1)
25306 .m(1)
25307 .n(16)
25308 .k(8)
25309 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25310 }
25311
25312 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, strided_cn) {
25313 TEST_REQUIRES_ARM_NEON_DOT;
25314 GemmMicrokernelTester()
25315 .mr(1)
25316 .nr(16)
25317 .kr(4)
25318 .sr(1)
25319 .m(1)
25320 .n(16)
25321 .k(8)
25322 .cn_stride(19)
25323 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25324 }
25325
25326 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_eq_8_subtile) {
25327 TEST_REQUIRES_ARM_NEON_DOT;
25328 for (uint32_t n = 1; n <= 16; n++) {
25329 for (uint32_t m = 1; m <= 1; m++) {
25330 GemmMicrokernelTester()
25331 .mr(1)
25332 .nr(16)
25333 .kr(4)
25334 .sr(1)
25335 .m(m)
25336 .n(n)
25337 .k(8)
25338 .iterations(1)
25339 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25340 }
25341 }
25342 }
25343
25344 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_eq_8_subtile_m) {
25345 TEST_REQUIRES_ARM_NEON_DOT;
25346 for (uint32_t m = 1; m <= 1; m++) {
25347 GemmMicrokernelTester()
25348 .mr(1)
25349 .nr(16)
25350 .kr(4)
25351 .sr(1)
25352 .m(m)
25353 .n(16)
25354 .k(8)
25355 .iterations(1)
25356 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25357 }
25358 }
25359
25360 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_eq_8_subtile_n) {
25361 TEST_REQUIRES_ARM_NEON_DOT;
25362 for (uint32_t n = 1; n <= 16; n++) {
25363 GemmMicrokernelTester()
25364 .mr(1)
25365 .nr(16)
25366 .kr(4)
25367 .sr(1)
25368 .m(1)
25369 .n(n)
25370 .k(8)
25371 .iterations(1)
25372 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25373 }
25374 }
25375
25376 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_lt_8) {
25377 TEST_REQUIRES_ARM_NEON_DOT;
25378 for (size_t k = 1; k < 8; k++) {
25379 GemmMicrokernelTester()
25380 .mr(1)
25381 .nr(16)
25382 .kr(4)
25383 .sr(1)
25384 .m(1)
25385 .n(16)
25386 .k(k)
25387 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25388 }
25389 }
25390
25391 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_lt_8_subtile) {
25392 TEST_REQUIRES_ARM_NEON_DOT;
25393 for (size_t k = 1; k < 8; k++) {
25394 for (uint32_t n = 1; n <= 16; n++) {
25395 for (uint32_t m = 1; m <= 1; m++) {
25396 GemmMicrokernelTester()
25397 .mr(1)
25398 .nr(16)
25399 .kr(4)
25400 .sr(1)
25401 .m(m)
25402 .n(n)
25403 .k(k)
25404 .iterations(1)
25405 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25406 }
25407 }
25408 }
25409 }
25410
25411 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_gt_8) {
25412 TEST_REQUIRES_ARM_NEON_DOT;
25413 for (size_t k = 9; k < 16; k++) {
25414 GemmMicrokernelTester()
25415 .mr(1)
25416 .nr(16)
25417 .kr(4)
25418 .sr(1)
25419 .m(1)
25420 .n(16)
25421 .k(k)
25422 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25423 }
25424 }
25425
25426 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_gt_8_subtile) {
25427 TEST_REQUIRES_ARM_NEON_DOT;
25428 for (size_t k = 9; k < 16; k++) {
25429 for (uint32_t n = 1; n <= 16; n++) {
25430 for (uint32_t m = 1; m <= 1; m++) {
25431 GemmMicrokernelTester()
25432 .mr(1)
25433 .nr(16)
25434 .kr(4)
25435 .sr(1)
25436 .m(m)
25437 .n(n)
25438 .k(k)
25439 .iterations(1)
25440 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25441 }
25442 }
25443 }
25444 }
25445
25446 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_div_8) {
25447 TEST_REQUIRES_ARM_NEON_DOT;
25448 for (size_t k = 16; k <= 80; k += 8) {
25449 GemmMicrokernelTester()
25450 .mr(1)
25451 .nr(16)
25452 .kr(4)
25453 .sr(1)
25454 .m(1)
25455 .n(16)
25456 .k(k)
25457 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25458 }
25459 }
25460
25461 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, k_div_8_subtile) {
25462 TEST_REQUIRES_ARM_NEON_DOT;
25463 for (size_t k = 16; k <= 80; k += 8) {
25464 for (uint32_t n = 1; n <= 16; n++) {
25465 for (uint32_t m = 1; m <= 1; m++) {
25466 GemmMicrokernelTester()
25467 .mr(1)
25468 .nr(16)
25469 .kr(4)
25470 .sr(1)
25471 .m(m)
25472 .n(n)
25473 .k(k)
25474 .iterations(1)
25475 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25476 }
25477 }
25478 }
25479 }
25480
25481 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, n_gt_16) {
25482 TEST_REQUIRES_ARM_NEON_DOT;
25483 for (uint32_t n = 17; n < 32; n++) {
25484 for (size_t k = 1; k <= 40; k += 9) {
25485 GemmMicrokernelTester()
25486 .mr(1)
25487 .nr(16)
25488 .kr(4)
25489 .sr(1)
25490 .m(1)
25491 .n(n)
25492 .k(k)
25493 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25494 }
25495 }
25496 }
25497
25498 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, n_gt_16_strided_cn) {
25499 TEST_REQUIRES_ARM_NEON_DOT;
25500 for (uint32_t n = 17; n < 32; n++) {
25501 for (size_t k = 1; k <= 40; k += 9) {
25502 GemmMicrokernelTester()
25503 .mr(1)
25504 .nr(16)
25505 .kr(4)
25506 .sr(1)
25507 .m(1)
25508 .n(n)
25509 .k(k)
25510 .cn_stride(19)
25511 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25512 }
25513 }
25514 }
25515
25516 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, n_gt_16_subtile) {
25517 TEST_REQUIRES_ARM_NEON_DOT;
25518 for (uint32_t n = 17; n < 32; n++) {
25519 for (size_t k = 1; k <= 40; k += 9) {
25520 for (uint32_t m = 1; m <= 1; m++) {
25521 GemmMicrokernelTester()
25522 .mr(1)
25523 .nr(16)
25524 .kr(4)
25525 .sr(1)
25526 .m(m)
25527 .n(n)
25528 .k(k)
25529 .iterations(1)
25530 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25531 }
25532 }
25533 }
25534 }
25535
25536 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, n_div_16) {
25537 TEST_REQUIRES_ARM_NEON_DOT;
25538 for (uint32_t n = 32; n <= 48; n += 16) {
25539 for (size_t k = 1; k <= 40; k += 9) {
25540 GemmMicrokernelTester()
25541 .mr(1)
25542 .nr(16)
25543 .kr(4)
25544 .sr(1)
25545 .m(1)
25546 .n(n)
25547 .k(k)
25548 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25549 }
25550 }
25551 }
25552
25553 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, n_div_16_strided_cn) {
25554 TEST_REQUIRES_ARM_NEON_DOT;
25555 for (uint32_t n = 32; n <= 48; n += 16) {
25556 for (size_t k = 1; k <= 40; k += 9) {
25557 GemmMicrokernelTester()
25558 .mr(1)
25559 .nr(16)
25560 .kr(4)
25561 .sr(1)
25562 .m(1)
25563 .n(n)
25564 .k(k)
25565 .cn_stride(19)
25566 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25567 }
25568 }
25569 }
25570
25571 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, n_div_16_subtile) {
25572 TEST_REQUIRES_ARM_NEON_DOT;
25573 for (uint32_t n = 32; n <= 48; n += 16) {
25574 for (size_t k = 1; k <= 40; k += 9) {
25575 for (uint32_t m = 1; m <= 1; m++) {
25576 GemmMicrokernelTester()
25577 .mr(1)
25578 .nr(16)
25579 .kr(4)
25580 .sr(1)
25581 .m(m)
25582 .n(n)
25583 .k(k)
25584 .iterations(1)
25585 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25586 }
25587 }
25588 }
25589 }
25590
25591 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, small_kernel) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080025592 TEST_REQUIRES_ARM_NEON_DOT;
25593 for (size_t k = 1; k <= 40; k += 9) {
25594 GemmMicrokernelTester()
Zhi An Ngc27f04b2022-01-11 09:34:07 -080025595 .mr(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025596 .nr(16)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080025597 .kr(4)
25598 .sr(1)
25599 .m(1)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080025600 .n(16)
25601 .k(k)
25602 .ks(3)
25603 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25604 }
25605 }
25606
25607 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, small_kernel_subtile) {
25608 TEST_REQUIRES_ARM_NEON_DOT;
25609 for (size_t k = 1; k <= 40; k += 9) {
25610 for (uint32_t n = 1; n <= 16; n++) {
25611 for (uint32_t m = 1; m <= 1; m++) {
25612 GemmMicrokernelTester()
25613 .mr(1)
25614 .nr(16)
25615 .kr(4)
25616 .sr(1)
25617 .m(m)
25618 .n(n)
25619 .k(k)
25620 .ks(3)
25621 .iterations(1)
25622 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25623 }
25624 }
25625 }
25626 }
25627
25628 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, n_gt_16_small_kernel) {
25629 TEST_REQUIRES_ARM_NEON_DOT;
25630 for (uint32_t n = 17; n < 32; n++) {
25631 for (size_t k = 1; k <= 40; k += 9) {
25632 GemmMicrokernelTester()
25633 .mr(1)
25634 .nr(16)
25635 .kr(4)
25636 .sr(1)
25637 .m(1)
25638 .n(n)
25639 .k(k)
25640 .ks(3)
25641 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25642 }
25643 }
25644 }
25645
25646 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, n_div_16_small_kernel) {
25647 TEST_REQUIRES_ARM_NEON_DOT;
25648 for (uint32_t n = 32; n <= 48; n += 16) {
25649 for (size_t k = 1; k <= 40; k += 9) {
25650 GemmMicrokernelTester()
25651 .mr(1)
25652 .nr(16)
25653 .kr(4)
25654 .sr(1)
25655 .m(1)
25656 .n(n)
25657 .k(k)
25658 .ks(3)
25659 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25660 }
25661 }
25662 }
25663
25664 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, strided_cm_subtile) {
25665 TEST_REQUIRES_ARM_NEON_DOT;
25666 for (size_t k = 1; k <= 40; k += 9) {
25667 for (uint32_t n = 1; n <= 16; n++) {
25668 for (uint32_t m = 1; m <= 1; m++) {
25669 GemmMicrokernelTester()
25670 .mr(1)
25671 .nr(16)
25672 .kr(4)
25673 .sr(1)
25674 .m(m)
25675 .n(n)
25676 .k(k)
25677 .cm_stride(19)
25678 .iterations(1)
25679 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25680 }
25681 }
25682 }
25683 }
25684
25685 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, a_offset) {
25686 TEST_REQUIRES_ARM_NEON_DOT;
25687 for (size_t k = 1; k <= 40; k += 9) {
25688 GemmMicrokernelTester()
25689 .mr(1)
25690 .nr(16)
25691 .kr(4)
25692 .sr(1)
25693 .m(1)
25694 .n(16)
25695 .k(k)
25696 .ks(3)
25697 .a_offset(43)
25698 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25699 }
25700 }
25701
25702 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, zero) {
25703 TEST_REQUIRES_ARM_NEON_DOT;
25704 for (size_t k = 1; k <= 40; k += 9) {
25705 for (uint32_t mz = 0; mz < 1; mz++) {
25706 GemmMicrokernelTester()
25707 .mr(1)
25708 .nr(16)
25709 .kr(4)
25710 .sr(1)
25711 .m(1)
25712 .n(16)
25713 .k(k)
25714 .ks(3)
25715 .a_offset(43)
25716 .zero_index(mz)
25717 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25718 }
25719 }
25720 }
25721
25722 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, qmin) {
25723 TEST_REQUIRES_ARM_NEON_DOT;
25724 GemmMicrokernelTester()
25725 .mr(1)
25726 .nr(16)
25727 .kr(4)
25728 .sr(1)
25729 .m(1)
25730 .n(16)
25731 .k(8)
25732 .qmin(128)
25733 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25734 }
25735
25736 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, qmax) {
25737 TEST_REQUIRES_ARM_NEON_DOT;
25738 GemmMicrokernelTester()
25739 .mr(1)
25740 .nr(16)
25741 .kr(4)
25742 .sr(1)
25743 .m(1)
25744 .n(16)
25745 .k(8)
25746 .qmax(128)
25747 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25748 }
25749
25750 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16C4__NEONDOT, strided_cm) {
25751 TEST_REQUIRES_ARM_NEON_DOT;
25752 GemmMicrokernelTester()
25753 .mr(1)
25754 .nr(16)
25755 .kr(4)
25756 .sr(1)
25757 .m(1)
25758 .n(16)
25759 .k(8)
25760 .cm_stride(19)
25761 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4__neondot, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25762 }
25763#endif // XNN_ARCH_ARM && !XNN_PLATFORM_IOS || XNN_ARCH_ARM64
25764
25765
25766#if XNN_ARCH_ARM || XNN_ARCH_ARM64
25767 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_eq_8) {
25768 TEST_REQUIRES_ARM_NEON;
25769 GemmMicrokernelTester()
25770 .mr(2)
25771 .nr(8)
25772 .kr(1)
25773 .sr(1)
25774 .m(2)
25775 .n(8)
25776 .k(8)
25777 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25778 }
25779
25780 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, strided_cn) {
25781 TEST_REQUIRES_ARM_NEON;
25782 GemmMicrokernelTester()
25783 .mr(2)
25784 .nr(8)
25785 .kr(1)
25786 .sr(1)
25787 .m(2)
25788 .n(8)
25789 .k(8)
25790 .cn_stride(11)
25791 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25792 }
25793
25794 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_eq_8_subtile) {
25795 TEST_REQUIRES_ARM_NEON;
25796 for (uint32_t n = 1; n <= 8; n++) {
25797 for (uint32_t m = 1; m <= 2; m++) {
25798 GemmMicrokernelTester()
25799 .mr(2)
25800 .nr(8)
25801 .kr(1)
25802 .sr(1)
25803 .m(m)
25804 .n(n)
25805 .k(8)
25806 .iterations(1)
25807 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25808 }
25809 }
25810 }
25811
25812 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_eq_8_subtile_m) {
25813 TEST_REQUIRES_ARM_NEON;
25814 for (uint32_t m = 1; m <= 2; m++) {
25815 GemmMicrokernelTester()
25816 .mr(2)
25817 .nr(8)
25818 .kr(1)
25819 .sr(1)
25820 .m(m)
25821 .n(8)
25822 .k(8)
25823 .iterations(1)
25824 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25825 }
25826 }
25827
25828 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_eq_8_subtile_n) {
25829 TEST_REQUIRES_ARM_NEON;
25830 for (uint32_t n = 1; n <= 8; n++) {
25831 GemmMicrokernelTester()
25832 .mr(2)
25833 .nr(8)
25834 .kr(1)
25835 .sr(1)
25836 .m(2)
25837 .n(n)
25838 .k(8)
25839 .iterations(1)
25840 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25841 }
25842 }
25843
25844 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_lt_8) {
25845 TEST_REQUIRES_ARM_NEON;
25846 for (size_t k = 1; k < 8; k++) {
25847 GemmMicrokernelTester()
25848 .mr(2)
25849 .nr(8)
25850 .kr(1)
25851 .sr(1)
25852 .m(2)
25853 .n(8)
25854 .k(k)
25855 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25856 }
25857 }
25858
25859 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_lt_8_subtile) {
25860 TEST_REQUIRES_ARM_NEON;
25861 for (size_t k = 1; k < 8; k++) {
25862 for (uint32_t n = 1; n <= 8; n++) {
25863 for (uint32_t m = 1; m <= 2; m++) {
25864 GemmMicrokernelTester()
25865 .mr(2)
25866 .nr(8)
25867 .kr(1)
25868 .sr(1)
25869 .m(m)
25870 .n(n)
25871 .k(k)
25872 .iterations(1)
25873 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25874 }
25875 }
25876 }
25877 }
25878
25879 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_gt_8) {
25880 TEST_REQUIRES_ARM_NEON;
25881 for (size_t k = 9; k < 16; k++) {
25882 GemmMicrokernelTester()
25883 .mr(2)
25884 .nr(8)
25885 .kr(1)
25886 .sr(1)
25887 .m(2)
25888 .n(8)
25889 .k(k)
25890 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25891 }
25892 }
25893
25894 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_gt_8_subtile) {
25895 TEST_REQUIRES_ARM_NEON;
25896 for (size_t k = 9; k < 16; k++) {
25897 for (uint32_t n = 1; n <= 8; n++) {
25898 for (uint32_t m = 1; m <= 2; m++) {
25899 GemmMicrokernelTester()
25900 .mr(2)
25901 .nr(8)
25902 .kr(1)
25903 .sr(1)
25904 .m(m)
25905 .n(n)
25906 .k(k)
25907 .iterations(1)
25908 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25909 }
25910 }
25911 }
25912 }
25913
25914 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_div_8) {
25915 TEST_REQUIRES_ARM_NEON;
25916 for (size_t k = 16; k <= 80; k += 8) {
25917 GemmMicrokernelTester()
25918 .mr(2)
25919 .nr(8)
25920 .kr(1)
25921 .sr(1)
25922 .m(2)
25923 .n(8)
25924 .k(k)
25925 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25926 }
25927 }
25928
25929 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, k_div_8_subtile) {
25930 TEST_REQUIRES_ARM_NEON;
25931 for (size_t k = 16; k <= 80; k += 8) {
25932 for (uint32_t n = 1; n <= 8; n++) {
25933 for (uint32_t m = 1; m <= 2; m++) {
25934 GemmMicrokernelTester()
25935 .mr(2)
25936 .nr(8)
25937 .kr(1)
25938 .sr(1)
25939 .m(m)
25940 .n(n)
25941 .k(k)
25942 .iterations(1)
25943 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25944 }
25945 }
25946 }
25947 }
25948
25949 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, n_gt_8) {
25950 TEST_REQUIRES_ARM_NEON;
25951 for (uint32_t n = 9; n < 16; n++) {
25952 for (size_t k = 1; k <= 40; k += 9) {
25953 GemmMicrokernelTester()
25954 .mr(2)
25955 .nr(8)
25956 .kr(1)
25957 .sr(1)
25958 .m(2)
25959 .n(n)
25960 .k(k)
25961 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25962 }
25963 }
25964 }
25965
25966 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, n_gt_8_strided_cn) {
25967 TEST_REQUIRES_ARM_NEON;
25968 for (uint32_t n = 9; n < 16; n++) {
25969 for (size_t k = 1; k <= 40; k += 9) {
25970 GemmMicrokernelTester()
25971 .mr(2)
25972 .nr(8)
25973 .kr(1)
25974 .sr(1)
25975 .m(2)
25976 .n(n)
25977 .k(k)
25978 .cn_stride(11)
25979 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25980 }
25981 }
25982 }
25983
25984 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, n_gt_8_subtile) {
25985 TEST_REQUIRES_ARM_NEON;
25986 for (uint32_t n = 9; n < 16; n++) {
25987 for (size_t k = 1; k <= 40; k += 9) {
25988 for (uint32_t m = 1; m <= 2; m++) {
25989 GemmMicrokernelTester()
25990 .mr(2)
25991 .nr(8)
25992 .kr(1)
25993 .sr(1)
25994 .m(m)
25995 .n(n)
25996 .k(k)
25997 .iterations(1)
25998 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
25999 }
26000 }
26001 }
26002 }
26003
26004 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, n_div_8) {
26005 TEST_REQUIRES_ARM_NEON;
26006 for (uint32_t n = 16; n <= 24; n += 8) {
26007 for (size_t k = 1; k <= 40; k += 9) {
26008 GemmMicrokernelTester()
26009 .mr(2)
26010 .nr(8)
26011 .kr(1)
26012 .sr(1)
26013 .m(2)
26014 .n(n)
26015 .k(k)
26016 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26017 }
26018 }
26019 }
26020
26021 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, n_div_8_strided_cn) {
26022 TEST_REQUIRES_ARM_NEON;
26023 for (uint32_t n = 16; n <= 24; n += 8) {
26024 for (size_t k = 1; k <= 40; k += 9) {
26025 GemmMicrokernelTester()
26026 .mr(2)
26027 .nr(8)
26028 .kr(1)
26029 .sr(1)
26030 .m(2)
26031 .n(n)
26032 .k(k)
26033 .cn_stride(11)
26034 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26035 }
26036 }
26037 }
26038
26039 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, n_div_8_subtile) {
26040 TEST_REQUIRES_ARM_NEON;
26041 for (uint32_t n = 16; n <= 24; n += 8) {
26042 for (size_t k = 1; k <= 40; k += 9) {
26043 for (uint32_t m = 1; m <= 2; m++) {
26044 GemmMicrokernelTester()
26045 .mr(2)
26046 .nr(8)
26047 .kr(1)
26048 .sr(1)
26049 .m(m)
26050 .n(n)
26051 .k(k)
26052 .iterations(1)
26053 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26054 }
26055 }
26056 }
26057 }
26058
26059 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, small_kernel) {
26060 TEST_REQUIRES_ARM_NEON;
26061 for (size_t k = 1; k <= 40; k += 9) {
26062 GemmMicrokernelTester()
26063 .mr(2)
26064 .nr(8)
26065 .kr(1)
26066 .sr(1)
26067 .m(2)
26068 .n(8)
26069 .k(k)
26070 .ks(3)
26071 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26072 }
26073 }
26074
26075 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, small_kernel_subtile) {
26076 TEST_REQUIRES_ARM_NEON;
26077 for (size_t k = 1; k <= 40; k += 9) {
26078 for (uint32_t n = 1; n <= 8; n++) {
26079 for (uint32_t m = 1; m <= 2; m++) {
26080 GemmMicrokernelTester()
26081 .mr(2)
26082 .nr(8)
26083 .kr(1)
26084 .sr(1)
26085 .m(m)
26086 .n(n)
26087 .k(k)
26088 .ks(3)
26089 .iterations(1)
26090 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26091 }
26092 }
26093 }
26094 }
26095
26096 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, n_gt_8_small_kernel) {
26097 TEST_REQUIRES_ARM_NEON;
26098 for (uint32_t n = 9; n < 16; n++) {
26099 for (size_t k = 1; k <= 40; k += 9) {
26100 GemmMicrokernelTester()
26101 .mr(2)
26102 .nr(8)
26103 .kr(1)
26104 .sr(1)
26105 .m(2)
26106 .n(n)
26107 .k(k)
26108 .ks(3)
26109 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26110 }
26111 }
26112 }
26113
26114 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, n_div_8_small_kernel) {
26115 TEST_REQUIRES_ARM_NEON;
26116 for (uint32_t n = 16; n <= 24; n += 8) {
26117 for (size_t k = 1; k <= 40; k += 9) {
26118 GemmMicrokernelTester()
26119 .mr(2)
26120 .nr(8)
26121 .kr(1)
26122 .sr(1)
26123 .m(2)
26124 .n(n)
26125 .k(k)
26126 .ks(3)
26127 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26128 }
26129 }
26130 }
26131
26132 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, strided_cm_subtile) {
26133 TEST_REQUIRES_ARM_NEON;
26134 for (size_t k = 1; k <= 40; k += 9) {
26135 for (uint32_t n = 1; n <= 8; n++) {
26136 for (uint32_t m = 1; m <= 2; m++) {
26137 GemmMicrokernelTester()
26138 .mr(2)
26139 .nr(8)
26140 .kr(1)
26141 .sr(1)
26142 .m(m)
26143 .n(n)
26144 .k(k)
26145 .cm_stride(11)
26146 .iterations(1)
26147 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26148 }
26149 }
26150 }
26151 }
26152
26153 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, a_offset) {
26154 TEST_REQUIRES_ARM_NEON;
26155 for (size_t k = 1; k <= 40; k += 9) {
26156 GemmMicrokernelTester()
26157 .mr(2)
26158 .nr(8)
26159 .kr(1)
26160 .sr(1)
26161 .m(2)
26162 .n(8)
26163 .k(k)
26164 .ks(3)
26165 .a_offset(83)
26166 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26167 }
26168 }
26169
26170 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, zero) {
26171 TEST_REQUIRES_ARM_NEON;
26172 for (size_t k = 1; k <= 40; k += 9) {
26173 for (uint32_t mz = 0; mz < 2; mz++) {
26174 GemmMicrokernelTester()
26175 .mr(2)
26176 .nr(8)
26177 .kr(1)
26178 .sr(1)
26179 .m(2)
26180 .n(8)
26181 .k(k)
26182 .ks(3)
26183 .a_offset(83)
26184 .zero_index(mz)
26185 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26186 }
26187 }
26188 }
26189
26190 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, qmin) {
26191 TEST_REQUIRES_ARM_NEON;
26192 GemmMicrokernelTester()
26193 .mr(2)
26194 .nr(8)
26195 .kr(1)
26196 .sr(1)
26197 .m(2)
26198 .n(8)
26199 .k(8)
26200 .qmin(128)
26201 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26202 }
26203
26204 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, qmax) {
26205 TEST_REQUIRES_ARM_NEON;
26206 GemmMicrokernelTester()
26207 .mr(2)
26208 .nr(8)
26209 .kr(1)
26210 .sr(1)
26211 .m(2)
26212 .n(8)
26213 .k(8)
26214 .qmax(128)
26215 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26216 }
26217
26218 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE, strided_cm) {
26219 TEST_REQUIRES_ARM_NEON;
26220 GemmMicrokernelTester()
26221 .mr(2)
26222 .nr(8)
26223 .kr(1)
26224 .sr(1)
26225 .m(2)
26226 .n(8)
26227 .k(8)
26228 .cm_stride(11)
26229 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26230 }
26231#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
26232
26233
26234#if XNN_ARCH_ARM || XNN_ARCH_ARM64
26235 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_eq_8) {
26236 TEST_REQUIRES_ARM_NEON;
26237 GemmMicrokernelTester()
26238 .mr(3)
26239 .nr(8)
26240 .kr(1)
26241 .sr(1)
26242 .m(3)
26243 .n(8)
26244 .k(8)
26245 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26246 }
26247
26248 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, strided_cn) {
26249 TEST_REQUIRES_ARM_NEON;
26250 GemmMicrokernelTester()
26251 .mr(3)
26252 .nr(8)
26253 .kr(1)
26254 .sr(1)
26255 .m(3)
26256 .n(8)
26257 .k(8)
26258 .cn_stride(11)
26259 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26260 }
26261
26262 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_eq_8_subtile) {
26263 TEST_REQUIRES_ARM_NEON;
26264 for (uint32_t n = 1; n <= 8; n++) {
26265 for (uint32_t m = 1; m <= 3; m++) {
26266 GemmMicrokernelTester()
26267 .mr(3)
26268 .nr(8)
26269 .kr(1)
26270 .sr(1)
26271 .m(m)
26272 .n(n)
26273 .k(8)
26274 .iterations(1)
26275 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26276 }
26277 }
26278 }
26279
26280 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_eq_8_subtile_m) {
26281 TEST_REQUIRES_ARM_NEON;
26282 for (uint32_t m = 1; m <= 3; m++) {
26283 GemmMicrokernelTester()
26284 .mr(3)
26285 .nr(8)
26286 .kr(1)
26287 .sr(1)
26288 .m(m)
26289 .n(8)
26290 .k(8)
26291 .iterations(1)
26292 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26293 }
26294 }
26295
26296 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_eq_8_subtile_n) {
26297 TEST_REQUIRES_ARM_NEON;
26298 for (uint32_t n = 1; n <= 8; n++) {
26299 GemmMicrokernelTester()
26300 .mr(3)
26301 .nr(8)
26302 .kr(1)
26303 .sr(1)
26304 .m(3)
26305 .n(n)
26306 .k(8)
26307 .iterations(1)
26308 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26309 }
26310 }
26311
26312 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_lt_8) {
26313 TEST_REQUIRES_ARM_NEON;
26314 for (size_t k = 1; k < 8; k++) {
26315 GemmMicrokernelTester()
26316 .mr(3)
26317 .nr(8)
26318 .kr(1)
26319 .sr(1)
26320 .m(3)
26321 .n(8)
26322 .k(k)
26323 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26324 }
26325 }
26326
26327 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_lt_8_subtile) {
26328 TEST_REQUIRES_ARM_NEON;
26329 for (size_t k = 1; k < 8; k++) {
26330 for (uint32_t n = 1; n <= 8; n++) {
26331 for (uint32_t m = 1; m <= 3; m++) {
26332 GemmMicrokernelTester()
26333 .mr(3)
26334 .nr(8)
26335 .kr(1)
26336 .sr(1)
26337 .m(m)
26338 .n(n)
26339 .k(k)
26340 .iterations(1)
26341 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26342 }
26343 }
26344 }
26345 }
26346
26347 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_gt_8) {
26348 TEST_REQUIRES_ARM_NEON;
26349 for (size_t k = 9; k < 16; k++) {
26350 GemmMicrokernelTester()
26351 .mr(3)
26352 .nr(8)
26353 .kr(1)
26354 .sr(1)
26355 .m(3)
26356 .n(8)
26357 .k(k)
26358 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26359 }
26360 }
26361
26362 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_gt_8_subtile) {
26363 TEST_REQUIRES_ARM_NEON;
26364 for (size_t k = 9; k < 16; k++) {
26365 for (uint32_t n = 1; n <= 8; n++) {
26366 for (uint32_t m = 1; m <= 3; m++) {
26367 GemmMicrokernelTester()
26368 .mr(3)
26369 .nr(8)
26370 .kr(1)
26371 .sr(1)
26372 .m(m)
26373 .n(n)
26374 .k(k)
26375 .iterations(1)
26376 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26377 }
26378 }
26379 }
26380 }
26381
26382 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_div_8) {
26383 TEST_REQUIRES_ARM_NEON;
26384 for (size_t k = 16; k <= 80; k += 8) {
26385 GemmMicrokernelTester()
26386 .mr(3)
26387 .nr(8)
26388 .kr(1)
26389 .sr(1)
26390 .m(3)
26391 .n(8)
26392 .k(k)
26393 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26394 }
26395 }
26396
26397 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, k_div_8_subtile) {
26398 TEST_REQUIRES_ARM_NEON;
26399 for (size_t k = 16; k <= 80; k += 8) {
26400 for (uint32_t n = 1; n <= 8; n++) {
26401 for (uint32_t m = 1; m <= 3; m++) {
26402 GemmMicrokernelTester()
26403 .mr(3)
26404 .nr(8)
26405 .kr(1)
26406 .sr(1)
26407 .m(m)
26408 .n(n)
26409 .k(k)
26410 .iterations(1)
26411 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26412 }
26413 }
26414 }
26415 }
26416
26417 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, n_gt_8) {
26418 TEST_REQUIRES_ARM_NEON;
26419 for (uint32_t n = 9; n < 16; n++) {
26420 for (size_t k = 1; k <= 40; k += 9) {
26421 GemmMicrokernelTester()
26422 .mr(3)
26423 .nr(8)
26424 .kr(1)
26425 .sr(1)
26426 .m(3)
26427 .n(n)
26428 .k(k)
26429 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26430 }
26431 }
26432 }
26433
26434 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, n_gt_8_strided_cn) {
26435 TEST_REQUIRES_ARM_NEON;
26436 for (uint32_t n = 9; n < 16; n++) {
26437 for (size_t k = 1; k <= 40; k += 9) {
26438 GemmMicrokernelTester()
26439 .mr(3)
26440 .nr(8)
26441 .kr(1)
26442 .sr(1)
26443 .m(3)
26444 .n(n)
26445 .k(k)
26446 .cn_stride(11)
26447 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26448 }
26449 }
26450 }
26451
26452 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, n_gt_8_subtile) {
26453 TEST_REQUIRES_ARM_NEON;
26454 for (uint32_t n = 9; n < 16; n++) {
26455 for (size_t k = 1; k <= 40; k += 9) {
26456 for (uint32_t m = 1; m <= 3; m++) {
26457 GemmMicrokernelTester()
26458 .mr(3)
26459 .nr(8)
26460 .kr(1)
26461 .sr(1)
26462 .m(m)
26463 .n(n)
26464 .k(k)
26465 .iterations(1)
26466 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26467 }
26468 }
26469 }
26470 }
26471
26472 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, n_div_8) {
26473 TEST_REQUIRES_ARM_NEON;
26474 for (uint32_t n = 16; n <= 24; n += 8) {
26475 for (size_t k = 1; k <= 40; k += 9) {
26476 GemmMicrokernelTester()
26477 .mr(3)
26478 .nr(8)
26479 .kr(1)
26480 .sr(1)
26481 .m(3)
26482 .n(n)
26483 .k(k)
26484 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26485 }
26486 }
26487 }
26488
26489 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, n_div_8_strided_cn) {
26490 TEST_REQUIRES_ARM_NEON;
26491 for (uint32_t n = 16; n <= 24; n += 8) {
26492 for (size_t k = 1; k <= 40; k += 9) {
26493 GemmMicrokernelTester()
26494 .mr(3)
26495 .nr(8)
26496 .kr(1)
26497 .sr(1)
26498 .m(3)
26499 .n(n)
26500 .k(k)
26501 .cn_stride(11)
26502 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26503 }
26504 }
26505 }
26506
26507 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, n_div_8_subtile) {
26508 TEST_REQUIRES_ARM_NEON;
26509 for (uint32_t n = 16; n <= 24; n += 8) {
26510 for (size_t k = 1; k <= 40; k += 9) {
26511 for (uint32_t m = 1; m <= 3; m++) {
26512 GemmMicrokernelTester()
26513 .mr(3)
26514 .nr(8)
26515 .kr(1)
26516 .sr(1)
26517 .m(m)
26518 .n(n)
26519 .k(k)
26520 .iterations(1)
26521 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26522 }
26523 }
26524 }
26525 }
26526
26527 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, small_kernel) {
26528 TEST_REQUIRES_ARM_NEON;
26529 for (size_t k = 1; k <= 40; k += 9) {
26530 GemmMicrokernelTester()
26531 .mr(3)
26532 .nr(8)
26533 .kr(1)
26534 .sr(1)
26535 .m(3)
26536 .n(8)
26537 .k(k)
26538 .ks(3)
26539 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26540 }
26541 }
26542
26543 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, small_kernel_subtile) {
26544 TEST_REQUIRES_ARM_NEON;
26545 for (size_t k = 1; k <= 40; k += 9) {
26546 for (uint32_t n = 1; n <= 8; n++) {
26547 for (uint32_t m = 1; m <= 3; m++) {
26548 GemmMicrokernelTester()
26549 .mr(3)
26550 .nr(8)
26551 .kr(1)
26552 .sr(1)
26553 .m(m)
26554 .n(n)
26555 .k(k)
26556 .ks(3)
26557 .iterations(1)
26558 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26559 }
26560 }
26561 }
26562 }
26563
26564 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, n_gt_8_small_kernel) {
26565 TEST_REQUIRES_ARM_NEON;
26566 for (uint32_t n = 9; n < 16; n++) {
26567 for (size_t k = 1; k <= 40; k += 9) {
26568 GemmMicrokernelTester()
26569 .mr(3)
26570 .nr(8)
26571 .kr(1)
26572 .sr(1)
26573 .m(3)
26574 .n(n)
26575 .k(k)
26576 .ks(3)
26577 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26578 }
26579 }
26580 }
26581
26582 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, n_div_8_small_kernel) {
26583 TEST_REQUIRES_ARM_NEON;
26584 for (uint32_t n = 16; n <= 24; n += 8) {
26585 for (size_t k = 1; k <= 40; k += 9) {
26586 GemmMicrokernelTester()
26587 .mr(3)
26588 .nr(8)
26589 .kr(1)
26590 .sr(1)
26591 .m(3)
26592 .n(n)
26593 .k(k)
26594 .ks(3)
26595 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26596 }
26597 }
26598 }
26599
26600 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, strided_cm_subtile) {
26601 TEST_REQUIRES_ARM_NEON;
26602 for (size_t k = 1; k <= 40; k += 9) {
26603 for (uint32_t n = 1; n <= 8; n++) {
26604 for (uint32_t m = 1; m <= 3; m++) {
26605 GemmMicrokernelTester()
26606 .mr(3)
26607 .nr(8)
26608 .kr(1)
26609 .sr(1)
26610 .m(m)
26611 .n(n)
26612 .k(k)
26613 .cm_stride(11)
26614 .iterations(1)
26615 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26616 }
26617 }
26618 }
26619 }
26620
26621 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, a_offset) {
26622 TEST_REQUIRES_ARM_NEON;
26623 for (size_t k = 1; k <= 40; k += 9) {
26624 GemmMicrokernelTester()
26625 .mr(3)
26626 .nr(8)
26627 .kr(1)
26628 .sr(1)
26629 .m(3)
26630 .n(8)
26631 .k(k)
26632 .ks(3)
26633 .a_offset(127)
26634 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26635 }
26636 }
26637
26638 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, zero) {
26639 TEST_REQUIRES_ARM_NEON;
26640 for (size_t k = 1; k <= 40; k += 9) {
26641 for (uint32_t mz = 0; mz < 3; mz++) {
26642 GemmMicrokernelTester()
26643 .mr(3)
26644 .nr(8)
26645 .kr(1)
26646 .sr(1)
26647 .m(3)
26648 .n(8)
26649 .k(k)
26650 .ks(3)
26651 .a_offset(127)
26652 .zero_index(mz)
26653 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26654 }
26655 }
26656 }
26657
26658 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, qmin) {
26659 TEST_REQUIRES_ARM_NEON;
26660 GemmMicrokernelTester()
26661 .mr(3)
26662 .nr(8)
26663 .kr(1)
26664 .sr(1)
26665 .m(3)
26666 .n(8)
26667 .k(8)
26668 .qmin(128)
26669 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26670 }
26671
26672 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, qmax) {
26673 TEST_REQUIRES_ARM_NEON;
26674 GemmMicrokernelTester()
26675 .mr(3)
26676 .nr(8)
26677 .kr(1)
26678 .sr(1)
26679 .m(3)
26680 .n(8)
26681 .k(8)
26682 .qmax(128)
26683 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26684 }
26685
26686 TEST(QS8_IGEMM_MINMAX_RNDNU_3X8__NEON_MLAL_LANE, strided_cm) {
26687 TEST_REQUIRES_ARM_NEON;
26688 GemmMicrokernelTester()
26689 .mr(3)
26690 .nr(8)
26691 .kr(1)
26692 .sr(1)
26693 .m(3)
26694 .n(8)
26695 .k(8)
26696 .cm_stride(11)
26697 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x8__neon_mlal_lane, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26698 }
26699#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
26700
26701
26702#if XNN_ARCH_ARM || XNN_ARCH_ARM64
26703 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_eq_8) {
26704 TEST_REQUIRES_ARM_NEON;
26705 GemmMicrokernelTester()
26706 .mr(1)
26707 .nr(8)
26708 .kr(1)
26709 .sr(1)
26710 .m(1)
26711 .n(8)
26712 .k(8)
26713 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26714 }
26715
26716 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, strided_cn) {
26717 TEST_REQUIRES_ARM_NEON;
26718 GemmMicrokernelTester()
26719 .mr(1)
26720 .nr(8)
26721 .kr(1)
26722 .sr(1)
26723 .m(1)
26724 .n(8)
26725 .k(8)
26726 .cn_stride(11)
26727 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26728 }
26729
26730 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile) {
26731 TEST_REQUIRES_ARM_NEON;
26732 for (uint32_t n = 1; n <= 8; n++) {
26733 for (uint32_t m = 1; m <= 1; m++) {
26734 GemmMicrokernelTester()
26735 .mr(1)
26736 .nr(8)
26737 .kr(1)
26738 .sr(1)
26739 .m(m)
26740 .n(n)
26741 .k(8)
26742 .iterations(1)
26743 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26744 }
26745 }
26746 }
26747
26748 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_m) {
26749 TEST_REQUIRES_ARM_NEON;
26750 for (uint32_t m = 1; m <= 1; m++) {
26751 GemmMicrokernelTester()
26752 .mr(1)
26753 .nr(8)
26754 .kr(1)
26755 .sr(1)
26756 .m(m)
26757 .n(8)
26758 .k(8)
26759 .iterations(1)
26760 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26761 }
26762 }
26763
26764 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_n) {
26765 TEST_REQUIRES_ARM_NEON;
26766 for (uint32_t n = 1; n <= 8; n++) {
26767 GemmMicrokernelTester()
26768 .mr(1)
26769 .nr(8)
26770 .kr(1)
26771 .sr(1)
26772 .m(1)
26773 .n(n)
26774 .k(8)
26775 .iterations(1)
26776 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26777 }
26778 }
26779
26780 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_lt_8) {
26781 TEST_REQUIRES_ARM_NEON;
26782 for (size_t k = 1; k < 8; k++) {
26783 GemmMicrokernelTester()
26784 .mr(1)
26785 .nr(8)
26786 .kr(1)
26787 .sr(1)
26788 .m(1)
26789 .n(8)
26790 .k(k)
26791 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26792 }
26793 }
26794
26795 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_lt_8_subtile) {
26796 TEST_REQUIRES_ARM_NEON;
26797 for (size_t k = 1; k < 8; k++) {
26798 for (uint32_t n = 1; n <= 8; n++) {
26799 for (uint32_t m = 1; m <= 1; m++) {
26800 GemmMicrokernelTester()
26801 .mr(1)
26802 .nr(8)
26803 .kr(1)
26804 .sr(1)
26805 .m(m)
26806 .n(n)
26807 .k(k)
26808 .iterations(1)
26809 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26810 }
26811 }
26812 }
26813 }
26814
26815 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_gt_8) {
26816 TEST_REQUIRES_ARM_NEON;
26817 for (size_t k = 9; k < 16; k++) {
26818 GemmMicrokernelTester()
26819 .mr(1)
26820 .nr(8)
26821 .kr(1)
26822 .sr(1)
26823 .m(1)
26824 .n(8)
26825 .k(k)
26826 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26827 }
26828 }
26829
26830 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_gt_8_subtile) {
26831 TEST_REQUIRES_ARM_NEON;
26832 for (size_t k = 9; k < 16; k++) {
26833 for (uint32_t n = 1; n <= 8; n++) {
26834 for (uint32_t m = 1; m <= 1; m++) {
26835 GemmMicrokernelTester()
26836 .mr(1)
26837 .nr(8)
26838 .kr(1)
26839 .sr(1)
26840 .m(m)
26841 .n(n)
26842 .k(k)
26843 .iterations(1)
26844 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26845 }
26846 }
26847 }
26848 }
26849
26850 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_div_8) {
26851 TEST_REQUIRES_ARM_NEON;
26852 for (size_t k = 16; k <= 80; k += 8) {
26853 GemmMicrokernelTester()
26854 .mr(1)
26855 .nr(8)
26856 .kr(1)
26857 .sr(1)
26858 .m(1)
26859 .n(8)
26860 .k(k)
26861 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26862 }
26863 }
26864
26865 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, k_div_8_subtile) {
26866 TEST_REQUIRES_ARM_NEON;
26867 for (size_t k = 16; k <= 80; k += 8) {
26868 for (uint32_t n = 1; n <= 8; n++) {
26869 for (uint32_t m = 1; m <= 1; m++) {
26870 GemmMicrokernelTester()
26871 .mr(1)
26872 .nr(8)
26873 .kr(1)
26874 .sr(1)
26875 .m(m)
26876 .n(n)
26877 .k(k)
26878 .iterations(1)
26879 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26880 }
26881 }
26882 }
26883 }
26884
26885 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, n_gt_8) {
26886 TEST_REQUIRES_ARM_NEON;
26887 for (uint32_t n = 9; n < 16; n++) {
26888 for (size_t k = 1; k <= 40; k += 9) {
26889 GemmMicrokernelTester()
26890 .mr(1)
26891 .nr(8)
26892 .kr(1)
26893 .sr(1)
26894 .m(1)
26895 .n(n)
26896 .k(k)
26897 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26898 }
26899 }
26900 }
26901
26902 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, n_gt_8_strided_cn) {
26903 TEST_REQUIRES_ARM_NEON;
26904 for (uint32_t n = 9; n < 16; n++) {
26905 for (size_t k = 1; k <= 40; k += 9) {
26906 GemmMicrokernelTester()
26907 .mr(1)
26908 .nr(8)
26909 .kr(1)
26910 .sr(1)
26911 .m(1)
26912 .n(n)
26913 .k(k)
26914 .cn_stride(11)
26915 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26916 }
26917 }
26918 }
26919
26920 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, n_gt_8_subtile) {
26921 TEST_REQUIRES_ARM_NEON;
26922 for (uint32_t n = 9; n < 16; n++) {
26923 for (size_t k = 1; k <= 40; k += 9) {
26924 for (uint32_t m = 1; m <= 1; m++) {
26925 GemmMicrokernelTester()
26926 .mr(1)
26927 .nr(8)
26928 .kr(1)
26929 .sr(1)
26930 .m(m)
26931 .n(n)
26932 .k(k)
26933 .iterations(1)
26934 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26935 }
26936 }
26937 }
26938 }
26939
26940 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, n_div_8) {
26941 TEST_REQUIRES_ARM_NEON;
26942 for (uint32_t n = 16; n <= 24; n += 8) {
26943 for (size_t k = 1; k <= 40; k += 9) {
26944 GemmMicrokernelTester()
26945 .mr(1)
26946 .nr(8)
26947 .kr(1)
26948 .sr(1)
26949 .m(1)
26950 .n(n)
26951 .k(k)
26952 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26953 }
26954 }
26955 }
26956
26957 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, n_div_8_strided_cn) {
26958 TEST_REQUIRES_ARM_NEON;
26959 for (uint32_t n = 16; n <= 24; n += 8) {
26960 for (size_t k = 1; k <= 40; k += 9) {
26961 GemmMicrokernelTester()
26962 .mr(1)
26963 .nr(8)
26964 .kr(1)
26965 .sr(1)
26966 .m(1)
26967 .n(n)
26968 .k(k)
26969 .cn_stride(11)
26970 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26971 }
26972 }
26973 }
26974
26975 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, n_div_8_subtile) {
26976 TEST_REQUIRES_ARM_NEON;
26977 for (uint32_t n = 16; n <= 24; n += 8) {
26978 for (size_t k = 1; k <= 40; k += 9) {
26979 for (uint32_t m = 1; m <= 1; m++) {
26980 GemmMicrokernelTester()
26981 .mr(1)
26982 .nr(8)
26983 .kr(1)
26984 .sr(1)
26985 .m(m)
26986 .n(n)
26987 .k(k)
26988 .iterations(1)
26989 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
26990 }
26991 }
26992 }
26993 }
26994
26995 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, small_kernel) {
26996 TEST_REQUIRES_ARM_NEON;
26997 for (size_t k = 1; k <= 40; k += 9) {
26998 GemmMicrokernelTester()
26999 .mr(1)
27000 .nr(8)
27001 .kr(1)
27002 .sr(1)
27003 .m(1)
27004 .n(8)
27005 .k(k)
27006 .ks(3)
27007 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
27008 }
27009 }
27010
27011 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, small_kernel_subtile) {
27012 TEST_REQUIRES_ARM_NEON;
27013 for (size_t k = 1; k <= 40; k += 9) {
27014 for (uint32_t n = 1; n <= 8; n++) {
27015 for (uint32_t m = 1; m <= 1; m++) {
27016 GemmMicrokernelTester()
27017 .mr(1)
27018 .nr(8)
27019 .kr(1)
27020 .sr(1)
27021 .m(m)
27022 .n(n)
27023 .k(k)
27024 .ks(3)
27025 .iterations(1)
27026 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
27027 }
27028 }
27029 }
27030 }
27031
27032 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, n_gt_8_small_kernel) {
27033 TEST_REQUIRES_ARM_NEON;
27034 for (uint32_t n = 9; n < 16; n++) {
27035 for (size_t k = 1; k <= 40; k += 9) {
27036 GemmMicrokernelTester()
27037 .mr(1)
27038 .nr(8)
27039 .kr(1)
27040 .sr(1)
27041 .m(1)
27042 .n(n)
27043 .k(k)
27044 .ks(3)
27045 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
27046 }
27047 }
27048 }
27049
27050 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, n_div_8_small_kernel) {
27051 TEST_REQUIRES_ARM_NEON;
27052 for (uint32_t n = 16; n <= 24; n += 8) {
27053 for (size_t k = 1; k <= 40; k += 9) {
27054 GemmMicrokernelTester()
27055 .mr(1)
27056 .nr(8)
27057 .kr(1)
27058 .sr(1)
27059 .m(1)
27060 .n(n)
27061 .k(k)
27062 .ks(3)
27063 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
27064 }
27065 }
27066 }
27067
27068 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, strided_cm_subtile) {
27069 TEST_REQUIRES_ARM_NEON;
27070 for (size_t k = 1; k <= 40; k += 9) {
27071 for (uint32_t n = 1; n <= 8; n++) {
27072 for (uint32_t m = 1; m <= 1; m++) {
27073 GemmMicrokernelTester()
27074 .mr(1)
27075 .nr(8)
27076 .kr(1)
27077 .sr(1)
27078 .m(m)
27079 .n(n)
27080 .k(k)
27081 .cm_stride(11)
27082 .iterations(1)
27083 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
27084 }
27085 }
27086 }
27087 }
27088
27089 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, a_offset) {
27090 TEST_REQUIRES_ARM_NEON;
27091 for (size_t k = 1; k <= 40; k += 9) {
27092 GemmMicrokernelTester()
27093 .mr(1)
27094 .nr(8)
27095 .kr(1)
27096 .sr(1)
27097 .m(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027098 .n(8)
27099 .k(k)
27100 .ks(3)
27101 .a_offset(43)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027102 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027103 }
27104 }
27105
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027106 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, zero) {
27107 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080027108 for (size_t k = 1; k <= 40; k += 9) {
27109 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027110 GemmMicrokernelTester()
27111 .mr(1)
27112 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027113 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027114 .sr(1)
27115 .m(1)
27116 .n(8)
27117 .k(k)
27118 .ks(3)
27119 .a_offset(43)
27120 .zero_index(mz)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027121 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027122 }
27123 }
27124 }
27125
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027126 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, qmin) {
27127 TEST_REQUIRES_ARM_NEON;
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027128 GemmMicrokernelTester()
27129 .mr(1)
27130 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027131 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027132 .sr(1)
27133 .m(1)
27134 .n(8)
27135 .k(8)
27136 .qmin(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027137 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027138 }
27139
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027140 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, qmax) {
27141 TEST_REQUIRES_ARM_NEON;
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027142 GemmMicrokernelTester()
27143 .mr(1)
27144 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027145 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027146 .sr(1)
27147 .m(1)
27148 .n(8)
27149 .k(8)
27150 .qmax(128)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027151 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027152 }
27153
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027154 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MLAL_LANE_PRFM, strided_cm) {
27155 TEST_REQUIRES_ARM_NEON;
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027156 GemmMicrokernelTester()
27157 .mr(1)
27158 .nr(8)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027159 .kr(1)
Zhi An Ngc27f04b2022-01-11 09:34:07 -080027160 .sr(1)
27161 .m(1)
27162 .n(8)
27163 .k(8)
27164 .cm_stride(11)
Zhi An Nge96b6bc2022-02-03 10:49:46 -080027165 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027166 }
27167#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
27168
27169
27170#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027171 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_eq_8) {
27172 TEST_REQUIRES_ARM_NEON;
27173 GemmMicrokernelTester()
27174 .mr(2)
27175 .nr(8)
27176 .kr(1)
27177 .sr(1)
27178 .m(2)
27179 .n(8)
27180 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080027181 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027182 }
27183
27184 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, strided_cn) {
27185 TEST_REQUIRES_ARM_NEON;
27186 GemmMicrokernelTester()
27187 .mr(2)
27188 .nr(8)
27189 .kr(1)
27190 .sr(1)
27191 .m(2)
27192 .n(8)
27193 .k(8)
27194 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080027195 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027196 }
27197
27198 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile) {
27199 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080027200 for (uint32_t n = 1; n <= 8; n++) {
27201 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027202 GemmMicrokernelTester()
27203 .mr(2)
27204 .nr(8)
27205 .kr(1)
27206 .sr(1)
27207 .m(m)
27208 .n(n)
27209 .k(8)
27210 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027211 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027212 }
27213 }
27214 }
27215
27216 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_m) {
27217 TEST_REQUIRES_ARM_NEON;
27218 for (uint32_t m = 1; m <= 2; m++) {
27219 GemmMicrokernelTester()
27220 .mr(2)
27221 .nr(8)
27222 .kr(1)
27223 .sr(1)
27224 .m(m)
27225 .n(8)
27226 .k(8)
27227 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027228 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027229 }
27230 }
27231
27232 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_n) {
27233 TEST_REQUIRES_ARM_NEON;
27234 for (uint32_t n = 1; n <= 8; n++) {
27235 GemmMicrokernelTester()
27236 .mr(2)
27237 .nr(8)
27238 .kr(1)
27239 .sr(1)
27240 .m(2)
27241 .n(n)
27242 .k(8)
27243 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027244 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027245 }
27246 }
27247
27248 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_lt_8) {
27249 TEST_REQUIRES_ARM_NEON;
27250 for (size_t k = 1; k < 8; k++) {
27251 GemmMicrokernelTester()
27252 .mr(2)
27253 .nr(8)
27254 .kr(1)
27255 .sr(1)
27256 .m(2)
27257 .n(8)
27258 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027259 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027260 }
27261 }
27262
27263 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_lt_8_subtile) {
27264 TEST_REQUIRES_ARM_NEON;
27265 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027266 for (uint32_t n = 1; n <= 8; n++) {
27267 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027268 GemmMicrokernelTester()
27269 .mr(2)
27270 .nr(8)
27271 .kr(1)
27272 .sr(1)
27273 .m(m)
27274 .n(n)
27275 .k(k)
27276 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027277 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027278 }
27279 }
27280 }
27281 }
27282
27283 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_gt_8) {
27284 TEST_REQUIRES_ARM_NEON;
27285 for (size_t k = 9; k < 16; k++) {
27286 GemmMicrokernelTester()
27287 .mr(2)
27288 .nr(8)
27289 .kr(1)
27290 .sr(1)
27291 .m(2)
27292 .n(8)
27293 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027294 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027295 }
27296 }
27297
27298 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_gt_8_subtile) {
27299 TEST_REQUIRES_ARM_NEON;
27300 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027301 for (uint32_t n = 1; n <= 8; n++) {
27302 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027303 GemmMicrokernelTester()
27304 .mr(2)
27305 .nr(8)
27306 .kr(1)
27307 .sr(1)
27308 .m(m)
27309 .n(n)
27310 .k(k)
27311 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027312 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027313 }
27314 }
27315 }
27316 }
27317
27318 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_div_8) {
27319 TEST_REQUIRES_ARM_NEON;
27320 for (size_t k = 16; k <= 80; k += 8) {
27321 GemmMicrokernelTester()
27322 .mr(2)
27323 .nr(8)
27324 .kr(1)
27325 .sr(1)
27326 .m(2)
27327 .n(8)
27328 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027329 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027330 }
27331 }
27332
27333 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, k_div_8_subtile) {
27334 TEST_REQUIRES_ARM_NEON;
27335 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027336 for (uint32_t n = 1; n <= 8; n++) {
27337 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027338 GemmMicrokernelTester()
27339 .mr(2)
27340 .nr(8)
27341 .kr(1)
27342 .sr(1)
27343 .m(m)
27344 .n(n)
27345 .k(k)
27346 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027347 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027348 }
27349 }
27350 }
27351 }
27352
27353 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, n_gt_8) {
27354 TEST_REQUIRES_ARM_NEON;
27355 for (uint32_t n = 9; n < 16; n++) {
27356 for (size_t k = 1; k <= 40; k += 9) {
27357 GemmMicrokernelTester()
27358 .mr(2)
27359 .nr(8)
27360 .kr(1)
27361 .sr(1)
27362 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027363 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027364 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027365 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027366 }
27367 }
27368 }
27369
27370 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, n_gt_8_strided_cn) {
27371 TEST_REQUIRES_ARM_NEON;
27372 for (uint32_t n = 9; n < 16; n++) {
27373 for (size_t k = 1; k <= 40; k += 9) {
27374 GemmMicrokernelTester()
27375 .mr(2)
27376 .nr(8)
27377 .kr(1)
27378 .sr(1)
27379 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027380 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027381 .k(k)
27382 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080027383 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027384 }
27385 }
27386 }
27387
27388 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, n_gt_8_subtile) {
27389 TEST_REQUIRES_ARM_NEON;
27390 for (uint32_t n = 9; n < 16; n++) {
27391 for (size_t k = 1; k <= 40; k += 9) {
27392 for (uint32_t m = 1; m <= 2; m++) {
27393 GemmMicrokernelTester()
27394 .mr(2)
27395 .nr(8)
27396 .kr(1)
27397 .sr(1)
27398 .m(m)
27399 .n(n)
27400 .k(k)
27401 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027402 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027403 }
27404 }
27405 }
27406 }
27407
27408 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, n_div_8) {
27409 TEST_REQUIRES_ARM_NEON;
27410 for (uint32_t n = 16; n <= 24; n += 8) {
27411 for (size_t k = 1; k <= 40; k += 9) {
27412 GemmMicrokernelTester()
27413 .mr(2)
27414 .nr(8)
27415 .kr(1)
27416 .sr(1)
27417 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027418 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027419 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027420 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027421 }
27422 }
27423 }
27424
27425 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, n_div_8_strided_cn) {
27426 TEST_REQUIRES_ARM_NEON;
27427 for (uint32_t n = 16; n <= 24; n += 8) {
27428 for (size_t k = 1; k <= 40; k += 9) {
27429 GemmMicrokernelTester()
27430 .mr(2)
27431 .nr(8)
27432 .kr(1)
27433 .sr(1)
27434 .m(2)
27435 .n(n)
27436 .k(k)
27437 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080027438 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027439 }
27440 }
27441 }
27442
27443 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, n_div_8_subtile) {
27444 TEST_REQUIRES_ARM_NEON;
27445 for (uint32_t n = 16; n <= 24; n += 8) {
27446 for (size_t k = 1; k <= 40; k += 9) {
27447 for (uint32_t m = 1; m <= 2; m++) {
27448 GemmMicrokernelTester()
27449 .mr(2)
27450 .nr(8)
27451 .kr(1)
27452 .sr(1)
27453 .m(m)
27454 .n(n)
27455 .k(k)
27456 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027457 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027458 }
27459 }
27460 }
27461 }
27462
27463 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, small_kernel) {
27464 TEST_REQUIRES_ARM_NEON;
27465 for (size_t k = 1; k <= 40; k += 9) {
27466 GemmMicrokernelTester()
27467 .mr(2)
27468 .nr(8)
27469 .kr(1)
27470 .sr(1)
27471 .m(2)
27472 .n(8)
27473 .k(k)
27474 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080027475 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027476 }
27477 }
27478
27479 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, small_kernel_subtile) {
27480 TEST_REQUIRES_ARM_NEON;
27481 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027482 for (uint32_t n = 1; n <= 8; n++) {
27483 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027484 GemmMicrokernelTester()
27485 .mr(2)
27486 .nr(8)
27487 .kr(1)
27488 .sr(1)
27489 .m(m)
27490 .n(n)
27491 .k(k)
27492 .ks(3)
27493 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027494 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027495 }
27496 }
27497 }
27498 }
27499
27500 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, n_gt_8_small_kernel) {
27501 TEST_REQUIRES_ARM_NEON;
27502 for (uint32_t n = 9; n < 16; n++) {
27503 for (size_t k = 1; k <= 40; k += 9) {
27504 GemmMicrokernelTester()
27505 .mr(2)
27506 .nr(8)
27507 .kr(1)
27508 .sr(1)
27509 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027510 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027511 .k(k)
27512 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080027513 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027514 }
27515 }
27516 }
27517
27518 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, n_div_8_small_kernel) {
27519 TEST_REQUIRES_ARM_NEON;
27520 for (uint32_t n = 16; n <= 24; n += 8) {
27521 for (size_t k = 1; k <= 40; k += 9) {
27522 GemmMicrokernelTester()
27523 .mr(2)
27524 .nr(8)
27525 .kr(1)
27526 .sr(1)
27527 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027528 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027529 .k(k)
27530 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080027531 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027532 }
27533 }
27534 }
27535
27536 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, strided_cm_subtile) {
27537 TEST_REQUIRES_ARM_NEON;
27538 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027539 for (uint32_t n = 1; n <= 8; n++) {
27540 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027541 GemmMicrokernelTester()
27542 .mr(2)
27543 .nr(8)
27544 .kr(1)
27545 .sr(1)
27546 .m(m)
27547 .n(n)
27548 .k(k)
27549 .cm_stride(11)
27550 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027551 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027552 }
27553 }
27554 }
27555 }
27556
27557 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, a_offset) {
27558 TEST_REQUIRES_ARM_NEON;
27559 for (size_t k = 1; k <= 40; k += 9) {
27560 GemmMicrokernelTester()
27561 .mr(2)
27562 .nr(8)
27563 .kr(1)
27564 .sr(1)
27565 .m(2)
27566 .n(8)
27567 .k(k)
27568 .ks(3)
27569 .a_offset(83)
Marat Dukhan50323b82022-01-11 00:12:01 -080027570 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027571 }
27572 }
27573
27574 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, zero) {
27575 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080027576 for (size_t k = 1; k <= 40; k += 9) {
27577 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027578 GemmMicrokernelTester()
27579 .mr(2)
27580 .nr(8)
27581 .kr(1)
27582 .sr(1)
27583 .m(2)
27584 .n(8)
27585 .k(k)
27586 .ks(3)
27587 .a_offset(83)
27588 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080027589 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027590 }
27591 }
27592 }
27593
27594 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, qmin) {
27595 TEST_REQUIRES_ARM_NEON;
27596 GemmMicrokernelTester()
27597 .mr(2)
27598 .nr(8)
27599 .kr(1)
27600 .sr(1)
27601 .m(2)
27602 .n(8)
27603 .k(8)
27604 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080027605 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027606 }
27607
27608 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, qmax) {
27609 TEST_REQUIRES_ARM_NEON;
27610 GemmMicrokernelTester()
27611 .mr(2)
27612 .nr(8)
27613 .kr(1)
27614 .sr(1)
27615 .m(2)
27616 .n(8)
27617 .k(8)
27618 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080027619 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027620 }
27621
27622 TEST(QS8_IGEMM_MINMAX_RNDNU_2X8__NEON_MLAL_LANE_PRFM, strided_cm) {
27623 TEST_REQUIRES_ARM_NEON;
27624 GemmMicrokernelTester()
27625 .mr(2)
27626 .nr(8)
27627 .kr(1)
27628 .sr(1)
27629 .m(2)
27630 .n(8)
27631 .k(8)
27632 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080027633 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027634 }
27635#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
27636
27637
27638#if XNN_ARCH_ARM || XNN_ARCH_ARM64
27639 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_eq_8) {
27640 TEST_REQUIRES_ARM_NEON;
27641 GemmMicrokernelTester()
27642 .mr(4)
27643 .nr(8)
27644 .kr(1)
27645 .sr(1)
27646 .m(4)
27647 .n(8)
27648 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080027649 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027650 }
27651
27652 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, strided_cn) {
27653 TEST_REQUIRES_ARM_NEON;
27654 GemmMicrokernelTester()
27655 .mr(4)
27656 .nr(8)
27657 .kr(1)
27658 .sr(1)
27659 .m(4)
27660 .n(8)
27661 .k(8)
27662 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080027663 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027664 }
27665
27666 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile) {
27667 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080027668 for (uint32_t n = 1; n <= 8; n++) {
27669 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027670 GemmMicrokernelTester()
27671 .mr(4)
27672 .nr(8)
27673 .kr(1)
27674 .sr(1)
27675 .m(m)
27676 .n(n)
27677 .k(8)
27678 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027679 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027680 }
27681 }
27682 }
27683
27684 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_m) {
27685 TEST_REQUIRES_ARM_NEON;
27686 for (uint32_t m = 1; m <= 4; m++) {
27687 GemmMicrokernelTester()
27688 .mr(4)
27689 .nr(8)
27690 .kr(1)
27691 .sr(1)
27692 .m(m)
27693 .n(8)
27694 .k(8)
27695 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027696 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027697 }
27698 }
27699
27700 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_n) {
27701 TEST_REQUIRES_ARM_NEON;
27702 for (uint32_t n = 1; n <= 8; n++) {
27703 GemmMicrokernelTester()
27704 .mr(4)
27705 .nr(8)
27706 .kr(1)
27707 .sr(1)
27708 .m(4)
27709 .n(n)
27710 .k(8)
27711 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027712 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027713 }
27714 }
27715
27716 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_lt_8) {
27717 TEST_REQUIRES_ARM_NEON;
27718 for (size_t k = 1; k < 8; k++) {
27719 GemmMicrokernelTester()
27720 .mr(4)
27721 .nr(8)
27722 .kr(1)
27723 .sr(1)
27724 .m(4)
27725 .n(8)
27726 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027727 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027728 }
27729 }
27730
27731 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_lt_8_subtile) {
27732 TEST_REQUIRES_ARM_NEON;
27733 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027734 for (uint32_t n = 1; n <= 8; n++) {
27735 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027736 GemmMicrokernelTester()
27737 .mr(4)
27738 .nr(8)
27739 .kr(1)
27740 .sr(1)
27741 .m(m)
27742 .n(n)
27743 .k(k)
27744 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027745 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027746 }
27747 }
27748 }
27749 }
27750
27751 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_gt_8) {
27752 TEST_REQUIRES_ARM_NEON;
27753 for (size_t k = 9; k < 16; k++) {
27754 GemmMicrokernelTester()
27755 .mr(4)
27756 .nr(8)
27757 .kr(1)
27758 .sr(1)
27759 .m(4)
27760 .n(8)
27761 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027762 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027763 }
27764 }
27765
27766 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_gt_8_subtile) {
27767 TEST_REQUIRES_ARM_NEON;
27768 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027769 for (uint32_t n = 1; n <= 8; n++) {
27770 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027771 GemmMicrokernelTester()
27772 .mr(4)
27773 .nr(8)
27774 .kr(1)
27775 .sr(1)
27776 .m(m)
27777 .n(n)
27778 .k(k)
27779 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027780 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027781 }
27782 }
27783 }
27784 }
27785
27786 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_div_8) {
27787 TEST_REQUIRES_ARM_NEON;
27788 for (size_t k = 16; k <= 80; k += 8) {
27789 GemmMicrokernelTester()
27790 .mr(4)
27791 .nr(8)
27792 .kr(1)
27793 .sr(1)
27794 .m(4)
27795 .n(8)
27796 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027797 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027798 }
27799 }
27800
27801 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, k_div_8_subtile) {
27802 TEST_REQUIRES_ARM_NEON;
27803 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027804 for (uint32_t n = 1; n <= 8; n++) {
27805 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027806 GemmMicrokernelTester()
27807 .mr(4)
27808 .nr(8)
27809 .kr(1)
27810 .sr(1)
27811 .m(m)
27812 .n(n)
27813 .k(k)
27814 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027815 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027816 }
27817 }
27818 }
27819 }
27820
27821 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, n_gt_8) {
27822 TEST_REQUIRES_ARM_NEON;
27823 for (uint32_t n = 9; n < 16; n++) {
27824 for (size_t k = 1; k <= 40; k += 9) {
27825 GemmMicrokernelTester()
27826 .mr(4)
27827 .nr(8)
27828 .kr(1)
27829 .sr(1)
27830 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027831 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027832 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027833 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027834 }
27835 }
27836 }
27837
27838 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, n_gt_8_strided_cn) {
27839 TEST_REQUIRES_ARM_NEON;
27840 for (uint32_t n = 9; n < 16; n++) {
27841 for (size_t k = 1; k <= 40; k += 9) {
27842 GemmMicrokernelTester()
27843 .mr(4)
27844 .nr(8)
27845 .kr(1)
27846 .sr(1)
27847 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027848 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027849 .k(k)
27850 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080027851 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027852 }
27853 }
27854 }
27855
27856 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, n_gt_8_subtile) {
27857 TEST_REQUIRES_ARM_NEON;
27858 for (uint32_t n = 9; n < 16; n++) {
27859 for (size_t k = 1; k <= 40; k += 9) {
27860 for (uint32_t m = 1; m <= 4; m++) {
27861 GemmMicrokernelTester()
27862 .mr(4)
27863 .nr(8)
27864 .kr(1)
27865 .sr(1)
27866 .m(m)
27867 .n(n)
27868 .k(k)
27869 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027870 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027871 }
27872 }
27873 }
27874 }
27875
27876 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, n_div_8) {
27877 TEST_REQUIRES_ARM_NEON;
27878 for (uint32_t n = 16; n <= 24; n += 8) {
27879 for (size_t k = 1; k <= 40; k += 9) {
27880 GemmMicrokernelTester()
27881 .mr(4)
27882 .nr(8)
27883 .kr(1)
27884 .sr(1)
27885 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027886 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027887 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080027888 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027889 }
27890 }
27891 }
27892
27893 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, n_div_8_strided_cn) {
27894 TEST_REQUIRES_ARM_NEON;
27895 for (uint32_t n = 16; n <= 24; n += 8) {
27896 for (size_t k = 1; k <= 40; k += 9) {
27897 GemmMicrokernelTester()
27898 .mr(4)
27899 .nr(8)
27900 .kr(1)
27901 .sr(1)
27902 .m(4)
27903 .n(n)
27904 .k(k)
27905 .cn_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080027906 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027907 }
27908 }
27909 }
27910
27911 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, n_div_8_subtile) {
27912 TEST_REQUIRES_ARM_NEON;
27913 for (uint32_t n = 16; n <= 24; n += 8) {
27914 for (size_t k = 1; k <= 40; k += 9) {
27915 for (uint32_t m = 1; m <= 4; m++) {
27916 GemmMicrokernelTester()
27917 .mr(4)
27918 .nr(8)
27919 .kr(1)
27920 .sr(1)
27921 .m(m)
27922 .n(n)
27923 .k(k)
27924 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027925 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027926 }
27927 }
27928 }
27929 }
27930
27931 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, small_kernel) {
27932 TEST_REQUIRES_ARM_NEON;
27933 for (size_t k = 1; k <= 40; k += 9) {
27934 GemmMicrokernelTester()
27935 .mr(4)
27936 .nr(8)
27937 .kr(1)
27938 .sr(1)
27939 .m(4)
27940 .n(8)
27941 .k(k)
27942 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080027943 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027944 }
27945 }
27946
27947 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, small_kernel_subtile) {
27948 TEST_REQUIRES_ARM_NEON;
27949 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080027950 for (uint32_t n = 1; n <= 8; n++) {
27951 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027952 GemmMicrokernelTester()
27953 .mr(4)
27954 .nr(8)
27955 .kr(1)
27956 .sr(1)
27957 .m(m)
27958 .n(n)
27959 .k(k)
27960 .ks(3)
27961 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080027962 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027963 }
27964 }
27965 }
27966 }
27967
27968 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, n_gt_8_small_kernel) {
27969 TEST_REQUIRES_ARM_NEON;
27970 for (uint32_t n = 9; n < 16; n++) {
27971 for (size_t k = 1; k <= 40; k += 9) {
27972 GemmMicrokernelTester()
27973 .mr(4)
27974 .nr(8)
27975 .kr(1)
27976 .sr(1)
27977 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027978 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027979 .k(k)
27980 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080027981 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027982 }
27983 }
27984 }
27985
27986 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, n_div_8_small_kernel) {
27987 TEST_REQUIRES_ARM_NEON;
27988 for (uint32_t n = 16; n <= 24; n += 8) {
27989 for (size_t k = 1; k <= 40; k += 9) {
27990 GemmMicrokernelTester()
27991 .mr(4)
27992 .nr(8)
27993 .kr(1)
27994 .sr(1)
27995 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080027996 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080027997 .k(k)
27998 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080027999 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028000 }
28001 }
28002 }
28003
28004 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, strided_cm_subtile) {
28005 TEST_REQUIRES_ARM_NEON;
28006 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080028007 for (uint32_t n = 1; n <= 8; n++) {
28008 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028009 GemmMicrokernelTester()
28010 .mr(4)
28011 .nr(8)
28012 .kr(1)
28013 .sr(1)
28014 .m(m)
28015 .n(n)
28016 .k(k)
28017 .cm_stride(11)
28018 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028019 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028020 }
28021 }
28022 }
28023 }
28024
28025 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, a_offset) {
28026 TEST_REQUIRES_ARM_NEON;
28027 for (size_t k = 1; k <= 40; k += 9) {
28028 GemmMicrokernelTester()
28029 .mr(4)
28030 .nr(8)
28031 .kr(1)
28032 .sr(1)
28033 .m(4)
28034 .n(8)
28035 .k(k)
28036 .ks(3)
28037 .a_offset(163)
Marat Dukhan50323b82022-01-11 00:12:01 -080028038 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028039 }
28040 }
28041
28042 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, zero) {
28043 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080028044 for (size_t k = 1; k <= 40; k += 9) {
28045 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028046 GemmMicrokernelTester()
28047 .mr(4)
28048 .nr(8)
28049 .kr(1)
28050 .sr(1)
28051 .m(4)
28052 .n(8)
28053 .k(k)
28054 .ks(3)
28055 .a_offset(163)
28056 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080028057 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028058 }
28059 }
28060 }
28061
28062 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, qmin) {
28063 TEST_REQUIRES_ARM_NEON;
28064 GemmMicrokernelTester()
28065 .mr(4)
28066 .nr(8)
28067 .kr(1)
28068 .sr(1)
28069 .m(4)
28070 .n(8)
28071 .k(8)
28072 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080028073 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028074 }
28075
28076 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, qmax) {
28077 TEST_REQUIRES_ARM_NEON;
28078 GemmMicrokernelTester()
28079 .mr(4)
28080 .nr(8)
28081 .kr(1)
28082 .sr(1)
28083 .m(4)
28084 .n(8)
28085 .k(8)
28086 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080028087 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028088 }
28089
28090 TEST(QS8_IGEMM_MINMAX_RNDNU_4X8__NEON_MLAL_LANE_PRFM, strided_cm) {
28091 TEST_REQUIRES_ARM_NEON;
28092 GemmMicrokernelTester()
28093 .mr(4)
28094 .nr(8)
28095 .kr(1)
28096 .sr(1)
28097 .m(4)
28098 .n(8)
28099 .k(8)
28100 .cm_stride(11)
Marat Dukhan50323b82022-01-11 00:12:01 -080028101 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x8__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028102 }
28103#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
28104
28105
28106#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028107 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_eq_8) {
28108 TEST_REQUIRES_ARM_NEON;
28109 GemmMicrokernelTester()
28110 .mr(3)
28111 .nr(16)
28112 .kr(1)
28113 .sr(1)
28114 .m(3)
28115 .n(16)
28116 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080028117 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028118 }
28119
28120 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, strided_cn) {
28121 TEST_REQUIRES_ARM_NEON;
28122 GemmMicrokernelTester()
28123 .mr(3)
28124 .nr(16)
28125 .kr(1)
28126 .sr(1)
28127 .m(3)
28128 .n(16)
28129 .k(8)
28130 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080028131 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028132 }
28133
28134 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_eq_8_subtile) {
28135 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080028136 for (uint32_t n = 1; n <= 16; n++) {
28137 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028138 GemmMicrokernelTester()
28139 .mr(3)
28140 .nr(16)
28141 .kr(1)
28142 .sr(1)
28143 .m(m)
28144 .n(n)
28145 .k(8)
28146 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028147 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028148 }
28149 }
28150 }
28151
28152 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_m) {
28153 TEST_REQUIRES_ARM_NEON;
28154 for (uint32_t m = 1; m <= 3; m++) {
28155 GemmMicrokernelTester()
28156 .mr(3)
28157 .nr(16)
28158 .kr(1)
28159 .sr(1)
28160 .m(m)
28161 .n(16)
28162 .k(8)
28163 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028164 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028165 }
28166 }
28167
28168 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_n) {
28169 TEST_REQUIRES_ARM_NEON;
28170 for (uint32_t n = 1; n <= 16; n++) {
28171 GemmMicrokernelTester()
28172 .mr(3)
28173 .nr(16)
28174 .kr(1)
28175 .sr(1)
28176 .m(3)
28177 .n(n)
28178 .k(8)
28179 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028180 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028181 }
28182 }
28183
28184 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_lt_8) {
28185 TEST_REQUIRES_ARM_NEON;
28186 for (size_t k = 1; k < 8; k++) {
28187 GemmMicrokernelTester()
28188 .mr(3)
28189 .nr(16)
28190 .kr(1)
28191 .sr(1)
28192 .m(3)
28193 .n(16)
28194 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080028195 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028196 }
28197 }
28198
28199 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_lt_8_subtile) {
28200 TEST_REQUIRES_ARM_NEON;
28201 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080028202 for (uint32_t n = 1; n <= 16; n++) {
28203 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028204 GemmMicrokernelTester()
28205 .mr(3)
28206 .nr(16)
28207 .kr(1)
28208 .sr(1)
28209 .m(m)
28210 .n(n)
28211 .k(k)
28212 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028213 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028214 }
28215 }
28216 }
28217 }
28218
28219 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_gt_8) {
28220 TEST_REQUIRES_ARM_NEON;
28221 for (size_t k = 9; k < 16; k++) {
28222 GemmMicrokernelTester()
28223 .mr(3)
28224 .nr(16)
28225 .kr(1)
28226 .sr(1)
28227 .m(3)
28228 .n(16)
28229 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080028230 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028231 }
28232 }
28233
28234 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_gt_8_subtile) {
28235 TEST_REQUIRES_ARM_NEON;
28236 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080028237 for (uint32_t n = 1; n <= 16; n++) {
28238 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028239 GemmMicrokernelTester()
28240 .mr(3)
28241 .nr(16)
28242 .kr(1)
28243 .sr(1)
28244 .m(m)
28245 .n(n)
28246 .k(k)
28247 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028248 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028249 }
28250 }
28251 }
28252 }
28253
28254 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_div_8) {
28255 TEST_REQUIRES_ARM_NEON;
28256 for (size_t k = 16; k <= 80; k += 8) {
28257 GemmMicrokernelTester()
28258 .mr(3)
28259 .nr(16)
28260 .kr(1)
28261 .sr(1)
28262 .m(3)
28263 .n(16)
28264 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080028265 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028266 }
28267 }
28268
28269 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, k_div_8_subtile) {
28270 TEST_REQUIRES_ARM_NEON;
28271 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080028272 for (uint32_t n = 1; n <= 16; n++) {
28273 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028274 GemmMicrokernelTester()
28275 .mr(3)
28276 .nr(16)
28277 .kr(1)
28278 .sr(1)
28279 .m(m)
28280 .n(n)
28281 .k(k)
28282 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028283 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028284 }
28285 }
28286 }
28287 }
28288
28289 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, n_gt_16) {
28290 TEST_REQUIRES_ARM_NEON;
28291 for (uint32_t n = 17; n < 32; n++) {
28292 for (size_t k = 1; k <= 40; k += 9) {
28293 GemmMicrokernelTester()
28294 .mr(3)
28295 .nr(16)
28296 .kr(1)
28297 .sr(1)
28298 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080028299 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028300 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080028301 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028302 }
28303 }
28304 }
28305
28306 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, n_gt_16_strided_cn) {
28307 TEST_REQUIRES_ARM_NEON;
28308 for (uint32_t n = 17; n < 32; n++) {
28309 for (size_t k = 1; k <= 40; k += 9) {
28310 GemmMicrokernelTester()
28311 .mr(3)
28312 .nr(16)
28313 .kr(1)
28314 .sr(1)
28315 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080028316 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028317 .k(k)
28318 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080028319 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028320 }
28321 }
28322 }
28323
28324 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, n_gt_16_subtile) {
28325 TEST_REQUIRES_ARM_NEON;
28326 for (uint32_t n = 17; n < 32; n++) {
28327 for (size_t k = 1; k <= 40; k += 9) {
28328 for (uint32_t m = 1; m <= 3; m++) {
28329 GemmMicrokernelTester()
28330 .mr(3)
28331 .nr(16)
28332 .kr(1)
28333 .sr(1)
28334 .m(m)
28335 .n(n)
28336 .k(k)
28337 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028338 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028339 }
28340 }
28341 }
28342 }
28343
28344 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, n_div_16) {
28345 TEST_REQUIRES_ARM_NEON;
28346 for (uint32_t n = 32; n <= 48; n += 16) {
28347 for (size_t k = 1; k <= 40; k += 9) {
28348 GemmMicrokernelTester()
28349 .mr(3)
28350 .nr(16)
28351 .kr(1)
28352 .sr(1)
28353 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080028354 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028355 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080028356 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028357 }
28358 }
28359 }
28360
28361 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, n_div_16_strided_cn) {
28362 TEST_REQUIRES_ARM_NEON;
28363 for (uint32_t n = 32; n <= 48; n += 16) {
28364 for (size_t k = 1; k <= 40; k += 9) {
28365 GemmMicrokernelTester()
28366 .mr(3)
28367 .nr(16)
28368 .kr(1)
28369 .sr(1)
28370 .m(3)
28371 .n(n)
28372 .k(k)
28373 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080028374 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028375 }
28376 }
28377 }
28378
28379 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, n_div_16_subtile) {
28380 TEST_REQUIRES_ARM_NEON;
28381 for (uint32_t n = 32; n <= 48; n += 16) {
28382 for (size_t k = 1; k <= 40; k += 9) {
28383 for (uint32_t m = 1; m <= 3; m++) {
28384 GemmMicrokernelTester()
28385 .mr(3)
28386 .nr(16)
28387 .kr(1)
28388 .sr(1)
28389 .m(m)
28390 .n(n)
28391 .k(k)
28392 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028393 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028394 }
28395 }
28396 }
28397 }
28398
28399 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, small_kernel) {
28400 TEST_REQUIRES_ARM_NEON;
28401 for (size_t k = 1; k <= 40; k += 9) {
28402 GemmMicrokernelTester()
28403 .mr(3)
28404 .nr(16)
28405 .kr(1)
28406 .sr(1)
28407 .m(3)
28408 .n(16)
28409 .k(k)
28410 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080028411 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028412 }
28413 }
28414
28415 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, small_kernel_subtile) {
28416 TEST_REQUIRES_ARM_NEON;
28417 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080028418 for (uint32_t n = 1; n <= 16; n++) {
28419 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028420 GemmMicrokernelTester()
28421 .mr(3)
28422 .nr(16)
28423 .kr(1)
28424 .sr(1)
28425 .m(m)
28426 .n(n)
28427 .k(k)
28428 .ks(3)
28429 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028430 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028431 }
28432 }
28433 }
28434 }
28435
28436 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, n_gt_16_small_kernel) {
28437 TEST_REQUIRES_ARM_NEON;
28438 for (uint32_t n = 17; n < 32; n++) {
28439 for (size_t k = 1; k <= 40; k += 9) {
28440 GemmMicrokernelTester()
28441 .mr(3)
28442 .nr(16)
28443 .kr(1)
28444 .sr(1)
28445 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080028446 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028447 .k(k)
28448 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080028449 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028450 }
28451 }
28452 }
28453
28454 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, n_div_16_small_kernel) {
28455 TEST_REQUIRES_ARM_NEON;
28456 for (uint32_t n = 32; n <= 48; n += 16) {
28457 for (size_t k = 1; k <= 40; k += 9) {
28458 GemmMicrokernelTester()
28459 .mr(3)
28460 .nr(16)
28461 .kr(1)
28462 .sr(1)
28463 .m(3)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080028464 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028465 .k(k)
28466 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080028467 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028468 }
28469 }
28470 }
28471
28472 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, strided_cm_subtile) {
28473 TEST_REQUIRES_ARM_NEON;
28474 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080028475 for (uint32_t n = 1; n <= 16; n++) {
28476 for (uint32_t m = 1; m <= 3; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028477 GemmMicrokernelTester()
28478 .mr(3)
28479 .nr(16)
28480 .kr(1)
28481 .sr(1)
28482 .m(m)
28483 .n(n)
28484 .k(k)
28485 .cm_stride(19)
28486 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080028487 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028488 }
28489 }
28490 }
28491 }
28492
28493 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, a_offset) {
28494 TEST_REQUIRES_ARM_NEON;
28495 for (size_t k = 1; k <= 40; k += 9) {
28496 GemmMicrokernelTester()
28497 .mr(3)
28498 .nr(16)
28499 .kr(1)
28500 .sr(1)
28501 .m(3)
28502 .n(16)
28503 .k(k)
28504 .ks(3)
28505 .a_offset(127)
Marat Dukhan50323b82022-01-11 00:12:01 -080028506 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028507 }
28508 }
28509
28510 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, zero) {
28511 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080028512 for (size_t k = 1; k <= 40; k += 9) {
28513 for (uint32_t mz = 0; mz < 3; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028514 GemmMicrokernelTester()
28515 .mr(3)
28516 .nr(16)
28517 .kr(1)
28518 .sr(1)
28519 .m(3)
28520 .n(16)
28521 .k(k)
28522 .ks(3)
28523 .a_offset(127)
28524 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080028525 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028526 }
28527 }
28528 }
28529
28530 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, qmin) {
28531 TEST_REQUIRES_ARM_NEON;
28532 GemmMicrokernelTester()
28533 .mr(3)
28534 .nr(16)
28535 .kr(1)
28536 .sr(1)
28537 .m(3)
28538 .n(16)
28539 .k(8)
28540 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080028541 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028542 }
28543
28544 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, qmax) {
28545 TEST_REQUIRES_ARM_NEON;
28546 GemmMicrokernelTester()
28547 .mr(3)
28548 .nr(16)
28549 .kr(1)
28550 .sr(1)
28551 .m(3)
28552 .n(16)
28553 .k(8)
28554 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080028555 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028556 }
28557
28558 TEST(QS8_IGEMM_MINMAX_RNDNU_3X16__NEON_MLAL_LANE_PRFM, strided_cm) {
28559 TEST_REQUIRES_ARM_NEON;
28560 GemmMicrokernelTester()
28561 .mr(3)
28562 .nr(16)
28563 .kr(1)
28564 .sr(1)
28565 .m(3)
28566 .n(16)
28567 .k(8)
28568 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080028569 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_3x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080028570 }
28571#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
28572
28573
28574#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Nge96b6bc2022-02-03 10:49:46 -080028575 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_eq_8) {
28576 TEST_REQUIRES_ARM_NEON;
28577 GemmMicrokernelTester()
28578 .mr(4)
28579 .nr(16)
28580 .kr(1)
28581 .sr(1)
28582 .m(4)
28583 .n(16)
28584 .k(8)
28585 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28586 }
28587
28588 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, strided_cn) {
28589 TEST_REQUIRES_ARM_NEON;
28590 GemmMicrokernelTester()
28591 .mr(4)
28592 .nr(16)
28593 .kr(1)
28594 .sr(1)
28595 .m(4)
28596 .n(16)
28597 .k(8)
28598 .cn_stride(19)
28599 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28600 }
28601
28602 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_eq_8_subtile) {
28603 TEST_REQUIRES_ARM_NEON;
28604 for (uint32_t n = 1; n <= 16; n++) {
28605 for (uint32_t m = 1; m <= 4; m++) {
28606 GemmMicrokernelTester()
28607 .mr(4)
28608 .nr(16)
28609 .kr(1)
28610 .sr(1)
28611 .m(m)
28612 .n(n)
28613 .k(8)
28614 .iterations(1)
28615 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28616 }
28617 }
28618 }
28619
28620 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_m) {
28621 TEST_REQUIRES_ARM_NEON;
28622 for (uint32_t m = 1; m <= 4; m++) {
28623 GemmMicrokernelTester()
28624 .mr(4)
28625 .nr(16)
28626 .kr(1)
28627 .sr(1)
28628 .m(m)
28629 .n(16)
28630 .k(8)
28631 .iterations(1)
28632 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28633 }
28634 }
28635
28636 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_eq_8_subtile_n) {
28637 TEST_REQUIRES_ARM_NEON;
28638 for (uint32_t n = 1; n <= 16; n++) {
28639 GemmMicrokernelTester()
28640 .mr(4)
28641 .nr(16)
28642 .kr(1)
28643 .sr(1)
28644 .m(4)
28645 .n(n)
28646 .k(8)
28647 .iterations(1)
28648 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28649 }
28650 }
28651
28652 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_lt_8) {
28653 TEST_REQUIRES_ARM_NEON;
28654 for (size_t k = 1; k < 8; k++) {
28655 GemmMicrokernelTester()
28656 .mr(4)
28657 .nr(16)
28658 .kr(1)
28659 .sr(1)
28660 .m(4)
28661 .n(16)
28662 .k(k)
28663 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28664 }
28665 }
28666
28667 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_lt_8_subtile) {
28668 TEST_REQUIRES_ARM_NEON;
28669 for (size_t k = 1; k < 8; k++) {
28670 for (uint32_t n = 1; n <= 16; n++) {
28671 for (uint32_t m = 1; m <= 4; m++) {
28672 GemmMicrokernelTester()
28673 .mr(4)
28674 .nr(16)
28675 .kr(1)
28676 .sr(1)
28677 .m(m)
28678 .n(n)
28679 .k(k)
28680 .iterations(1)
28681 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28682 }
28683 }
28684 }
28685 }
28686
28687 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_gt_8) {
28688 TEST_REQUIRES_ARM_NEON;
28689 for (size_t k = 9; k < 16; k++) {
28690 GemmMicrokernelTester()
28691 .mr(4)
28692 .nr(16)
28693 .kr(1)
28694 .sr(1)
28695 .m(4)
28696 .n(16)
28697 .k(k)
28698 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28699 }
28700 }
28701
28702 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_gt_8_subtile) {
28703 TEST_REQUIRES_ARM_NEON;
28704 for (size_t k = 9; k < 16; k++) {
28705 for (uint32_t n = 1; n <= 16; n++) {
28706 for (uint32_t m = 1; m <= 4; m++) {
28707 GemmMicrokernelTester()
28708 .mr(4)
28709 .nr(16)
28710 .kr(1)
28711 .sr(1)
28712 .m(m)
28713 .n(n)
28714 .k(k)
28715 .iterations(1)
28716 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28717 }
28718 }
28719 }
28720 }
28721
28722 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_div_8) {
28723 TEST_REQUIRES_ARM_NEON;
28724 for (size_t k = 16; k <= 80; k += 8) {
28725 GemmMicrokernelTester()
28726 .mr(4)
28727 .nr(16)
28728 .kr(1)
28729 .sr(1)
28730 .m(4)
28731 .n(16)
28732 .k(k)
28733 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28734 }
28735 }
28736
28737 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, k_div_8_subtile) {
28738 TEST_REQUIRES_ARM_NEON;
28739 for (size_t k = 16; k <= 80; k += 8) {
28740 for (uint32_t n = 1; n <= 16; n++) {
28741 for (uint32_t m = 1; m <= 4; m++) {
28742 GemmMicrokernelTester()
28743 .mr(4)
28744 .nr(16)
28745 .kr(1)
28746 .sr(1)
28747 .m(m)
28748 .n(n)
28749 .k(k)
28750 .iterations(1)
28751 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28752 }
28753 }
28754 }
28755 }
28756
28757 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, n_gt_16) {
28758 TEST_REQUIRES_ARM_NEON;
28759 for (uint32_t n = 17; n < 32; n++) {
28760 for (size_t k = 1; k <= 40; k += 9) {
28761 GemmMicrokernelTester()
28762 .mr(4)
28763 .nr(16)
28764 .kr(1)
28765 .sr(1)
28766 .m(4)
28767 .n(n)
28768 .k(k)
28769 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28770 }
28771 }
28772 }
28773
28774 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, n_gt_16_strided_cn) {
28775 TEST_REQUIRES_ARM_NEON;
28776 for (uint32_t n = 17; n < 32; n++) {
28777 for (size_t k = 1; k <= 40; k += 9) {
28778 GemmMicrokernelTester()
28779 .mr(4)
28780 .nr(16)
28781 .kr(1)
28782 .sr(1)
28783 .m(4)
28784 .n(n)
28785 .k(k)
28786 .cn_stride(19)
28787 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28788 }
28789 }
28790 }
28791
28792 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, n_gt_16_subtile) {
28793 TEST_REQUIRES_ARM_NEON;
28794 for (uint32_t n = 17; n < 32; n++) {
28795 for (size_t k = 1; k <= 40; k += 9) {
28796 for (uint32_t m = 1; m <= 4; m++) {
28797 GemmMicrokernelTester()
28798 .mr(4)
28799 .nr(16)
28800 .kr(1)
28801 .sr(1)
28802 .m(m)
28803 .n(n)
28804 .k(k)
28805 .iterations(1)
28806 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28807 }
28808 }
28809 }
28810 }
28811
28812 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, n_div_16) {
28813 TEST_REQUIRES_ARM_NEON;
28814 for (uint32_t n = 32; n <= 48; n += 16) {
28815 for (size_t k = 1; k <= 40; k += 9) {
28816 GemmMicrokernelTester()
28817 .mr(4)
28818 .nr(16)
28819 .kr(1)
28820 .sr(1)
28821 .m(4)
28822 .n(n)
28823 .k(k)
28824 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28825 }
28826 }
28827 }
28828
28829 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, n_div_16_strided_cn) {
28830 TEST_REQUIRES_ARM_NEON;
28831 for (uint32_t n = 32; n <= 48; n += 16) {
28832 for (size_t k = 1; k <= 40; k += 9) {
28833 GemmMicrokernelTester()
28834 .mr(4)
28835 .nr(16)
28836 .kr(1)
28837 .sr(1)
28838 .m(4)
28839 .n(n)
28840 .k(k)
28841 .cn_stride(19)
28842 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28843 }
28844 }
28845 }
28846
28847 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, n_div_16_subtile) {
28848 TEST_REQUIRES_ARM_NEON;
28849 for (uint32_t n = 32; n <= 48; n += 16) {
28850 for (size_t k = 1; k <= 40; k += 9) {
28851 for (uint32_t m = 1; m <= 4; m++) {
28852 GemmMicrokernelTester()
28853 .mr(4)
28854 .nr(16)
28855 .kr(1)
28856 .sr(1)
28857 .m(m)
28858 .n(n)
28859 .k(k)
28860 .iterations(1)
28861 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28862 }
28863 }
28864 }
28865 }
28866
28867 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, small_kernel) {
28868 TEST_REQUIRES_ARM_NEON;
28869 for (size_t k = 1; k <= 40; k += 9) {
28870 GemmMicrokernelTester()
28871 .mr(4)
28872 .nr(16)
28873 .kr(1)
28874 .sr(1)
28875 .m(4)
28876 .n(16)
28877 .k(k)
28878 .ks(3)
28879 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28880 }
28881 }
28882
28883 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, small_kernel_subtile) {
28884 TEST_REQUIRES_ARM_NEON;
28885 for (size_t k = 1; k <= 40; k += 9) {
28886 for (uint32_t n = 1; n <= 16; n++) {
28887 for (uint32_t m = 1; m <= 4; m++) {
28888 GemmMicrokernelTester()
28889 .mr(4)
28890 .nr(16)
28891 .kr(1)
28892 .sr(1)
28893 .m(m)
28894 .n(n)
28895 .k(k)
28896 .ks(3)
28897 .iterations(1)
28898 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28899 }
28900 }
28901 }
28902 }
28903
28904 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, n_gt_16_small_kernel) {
28905 TEST_REQUIRES_ARM_NEON;
28906 for (uint32_t n = 17; n < 32; n++) {
28907 for (size_t k = 1; k <= 40; k += 9) {
28908 GemmMicrokernelTester()
28909 .mr(4)
28910 .nr(16)
28911 .kr(1)
28912 .sr(1)
28913 .m(4)
28914 .n(n)
28915 .k(k)
28916 .ks(3)
28917 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28918 }
28919 }
28920 }
28921
28922 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, n_div_16_small_kernel) {
28923 TEST_REQUIRES_ARM_NEON;
28924 for (uint32_t n = 32; n <= 48; n += 16) {
28925 for (size_t k = 1; k <= 40; k += 9) {
28926 GemmMicrokernelTester()
28927 .mr(4)
28928 .nr(16)
28929 .kr(1)
28930 .sr(1)
28931 .m(4)
28932 .n(n)
28933 .k(k)
28934 .ks(3)
28935 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28936 }
28937 }
28938 }
28939
28940 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, strided_cm_subtile) {
28941 TEST_REQUIRES_ARM_NEON;
28942 for (size_t k = 1; k <= 40; k += 9) {
28943 for (uint32_t n = 1; n <= 16; n++) {
28944 for (uint32_t m = 1; m <= 4; m++) {
28945 GemmMicrokernelTester()
28946 .mr(4)
28947 .nr(16)
28948 .kr(1)
28949 .sr(1)
28950 .m(m)
28951 .n(n)
28952 .k(k)
28953 .cm_stride(19)
28954 .iterations(1)
28955 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28956 }
28957 }
28958 }
28959 }
28960
28961 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, a_offset) {
28962 TEST_REQUIRES_ARM_NEON;
28963 for (size_t k = 1; k <= 40; k += 9) {
28964 GemmMicrokernelTester()
28965 .mr(4)
28966 .nr(16)
28967 .kr(1)
28968 .sr(1)
28969 .m(4)
28970 .n(16)
28971 .k(k)
28972 .ks(3)
28973 .a_offset(163)
28974 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28975 }
28976 }
28977
28978 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, zero) {
28979 TEST_REQUIRES_ARM_NEON;
28980 for (size_t k = 1; k <= 40; k += 9) {
28981 for (uint32_t mz = 0; mz < 4; mz++) {
28982 GemmMicrokernelTester()
28983 .mr(4)
28984 .nr(16)
28985 .kr(1)
28986 .sr(1)
28987 .m(4)
28988 .n(16)
28989 .k(k)
28990 .ks(3)
28991 .a_offset(163)
28992 .zero_index(mz)
28993 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
28994 }
28995 }
28996 }
28997
28998 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, qmin) {
28999 TEST_REQUIRES_ARM_NEON;
29000 GemmMicrokernelTester()
29001 .mr(4)
29002 .nr(16)
29003 .kr(1)
29004 .sr(1)
29005 .m(4)
29006 .n(16)
29007 .k(8)
29008 .qmin(128)
29009 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29010 }
29011
29012 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, qmax) {
29013 TEST_REQUIRES_ARM_NEON;
29014 GemmMicrokernelTester()
29015 .mr(4)
29016 .nr(16)
29017 .kr(1)
29018 .sr(1)
29019 .m(4)
29020 .n(16)
29021 .k(8)
29022 .qmax(128)
29023 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29024 }
29025
29026 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MLAL_LANE_PRFM, strided_cm) {
29027 TEST_REQUIRES_ARM_NEON;
29028 GemmMicrokernelTester()
29029 .mr(4)
29030 .nr(16)
29031 .kr(1)
29032 .sr(1)
29033 .m(4)
29034 .n(16)
29035 .k(8)
29036 .cm_stride(19)
29037 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mlal_lane_prfm, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29038 }
29039#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
29040
29041
29042#if XNN_ARCH_ARM || XNN_ARCH_ARM64
29043 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_eq_8) {
29044 TEST_REQUIRES_ARM_NEON;
29045 GemmMicrokernelTester()
29046 .mr(1)
29047 .nr(8)
29048 .kr(1)
29049 .sr(1)
29050 .m(1)
29051 .n(8)
29052 .k(8)
29053 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29054 }
29055
29056 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, strided_cn) {
29057 TEST_REQUIRES_ARM_NEON;
29058 GemmMicrokernelTester()
29059 .mr(1)
29060 .nr(8)
29061 .kr(1)
29062 .sr(1)
29063 .m(1)
29064 .n(8)
29065 .k(8)
29066 .cn_stride(11)
29067 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29068 }
29069
29070 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_eq_8_subtile) {
29071 TEST_REQUIRES_ARM_NEON;
29072 for (uint32_t n = 1; n <= 8; n++) {
29073 for (uint32_t m = 1; m <= 1; m++) {
29074 GemmMicrokernelTester()
29075 .mr(1)
29076 .nr(8)
29077 .kr(1)
29078 .sr(1)
29079 .m(m)
29080 .n(n)
29081 .k(8)
29082 .iterations(1)
29083 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29084 }
29085 }
29086 }
29087
29088 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_eq_8_subtile_m) {
29089 TEST_REQUIRES_ARM_NEON;
29090 for (uint32_t m = 1; m <= 1; m++) {
29091 GemmMicrokernelTester()
29092 .mr(1)
29093 .nr(8)
29094 .kr(1)
29095 .sr(1)
29096 .m(m)
29097 .n(8)
29098 .k(8)
29099 .iterations(1)
29100 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29101 }
29102 }
29103
29104 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_eq_8_subtile_n) {
29105 TEST_REQUIRES_ARM_NEON;
29106 for (uint32_t n = 1; n <= 8; n++) {
29107 GemmMicrokernelTester()
29108 .mr(1)
29109 .nr(8)
29110 .kr(1)
29111 .sr(1)
29112 .m(1)
29113 .n(n)
29114 .k(8)
29115 .iterations(1)
29116 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29117 }
29118 }
29119
29120 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_lt_8) {
29121 TEST_REQUIRES_ARM_NEON;
29122 for (size_t k = 1; k < 8; k++) {
29123 GemmMicrokernelTester()
29124 .mr(1)
29125 .nr(8)
29126 .kr(1)
29127 .sr(1)
29128 .m(1)
29129 .n(8)
29130 .k(k)
29131 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29132 }
29133 }
29134
29135 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_lt_8_subtile) {
29136 TEST_REQUIRES_ARM_NEON;
29137 for (size_t k = 1; k < 8; k++) {
29138 for (uint32_t n = 1; n <= 8; n++) {
29139 for (uint32_t m = 1; m <= 1; m++) {
29140 GemmMicrokernelTester()
29141 .mr(1)
29142 .nr(8)
29143 .kr(1)
29144 .sr(1)
29145 .m(m)
29146 .n(n)
29147 .k(k)
29148 .iterations(1)
29149 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29150 }
29151 }
29152 }
29153 }
29154
29155 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_gt_8) {
29156 TEST_REQUIRES_ARM_NEON;
29157 for (size_t k = 9; k < 16; k++) {
29158 GemmMicrokernelTester()
29159 .mr(1)
29160 .nr(8)
29161 .kr(1)
29162 .sr(1)
29163 .m(1)
29164 .n(8)
29165 .k(k)
29166 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29167 }
29168 }
29169
29170 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_gt_8_subtile) {
29171 TEST_REQUIRES_ARM_NEON;
29172 for (size_t k = 9; k < 16; k++) {
29173 for (uint32_t n = 1; n <= 8; n++) {
29174 for (uint32_t m = 1; m <= 1; m++) {
29175 GemmMicrokernelTester()
29176 .mr(1)
29177 .nr(8)
29178 .kr(1)
29179 .sr(1)
29180 .m(m)
29181 .n(n)
29182 .k(k)
29183 .iterations(1)
29184 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29185 }
29186 }
29187 }
29188 }
29189
29190 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_div_8) {
29191 TEST_REQUIRES_ARM_NEON;
29192 for (size_t k = 16; k <= 80; k += 8) {
29193 GemmMicrokernelTester()
29194 .mr(1)
29195 .nr(8)
29196 .kr(1)
29197 .sr(1)
29198 .m(1)
29199 .n(8)
29200 .k(k)
29201 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29202 }
29203 }
29204
29205 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, k_div_8_subtile) {
29206 TEST_REQUIRES_ARM_NEON;
29207 for (size_t k = 16; k <= 80; k += 8) {
29208 for (uint32_t n = 1; n <= 8; n++) {
29209 for (uint32_t m = 1; m <= 1; m++) {
29210 GemmMicrokernelTester()
29211 .mr(1)
29212 .nr(8)
29213 .kr(1)
29214 .sr(1)
29215 .m(m)
29216 .n(n)
29217 .k(k)
29218 .iterations(1)
29219 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29220 }
29221 }
29222 }
29223 }
29224
29225 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, n_gt_8) {
29226 TEST_REQUIRES_ARM_NEON;
29227 for (uint32_t n = 9; n < 16; n++) {
29228 for (size_t k = 1; k <= 40; k += 9) {
29229 GemmMicrokernelTester()
29230 .mr(1)
29231 .nr(8)
29232 .kr(1)
29233 .sr(1)
29234 .m(1)
29235 .n(n)
29236 .k(k)
29237 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29238 }
29239 }
29240 }
29241
29242 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, n_gt_8_strided_cn) {
29243 TEST_REQUIRES_ARM_NEON;
29244 for (uint32_t n = 9; n < 16; n++) {
29245 for (size_t k = 1; k <= 40; k += 9) {
29246 GemmMicrokernelTester()
29247 .mr(1)
29248 .nr(8)
29249 .kr(1)
29250 .sr(1)
29251 .m(1)
29252 .n(n)
29253 .k(k)
29254 .cn_stride(11)
29255 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29256 }
29257 }
29258 }
29259
29260 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, n_gt_8_subtile) {
29261 TEST_REQUIRES_ARM_NEON;
29262 for (uint32_t n = 9; n < 16; n++) {
29263 for (size_t k = 1; k <= 40; k += 9) {
29264 for (uint32_t m = 1; m <= 1; m++) {
29265 GemmMicrokernelTester()
29266 .mr(1)
29267 .nr(8)
29268 .kr(1)
29269 .sr(1)
29270 .m(m)
29271 .n(n)
29272 .k(k)
29273 .iterations(1)
29274 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29275 }
29276 }
29277 }
29278 }
29279
29280 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, n_div_8) {
29281 TEST_REQUIRES_ARM_NEON;
29282 for (uint32_t n = 16; n <= 24; n += 8) {
29283 for (size_t k = 1; k <= 40; k += 9) {
29284 GemmMicrokernelTester()
29285 .mr(1)
29286 .nr(8)
29287 .kr(1)
29288 .sr(1)
29289 .m(1)
29290 .n(n)
29291 .k(k)
29292 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29293 }
29294 }
29295 }
29296
29297 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, n_div_8_strided_cn) {
29298 TEST_REQUIRES_ARM_NEON;
29299 for (uint32_t n = 16; n <= 24; n += 8) {
29300 for (size_t k = 1; k <= 40; k += 9) {
29301 GemmMicrokernelTester()
29302 .mr(1)
29303 .nr(8)
29304 .kr(1)
29305 .sr(1)
29306 .m(1)
29307 .n(n)
29308 .k(k)
29309 .cn_stride(11)
29310 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29311 }
29312 }
29313 }
29314
29315 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, n_div_8_subtile) {
29316 TEST_REQUIRES_ARM_NEON;
29317 for (uint32_t n = 16; n <= 24; n += 8) {
29318 for (size_t k = 1; k <= 40; k += 9) {
29319 for (uint32_t m = 1; m <= 1; m++) {
29320 GemmMicrokernelTester()
29321 .mr(1)
29322 .nr(8)
29323 .kr(1)
29324 .sr(1)
29325 .m(m)
29326 .n(n)
29327 .k(k)
29328 .iterations(1)
29329 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29330 }
29331 }
29332 }
29333 }
29334
29335 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, small_kernel) {
29336 TEST_REQUIRES_ARM_NEON;
29337 for (size_t k = 1; k <= 40; k += 9) {
29338 GemmMicrokernelTester()
29339 .mr(1)
29340 .nr(8)
29341 .kr(1)
29342 .sr(1)
29343 .m(1)
29344 .n(8)
29345 .k(k)
29346 .ks(3)
29347 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29348 }
29349 }
29350
29351 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, small_kernel_subtile) {
29352 TEST_REQUIRES_ARM_NEON;
29353 for (size_t k = 1; k <= 40; k += 9) {
29354 for (uint32_t n = 1; n <= 8; n++) {
29355 for (uint32_t m = 1; m <= 1; m++) {
29356 GemmMicrokernelTester()
29357 .mr(1)
29358 .nr(8)
29359 .kr(1)
29360 .sr(1)
29361 .m(m)
29362 .n(n)
29363 .k(k)
29364 .ks(3)
29365 .iterations(1)
29366 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29367 }
29368 }
29369 }
29370 }
29371
29372 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, n_gt_8_small_kernel) {
29373 TEST_REQUIRES_ARM_NEON;
29374 for (uint32_t n = 9; n < 16; n++) {
29375 for (size_t k = 1; k <= 40; k += 9) {
29376 GemmMicrokernelTester()
29377 .mr(1)
29378 .nr(8)
29379 .kr(1)
29380 .sr(1)
29381 .m(1)
29382 .n(n)
29383 .k(k)
29384 .ks(3)
29385 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29386 }
29387 }
29388 }
29389
29390 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, n_div_8_small_kernel) {
29391 TEST_REQUIRES_ARM_NEON;
29392 for (uint32_t n = 16; n <= 24; n += 8) {
29393 for (size_t k = 1; k <= 40; k += 9) {
29394 GemmMicrokernelTester()
29395 .mr(1)
29396 .nr(8)
29397 .kr(1)
29398 .sr(1)
29399 .m(1)
29400 .n(n)
29401 .k(k)
29402 .ks(3)
29403 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29404 }
29405 }
29406 }
29407
29408 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, strided_cm_subtile) {
29409 TEST_REQUIRES_ARM_NEON;
29410 for (size_t k = 1; k <= 40; k += 9) {
29411 for (uint32_t n = 1; n <= 8; n++) {
29412 for (uint32_t m = 1; m <= 1; m++) {
29413 GemmMicrokernelTester()
29414 .mr(1)
29415 .nr(8)
29416 .kr(1)
29417 .sr(1)
29418 .m(m)
29419 .n(n)
29420 .k(k)
29421 .cm_stride(11)
29422 .iterations(1)
29423 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29424 }
29425 }
29426 }
29427 }
29428
29429 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, a_offset) {
29430 TEST_REQUIRES_ARM_NEON;
29431 for (size_t k = 1; k <= 40; k += 9) {
29432 GemmMicrokernelTester()
29433 .mr(1)
29434 .nr(8)
29435 .kr(1)
29436 .sr(1)
29437 .m(1)
29438 .n(8)
29439 .k(k)
29440 .ks(3)
29441 .a_offset(43)
29442 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29443 }
29444 }
29445
29446 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, zero) {
29447 TEST_REQUIRES_ARM_NEON;
29448 for (size_t k = 1; k <= 40; k += 9) {
29449 for (uint32_t mz = 0; mz < 1; mz++) {
29450 GemmMicrokernelTester()
29451 .mr(1)
29452 .nr(8)
29453 .kr(1)
29454 .sr(1)
29455 .m(1)
29456 .n(8)
29457 .k(k)
29458 .ks(3)
29459 .a_offset(43)
29460 .zero_index(mz)
29461 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29462 }
29463 }
29464 }
29465
29466 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, qmin) {
29467 TEST_REQUIRES_ARM_NEON;
29468 GemmMicrokernelTester()
29469 .mr(1)
29470 .nr(8)
29471 .kr(1)
29472 .sr(1)
29473 .m(1)
29474 .n(8)
29475 .k(8)
29476 .qmin(128)
29477 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29478 }
29479
29480 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, qmax) {
29481 TEST_REQUIRES_ARM_NEON;
29482 GemmMicrokernelTester()
29483 .mr(1)
29484 .nr(8)
29485 .kr(1)
29486 .sr(1)
29487 .m(1)
29488 .n(8)
29489 .k(8)
29490 .qmax(128)
29491 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29492 }
29493
29494 TEST(QS8_IGEMM_MINMAX_RNDNU_1X8__NEON_MULL_ADDW_DUP, strided_cm) {
29495 TEST_REQUIRES_ARM_NEON;
29496 GemmMicrokernelTester()
29497 .mr(1)
29498 .nr(8)
29499 .kr(1)
29500 .sr(1)
29501 .m(1)
29502 .n(8)
29503 .k(8)
29504 .cm_stride(11)
29505 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x8__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
29506 }
29507#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
29508
29509
29510#if XNN_ARCH_ARM || XNN_ARCH_ARM64
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029511 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_eq_8) {
29512 TEST_REQUIRES_ARM_NEON;
29513 GemmMicrokernelTester()
29514 .mr(1)
29515 .nr(16)
29516 .kr(1)
29517 .sr(1)
29518 .m(1)
29519 .n(16)
29520 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080029521 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029522 }
29523
29524 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, strided_cn) {
29525 TEST_REQUIRES_ARM_NEON;
29526 GemmMicrokernelTester()
29527 .mr(1)
29528 .nr(16)
29529 .kr(1)
29530 .sr(1)
29531 .m(1)
29532 .n(16)
29533 .k(8)
29534 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080029535 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029536 }
29537
29538 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile) {
29539 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080029540 for (uint32_t n = 1; n <= 16; n++) {
29541 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029542 GemmMicrokernelTester()
29543 .mr(1)
29544 .nr(16)
29545 .kr(1)
29546 .sr(1)
29547 .m(m)
29548 .n(n)
29549 .k(8)
29550 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029551 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029552 }
29553 }
29554 }
29555
29556 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile_m) {
29557 TEST_REQUIRES_ARM_NEON;
29558 for (uint32_t m = 1; m <= 1; m++) {
29559 GemmMicrokernelTester()
29560 .mr(1)
29561 .nr(16)
29562 .kr(1)
29563 .sr(1)
29564 .m(m)
29565 .n(16)
29566 .k(8)
29567 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029568 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029569 }
29570 }
29571
29572 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile_n) {
29573 TEST_REQUIRES_ARM_NEON;
29574 for (uint32_t n = 1; n <= 16; n++) {
29575 GemmMicrokernelTester()
29576 .mr(1)
29577 .nr(16)
29578 .kr(1)
29579 .sr(1)
29580 .m(1)
29581 .n(n)
29582 .k(8)
29583 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029584 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029585 }
29586 }
29587
29588 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_lt_8) {
29589 TEST_REQUIRES_ARM_NEON;
29590 for (size_t k = 1; k < 8; k++) {
29591 GemmMicrokernelTester()
29592 .mr(1)
29593 .nr(16)
29594 .kr(1)
29595 .sr(1)
29596 .m(1)
29597 .n(16)
29598 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080029599 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029600 }
29601 }
29602
29603 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_lt_8_subtile) {
29604 TEST_REQUIRES_ARM_NEON;
29605 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080029606 for (uint32_t n = 1; n <= 16; n++) {
29607 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029608 GemmMicrokernelTester()
29609 .mr(1)
29610 .nr(16)
29611 .kr(1)
29612 .sr(1)
29613 .m(m)
29614 .n(n)
29615 .k(k)
29616 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029617 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029618 }
29619 }
29620 }
29621 }
29622
29623 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_gt_8) {
29624 TEST_REQUIRES_ARM_NEON;
29625 for (size_t k = 9; k < 16; k++) {
29626 GemmMicrokernelTester()
29627 .mr(1)
29628 .nr(16)
29629 .kr(1)
29630 .sr(1)
29631 .m(1)
29632 .n(16)
29633 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080029634 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029635 }
29636 }
29637
29638 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_gt_8_subtile) {
29639 TEST_REQUIRES_ARM_NEON;
29640 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080029641 for (uint32_t n = 1; n <= 16; n++) {
29642 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029643 GemmMicrokernelTester()
29644 .mr(1)
29645 .nr(16)
29646 .kr(1)
29647 .sr(1)
29648 .m(m)
29649 .n(n)
29650 .k(k)
29651 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029652 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029653 }
29654 }
29655 }
29656 }
29657
29658 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_div_8) {
29659 TEST_REQUIRES_ARM_NEON;
29660 for (size_t k = 16; k <= 80; k += 8) {
29661 GemmMicrokernelTester()
29662 .mr(1)
29663 .nr(16)
29664 .kr(1)
29665 .sr(1)
29666 .m(1)
29667 .n(16)
29668 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080029669 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029670 }
29671 }
29672
29673 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, k_div_8_subtile) {
29674 TEST_REQUIRES_ARM_NEON;
29675 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080029676 for (uint32_t n = 1; n <= 16; n++) {
29677 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029678 GemmMicrokernelTester()
29679 .mr(1)
29680 .nr(16)
29681 .kr(1)
29682 .sr(1)
29683 .m(m)
29684 .n(n)
29685 .k(k)
29686 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029687 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029688 }
29689 }
29690 }
29691 }
29692
29693 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, n_gt_16) {
29694 TEST_REQUIRES_ARM_NEON;
29695 for (uint32_t n = 17; n < 32; n++) {
29696 for (size_t k = 1; k <= 40; k += 9) {
29697 GemmMicrokernelTester()
29698 .mr(1)
29699 .nr(16)
29700 .kr(1)
29701 .sr(1)
29702 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080029703 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029704 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080029705 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029706 }
29707 }
29708 }
29709
29710 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, n_gt_16_strided_cn) {
29711 TEST_REQUIRES_ARM_NEON;
29712 for (uint32_t n = 17; n < 32; n++) {
29713 for (size_t k = 1; k <= 40; k += 9) {
29714 GemmMicrokernelTester()
29715 .mr(1)
29716 .nr(16)
29717 .kr(1)
29718 .sr(1)
29719 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080029720 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029721 .k(k)
29722 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080029723 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029724 }
29725 }
29726 }
29727
29728 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, n_gt_16_subtile) {
29729 TEST_REQUIRES_ARM_NEON;
29730 for (uint32_t n = 17; n < 32; n++) {
29731 for (size_t k = 1; k <= 40; k += 9) {
29732 for (uint32_t m = 1; m <= 1; m++) {
29733 GemmMicrokernelTester()
29734 .mr(1)
29735 .nr(16)
29736 .kr(1)
29737 .sr(1)
29738 .m(m)
29739 .n(n)
29740 .k(k)
29741 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029742 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029743 }
29744 }
29745 }
29746 }
29747
29748 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, n_div_16) {
29749 TEST_REQUIRES_ARM_NEON;
29750 for (uint32_t n = 32; n <= 48; n += 16) {
29751 for (size_t k = 1; k <= 40; k += 9) {
29752 GemmMicrokernelTester()
29753 .mr(1)
29754 .nr(16)
29755 .kr(1)
29756 .sr(1)
29757 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080029758 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029759 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080029760 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029761 }
29762 }
29763 }
29764
29765 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, n_div_16_strided_cn) {
29766 TEST_REQUIRES_ARM_NEON;
29767 for (uint32_t n = 32; n <= 48; n += 16) {
29768 for (size_t k = 1; k <= 40; k += 9) {
29769 GemmMicrokernelTester()
29770 .mr(1)
29771 .nr(16)
29772 .kr(1)
29773 .sr(1)
29774 .m(1)
29775 .n(n)
29776 .k(k)
29777 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080029778 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029779 }
29780 }
29781 }
29782
29783 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, n_div_16_subtile) {
29784 TEST_REQUIRES_ARM_NEON;
29785 for (uint32_t n = 32; n <= 48; n += 16) {
29786 for (size_t k = 1; k <= 40; k += 9) {
29787 for (uint32_t m = 1; m <= 1; m++) {
29788 GemmMicrokernelTester()
29789 .mr(1)
29790 .nr(16)
29791 .kr(1)
29792 .sr(1)
29793 .m(m)
29794 .n(n)
29795 .k(k)
29796 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029797 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029798 }
29799 }
29800 }
29801 }
29802
29803 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, small_kernel) {
29804 TEST_REQUIRES_ARM_NEON;
29805 for (size_t k = 1; k <= 40; k += 9) {
29806 GemmMicrokernelTester()
29807 .mr(1)
29808 .nr(16)
29809 .kr(1)
29810 .sr(1)
29811 .m(1)
29812 .n(16)
29813 .k(k)
29814 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080029815 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029816 }
29817 }
29818
29819 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, small_kernel_subtile) {
29820 TEST_REQUIRES_ARM_NEON;
29821 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080029822 for (uint32_t n = 1; n <= 16; n++) {
29823 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029824 GemmMicrokernelTester()
29825 .mr(1)
29826 .nr(16)
29827 .kr(1)
29828 .sr(1)
29829 .m(m)
29830 .n(n)
29831 .k(k)
29832 .ks(3)
29833 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029834 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029835 }
29836 }
29837 }
29838 }
29839
29840 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, n_gt_16_small_kernel) {
29841 TEST_REQUIRES_ARM_NEON;
29842 for (uint32_t n = 17; n < 32; n++) {
29843 for (size_t k = 1; k <= 40; k += 9) {
29844 GemmMicrokernelTester()
29845 .mr(1)
29846 .nr(16)
29847 .kr(1)
29848 .sr(1)
29849 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080029850 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029851 .k(k)
29852 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080029853 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029854 }
29855 }
29856 }
29857
29858 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, n_div_16_small_kernel) {
29859 TEST_REQUIRES_ARM_NEON;
29860 for (uint32_t n = 32; n <= 48; n += 16) {
29861 for (size_t k = 1; k <= 40; k += 9) {
29862 GemmMicrokernelTester()
29863 .mr(1)
29864 .nr(16)
29865 .kr(1)
29866 .sr(1)
29867 .m(1)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080029868 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029869 .k(k)
29870 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080029871 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029872 }
29873 }
29874 }
29875
29876 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, strided_cm_subtile) {
29877 TEST_REQUIRES_ARM_NEON;
29878 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080029879 for (uint32_t n = 1; n <= 16; n++) {
29880 for (uint32_t m = 1; m <= 1; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029881 GemmMicrokernelTester()
29882 .mr(1)
29883 .nr(16)
29884 .kr(1)
29885 .sr(1)
29886 .m(m)
29887 .n(n)
29888 .k(k)
29889 .cm_stride(19)
29890 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080029891 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029892 }
29893 }
29894 }
29895 }
29896
29897 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, a_offset) {
29898 TEST_REQUIRES_ARM_NEON;
29899 for (size_t k = 1; k <= 40; k += 9) {
29900 GemmMicrokernelTester()
29901 .mr(1)
29902 .nr(16)
29903 .kr(1)
29904 .sr(1)
29905 .m(1)
29906 .n(16)
29907 .k(k)
29908 .ks(3)
29909 .a_offset(43)
Marat Dukhan50323b82022-01-11 00:12:01 -080029910 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029911 }
29912 }
29913
29914 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, zero) {
29915 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080029916 for (size_t k = 1; k <= 40; k += 9) {
29917 for (uint32_t mz = 0; mz < 1; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029918 GemmMicrokernelTester()
29919 .mr(1)
29920 .nr(16)
29921 .kr(1)
29922 .sr(1)
29923 .m(1)
29924 .n(16)
29925 .k(k)
29926 .ks(3)
29927 .a_offset(43)
29928 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080029929 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029930 }
29931 }
29932 }
29933
29934 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, qmin) {
29935 TEST_REQUIRES_ARM_NEON;
29936 GemmMicrokernelTester()
29937 .mr(1)
29938 .nr(16)
29939 .kr(1)
29940 .sr(1)
29941 .m(1)
29942 .n(16)
29943 .k(8)
29944 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080029945 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029946 }
29947
29948 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, qmax) {
29949 TEST_REQUIRES_ARM_NEON;
29950 GemmMicrokernelTester()
29951 .mr(1)
29952 .nr(16)
29953 .kr(1)
29954 .sr(1)
29955 .m(1)
29956 .n(16)
29957 .k(8)
29958 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080029959 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029960 }
29961
29962 TEST(QS8_IGEMM_MINMAX_RNDNU_1X16__NEON_MULL_ADDW_DUP, strided_cm) {
29963 TEST_REQUIRES_ARM_NEON;
29964 GemmMicrokernelTester()
29965 .mr(1)
29966 .nr(16)
29967 .kr(1)
29968 .sr(1)
29969 .m(1)
29970 .n(16)
29971 .k(8)
29972 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080029973 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_1x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029974 }
29975#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
29976
29977
29978#if XNN_ARCH_ARM || XNN_ARCH_ARM64
29979 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_eq_8) {
29980 TEST_REQUIRES_ARM_NEON;
29981 GemmMicrokernelTester()
29982 .mr(2)
29983 .nr(16)
29984 .kr(1)
29985 .sr(1)
29986 .m(2)
29987 .n(16)
29988 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080029989 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080029990 }
29991
29992 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, strided_cn) {
29993 TEST_REQUIRES_ARM_NEON;
29994 GemmMicrokernelTester()
29995 .mr(2)
29996 .nr(16)
29997 .kr(1)
29998 .sr(1)
29999 .m(2)
30000 .n(16)
30001 .k(8)
30002 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080030003 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030004 }
30005
30006 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile) {
30007 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080030008 for (uint32_t n = 1; n <= 16; n++) {
30009 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030010 GemmMicrokernelTester()
30011 .mr(2)
30012 .nr(16)
30013 .kr(1)
30014 .sr(1)
30015 .m(m)
30016 .n(n)
30017 .k(8)
30018 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030019 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030020 }
30021 }
30022 }
30023
30024 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile_m) {
30025 TEST_REQUIRES_ARM_NEON;
30026 for (uint32_t m = 1; m <= 2; m++) {
30027 GemmMicrokernelTester()
30028 .mr(2)
30029 .nr(16)
30030 .kr(1)
30031 .sr(1)
30032 .m(m)
30033 .n(16)
30034 .k(8)
30035 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030036 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030037 }
30038 }
30039
30040 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile_n) {
30041 TEST_REQUIRES_ARM_NEON;
30042 for (uint32_t n = 1; n <= 16; n++) {
30043 GemmMicrokernelTester()
30044 .mr(2)
30045 .nr(16)
30046 .kr(1)
30047 .sr(1)
30048 .m(2)
30049 .n(n)
30050 .k(8)
30051 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030052 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030053 }
30054 }
30055
30056 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_lt_8) {
30057 TEST_REQUIRES_ARM_NEON;
30058 for (size_t k = 1; k < 8; k++) {
30059 GemmMicrokernelTester()
30060 .mr(2)
30061 .nr(16)
30062 .kr(1)
30063 .sr(1)
30064 .m(2)
30065 .n(16)
30066 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030067 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030068 }
30069 }
30070
30071 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_lt_8_subtile) {
30072 TEST_REQUIRES_ARM_NEON;
30073 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030074 for (uint32_t n = 1; n <= 16; n++) {
30075 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030076 GemmMicrokernelTester()
30077 .mr(2)
30078 .nr(16)
30079 .kr(1)
30080 .sr(1)
30081 .m(m)
30082 .n(n)
30083 .k(k)
30084 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030085 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030086 }
30087 }
30088 }
30089 }
30090
30091 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_gt_8) {
30092 TEST_REQUIRES_ARM_NEON;
30093 for (size_t k = 9; k < 16; k++) {
30094 GemmMicrokernelTester()
30095 .mr(2)
30096 .nr(16)
30097 .kr(1)
30098 .sr(1)
30099 .m(2)
30100 .n(16)
30101 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030102 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030103 }
30104 }
30105
30106 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_gt_8_subtile) {
30107 TEST_REQUIRES_ARM_NEON;
30108 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030109 for (uint32_t n = 1; n <= 16; n++) {
30110 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030111 GemmMicrokernelTester()
30112 .mr(2)
30113 .nr(16)
30114 .kr(1)
30115 .sr(1)
30116 .m(m)
30117 .n(n)
30118 .k(k)
30119 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030120 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030121 }
30122 }
30123 }
30124 }
30125
30126 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_div_8) {
30127 TEST_REQUIRES_ARM_NEON;
30128 for (size_t k = 16; k <= 80; k += 8) {
30129 GemmMicrokernelTester()
30130 .mr(2)
30131 .nr(16)
30132 .kr(1)
30133 .sr(1)
30134 .m(2)
30135 .n(16)
30136 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030137 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030138 }
30139 }
30140
30141 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, k_div_8_subtile) {
30142 TEST_REQUIRES_ARM_NEON;
30143 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030144 for (uint32_t n = 1; n <= 16; n++) {
30145 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030146 GemmMicrokernelTester()
30147 .mr(2)
30148 .nr(16)
30149 .kr(1)
30150 .sr(1)
30151 .m(m)
30152 .n(n)
30153 .k(k)
30154 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030155 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030156 }
30157 }
30158 }
30159 }
30160
30161 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, n_gt_16) {
30162 TEST_REQUIRES_ARM_NEON;
30163 for (uint32_t n = 17; n < 32; n++) {
30164 for (size_t k = 1; k <= 40; k += 9) {
30165 GemmMicrokernelTester()
30166 .mr(2)
30167 .nr(16)
30168 .kr(1)
30169 .sr(1)
30170 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030171 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030172 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030173 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030174 }
30175 }
30176 }
30177
30178 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, n_gt_16_strided_cn) {
30179 TEST_REQUIRES_ARM_NEON;
30180 for (uint32_t n = 17; n < 32; n++) {
30181 for (size_t k = 1; k <= 40; k += 9) {
30182 GemmMicrokernelTester()
30183 .mr(2)
30184 .nr(16)
30185 .kr(1)
30186 .sr(1)
30187 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030188 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030189 .k(k)
30190 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080030191 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030192 }
30193 }
30194 }
30195
30196 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, n_gt_16_subtile) {
30197 TEST_REQUIRES_ARM_NEON;
30198 for (uint32_t n = 17; n < 32; n++) {
30199 for (size_t k = 1; k <= 40; k += 9) {
30200 for (uint32_t m = 1; m <= 2; m++) {
30201 GemmMicrokernelTester()
30202 .mr(2)
30203 .nr(16)
30204 .kr(1)
30205 .sr(1)
30206 .m(m)
30207 .n(n)
30208 .k(k)
30209 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030210 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030211 }
30212 }
30213 }
30214 }
30215
30216 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, n_div_16) {
30217 TEST_REQUIRES_ARM_NEON;
30218 for (uint32_t n = 32; n <= 48; n += 16) {
30219 for (size_t k = 1; k <= 40; k += 9) {
30220 GemmMicrokernelTester()
30221 .mr(2)
30222 .nr(16)
30223 .kr(1)
30224 .sr(1)
30225 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030226 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030227 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030228 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030229 }
30230 }
30231 }
30232
30233 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, n_div_16_strided_cn) {
30234 TEST_REQUIRES_ARM_NEON;
30235 for (uint32_t n = 32; n <= 48; n += 16) {
30236 for (size_t k = 1; k <= 40; k += 9) {
30237 GemmMicrokernelTester()
30238 .mr(2)
30239 .nr(16)
30240 .kr(1)
30241 .sr(1)
30242 .m(2)
30243 .n(n)
30244 .k(k)
30245 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080030246 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030247 }
30248 }
30249 }
30250
30251 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, n_div_16_subtile) {
30252 TEST_REQUIRES_ARM_NEON;
30253 for (uint32_t n = 32; n <= 48; n += 16) {
30254 for (size_t k = 1; k <= 40; k += 9) {
30255 for (uint32_t m = 1; m <= 2; m++) {
30256 GemmMicrokernelTester()
30257 .mr(2)
30258 .nr(16)
30259 .kr(1)
30260 .sr(1)
30261 .m(m)
30262 .n(n)
30263 .k(k)
30264 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030265 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030266 }
30267 }
30268 }
30269 }
30270
30271 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, small_kernel) {
30272 TEST_REQUIRES_ARM_NEON;
30273 for (size_t k = 1; k <= 40; k += 9) {
30274 GemmMicrokernelTester()
30275 .mr(2)
30276 .nr(16)
30277 .kr(1)
30278 .sr(1)
30279 .m(2)
30280 .n(16)
30281 .k(k)
30282 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080030283 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030284 }
30285 }
30286
30287 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, small_kernel_subtile) {
30288 TEST_REQUIRES_ARM_NEON;
30289 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030290 for (uint32_t n = 1; n <= 16; n++) {
30291 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030292 GemmMicrokernelTester()
30293 .mr(2)
30294 .nr(16)
30295 .kr(1)
30296 .sr(1)
30297 .m(m)
30298 .n(n)
30299 .k(k)
30300 .ks(3)
30301 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030302 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030303 }
30304 }
30305 }
30306 }
30307
30308 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, n_gt_16_small_kernel) {
30309 TEST_REQUIRES_ARM_NEON;
30310 for (uint32_t n = 17; n < 32; n++) {
30311 for (size_t k = 1; k <= 40; k += 9) {
30312 GemmMicrokernelTester()
30313 .mr(2)
30314 .nr(16)
30315 .kr(1)
30316 .sr(1)
30317 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030318 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030319 .k(k)
30320 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080030321 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030322 }
30323 }
30324 }
30325
30326 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, n_div_16_small_kernel) {
30327 TEST_REQUIRES_ARM_NEON;
30328 for (uint32_t n = 32; n <= 48; n += 16) {
30329 for (size_t k = 1; k <= 40; k += 9) {
30330 GemmMicrokernelTester()
30331 .mr(2)
30332 .nr(16)
30333 .kr(1)
30334 .sr(1)
30335 .m(2)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030336 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030337 .k(k)
30338 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080030339 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030340 }
30341 }
30342 }
30343
30344 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, strided_cm_subtile) {
30345 TEST_REQUIRES_ARM_NEON;
30346 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030347 for (uint32_t n = 1; n <= 16; n++) {
30348 for (uint32_t m = 1; m <= 2; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030349 GemmMicrokernelTester()
30350 .mr(2)
30351 .nr(16)
30352 .kr(1)
30353 .sr(1)
30354 .m(m)
30355 .n(n)
30356 .k(k)
30357 .cm_stride(19)
30358 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030359 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030360 }
30361 }
30362 }
30363 }
30364
30365 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, a_offset) {
30366 TEST_REQUIRES_ARM_NEON;
30367 for (size_t k = 1; k <= 40; k += 9) {
30368 GemmMicrokernelTester()
30369 .mr(2)
30370 .nr(16)
30371 .kr(1)
30372 .sr(1)
30373 .m(2)
30374 .n(16)
30375 .k(k)
30376 .ks(3)
30377 .a_offset(83)
Marat Dukhan50323b82022-01-11 00:12:01 -080030378 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030379 }
30380 }
30381
30382 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, zero) {
30383 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080030384 for (size_t k = 1; k <= 40; k += 9) {
30385 for (uint32_t mz = 0; mz < 2; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030386 GemmMicrokernelTester()
30387 .mr(2)
30388 .nr(16)
30389 .kr(1)
30390 .sr(1)
30391 .m(2)
30392 .n(16)
30393 .k(k)
30394 .ks(3)
30395 .a_offset(83)
30396 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080030397 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030398 }
30399 }
30400 }
30401
30402 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, qmin) {
30403 TEST_REQUIRES_ARM_NEON;
30404 GemmMicrokernelTester()
30405 .mr(2)
30406 .nr(16)
30407 .kr(1)
30408 .sr(1)
30409 .m(2)
30410 .n(16)
30411 .k(8)
30412 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080030413 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030414 }
30415
30416 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, qmax) {
30417 TEST_REQUIRES_ARM_NEON;
30418 GemmMicrokernelTester()
30419 .mr(2)
30420 .nr(16)
30421 .kr(1)
30422 .sr(1)
30423 .m(2)
30424 .n(16)
30425 .k(8)
30426 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080030427 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030428 }
30429
30430 TEST(QS8_IGEMM_MINMAX_RNDNU_2X16__NEON_MULL_ADDW_DUP, strided_cm) {
30431 TEST_REQUIRES_ARM_NEON;
30432 GemmMicrokernelTester()
30433 .mr(2)
30434 .nr(16)
30435 .kr(1)
30436 .sr(1)
30437 .m(2)
30438 .n(16)
30439 .k(8)
30440 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080030441 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_2x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030442 }
30443#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
30444
30445
30446#if XNN_ARCH_ARM || XNN_ARCH_ARM64
30447 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_eq_8) {
30448 TEST_REQUIRES_ARM_NEON;
30449 GemmMicrokernelTester()
30450 .mr(4)
30451 .nr(16)
30452 .kr(1)
30453 .sr(1)
30454 .m(4)
30455 .n(16)
30456 .k(8)
Marat Dukhan50323b82022-01-11 00:12:01 -080030457 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030458 }
30459
30460 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, strided_cn) {
30461 TEST_REQUIRES_ARM_NEON;
30462 GemmMicrokernelTester()
30463 .mr(4)
30464 .nr(16)
30465 .kr(1)
30466 .sr(1)
30467 .m(4)
30468 .n(16)
30469 .k(8)
30470 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080030471 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030472 }
30473
30474 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile) {
30475 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080030476 for (uint32_t n = 1; n <= 16; n++) {
30477 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030478 GemmMicrokernelTester()
30479 .mr(4)
30480 .nr(16)
30481 .kr(1)
30482 .sr(1)
30483 .m(m)
30484 .n(n)
30485 .k(8)
30486 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030487 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030488 }
30489 }
30490 }
30491
30492 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile_m) {
30493 TEST_REQUIRES_ARM_NEON;
30494 for (uint32_t m = 1; m <= 4; m++) {
30495 GemmMicrokernelTester()
30496 .mr(4)
30497 .nr(16)
30498 .kr(1)
30499 .sr(1)
30500 .m(m)
30501 .n(16)
30502 .k(8)
30503 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030504 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030505 }
30506 }
30507
30508 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_eq_8_subtile_n) {
30509 TEST_REQUIRES_ARM_NEON;
30510 for (uint32_t n = 1; n <= 16; n++) {
30511 GemmMicrokernelTester()
30512 .mr(4)
30513 .nr(16)
30514 .kr(1)
30515 .sr(1)
30516 .m(4)
30517 .n(n)
30518 .k(8)
30519 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030520 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030521 }
30522 }
30523
30524 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_lt_8) {
30525 TEST_REQUIRES_ARM_NEON;
30526 for (size_t k = 1; k < 8; k++) {
30527 GemmMicrokernelTester()
30528 .mr(4)
30529 .nr(16)
30530 .kr(1)
30531 .sr(1)
30532 .m(4)
30533 .n(16)
30534 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030535 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030536 }
30537 }
30538
30539 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_lt_8_subtile) {
30540 TEST_REQUIRES_ARM_NEON;
30541 for (size_t k = 1; k < 8; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030542 for (uint32_t n = 1; n <= 16; n++) {
30543 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030544 GemmMicrokernelTester()
30545 .mr(4)
30546 .nr(16)
30547 .kr(1)
30548 .sr(1)
30549 .m(m)
30550 .n(n)
30551 .k(k)
30552 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030553 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030554 }
30555 }
30556 }
30557 }
30558
30559 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_gt_8) {
30560 TEST_REQUIRES_ARM_NEON;
30561 for (size_t k = 9; k < 16; k++) {
30562 GemmMicrokernelTester()
30563 .mr(4)
30564 .nr(16)
30565 .kr(1)
30566 .sr(1)
30567 .m(4)
30568 .n(16)
30569 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030570 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030571 }
30572 }
30573
30574 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_gt_8_subtile) {
30575 TEST_REQUIRES_ARM_NEON;
30576 for (size_t k = 9; k < 16; k++) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030577 for (uint32_t n = 1; n <= 16; n++) {
30578 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030579 GemmMicrokernelTester()
30580 .mr(4)
30581 .nr(16)
30582 .kr(1)
30583 .sr(1)
30584 .m(m)
30585 .n(n)
30586 .k(k)
30587 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030588 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030589 }
30590 }
30591 }
30592 }
30593
30594 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_div_8) {
30595 TEST_REQUIRES_ARM_NEON;
30596 for (size_t k = 16; k <= 80; k += 8) {
30597 GemmMicrokernelTester()
30598 .mr(4)
30599 .nr(16)
30600 .kr(1)
30601 .sr(1)
30602 .m(4)
30603 .n(16)
30604 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030605 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030606 }
30607 }
30608
30609 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, k_div_8_subtile) {
30610 TEST_REQUIRES_ARM_NEON;
30611 for (size_t k = 16; k <= 80; k += 8) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030612 for (uint32_t n = 1; n <= 16; n++) {
30613 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030614 GemmMicrokernelTester()
30615 .mr(4)
30616 .nr(16)
30617 .kr(1)
30618 .sr(1)
30619 .m(m)
30620 .n(n)
30621 .k(k)
30622 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030623 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030624 }
30625 }
30626 }
30627 }
30628
30629 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, n_gt_16) {
30630 TEST_REQUIRES_ARM_NEON;
30631 for (uint32_t n = 17; n < 32; n++) {
30632 for (size_t k = 1; k <= 40; k += 9) {
30633 GemmMicrokernelTester()
30634 .mr(4)
30635 .nr(16)
30636 .kr(1)
30637 .sr(1)
30638 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030639 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030640 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030641 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030642 }
30643 }
30644 }
30645
30646 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, n_gt_16_strided_cn) {
30647 TEST_REQUIRES_ARM_NEON;
30648 for (uint32_t n = 17; n < 32; n++) {
30649 for (size_t k = 1; k <= 40; k += 9) {
30650 GemmMicrokernelTester()
30651 .mr(4)
30652 .nr(16)
30653 .kr(1)
30654 .sr(1)
30655 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030656 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030657 .k(k)
30658 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080030659 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030660 }
30661 }
30662 }
30663
30664 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, n_gt_16_subtile) {
30665 TEST_REQUIRES_ARM_NEON;
30666 for (uint32_t n = 17; n < 32; n++) {
30667 for (size_t k = 1; k <= 40; k += 9) {
30668 for (uint32_t m = 1; m <= 4; m++) {
30669 GemmMicrokernelTester()
30670 .mr(4)
30671 .nr(16)
30672 .kr(1)
30673 .sr(1)
30674 .m(m)
30675 .n(n)
30676 .k(k)
30677 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030678 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030679 }
30680 }
30681 }
30682 }
30683
30684 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, n_div_16) {
30685 TEST_REQUIRES_ARM_NEON;
30686 for (uint32_t n = 32; n <= 48; n += 16) {
30687 for (size_t k = 1; k <= 40; k += 9) {
30688 GemmMicrokernelTester()
30689 .mr(4)
30690 .nr(16)
30691 .kr(1)
30692 .sr(1)
30693 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030694 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030695 .k(k)
Marat Dukhan50323b82022-01-11 00:12:01 -080030696 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030697 }
30698 }
30699 }
30700
30701 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, n_div_16_strided_cn) {
30702 TEST_REQUIRES_ARM_NEON;
30703 for (uint32_t n = 32; n <= 48; n += 16) {
30704 for (size_t k = 1; k <= 40; k += 9) {
30705 GemmMicrokernelTester()
30706 .mr(4)
30707 .nr(16)
30708 .kr(1)
30709 .sr(1)
30710 .m(4)
30711 .n(n)
30712 .k(k)
30713 .cn_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080030714 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030715 }
30716 }
30717 }
30718
30719 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, n_div_16_subtile) {
30720 TEST_REQUIRES_ARM_NEON;
30721 for (uint32_t n = 32; n <= 48; n += 16) {
30722 for (size_t k = 1; k <= 40; k += 9) {
30723 for (uint32_t m = 1; m <= 4; m++) {
30724 GemmMicrokernelTester()
30725 .mr(4)
30726 .nr(16)
30727 .kr(1)
30728 .sr(1)
30729 .m(m)
30730 .n(n)
30731 .k(k)
30732 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030733 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030734 }
30735 }
30736 }
30737 }
30738
30739 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, small_kernel) {
30740 TEST_REQUIRES_ARM_NEON;
30741 for (size_t k = 1; k <= 40; k += 9) {
30742 GemmMicrokernelTester()
30743 .mr(4)
30744 .nr(16)
30745 .kr(1)
30746 .sr(1)
30747 .m(4)
30748 .n(16)
30749 .k(k)
30750 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080030751 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030752 }
30753 }
30754
30755 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, small_kernel_subtile) {
30756 TEST_REQUIRES_ARM_NEON;
30757 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030758 for (uint32_t n = 1; n <= 16; n++) {
30759 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030760 GemmMicrokernelTester()
30761 .mr(4)
30762 .nr(16)
30763 .kr(1)
30764 .sr(1)
30765 .m(m)
30766 .n(n)
30767 .k(k)
30768 .ks(3)
30769 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030770 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030771 }
30772 }
30773 }
30774 }
30775
30776 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, n_gt_16_small_kernel) {
30777 TEST_REQUIRES_ARM_NEON;
30778 for (uint32_t n = 17; n < 32; n++) {
30779 for (size_t k = 1; k <= 40; k += 9) {
30780 GemmMicrokernelTester()
30781 .mr(4)
30782 .nr(16)
30783 .kr(1)
30784 .sr(1)
30785 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030786 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030787 .k(k)
30788 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080030789 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030790 }
30791 }
30792 }
30793
30794 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, n_div_16_small_kernel) {
30795 TEST_REQUIRES_ARM_NEON;
30796 for (uint32_t n = 32; n <= 48; n += 16) {
30797 for (size_t k = 1; k <= 40; k += 9) {
30798 GemmMicrokernelTester()
30799 .mr(4)
30800 .nr(16)
30801 .kr(1)
30802 .sr(1)
30803 .m(4)
Zhi An Ngaf9ff852022-01-13 10:48:37 -080030804 .n(n)
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030805 .k(k)
30806 .ks(3)
Marat Dukhan50323b82022-01-11 00:12:01 -080030807 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030808 }
30809 }
30810 }
30811
30812 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, strided_cm_subtile) {
30813 TEST_REQUIRES_ARM_NEON;
30814 for (size_t k = 1; k <= 40; k += 9) {
Zhi An Ng83844ae2022-01-14 09:52:25 -080030815 for (uint32_t n = 1; n <= 16; n++) {
30816 for (uint32_t m = 1; m <= 4; m++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030817 GemmMicrokernelTester()
30818 .mr(4)
30819 .nr(16)
30820 .kr(1)
30821 .sr(1)
30822 .m(m)
30823 .n(n)
30824 .k(k)
30825 .cm_stride(19)
30826 .iterations(1)
Marat Dukhan50323b82022-01-11 00:12:01 -080030827 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030828 }
30829 }
30830 }
30831 }
30832
30833 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, a_offset) {
30834 TEST_REQUIRES_ARM_NEON;
30835 for (size_t k = 1; k <= 40; k += 9) {
30836 GemmMicrokernelTester()
30837 .mr(4)
30838 .nr(16)
30839 .kr(1)
30840 .sr(1)
30841 .m(4)
30842 .n(16)
30843 .k(k)
30844 .ks(3)
30845 .a_offset(163)
Marat Dukhan50323b82022-01-11 00:12:01 -080030846 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030847 }
30848 }
30849
30850 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, zero) {
30851 TEST_REQUIRES_ARM_NEON;
Zhi An Ng83844ae2022-01-14 09:52:25 -080030852 for (size_t k = 1; k <= 40; k += 9) {
30853 for (uint32_t mz = 0; mz < 4; mz++) {
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030854 GemmMicrokernelTester()
30855 .mr(4)
30856 .nr(16)
30857 .kr(1)
30858 .sr(1)
30859 .m(4)
30860 .n(16)
30861 .k(k)
30862 .ks(3)
30863 .a_offset(163)
30864 .zero_index(mz)
Marat Dukhan50323b82022-01-11 00:12:01 -080030865 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030866 }
30867 }
30868 }
30869
30870 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, qmin) {
30871 TEST_REQUIRES_ARM_NEON;
30872 GemmMicrokernelTester()
30873 .mr(4)
30874 .nr(16)
30875 .kr(1)
30876 .sr(1)
30877 .m(4)
30878 .n(16)
30879 .k(8)
30880 .qmin(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080030881 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030882 }
30883
30884 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, qmax) {
30885 TEST_REQUIRES_ARM_NEON;
30886 GemmMicrokernelTester()
30887 .mr(4)
30888 .nr(16)
30889 .kr(1)
30890 .sr(1)
30891 .m(4)
30892 .n(16)
30893 .k(8)
30894 .qmax(128)
Marat Dukhan50323b82022-01-11 00:12:01 -080030895 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030896 }
30897
30898 TEST(QS8_IGEMM_MINMAX_RNDNU_4X16__NEON_MULL_ADDW_DUP, strided_cm) {
30899 TEST_REQUIRES_ARM_NEON;
30900 GemmMicrokernelTester()
30901 .mr(4)
30902 .nr(16)
30903 .kr(1)
30904 .sr(1)
30905 .m(4)
30906 .n(16)
30907 .k(8)
30908 .cm_stride(19)
Marat Dukhan50323b82022-01-11 00:12:01 -080030909 .Test(xnn_qs8_igemm_minmax_rndnu_ukernel_4x16__neon_mull_addw_dup, xnn_init_qs8_conv_minmax_rndnu_neon_params, xnn_qs8_requantize_rndnu);
Zhi An Ng4c1fd6f2022-01-10 19:35:06 -080030910 }
30911#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64