commit | 6de9b3364b458160c1229d00667caf93ba93c097 | [log] [tgz] |
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author | Eleanor Bonnici <Eleanor.bonnici@arm.com> | Wed Aug 02 18:33:41 2017 +0100 |
committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | Thu Sep 07 14:22:02 2017 +0100 |
tree | fc6499c90c931c8d20aa7a569322fe8fb91bce53 | |
parent | 45b52c202f7173d7610e2ca667907a6e646e90fa [diff] |
Cortex-A72: Implement workaround for erratum 859971 Erratum 855971 applies to revision r0p3 or earlier Cortex-A72 CPUs. The recommended workaround is to disable instruction prefetch. Change-Id: I7fde74ee2a8a23b2a8a1891b260f0eb909fad4bf Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>