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Dan Handleyb4315302015-03-19 18:58:55 +00001#
dp-arm04c1db12017-01-31 13:01:04 +00002# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Dan Handleyb4315302015-03-19 18:58:55 +00003#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are met:
6#
7# Redistributions of source code must retain the above copyright notice, this
8# list of conditions and the following disclaimer.
9#
10# Redistributions in binary form must reproduce the above copyright notice,
11# this list of conditions and the following disclaimer in the documentation
12# and/or other materials provided with the distribution.
13#
14# Neither the name of ARM nor the names of its contributors may be used
15# to endorse or promote products derived from this software without specific
16# prior written permission.
17#
18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28# POSSIBILITY OF SUCH DAMAGE.
29#
30
Soby Mathew877cf3f2016-07-11 14:13:56 +010031ifeq (${ARCH}, aarch64)
32 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
33 # DRAM (if available) or the TZC secured area of DRAM.
34 # Trusted SRAM is the default.
Dan Handleyb4315302015-03-19 18:58:55 +000035
Soby Mathew877cf3f2016-07-11 14:13:56 +010036 ARM_TSP_RAM_LOCATION := tsram
37 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
39 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
40 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
41 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
42 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
43 else
44 $(error "Unsupported ARM_TSP_RAM_LOCATION value")
45 endif
46
47 # Process flags
48 $(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
49
50 # Process ARM_BL31_IN_DRAM flag
51 ARM_BL31_IN_DRAM := 0
52 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
53 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Dan Handleyb4315302015-03-19 18:58:55 +000054endif
55
Soby Mathew2204afd2015-04-16 14:49:09 +010056# For the original power-state parameter format, the State-ID can be encoded
57# according to the recommended encoding or zero. This flag determines which
58# State-ID encoding to be parsed.
59ARM_RECOM_STATE_ID_ENC := 0
60
Douglas Raillard91a422d2016-11-07 17:29:34 +000061# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
62# be set. Else throw a build error.
Soby Mathew2204afd2015-04-16 14:49:09 +010063ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
64 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard91a422d2016-11-07 17:29:34 +000065 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
66 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew2204afd2015-04-16 14:49:09 +010067 endif
68endif
69
70# Process ARM_RECOM_STATE_ID_ENC flag
71$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
72$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
73
Juan Castillo7b4c1402015-10-06 14:01:35 +010074# Process ARM_DISABLE_TRUSTED_WDOG flag
75# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
76ARM_DISABLE_TRUSTED_WDOG := 0
77ifeq (${SPIN_ON_BL1_EXIT}, 1)
78ARM_DISABLE_TRUSTED_WDOG := 1
79endif
80$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
81$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
82
Juan Castillo0e5dcdd2015-11-06 16:02:32 +000083# Process ARM_CONFIG_CNTACR
84ARM_CONFIG_CNTACR := 1
85$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
86$(eval $(call add_define,ARM_CONFIG_CNTACR))
87
David Wang4518dd92016-03-07 11:02:57 +080088# Process ARM_BL31_IN_DRAM flag
89ARM_BL31_IN_DRAM := 0
90$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
91$(eval $(call add_define,ARM_BL31_IN_DRAM))
92
Summer Qind8d6cf22017-02-28 16:46:17 +000093# Process ARM_PLAT_MT flag
94ARM_PLAT_MT := 0
95$(eval $(call assert_boolean,ARM_PLAT_MT))
96$(eval $(call add_define,ARM_PLAT_MT))
97
Soby Mathewd75f2572016-05-23 16:07:53 +010098# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew877cf3f2016-07-11 14:13:56 +010099ENABLE_PSCI_STAT := 1
dp-arm04c1db12017-01-31 13:01:04 +0000100ENABLE_PMF := 1
Soby Mathewd75f2572016-05-23 16:07:53 +0100101
Sandrine Bailleux0af559a2016-07-08 14:38:16 +0100102# On ARM platforms, separate the code and read-only data sections to allow
103# mapping the former as executable and the latter as execute-never.
104SEPARATE_CODE_AND_RODATA := 1
105
Yatharth Kochar53d703a2016-11-11 13:57:50 +0000106# Enable new version of image loading on ARM platforms
107LOAD_IMAGE_V2 := 1
Sandrine Bailleux0af559a2016-07-08 14:38:16 +0100108
Juan Castillodff93c82015-05-07 14:52:44 +0100109PLAT_INCLUDES += -Iinclude/common/tbbr \
Soby Mathew877cf3f2016-07-11 14:13:56 +0100110 -Iinclude/plat/arm/common
Dan Handleyb4315302015-03-19 18:58:55 +0000111
Soby Mathew877cf3f2016-07-11 14:13:56 +0100112ifeq (${ARCH}, aarch64)
113PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
114endif
Dan Handleyb4315302015-03-19 18:58:55 +0000115
Antonio Nino Diazbf75a372017-02-23 17:22:58 +0000116include lib/xlat_tables_v2/xlat_tables.mk
117
118PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} \
Soby Mathew877cf3f2016-07-11 14:13:56 +0100119 plat/arm/common/${ARCH}/arm_helpers.S \
dp-arm75311202017-03-07 11:02:47 +0000120 plat/arm/common/arm_common.c
Dan Handleyb4315302015-03-19 18:58:55 +0000121
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000122BL1_SOURCES += drivers/arm/sp805/sp805.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000123 drivers/io/io_fip.c \
124 drivers/io/io_memmap.c \
125 drivers/io/io_storage.c \
126 plat/arm/common/arm_bl1_setup.c \
dp-arm75311202017-03-07 11:02:47 +0000127 plat/arm/common/arm_io_storage.c
Sandrine Bailleux4c117f62015-11-26 16:31:34 +0000128ifdef EL3_PAYLOAD_BASE
129# Need the arm_program_trusted_mailbox() function to release secondary CPUs from
130# their holding pen
131BL1_SOURCES += plat/arm/common/arm_pm.c
132endif
Dan Handleyb4315302015-03-19 18:58:55 +0000133
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +0000134BL2_SOURCES += drivers/io/io_fip.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000135 drivers/io/io_memmap.c \
136 drivers/io/io_storage.c \
137 plat/arm/common/arm_bl2_setup.c \
dp-arm75311202017-03-07 11:02:47 +0000138 plat/arm/common/arm_io_storage.c
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +0100139ifeq (${LOAD_IMAGE_V2},1)
Yatharth Kochar07570d52016-11-14 12:01:04 +0000140# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
141# the AArch32 descriptors.
142ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
143BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
144else
145BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
146endif
147BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +0100148 common/desc_image_load.c
149endif
Dan Handleyb4315302015-03-19 18:58:55 +0000150
dp-arm75311202017-03-07 11:02:47 +0000151BL2U_SOURCES += plat/arm/common/arm_bl2u_setup.c
Yatharth Kochardcda29f2015-10-14 15:28:11 +0100152
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000153BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000154 plat/arm/common/arm_pm.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000155 plat/arm/common/arm_topology.c \
Soby Mathewbb2162f2016-05-03 12:31:18 +0100156 plat/common/plat_psci_common.c
Juan Castillo1779ba62015-05-19 11:54:12 +0100157
dp-armf10796a2016-09-19 11:21:03 +0100158ifeq (${ENABLE_PMF}, 1)
159BL31_SOURCES += plat/arm/common/arm_sip_svc.c \
160 lib/pmf/pmf_smc.c
161endif
162
Juan Castillo1779ba62015-05-19 11:54:12 +0100163ifneq (${TRUSTED_BOARD_BOOT},0)
164
165 # By default, ARM platforms use RSA keys
166 KEY_ALG := rsa
167
168 # Include common TBB sources
169 AUTH_SOURCES := drivers/auth/auth_mod.c \
Achin Gupta27573c52015-11-03 14:18:34 +0000170 drivers/auth/crypto_mod.c \
171 drivers/auth/img_parser_mod.c \
172 drivers/auth/tbbr/tbbr_cot.c \
Juan Castillo1779ba62015-05-19 11:54:12 +0100173
Yatharth Kochar436223d2015-10-11 14:14:55 +0100174 PLAT_INCLUDES += -Iinclude/bl1/tbbr
175
Yatharth Kochar843ddee2016-02-01 11:04:46 +0000176 BL1_SOURCES += ${AUTH_SOURCES} \
177 bl1/tbbr/tbbr_img_desc.c \
dp-armd35dee22016-12-12 14:48:13 +0000178 plat/arm/common/arm_bl1_fwu.c \
179 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar436223d2015-10-11 14:14:55 +0100180
dp-armd35dee22016-12-12 14:48:13 +0000181 BL2_SOURCES += ${AUTH_SOURCES} \
182 plat/common/tbbr/plat_tbbr.c
Juan Castillo1779ba62015-05-19 11:54:12 +0100183
Juan Castillo8f0617e2016-01-05 11:55:36 +0000184 $(eval $(call FWU_FIP_ADD_IMG,NS_BL2U,--fwu))
Yatharth Kochar01912622015-10-12 12:33:47 +0100185
Juan Castillo1779ba62015-05-19 11:54:12 +0100186 MBEDTLS_KEY_ALG := ${KEY_ALG}
187
188 # We expect to locate the *.mk files under the directories specified below
189 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
190 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
191
192 $(info Including ${CRYPTO_LIB_MK})
193 include ${CRYPTO_LIB_MK}
194
195 $(info Including ${IMG_PARSER_LIB_MK})
196 include ${IMG_PARSER_LIB_MK}
197
198endif