blob: 0b93dfcaca354073fd21fbd5b6055fc0c3067457 [file] [log] [blame]
Jeenu Viswambharan2fae4b12016-10-24 14:31:51 +01001#
2# Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are met:
6#
7# Redistributions of source code must retain the above copyright notice, this
8# list of conditions and the following disclaimer.
9#
10# Redistributions in binary form must reproduce the above copyright notice,
11# this list of conditions and the following disclaimer in the documentation
12# and/or other materials provided with the distribution.
13#
14# Neither the name of ARM nor the names of its contributors may be used
15# to endorse or promote products derived from this software without specific
16# prior written permission.
17#
18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28# POSSIBILITY OF SUCH DAMAGE.
29#
30
31# Default, static values for build variables, listed in alphabetic order.
32# Dependencies between build options, if any, are handled in the top-level
33# Makefile, after this file is included. This ensures that the former is better
34# poised to handle dependencies, as all build variables would have a default
35# value by then.
36
37# The AArch32 Secure Payload to be built as BL32 image
38AARCH32_SP := none
39
40# The Target build architecture. Supported values are: aarch64, aarch32.
41ARCH := aarch64
42
43# Determine the version of ARM CCI product used in the platform. The platform
44# port can change this value if needed.
45ARM_CCI_PRODUCT_ID := 400
46
47# Determine the version of ARM GIC architecture to use for interrupt management
48# in EL3. The platform port can change this value if needed.
49ARM_GIC_ARCH := 2
50
51# Flag used to indicate if ASM_ASSERTION should be enabled for the build.
52ASM_ASSERTION := 0
53
54# Base commit to perform code check on
55BASE_COMMIT := origin/master
56
57# By default, consider that the platform may release several CPUs out of reset.
58# The platform Makefile is free to override this value.
59COLD_BOOT_SINGLE_CPU := 0
60
61# For Chain of Trust
62CREATE_KEYS := 1
63
64# Build flag to include AArch32 registers in cpu context save and restore during
65# world switch. This flag must be set to 0 for AArch64-only platforms.
66CTX_INCLUDE_AARCH32_REGS := 1
67
68# Include FP registers in cpu context
69CTX_INCLUDE_FPREGS := 0
70
71# Debug build
72DEBUG := 0
73
74# Build platform
75DEFAULT_PLAT := fvp
76
77# By default, use the -pedantic option in the gcc command line
78DISABLE_PEDANTIC := 0
79
80# Flag to enable Performance Measurement Framework
81ENABLE_PMF := 0
82
83# Flag to enable PSCI STATs functionality
84ENABLE_PSCI_STAT := 0
85
86# Flag to enable runtime instrumentation using PMF
87ENABLE_RUNTIME_INSTRUMENTATION := 0
88
89# Build flag to treat usage of deprecated platform and framework APIs as error.
90ERROR_DEPRECATED := 0
91
Masahiro Yamada1c75d5d2016-12-25 13:52:22 +090092# Byte alignment that each component in FIP is aligned to
93FIP_ALIGN := 0
94
Jeenu Viswambharan2fae4b12016-10-24 14:31:51 +010095# Default FIP file name
96FIP_NAME := fip.bin
97
98# Default FWU_FIP file name
99FWU_FIP_NAME := fwu_fip.bin
100
101# For Chain of Trust
102GENERATE_COT := 0
103
104# Flag to enable new version of image loading
105LOAD_IMAGE_V2 := 0
106
107# NS timer register save and restore
108NS_TIMER_SWITCH := 0
109
110# Build PL011 UART driver in minimal generic UART mode
111PL011_GENERIC_UART := 0
112
113# By default, consider that the platform's reset address is not programmable.
114# The platform Makefile is free to override this value.
115PROGRAMMABLE_RESET_ADDRESS := 0
116
117# Flag used to choose the power state format viz Extended State-ID or the
118# Original format.
119PSCI_EXTENDED_STATE_ID := 0
120
121# By default, BL1 acts as the reset handler, not BL31
122RESET_TO_BL31 := 0
123
124# For Chain of Trust
125SAVE_KEYS := 0
126
127# Whether code and read-only data should be put on separate memory pages. The
128# platform Makefile is free to override this value.
129SEPARATE_CODE_AND_RODATA := 0
130
131# SPD choice
132SPD := none
133
134# Flag to introduce an infinite loop in BL1 just before it exits into the next
135# image. This is meant to help debugging the post-BL2 phase.
136SPIN_ON_BL1_EXIT := 0
137
138# Flags to build TF with Trusted Boot support
139TRUSTED_BOARD_BOOT := 0
140
141# Build option to choose whether Trusted firmware uses Coherent memory or not.
142USE_COHERENT_MEM := 1
143
144# Build verbosity
145V := 0