Jorge Ramirez-Ortiz | 32c70e4 | 2018-09-23 09:41:10 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Antonio Nino Diaz | c3cf06f | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef PWRC_H |
| 8 | #define PWRC_H |
Jorge Ramirez-Ortiz | 32c70e4 | 2018-09-23 09:41:10 +0200 | [diff] [blame] | 9 | |
| 10 | #define PPOFFR_OFF 0x0 |
| 11 | #define PPONR_OFF 0x4 |
| 12 | #define PCOFFR_OFF 0x8 |
| 13 | #define PWKUPR_OFF 0xc |
| 14 | #define PSYSR_OFF 0x10 |
| 15 | |
| 16 | #define PWKUPR_WEN (1ull << 31) |
| 17 | |
| 18 | #define PSYSR_AFF_L2 (1 << 31) |
| 19 | #define PSYSR_AFF_L1 (1 << 30) |
| 20 | #define PSYSR_AFF_L0 (1 << 29) |
| 21 | #define PSYSR_WEN (1 << 28) |
| 22 | #define PSYSR_PC (1 << 27) |
| 23 | #define PSYSR_PP (1 << 26) |
| 24 | |
| 25 | #define PSYSR_WK_SHIFT (24) |
| 26 | #define PSYSR_WK_MASK (0x3) |
| 27 | #define PSYSR_WK(x) (((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK) |
| 28 | |
| 29 | #define WKUP_COLD 0x0 |
| 30 | #define WKUP_RESET 0x1 |
| 31 | #define WKUP_PPONR 0x2 |
| 32 | #define WKUP_GICREQ 0x3 |
| 33 | |
| 34 | #define RCAR_INVALID (0xffffffffU) |
| 35 | #define PSYSR_INVALID 0xffffffff |
| 36 | |
| 37 | #define RCAR_CLUSTER_A53A57 (0U) |
| 38 | #define RCAR_CLUSTER_CA53 (1U) |
| 39 | #define RCAR_CLUSTER_CA57 (2U) |
| 40 | |
| 41 | #ifndef __ASSEMBLY__ |
| 42 | void rcar_pwrc_disable_interrupt_wakeup(uint64_t mpidr); |
| 43 | void rcar_pwrc_enable_interrupt_wakeup(uint64_t mpidr); |
| 44 | void rcar_pwrc_clusteroff(uint64_t mpidr); |
| 45 | void rcar_pwrc_cpuoff(uint64_t mpidr); |
| 46 | void rcar_pwrc_cpuon(uint64_t mpidr); |
Marek Vasut | 47366cb | 2019-01-05 16:21:14 +0100 | [diff] [blame] | 47 | int32_t rcar_pwrc_cpu_on_check(uint64_t mpidr); |
Jorge Ramirez-Ortiz | 32c70e4 | 2018-09-23 09:41:10 +0200 | [diff] [blame] | 48 | void rcar_pwrc_setup(void); |
| 49 | |
| 50 | uint32_t rcar_pwrc_get_cpu_wkr(uint64_t mpidr); |
| 51 | uint32_t rcar_pwrc_status(uint64_t mpidr); |
| 52 | uint32_t rcar_pwrc_get_cluster(void); |
| 53 | uint32_t rcar_pwrc_get_mpidr_cluster(uint64_t mpidr); |
| 54 | uint32_t rcar_pwrc_get_cpu_num(uint32_t cluster_type); |
| 55 | void plat_secondary_reset(void); |
| 56 | |
| 57 | void rcar_pwrc_code_copy_to_system_ram(void); |
| 58 | |
| 59 | #if !PMIC_ROHM_BD9571 |
| 60 | void rcar_pwrc_system_reset(void); |
| 61 | #endif |
| 62 | |
| 63 | #if RCAR_SYSTEM_SUSPEND |
| 64 | void rcar_pwrc_go_suspend_to_ram(void); |
| 65 | void rcar_pwrc_set_suspend_to_ram(void); |
| 66 | void rcar_pwrc_init_suspend_to_ram(void); |
| 67 | void rcar_pwrc_suspend_to_ram(void); |
| 68 | #endif |
| 69 | |
| 70 | extern void rcar_pwrc_save_generic_timer(uint64_t *rcar_stack_generic_timer); |
| 71 | extern uint32_t rcar_pwrc_switch_stack(uintptr_t jump, uintptr_t stack, |
| 72 | void *arg); |
| 73 | |
| 74 | extern uint64_t rcar_stack_generic_timer[5]; |
| 75 | |
| 76 | #endif |
| 77 | |
Antonio Nino Diaz | c3cf06f | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 78 | #endif /* PWRC_H */ |