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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley97043ac2014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley97043ac2014-04-09 13:14:54 +010033#include <assert.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000034#include <runtime_svc.h>
35#include <debug.h>
Dan Handley35e98e52014-04-09 13:13:04 +010036#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
38/*******************************************************************************
39 * PSCI frontend api for servicing SMCs. Described in the PSCI spec.
40 ******************************************************************************/
41int psci_cpu_on(unsigned long target_cpu,
42 unsigned long entrypoint,
43 unsigned long context_id)
44
45{
46 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000047 unsigned int start_afflvl, end_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +010048
49 /* Determine if the cpu exists of not */
50 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
51 if (rc != PSCI_E_SUCCESS) {
52 goto exit;
53 }
54
Achin Gupta0959db52013-12-02 17:33:04 +000055 /*
56 * To turn this cpu on, specify which affinity
57 * levels need to be turned on
58 */
59 start_afflvl = MPIDR_AFFLVL0;
60 end_afflvl = get_max_afflvl();
Achin Gupta4f6ad662013-10-25 09:08:21 +010061 rc = psci_afflvl_on(target_cpu,
62 entrypoint,
63 context_id,
64 start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +000065 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +010066
67exit:
68 return rc;
69}
70
71unsigned int psci_version(void)
72{
73 return PSCI_MAJOR_VER | PSCI_MINOR_VER;
74}
75
76int psci_cpu_suspend(unsigned int power_state,
77 unsigned long entrypoint,
78 unsigned long context_id)
79{
80 int rc;
81 unsigned long mpidr;
Achin Gupta0959db52013-12-02 17:33:04 +000082 unsigned int target_afflvl, pstate_type;
Achin Gupta4f6ad662013-10-25 09:08:21 +010083
Vikram Kanigiri759ec932014-04-01 19:26:26 +010084 /* Check SBZ bits in power state are zero */
85 if (psci_validate_power_state(power_state))
86 return PSCI_E_INVALID_PARAMS;
87
Achin Gupta4f6ad662013-10-25 09:08:21 +010088 /* Sanity check the requested state */
Achin Gupta0959db52013-12-02 17:33:04 +000089 target_afflvl = psci_get_pstate_afflvl(power_state);
Vikram Kanigirid118f9f2014-03-21 11:57:10 +000090 if (target_afflvl > MPIDR_MAX_AFFLVL)
91 return PSCI_E_INVALID_PARAMS;
92
Achin Gupta317ba092014-05-09 19:32:25 +010093 /* Determine the 'state type' in the 'power_state' parameter */
Vikram Kanigirid118f9f2014-03-21 11:57:10 +000094 pstate_type = psci_get_pstate_type(power_state);
Achin Gupta317ba092014-05-09 19:32:25 +010095
96 /*
97 * Ensure that we have a platform specific handler for entering
98 * a standby state.
99 */
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000100 if (pstate_type == PSTATE_TYPE_STANDBY) {
Achin Gupta317ba092014-05-09 19:32:25 +0100101 if (!psci_plat_pm_ops->affinst_standby)
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000102 return PSCI_E_INVALID_PARAMS;
Achin Gupta317ba092014-05-09 19:32:25 +0100103
104 rc = psci_plat_pm_ops->affinst_standby(power_state);
105 assert(rc == PSCI_E_INVALID_PARAMS || rc == PSCI_E_SUCCESS);
106 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100107 }
108
Achin Gupta317ba092014-05-09 19:32:25 +0100109 /*
110 * Do what is needed to enter the power down state. Upon success,
111 * enter the final wfi which will power down this cpu else return
112 * an error.
113 */
114 mpidr = read_mpidr();
115 rc = psci_afflvl_suspend(mpidr,
116 entrypoint,
117 context_id,
118 power_state,
119 MPIDR_AFFLVL0,
120 target_afflvl);
121 if (rc == PSCI_E_SUCCESS)
122 psci_power_down_wfi();
123 assert(rc == PSCI_E_INVALID_PARAMS);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100124 return rc;
125}
126
127int psci_cpu_off(void)
128{
129 int rc;
130 unsigned long mpidr;
131 int target_afflvl = get_max_afflvl();
132
133 mpidr = read_mpidr();
134
135 /*
136 * Traverse from the highest to the lowest affinity level. When the
137 * lowest affinity level is hit, all the locks are acquired. State
138 * management is done immediately followed by cpu, cluster ...
139 * ..target_afflvl specific actions as this function unwinds back.
140 */
Achin Gupta0959db52013-12-02 17:33:04 +0000141 rc = psci_afflvl_off(mpidr, MPIDR_AFFLVL0, target_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100142
Achin Gupta3140a9e2013-12-02 16:23:12 +0000143 /*
Achin Gupta317ba092014-05-09 19:32:25 +0100144 * Check if all actions needed to safely power down this cpu have
145 * successfully completed. Enter a wfi loop which will allow the
146 * power controller to physically power down this cpu.
147 */
148 if (rc == PSCI_E_SUCCESS)
149 psci_power_down_wfi();
150
151 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000152 * The only error cpu_off can return is E_DENIED. So check if that's
153 * indeed the case.
154 */
Achin Gupta317ba092014-05-09 19:32:25 +0100155 assert (rc == PSCI_E_DENIED);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100156
157 return rc;
158}
159
160int psci_affinity_info(unsigned long target_affinity,
161 unsigned int lowest_affinity_level)
162{
163 int rc = PSCI_E_INVALID_PARAMS;
164 unsigned int aff_state;
Dan Handleyfb037bf2014-04-10 15:37:22 +0100165 aff_map_node_t *node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100166
Achin Gupta75f73672013-12-05 16:33:10 +0000167 if (lowest_affinity_level > get_max_afflvl())
168 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100169
170 node = psci_get_aff_map_node(target_affinity, lowest_affinity_level);
171 if (node && (node->state & PSCI_AFF_PRESENT)) {
Achin Gupta75f73672013-12-05 16:33:10 +0000172
173 /*
174 * TODO: For affinity levels higher than 0 i.e. cpu, the
175 * state will always be either ON or OFF. Need to investigate
176 * how critical is it to support ON_PENDING here.
177 */
178 aff_state = psci_get_state(node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100179
180 /* A suspended cpu is available & on for the OS */
181 if (aff_state == PSCI_STATE_SUSPEND) {
182 aff_state = PSCI_STATE_ON;
183 }
184
185 rc = aff_state;
186 }
Achin Gupta75f73672013-12-05 16:33:10 +0000187
Achin Gupta4f6ad662013-10-25 09:08:21 +0100188 return rc;
189}
190
191/* Unimplemented */
192int psci_migrate(unsigned int target_cpu)
193{
194 return PSCI_E_NOT_SUPPORTED;
195}
196
197/* Unimplemented */
198unsigned int psci_migrate_info_type(void)
199{
Achin Gupta607084e2014-02-09 18:24:19 +0000200 return PSCI_TOS_NOT_PRESENT_MP;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100201}
202
203unsigned long psci_migrate_info_up_cpu(void)
204{
205 /*
206 * Return value of this currently unsupported call depends upon
207 * what psci_migrate_info_type() returns.
208 */
209 return PSCI_E_SUCCESS;
210}
211
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000212/*******************************************************************************
213 * PSCI top level handler for servicing SMCs.
214 ******************************************************************************/
215uint64_t psci_smc_handler(uint32_t smc_fid,
216 uint64_t x1,
217 uint64_t x2,
218 uint64_t x3,
219 uint64_t x4,
220 void *cookie,
221 void *handle,
222 uint64_t flags)
223{
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100224 if (is_caller_secure(flags))
225 SMC_RET1(handle, SMC_UNK);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000226
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100227 if (((smc_fid >> FUNCID_CC_SHIFT) & FUNCID_CC_MASK) == SMC_32) {
228 /* 32-bit PSCI function, clear top parameter bits */
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000229
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100230 x1 = (uint32_t)x1;
231 x2 = (uint32_t)x2;
232 x3 = (uint32_t)x3;
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000233
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100234 switch (smc_fid) {
235 case PSCI_VERSION:
236 SMC_RET1(handle, psci_version());
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000237
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100238 case PSCI_CPU_OFF:
239 SMC_RET1(handle, __psci_cpu_off());
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000240
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100241 case PSCI_CPU_SUSPEND_AARCH32:
242 SMC_RET1(handle, __psci_cpu_suspend(x1, x2, x3));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000243
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100244 case PSCI_CPU_ON_AARCH32:
245 SMC_RET1(handle, psci_cpu_on(x1, x2, x3));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000246
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100247 case PSCI_AFFINITY_INFO_AARCH32:
248 SMC_RET1(handle, psci_affinity_info(x1, x2));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000249
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100250 case PSCI_MIG_AARCH32:
251 SMC_RET1(handle, psci_migrate(x1));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000252
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100253 case PSCI_MIG_INFO_TYPE:
254 SMC_RET1(handle, psci_migrate_info_type());
255
256 case PSCI_MIG_INFO_UP_CPU_AARCH32:
257 SMC_RET1(handle, psci_migrate_info_up_cpu());
258
259 default:
260 break;
261 }
262 } else {
263 /* 64-bit PSCI function */
264
265 switch (smc_fid) {
266 case PSCI_CPU_SUSPEND_AARCH64:
267 SMC_RET1(handle, __psci_cpu_suspend(x1, x2, x3));
268
269 case PSCI_CPU_ON_AARCH64:
270 SMC_RET1(handle, psci_cpu_on(x1, x2, x3));
271
272 case PSCI_AFFINITY_INFO_AARCH64:
273 SMC_RET1(handle, psci_affinity_info(x1, x2));
274
275 case PSCI_MIG_AARCH64:
276 SMC_RET1(handle, psci_migrate(x1));
277
278 case PSCI_MIG_INFO_UP_CPU_AARCH64:
279 SMC_RET1(handle, psci_migrate_info_up_cpu());
280
281 default:
282 break;
283 }
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000284 }
285
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100286 WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid);
287 SMC_RET1(handle, SMC_UNK);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000288}